[15:10:55.892] <TB2> INFO: *** Welcome to pxar ***
[15:10:55.892] <TB2> INFO: *** Today: 2015/09/02
[15:10:55.892] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C15.dat
[15:10:55.893] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:10:55.893] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//defaultMaskFile.dat
[15:10:55.893] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters_C15.dat
[15:10:55.970] <TB2> INFO: clk: 4
[15:10:55.970] <TB2> INFO: ctr: 4
[15:10:55.970] <TB2> INFO: sda: 19
[15:10:55.970] <TB2> INFO: tin: 9
[15:10:55.970] <TB2> INFO: level: 15
[15:10:55.970] <TB2> INFO: triggerdelay: 0
[15:10:55.970] <TB2> QUIET: Instanciating API for pxar prod-10
[15:10:55.970] <TB2> INFO: Log level: INFO
[15:10:55.978] <TB2> INFO: Found DTB DTB_WXC55Z
[15:10:55.989] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[15:10:55.992] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[15:10:55.995] <TB2> INFO: RPC call hashes of host and DTB match: 397073690
[15:10:57.516] <TB2> INFO: DUT info:
[15:10:57.516] <TB2> INFO: The DUT currently contains the following objects:
[15:10:57.516] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:10:57.517] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:10:57.517] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:10:57.517] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:10:57.517] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.517] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:57.918] <TB2> INFO: enter 'restricted' command line mode
[15:10:57.918] <TB2> INFO: enter test to run
[15:10:57.918] <TB2> INFO: test: pretest no parameter change
[15:10:57.918] <TB2> INFO: running: pretest
[15:10:57.925] <TB2> INFO: ######################################################################
[15:10:57.925] <TB2> INFO: PixTestPretest::doTest()
[15:10:57.925] <TB2> INFO: ######################################################################
[15:10:57.926] <TB2> INFO: ----------------------------------------------------------------------
[15:10:57.926] <TB2> INFO: PixTestPretest::programROC()
[15:10:57.926] <TB2> INFO: ----------------------------------------------------------------------
[15:11:15.943] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:11:15.943] <TB2> INFO: IA differences per ROC: 18.5 18.5 20.1 18.5 16.9 19.3 18.5 17.7 20.1 18.5 19.3 17.7 20.1 18.5 18.5 20.1
[15:11:16.018] <TB2> INFO: ----------------------------------------------------------------------
[15:11:16.018] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:11:16.018] <TB2> INFO: ----------------------------------------------------------------------
[15:11:35.579] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 367.4 mA = 22.9625 mA/ROC
[15:11:35.582] <TB2> INFO: ----------------------------------------------------------------------
[15:11:35.582] <TB2> INFO: PixTestPretest::findWorkingPixel()
[15:11:35.582] <TB2> INFO: ----------------------------------------------------------------------
[15:11:35.721] <TB2> INFO: Expecting 231680 events.
[15:11:45.292] <TB2> INFO: 231680 events read in total (8852ms).
[15:11:45.353] <TB2> INFO: Test took 9765ms.
[15:11:45.604] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:11:45.641] <TB2> INFO: ----------------------------------------------------------------------
[15:11:45.641] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[15:11:45.641] <TB2> INFO: ----------------------------------------------------------------------
[15:11:45.778] <TB2> INFO: Expecting 231680 events.
[15:11:55.180] <TB2> INFO: 231680 events read in total (8684ms).
[15:11:55.184] <TB2> INFO: Test took 9538ms.
[15:11:55.518] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[15:11:55.518] <TB2> INFO: CalDel: 145 149 148 161 158 141 153 163 138 140 143 155 141 129 163 131
[15:11:55.519] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:11:55.522] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C0.dat
[15:11:55.522] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C1.dat
[15:11:55.522] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C2.dat
[15:11:55.522] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C3.dat
[15:11:55.523] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C4.dat
[15:11:55.523] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C5.dat
[15:11:55.523] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C6.dat
[15:11:55.523] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C7.dat
[15:11:55.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C8.dat
[15:11:55.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C9.dat
[15:11:55.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C10.dat
[15:11:55.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C11.dat
[15:11:55.525] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C12.dat
[15:11:55.525] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C13.dat
[15:11:55.525] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C14.dat
[15:11:55.525] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C15.dat
[15:11:55.525] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0a.dat
[15:11:55.525] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:11:55.525] <TB2> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[15:11:55.627] <TB2> INFO: enter test to run
[15:11:55.627] <TB2> INFO: test: fulltest no parameter change
[15:11:55.627] <TB2> INFO: running: fulltest
[15:11:55.627] <TB2> INFO: ######################################################################
[15:11:55.627] <TB2> INFO: PixTestFullTest::doTest()
[15:11:55.627] <TB2> INFO: ######################################################################
[15:11:55.629] <TB2> INFO: ######################################################################
[15:11:55.629] <TB2> INFO: PixTestAlive::doTest()
[15:11:55.629] <TB2> INFO: ######################################################################
[15:11:55.630] <TB2> INFO: ----------------------------------------------------------------------
[15:11:55.630] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:11:55.630] <TB2> INFO: ----------------------------------------------------------------------
[15:11:55.939] <TB2> INFO: Expecting 41600 events.
[15:12:00.336] <TB2> INFO: 41600 events read in total (3681ms).
[15:12:00.336] <TB2> INFO: Test took 4705ms.
[15:12:00.342] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:00.634] <TB2> INFO: PixTestAlive::aliveTest() done
[15:12:00.634] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1
[15:12:00.636] <TB2> INFO: ----------------------------------------------------------------------
[15:12:00.636] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:00.636] <TB2> INFO: ----------------------------------------------------------------------
[15:12:00.953] <TB2> INFO: Expecting 41600 events.
[15:12:04.122] <TB2> INFO: 41600 events read in total (2453ms).
[15:12:04.122] <TB2> INFO: Test took 3484ms.
[15:12:04.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:04.123] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:12:04.427] <TB2> INFO: PixTestAlive::maskTest() done
[15:12:04.427] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:04.429] <TB2> INFO: ----------------------------------------------------------------------
[15:12:04.429] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:04.429] <TB2> INFO: ----------------------------------------------------------------------
[15:12:04.738] <TB2> INFO: Expecting 41600 events.
[15:12:09.264] <TB2> INFO: 41600 events read in total (3810ms).
[15:12:09.266] <TB2> INFO: Test took 4836ms.
[15:12:09.272] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:09.560] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[15:12:09.560] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:09.560] <TB2> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[15:12:09.575] <TB2> INFO: ######################################################################
[15:12:09.575] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:12:09.575] <TB2> INFO: ######################################################################
[15:12:09.578] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[15:12:09.589] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[15:12:09.589] <TB2> INFO: run 1 of 1
[15:12:09.896] <TB2> INFO: Expecting 3120000 events.
[15:12:46.782] <TB2> INFO: 872630 events read in total (36170ms).
[15:13:22.965] <TB2> INFO: 1733970 events read in total (72353ms).
[15:14:00.291] <TB2> INFO: 2608225 events read in total (109679ms).
[15:14:20.395] <TB2> INFO: 3120000 events read in total (129783ms).
[15:14:20.456] <TB2> INFO: Test took 130866ms.
[15:14:20.576] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:43.224] <TB2> INFO: PixTestBBMap::doTest() done, duration: 153 seconds
[15:14:43.224] <TB2> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 27
[15:14:43.224] <TB2> INFO: separation cut (per ROC): 88 79 77 66 77 78 88 98 87 75 95 69 92 72 65 81
[15:14:43.314] <TB2> INFO: ######################################################################
[15:14:43.314] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:43.314] <TB2> INFO: ######################################################################
[15:14:43.314] <TB2> INFO: ----------------------------------------------------------------------
[15:14:43.314] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:43.314] <TB2> INFO: ----------------------------------------------------------------------
[15:14:43.314] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[15:14:43.323] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[15:14:43.323] <TB2> INFO: run 1 of 1
[15:14:43.625] <TB2> INFO: Expecting 31200000 events.
[15:15:11.256] <TB2> INFO: 960150 events read in total (26906ms).
[15:15:37.993] <TB2> INFO: 1908000 events read in total (53643ms).
[15:16:05.220] <TB2> INFO: 2849050 events read in total (80870ms).
[15:16:31.980] <TB2> INFO: 3793300 events read in total (107630ms).
[15:16:59.482] <TB2> INFO: 4732550 events read in total (135132ms).
[15:17:26.494] <TB2> INFO: 5672450 events read in total (162144ms).
[15:17:53.570] <TB2> INFO: 6611500 events read in total (189220ms).
[15:18:20.856] <TB2> INFO: 7550600 events read in total (216506ms).
[15:18:47.953] <TB2> INFO: 8488950 events read in total (243603ms).
[15:19:15.058] <TB2> INFO: 9425600 events read in total (270708ms).
[15:19:41.847] <TB2> INFO: 10363350 events read in total (297497ms).
[15:20:09.273] <TB2> INFO: 11300600 events read in total (324923ms).
[15:20:36.393] <TB2> INFO: 12236550 events read in total (352043ms).
[15:21:04.021] <TB2> INFO: 13170350 events read in total (379671ms).
[15:21:31.731] <TB2> INFO: 14105000 events read in total (407381ms).
[15:21:59.693] <TB2> INFO: 15038600 events read in total (435343ms).
[15:22:26.963] <TB2> INFO: 15965450 events read in total (462613ms).
[15:22:53.974] <TB2> INFO: 16891900 events read in total (489624ms).
[15:23:21.212] <TB2> INFO: 17813450 events read in total (516862ms).
[15:23:48.406] <TB2> INFO: 18740150 events read in total (544056ms).
[15:24:15.826] <TB2> INFO: 19657200 events read in total (571476ms).
[15:24:43.562] <TB2> INFO: 20579400 events read in total (599212ms).
[15:25:10.660] <TB2> INFO: 21499800 events read in total (626310ms).
[15:25:37.895] <TB2> INFO: 22420200 events read in total (653545ms).
[15:26:04.804] <TB2> INFO: 23337900 events read in total (680454ms).
[15:26:32.189] <TB2> INFO: 24259100 events read in total (707839ms).
[15:26:59.385] <TB2> INFO: 25177250 events read in total (735035ms).
[15:27:27.102] <TB2> INFO: 26093850 events read in total (762752ms).
[15:27:54.572] <TB2> INFO: 27012500 events read in total (790222ms).
[15:28:20.068] <TB2> INFO: 27932650 events read in total (815718ms).
[15:28:45.885] <TB2> INFO: 28855550 events read in total (841535ms).
[15:29:12.255] <TB2> INFO: 29775600 events read in total (867905ms).
[15:29:34.527] <TB2> INFO: 30703250 events read in total (890177ms).
[15:29:48.201] <TB2> INFO: 31200000 events read in total (903851ms).
[15:29:48.231] <TB2> INFO: Test took 904908ms.
[15:29:48.315] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:48.420] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:29:49.903] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:29:51.404] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:29:52.870] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:29:54.367] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:29:55.768] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:29:57.242] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:29:58.670] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:00.103] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:01.657] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:03.095] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:04.450] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:05.866] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:07.290] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:08.795] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:10.343] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:30:11.722] <TB2> INFO: PixTestScurves::scurves() done
[15:30:11.722] <TB2> INFO: Vcal mean: 96.39 86.08 85.66 78.85 85.39 81.87 101.94 101.17 94.41 81.78 91.10 82.88 89.35 79.05 80.93 99.94
[15:30:11.722] <TB2> INFO: Vcal RMS: 6.05 5.03 5.39 4.55 5.00 5.28 5.75 6.79 5.68 4.92 5.85 4.93 5.08 4.70 4.36 5.29
[15:30:11.722] <TB2> INFO: PixTestScurves::fullTest() done, duration: 928 seconds
[15:30:11.797] <TB2> INFO: ######################################################################
[15:30:11.797] <TB2> INFO: PixTestTrim::doTest()
[15:30:11.797] <TB2> INFO: ######################################################################
[15:30:11.798] <TB2> INFO: ----------------------------------------------------------------------
[15:30:11.798] <TB2> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[15:30:11.798] <TB2> INFO: ----------------------------------------------------------------------
[15:30:11.878] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:30:11.878] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:30:11.887] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[15:30:11.887] <TB2> INFO: run 1 of 1
[15:30:12.217] <TB2> INFO: Expecting 13312000 events.
[15:30:42.706] <TB2> INFO: 1112780 events read in total (29766ms).
[15:31:12.694] <TB2> INFO: 2222020 events read in total (59754ms).
[15:31:42.733] <TB2> INFO: 3327820 events read in total (89794ms).
[15:32:12.703] <TB2> INFO: 4430800 events read in total (119763ms).
[15:32:42.953] <TB2> INFO: 5530420 events read in total (150013ms).
[15:33:12.631] <TB2> INFO: 6626140 events read in total (179691ms).
[15:33:42.834] <TB2> INFO: 7727140 events read in total (209894ms).
[15:34:12.316] <TB2> INFO: 8831700 events read in total (239376ms).
[15:34:40.502] <TB2> INFO: 9937840 events read in total (267562ms).
[15:35:09.860] <TB2> INFO: 11042360 events read in total (296920ms).
[15:35:36.931] <TB2> INFO: 12149000 events read in total (323991ms).
[15:36:05.160] <TB2> INFO: 13259960 events read in total (352220ms).
[15:36:07.238] <TB2> INFO: 13312000 events read in total (354298ms).
[15:36:07.278] <TB2> INFO: Test took 355391ms.
[15:36:07.337] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:28.428] <TB2> INFO: ROC 0 VthrComp = 93
[15:36:28.428] <TB2> INFO: ROC 1 VthrComp = 86
[15:36:28.428] <TB2> INFO: ROC 2 VthrComp = 88
[15:36:28.428] <TB2> INFO: ROC 3 VthrComp = 79
[15:36:28.428] <TB2> INFO: ROC 4 VthrComp = 86
[15:36:28.428] <TB2> INFO: ROC 5 VthrComp = 82
[15:36:28.428] <TB2> INFO: ROC 6 VthrComp = 98
[15:36:28.428] <TB2> INFO: ROC 7 VthrComp = 94
[15:36:28.429] <TB2> INFO: ROC 8 VthrComp = 96
[15:36:28.429] <TB2> INFO: ROC 9 VthrComp = 80
[15:36:28.429] <TB2> INFO: ROC 10 VthrComp = 95
[15:36:28.429] <TB2> INFO: ROC 11 VthrComp = 81
[15:36:28.429] <TB2> INFO: ROC 12 VthrComp = 90
[15:36:28.429] <TB2> INFO: ROC 13 VthrComp = 81
[15:36:28.429] <TB2> INFO: ROC 14 VthrComp = 81
[15:36:28.429] <TB2> INFO: ROC 15 VthrComp = 104
[15:36:28.429] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:36:28.429] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:36:28.439] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[15:36:28.439] <TB2> INFO: run 1 of 1
[15:36:28.759] <TB2> INFO: Expecting 13312000 events.
[15:36:56.845] <TB2> INFO: 781620 events read in total (27370ms).
[15:37:24.510] <TB2> INFO: 1559640 events read in total (55035ms).
[15:37:52.336] <TB2> INFO: 2336980 events read in total (82861ms).
[15:38:20.586] <TB2> INFO: 3113980 events read in total (111111ms).
[15:38:49.015] <TB2> INFO: 3890900 events read in total (139540ms).
[15:39:17.504] <TB2> INFO: 4668460 events read in total (168029ms).
[15:39:46.624] <TB2> INFO: 5445480 events read in total (197149ms).
[15:40:14.864] <TB2> INFO: 6222760 events read in total (225389ms).
[15:40:43.645] <TB2> INFO: 6997000 events read in total (254170ms).
[15:41:11.932] <TB2> INFO: 7768260 events read in total (282457ms).
[15:41:39.443] <TB2> INFO: 8537200 events read in total (309968ms).
[15:42:05.928] <TB2> INFO: 9305320 events read in total (336453ms).
[15:42:34.379] <TB2> INFO: 10072180 events read in total (364904ms).
[15:43:03.386] <TB2> INFO: 10838520 events read in total (393911ms).
[15:43:32.116] <TB2> INFO: 11604180 events read in total (422641ms).
[15:43:55.308] <TB2> INFO: 12370620 events read in total (445833ms).
[15:44:21.092] <TB2> INFO: 13138800 events read in total (471617ms).
[15:44:27.981] <TB2> INFO: 13312000 events read in total (478506ms).
[15:44:28.023] <TB2> INFO: Test took 479584ms.
[15:44:28.165] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:51.076] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 62.9917 for pixel 14/2 mean/min/max = 47.8881/32.7508/63.0253
[15:44:51.077] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 58.2775 for pixel 18/0 mean/min/max = 45.3471/32.1883/58.506
[15:44:51.077] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 58.7552 for pixel 3/62 mean/min/max = 46.2224/33.4944/58.9503
[15:44:51.077] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.212 for pixel 17/6 mean/min/max = 47.075/34.9253/59.2248
[15:44:51.077] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.1195 for pixel 18/79 mean/min/max = 44.7494/31.9804/57.5183
[15:44:51.078] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.5156 for pixel 5/69 mean/min/max = 45.6817/31.6817/59.6817
[15:44:51.078] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.4102 for pixel 47/78 mean/min/max = 45.5498/31.6408/59.4589
[15:44:51.078] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 65.4777 for pixel 27/77 mean/min/max = 49.0215/32.4967/65.5463
[15:44:51.079] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 60.0403 for pixel 0/61 mean/min/max = 45.9591/31.8479/60.0703
[15:44:51.079] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.3455 for pixel 11/68 mean/min/max = 46.2031/32.7974/59.6088
[15:44:51.079] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.3739 for pixel 7/79 mean/min/max = 45.3426/32.2621/58.423
[15:44:51.079] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.7591 for pixel 22/2 mean/min/max = 45.7065/32.6525/58.7605
[15:44:51.080] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 57.3889 for pixel 24/26 mean/min/max = 45.5555/33.5917/57.5192
[15:44:51.080] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.8397 for pixel 8/3 mean/min/max = 45.7177/32.5456/58.8897
[15:44:51.080] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.5235 for pixel 14/11 mean/min/max = 45.1987/32.7169/57.6805
[15:44:51.080] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.7934 for pixel 2/75 mean/min/max = 45.8162/33.6659/57.9665
[15:44:51.081] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:44:51.212] <TB2> INFO: Expecting 1029120 events.
[15:45:18.526] <TB2> INFO: 1029120 events read in total (26596ms).
[15:45:18.533] <TB2> INFO: Expecting 1029120 events.
[15:45:45.508] <TB2> INFO: 1029120 events read in total (26447ms).
[15:45:45.517] <TB2> INFO: Expecting 1029120 events.
[15:46:12.752] <TB2> INFO: 1029120 events read in total (26699ms).
[15:46:12.762] <TB2> INFO: Expecting 1029120 events.
[15:46:39.856] <TB2> INFO: 1029120 events read in total (26558ms).
[15:46:39.866] <TB2> INFO: Expecting 1029120 events.
[15:47:06.868] <TB2> INFO: 1029120 events read in total (26458ms).
[15:47:06.879] <TB2> INFO: Expecting 1029120 events.
[15:47:33.433] <TB2> INFO: 1029120 events read in total (26014ms).
[15:47:33.446] <TB2> INFO: Expecting 1029120 events.
[15:48:00.424] <TB2> INFO: 1029120 events read in total (26426ms).
[15:48:00.439] <TB2> INFO: Expecting 1029120 events.
[15:48:26.882] <TB2> INFO: 1029120 events read in total (25899ms).
[15:48:26.901] <TB2> INFO: Expecting 1029120 events.
[15:48:53.683] <TB2> INFO: 1029120 events read in total (26254ms).
[15:48:53.706] <TB2> INFO: Expecting 1029120 events.
[15:49:21.106] <TB2> INFO: 1029120 events read in total (26872ms).
[15:49:21.130] <TB2> INFO: Expecting 1029120 events.
[15:49:48.552] <TB2> INFO: 1029120 events read in total (26895ms).
[15:49:48.576] <TB2> INFO: Expecting 1029120 events.
[15:50:15.592] <TB2> INFO: 1029120 events read in total (26488ms).
[15:50:15.620] <TB2> INFO: Expecting 1029120 events.
[15:50:43.201] <TB2> INFO: 1029120 events read in total (27054ms).
[15:50:43.229] <TB2> INFO: Expecting 1029120 events.
[15:51:10.870] <TB2> INFO: 1029120 events read in total (27113ms).
[15:51:10.903] <TB2> INFO: Expecting 1029120 events.
[15:51:37.736] <TB2> INFO: 1029120 events read in total (26305ms).
[15:51:37.772] <TB2> INFO: Expecting 1029120 events.
[15:52:05.102] <TB2> INFO: 1029120 events read in total (26803ms).
[15:52:05.136] <TB2> INFO: Test took 434055ms.
[15:52:06.096] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[15:52:06.105] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[15:52:06.105] <TB2> INFO: run 1 of 1
[15:52:06.412] <TB2> INFO: Expecting 16640000 events.
[15:52:35.600] <TB2> INFO: 725340 events read in total (28472ms).
[15:53:03.640] <TB2> INFO: 1447360 events read in total (56512ms).
[15:53:32.563] <TB2> INFO: 2169600 events read in total (85435ms).
[15:54:00.876] <TB2> INFO: 2891920 events read in total (113748ms).
[15:54:29.708] <TB2> INFO: 3614000 events read in total (142580ms).
[15:54:58.082] <TB2> INFO: 4336220 events read in total (170954ms).
[15:55:26.661] <TB2> INFO: 5058260 events read in total (199533ms).
[15:55:55.446] <TB2> INFO: 5781560 events read in total (228318ms).
[15:56:23.727] <TB2> INFO: 6503820 events read in total (256599ms).
[15:56:52.184] <TB2> INFO: 7225880 events read in total (285056ms).
[15:57:20.304] <TB2> INFO: 7948380 events read in total (313176ms).
[15:57:47.925] <TB2> INFO: 8667880 events read in total (340797ms).
[15:58:14.132] <TB2> INFO: 9385600 events read in total (367004ms).
[15:58:42.696] <TB2> INFO: 10101760 events read in total (395568ms).
[15:59:10.553] <TB2> INFO: 10816720 events read in total (423425ms).
[15:59:38.810] <TB2> INFO: 11531240 events read in total (451682ms).
[16:00:06.783] <TB2> INFO: 12245460 events read in total (479655ms).
[16:00:34.414] <TB2> INFO: 12958780 events read in total (507286ms).
[16:01:02.697] <TB2> INFO: 13670720 events read in total (535569ms).
[16:01:27.095] <TB2> INFO: 14382260 events read in total (559967ms).
[16:01:55.958] <TB2> INFO: 15095580 events read in total (588830ms).
[16:02:18.590] <TB2> INFO: 15807660 events read in total (611462ms).
[16:02:45.262] <TB2> INFO: 16521920 events read in total (638134ms).
[16:02:50.190] <TB2> INFO: 16640000 events read in total (643062ms).
[16:02:50.249] <TB2> INFO: Test took 644144ms.
[16:02:50.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:15.876] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.073712 .. 255.000000
[16:03:15.953] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 255 (-1/-1) hits flags = 16 (plus default)
[16:03:15.961] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:03:15.961] <TB2> INFO: run 1 of 1
[16:03:16.267] <TB2> INFO: Expecting 21299200 events.
[16:03:42.932] <TB2> INFO: 712200 events read in total (25942ms).
[16:04:10.693] <TB2> INFO: 1424420 events read in total (53703ms).
[16:04:39.058] <TB2> INFO: 2137120 events read in total (82068ms).
[16:05:07.243] <TB2> INFO: 2849740 events read in total (110253ms).
[16:05:33.040] <TB2> INFO: 3561980 events read in total (136050ms).
[16:05:58.752] <TB2> INFO: 4274760 events read in total (161762ms).
[16:06:24.117] <TB2> INFO: 4987500 events read in total (187127ms).
[16:06:50.784] <TB2> INFO: 5700320 events read in total (213794ms).
[16:07:16.897] <TB2> INFO: 6413140 events read in total (239907ms).
[16:07:44.475] <TB2> INFO: 7125440 events read in total (267485ms).
[16:08:12.416] <TB2> INFO: 7837880 events read in total (295426ms).
[16:08:40.653] <TB2> INFO: 8550640 events read in total (323663ms).
[16:09:08.345] <TB2> INFO: 9263200 events read in total (351355ms).
[16:09:35.323] <TB2> INFO: 9975920 events read in total (378333ms).
[16:10:02.848] <TB2> INFO: 10688620 events read in total (405858ms).
[16:10:27.452] <TB2> INFO: 11401220 events read in total (430462ms).
[16:10:54.704] <TB2> INFO: 12113460 events read in total (457714ms).
[16:11:22.780] <TB2> INFO: 12826380 events read in total (485790ms).
[16:11:50.603] <TB2> INFO: 13538080 events read in total (513613ms).
[16:12:18.249] <TB2> INFO: 14250020 events read in total (541259ms).
[16:12:45.914] <TB2> INFO: 14962040 events read in total (568924ms).
[16:13:13.447] <TB2> INFO: 15673560 events read in total (596457ms).
[16:13:41.214] <TB2> INFO: 16384920 events read in total (624224ms).
[16:14:05.513] <TB2> INFO: 17095540 events read in total (648523ms).
[16:14:32.862] <TB2> INFO: 17806540 events read in total (675872ms).
[16:15:00.330] <TB2> INFO: 18517380 events read in total (703340ms).
[16:15:27.901] <TB2> INFO: 19228520 events read in total (730911ms).
[16:15:53.720] <TB2> INFO: 19939300 events read in total (756730ms).
[16:16:15.864] <TB2> INFO: 20650460 events read in total (778874ms).
[16:16:40.968] <TB2> INFO: 21299200 events read in total (803978ms).
[16:16:41.072] <TB2> INFO: Test took 805111ms.
[16:16:41.345] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:17:12.265] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 17.094869 .. 61.013140
[16:17:12.359] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 7 .. 71 (-1/-1) hits flags = 16 (plus default)
[16:17:12.369] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:17:12.369] <TB2> INFO: run 1 of 1
[16:17:12.709] <TB2> INFO: Expecting 5408000 events.
[16:17:41.192] <TB2> INFO: 844860 events read in total (27750ms).
[16:18:08.265] <TB2> INFO: 1689620 events read in total (54823ms).
[16:18:32.399] <TB2> INFO: 2533920 events read in total (78957ms).
[16:19:01.897] <TB2> INFO: 3377940 events read in total (108455ms).
[16:19:31.850] <TB2> INFO: 4221000 events read in total (138408ms).
[16:20:01.199] <TB2> INFO: 5063420 events read in total (167757ms).
[16:20:12.268] <TB2> INFO: 5408000 events read in total (178826ms).
[16:20:12.284] <TB2> INFO: Test took 179915ms.
[16:20:12.332] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:20:27.399] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 23.703256 .. 61.013140
[16:20:27.475] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 13 .. 71 (-1/-1) hits flags = 16 (plus default)
[16:20:27.484] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:20:27.484] <TB2> INFO: run 1 of 1
[16:20:27.792] <TB2> INFO: Expecting 4908800 events.
[16:20:53.857] <TB2> INFO: 815820 events read in total (25349ms).
[16:21:23.097] <TB2> INFO: 1631720 events read in total (54589ms).
[16:21:49.477] <TB2> INFO: 2447800 events read in total (80969ms).
[16:22:17.703] <TB2> INFO: 3263380 events read in total (109195ms).
[16:22:46.000] <TB2> INFO: 4078440 events read in total (137492ms).
[16:23:12.588] <TB2> INFO: 4892880 events read in total (164080ms).
[16:23:13.507] <TB2> INFO: 4908800 events read in total (164999ms).
[16:23:13.521] <TB2> INFO: Test took 166037ms.
[16:23:13.568] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:23:28.587] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 5.487172 .. 61.013140
[16:23:28.665] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 5 .. 71 (-1/-1) hits flags = 16 (plus default)
[16:23:28.674] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:23:28.674] <TB2> INFO: run 1 of 1
[16:23:28.985] <TB2> INFO: Expecting 5574400 events.
[16:23:58.103] <TB2> INFO: 855020 events read in total (28402ms).
[16:24:26.034] <TB2> INFO: 1710480 events read in total (56333ms).
[16:24:54.391] <TB2> INFO: 2565540 events read in total (84690ms).
[16:25:21.194] <TB2> INFO: 3420860 events read in total (111493ms).
[16:25:47.881] <TB2> INFO: 4276620 events read in total (138180ms).
[16:26:14.127] <TB2> INFO: 5131720 events read in total (164426ms).
[16:26:29.608] <TB2> INFO: 5574400 events read in total (179907ms).
[16:26:29.626] <TB2> INFO: Test took 180952ms.
[16:26:29.673] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:26:45.010] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:26:45.010] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[16:26:45.019] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:26:45.019] <TB2> INFO: run 1 of 1
[16:26:45.336] <TB2> INFO: Expecting 3411200 events.
[16:27:13.702] <TB2> INFO: 878060 events read in total (27650ms).
[16:27:42.055] <TB2> INFO: 1756120 events read in total (56003ms).
[16:28:10.024] <TB2> INFO: 2633700 events read in total (83972ms).
[16:28:36.767] <TB2> INFO: 3411200 events read in total (110715ms).
[16:28:36.784] <TB2> INFO: Test took 111765ms.
[16:28:36.823] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:28:51.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:28:51.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:28:51.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:28:51.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:28:51.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:28:51.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:28:51.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:28:51.368] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:28:51.368] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:28:51.368] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:28:51.368] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:28:51.368] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:28:51.369] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:28:51.369] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:28:51.369] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:28:51.369] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:28:51.369] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C0.dat
[16:28:51.379] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C1.dat
[16:28:51.387] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C2.dat
[16:28:51.393] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C3.dat
[16:28:51.401] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C4.dat
[16:28:51.407] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C5.dat
[16:28:51.415] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C6.dat
[16:28:51.422] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C7.dat
[16:28:51.429] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C8.dat
[16:28:51.436] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C9.dat
[16:28:51.443] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C10.dat
[16:28:51.450] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C11.dat
[16:28:51.457] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C12.dat
[16:28:51.464] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C13.dat
[16:28:51.472] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C14.dat
[16:28:51.480] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C15.dat
[16:28:51.487] <TB2> INFO: PixTestTrim::trimTest() done
[16:28:51.487] <TB2> INFO: vtrim: 111 93 89 94 86 79 95 112 97 89 97 84 83 98 80 98
[16:28:51.487] <TB2> INFO: vthrcomp: 93 86 88 79 86 82 98 94 96 80 95 81 90 81 81 104
[16:28:51.487] <TB2> INFO: vcal mean: 35.01 34.99 35.05 34.97 34.97 34.97 34.98 34.98 34.99 34.99 34.96 34.95 34.97 34.98 34.70 35.01
[16:28:51.487] <TB2> INFO: vcal RMS: 0.78 0.71 0.69 1.04 0.71 0.71 0.75 1.07 0.73 0.75 0.71 0.74 0.68 0.69 0.70 0.86
[16:28:51.487] <TB2> INFO: bits mean: 8.93 9.48 8.54 8.98 9.43 9.07 9.33 8.83 8.79 8.99 9.09 9.37 9.07 9.34 9.46 8.83
[16:28:51.487] <TB2> INFO: bits RMS: 2.69 2.71 2.89 2.42 2.82 2.90 2.85 2.68 3.05 2.76 2.90 2.65 2.64 2.70 2.59 2.72
[16:28:51.494] <TB2> INFO: ----------------------------------------------------------------------
[16:28:51.494] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[16:28:51.494] <TB2> INFO: ----------------------------------------------------------------------
[16:28:51.497] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[16:28:51.508] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:28:51.508] <TB2> INFO: run 1 of 1
[16:28:51.823] <TB2> INFO: Expecting 8320000 events.
[16:29:21.147] <TB2> INFO: 942100 events read in total (28608ms).
[16:29:52.720] <TB2> INFO: 1875390 events read in total (60181ms).
[16:30:20.628] <TB2> INFO: 2805810 events read in total (88089ms).
[16:30:51.844] <TB2> INFO: 3733780 events read in total (119305ms).
[16:31:23.417] <TB2> INFO: 4655300 events read in total (150878ms).
[16:31:54.880] <TB2> INFO: 5571720 events read in total (182341ms).
[16:32:24.757] <TB2> INFO: 6487560 events read in total (212218ms).
[16:32:54.907] <TB2> INFO: 7402510 events read in total (242368ms).
[16:33:26.125] <TB2> INFO: 8320000 events read in total (273586ms).
[16:33:26.163] <TB2> INFO: Test took 274655ms.
[16:33:26.270] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:33:52.117] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 193 (-1/-1) hits flags = 16 (plus default)
[16:33:52.125] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:33:52.125] <TB2> INFO: run 1 of 1
[16:33:52.428] <TB2> INFO: Expecting 8070400 events.
[16:34:24.368] <TB2> INFO: 919530 events read in total (31222ms).
[16:34:52.108] <TB2> INFO: 1831050 events read in total (58962ms).
[16:35:19.820] <TB2> INFO: 2740460 events read in total (86674ms).
[16:35:47.896] <TB2> INFO: 3646910 events read in total (114750ms).
[16:36:15.557] <TB2> INFO: 4547360 events read in total (142411ms).
[16:36:43.950] <TB2> INFO: 5443950 events read in total (170804ms).
[16:37:14.593] <TB2> INFO: 6339060 events read in total (201447ms).
[16:37:45.691] <TB2> INFO: 7233720 events read in total (232545ms).
[16:38:14.740] <TB2> INFO: 8070400 events read in total (261594ms).
[16:38:14.780] <TB2> INFO: Test took 262655ms.
[16:38:14.889] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:38:41.308] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 178 (-1/-1) hits flags = 16 (plus default)
[16:38:41.316] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:38:41.316] <TB2> INFO: run 1 of 1
[16:38:41.628] <TB2> INFO: Expecting 7446400 events.
[16:39:10.886] <TB2> INFO: 949290 events read in total (28542ms).
[16:39:43.501] <TB2> INFO: 1890210 events read in total (61157ms).
[16:40:14.205] <TB2> INFO: 2827710 events read in total (91861ms).
[16:40:47.049] <TB2> INFO: 3761050 events read in total (124705ms).
[16:41:20.448] <TB2> INFO: 4685460 events read in total (158104ms).
[16:41:53.584] <TB2> INFO: 5607940 events read in total (191240ms).
[16:42:25.704] <TB2> INFO: 6529510 events read in total (223360ms).
[16:42:58.344] <TB2> INFO: 7446400 events read in total (256000ms).
[16:42:58.385] <TB2> INFO: Test took 257068ms.
[16:42:58.484] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:43:24.706] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 177 (-1/-1) hits flags = 16 (plus default)
[16:43:24.715] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:43:24.715] <TB2> INFO: run 1 of 1
[16:43:25.021] <TB2> INFO: Expecting 7404800 events.
[16:43:56.723] <TB2> INFO: 951120 events read in total (30983ms).
[16:44:29.859] <TB2> INFO: 1893480 events read in total (64119ms).
[16:45:02.624] <TB2> INFO: 2832290 events read in total (96884ms).
[16:45:35.521] <TB2> INFO: 3766570 events read in total (129782ms).
[16:46:08.873] <TB2> INFO: 4692340 events read in total (163133ms).
[16:46:40.869] <TB2> INFO: 5616350 events read in total (195129ms).
[16:47:13.584] <TB2> INFO: 6539550 events read in total (227844ms).
[16:47:39.580] <TB2> INFO: 7404800 events read in total (253840ms).
[16:47:39.613] <TB2> INFO: Test took 254898ms.
[16:47:39.703] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:48:03.097] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 179 (-1/-1) hits flags = 16 (plus default)
[16:48:03.105] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:48:03.105] <TB2> INFO: run 1 of 1
[16:48:03.408] <TB2> INFO: Expecting 7488000 events.
[16:48:35.346] <TB2> INFO: 946020 events read in total (31222ms).
[16:49:07.440] <TB2> INFO: 1883770 events read in total (63316ms).
[16:49:40.044] <TB2> INFO: 2817270 events read in total (95920ms).
[16:50:11.809] <TB2> INFO: 3747950 events read in total (127685ms).
[16:50:43.769] <TB2> INFO: 4668990 events read in total (159645ms).
[16:51:15.618] <TB2> INFO: 5588300 events read in total (191494ms).
[16:51:47.616] <TB2> INFO: 6506850 events read in total (223492ms).
[16:52:19.835] <TB2> INFO: 7431910 events read in total (255711ms).
[16:52:22.077] <TB2> INFO: 7488000 events read in total (257953ms).
[16:52:22.123] <TB2> INFO: Test took 259018ms.
[16:52:22.225] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:52:50.823] <TB2> INFO: PixTestTrim::trimBitTest() done
[16:52:50.825] <TB2> INFO: PixTestTrim::doTest() done, duration: 4959 seconds
[16:52:51.506] <TB2> INFO: ######################################################################
[16:52:51.506] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:52:51.506] <TB2> INFO: ######################################################################
[16:52:51.857] <TB2> INFO: Expecting 41600 events.
[16:52:56.646] <TB2> INFO: 41600 events read in total (4073ms).
[16:52:56.647] <TB2> INFO: Test took 5140ms.
[16:52:56.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:52:57.257] <TB2> INFO: Expecting 41600 events.
[16:53:02.069] <TB2> INFO: 41600 events read in total (4096ms).
[16:53:02.069] <TB2> INFO: Test took 5154ms.
[16:53:02.075] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:53:02.410] <TB2> INFO: Expecting 41600 events.
[16:53:06.850] <TB2> INFO: 41600 events read in total (3724ms).
[16:53:06.850] <TB2> INFO: Test took 4764ms.
[16:53:06.856] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:53:06.863] <TB2> INFO: The DUT currently contains the following objects:
[16:53:06.863] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:06.863] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:06.863] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:06.863] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:06.863] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:06.863] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:07.204] <TB2> INFO: Expecting 2560 events.
[16:53:08.271] <TB2> INFO: 2560 events read in total (351ms).
[16:53:08.272] <TB2> INFO: Test took 1409ms.
[16:53:08.272] <TB2> INFO: The DUT currently contains the following objects:
[16:53:08.272] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:08.272] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:08.272] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:08.272] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:08.272] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.272] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.273] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.273] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.273] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.273] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.273] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:08.686] <TB2> INFO: Expecting 2560 events.
[16:53:09.754] <TB2> INFO: 2560 events read in total (352ms).
[16:53:09.754] <TB2> INFO: Test took 1481ms.
[16:53:09.754] <TB2> INFO: The DUT currently contains the following objects:
[16:53:09.754] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:09.754] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:09.755] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:09.755] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:09.755] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:09.755] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:10.169] <TB2> INFO: Expecting 2560 events.
[16:53:11.237] <TB2> INFO: 2560 events read in total (352ms).
[16:53:11.237] <TB2> INFO: Test took 1482ms.
[16:53:11.238] <TB2> INFO: The DUT currently contains the following objects:
[16:53:11.238] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:11.238] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:11.238] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:11.238] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:11.238] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.238] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.239] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.239] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:11.652] <TB2> INFO: Expecting 2560 events.
[16:53:12.721] <TB2> INFO: 2560 events read in total (353ms).
[16:53:12.721] <TB2> INFO: Test took 1482ms.
[16:53:12.722] <TB2> INFO: The DUT currently contains the following objects:
[16:53:12.722] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:12.722] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:12.722] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:12.722] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:12.722] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.722] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:12.723] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:13.137] <TB2> INFO: Expecting 2560 events.
[16:53:14.200] <TB2> INFO: 2560 events read in total (347ms).
[16:53:14.201] <TB2> INFO: Test took 1478ms.
[16:53:14.201] <TB2> INFO: The DUT currently contains the following objects:
[16:53:14.201] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:14.201] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:14.201] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:14.201] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:14.201] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.201] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.202] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.202] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.202] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.202] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.202] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.202] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:14.615] <TB2> INFO: Expecting 2560 events.
[16:53:15.696] <TB2> INFO: 2560 events read in total (364ms).
[16:53:15.696] <TB2> INFO: Test took 1494ms.
[16:53:15.697] <TB2> INFO: The DUT currently contains the following objects:
[16:53:15.697] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:15.697] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:15.697] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:15.697] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:15.697] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.697] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.698] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.698] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.698] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.698] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.698] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:15.698] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:16.111] <TB2> INFO: Expecting 2560 events.
[16:53:17.192] <TB2> INFO: 2560 events read in total (365ms).
[16:53:17.192] <TB2> INFO: Test took 1495ms.
[16:53:17.193] <TB2> INFO: The DUT currently contains the following objects:
[16:53:17.193] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:17.193] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:17.193] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:17.193] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:17.193] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.193] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.194] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.194] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.194] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.194] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:17.607] <TB2> INFO: Expecting 2560 events.
[16:53:18.689] <TB2> INFO: 2560 events read in total (365ms).
[16:53:18.689] <TB2> INFO: Test took 1495ms.
[16:53:18.689] <TB2> INFO: The DUT currently contains the following objects:
[16:53:18.689] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:18.689] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:18.690] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:18.690] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:18.690] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:18.690] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:19.104] <TB2> INFO: Expecting 2560 events.
[16:53:20.171] <TB2> INFO: 2560 events read in total (351ms).
[16:53:20.171] <TB2> INFO: Test took 1481ms.
[16:53:20.171] <TB2> INFO: The DUT currently contains the following objects:
[16:53:20.171] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:20.171] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:20.171] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:20.172] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:20.172] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.172] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:20.586] <TB2> INFO: Expecting 2560 events.
[16:53:21.666] <TB2> INFO: 2560 events read in total (364ms).
[16:53:21.667] <TB2> INFO: Test took 1495ms.
[16:53:21.667] <TB2> INFO: The DUT currently contains the following objects:
[16:53:21.667] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:21.667] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:21.667] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:21.667] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:21.667] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.667] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.668] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.668] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.668] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.668] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.668] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:21.668] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:22.081] <TB2> INFO: Expecting 2560 events.
[16:53:23.148] <TB2> INFO: 2560 events read in total (350ms).
[16:53:23.148] <TB2> INFO: Test took 1480ms.
[16:53:23.148] <TB2> INFO: The DUT currently contains the following objects:
[16:53:23.148] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:23.148] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:23.148] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:23.148] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:23.148] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.149] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:23.563] <TB2> INFO: Expecting 2560 events.
[16:53:24.629] <TB2> INFO: 2560 events read in total (349ms).
[16:53:24.629] <TB2> INFO: Test took 1480ms.
[16:53:24.629] <TB2> INFO: The DUT currently contains the following objects:
[16:53:24.629] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:24.629] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:24.629] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:24.629] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:24.630] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:24.630] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:25.043] <TB2> INFO: Expecting 2560 events.
[16:53:26.110] <TB2> INFO: 2560 events read in total (350ms).
[16:53:26.110] <TB2> INFO: Test took 1480ms.
[16:53:26.111] <TB2> INFO: The DUT currently contains the following objects:
[16:53:26.111] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:26.111] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:26.111] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:26.111] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:26.111] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.111] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:26.525] <TB2> INFO: Expecting 2560 events.
[16:53:27.593] <TB2> INFO: 2560 events read in total (352ms).
[16:53:27.593] <TB2> INFO: Test took 1481ms.
[16:53:27.593] <TB2> INFO: The DUT currently contains the following objects:
[16:53:27.593] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:27.593] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:27.593] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:27.593] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:27.593] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:27.594] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:28.008] <TB2> INFO: Expecting 2560 events.
[16:53:29.075] <TB2> INFO: 2560 events read in total (351ms).
[16:53:29.076] <TB2> INFO: Test took 1482ms.
[16:53:29.076] <TB2> INFO: The DUT currently contains the following objects:
[16:53:29.076] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:53:29.076] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:53:29.076] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:53:29.076] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:53:29.076] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.076] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.077] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.077] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.077] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.077] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.077] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:53:29.490] <TB2> INFO: Expecting 2560 events.
[16:53:30.560] <TB2> INFO: 2560 events read in total (353ms).
[16:53:30.561] <TB2> INFO: Test took 1484ms.
[16:53:30.566] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:30.977] <TB2> INFO: Expecting 655360 events.
[16:53:48.143] <TB2> INFO: 655360 events read in total (16450ms).
[16:53:48.153] <TB2> INFO: Expecting 655360 events.
[16:54:05.526] <TB2> INFO: 655360 events read in total (16846ms).
[16:54:05.541] <TB2> INFO: Expecting 655360 events.
[16:54:22.779] <TB2> INFO: 655360 events read in total (16710ms).
[16:54:22.794] <TB2> INFO: Expecting 655360 events.
[16:54:40.256] <TB2> INFO: 655360 events read in total (16934ms).
[16:54:40.275] <TB2> INFO: Expecting 655360 events.
[16:54:58.035] <TB2> INFO: 655360 events read in total (17233ms).
[16:54:58.059] <TB2> INFO: Expecting 655360 events.
[16:55:15.265] <TB2> INFO: 655360 events read in total (16679ms).
[16:55:15.293] <TB2> INFO: Expecting 655360 events.
[16:55:32.610] <TB2> INFO: 655360 events read in total (16790ms).
[16:55:32.641] <TB2> INFO: Expecting 655360 events.
[16:55:49.860] <TB2> INFO: 655360 events read in total (16692ms).
[16:55:49.894] <TB2> INFO: Expecting 655360 events.
[16:56:07.416] <TB2> INFO: 655360 events read in total (16994ms).
[16:56:07.457] <TB2> INFO: Expecting 655360 events.
[16:56:24.811] <TB2> INFO: 655360 events read in total (16826ms).
[16:56:24.855] <TB2> INFO: Expecting 655360 events.
[16:56:42.137] <TB2> INFO: 655360 events read in total (16755ms).
[16:56:42.182] <TB2> INFO: Expecting 655360 events.
[16:56:59.718] <TB2> INFO: 655360 events read in total (17009ms).
[16:56:59.770] <TB2> INFO: Expecting 655360 events.
[16:57:17.527] <TB2> INFO: 655360 events read in total (17230ms).
[16:57:17.582] <TB2> INFO: Expecting 655360 events.
[16:57:35.413] <TB2> INFO: 655360 events read in total (17303ms).
[16:57:35.468] <TB2> INFO: Expecting 655360 events.
[16:57:51.246] <TB2> INFO: 655360 events read in total (15250ms).
[16:57:51.345] <TB2> INFO: Expecting 655360 events.
[16:58:06.676] <TB2> INFO: 655360 events read in total (14803ms).
[16:58:06.737] <TB2> INFO: Test took 276171ms.
[16:58:06.820] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:07.128] <TB2> INFO: Expecting 655360 events.
[16:58:23.590] <TB2> INFO: 655360 events read in total (15746ms).
[16:58:23.598] <TB2> INFO: Expecting 655360 events.
[16:58:40.522] <TB2> INFO: 655360 events read in total (16397ms).
[16:58:40.534] <TB2> INFO: Expecting 655360 events.
[16:58:57.719] <TB2> INFO: 655360 events read in total (16658ms).
[16:58:57.736] <TB2> INFO: Expecting 655360 events.
[16:59:14.997] <TB2> INFO: 655360 events read in total (16734ms).
[16:59:15.023] <TB2> INFO: Expecting 655360 events.
[16:59:32.299] <TB2> INFO: 655360 events read in total (16749ms).
[16:59:32.329] <TB2> INFO: Expecting 655360 events.
[16:59:49.215] <TB2> INFO: 655360 events read in total (16359ms).
[16:59:49.243] <TB2> INFO: Expecting 655360 events.
[17:00:06.073] <TB2> INFO: 655360 events read in total (16303ms).
[17:00:06.104] <TB2> INFO: Expecting 655360 events.
[17:00:23.429] <TB2> INFO: 655360 events read in total (16797ms).
[17:00:23.465] <TB2> INFO: Expecting 655360 events.
[17:00:40.620] <TB2> INFO: 655360 events read in total (16627ms).
[17:00:40.657] <TB2> INFO: Expecting 655360 events.
[17:00:57.704] <TB2> INFO: 655360 events read in total (16520ms).
[17:00:57.764] <TB2> INFO: Expecting 655360 events.
[17:01:13.467] <TB2> INFO: 655360 events read in total (15176ms).
[17:01:13.511] <TB2> INFO: Expecting 655360 events.
[17:01:28.990] <TB2> INFO: 655360 events read in total (14951ms).
[17:01:29.043] <TB2> INFO: Expecting 655360 events.
[17:01:45.145] <TB2> INFO: 655360 events read in total (15574ms).
[17:01:45.208] <TB2> INFO: Expecting 655360 events.
[17:02:01.968] <TB2> INFO: 655360 events read in total (16232ms).
[17:02:02.027] <TB2> INFO: Expecting 655360 events.
[17:02:18.847] <TB2> INFO: 655360 events read in total (16292ms).
[17:02:18.917] <TB2> INFO: Expecting 655360 events.
[17:02:35.771] <TB2> INFO: 655360 events read in total (16326ms).
[17:02:35.848] <TB2> INFO: Test took 269028ms.
[17:02:36.090] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.099] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.106] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.113] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.120] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.127] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.134] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.141] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.148] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.155] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.163] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.170] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[17:02:36.177] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[17:02:36.184] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[17:02:36.191] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[17:02:36.198] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[17:02:36.205] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[17:02:36.211] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.218] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.226] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.234] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.244] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:02:36.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C0.dat
[17:02:36.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C1.dat
[17:02:36.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C2.dat
[17:02:36.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C3.dat
[17:02:36.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C4.dat
[17:02:36.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C5.dat
[17:02:36.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C6.dat
[17:02:36.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C7.dat
[17:02:36.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C8.dat
[17:02:36.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C9.dat
[17:02:36.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C10.dat
[17:02:36.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C11.dat
[17:02:36.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C12.dat
[17:02:36.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C13.dat
[17:02:36.288] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C14.dat
[17:02:36.288] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C15.dat
[17:02:36.595] <TB2> INFO: Expecting 41600 events.
[17:02:41.164] <TB2> INFO: 41600 events read in total (3852ms).
[17:02:41.164] <TB2> INFO: Test took 4873ms.
[17:02:41.721] <TB2> INFO: Expecting 41600 events.
[17:02:46.247] <TB2> INFO: 41600 events read in total (3810ms).
[17:02:46.248] <TB2> INFO: Test took 4856ms.
[17:02:46.836] <TB2> INFO: Expecting 41600 events.
[17:02:51.391] <TB2> INFO: 41600 events read in total (3838ms).
[17:02:51.392] <TB2> INFO: Test took 4904ms.
[17:02:51.611] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:02:51.744] <TB2> INFO: Expecting 2560 events.
[17:02:52.813] <TB2> INFO: 2560 events read in total (352ms).
[17:02:52.814] <TB2> INFO: Test took 1203ms.
[17:02:52.820] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:02:53.230] <TB2> INFO: Expecting 2560 events.
[17:02:54.313] <TB2> INFO: 2560 events read in total (367ms).
[17:02:54.313] <TB2> INFO: Test took 1493ms.
[17:02:54.315] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:02:54.729] <TB2> INFO: Expecting 2560 events.
[17:02:55.813] <TB2> INFO: 2560 events read in total (368ms).
[17:02:55.813] <TB2> INFO: Test took 1498ms.
[17:02:55.816] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:02:56.229] <TB2> INFO: Expecting 2560 events.
[17:02:57.314] <TB2> INFO: 2560 events read in total (369ms).
[17:02:57.314] <TB2> INFO: Test took 1498ms.
[17:02:57.317] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:02:57.730] <TB2> INFO: Expecting 2560 events.
[17:02:58.800] <TB2> INFO: 2560 events read in total (354ms).
[17:02:58.801] <TB2> INFO: Test took 1484ms.
[17:02:58.803] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:02:59.216] <TB2> INFO: Expecting 2560 events.
[17:03:00.287] <TB2> INFO: 2560 events read in total (355ms).
[17:03:00.287] <TB2> INFO: Test took 1484ms.
[17:03:00.290] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:00.703] <TB2> INFO: Expecting 2560 events.
[17:03:01.770] <TB2> INFO: 2560 events read in total (351ms).
[17:03:01.770] <TB2> INFO: Test took 1480ms.
[17:03:01.773] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:02.186] <TB2> INFO: Expecting 2560 events.
[17:03:03.257] <TB2> INFO: 2560 events read in total (356ms).
[17:03:03.258] <TB2> INFO: Test took 1485ms.
[17:03:03.263] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:03.674] <TB2> INFO: Expecting 2560 events.
[17:03:04.744] <TB2> INFO: 2560 events read in total (354ms).
[17:03:04.745] <TB2> INFO: Test took 1482ms.
[17:03:04.747] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:05.161] <TB2> INFO: Expecting 2560 events.
[17:03:06.229] <TB2> INFO: 2560 events read in total (352ms).
[17:03:06.229] <TB2> INFO: Test took 1482ms.
[17:03:06.232] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:06.645] <TB2> INFO: Expecting 2560 events.
[17:03:07.731] <TB2> INFO: 2560 events read in total (370ms).
[17:03:07.731] <TB2> INFO: Test took 1499ms.
[17:03:07.734] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:08.147] <TB2> INFO: Expecting 2560 events.
[17:03:09.233] <TB2> INFO: 2560 events read in total (370ms).
[17:03:09.233] <TB2> INFO: Test took 1499ms.
[17:03:09.236] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:09.649] <TB2> INFO: Expecting 2560 events.
[17:03:10.717] <TB2> INFO: 2560 events read in total (352ms).
[17:03:10.717] <TB2> INFO: Test took 1481ms.
[17:03:10.720] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:11.133] <TB2> INFO: Expecting 2560 events.
[17:03:12.218] <TB2> INFO: 2560 events read in total (369ms).
[17:03:12.218] <TB2> INFO: Test took 1499ms.
[17:03:12.221] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:12.634] <TB2> INFO: Expecting 2560 events.
[17:03:13.702] <TB2> INFO: 2560 events read in total (352ms).
[17:03:13.703] <TB2> INFO: Test took 1482ms.
[17:03:13.705] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:14.118] <TB2> INFO: Expecting 2560 events.
[17:03:15.201] <TB2> INFO: 2560 events read in total (367ms).
[17:03:15.201] <TB2> INFO: Test took 1496ms.
[17:03:15.203] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:15.617] <TB2> INFO: Expecting 2560 events.
[17:03:16.699] <TB2> INFO: 2560 events read in total (366ms).
[17:03:16.699] <TB2> INFO: Test took 1496ms.
[17:03:16.701] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:17.115] <TB2> INFO: Expecting 2560 events.
[17:03:18.183] <TB2> INFO: 2560 events read in total (352ms).
[17:03:18.184] <TB2> INFO: Test took 1483ms.
[17:03:18.187] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:18.599] <TB2> INFO: Expecting 2560 events.
[17:03:19.668] <TB2> INFO: 2560 events read in total (352ms).
[17:03:19.668] <TB2> INFO: Test took 1482ms.
[17:03:19.673] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:20.084] <TB2> INFO: Expecting 2560 events.
[17:03:21.154] <TB2> INFO: 2560 events read in total (354ms).
[17:03:21.155] <TB2> INFO: Test took 1482ms.
[17:03:21.157] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:21.570] <TB2> INFO: Expecting 2560 events.
[17:03:22.638] <TB2> INFO: 2560 events read in total (352ms).
[17:03:22.639] <TB2> INFO: Test took 1482ms.
[17:03:22.641] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:23.054] <TB2> INFO: Expecting 2560 events.
[17:03:24.126] <TB2> INFO: 2560 events read in total (355ms).
[17:03:24.128] <TB2> INFO: Test took 1487ms.
[17:03:24.132] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:24.541] <TB2> INFO: Expecting 2560 events.
[17:03:25.610] <TB2> INFO: 2560 events read in total (352ms).
[17:03:25.610] <TB2> INFO: Test took 1478ms.
[17:03:25.613] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:26.026] <TB2> INFO: Expecting 2560 events.
[17:03:27.093] <TB2> INFO: 2560 events read in total (351ms).
[17:03:27.093] <TB2> INFO: Test took 1480ms.
[17:03:27.096] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:27.509] <TB2> INFO: Expecting 2560 events.
[17:03:28.577] <TB2> INFO: 2560 events read in total (352ms).
[17:03:28.577] <TB2> INFO: Test took 1481ms.
[17:03:28.580] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:28.993] <TB2> INFO: Expecting 2560 events.
[17:03:30.061] <TB2> INFO: 2560 events read in total (352ms).
[17:03:30.061] <TB2> INFO: Test took 1482ms.
[17:03:30.063] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:30.477] <TB2> INFO: Expecting 2560 events.
[17:03:31.544] <TB2> INFO: 2560 events read in total (351ms).
[17:03:31.544] <TB2> INFO: Test took 1481ms.
[17:03:31.547] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:31.960] <TB2> INFO: Expecting 2560 events.
[17:03:33.029] <TB2> INFO: 2560 events read in total (352ms).
[17:03:33.029] <TB2> INFO: Test took 1482ms.
[17:03:33.032] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:33.445] <TB2> INFO: Expecting 2560 events.
[17:03:34.512] <TB2> INFO: 2560 events read in total (351ms).
[17:03:34.513] <TB2> INFO: Test took 1482ms.
[17:03:34.515] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:34.928] <TB2> INFO: Expecting 2560 events.
[17:03:35.996] <TB2> INFO: 2560 events read in total (351ms).
[17:03:35.996] <TB2> INFO: Test took 1481ms.
[17:03:35.998] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:36.412] <TB2> INFO: Expecting 2560 events.
[17:03:37.479] <TB2> INFO: 2560 events read in total (351ms).
[17:03:37.480] <TB2> INFO: Test took 1482ms.
[17:03:37.483] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:37.895] <TB2> INFO: Expecting 2560 events.
[17:03:38.961] <TB2> INFO: 2560 events read in total (350ms).
[17:03:38.962] <TB2> INFO: Test took 1480ms.
[17:03:39.574] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 648 seconds
[17:03:39.574] <TB2> INFO: PH scale (per ROC): 71 71 68 74 74 77 66 68 78 72 80 72 69 76 67 76
[17:03:39.574] <TB2> INFO: PH offset (per ROC): 178 177 182 182 187 171 188 176 179 186 176 183 181 166 175 171
[17:03:39.765] <TB2> INFO: ######################################################################
[17:03:39.765] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:03:39.765] <TB2> INFO: ######################################################################
[17:03:39.775] <TB2> INFO: scanning low vcal = 10
[17:03:40.104] <TB2> INFO: Expecting 41600 events.
[17:03:43.739] <TB2> INFO: 41600 events read in total (2919ms).
[17:03:43.739] <TB2> INFO: Test took 3964ms.
[17:03:43.741] <TB2> INFO: scanning low vcal = 20
[17:03:44.155] <TB2> INFO: Expecting 41600 events.
[17:03:47.830] <TB2> INFO: 41600 events read in total (2959ms).
[17:03:47.830] <TB2> INFO: Test took 4088ms.
[17:03:47.832] <TB2> INFO: scanning low vcal = 30
[17:03:48.246] <TB2> INFO: Expecting 41600 events.
[17:03:51.889] <TB2> INFO: 41600 events read in total (2927ms).
[17:03:51.889] <TB2> INFO: Test took 4057ms.
[17:03:51.892] <TB2> INFO: scanning low vcal = 40
[17:03:52.296] <TB2> INFO: Expecting 41600 events.
[17:03:56.536] <TB2> INFO: 41600 events read in total (3524ms).
[17:03:56.537] <TB2> INFO: Test took 4645ms.
[17:03:56.540] <TB2> INFO: scanning low vcal = 50
[17:03:56.866] <TB2> INFO: Expecting 41600 events.
[17:04:01.201] <TB2> INFO: 41600 events read in total (3619ms).
[17:04:01.201] <TB2> INFO: Test took 4660ms.
[17:04:01.204] <TB2> INFO: scanning low vcal = 60
[17:04:01.533] <TB2> INFO: Expecting 41600 events.
[17:04:05.830] <TB2> INFO: 41600 events read in total (3581ms).
[17:04:05.831] <TB2> INFO: Test took 4627ms.
[17:04:05.855] <TB2> INFO: scanning low vcal = 70
[17:04:06.190] <TB2> INFO: Expecting 41600 events.
[17:04:10.497] <TB2> INFO: 41600 events read in total (3591ms).
[17:04:10.497] <TB2> INFO: Test took 4641ms.
[17:04:10.500] <TB2> INFO: scanning low vcal = 80
[17:04:10.845] <TB2> INFO: Expecting 41600 events.
[17:04:15.060] <TB2> INFO: 41600 events read in total (3499ms).
[17:04:15.060] <TB2> INFO: Test took 4560ms.
[17:04:15.063] <TB2> INFO: scanning low vcal = 90
[17:04:15.418] <TB2> INFO: Expecting 41600 events.
[17:04:19.790] <TB2> INFO: 41600 events read in total (3655ms).
[17:04:19.791] <TB2> INFO: Test took 4728ms.
[17:04:19.794] <TB2> INFO: scanning low vcal = 100
[17:04:20.146] <TB2> INFO: Expecting 41600 events.
[17:04:24.338] <TB2> INFO: 41600 events read in total (3476ms).
[17:04:24.339] <TB2> INFO: Test took 4545ms.
[17:04:24.341] <TB2> INFO: scanning low vcal = 110
[17:04:24.697] <TB2> INFO: Expecting 41600 events.
[17:04:28.947] <TB2> INFO: 41600 events read in total (3533ms).
[17:04:28.948] <TB2> INFO: Test took 4607ms.
[17:04:28.951] <TB2> INFO: scanning low vcal = 120
[17:04:29.304] <TB2> INFO: Expecting 41600 events.
[17:04:33.556] <TB2> INFO: 41600 events read in total (3536ms).
[17:04:33.556] <TB2> INFO: Test took 4605ms.
[17:04:33.559] <TB2> INFO: scanning low vcal = 130
[17:04:33.911] <TB2> INFO: Expecting 41600 events.
[17:04:38.176] <TB2> INFO: 41600 events read in total (3549ms).
[17:04:38.176] <TB2> INFO: Test took 4617ms.
[17:04:38.179] <TB2> INFO: scanning low vcal = 140
[17:04:38.532] <TB2> INFO: Expecting 41600 events.
[17:04:42.716] <TB2> INFO: 41600 events read in total (3467ms).
[17:04:42.716] <TB2> INFO: Test took 4537ms.
[17:04:42.719] <TB2> INFO: scanning low vcal = 150
[17:04:43.069] <TB2> INFO: Expecting 41600 events.
[17:04:47.358] <TB2> INFO: 41600 events read in total (3572ms).
[17:04:47.359] <TB2> INFO: Test took 4640ms.
[17:04:47.361] <TB2> INFO: scanning low vcal = 160
[17:04:47.717] <TB2> INFO: Expecting 41600 events.
[17:04:51.952] <TB2> INFO: 41600 events read in total (3519ms).
[17:04:51.952] <TB2> INFO: Test took 4591ms.
[17:04:51.955] <TB2> INFO: scanning low vcal = 170
[17:04:52.304] <TB2> INFO: Expecting 41600 events.
[17:04:56.498] <TB2> INFO: 41600 events read in total (3478ms).
[17:04:56.498] <TB2> INFO: Test took 4543ms.
[17:04:56.502] <TB2> INFO: scanning low vcal = 180
[17:04:56.856] <TB2> INFO: Expecting 41600 events.
[17:05:01.108] <TB2> INFO: 41600 events read in total (3536ms).
[17:05:01.109] <TB2> INFO: Test took 4607ms.
[17:05:01.111] <TB2> INFO: scanning low vcal = 190
[17:05:01.447] <TB2> INFO: Expecting 41600 events.
[17:05:05.749] <TB2> INFO: 41600 events read in total (3586ms).
[17:05:05.750] <TB2> INFO: Test took 4638ms.
[17:05:05.753] <TB2> INFO: scanning low vcal = 200
[17:05:06.097] <TB2> INFO: Expecting 41600 events.
[17:05:10.195] <TB2> INFO: 41600 events read in total (3381ms).
[17:05:10.195] <TB2> INFO: Test took 4442ms.
[17:05:10.198] <TB2> INFO: scanning low vcal = 210
[17:05:10.553] <TB2> INFO: Expecting 41600 events.
[17:05:14.586] <TB2> INFO: 41600 events read in total (3317ms).
[17:05:14.586] <TB2> INFO: Test took 4388ms.
[17:05:14.589] <TB2> INFO: scanning low vcal = 220
[17:05:14.944] <TB2> INFO: Expecting 41600 events.
[17:05:19.006] <TB2> INFO: 41600 events read in total (3346ms).
[17:05:19.007] <TB2> INFO: Test took 4418ms.
[17:05:19.009] <TB2> INFO: scanning low vcal = 230
[17:05:19.365] <TB2> INFO: Expecting 41600 events.
[17:05:23.429] <TB2> INFO: 41600 events read in total (3348ms).
[17:05:23.429] <TB2> INFO: Test took 4420ms.
[17:05:23.432] <TB2> INFO: scanning low vcal = 240
[17:05:23.787] <TB2> INFO: Expecting 41600 events.
[17:05:27.996] <TB2> INFO: 41600 events read in total (3492ms).
[17:05:27.997] <TB2> INFO: Test took 4565ms.
[17:05:27.999] <TB2> INFO: scanning low vcal = 250
[17:05:28.343] <TB2> INFO: Expecting 41600 events.
[17:05:32.423] <TB2> INFO: 41600 events read in total (3364ms).
[17:05:32.423] <TB2> INFO: Test took 4424ms.
[17:05:32.427] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[17:05:32.781] <TB2> INFO: Expecting 41600 events.
[17:05:36.880] <TB2> INFO: 41600 events read in total (3383ms).
[17:05:36.881] <TB2> INFO: Test took 4454ms.
[17:05:36.884] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[17:05:37.239] <TB2> INFO: Expecting 41600 events.
[17:05:41.378] <TB2> INFO: 41600 events read in total (3423ms).
[17:05:41.378] <TB2> INFO: Test took 4494ms.
[17:05:41.382] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[17:05:41.735] <TB2> INFO: Expecting 41600 events.
[17:05:45.853] <TB2> INFO: 41600 events read in total (3402ms).
[17:05:45.853] <TB2> INFO: Test took 4471ms.
[17:05:45.856] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[17:05:46.210] <TB2> INFO: Expecting 41600 events.
[17:05:50.533] <TB2> INFO: 41600 events read in total (3607ms).
[17:05:50.533] <TB2> INFO: Test took 4677ms.
[17:05:50.536] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:05:50.870] <TB2> INFO: Expecting 41600 events.
[17:05:54.996] <TB2> INFO: 41600 events read in total (3410ms).
[17:05:54.997] <TB2> INFO: Test took 4461ms.
[17:05:55.555] <TB2> INFO: PixTestGainPedestal::measure() done
[17:06:29.049] <TB2> INFO: PixTestGainPedestal::fit() done
[17:06:29.049] <TB2> INFO: non-linearity mean: 0.964 0.961 0.959 0.962 0.957 0.959 0.966 0.957 0.964 0.956 0.960 0.959 0.951 0.959 0.955 0.951
[17:06:29.049] <TB2> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.007 0.006 0.006 0.008 0.006 0.009 0.005 0.006 0.008 0.005 0.008 0.007
[17:06:29.049] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[17:06:29.068] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[17:06:29.086] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[17:06:29.106] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[17:06:29.127] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[17:06:29.146] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[17:06:29.166] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[17:06:29.186] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[17:06:29.206] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[17:06:29.226] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[17:06:29.246] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[17:06:29.266] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[17:06:29.285] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[17:06:29.304] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[17:06:29.324] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[17:06:29.343] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[17:06:29.363] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 169 seconds
[17:06:29.369] <TB2> INFO: readReadbackCal: /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[17:06:29.370] <TB2> INFO: PixTestReadback::doTest() start.
[17:06:29.371] <TB2> INFO: PixTestReadback::RES sent once
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[17:06:51.206] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[17:06:51.207] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[17:06:51.207] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[17:06:51.207] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[17:06:51.207] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[17:06:51.207] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[17:06:51.207] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[17:06:51.236] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:06:51.237] <TB2> INFO: PixTestReadback::RES sent once
[17:07:12.937] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[17:07:12.937] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[17:07:12.937] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[17:07:12.937] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[17:07:12.937] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[17:07:12.937] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[17:07:12.937] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[17:07:12.937] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[17:07:12.938] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[17:07:12.938] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[17:07:12.938] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[17:07:12.938] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[17:07:12.938] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[17:07:12.938] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[17:07:12.938] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[17:07:12.938] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[17:07:12.969] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:07:12.969] <TB2> INFO: PixTestReadback::RES sent once
[17:07:29.825] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:07:29.825] <TB2> INFO: Vbg will be calibrated using Vd calibration
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 160.3calibrated Vbg = 1.21549 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153calibrated Vbg = 1.20853 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 147.9calibrated Vbg = 1.21939 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.5calibrated Vbg = 1.22393 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.9calibrated Vbg = 1.22076 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 150.3calibrated Vbg = 1.22489 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 149.1calibrated Vbg = 1.2268 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 155.5calibrated Vbg = 1.22425 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.1calibrated Vbg = 1.22282 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 150.7calibrated Vbg = 1.21333 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.6calibrated Vbg = 1.21414 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153calibrated Vbg = 1.21772 :::*/*/*/*/
[17:07:29.825] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[17:07:29.828] <TB2> INFO: PixTestReadback::RES sent once
[17:12:09.647] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[17:12:09.648] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[17:12:09.648] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[17:12:09.648] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[17:12:09.648] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[17:12:09.648] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[17:12:09.648] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[17:12:09.649] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2101_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[17:12:09.677] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:12:09.678] <TB2> INFO: PixTestReadback::doTest() done
[17:12:09.690] <TB2> INFO: enter test to run
[17:12:09.690] <TB2> INFO: test: exit no parameter change
[17:12:10.326] <TB2> QUIET: Connection to board 156 closed.
[17:12:10.405] <TB2> INFO: pXar: this is the end, my friend