Test Date: 2015-09-16 11:18
Analysis date: 2016-05-26 04:14
Logfile
LogfileView
[14:26:45.466] <TB1> INFO: *** Welcome to pxar ***
[14:26:45.466] <TB1> INFO: *** Today: 2015/09/16
[14:26:45.466] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C15.dat
[14:26:45.467] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:26:45.467] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//defaultMaskFile.dat
[14:26:45.467] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters_C15.dat
[14:26:45.565] <TB1> INFO: clk: 4
[14:26:45.565] <TB1> INFO: ctr: 4
[14:26:45.565] <TB1> INFO: sda: 19
[14:26:45.565] <TB1> INFO: tin: 9
[14:26:45.565] <TB1> INFO: level: 15
[14:26:45.565] <TB1> INFO: triggerdelay: 0
[14:26:45.565] <TB1> QUIET: Instanciating API for pxar prod-10+28~ga8f1456
[14:26:45.565] <TB1> INFO: Log level: INFO
[14:26:45.573] <TB1> INFO: Found DTB DTB_WXBYFL
[14:26:45.585] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[14:26:45.588] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[14:26:45.591] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[14:26:47.121] <TB1> INFO: DUT info:
[14:26:47.121] <TB1> INFO: The DUT currently contains the following objects:
[14:26:47.121] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:26:47.121] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:26:47.121] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:26:47.121] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:26:47.121] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.121] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:26:47.522] <TB1> INFO: enter 'restricted' command line mode
[14:26:47.522] <TB1> INFO: enter test to run
[14:26:47.523] <TB1> INFO: test: pretest no parameter change
[14:26:47.523] <TB1> INFO: running: pretest
[14:26:47.529] <TB1> INFO: ######################################################################
[14:26:47.529] <TB1> INFO: PixTestPretest::doTest()
[14:26:47.529] <TB1> INFO: ######################################################################
[14:26:47.531] <TB1> INFO: ----------------------------------------------------------------------
[14:26:47.531] <TB1> INFO: PixTestPretest::programROC()
[14:26:47.531] <TB1> INFO: ----------------------------------------------------------------------
[14:27:05.553] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:27:05.553] <TB1> INFO: IA differences per ROC: 16.1 16.9 18.5 21.7 20.1 17.7 17.7 17.7 18.5 19.3 18.5 18.5 17.7 17.7 20.1 19.3
[14:27:05.647] <TB1> INFO: ----------------------------------------------------------------------
[14:27:05.647] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:27:05.647] <TB1> INFO: ----------------------------------------------------------------------
[14:27:25.249] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 377.8 mA = 23.6125 mA/ROC
[14:27:25.251] <TB1> INFO: ----------------------------------------------------------------------
[14:27:25.251] <TB1> INFO: PixTestPretest::findTiming()
[14:27:25.251] <TB1> INFO: ----------------------------------------------------------------------
[14:27:25.251] <TB1> INFO: PixTestCmd::init()
[14:27:25.955] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!

[14:30:01.622] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[14:30:01.622] <TB1> INFO: (success/tries = 100/100), width = 4
[14:30:01.624] <TB1> INFO: ----------------------------------------------------------------------
[14:30:01.624] <TB1> INFO: PixTestPretest::findWorkingPixel()
[14:30:01.624] <TB1> INFO: ----------------------------------------------------------------------
[14:30:01.763] <TB1> INFO: Expecting 231680 events.
[14:30:10.345] <TB1> INFO: 231680 events read in total (7865ms).
[14:30:10.350] <TB1> INFO: Test took 8722ms.
[14:30:10.668] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:30:10.717] <TB1> INFO: ----------------------------------------------------------------------
[14:30:10.717] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[14:30:10.717] <TB1> INFO: ----------------------------------------------------------------------
[14:30:10.857] <TB1> INFO: Expecting 231680 events.
[14:30:20.055] <TB1> INFO: 231680 events read in total (8481ms).
[14:30:20.059] <TB1> INFO: Test took 9335ms.
[14:30:20.387] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[14:30:20.387] <TB1> INFO: CalDel: 139 138 125 141 114 133 136 128 141 122 124 135 115 125 130 109
[14:30:20.387] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:30:20.390] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C0.dat
[14:30:20.390] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C1.dat
[14:30:20.390] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C2.dat
[14:30:20.390] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C3.dat
[14:30:20.390] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C4.dat
[14:30:20.391] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C5.dat
[14:30:20.391] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C6.dat
[14:30:20.391] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C7.dat
[14:30:20.391] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C8.dat
[14:30:20.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C9.dat
[14:30:20.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C10.dat
[14:30:20.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C11.dat
[14:30:20.393] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C12.dat
[14:30:20.393] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C13.dat
[14:30:20.393] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C14.dat
[14:30:20.393] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters_C15.dat
[14:30:20.394] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//tbmParameters_C0a.dat
[14:30:20.394] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:30:20.394] <TB1> INFO: PixTestPretest::doTest() done, duration: 212 seconds
[14:30:20.478] <TB1> INFO: enter test to run
[14:30:20.478] <TB1> INFO: test: fulltest no parameter change
[14:30:20.478] <TB1> INFO: running: fulltest
[14:30:20.478] <TB1> INFO: ######################################################################
[14:30:20.478] <TB1> INFO: PixTestFullTest::doTest()
[14:30:20.478] <TB1> INFO: ######################################################################
[14:30:20.480] <TB1> INFO: ######################################################################
[14:30:20.480] <TB1> INFO: PixTestAlive::doTest()
[14:30:20.480] <TB1> INFO: ######################################################################
[14:30:20.482] <TB1> INFO: ----------------------------------------------------------------------
[14:30:20.482] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:30:20.482] <TB1> INFO: ----------------------------------------------------------------------
[14:30:20.790] <TB1> INFO: Expecting 41600 events.
[14:30:25.691] <TB1> INFO: 41600 events read in total (4184ms).
[14:30:25.692] <TB1> INFO: Test took 5208ms.
[14:30:25.698] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:26.000] <TB1> INFO: PixTestAlive::aliveTest() done
[14:30:26.000] <TB1> INFO: number of dead pixels (per ROC): 1 1 0 0 0 0 0 0 0 0 0 0 5 0 0 0
[14:30:26.003] <TB1> INFO: ----------------------------------------------------------------------
[14:30:26.003] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:30:26.003] <TB1> INFO: ----------------------------------------------------------------------
[14:30:26.318] <TB1> INFO: Expecting 41600 events.
[14:30:29.816] <TB1> INFO: 41600 events read in total (2781ms).
[14:30:29.817] <TB1> INFO: Test took 3811ms.
[14:30:29.817] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:29.818] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:30:30.145] <TB1> INFO: PixTestAlive::maskTest() done
[14:30:30.145] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:30:30.148] <TB1> INFO: ----------------------------------------------------------------------
[14:30:30.148] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:30:30.148] <TB1> INFO: ----------------------------------------------------------------------
[14:30:30.486] <TB1> INFO: Expecting 41600 events.
[14:30:35.637] <TB1> INFO: 41600 events read in total (4434ms).
[14:30:35.637] <TB1> INFO: Test took 5487ms.
[14:30:35.644] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:35.945] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[14:30:35.945] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:30:35.945] <TB1> INFO: PixTestAlive::doTest() done, duration: 15 seconds
[14:30:35.945] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:35.945] <TB1> INFO: Decoding statistics:
[14:30:35.945] <TB1> INFO: General information:
[14:30:35.946] <TB1> INFO: 16bit words read: 0
[14:30:35.946] <TB1> INFO: valid events total: 0
[14:30:35.946] <TB1> INFO: empty events: 0
[14:30:35.946] <TB1> INFO: valid events with pixels: 0
[14:30:35.946] <TB1> INFO: valid pixel hits: 0
[14:30:35.946] <TB1> INFO: Event errors: 0
[14:30:35.946] <TB1> INFO: start marker: 0
[14:30:35.946] <TB1> INFO: stop marker: 0
[14:30:35.946] <TB1> INFO: overflow: 0
[14:30:35.946] <TB1> INFO: invalid 5bit words: 0
[14:30:35.946] <TB1> INFO: invalid XOR eye diagram: 0
[14:30:35.946] <TB1> INFO: TBM errors: 0
[14:30:35.946] <TB1> INFO: flawed TBM headers: 0
[14:30:35.946] <TB1> INFO: flawed TBM trailers: 0
[14:30:35.946] <TB1> INFO: event ID mismatches: 0
[14:30:35.946] <TB1> INFO: ROC errors: 0
[14:30:35.946] <TB1> INFO: missing ROC header(s): 0
[14:30:35.946] <TB1> INFO: misplaced readback start: 0
[14:30:35.946] <TB1> INFO: Pixel decoding errors: 0
[14:30:35.946] <TB1> INFO: pixel data incomplete: 0
[14:30:35.946] <TB1> INFO: pixel address: 0
[14:30:35.946] <TB1> INFO: pulse height fill bit: 0
[14:30:35.946] <TB1> INFO: buffer corruption: 0
[14:30:35.960] <TB1> INFO: ######################################################################
[14:30:35.960] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:30:35.960] <TB1> INFO: ######################################################################
[14:30:35.964] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[14:30:35.980] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[14:30:35.980] <TB1> INFO: run 1 of 1
[14:30:36.323] <TB1> INFO: Expecting 3120000 events.
[14:31:18.002] <TB1> INFO: 863550 events read in total (40962ms).
[14:31:58.538] <TB1> INFO: 1714310 events read in total (81498ms).
[14:32:39.933] <TB1> INFO: 2574640 events read in total (122893ms).
[14:33:07.305] <TB1> INFO: 3120000 events read in total (150266ms).
[14:33:07.353] <TB1> INFO: Test took 151373ms.
[14:33:07.454] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:33.296] <TB1> INFO: PixTestBBMap::doTest() done, duration: 177 seconds
[14:33:33.296] <TB1> INFO: number of dead bumps (per ROC): 0 1 0 0 1 2 0 0 0 0 0 0 1 0 0 0
[14:33:33.296] <TB1> INFO: separation cut (per ROC): 79 98 84 91 99 100 83 77 79 69 93 95 84 89 94 90
[14:33:33.296] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:33.296] <TB1> INFO: Decoding statistics:
[14:33:33.296] <TB1> INFO: General information:
[14:33:33.296] <TB1> INFO: 16bit words read: 0
[14:33:33.296] <TB1> INFO: valid events total: 0
[14:33:33.296] <TB1> INFO: empty events: 0
[14:33:33.296] <TB1> INFO: valid events with pixels: 0
[14:33:33.296] <TB1> INFO: valid pixel hits: 0
[14:33:33.296] <TB1> INFO: Event errors: 0
[14:33:33.296] <TB1> INFO: start marker: 0
[14:33:33.296] <TB1> INFO: stop marker: 0
[14:33:33.296] <TB1> INFO: overflow: 0
[14:33:33.296] <TB1> INFO: invalid 5bit words: 0
[14:33:33.296] <TB1> INFO: invalid XOR eye diagram: 0
[14:33:33.296] <TB1> INFO: TBM errors: 0
[14:33:33.296] <TB1> INFO: flawed TBM headers: 0
[14:33:33.296] <TB1> INFO: flawed TBM trailers: 0
[14:33:33.296] <TB1> INFO: event ID mismatches: 0
[14:33:33.296] <TB1> INFO: ROC errors: 0
[14:33:33.296] <TB1> INFO: missing ROC header(s): 0
[14:33:33.296] <TB1> INFO: misplaced readback start: 0
[14:33:33.296] <TB1> INFO: Pixel decoding errors: 0
[14:33:33.296] <TB1> INFO: pixel data incomplete: 0
[14:33:33.296] <TB1> INFO: pixel address: 0
[14:33:33.296] <TB1> INFO: pulse height fill bit: 0
[14:33:33.296] <TB1> INFO: buffer corruption: 0
[14:33:33.388] <TB1> INFO: ######################################################################
[14:33:33.388] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:33:33.388] <TB1> INFO: ######################################################################
[14:33:33.388] <TB1> INFO: ----------------------------------------------------------------------
[14:33:33.388] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:33:33.388] <TB1> INFO: ----------------------------------------------------------------------
[14:33:33.388] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:33:33.397] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[14:33:33.397] <TB1> INFO: run 1 of 1
[14:33:33.739] <TB1> INFO: Expecting 26208000 events.
[14:34:07.227] <TB1> INFO: 925800 events read in total (32771ms).
[14:34:39.906] <TB1> INFO: 1838600 events read in total (65450ms).
[14:35:12.223] <TB1> INFO: 2749300 events read in total (97767ms).
[14:35:45.094] <TB1> INFO: 3661950 events read in total (130638ms).
[14:36:16.851] <TB1> INFO: 4570850 events read in total (162395ms).
[14:36:48.762] <TB1> INFO: 5475050 events read in total (194306ms).
[14:37:20.955] <TB1> INFO: 6381800 events read in total (226499ms).
[14:37:53.796] <TB1> INFO: 7286400 events read in total (259340ms).
[14:38:26.565] <TB1> INFO: 8189200 events read in total (292109ms).
[14:38:59.591] <TB1> INFO: 9093800 events read in total (325135ms).
[14:39:31.372] <TB1> INFO: 9991900 events read in total (356916ms).
[14:40:02.832] <TB1> INFO: 10893000 events read in total (388376ms).
[14:40:35.064] <TB1> INFO: 11793200 events read in total (420608ms).
[14:41:07.097] <TB1> INFO: 12692750 events read in total (452641ms).
[14:41:38.857] <TB1> INFO: 13581650 events read in total (484401ms).
[14:42:11.226] <TB1> INFO: 14468450 events read in total (516770ms).
[14:42:43.148] <TB1> INFO: 15353600 events read in total (548692ms).
[14:43:15.410] <TB1> INFO: 16240000 events read in total (580954ms).
[14:43:47.630] <TB1> INFO: 17123500 events read in total (613174ms).
[14:44:20.092] <TB1> INFO: 18006100 events read in total (645636ms).
[14:44:51.666] <TB1> INFO: 18890700 events read in total (677210ms).
[14:45:23.286] <TB1> INFO: 19773100 events read in total (708830ms).
[14:45:55.227] <TB1> INFO: 20655750 events read in total (740771ms).
[14:46:27.815] <TB1> INFO: 21537250 events read in total (773359ms).
[14:47:00.689] <TB1> INFO: 22418200 events read in total (806233ms).
[14:47:33.385] <TB1> INFO: 23303000 events read in total (838929ms).
[14:48:05.874] <TB1> INFO: 24188550 events read in total (871418ms).
[14:48:36.412] <TB1> INFO: 25073550 events read in total (901956ms).
[14:49:07.391] <TB1> INFO: 25970450 events read in total (932935ms).
[14:49:15.687] <TB1> INFO: 26208000 events read in total (941231ms).
[14:49:15.717] <TB1> INFO: Test took 942320ms.
[14:49:15.801] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:15.951] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:17.363] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:18.699] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:20.127] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:21.530] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:22.900] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:24.232] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:25.702] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:27.106] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:28.623] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:30.135] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:31.487] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:32.840] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:34.228] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:35.580] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:36.958] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:49:38.444] <TB1> INFO: PixTestScurves::scurves() done
[14:49:38.444] <TB1> INFO: Vcal mean: 88.45 103.82 87.69 86.24 91.08 103.02 88.04 83.94 85.95 88.79 105.78 95.41 93.06 97.75 92.83 93.74
[14:49:38.444] <TB1> INFO: Vcal RMS: 5.39 6.26 5.35 5.51 5.47 5.20 5.60 4.93 6.49 5.74 5.35 6.44 7.23 5.60 5.39 4.75
[14:49:38.444] <TB1> INFO: PixTestScurves::fullTest() done, duration: 965 seconds
[14:49:38.444] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:38.444] <TB1> INFO: Decoding statistics:
[14:49:38.444] <TB1> INFO: General information:
[14:49:38.444] <TB1> INFO: 16bit words read: 0
[14:49:38.444] <TB1> INFO: valid events total: 0
[14:49:38.444] <TB1> INFO: empty events: 0
[14:49:38.444] <TB1> INFO: valid events with pixels: 0
[14:49:38.444] <TB1> INFO: valid pixel hits: 0
[14:49:38.444] <TB1> INFO: Event errors: 0
[14:49:38.444] <TB1> INFO: start marker: 0
[14:49:38.444] <TB1> INFO: stop marker: 0
[14:49:38.444] <TB1> INFO: overflow: 0
[14:49:38.444] <TB1> INFO: invalid 5bit words: 0
[14:49:38.444] <TB1> INFO: invalid XOR eye diagram: 0
[14:49:38.444] <TB1> INFO: TBM errors: 0
[14:49:38.445] <TB1> INFO: flawed TBM headers: 0
[14:49:38.445] <TB1> INFO: flawed TBM trailers: 0
[14:49:38.445] <TB1> INFO: event ID mismatches: 0
[14:49:38.445] <TB1> INFO: ROC errors: 0
[14:49:38.445] <TB1> INFO: missing ROC header(s): 0
[14:49:38.445] <TB1> INFO: misplaced readback start: 0
[14:49:38.445] <TB1> INFO: Pixel decoding errors: 0
[14:49:38.445] <TB1> INFO: pixel data incomplete: 0
[14:49:38.445] <TB1> INFO: pixel address: 0
[14:49:38.445] <TB1> INFO: pulse height fill bit: 0
[14:49:38.445] <TB1> INFO: buffer corruption: 0
[14:49:38.529] <TB1> INFO: ######################################################################
[14:49:38.529] <TB1> INFO: PixTestTrim::doTest()
[14:49:38.529] <TB1> INFO: ######################################################################
[14:49:38.530] <TB1> INFO: ----------------------------------------------------------------------
[14:49:38.530] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[14:49:38.530] <TB1> INFO: ----------------------------------------------------------------------
[14:49:38.623] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:49:38.623] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:49:38.633] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[14:49:38.633] <TB1> INFO: run 1 of 1
[14:49:38.955] <TB1> INFO: Expecting 5025280 events.
[14:50:21.466] <TB1> INFO: 1089320 events read in total (41790ms).
[14:51:02.765] <TB1> INFO: 2168120 events read in total (83089ms).
[14:51:44.418] <TB1> INFO: 3243120 events read in total (124742ms).
[14:52:25.860] <TB1> INFO: 4320776 events read in total (166184ms).
[14:52:52.869] <TB1> INFO: 5025280 events read in total (193193ms).
[14:52:52.893] <TB1> INFO: Test took 194260ms.
[14:52:52.955] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:13.922] <TB1> INFO: ROC 0 VthrComp = 90
[14:53:13.923] <TB1> INFO: ROC 1 VthrComp = 103
[14:53:13.924] <TB1> INFO: ROC 2 VthrComp = 92
[14:53:13.924] <TB1> INFO: ROC 3 VthrComp = 92
[14:53:13.924] <TB1> INFO: ROC 4 VthrComp = 95
[14:53:13.925] <TB1> INFO: ROC 5 VthrComp = 104
[14:53:13.925] <TB1> INFO: ROC 6 VthrComp = 87
[14:53:13.926] <TB1> INFO: ROC 7 VthrComp = 82
[14:53:13.926] <TB1> INFO: ROC 8 VthrComp = 79
[14:53:13.926] <TB1> INFO: ROC 9 VthrComp = 84
[14:53:13.926] <TB1> INFO: ROC 10 VthrComp = 104
[14:53:13.927] <TB1> INFO: ROC 11 VthrComp = 99
[14:53:13.927] <TB1> INFO: ROC 12 VthrComp = 89
[14:53:13.927] <TB1> INFO: ROC 13 VthrComp = 97
[14:53:13.927] <TB1> INFO: ROC 14 VthrComp = 96
[14:53:13.927] <TB1> INFO: ROC 15 VthrComp = 102
[14:53:13.927] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:53:13.927] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:53:13.937] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[14:53:13.937] <TB1> INFO: run 1 of 1
[14:53:14.241] <TB1> INFO: Expecting 5025280 events.
[14:53:48.584] <TB1> INFO: 757240 events read in total (33626ms).
[14:54:24.263] <TB1> INFO: 1512968 events read in total (69305ms).
[14:54:59.666] <TB1> INFO: 2268440 events read in total (104708ms).
[14:55:34.617] <TB1> INFO: 3019160 events read in total (139659ms).
[14:56:09.595] <TB1> INFO: 3764808 events read in total (174637ms).
[14:56:45.745] <TB1> INFO: 4508952 events read in total (210787ms).
[14:57:10.410] <TB1> INFO: 5025280 events read in total (235452ms).
[14:57:10.458] <TB1> INFO: Test took 236521ms.
[14:57:10.596] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:34.278] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 57.6829 for pixel 51/2 mean/min/max = 45.6816/33.6309/57.7322
[14:57:34.279] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 61.6881 for pixel 2/1 mean/min/max = 47.2686/32.7402/61.797
[14:57:34.279] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.8912 for pixel 19/78 mean/min/max = 45.3423/32.7903/57.8943
[14:57:34.279] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 58.4388 for pixel 3/17 mean/min/max = 45.8537/33.1371/58.5702
[14:57:34.279] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 57.0133 for pixel 1/54 mean/min/max = 44.9781/32.9287/57.0274
[14:57:34.280] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.1114 for pixel 25/79 mean/min/max = 46.1027/34.0772/58.1282
[14:57:34.280] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 59.4145 for pixel 24/1 mean/min/max = 45.2441/30.9398/59.5485
[14:57:34.280] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 57.8477 for pixel 0/7 mean/min/max = 44.5707/31.2606/57.8807
[14:57:34.280] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 66.6874 for pixel 2/78 mean/min/max = 49.5671/32.3588/66.7753
[14:57:34.280] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 61.8509 for pixel 11/0 mean/min/max = 46.3821/30.8227/61.9416
[14:57:34.281] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 61.383 for pixel 51/64 mean/min/max = 47.9277/34.3695/61.4859
[14:57:34.281] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.4683 for pixel 3/65 mean/min/max = 45.0892/31.5404/58.6379
[14:57:34.281] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 62.9613 for pixel 0/1 mean/min/max = 47.8064/32.4492/63.1636
[14:57:34.281] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 58.4659 for pixel 0/58 mean/min/max = 45.1542/31.8121/58.4964
[14:57:34.282] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 57.0871 for pixel 51/2 mean/min/max = 44.8639/32.3901/57.3377
[14:57:34.282] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 54.8443 for pixel 41/79 mean/min/max = 43.5129/32.0061/55.0196
[14:57:34.282] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:57:34.415] <TB1> INFO: Expecting 411648 events.
[14:57:44.246] <TB1> INFO: 411648 events read in total (9115ms).
[14:57:44.251] <TB1> INFO: Expecting 411648 events.
[14:57:54.223] <TB1> INFO: 411648 events read in total (9382ms).
[14:57:54.232] <TB1> INFO: Expecting 411648 events.
[14:58:03.979] <TB1> INFO: 411648 events read in total (9180ms).
[14:58:03.988] <TB1> INFO: Expecting 411648 events.
[14:58:14.455] <TB1> INFO: 411648 events read in total (9883ms).
[14:58:14.466] <TB1> INFO: Expecting 411648 events.
[14:58:25.048] <TB1> INFO: 411648 events read in total (10007ms).
[14:58:25.063] <TB1> INFO: Expecting 411648 events.
[14:58:35.600] <TB1> INFO: 411648 events read in total (9968ms).
[14:58:35.614] <TB1> INFO: Expecting 411648 events.
[14:58:46.158] <TB1> INFO: 411648 events read in total (9967ms).
[14:58:46.179] <TB1> INFO: Expecting 411648 events.
[14:58:56.667] <TB1> INFO: 411648 events read in total (9930ms).
[14:58:56.684] <TB1> INFO: Expecting 411648 events.
[14:59:07.250] <TB1> INFO: 411648 events read in total (9987ms).
[14:59:07.268] <TB1> INFO: Expecting 411648 events.
[14:59:17.796] <TB1> INFO: 411648 events read in total (9951ms).
[14:59:17.823] <TB1> INFO: Expecting 411648 events.
[14:59:28.326] <TB1> INFO: 411648 events read in total (9946ms).
[14:59:28.350] <TB1> INFO: Expecting 411648 events.
[14:59:38.942] <TB1> INFO: 411648 events read in total (10031ms).
[14:59:38.969] <TB1> INFO: Expecting 411648 events.
[14:59:49.597] <TB1> INFO: 411648 events read in total (10069ms).
[14:59:49.624] <TB1> INFO: Expecting 411648 events.
[15:00:00.176] <TB1> INFO: 411648 events read in total (9994ms).
[15:00:00.204] <TB1> INFO: Expecting 411648 events.
[15:00:10.750] <TB1> INFO: 411648 events read in total (9986ms).
[15:00:10.781] <TB1> INFO: Expecting 411648 events.
[15:00:21.306] <TB1> INFO: 411648 events read in total (9974ms).
[15:00:21.339] <TB1> INFO: Test took 167057ms.
[15:00:22.327] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[15:00:22.336] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:00:22.336] <TB1> INFO: run 1 of 1
[15:00:22.654] <TB1> INFO: Expecting 5025280 events.
[15:00:59.359] <TB1> INFO: 743144 events read in total (35988ms).
[15:01:31.903] <TB1> INFO: 1484520 events read in total (68532ms).
[15:02:05.401] <TB1> INFO: 2226056 events read in total (102030ms).
[15:02:38.313] <TB1> INFO: 2962328 events read in total (134942ms).
[15:03:13.615] <TB1> INFO: 3692792 events read in total (170245ms).
[15:03:48.589] <TB1> INFO: 4419912 events read in total (205218ms).
[15:04:17.371] <TB1> INFO: 5025280 events read in total (234000ms).
[15:04:17.421] <TB1> INFO: Test took 235085ms.
[15:04:17.567] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:43.163] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.059944 .. 255.000000
[15:04:43.241] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[15:04:43.251] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:04:43.251] <TB1> INFO: run 1 of 1
[15:04:43.573] <TB1> INFO: Expecting 8519680 events.
[15:05:16.038] <TB1> INFO: 712424 events read in total (31748ms).
[15:05:48.900] <TB1> INFO: 1425000 events read in total (64610ms).
[15:06:23.357] <TB1> INFO: 2138032 events read in total (99067ms).
[15:06:57.588] <TB1> INFO: 2851056 events read in total (133298ms).
[15:07:32.130] <TB1> INFO: 3564280 events read in total (167840ms).
[15:08:06.530] <TB1> INFO: 4277280 events read in total (202240ms).
[15:08:40.738] <TB1> INFO: 4989760 events read in total (236448ms).
[15:09:15.187] <TB1> INFO: 5701408 events read in total (270897ms).
[15:09:49.232] <TB1> INFO: 6412528 events read in total (304942ms).
[15:10:23.909] <TB1> INFO: 7122824 events read in total (339619ms).
[15:10:58.387] <TB1> INFO: 7833352 events read in total (374097ms).
[15:11:31.339] <TB1> INFO: 8519680 events read in total (407049ms).
[15:11:31.439] <TB1> INFO: Test took 408188ms.
[15:11:31.739] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:59.812] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 1.688262 .. 120.743564
[15:11:59.888] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 1 .. 130 (-1/-1) hits flags = 528 (plus default)
[15:11:59.897] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:11:59.897] <TB1> INFO: run 1 of 1
[15:12:00.203] <TB1> INFO: Expecting 4326400 events.
[15:12:36.428] <TB1> INFO: 763168 events read in total (35508ms).
[15:13:09.015] <TB1> INFO: 1526432 events read in total (68095ms).
[15:13:44.307] <TB1> INFO: 2289808 events read in total (103387ms).
[15:14:19.294] <TB1> INFO: 3052688 events read in total (138374ms).
[15:14:55.152] <TB1> INFO: 3814896 events read in total (174232ms).
[15:15:17.114] <TB1> INFO: 4326400 events read in total (196194ms).
[15:15:17.152] <TB1> INFO: Test took 197255ms.
[15:15:17.267] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:40.041] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 1.172513 .. 92.784348
[15:15:40.117] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 1 .. 102 (-1/-1) hits flags = 528 (plus default)
[15:15:40.126] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:15:40.126] <TB1> INFO: run 1 of 1
[15:15:40.431] <TB1> INFO: Expecting 3394560 events.
[15:16:16.302] <TB1> INFO: 796864 events read in total (35154ms).
[15:16:52.379] <TB1> INFO: 1593608 events read in total (71231ms).
[15:17:26.156] <TB1> INFO: 2390312 events read in total (105008ms).
[15:18:02.248] <TB1> INFO: 3186168 events read in total (141100ms).
[15:18:12.235] <TB1> INFO: 3394560 events read in total (151087ms).
[15:18:12.264] <TB1> INFO: Test took 152138ms.
[15:18:12.385] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:32.551] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 1.183208 .. 60.526242
[15:18:32.640] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 1 .. 70 (-1/-1) hits flags = 528 (plus default)
[15:18:32.650] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:18:32.650] <TB1> INFO: run 1 of 1
[15:18:32.990] <TB1> INFO: Expecting 2329600 events.
[15:19:13.152] <TB1> INFO: 876792 events read in total (39445ms).
[15:19:51.996] <TB1> INFO: 1753416 events read in total (78289ms).
[15:20:16.530] <TB1> INFO: 2329600 events read in total (102823ms).
[15:20:16.549] <TB1> INFO: Test took 103900ms.
[15:20:16.598] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:34.614] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:20:34.614] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[15:20:34.624] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[15:20:34.624] <TB1> INFO: run 1 of 1
[15:20:34.965] <TB1> INFO: Expecting 1364480 events.
[15:21:13.975] <TB1> INFO: 878680 events read in total (38293ms).
[15:21:34.884] <TB1> INFO: 1364480 events read in total (59202ms).
[15:21:34.906] <TB1> INFO: Test took 60282ms.
[15:21:34.939] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:48.317] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:21:48.317] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:21:48.318] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:21:48.318] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:21:48.318] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:21:48.318] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:21:48.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:21:48.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:21:48.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:21:48.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:21:48.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:21:48.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:21:48.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:21:48.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:21:48.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:21:48.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:21:48.321] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C0.dat
[15:21:48.329] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C1.dat
[15:21:48.335] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C2.dat
[15:21:48.341] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C3.dat
[15:21:48.347] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C4.dat
[15:21:48.353] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C5.dat
[15:21:48.359] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C6.dat
[15:21:48.365] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C7.dat
[15:21:48.371] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C8.dat
[15:21:48.377] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C9.dat
[15:21:48.383] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C10.dat
[15:21:48.389] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C11.dat
[15:21:48.395] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C12.dat
[15:21:48.400] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C13.dat
[15:21:48.406] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C14.dat
[15:21:48.412] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//trimParameters35_C15.dat
[15:21:48.418] <TB1> INFO: PixTestTrim::trimTest() done
[15:21:48.418] <TB1> INFO: vtrim: 92 115 96 106 98 95 99 80 104 94 95 107 113 103 98 95
[15:21:48.418] <TB1> INFO: vthrcomp: 90 103 92 92 95 104 87 82 79 84 104 99 89 97 96 102
[15:21:48.418] <TB1> INFO: vcal mean: 35.00 34.97 35.08 34.96 35.00 34.99 35.01 34.99 34.97 34.96 34.97 34.92 34.92 34.94 35.00 34.96
[15:21:48.418] <TB1> INFO: vcal RMS: 1.03 0.98 0.92 0.86 0.91 0.90 0.97 0.96 1.41 1.55 0.91 0.90 1.62 0.98 0.88 0.88
[15:21:48.418] <TB1> INFO: bits mean: 9.02 9.39 9.34 9.29 9.49 8.73 9.97 9.76 9.02 9.69 8.39 9.85 9.45 9.87 9.24 10.03
[15:21:48.418] <TB1> INFO: bits RMS: 2.73 2.58 2.73 2.64 2.61 2.70 2.65 2.70 2.57 2.69 2.64 2.64 2.51 2.57 2.85 2.62
[15:21:48.427] <TB1> INFO: ----------------------------------------------------------------------
[15:21:48.427] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[15:21:48.427] <TB1> INFO: ----------------------------------------------------------------------
[15:21:48.432] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[15:21:48.443] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[15:21:48.443] <TB1> INFO: run 1 of 1
[15:21:48.745] <TB1> INFO: Expecting 4160000 events.
[15:22:30.501] <TB1> INFO: 952365 events read in total (41039ms).
[15:23:14.668] <TB1> INFO: 1894620 events read in total (85206ms).
[15:23:57.767] <TB1> INFO: 2826870 events read in total (128305ms).
[15:24:37.862] <TB1> INFO: 3756980 events read in total (168400ms).
[15:24:57.988] <TB1> INFO: 4160000 events read in total (188526ms).
[15:24:58.026] <TB1> INFO: Test took 189583ms.
[15:24:58.124] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:25.729] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 171 (-1/-1) hits flags = 528 (plus default)
[15:25:25.738] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[15:25:25.738] <TB1> INFO: run 1 of 1
[15:25:26.043] <TB1> INFO: Expecting 3577600 events.
[15:26:07.729] <TB1> INFO: 980145 events read in total (40969ms).
[15:26:51.522] <TB1> INFO: 1946950 events read in total (84762ms).
[15:27:33.961] <TB1> INFO: 2901575 events read in total (127201ms).
[15:28:05.802] <TB1> INFO: 3577600 events read in total (159042ms).
[15:28:05.837] <TB1> INFO: Test took 160099ms.
[15:28:05.915] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:32.523] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[15:28:32.533] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[15:28:32.533] <TB1> INFO: run 1 of 1
[15:28:32.838] <TB1> INFO: Expecting 3286400 events.
[15:29:17.441] <TB1> INFO: 1021895 events read in total (43886ms).
[15:30:03.100] <TB1> INFO: 2025130 events read in total (89546ms).
[15:30:45.743] <TB1> INFO: 3017495 events read in total (132188ms).
[15:30:58.147] <TB1> INFO: 3286400 events read in total (144592ms).
[15:30:58.177] <TB1> INFO: Test took 145644ms.
[15:30:58.240] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:22.163] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[15:31:22.173] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[15:31:22.173] <TB1> INFO: run 1 of 1
[15:31:22.498] <TB1> INFO: Expecting 3286400 events.
[15:32:06.708] <TB1> INFO: 1021395 events read in total (43493ms).
[15:32:48.669] <TB1> INFO: 2024335 events read in total (85454ms).
[15:33:31.803] <TB1> INFO: 3016105 events read in total (128588ms).
[15:33:43.399] <TB1> INFO: 3286400 events read in total (140184ms).
[15:33:43.427] <TB1> INFO: Test took 141254ms.
[15:33:43.489] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:08.886] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 156 (-1/-1) hits flags = 528 (plus default)
[15:34:08.895] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[15:34:08.895] <TB1> INFO: run 1 of 1
[15:34:09.199] <TB1> INFO: Expecting 3265600 events.
[15:34:57.659] <TB1> INFO: 1023770 events read in total (47743ms).
[15:35:43.683] <TB1> INFO: 2028575 events read in total (93767ms).
[15:36:26.686] <TB1> INFO: 3023245 events read in total (136770ms).
[15:36:37.380] <TB1> INFO: 3265600 events read in total (147464ms).
[15:36:37.407] <TB1> INFO: Test took 148512ms.
[15:36:37.467] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:00.873] <TB1> INFO: PixTestTrim::trimBitTest() done
[15:37:00.874] <TB1> INFO: PixTestTrim::doTest() done, duration: 2842 seconds
[15:37:00.874] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:00.874] <TB1> INFO: Decoding statistics:
[15:37:00.874] <TB1> INFO: General information:
[15:37:00.874] <TB1> INFO: 16bit words read: 0
[15:37:00.874] <TB1> INFO: valid events total: 0
[15:37:00.874] <TB1> INFO: empty events: 0
[15:37:00.874] <TB1> INFO: valid events with pixels: 0
[15:37:00.874] <TB1> INFO: valid pixel hits: 0
[15:37:00.874] <TB1> INFO: Event errors: 0
[15:37:00.874] <TB1> INFO: start marker: 0
[15:37:00.874] <TB1> INFO: stop marker: 0
[15:37:00.874] <TB1> INFO: overflow: 0
[15:37:00.874] <TB1> INFO: invalid 5bit words: 0
[15:37:00.874] <TB1> INFO: invalid XOR eye diagram: 0
[15:37:00.874] <TB1> INFO: TBM errors: 0
[15:37:00.874] <TB1> INFO: flawed TBM headers: 0
[15:37:00.874] <TB1> INFO: flawed TBM trailers: 0
[15:37:00.874] <TB1> INFO: event ID mismatches: 0
[15:37:00.874] <TB1> INFO: ROC errors: 0
[15:37:00.874] <TB1> INFO: missing ROC header(s): 0
[15:37:00.874] <TB1> INFO: misplaced readback start: 0
[15:37:00.874] <TB1> INFO: Pixel decoding errors: 0
[15:37:00.874] <TB1> INFO: pixel data incomplete: 0
[15:37:00.874] <TB1> INFO: pixel address: 0
[15:37:00.874] <TB1> INFO: pulse height fill bit: 0
[15:37:00.874] <TB1> INFO: buffer corruption: 0
[15:37:01.534] <TB1> INFO: ######################################################################
[15:37:01.534] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:37:01.534] <TB1> INFO: ######################################################################
[15:37:01.839] <TB1> INFO: Expecting 41600 events.
[15:37:06.885] <TB1> INFO: 41600 events read in total (4329ms).
[15:37:06.886] <TB1> INFO: Test took 5351ms.
[15:37:06.892] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:07.474] <TB1> INFO: Expecting 41600 events.
[15:37:12.459] <TB1> INFO: 41600 events read in total (4268ms).
[15:37:12.460] <TB1> INFO: Test took 5310ms.
[15:37:12.466] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:12.841] <TB1> INFO: Expecting 41600 events.
[15:37:17.865] <TB1> INFO: 41600 events read in total (4307ms).
[15:37:17.866] <TB1> INFO: Test took 5375ms.
[15:37:17.873] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:18.213] <TB1> INFO: Expecting 41600 events.
[15:37:23.109] <TB1> INFO: 41600 events read in total (4179ms).
[15:37:23.110] <TB1> INFO: Test took 5225ms.
[15:37:23.116] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:23.452] <TB1> INFO: Expecting 41600 events.
[15:37:28.426] <TB1> INFO: 41600 events read in total (4257ms).
[15:37:28.427] <TB1> INFO: Test took 5299ms.
[15:37:28.433] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:28.785] <TB1> INFO: Expecting 41600 events.
[15:37:33.749] <TB1> INFO: 41600 events read in total (4247ms).
[15:37:33.749] <TB1> INFO: Test took 5288ms.
[15:37:33.757] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:34.102] <TB1> INFO: Expecting 41600 events.
[15:37:39.034] <TB1> INFO: 41600 events read in total (4215ms).
[15:37:39.034] <TB1> INFO: Test took 5264ms.
[15:37:39.042] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:39.394] <TB1> INFO: Expecting 41600 events.
[15:37:44.300] <TB1> INFO: 41600 events read in total (4189ms).
[15:37:44.301] <TB1> INFO: Test took 5233ms.
[15:37:44.307] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:44.663] <TB1> INFO: Expecting 41600 events.
[15:37:49.788] <TB1> INFO: 41600 events read in total (4408ms).
[15:37:49.789] <TB1> INFO: Test took 5451ms.
[15:37:49.796] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:50.146] <TB1> INFO: Expecting 41600 events.
[15:37:55.202] <TB1> INFO: 41600 events read in total (4339ms).
[15:37:55.203] <TB1> INFO: Test took 5395ms.
[15:37:55.209] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:55.548] <TB1> INFO: Expecting 2560 events.
[15:37:56.623] <TB1> INFO: 2560 events read in total (357ms).
[15:37:56.624] <TB1> INFO: Test took 1407ms.
[15:37:57.039] <TB1> INFO: Expecting 2560 events.
[15:37:58.111] <TB1> INFO: 2560 events read in total (355ms).
[15:37:58.112] <TB1> INFO: Test took 1488ms.
[15:37:58.528] <TB1> INFO: Expecting 2560 events.
[15:37:59.598] <TB1> INFO: 2560 events read in total (353ms).
[15:37:59.598] <TB1> INFO: Test took 1486ms.
[15:38:00.014] <TB1> INFO: Expecting 2560 events.
[15:38:01.086] <TB1> INFO: 2560 events read in total (355ms).
[15:38:01.087] <TB1> INFO: Test took 1488ms.
[15:38:01.503] <TB1> INFO: Expecting 2560 events.
[15:38:02.574] <TB1> INFO: 2560 events read in total (354ms).
[15:38:02.574] <TB1> INFO: Test took 1486ms.
[15:38:02.991] <TB1> INFO: Expecting 2560 events.
[15:38:04.075] <TB1> INFO: 2560 events read in total (367ms).
[15:38:04.076] <TB1> INFO: Test took 1501ms.
[15:38:04.491] <TB1> INFO: Expecting 2560 events.
[15:38:05.561] <TB1> INFO: 2560 events read in total (353ms).
[15:38:05.561] <TB1> INFO: Test took 1479ms.
[15:38:05.977] <TB1> INFO: Expecting 2560 events.
[15:38:07.047] <TB1> INFO: 2560 events read in total (353ms).
[15:38:07.047] <TB1> INFO: Test took 1485ms.
[15:38:07.463] <TB1> INFO: Expecting 2560 events.
[15:38:08.533] <TB1> INFO: 2560 events read in total (353ms).
[15:38:08.533] <TB1> INFO: Test took 1485ms.
[15:38:08.949] <TB1> INFO: Expecting 2560 events.
[15:38:10.019] <TB1> INFO: 2560 events read in total (353ms).
[15:38:10.019] <TB1> INFO: Test took 1485ms.
[15:38:10.435] <TB1> INFO: Expecting 2560 events.
[15:38:11.505] <TB1> INFO: 2560 events read in total (353ms).
[15:38:11.505] <TB1> INFO: Test took 1485ms.
[15:38:11.920] <TB1> INFO: Expecting 2560 events.
[15:38:12.991] <TB1> INFO: 2560 events read in total (354ms).
[15:38:12.992] <TB1> INFO: Test took 1487ms.
[15:38:13.408] <TB1> INFO: Expecting 2560 events.
[15:38:14.480] <TB1> INFO: 2560 events read in total (355ms).
[15:38:14.495] <TB1> INFO: Test took 1503ms.
[15:38:14.896] <TB1> INFO: Expecting 2560 events.
[15:38:15.966] <TB1> INFO: 2560 events read in total (353ms).
[15:38:15.966] <TB1> INFO: Test took 1470ms.
[15:38:16.383] <TB1> INFO: Expecting 2560 events.
[15:38:17.453] <TB1> INFO: 2560 events read in total (353ms).
[15:38:17.453] <TB1> INFO: Test took 1486ms.
[15:38:17.869] <TB1> INFO: Expecting 2560 events.
[15:38:18.940] <TB1> INFO: 2560 events read in total (354ms).
[15:38:18.940] <TB1> INFO: Test took 1486ms.
[15:38:18.945] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:38:19.358] <TB1> INFO: Expecting 655360 events.
[15:38:36.012] <TB1> INFO: 655360 events read in total (15937ms).
[15:38:36.021] <TB1> INFO: Expecting 655360 events.
[15:38:52.407] <TB1> INFO: 655360 events read in total (15858ms).
[15:38:52.420] <TB1> INFO: Expecting 655360 events.
[15:39:08.856] <TB1> INFO: 655360 events read in total (15908ms).
[15:39:08.874] <TB1> INFO: Expecting 655360 events.
[15:39:25.399] <TB1> INFO: 655360 events read in total (15996ms).
[15:39:25.418] <TB1> INFO: Expecting 655360 events.
[15:39:41.976] <TB1> INFO: 655360 events read in total (16029ms).
[15:39:42.005] <TB1> INFO: Expecting 655360 events.
[15:39:58.545] <TB1> INFO: 655360 events read in total (16011ms).
[15:39:58.573] <TB1> INFO: Expecting 655360 events.
[15:40:15.077] <TB1> INFO: 655360 events read in total (15975ms).
[15:40:15.107] <TB1> INFO: Expecting 655360 events.
[15:40:31.677] <TB1> INFO: 655360 events read in total (16041ms).
[15:40:31.712] <TB1> INFO: Expecting 655360 events.
[15:40:48.219] <TB1> INFO: 655360 events read in total (15979ms).
[15:40:48.254] <TB1> INFO: Expecting 655360 events.
[15:41:04.667] <TB1> INFO: 655360 events read in total (15884ms).
[15:41:04.708] <TB1> INFO: Expecting 655360 events.
[15:41:21.247] <TB1> INFO: 655360 events read in total (16010ms).
[15:41:21.289] <TB1> INFO: Expecting 655360 events.
[15:41:37.737] <TB1> INFO: 655360 events read in total (15919ms).
[15:41:37.787] <TB1> INFO: Expecting 655360 events.
[15:41:54.379] <TB1> INFO: 655360 events read in total (16064ms).
[15:41:54.431] <TB1> INFO: Expecting 655360 events.
[15:42:10.986] <TB1> INFO: 655360 events read in total (16027ms).
[15:42:11.037] <TB1> INFO: Expecting 655360 events.
[15:42:27.547] <TB1> INFO: 655360 events read in total (15981ms).
[15:42:27.603] <TB1> INFO: Expecting 655360 events.
[15:42:44.169] <TB1> INFO: 655360 events read in total (16038ms).
[15:42:44.234] <TB1> INFO: Test took 265289ms.
[15:42:44.322] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:42:44.629] <TB1> INFO: Expecting 655360 events.
[15:43:01.367] <TB1> INFO: 655360 events read in total (16021ms).
[15:43:01.377] <TB1> INFO: Expecting 655360 events.
[15:43:17.631] <TB1> INFO: 655360 events read in total (15726ms).
[15:43:17.644] <TB1> INFO: Expecting 655360 events.
[15:43:34.023] <TB1> INFO: 655360 events read in total (15851ms).
[15:43:34.038] <TB1> INFO: Expecting 655360 events.
[15:43:50.401] <TB1> INFO: 655360 events read in total (15834ms).
[15:43:50.420] <TB1> INFO: Expecting 655360 events.
[15:44:07.076] <TB1> INFO: 655360 events read in total (16128ms).
[15:44:07.099] <TB1> INFO: Expecting 655360 events.
[15:44:23.649] <TB1> INFO: 655360 events read in total (16021ms).
[15:44:23.675] <TB1> INFO: Expecting 655360 events.
[15:44:40.079] <TB1> INFO: 655360 events read in total (15875ms).
[15:44:40.108] <TB1> INFO: Expecting 655360 events.
[15:44:56.499] <TB1> INFO: 655360 events read in total (15863ms).
[15:44:56.532] <TB1> INFO: Expecting 655360 events.
[15:45:12.803] <TB1> INFO: 655360 events read in total (15742ms).
[15:45:12.838] <TB1> INFO: Expecting 655360 events.
[15:45:29.302] <TB1> INFO: 655360 events read in total (15935ms).
[15:45:29.352] <TB1> INFO: Expecting 655360 events.
[15:45:45.822] <TB1> INFO: 655360 events read in total (15942ms).
[15:45:45.868] <TB1> INFO: Expecting 655360 events.
[15:46:02.416] <TB1> INFO: 655360 events read in total (16020ms).
[15:46:02.464] <TB1> INFO: Expecting 655360 events.
[15:46:18.829] <TB1> INFO: 655360 events read in total (15837ms).
[15:46:18.882] <TB1> INFO: Expecting 655360 events.
[15:46:35.338] <TB1> INFO: 655360 events read in total (15928ms).
[15:46:35.390] <TB1> INFO: Expecting 655360 events.
[15:46:51.768] <TB1> INFO: 655360 events read in total (15849ms).
[15:46:51.824] <TB1> INFO: Expecting 655360 events.
[15:47:08.216] <TB1> INFO: 655360 events read in total (15864ms).
[15:47:08.284] <TB1> INFO: Test took 263962ms.
[15:47:08.484] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.491] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.498] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.505] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.512] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.519] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.526] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.533] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.540] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.547] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.554] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.561] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.568] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.575] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.582] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.589] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:47:08.646] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:47:08.646] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:47:08.646] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:47:08.646] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:47:08.646] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:47:08.647] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:47:08.647] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:47:08.647] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:47:08.647] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:47:08.648] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:47:08.648] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:47:08.648] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:47:08.648] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:47:08.649] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:47:08.649] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:47:08.649] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:47:08.992] <TB1> INFO: Expecting 41600 events.
[15:47:13.478] <TB1> INFO: 41600 events read in total (3769ms).
[15:47:13.478] <TB1> INFO: Test took 4825ms.
[15:47:14.049] <TB1> INFO: Expecting 41600 events.
[15:47:18.520] <TB1> INFO: 41600 events read in total (3754ms).
[15:47:18.520] <TB1> INFO: Test took 4795ms.
[15:47:19.063] <TB1> INFO: Expecting 41600 events.
[15:47:23.512] <TB1> INFO: 41600 events read in total (3732ms).
[15:47:23.513] <TB1> INFO: Test took 4765ms.
[15:47:23.757] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:23.890] <TB1> INFO: Expecting 2560 events.
[15:47:24.962] <TB1> INFO: 2560 events read in total (355ms).
[15:47:24.962] <TB1> INFO: Test took 1205ms.
[15:47:24.965] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:25.379] <TB1> INFO: Expecting 2560 events.
[15:47:26.452] <TB1> INFO: 2560 events read in total (356ms).
[15:47:26.452] <TB1> INFO: Test took 1487ms.
[15:47:26.455] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:26.869] <TB1> INFO: Expecting 2560 events.
[15:47:27.940] <TB1> INFO: 2560 events read in total (354ms).
[15:47:27.940] <TB1> INFO: Test took 1485ms.
[15:47:27.944] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:28.357] <TB1> INFO: Expecting 2560 events.
[15:47:29.428] <TB1> INFO: 2560 events read in total (354ms).
[15:47:29.428] <TB1> INFO: Test took 1484ms.
[15:47:29.432] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:29.845] <TB1> INFO: Expecting 2560 events.
[15:47:30.919] <TB1> INFO: 2560 events read in total (357ms).
[15:47:30.919] <TB1> INFO: Test took 1487ms.
[15:47:30.923] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:31.336] <TB1> INFO: Expecting 2560 events.
[15:47:32.403] <TB1> INFO: 2560 events read in total (350ms).
[15:47:32.404] <TB1> INFO: Test took 1481ms.
[15:47:32.407] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:32.820] <TB1> INFO: Expecting 2560 events.
[15:47:33.892] <TB1> INFO: 2560 events read in total (354ms).
[15:47:33.892] <TB1> INFO: Test took 1485ms.
[15:47:33.895] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:34.309] <TB1> INFO: Expecting 2560 events.
[15:47:35.383] <TB1> INFO: 2560 events read in total (357ms).
[15:47:35.383] <TB1> INFO: Test took 1488ms.
[15:47:35.388] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:35.800] <TB1> INFO: Expecting 2560 events.
[15:47:36.870] <TB1> INFO: 2560 events read in total (354ms).
[15:47:36.870] <TB1> INFO: Test took 1483ms.
[15:47:36.875] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:37.287] <TB1> INFO: Expecting 2560 events.
[15:47:38.357] <TB1> INFO: 2560 events read in total (353ms).
[15:47:38.358] <TB1> INFO: Test took 1483ms.
[15:47:38.362] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:38.775] <TB1> INFO: Expecting 2560 events.
[15:47:39.846] <TB1> INFO: 2560 events read in total (354ms).
[15:47:39.847] <TB1> INFO: Test took 1486ms.
[15:47:39.850] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:40.263] <TB1> INFO: Expecting 2560 events.
[15:47:41.335] <TB1> INFO: 2560 events read in total (354ms).
[15:47:41.335] <TB1> INFO: Test took 1486ms.
[15:47:41.338] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:41.752] <TB1> INFO: Expecting 2560 events.
[15:47:42.827] <TB1> INFO: 2560 events read in total (358ms).
[15:47:42.827] <TB1> INFO: Test took 1489ms.
[15:47:42.838] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:43.244] <TB1> INFO: Expecting 2560 events.
[15:47:44.315] <TB1> INFO: 2560 events read in total (354ms).
[15:47:44.315] <TB1> INFO: Test took 1477ms.
[15:47:44.319] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:44.732] <TB1> INFO: Expecting 2560 events.
[15:47:45.803] <TB1> INFO: 2560 events read in total (354ms).
[15:47:45.803] <TB1> INFO: Test took 1485ms.
[15:47:45.807] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:46.220] <TB1> INFO: Expecting 2560 events.
[15:47:47.290] <TB1> INFO: 2560 events read in total (353ms).
[15:47:47.291] <TB1> INFO: Test took 1484ms.
[15:47:47.294] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:47.708] <TB1> INFO: Expecting 2560 events.
[15:47:48.778] <TB1> INFO: 2560 events read in total (353ms).
[15:47:48.778] <TB1> INFO: Test took 1484ms.
[15:47:48.782] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:49.196] <TB1> INFO: Expecting 2560 events.
[15:47:50.268] <TB1> INFO: 2560 events read in total (355ms).
[15:47:50.268] <TB1> INFO: Test took 1486ms.
[15:47:50.271] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:50.685] <TB1> INFO: Expecting 2560 events.
[15:47:51.757] <TB1> INFO: 2560 events read in total (355ms).
[15:47:51.757] <TB1> INFO: Test took 1486ms.
[15:47:51.761] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:52.174] <TB1> INFO: Expecting 2560 events.
[15:47:53.240] <TB1> INFO: 2560 events read in total (349ms).
[15:47:53.240] <TB1> INFO: Test took 1479ms.
[15:47:53.244] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:53.658] <TB1> INFO: Expecting 2560 events.
[15:47:54.729] <TB1> INFO: 2560 events read in total (354ms).
[15:47:54.729] <TB1> INFO: Test took 1485ms.
[15:47:54.733] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:55.146] <TB1> INFO: Expecting 2560 events.
[15:47:56.220] <TB1> INFO: 2560 events read in total (357ms).
[15:47:56.220] <TB1> INFO: Test took 1487ms.
[15:47:56.224] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:56.637] <TB1> INFO: Expecting 2560 events.
[15:47:57.711] <TB1> INFO: 2560 events read in total (357ms).
[15:47:57.712] <TB1> INFO: Test took 1489ms.
[15:47:57.716] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:58.128] <TB1> INFO: Expecting 2560 events.
[15:47:59.199] <TB1> INFO: 2560 events read in total (354ms).
[15:47:59.200] <TB1> INFO: Test took 1484ms.
[15:47:59.204] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:59.616] <TB1> INFO: Expecting 2560 events.
[15:48:00.687] <TB1> INFO: 2560 events read in total (354ms).
[15:48:00.687] <TB1> INFO: Test took 1483ms.
[15:48:00.690] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:48:01.104] <TB1> INFO: Expecting 2560 events.
[15:48:02.175] <TB1> INFO: 2560 events read in total (354ms).
[15:48:02.176] <TB1> INFO: Test took 1486ms.
[15:48:02.179] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:48:02.593] <TB1> INFO: Expecting 2560 events.
[15:48:03.666] <TB1> INFO: 2560 events read in total (356ms).
[15:48:03.667] <TB1> INFO: Test took 1488ms.
[15:48:03.670] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:48:04.084] <TB1> INFO: Expecting 2560 events.
[15:48:05.159] <TB1> INFO: 2560 events read in total (358ms).
[15:48:05.159] <TB1> INFO: Test took 1489ms.
[15:48:05.162] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:48:05.576] <TB1> INFO: Expecting 2560 events.
[15:48:06.649] <TB1> INFO: 2560 events read in total (356ms).
[15:48:06.650] <TB1> INFO: Test took 1488ms.
[15:48:06.653] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:48:07.066] <TB1> INFO: Expecting 2560 events.
[15:48:08.138] <TB1> INFO: 2560 events read in total (355ms).
[15:48:08.139] <TB1> INFO: Test took 1486ms.
[15:48:08.142] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:48:08.555] <TB1> INFO: Expecting 2560 events.
[15:48:09.629] <TB1> INFO: 2560 events read in total (357ms).
[15:48:09.630] <TB1> INFO: Test took 1488ms.
[15:48:09.633] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:48:10.047] <TB1> INFO: Expecting 2560 events.
[15:48:11.117] <TB1> INFO: 2560 events read in total (353ms).
[15:48:11.117] <TB1> INFO: Test took 1484ms.
[15:48:11.803] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 670 seconds
[15:48:11.804] <TB1> INFO: PH scale (per ROC): 70 80 76 73 74 68 70 81 76 74 66 75 75 79 73 80
[15:48:11.804] <TB1> INFO: PH offset (per ROC): 179 174 187 169 186 188 178 165 173 176 189 159 167 180 179 179
[15:48:11.812] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:48:11.812] <TB1> INFO: Decoding statistics:
[15:48:11.812] <TB1> INFO: General information:
[15:48:11.812] <TB1> INFO: 16bit words read: 91932
[15:48:11.812] <TB1> INFO: valid events total: 10240
[15:48:11.812] <TB1> INFO: empty events: 7737
[15:48:11.812] <TB1> INFO: valid events with pixels: 2503
[15:48:11.812] <TB1> INFO: valid pixel hits: 2503
[15:48:11.812] <TB1> INFO: Event errors: 0
[15:48:11.812] <TB1> INFO: start marker: 0
[15:48:11.812] <TB1> INFO: stop marker: 0
[15:48:11.812] <TB1> INFO: overflow: 0
[15:48:11.812] <TB1> INFO: invalid 5bit words: 0
[15:48:11.812] <TB1> INFO: invalid XOR eye diagram: 0
[15:48:11.812] <TB1> INFO: TBM errors: 0
[15:48:11.812] <TB1> INFO: flawed TBM headers: 0
[15:48:11.812] <TB1> INFO: flawed TBM trailers: 0
[15:48:11.812] <TB1> INFO: event ID mismatches: 0
[15:48:11.813] <TB1> INFO: ROC errors: 0
[15:48:11.813] <TB1> INFO: missing ROC header(s): 0
[15:48:11.813] <TB1> INFO: misplaced readback start: 0
[15:48:11.813] <TB1> INFO: Pixel decoding errors: 0
[15:48:11.813] <TB1> INFO: pixel data incomplete: 0
[15:48:11.813] <TB1> INFO: pixel address: 0
[15:48:11.813] <TB1> INFO: pulse height fill bit: 0
[15:48:11.813] <TB1> INFO: buffer corruption: 0
[15:48:12.017] <TB1> INFO: ######################################################################
[15:48:12.017] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:48:12.017] <TB1> INFO: ######################################################################
[15:48:12.029] <TB1> INFO: scanning low vcal = 10
[15:48:12.361] <TB1> INFO: Expecting 41600 events.
[15:48:15.981] <TB1> INFO: 41600 events read in total (2903ms).
[15:48:15.981] <TB1> INFO: Test took 3952ms.
[15:48:15.984] <TB1> INFO: scanning low vcal = 20
[15:48:16.397] <TB1> INFO: Expecting 41600 events.
[15:48:19.986] <TB1> INFO: 41600 events read in total (2872ms).
[15:48:19.987] <TB1> INFO: Test took 4003ms.
[15:48:19.989] <TB1> INFO: scanning low vcal = 30
[15:48:20.402] <TB1> INFO: Expecting 41600 events.
[15:48:24.073] <TB1> INFO: 41600 events read in total (2954ms).
[15:48:24.074] <TB1> INFO: Test took 4085ms.
[15:48:24.076] <TB1> INFO: scanning low vcal = 40
[15:48:24.484] <TB1> INFO: Expecting 41600 events.
[15:48:28.720] <TB1> INFO: 41600 events read in total (3519ms).
[15:48:28.721] <TB1> INFO: Test took 4645ms.
[15:48:28.725] <TB1> INFO: scanning low vcal = 50
[15:48:29.080] <TB1> INFO: Expecting 41600 events.
[15:48:33.260] <TB1> INFO: 41600 events read in total (3463ms).
[15:48:33.260] <TB1> INFO: Test took 4535ms.
[15:48:33.265] <TB1> INFO: scanning low vcal = 60
[15:48:33.614] <TB1> INFO: Expecting 41600 events.
[15:48:37.817] <TB1> INFO: 41600 events read in total (3486ms).
[15:48:37.817] <TB1> INFO: Test took 4552ms.
[15:48:37.820] <TB1> INFO: scanning low vcal = 70
[15:48:38.161] <TB1> INFO: Expecting 41600 events.
[15:48:42.388] <TB1> INFO: 41600 events read in total (3510ms).
[15:48:42.388] <TB1> INFO: Test took 4568ms.
[15:48:42.392] <TB1> INFO: scanning low vcal = 80
[15:48:42.748] <TB1> INFO: Expecting 41600 events.
[15:48:46.982] <TB1> INFO: 41600 events read in total (3517ms).
[15:48:46.983] <TB1> INFO: Test took 4591ms.
[15:48:46.986] <TB1> INFO: scanning low vcal = 90
[15:48:47.327] <TB1> INFO: Expecting 41600 events.
[15:48:51.651] <TB1> INFO: 41600 events read in total (3607ms).
[15:48:51.651] <TB1> INFO: Test took 4665ms.
[15:48:51.656] <TB1> INFO: scanning low vcal = 100
[15:48:52.010] <TB1> INFO: Expecting 41600 events.
[15:48:56.238] <TB1> INFO: 41600 events read in total (3511ms).
[15:48:56.239] <TB1> INFO: Test took 4583ms.
[15:48:56.243] <TB1> INFO: scanning low vcal = 110
[15:48:56.566] <TB1> INFO: Expecting 41600 events.
[15:49:00.794] <TB1> INFO: 41600 events read in total (3511ms).
[15:49:00.794] <TB1> INFO: Test took 4551ms.
[15:49:00.798] <TB1> INFO: scanning low vcal = 120
[15:49:01.150] <TB1> INFO: Expecting 41600 events.
[15:49:05.375] <TB1> INFO: 41600 events read in total (3508ms).
[15:49:05.376] <TB1> INFO: Test took 4578ms.
[15:49:05.380] <TB1> INFO: scanning low vcal = 130
[15:49:05.736] <TB1> INFO: Expecting 41600 events.
[15:49:09.994] <TB1> INFO: 41600 events read in total (3541ms).
[15:49:09.995] <TB1> INFO: Test took 4615ms.
[15:49:09.999] <TB1> INFO: scanning low vcal = 140
[15:49:10.335] <TB1> INFO: Expecting 41600 events.
[15:49:14.578] <TB1> INFO: 41600 events read in total (3526ms).
[15:49:14.579] <TB1> INFO: Test took 4580ms.
[15:49:14.582] <TB1> INFO: scanning low vcal = 150
[15:49:14.915] <TB1> INFO: Expecting 41600 events.
[15:49:19.137] <TB1> INFO: 41600 events read in total (3505ms).
[15:49:19.137] <TB1> INFO: Test took 4555ms.
[15:49:19.140] <TB1> INFO: scanning low vcal = 160
[15:49:19.495] <TB1> INFO: Expecting 41600 events.
[15:49:23.756] <TB1> INFO: 41600 events read in total (3544ms).
[15:49:23.757] <TB1> INFO: Test took 4617ms.
[15:49:23.760] <TB1> INFO: scanning low vcal = 170
[15:49:24.111] <TB1> INFO: Expecting 41600 events.
[15:49:28.375] <TB1> INFO: 41600 events read in total (3547ms).
[15:49:28.376] <TB1> INFO: Test took 4616ms.
[15:49:28.382] <TB1> INFO: scanning low vcal = 180
[15:49:28.715] <TB1> INFO: Expecting 41600 events.
[15:49:32.964] <TB1> INFO: 41600 events read in total (3532ms).
[15:49:32.965] <TB1> INFO: Test took 4583ms.
[15:49:32.968] <TB1> INFO: scanning low vcal = 190
[15:49:33.314] <TB1> INFO: Expecting 41600 events.
[15:49:37.546] <TB1> INFO: 41600 events read in total (3515ms).
[15:49:37.547] <TB1> INFO: Test took 4579ms.
[15:49:37.552] <TB1> INFO: scanning low vcal = 200
[15:49:37.901] <TB1> INFO: Expecting 41600 events.
[15:49:42.109] <TB1> INFO: 41600 events read in total (3491ms).
[15:49:42.109] <TB1> INFO: Test took 4557ms.
[15:49:42.112] <TB1> INFO: scanning low vcal = 210
[15:49:42.453] <TB1> INFO: Expecting 41600 events.
[15:49:46.644] <TB1> INFO: 41600 events read in total (3474ms).
[15:49:46.645] <TB1> INFO: Test took 4532ms.
[15:49:46.650] <TB1> INFO: scanning low vcal = 220
[15:49:47.002] <TB1> INFO: Expecting 41600 events.
[15:49:51.249] <TB1> INFO: 41600 events read in total (3530ms).
[15:49:51.249] <TB1> INFO: Test took 4599ms.
[15:49:51.253] <TB1> INFO: scanning low vcal = 230
[15:49:51.609] <TB1> INFO: Expecting 41600 events.
[15:49:55.819] <TB1> INFO: 41600 events read in total (3493ms).
[15:49:55.819] <TB1> INFO: Test took 4566ms.
[15:49:55.823] <TB1> INFO: scanning low vcal = 240
[15:49:56.176] <TB1> INFO: Expecting 41600 events.
[15:50:00.365] <TB1> INFO: 41600 events read in total (3472ms).
[15:50:00.366] <TB1> INFO: Test took 4543ms.
[15:50:00.370] <TB1> INFO: scanning low vcal = 250
[15:50:00.724] <TB1> INFO: Expecting 41600 events.
[15:50:04.939] <TB1> INFO: 41600 events read in total (3498ms).
[15:50:04.939] <TB1> INFO: Test took 4569ms.
[15:50:04.945] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[15:50:05.302] <TB1> INFO: Expecting 41600 events.
[15:50:09.372] <TB1> INFO: 41600 events read in total (3353ms).
[15:50:09.372] <TB1> INFO: Test took 4427ms.
[15:50:09.376] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[15:50:09.734] <TB1> INFO: Expecting 41600 events.
[15:50:13.805] <TB1> INFO: 41600 events read in total (3354ms).
[15:50:13.806] <TB1> INFO: Test took 4430ms.
[15:50:13.809] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[15:50:14.161] <TB1> INFO: Expecting 41600 events.
[15:50:18.198] <TB1> INFO: 41600 events read in total (3320ms).
[15:50:18.199] <TB1> INFO: Test took 4390ms.
[15:50:18.202] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[15:50:18.560] <TB1> INFO: Expecting 41600 events.
[15:50:22.740] <TB1> INFO: 41600 events read in total (3463ms).
[15:50:22.741] <TB1> INFO: Test took 4539ms.
[15:50:22.748] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:50:23.090] <TB1> INFO: Expecting 41600 events.
[15:50:27.163] <TB1> INFO: 41600 events read in total (3356ms).
[15:50:27.163] <TB1> INFO: Test took 4415ms.
[15:50:27.635] <TB1> INFO: PixTestGainPedestal::measure() done
[15:50:59.643] <TB1> INFO: PixTestGainPedestal::fit() done
[15:50:59.643] <TB1> INFO: non-linearity mean: 0.956 0.962 0.957 0.956 0.948 0.957 0.954 0.960 0.959 0.954 0.955 0.950 0.954 0.954 0.947 0.954
[15:50:59.643] <TB1> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.011 0.006 0.007 0.006 0.007 0.006 0.007 0.006
[15:50:59.643] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:50:59.661] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:50:59.681] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:50:59.701] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:50:59.720] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:50:59.740] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:50:59.760] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:50:59.780] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:50:59.799] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:50:59.819] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:50:59.839] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:50:59.858] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:50:59.879] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:50:59.899] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:50:59.919] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:50:59.938] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:50:59.957] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[15:50:59.957] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:59.957] <TB1> INFO: Decoding statistics:
[15:50:59.957] <TB1> INFO: General information:
[15:50:59.957] <TB1> INFO: 16bit words read: 2662400
[15:50:59.957] <TB1> INFO: valid events total: 166400
[15:50:59.957] <TB1> INFO: empty events: 0
[15:50:59.957] <TB1> INFO: valid events with pixels: 166400
[15:50:59.957] <TB1> INFO: valid pixel hits: 665418
[15:50:59.957] <TB1> INFO: Event errors: 0
[15:50:59.957] <TB1> INFO: start marker: 0
[15:50:59.957] <TB1> INFO: stop marker: 0
[15:50:59.957] <TB1> INFO: overflow: 0
[15:50:59.957] <TB1> INFO: invalid 5bit words: 0
[15:50:59.957] <TB1> INFO: invalid XOR eye diagram: 0
[15:50:59.957] <TB1> INFO: TBM errors: 0
[15:50:59.957] <TB1> INFO: flawed TBM headers: 0
[15:50:59.957] <TB1> INFO: flawed TBM trailers: 0
[15:50:59.957] <TB1> INFO: event ID mismatches: 0
[15:50:59.957] <TB1> INFO: ROC errors: 0
[15:50:59.957] <TB1> INFO: missing ROC header(s): 0
[15:50:59.957] <TB1> INFO: misplaced readback start: 0
[15:50:59.957] <TB1> INFO: Pixel decoding errors: 0
[15:50:59.957] <TB1> INFO: pixel data incomplete: 0
[15:50:59.957] <TB1> INFO: pixel address: 0
[15:50:59.957] <TB1> INFO: pulse height fill bit: 0
[15:50:59.957] <TB1> INFO: buffer corruption: 0
[15:50:59.964] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C15.dat
[15:50:59.965] <TB1> INFO: ######################################################################
[15:50:59.965] <TB1> INFO: PixTestTrim::doTest()
[15:50:59.965] <TB1> INFO: ######################################################################
[15:50:59.966] <TB1> INFO: PixTestReadback::RES sent once
[15:51:11.377] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C0.dat
[15:51:11.377] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C1.dat
[15:51:11.377] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C2.dat
[15:51:11.377] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C3.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C4.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C5.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C6.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C7.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C8.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C9.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C10.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C11.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C12.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C13.dat
[15:51:11.378] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C14.dat
[15:51:11.379] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C15.dat
[15:51:11.425] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[15:51:11.425] <TB1> INFO: PixTestReadback::RES sent once
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C0.dat
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C1.dat
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C2.dat
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C3.dat
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C4.dat
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C5.dat
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C6.dat
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C7.dat
[15:51:22.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C8.dat
[15:51:22.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C9.dat
[15:51:22.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C10.dat
[15:51:22.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C11.dat
[15:51:22.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C12.dat
[15:51:22.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C13.dat
[15:51:22.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C14.dat
[15:51:22.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C15.dat
[15:51:22.813] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[15:51:22.813] <TB1> INFO: PixTestReadback::RES sent once
[15:51:31.503] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[15:51:31.504] <TB1> INFO: Vbg will be calibrated using Vd calibration
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 149.7calibrated Vbg = 1.20421 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 154.3calibrated Vbg = 1.17688 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 160.6calibrated Vbg = 1.23981 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 155calibrated Vbg = 1.30769 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 162.8calibrated Vbg = 1.33835 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 164.3calibrated Vbg = 1.35919 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159.5calibrated Vbg = 1.36853 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.3calibrated Vbg = 1.37705 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.4calibrated Vbg = 1.34771 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 162.1calibrated Vbg = 1.33383 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 152.3calibrated Vbg = 1.29554 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 144.7calibrated Vbg = 1.25739 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.3calibrated Vbg = 1.19838 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.4calibrated Vbg = 1.18002 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.7calibrated Vbg = 1.21952 :::*/*/*/*/
[15:51:31.504] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 161.9calibrated Vbg = 1.21728 :::*/*/*/*/
[15:51:31.509] <TB1> INFO: PixTestReadback::RES sent once
[15:53:24.743] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L473> Channel 2 has NoTokenPass but 2 ROCs were found

[15:53:24.745] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L473> Channel 3 has NoTokenPass but 2 ROCs were found

[15:53:24.745] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L473> Channel 2 has NoTokenPass but 1 ROCs were found

[15:53:24.745] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L473> Channel 3 has NoTokenPass but 1 ROCs were found

[15:53:24.745] <TB1> ERROR: <datapipe.cc/CheckEventID:L457> Channel 2 Event ID mismatch: local ID (136) != TBM ID (143)

[15:53:24.746] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 2 Number of ROCs (3) != Token Chain Length (4)

[15:53:24.746] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L473> Channel 3 has NoTokenPass but 6 ROCs were found

[15:54:27.193] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C0.dat
[15:54:27.194] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C1.dat
[15:54:27.194] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C2.dat
[15:54:27.194] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C3.dat
[15:54:27.194] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C4.dat
[15:54:27.194] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C5.dat
[15:54:27.194] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C6.dat
[15:54:27.194] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C7.dat
[15:54:27.194] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C8.dat
[15:54:27.195] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C9.dat
[15:54:27.195] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C10.dat
[15:54:27.195] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C11.dat
[15:54:27.195] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C12.dat
[15:54:27.195] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C13.dat
[15:54:27.195] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C14.dat
[15:54:27.195] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2100_FullQualification_2015-09-16_11h18m_1442395098//004_FulltestPxar_p17//readbackCal_C15.dat
[15:54:27.241] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[15:54:27.242] <TB1> INFO: PixTestReadback::doTest() done
[15:54:27.242] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:54:27.242] <TB1> INFO: Decoding statistics:
[15:54:27.242] <TB1> INFO: General information:
[15:54:27.242] <TB1> INFO: 16bit words read: 1024
[15:54:27.242] <TB1> INFO: valid events total: 128
[15:54:27.242] <TB1> INFO: empty events: 128
[15:54:27.242] <TB1> INFO: valid events with pixels: 0
[15:54:27.242] <TB1> INFO: valid pixel hits: 0
[15:54:27.242] <TB1> INFO: Event errors: 0
[15:54:27.242] <TB1> INFO: start marker: 0
[15:54:27.242] <TB1> INFO: stop marker: 0
[15:54:27.242] <TB1> INFO: overflow: 0
[15:54:27.242] <TB1> INFO: invalid 5bit words: 0
[15:54:27.242] <TB1> INFO: invalid XOR eye diagram: 0
[15:54:27.242] <TB1> INFO: TBM errors: 0
[15:54:27.242] <TB1> INFO: flawed TBM headers: 0
[15:54:27.242] <TB1> INFO: flawed TBM trailers: 0
[15:54:27.242] <TB1> INFO: event ID mismatches: 0
[15:54:27.242] <TB1> INFO: ROC errors: 0
[15:54:27.242] <TB1> INFO: missing ROC header(s): 0
[15:54:27.242] <TB1> INFO: misplaced readback start: 0
[15:54:27.242] <TB1> INFO: Pixel decoding errors: 0
[15:54:27.242] <TB1> INFO: pixel data incomplete: 0
[15:54:27.242] <TB1> INFO: pixel address: 0
[15:54:27.242] <TB1> INFO: pulse height fill bit: 0
[15:54:27.242] <TB1> INFO: buffer corruption: 0
[15:54:27.255] <TB1> INFO: Decoding statistics:
[15:54:27.255] <TB1> INFO: General information:
[15:54:27.255] <TB1> INFO: 16bit words read: 2755356
[15:54:27.255] <TB1> INFO: valid events total: 176768
[15:54:27.255] <TB1> INFO: empty events: 7865
[15:54:27.255] <TB1> INFO: valid events with pixels: 168903
[15:54:27.255] <TB1> INFO: valid pixel hits: 667921
[15:54:27.255] <TB1> INFO: Event errors: 0
[15:54:27.255] <TB1> INFO: start marker: 0
[15:54:27.255] <TB1> INFO: stop marker: 0
[15:54:27.255] <TB1> INFO: overflow: 0
[15:54:27.255] <TB1> INFO: invalid 5bit words: 0
[15:54:27.255] <TB1> INFO: invalid XOR eye diagram: 0
[15:54:27.255] <TB1> INFO: TBM errors: 0
[15:54:27.255] <TB1> INFO: flawed TBM headers: 0
[15:54:27.255] <TB1> INFO: flawed TBM trailers: 0
[15:54:27.255] <TB1> INFO: event ID mismatches: 0
[15:54:27.255] <TB1> INFO: ROC errors: 0
[15:54:27.255] <TB1> INFO: missing ROC header(s): 0
[15:54:27.255] <TB1> INFO: misplaced readback start: 0
[15:54:27.255] <TB1> INFO: Pixel decoding errors: 0
[15:54:27.255] <TB1> INFO: pixel data incomplete: 0
[15:54:27.255] <TB1> INFO: pixel address: 0
[15:54:27.255] <TB1> INFO: pulse height fill bit: 0
[15:54:27.255] <TB1> INFO: buffer corruption: 0
[15:54:27.255] <TB1> INFO: enter test to run
[15:54:27.255] <TB1> INFO: test: exit no parameter change
[15:54:27.795] <TB1> QUIET: Connection to board 153 closed.
[15:54:27.874] <TB1> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master