[12:35:06.192] <TB3> INFO: *** Welcome to pxar ***
[12:35:06.192] <TB3> INFO: *** Today: 2015/08/31
[12:35:06.192] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C15.dat
[12:35:06.193] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:35:06.193] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//defaultMaskFile.dat
[12:35:06.194] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters_C15.dat
[12:35:06.268] <TB3> INFO: clk: 4
[12:35:06.268] <TB3> INFO: ctr: 4
[12:35:06.268] <TB3> INFO: sda: 19
[12:35:06.268] <TB3> INFO: tin: 9
[12:35:06.268] <TB3> INFO: level: 15
[12:35:06.268] <TB3> INFO: triggerdelay: 0
[12:35:06.268] <TB3> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[12:35:06.268] <TB3> INFO: Log level: INFO
[12:35:06.275] <TB3> INFO: Found DTB DTB_WZ4I6J
[12:35:06.285] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[12:35:06.288] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[12:35:06.291] <TB3> INFO: RPC call hashes of host and DTB match: 397073690
[12:35:07.829] <TB3> INFO: DUT info:
[12:35:07.829] <TB3> INFO: The DUT currently contains the following objects:
[12:35:07.829] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:35:07.830] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:35:07.830] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:35:07.830] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:35:07.830] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:07.830] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:35:08.231] <TB3> INFO: enter 'restricted' command line mode
[12:35:08.231] <TB3> INFO: enter test to run
[12:35:08.231] <TB3> INFO: test: pretest no parameter change
[12:35:08.231] <TB3> INFO: running: pretest
[12:35:08.235] <TB3> INFO: ######################################################################
[12:35:08.235] <TB3> INFO: PixTestPretest::doTest()
[12:35:08.235] <TB3> INFO: ######################################################################
[12:35:08.237] <TB3> INFO: ----------------------------------------------------------------------
[12:35:08.237] <TB3> INFO: PixTestPretest::programROC()
[12:35:08.237] <TB3> INFO: ----------------------------------------------------------------------
[12:35:26.253] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:35:26.253] <TB3> INFO: IA differences per ROC: 19.3 20.1 19.3 16.9 17.7 16.9 15.3 16.9 16.9 16.9 17.7 18.5 17.7 22.5 18.5 17.7
[12:35:26.325] <TB3> INFO: ----------------------------------------------------------------------
[12:35:26.325] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:35:26.325] <TB3> INFO: ----------------------------------------------------------------------
[12:35:45.890] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[12:35:45.892] <TB3> INFO: ----------------------------------------------------------------------
[12:35:45.892] <TB3> INFO: PixTestPretest::findTiming()
[12:35:45.892] <TB3> INFO: ----------------------------------------------------------------------
[12:35:45.892] <TB3> INFO: PixTestCmd::init()

[12:37:33.745] <TB3> INFO: TBM phases: 160MHz: 1, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:37:33.745] <TB3> INFO: (success/tries = 100/100), width = 3
[12:37:33.747] <TB3> INFO: ----------------------------------------------------------------------
[12:37:33.747] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:37:33.748] <TB3> INFO: ----------------------------------------------------------------------
[12:37:33.887] <TB3> INFO: Expecting 231680 events.
[12:37:42.649] <TB3> INFO: 231680 events read in total (8045ms).
[12:37:42.654] <TB3> INFO: Test took 8901ms.
[12:37:42.970] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:37:43.012] <TB3> INFO: ----------------------------------------------------------------------
[12:37:43.012] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:37:43.012] <TB3> INFO: ----------------------------------------------------------------------
[12:37:43.149] <TB3> INFO: Expecting 231680 events.
[12:37:52.393] <TB3> INFO: 231680 events read in total (8529ms).
[12:37:52.398] <TB3> INFO: Test took 9381ms.
[12:37:52.732] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:37:52.732] <TB3> INFO: CalDel: 153 161 143 138 170 146 134 138 139 146 142 137 140 132 145 113
[12:37:52.732] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:37:52.735] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C0.dat
[12:37:52.735] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C1.dat
[12:37:52.736] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C2.dat
[12:37:52.736] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C3.dat
[12:37:52.736] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C4.dat
[12:37:52.736] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C5.dat
[12:37:52.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C6.dat
[12:37:52.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C7.dat
[12:37:52.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C8.dat
[12:37:52.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C9.dat
[12:37:52.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C10.dat
[12:37:52.738] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C11.dat
[12:37:52.738] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C12.dat
[12:37:52.738] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C13.dat
[12:37:52.738] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C14.dat
[12:37:52.739] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C15.dat
[12:37:52.739] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//tbmParameters_C0a.dat
[12:37:52.739] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:37:52.739] <TB3> INFO: PixTestPretest::doTest() done, duration: 164 seconds
[12:37:52.808] <TB3> INFO: enter test to run
[12:37:52.808] <TB3> INFO: test: fulltest no parameter change
[12:37:52.808] <TB3> INFO: running: fulltest
[12:37:52.808] <TB3> INFO: ######################################################################
[12:37:52.808] <TB3> INFO: PixTestFullTest::doTest()
[12:37:52.808] <TB3> INFO: ######################################################################
[12:37:52.809] <TB3> INFO: ######################################################################
[12:37:52.809] <TB3> INFO: PixTestAlive::doTest()
[12:37:52.809] <TB3> INFO: ######################################################################
[12:37:52.811] <TB3> INFO: ----------------------------------------------------------------------
[12:37:52.811] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:37:52.811] <TB3> INFO: ----------------------------------------------------------------------
[12:37:53.127] <TB3> INFO: Expecting 41600 events.
[12:37:57.562] <TB3> INFO: 41600 events read in total (3719ms).
[12:37:57.562] <TB3> INFO: Test took 4750ms.
[12:37:57.568] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:57.861] <TB3> INFO: PixTestAlive::aliveTest() done
[12:37:57.862] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 3 0 0 1 0 0 0 0
[12:37:57.864] <TB3> INFO: ----------------------------------------------------------------------
[12:37:57.864] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:37:57.864] <TB3> INFO: ----------------------------------------------------------------------
[12:37:58.193] <TB3> INFO: Expecting 41600 events.
[12:38:01.359] <TB3> INFO: 41600 events read in total (2449ms).
[12:38:01.360] <TB3> INFO: Test took 3493ms.
[12:38:01.360] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:01.360] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:38:01.679] <TB3> INFO: PixTestAlive::maskTest() done
[12:38:01.679] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:38:01.681] <TB3> INFO: ----------------------------------------------------------------------
[12:38:01.681] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:38:01.681] <TB3> INFO: ----------------------------------------------------------------------
[12:38:02.002] <TB3> INFO: Expecting 41600 events.
[12:38:06.398] <TB3> INFO: 41600 events read in total (3680ms).
[12:38:06.399] <TB3> INFO: Test took 4715ms.
[12:38:06.405] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:06.693] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:38:06.693] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:38:06.693] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:38:06.707] <TB3> INFO: ######################################################################
[12:38:06.707] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:38:06.707] <TB3> INFO: ######################################################################
[12:38:06.710] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[12:38:06.722] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:38:06.722] <TB3> INFO: run 1 of 1
[12:38:07.029] <TB3> INFO: Expecting 3120000 events.
[12:38:42.522] <TB3> INFO: 841905 events read in total (34777ms).
[12:39:17.140] <TB3> INFO: 1673670 events read in total (69396ms).
[12:39:52.097] <TB3> INFO: 2515300 events read in total (104353ms).
[12:40:16.024] <TB3> INFO: 3120000 events read in total (128279ms).
[12:40:16.070] <TB3> INFO: Test took 129348ms.
[12:40:16.173] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:39.285] <TB3> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[12:40:39.285] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 3 0 0 0 0 0 0 3
[12:40:39.285] <TB3> INFO: separation cut (per ROC): 82 80 101 92 85 96 84 92 84 85 89 72 85 83 82 83
[12:40:39.353] <TB3> INFO: ######################################################################
[12:40:39.353] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:40:39.353] <TB3> INFO: ######################################################################
[12:40:39.353] <TB3> INFO: ----------------------------------------------------------------------
[12:40:39.353] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:40:39.353] <TB3> INFO: ----------------------------------------------------------------------
[12:40:39.353] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[12:40:39.362] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:40:39.362] <TB3> INFO: run 1 of 1
[12:40:39.665] <TB3> INFO: Expecting 31200000 events.
[12:41:04.493] <TB3> INFO: 958400 events read in total (24111ms).
[12:41:28.658] <TB3> INFO: 1902150 events read in total (48276ms).
[12:41:52.473] <TB3> INFO: 2840900 events read in total (72091ms).
[12:42:16.476] <TB3> INFO: 3782550 events read in total (96094ms).
[12:42:40.440] <TB3> INFO: 4717300 events read in total (120058ms).
[12:43:04.406] <TB3> INFO: 5655250 events read in total (144024ms).
[12:43:28.475] <TB3> INFO: 6591900 events read in total (168093ms).
[12:43:52.547] <TB3> INFO: 7527650 events read in total (192165ms).
[12:44:16.591] <TB3> INFO: 8462750 events read in total (216209ms).
[12:44:40.605] <TB3> INFO: 9395200 events read in total (240223ms).
[12:45:04.607] <TB3> INFO: 10329250 events read in total (264225ms).
[12:45:28.634] <TB3> INFO: 11263200 events read in total (288252ms).
[12:45:52.650] <TB3> INFO: 12196150 events read in total (312268ms).
[12:46:16.842] <TB3> INFO: 13127300 events read in total (336460ms).
[12:46:40.719] <TB3> INFO: 14059000 events read in total (360337ms).
[12:47:04.869] <TB3> INFO: 14990050 events read in total (384487ms).
[12:47:29.147] <TB3> INFO: 15914150 events read in total (408765ms).
[12:47:53.040] <TB3> INFO: 16837700 events read in total (432658ms).
[12:48:16.674] <TB3> INFO: 17757250 events read in total (456292ms).
[12:48:40.656] <TB3> INFO: 18679150 events read in total (480274ms).
[12:49:04.055] <TB3> INFO: 19594800 events read in total (503673ms).
[12:49:27.940] <TB3> INFO: 20513450 events read in total (527558ms).
[12:49:51.922] <TB3> INFO: 21431250 events read in total (551540ms).
[12:50:15.884] <TB3> INFO: 22349200 events read in total (575502ms).
[12:50:39.664] <TB3> INFO: 23263850 events read in total (599282ms).
[12:51:03.609] <TB3> INFO: 24182900 events read in total (623227ms).
[12:51:27.479] <TB3> INFO: 25098350 events read in total (647097ms).
[12:51:51.363] <TB3> INFO: 26015300 events read in total (670981ms).
[12:52:15.231] <TB3> INFO: 26930100 events read in total (694849ms).
[12:52:39.135] <TB3> INFO: 27849000 events read in total (718753ms).
[12:53:03.095] <TB3> INFO: 28767250 events read in total (742713ms).
[12:53:27.052] <TB3> INFO: 29684650 events read in total (766670ms).
[12:53:50.893] <TB3> INFO: 30605050 events read in total (790511ms).
[12:54:05.725] <TB3> INFO: 31200000 events read in total (805343ms).
[12:54:05.759] <TB3> INFO: Test took 806397ms.
[12:54:05.839] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:05.944] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:07.330] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:08.756] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:10.280] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:11.654] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:13.138] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:14.598] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:15.980] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:17.370] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:18.776] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:20.199] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:21.581] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:23.062] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:24.533] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:26.029] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:27.427] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:54:28.874] <TB3> INFO: PixTestScurves::scurves() done
[12:54:28.874] <TB3> INFO: Vcal mean: 88.50 88.07 96.66 97.60 89.97 96.98 92.00 90.32 88.81 90.16 89.96 82.84 79.55 81.15 87.36 93.82
[12:54:28.874] <TB3> INFO: Vcal RMS: 5.26 5.55 6.22 5.96 5.16 5.80 5.25 5.52 5.83 5.73 5.81 4.74 4.83 4.43 5.78 5.59
[12:54:28.874] <TB3> INFO: PixTestScurves::fullTest() done, duration: 829 seconds
[12:54:28.959] <TB3> INFO: ######################################################################
[12:54:28.959] <TB3> INFO: PixTestTrim::doTest()
[12:54:28.959] <TB3> INFO: ######################################################################
[12:54:28.960] <TB3> INFO: ----------------------------------------------------------------------
[12:54:28.960] <TB3> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[12:54:28.960] <TB3> INFO: ----------------------------------------------------------------------
[12:54:29.047] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:54:29.047] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[12:54:29.057] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[12:54:29.057] <TB3> INFO: run 1 of 1
[12:54:29.394] <TB3> INFO: Expecting 13312000 events.
[12:54:56.375] <TB3> INFO: 1084480 events read in total (26261ms).
[12:55:23.096] <TB3> INFO: 2164520 events read in total (52982ms).
[12:55:50.812] <TB3> INFO: 3243920 events read in total (80698ms).
[12:56:18.537] <TB3> INFO: 4320600 events read in total (108423ms).
[12:56:46.090] <TB3> INFO: 5393480 events read in total (135976ms).
[12:57:13.983] <TB3> INFO: 6463320 events read in total (163869ms).
[12:57:41.579] <TB3> INFO: 7538160 events read in total (191465ms).
[12:58:09.118] <TB3> INFO: 8613980 events read in total (219004ms).
[12:58:36.636] <TB3> INFO: 9692860 events read in total (246522ms).
[12:59:04.277] <TB3> INFO: 10772180 events read in total (274163ms).
[12:59:31.910] <TB3> INFO: 11852360 events read in total (301796ms).
[12:59:59.616] <TB3> INFO: 12935720 events read in total (329502ms).
[13:00:09.355] <TB3> INFO: 13312000 events read in total (339241ms).
[13:00:09.390] <TB3> INFO: Test took 340333ms.
[13:00:09.442] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:28.439] <TB3> INFO: ROC 0 VthrComp = 96
[13:00:28.439] <TB3> INFO: ROC 1 VthrComp = 92
[13:00:28.439] <TB3> INFO: ROC 2 VthrComp = 102
[13:00:28.439] <TB3> INFO: ROC 3 VthrComp = 99
[13:00:28.440] <TB3> INFO: ROC 4 VthrComp = 94
[13:00:28.440] <TB3> INFO: ROC 5 VthrComp = 99
[13:00:28.440] <TB3> INFO: ROC 6 VthrComp = 96
[13:00:28.440] <TB3> INFO: ROC 7 VthrComp = 100
[13:00:28.440] <TB3> INFO: ROC 8 VthrComp = 95
[13:00:28.440] <TB3> INFO: ROC 9 VthrComp = 93
[13:00:28.440] <TB3> INFO: ROC 10 VthrComp = 94
[13:00:28.440] <TB3> INFO: ROC 11 VthrComp = 88
[13:00:28.440] <TB3> INFO: ROC 12 VthrComp = 87
[13:00:28.441] <TB3> INFO: ROC 13 VthrComp = 91
[13:00:28.441] <TB3> INFO: ROC 14 VthrComp = 90
[13:00:28.441] <TB3> INFO: ROC 15 VthrComp = 99
[13:00:28.441] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:00:28.441] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[13:00:28.451] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:00:28.451] <TB3> INFO: run 1 of 1
[13:00:28.757] <TB3> INFO: Expecting 13312000 events.
[13:00:54.293] <TB3> INFO: 780020 events read in total (24820ms).
[13:01:16.871] <TB3> INFO: 1556680 events read in total (47398ms).
[13:01:41.546] <TB3> INFO: 2332560 events read in total (72073ms).
[13:02:06.327] <TB3> INFO: 3108720 events read in total (96854ms).
[13:02:31.248] <TB3> INFO: 3884640 events read in total (121775ms).
[13:02:56.009] <TB3> INFO: 4661400 events read in total (146536ms).
[13:03:20.903] <TB3> INFO: 5438000 events read in total (171430ms).
[13:03:45.984] <TB3> INFO: 6214100 events read in total (196511ms).
[13:04:10.654] <TB3> INFO: 6987360 events read in total (221181ms).
[13:04:35.372] <TB3> INFO: 7757160 events read in total (245899ms).
[13:05:00.188] <TB3> INFO: 8524660 events read in total (270715ms).
[13:05:22.987] <TB3> INFO: 9291640 events read in total (293514ms).
[13:05:45.509] <TB3> INFO: 10057280 events read in total (316036ms).
[13:06:07.827] <TB3> INFO: 10822540 events read in total (338354ms).
[13:06:30.524] <TB3> INFO: 11587180 events read in total (361051ms).
[13:06:54.861] <TB3> INFO: 12352480 events read in total (385388ms).
[13:07:19.610] <TB3> INFO: 13118600 events read in total (410137ms).
[13:07:26.231] <TB3> INFO: 13312000 events read in total (416758ms).
[13:07:26.276] <TB3> INFO: Test took 417825ms.
[13:07:26.416] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:49.009] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.5241 for pixel 18/72 mean/min/max = 44.6525/31.7259/57.5791
[13:07:49.010] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.576 for pixel 1/28 mean/min/max = 45.51/31.3293/59.6906
[13:07:49.010] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.311 for pixel 0/4 mean/min/max = 46.6164/31.7247/61.5081
[13:07:49.010] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.8406 for pixel 3/9 mean/min/max = 46.2313/31.5892/60.8734
[13:07:49.011] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 57.8006 for pixel 13/3 mean/min/max = 44.8607/31.9081/57.8132
[13:07:49.011] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.6975 for pixel 0/77 mean/min/max = 45.8345/30.8344/60.8346
[13:07:49.011] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 58.7983 for pixel 28/9 mean/min/max = 45.2663/31.5363/58.9964
[13:07:49.011] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.7986 for pixel 5/19 mean/min/max = 44.8273/31.8205/57.8342
[13:07:49.012] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.184 for pixel 7/73 mean/min/max = 45.06/30.7879/59.3321
[13:07:49.012] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.8714 for pixel 0/64 mean/min/max = 46.7821/31.5686/61.9956
[13:07:49.012] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 58.8561 for pixel 15/0 mean/min/max = 45.3069/31.6561/58.9578
[13:07:49.012] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 58.0138 for pixel 51/8 mean/min/max = 45.7277/33.0569/58.3984
[13:07:49.013] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 57.9193 for pixel 30/79 mean/min/max = 44.4506/30.9526/57.9486
[13:07:49.013] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.5663 for pixel 13/79 mean/min/max = 44.4291/32.2508/56.6074
[13:07:49.013] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 60.9222 for pixel 3/44 mean/min/max = 46.4231/31.9231/60.923
[13:07:49.013] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.5431 for pixel 3/66 mean/min/max = 45.0233/31.4943/58.5524
[13:07:49.014] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:49.146] <TB3> INFO: Expecting 1029120 events.
[13:08:12.866] <TB3> INFO: 1029120 events read in total (23004ms).
[13:08:12.872] <TB3> INFO: Expecting 1029120 events.
[13:08:34.647] <TB3> INFO: 1029120 events read in total (21244ms).
[13:08:34.655] <TB3> INFO: Expecting 1029120 events.
[13:08:58.671] <TB3> INFO: 1029120 events read in total (23484ms).
[13:08:58.680] <TB3> INFO: Expecting 1029120 events.
[13:09:22.468] <TB3> INFO: 1029120 events read in total (23261ms).
[13:09:22.479] <TB3> INFO: Expecting 1029120 events.
[13:09:46.217] <TB3> INFO: 1029120 events read in total (23204ms).
[13:09:46.230] <TB3> INFO: Expecting 1029120 events.
[13:10:09.692] <TB3> INFO: 1029120 events read in total (22929ms).
[13:10:09.707] <TB3> INFO: Expecting 1029120 events.
[13:10:33.657] <TB3> INFO: 1029120 events read in total (23416ms).
[13:10:33.673] <TB3> INFO: Expecting 1029120 events.
[13:10:57.489] <TB3> INFO: 1029120 events read in total (23288ms).
[13:10:57.507] <TB3> INFO: Expecting 1029120 events.
[13:11:21.245] <TB3> INFO: 1029120 events read in total (23210ms).
[13:11:21.267] <TB3> INFO: Expecting 1029120 events.
[13:11:45.013] <TB3> INFO: 1029120 events read in total (23218ms).
[13:11:45.044] <TB3> INFO: Expecting 1029120 events.
[13:12:08.816] <TB3> INFO: 1029120 events read in total (23244ms).
[13:12:08.843] <TB3> INFO: Expecting 1029120 events.
[13:12:32.577] <TB3> INFO: 1029120 events read in total (23206ms).
[13:12:32.604] <TB3> INFO: Expecting 1029120 events.
[13:12:56.459] <TB3> INFO: 1029120 events read in total (23328ms).
[13:12:56.495] <TB3> INFO: Expecting 1029120 events.
[13:13:20.446] <TB3> INFO: 1029120 events read in total (23423ms).
[13:13:20.482] <TB3> INFO: Expecting 1029120 events.
[13:13:44.332] <TB3> INFO: 1029120 events read in total (23322ms).
[13:13:44.367] <TB3> INFO: Expecting 1029120 events.
[13:14:08.102] <TB3> INFO: 1029120 events read in total (23208ms).
[13:14:08.139] <TB3> INFO: Test took 379125ms.
[13:14:09.138] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:14:09.147] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:14:09.148] <TB3> INFO: run 1 of 1
[13:14:09.464] <TB3> INFO: Expecting 16640000 events.
[13:14:34.644] <TB3> INFO: 724620 events read in total (24464ms).
[13:14:58.915] <TB3> INFO: 1445960 events read in total (48735ms).
[13:15:23.364] <TB3> INFO: 2167020 events read in total (73184ms).
[13:15:47.542] <TB3> INFO: 2889300 events read in total (97362ms).
[13:16:12.182] <TB3> INFO: 3610340 events read in total (122002ms).
[13:16:36.372] <TB3> INFO: 4331920 events read in total (146192ms).
[13:17:00.627] <TB3> INFO: 5053380 events read in total (170447ms).
[13:17:25.068] <TB3> INFO: 5775800 events read in total (194888ms).
[13:17:49.906] <TB3> INFO: 6498000 events read in total (219726ms).
[13:18:14.377] <TB3> INFO: 7218980 events read in total (244197ms).
[13:18:38.674] <TB3> INFO: 7941040 events read in total (268494ms).
[13:19:02.740] <TB3> INFO: 8660600 events read in total (292560ms).
[13:19:26.719] <TB3> INFO: 9377380 events read in total (316539ms).
[13:19:51.072] <TB3> INFO: 10093520 events read in total (340892ms).
[13:20:15.513] <TB3> INFO: 10808640 events read in total (365333ms).
[13:20:39.715] <TB3> INFO: 11523060 events read in total (389535ms).
[13:21:04.302] <TB3> INFO: 12237500 events read in total (414122ms).
[13:21:28.506] <TB3> INFO: 12950540 events read in total (438326ms).
[13:21:52.574] <TB3> INFO: 13664000 events read in total (462394ms).
[13:22:16.966] <TB3> INFO: 14376980 events read in total (486786ms).
[13:22:41.166] <TB3> INFO: 15090840 events read in total (510986ms).
[13:23:05.585] <TB3> INFO: 15803800 events read in total (535405ms).
[13:23:29.801] <TB3> INFO: 16518560 events read in total (559621ms).
[13:23:34.339] <TB3> INFO: 16640000 events read in total (564159ms).
[13:23:34.418] <TB3> INFO: Test took 565271ms.
[13:23:34.655] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:58.839] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.106662 .. 255.000000
[13:23:58.914] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 255 (-1/-1) hits flags = 16 (plus default)
[13:23:58.923] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:23:58.923] <TB3> INFO: run 1 of 1
[13:23:59.226] <TB3> INFO: Expecting 21299200 events.
[13:24:23.159] <TB3> INFO: 711840 events read in total (23217ms).
[13:24:45.549] <TB3> INFO: 1424700 events read in total (45607ms).
[13:25:09.725] <TB3> INFO: 2136940 events read in total (69783ms).
[13:25:33.858] <TB3> INFO: 2849340 events read in total (93916ms).
[13:25:58.110] <TB3> INFO: 3561840 events read in total (118168ms).
[13:26:22.212] <TB3> INFO: 4273940 events read in total (142270ms).
[13:26:44.137] <TB3> INFO: 4985980 events read in total (164195ms).
[13:27:08.448] <TB3> INFO: 5698540 events read in total (188506ms).
[13:27:32.445] <TB3> INFO: 6411280 events read in total (212503ms).
[13:27:56.772] <TB3> INFO: 7123740 events read in total (236830ms).
[13:28:21.065] <TB3> INFO: 7836320 events read in total (261123ms).
[13:28:45.229] <TB3> INFO: 8548980 events read in total (285287ms).
[13:29:08.328] <TB3> INFO: 9261040 events read in total (308386ms).
[13:29:32.548] <TB3> INFO: 9973520 events read in total (332606ms).
[13:29:56.836] <TB3> INFO: 10686620 events read in total (356894ms).
[13:30:21.435] <TB3> INFO: 11398900 events read in total (381493ms).
[13:30:45.349] <TB3> INFO: 12110820 events read in total (405407ms).
[13:31:08.960] <TB3> INFO: 12822920 events read in total (429018ms).
[13:31:33.212] <TB3> INFO: 13534240 events read in total (453270ms).
[13:31:57.440] <TB3> INFO: 14245480 events read in total (477498ms).
[13:32:21.278] <TB3> INFO: 14956940 events read in total (501336ms).
[13:32:44.528] <TB3> INFO: 15668060 events read in total (524586ms).
[13:33:08.867] <TB3> INFO: 16378400 events read in total (548925ms).
[13:33:33.054] <TB3> INFO: 17089040 events read in total (573112ms).
[13:33:57.289] <TB3> INFO: 17800020 events read in total (597347ms).
[13:34:21.376] <TB3> INFO: 18510780 events read in total (621434ms).
[13:34:43.936] <TB3> INFO: 19221600 events read in total (643994ms).
[13:35:07.809] <TB3> INFO: 19932140 events read in total (667867ms).
[13:35:29.565] <TB3> INFO: 20643020 events read in total (689623ms).
[13:35:49.992] <TB3> INFO: 21299200 events read in total (710050ms).
[13:35:50.076] <TB3> INFO: Test took 711154ms.
[13:35:50.342] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:18.008] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 16.578444 .. 89.643904
[13:36:18.093] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 6 .. 99 (-1/-1) hits flags = 16 (plus default)
[13:36:18.104] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:36:18.104] <TB3> INFO: run 1 of 1
[13:36:18.410] <TB3> INFO: Expecting 7820800 events.
[13:36:42.262] <TB3> INFO: 784540 events read in total (23128ms).
[13:37:06.570] <TB3> INFO: 1568980 events read in total (47436ms).
[13:37:31.806] <TB3> INFO: 2352900 events read in total (72672ms).
[13:37:56.849] <TB3> INFO: 3137440 events read in total (97715ms).
[13:38:22.038] <TB3> INFO: 3921680 events read in total (122904ms).
[13:38:47.206] <TB3> INFO: 4705480 events read in total (148072ms).
[13:39:09.816] <TB3> INFO: 5488980 events read in total (170682ms).
[13:39:32.344] <TB3> INFO: 6271680 events read in total (193210ms).
[13:39:57.362] <TB3> INFO: 7054660 events read in total (218228ms).
[13:40:22.154] <TB3> INFO: 7820800 events read in total (243020ms).
[13:40:22.181] <TB3> INFO: Test took 244077ms.
[13:40:22.268] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:41.710] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 21.133028 .. 76.873114
[13:40:41.787] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 11 .. 86 (-1/-1) hits flags = 16 (plus default)
[13:40:41.796] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:40:41.796] <TB3> INFO: run 1 of 1
[13:40:42.103] <TB3> INFO: Expecting 6323200 events.
[13:41:07.735] <TB3> INFO: 788600 events read in total (24916ms).
[13:41:31.309] <TB3> INFO: 1577280 events read in total (48490ms).
[13:41:56.309] <TB3> INFO: 2365900 events read in total (73490ms).
[13:42:21.165] <TB3> INFO: 3154600 events read in total (98346ms).
[13:42:46.119] <TB3> INFO: 3942660 events read in total (123300ms).
[13:43:11.091] <TB3> INFO: 4730140 events read in total (148272ms).
[13:43:33.608] <TB3> INFO: 5517840 events read in total (170789ms).
[13:43:58.811] <TB3> INFO: 6305360 events read in total (195992ms).
[13:43:59.866] <TB3> INFO: 6323200 events read in total (197047ms).
[13:43:59.886] <TB3> INFO: Test took 198090ms.
[13:43:59.952] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:17.232] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 23.244010 .. 73.977602
[13:44:17.312] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 13 .. 83 (-1/-1) hits flags = 16 (plus default)
[13:44:17.322] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:44:17.322] <TB3> INFO: run 1 of 1
[13:44:17.635] <TB3> INFO: Expecting 5907200 events.
[13:44:43.324] <TB3> INFO: 785780 events read in total (24966ms).
[13:45:08.346] <TB3> INFO: 1571660 events read in total (49988ms).
[13:45:31.342] <TB3> INFO: 2357700 events read in total (72984ms).
[13:45:56.722] <TB3> INFO: 3143500 events read in total (98364ms).
[13:46:21.710] <TB3> INFO: 3929440 events read in total (123352ms).
[13:46:46.536] <TB3> INFO: 4715160 events read in total (148178ms).
[13:47:10.578] <TB3> INFO: 5500660 events read in total (172220ms).
[13:47:22.412] <TB3> INFO: 5907200 events read in total (184054ms).
[13:47:22.438] <TB3> INFO: Test took 185116ms.
[13:47:22.506] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:42.192] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:47:42.192] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:47:42.201] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:47:42.201] <TB3> INFO: run 1 of 1
[13:47:42.504] <TB3> INFO: Expecting 3411200 events.
[13:48:09.221] <TB3> INFO: 879020 events read in total (25995ms).
[13:48:35.333] <TB3> INFO: 1758480 events read in total (52107ms).
[13:49:01.386] <TB3> INFO: 2636820 events read in total (78160ms).
[13:49:24.643] <TB3> INFO: 3411200 events read in total (101417ms).
[13:49:24.661] <TB3> INFO: Test took 102460ms.
[13:49:24.695] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:39.129] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:49:39.129] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:49:39.130] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:49:39.130] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:49:39.130] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:49:39.130] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:49:39.130] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:49:39.131] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:49:39.131] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:49:39.131] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:49:39.131] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:49:39.131] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:49:39.131] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:49:39.132] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:49:39.132] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:49:39.132] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:49:39.132] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:49:39.140] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:49:39.147] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:49:39.155] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:49:39.162] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:49:39.169] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:49:39.177] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:49:39.183] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:49:39.190] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:49:39.196] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:49:39.202] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:49:39.208] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:49:39.214] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:49:39.220] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:49:39.227] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:49:39.233] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:49:39.239] <TB3> INFO: PixTestTrim::trimTest() done
[13:49:39.239] <TB3> INFO: vtrim: 95 94 106 98 89 91 95 100 97 104 94 87 96 87 101 103
[13:49:39.239] <TB3> INFO: vthrcomp: 96 92 102 99 94 99 96 100 95 93 94 88 87 91 90 99
[13:49:39.239] <TB3> INFO: vcal mean: 34.98 34.96 34.99 34.95 34.94 35.00 34.97 34.95 34.93 34.99 34.95 34.98 34.97 35.00 35.02 34.97
[13:49:39.239] <TB3> INFO: vcal RMS: 0.74 0.72 0.72 0.91 0.73 0.75 0.89 0.71 0.96 0.73 0.75 0.89 0.68 0.63 0.74 0.76
[13:49:39.239] <TB3> INFO: bits mean: 9.78 9.08 8.60 8.96 9.64 9.22 9.32 9.51 9.80 8.88 9.37 8.28 9.47 9.04 8.81 9.45
[13:49:39.239] <TB3> INFO: bits RMS: 2.69 2.95 3.03 2.91 2.70 2.94 2.83 2.75 2.54 2.89 2.86 3.03 2.91 2.95 2.97 2.83
[13:49:39.246] <TB3> INFO: ----------------------------------------------------------------------
[13:49:39.246] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:49:39.246] <TB3> INFO: ----------------------------------------------------------------------
[13:49:39.249] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:49:39.259] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:49:39.259] <TB3> INFO: run 1 of 1
[13:49:39.595] <TB3> INFO: Expecting 8320000 events.
[13:50:08.642] <TB3> INFO: 930720 events read in total (28331ms).
[13:50:36.776] <TB3> INFO: 1853180 events read in total (56465ms).
[13:51:04.200] <TB3> INFO: 2772070 events read in total (83889ms).
[13:51:32.985] <TB3> INFO: 3689570 events read in total (112674ms).
[13:52:02.100] <TB3> INFO: 4601120 events read in total (141789ms).
[13:52:31.100] <TB3> INFO: 5507790 events read in total (170789ms).
[13:53:00.239] <TB3> INFO: 6413810 events read in total (199928ms).
[13:53:29.217] <TB3> INFO: 7318980 events read in total (228906ms).
[13:53:58.354] <TB3> INFO: 8228600 events read in total (258043ms).
[13:54:01.691] <TB3> INFO: 8320000 events read in total (261380ms).
[13:54:01.733] <TB3> INFO: Test took 262474ms.
[13:54:01.844] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:29.200] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 166 (-1/-1) hits flags = 16 (plus default)
[13:54:29.209] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:54:29.209] <TB3> INFO: run 1 of 1
[13:54:29.526] <TB3> INFO: Expecting 6947200 events.
[13:54:57.788] <TB3> INFO: 967250 events read in total (27539ms).
[13:55:27.261] <TB3> INFO: 1925380 events read in total (57012ms).
[13:55:57.140] <TB3> INFO: 2880280 events read in total (86891ms).
[13:56:26.665] <TB3> INFO: 3828190 events read in total (116416ms).
[13:56:56.244] <TB3> INFO: 4768790 events read in total (145995ms).
[13:57:25.673] <TB3> INFO: 5707130 events read in total (175424ms).
[13:57:53.421] <TB3> INFO: 6646850 events read in total (203172ms).
[13:58:02.308] <TB3> INFO: 6947200 events read in total (212059ms).
[13:58:02.344] <TB3> INFO: Test took 213135ms.
[13:58:02.422] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:30.127] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 154 (-1/-1) hits flags = 16 (plus default)
[13:58:30.137] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:58:30.137] <TB3> INFO: run 1 of 1
[13:58:30.480] <TB3> INFO: Expecting 6448000 events.
[13:59:01.457] <TB3> INFO: 1001540 events read in total (30261ms).
[13:59:31.524] <TB3> INFO: 1993140 events read in total (60328ms).
[14:00:01.439] <TB3> INFO: 2980180 events read in total (90243ms).
[14:00:31.295] <TB3> INFO: 3955210 events read in total (120099ms).
[14:01:01.299] <TB3> INFO: 4925000 events read in total (150103ms).
[14:01:29.637] <TB3> INFO: 5894510 events read in total (178441ms).
[14:01:45.762] <TB3> INFO: 6448000 events read in total (194566ms).
[14:01:45.788] <TB3> INFO: Test took 195651ms.
[14:01:45.853] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:12.689] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 154 (-1/-1) hits flags = 16 (plus default)
[14:02:12.699] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[14:02:12.699] <TB3> INFO: run 1 of 1
[14:02:13.046] <TB3> INFO: Expecting 6448000 events.
[14:02:43.842] <TB3> INFO: 1001000 events read in total (30068ms).
[14:03:14.130] <TB3> INFO: 1991670 events read in total (60357ms).
[14:03:44.119] <TB3> INFO: 2977780 events read in total (90345ms).
[14:04:14.304] <TB3> INFO: 3952220 events read in total (120530ms).
[14:04:44.122] <TB3> INFO: 4921340 events read in total (150348ms).
[14:05:12.000] <TB3> INFO: 5890500 events read in total (178226ms).
[14:05:27.966] <TB3> INFO: 6448000 events read in total (194192ms).
[14:05:27.991] <TB3> INFO: Test took 195292ms.
[14:05:28.058] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:50.230] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 153 (-1/-1) hits flags = 16 (plus default)
[14:05:50.238] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[14:05:50.238] <TB3> INFO: run 1 of 1
[14:05:50.541] <TB3> INFO: Expecting 6406400 events.
[14:06:19.351] <TB3> INFO: 1003300 events read in total (28087ms).
[14:06:48.674] <TB3> INFO: 1996150 events read in total (57410ms).
[14:07:18.665] <TB3> INFO: 2984410 events read in total (87401ms).
[14:07:48.429] <TB3> INFO: 3960690 events read in total (117165ms).
[14:08:15.969] <TB3> INFO: 4932130 events read in total (144705ms).
[14:08:45.949] <TB3> INFO: 5902840 events read in total (174685ms).
[14:09:01.526] <TB3> INFO: 6406400 events read in total (190262ms).
[14:09:01.555] <TB3> INFO: Test took 191317ms.
[14:09:01.621] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:28.226] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:09:28.228] <TB3> INFO: PixTestTrim::doTest() done, duration: 4499 seconds
[14:09:28.964] <TB3> INFO: ######################################################################
[14:09:28.964] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:09:28.964] <TB3> INFO: ######################################################################
[14:09:29.309] <TB3> INFO: Expecting 41600 events.
[14:09:33.724] <TB3> INFO: 41600 events read in total (3699ms).
[14:09:33.725] <TB3> INFO: Test took 4759ms.
[14:09:33.732] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:34.330] <TB3> INFO: Expecting 41600 events.
[14:09:38.789] <TB3> INFO: 41600 events read in total (3743ms).
[14:09:38.790] <TB3> INFO: Test took 4803ms.
[14:09:38.796] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:39.142] <TB3> INFO: Expecting 41600 events.
[14:09:43.650] <TB3> INFO: 41600 events read in total (3792ms).
[14:09:43.650] <TB3> INFO: Test took 4833ms.
[14:09:43.658] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:43.664] <TB3> INFO: The DUT currently contains the following objects:
[14:09:43.664] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:43.664] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:43.664] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:43.664] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:43.664] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.664] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.664] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.664] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.664] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.665] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:43.999] <TB3> INFO: Expecting 2560 events.
[14:09:45.070] <TB3> INFO: 2560 events read in total (354ms).
[14:09:45.070] <TB3> INFO: Test took 1405ms.
[14:09:45.071] <TB3> INFO: The DUT currently contains the following objects:
[14:09:45.071] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:45.071] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:45.071] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:45.071] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:45.071] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.071] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:45.485] <TB3> INFO: Expecting 2560 events.
[14:09:46.552] <TB3> INFO: 2560 events read in total (351ms).
[14:09:46.552] <TB3> INFO: Test took 1481ms.
[14:09:46.553] <TB3> INFO: The DUT currently contains the following objects:
[14:09:46.553] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:46.553] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:46.553] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:46.553] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:46.553] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.553] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.553] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.553] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.553] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.553] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.553] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.554] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:46.967] <TB3> INFO: Expecting 2560 events.
[14:09:48.036] <TB3> INFO: 2560 events read in total (352ms).
[14:09:48.036] <TB3> INFO: Test took 1482ms.
[14:09:48.037] <TB3> INFO: The DUT currently contains the following objects:
[14:09:48.037] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:48.037] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:48.037] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:48.037] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:48.037] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.037] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.038] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.038] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:48.451] <TB3> INFO: Expecting 2560 events.
[14:09:49.519] <TB3> INFO: 2560 events read in total (351ms).
[14:09:49.519] <TB3> INFO: Test took 1481ms.
[14:09:49.520] <TB3> INFO: The DUT currently contains the following objects:
[14:09:49.520] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:49.520] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:49.520] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:49.520] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:49.520] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.520] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:49.934] <TB3> INFO: Expecting 2560 events.
[14:09:51.001] <TB3> INFO: 2560 events read in total (351ms).
[14:09:51.001] <TB3> INFO: Test took 1481ms.
[14:09:51.001] <TB3> INFO: The DUT currently contains the following objects:
[14:09:51.001] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:51.002] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:51.002] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:51.002] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:51.002] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.002] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:51.416] <TB3> INFO: Expecting 2560 events.
[14:09:52.483] <TB3> INFO: 2560 events read in total (351ms).
[14:09:52.483] <TB3> INFO: Test took 1481ms.
[14:09:52.484] <TB3> INFO: The DUT currently contains the following objects:
[14:09:52.484] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:52.484] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:52.484] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:52.484] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:52.484] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.484] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:52.898] <TB3> INFO: Expecting 2560 events.
[14:09:53.967] <TB3> INFO: 2560 events read in total (352ms).
[14:09:53.967] <TB3> INFO: Test took 1483ms.
[14:09:53.968] <TB3> INFO: The DUT currently contains the following objects:
[14:09:53.968] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:53.968] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:53.968] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:53.968] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:53.968] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:53.968] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:54.382] <TB3> INFO: Expecting 2560 events.
[14:09:55.450] <TB3> INFO: 2560 events read in total (352ms).
[14:09:55.450] <TB3> INFO: Test took 1482ms.
[14:09:55.451] <TB3> INFO: The DUT currently contains the following objects:
[14:09:55.451] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:55.451] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:55.451] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:55.451] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:55.451] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.451] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.451] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.451] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.451] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.451] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.451] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.452] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:55.865] <TB3> INFO: Expecting 2560 events.
[14:09:56.936] <TB3> INFO: 2560 events read in total (354ms).
[14:09:56.936] <TB3> INFO: Test took 1484ms.
[14:09:56.936] <TB3> INFO: The DUT currently contains the following objects:
[14:09:56.936] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:56.936] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:56.936] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:56.937] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:56.937] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:56.937] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:57.351] <TB3> INFO: Expecting 2560 events.
[14:09:58.423] <TB3> INFO: 2560 events read in total (355ms).
[14:09:58.423] <TB3> INFO: Test took 1486ms.
[14:09:58.424] <TB3> INFO: The DUT currently contains the following objects:
[14:09:58.424] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:58.424] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:58.424] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:58.424] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:58.424] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.424] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:58.838] <TB3> INFO: Expecting 2560 events.
[14:09:59.906] <TB3> INFO: 2560 events read in total (351ms).
[14:09:59.906] <TB3> INFO: Test took 1481ms.
[14:09:59.907] <TB3> INFO: The DUT currently contains the following objects:
[14:09:59.907] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:59.907] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:09:59.907] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:09:59.907] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:09:59.907] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.907] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.908] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:09:59.908] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:00.321] <TB3> INFO: Expecting 2560 events.
[14:10:01.392] <TB3> INFO: 2560 events read in total (354ms).
[14:10:01.392] <TB3> INFO: Test took 1484ms.
[14:10:01.392] <TB3> INFO: The DUT currently contains the following objects:
[14:10:01.392] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:10:01.392] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:10:01.393] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:10:01.393] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:10:01.393] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.393] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:01.807] <TB3> INFO: Expecting 2560 events.
[14:10:02.875] <TB3> INFO: 2560 events read in total (352ms).
[14:10:02.875] <TB3> INFO: Test took 1482ms.
[14:10:02.876] <TB3> INFO: The DUT currently contains the following objects:
[14:10:02.876] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:10:02.876] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:10:02.876] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:10:02.876] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:10:02.876] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.876] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.876] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.876] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.876] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.876] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.876] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.876] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.876] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.877] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.877] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.877] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.877] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.877] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.877] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:02.877] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:03.290] <TB3> INFO: Expecting 2560 events.
[14:10:04.362] <TB3> INFO: 2560 events read in total (355ms).
[14:10:04.362] <TB3> INFO: Test took 1485ms.
[14:10:04.363] <TB3> INFO: The DUT currently contains the following objects:
[14:10:04.363] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:10:04.363] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:10:04.363] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:10:04.363] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:10:04.363] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.363] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.364] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:04.777] <TB3> INFO: Expecting 2560 events.
[14:10:05.845] <TB3> INFO: 2560 events read in total (352ms).
[14:10:05.845] <TB3> INFO: Test took 1481ms.
[14:10:05.846] <TB3> INFO: The DUT currently contains the following objects:
[14:10:05.846] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:10:05.846] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:10:05.846] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:10:05.846] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:10:05.846] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:05.846] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:06.260] <TB3> INFO: Expecting 2560 events.
[14:10:07.330] <TB3> INFO: 2560 events read in total (354ms).
[14:10:07.330] <TB3> INFO: Test took 1483ms.
[14:10:07.334] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:10:07.747] <TB3> INFO: Expecting 655360 events.
[14:10:24.556] <TB3> INFO: 655360 events read in total (16093ms).
[14:10:24.564] <TB3> INFO: Expecting 655360 events.
[14:10:41.119] <TB3> INFO: 655360 events read in total (16027ms).
[14:10:41.131] <TB3> INFO: Expecting 655360 events.
[14:10:57.754] <TB3> INFO: 655360 events read in total (16095ms).
[14:10:57.772] <TB3> INFO: Expecting 655360 events.
[14:11:14.176] <TB3> INFO: 655360 events read in total (15877ms).
[14:11:14.195] <TB3> INFO: Expecting 655360 events.
[14:11:30.725] <TB3> INFO: 655360 events read in total (16003ms).
[14:11:30.753] <TB3> INFO: Expecting 655360 events.
[14:11:47.215] <TB3> INFO: 655360 events read in total (15934ms).
[14:11:47.241] <TB3> INFO: Expecting 655360 events.
[14:12:03.981] <TB3> INFO: 655360 events read in total (16213ms).
[14:12:04.010] <TB3> INFO: Expecting 655360 events.
[14:12:20.309] <TB3> INFO: 655360 events read in total (15771ms).
[14:12:20.341] <TB3> INFO: Expecting 655360 events.
[14:12:37.006] <TB3> INFO: 655360 events read in total (16137ms).
[14:12:37.049] <TB3> INFO: Expecting 655360 events.
[14:12:53.613] <TB3> INFO: 655360 events read in total (16036ms).
[14:12:53.661] <TB3> INFO: Expecting 655360 events.
[14:13:10.027] <TB3> INFO: 655360 events read in total (15838ms).
[14:13:10.083] <TB3> INFO: Expecting 655360 events.
[14:13:26.337] <TB3> INFO: 655360 events read in total (15726ms).
[14:13:26.385] <TB3> INFO: Expecting 655360 events.
[14:13:42.827] <TB3> INFO: 655360 events read in total (15914ms).
[14:13:42.897] <TB3> INFO: Expecting 655360 events.
[14:13:59.502] <TB3> INFO: 655360 events read in total (16078ms).
[14:13:59.558] <TB3> INFO: Expecting 655360 events.
[14:14:16.180] <TB3> INFO: 655360 events read in total (16094ms).
[14:14:16.239] <TB3> INFO: Expecting 655360 events.
[14:14:33.022] <TB3> INFO: 655360 events read in total (16255ms).
[14:14:33.082] <TB3> INFO: Test took 265748ms.
[14:14:33.162] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:33.471] <TB3> INFO: Expecting 655360 events.
[14:14:50.127] <TB3> INFO: 655360 events read in total (15940ms).
[14:14:50.135] <TB3> INFO: Expecting 655360 events.
[14:15:06.793] <TB3> INFO: 655360 events read in total (16130ms).
[14:15:06.809] <TB3> INFO: Expecting 655360 events.
[14:15:23.740] <TB3> INFO: 655360 events read in total (16403ms).
[14:15:23.755] <TB3> INFO: Expecting 655360 events.
[14:15:40.438] <TB3> INFO: 655360 events read in total (16155ms).
[14:15:40.457] <TB3> INFO: Expecting 655360 events.
[14:15:56.749] <TB3> INFO: 655360 events read in total (15764ms).
[14:15:56.772] <TB3> INFO: Expecting 655360 events.
[14:16:13.347] <TB3> INFO: 655360 events read in total (16047ms).
[14:16:13.384] <TB3> INFO: Expecting 655360 events.
[14:16:29.813] <TB3> INFO: 655360 events read in total (15901ms).
[14:16:29.841] <TB3> INFO: Expecting 655360 events.
[14:16:46.324] <TB3> INFO: 655360 events read in total (15955ms).
[14:16:46.356] <TB3> INFO: Expecting 655360 events.
[14:17:02.737] <TB3> INFO: 655360 events read in total (15854ms).
[14:17:02.788] <TB3> INFO: Expecting 655360 events.
[14:17:19.288] <TB3> INFO: 655360 events read in total (15972ms).
[14:17:19.336] <TB3> INFO: Expecting 655360 events.
[14:17:35.913] <TB3> INFO: 655360 events read in total (16049ms).
[14:17:35.956] <TB3> INFO: Expecting 655360 events.
[14:17:52.340] <TB3> INFO: 655360 events read in total (15856ms).
[14:17:52.406] <TB3> INFO: Expecting 655360 events.
[14:18:07.500] <TB3> INFO: 655360 events read in total (14567ms).
[14:18:07.573] <TB3> INFO: Expecting 655360 events.
[14:18:22.718] <TB3> INFO: 655360 events read in total (14617ms).
[14:18:22.771] <TB3> INFO: Expecting 655360 events.
[14:18:38.597] <TB3> INFO: 655360 events read in total (15299ms).
[14:18:38.652] <TB3> INFO: Expecting 655360 events.
[14:18:55.019] <TB3> INFO: 655360 events read in total (15839ms).
[14:18:55.079] <TB3> INFO: Test took 261917ms.
[14:18:55.271] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.278] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.285] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.292] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.299] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.306] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.313] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.320] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.327] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.335] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.341] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.348] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.355] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.362] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.369] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.376] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:18:55.417] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:18:55.417] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:18:55.418] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:18:55.418] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:18:55.418] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:18:55.418] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:18:55.418] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:18:55.418] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:18:55.419] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:18:55.419] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:18:55.419] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:18:55.419] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:18:55.419] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:18:55.420] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:18:55.420] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:18:55.420] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:18:55.741] <TB3> INFO: Expecting 41600 events.
[14:19:00.244] <TB3> INFO: 41600 events read in total (3786ms).
[14:19:00.245] <TB3> INFO: Test took 4822ms.
[14:19:00.784] <TB3> INFO: Expecting 41600 events.
[14:19:05.247] <TB3> INFO: 41600 events read in total (3746ms).
[14:19:05.247] <TB3> INFO: Test took 4765ms.
[14:19:05.869] <TB3> INFO: Expecting 41600 events.
[14:19:10.346] <TB3> INFO: 41600 events read in total (3760ms).
[14:19:10.346] <TB3> INFO: Test took 4807ms.
[14:19:10.589] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:10.721] <TB3> INFO: Expecting 2560 events.
[14:19:11.789] <TB3> INFO: 2560 events read in total (351ms).
[14:19:11.790] <TB3> INFO: Test took 1201ms.
[14:19:11.792] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:12.206] <TB3> INFO: Expecting 2560 events.
[14:19:13.274] <TB3> INFO: 2560 events read in total (352ms).
[14:19:13.275] <TB3> INFO: Test took 1483ms.
[14:19:13.277] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:13.691] <TB3> INFO: Expecting 2560 events.
[14:19:14.760] <TB3> INFO: 2560 events read in total (352ms).
[14:19:14.760] <TB3> INFO: Test took 1483ms.
[14:19:14.763] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:15.176] <TB3> INFO: Expecting 2560 events.
[14:19:16.250] <TB3> INFO: 2560 events read in total (357ms).
[14:19:16.250] <TB3> INFO: Test took 1487ms.
[14:19:16.253] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:16.666] <TB3> INFO: Expecting 2560 events.
[14:19:17.734] <TB3> INFO: 2560 events read in total (352ms).
[14:19:17.734] <TB3> INFO: Test took 1481ms.
[14:19:17.737] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:18.150] <TB3> INFO: Expecting 2560 events.
[14:19:19.223] <TB3> INFO: 2560 events read in total (356ms).
[14:19:19.223] <TB3> INFO: Test took 1486ms.
[14:19:19.226] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:19.639] <TB3> INFO: Expecting 2560 events.
[14:19:20.714] <TB3> INFO: 2560 events read in total (359ms).
[14:19:20.714] <TB3> INFO: Test took 1488ms.
[14:19:20.717] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:21.130] <TB3> INFO: Expecting 2560 events.
[14:19:22.198] <TB3> INFO: 2560 events read in total (352ms).
[14:19:22.198] <TB3> INFO: Test took 1481ms.
[14:19:22.201] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:22.614] <TB3> INFO: Expecting 2560 events.
[14:19:23.683] <TB3> INFO: 2560 events read in total (352ms).
[14:19:23.683] <TB3> INFO: Test took 1482ms.
[14:19:23.685] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:24.100] <TB3> INFO: Expecting 2560 events.
[14:19:25.171] <TB3> INFO: 2560 events read in total (354ms).
[14:19:25.171] <TB3> INFO: Test took 1486ms.
[14:19:25.173] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:25.587] <TB3> INFO: Expecting 2560 events.
[14:19:26.671] <TB3> INFO: 2560 events read in total (368ms).
[14:19:26.671] <TB3> INFO: Test took 1498ms.
[14:19:26.678] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:27.087] <TB3> INFO: Expecting 2560 events.
[14:19:28.155] <TB3> INFO: 2560 events read in total (351ms).
[14:19:28.156] <TB3> INFO: Test took 1478ms.
[14:19:28.158] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:28.572] <TB3> INFO: Expecting 2560 events.
[14:19:29.640] <TB3> INFO: 2560 events read in total (352ms).
[14:19:29.640] <TB3> INFO: Test took 1482ms.
[14:19:29.643] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:30.056] <TB3> INFO: Expecting 2560 events.
[14:19:31.127] <TB3> INFO: 2560 events read in total (354ms).
[14:19:31.128] <TB3> INFO: Test took 1485ms.
[14:19:31.130] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:31.544] <TB3> INFO: Expecting 2560 events.
[14:19:32.626] <TB3> INFO: 2560 events read in total (366ms).
[14:19:32.627] <TB3> INFO: Test took 1497ms.
[14:19:32.630] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:33.043] <TB3> INFO: Expecting 2560 events.
[14:19:34.115] <TB3> INFO: 2560 events read in total (355ms).
[14:19:34.116] <TB3> INFO: Test took 1487ms.
[14:19:34.118] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:34.532] <TB3> INFO: Expecting 2560 events.
[14:19:35.600] <TB3> INFO: 2560 events read in total (351ms).
[14:19:35.601] <TB3> INFO: Test took 1483ms.
[14:19:35.603] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:36.017] <TB3> INFO: Expecting 2560 events.
[14:19:37.102] <TB3> INFO: 2560 events read in total (368ms).
[14:19:37.103] <TB3> INFO: Test took 1500ms.
[14:19:37.105] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:37.519] <TB3> INFO: Expecting 2560 events.
[14:19:38.587] <TB3> INFO: 2560 events read in total (352ms).
[14:19:38.587] <TB3> INFO: Test took 1483ms.
[14:19:38.590] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:39.004] <TB3> INFO: Expecting 2560 events.
[14:19:40.073] <TB3> INFO: 2560 events read in total (352ms).
[14:19:40.074] <TB3> INFO: Test took 1484ms.
[14:19:40.076] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:40.491] <TB3> INFO: Expecting 2560 events.
[14:19:41.561] <TB3> INFO: 2560 events read in total (354ms).
[14:19:41.561] <TB3> INFO: Test took 1485ms.
[14:19:41.565] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:41.977] <TB3> INFO: Expecting 2560 events.
[14:19:43.049] <TB3> INFO: 2560 events read in total (356ms).
[14:19:43.049] <TB3> INFO: Test took 1485ms.
[14:19:43.054] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:43.465] <TB3> INFO: Expecting 2560 events.
[14:19:44.536] <TB3> INFO: 2560 events read in total (355ms).
[14:19:44.537] <TB3> INFO: Test took 1483ms.
[14:19:44.540] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:44.952] <TB3> INFO: Expecting 2560 events.
[14:19:46.019] <TB3> INFO: 2560 events read in total (350ms).
[14:19:46.020] <TB3> INFO: Test took 1481ms.
[14:19:46.022] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:46.436] <TB3> INFO: Expecting 2560 events.
[14:19:47.504] <TB3> INFO: 2560 events read in total (352ms).
[14:19:47.504] <TB3> INFO: Test took 1482ms.
[14:19:47.507] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:47.920] <TB3> INFO: Expecting 2560 events.
[14:19:48.988] <TB3> INFO: 2560 events read in total (352ms).
[14:19:48.988] <TB3> INFO: Test took 1482ms.
[14:19:48.991] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:49.404] <TB3> INFO: Expecting 2560 events.
[14:19:50.471] <TB3> INFO: 2560 events read in total (351ms).
[14:19:50.471] <TB3> INFO: Test took 1480ms.
[14:19:50.474] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:50.888] <TB3> INFO: Expecting 2560 events.
[14:19:51.957] <TB3> INFO: 2560 events read in total (353ms).
[14:19:51.957] <TB3> INFO: Test took 1483ms.
[14:19:51.960] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:52.372] <TB3> INFO: Expecting 2560 events.
[14:19:53.441] <TB3> INFO: 2560 events read in total (352ms).
[14:19:53.441] <TB3> INFO: Test took 1481ms.
[14:19:53.444] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:53.858] <TB3> INFO: Expecting 2560 events.
[14:19:54.926] <TB3> INFO: 2560 events read in total (352ms).
[14:19:54.927] <TB3> INFO: Test took 1483ms.
[14:19:54.929] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:55.343] <TB3> INFO: Expecting 2560 events.
[14:19:56.414] <TB3> INFO: 2560 events read in total (355ms).
[14:19:56.414] <TB3> INFO: Test took 1485ms.
[14:19:56.417] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:56.830] <TB3> INFO: Expecting 2560 events.
[14:19:57.897] <TB3> INFO: 2560 events read in total (351ms).
[14:19:57.898] <TB3> INFO: Test took 1481ms.
[14:19:58.525] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 629 seconds
[14:19:58.525] <TB3> INFO: PH scale (per ROC): 79 70 78 77 79 80 77 85 88 79 84 85 79 95 82 83
[14:19:58.525] <TB3> INFO: PH offset (per ROC): 163 159 169 180 149 174 178 154 155 171 164 144 145 149 162 166
[14:19:58.700] <TB3> INFO: ######################################################################
[14:19:58.700] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:19:58.700] <TB3> INFO: ######################################################################
[14:19:58.709] <TB3> INFO: scanning low vcal = 10
[14:19:59.009] <TB3> INFO: Expecting 41600 events.
[14:20:02.608] <TB3> INFO: 41600 events read in total (2883ms).
[14:20:02.608] <TB3> INFO: Test took 3898ms.
[14:20:02.610] <TB3> INFO: scanning low vcal = 20
[14:20:03.023] <TB3> INFO: Expecting 41600 events.
[14:20:06.660] <TB3> INFO: 41600 events read in total (2920ms).
[14:20:06.660] <TB3> INFO: Test took 4050ms.
[14:20:06.662] <TB3> INFO: scanning low vcal = 30
[14:20:07.075] <TB3> INFO: Expecting 41600 events.
[14:20:10.706] <TB3> INFO: 41600 events read in total (2914ms).
[14:20:10.706] <TB3> INFO: Test took 4044ms.
[14:20:10.708] <TB3> INFO: scanning low vcal = 40
[14:20:11.115] <TB3> INFO: Expecting 41600 events.
[14:20:15.372] <TB3> INFO: 41600 events read in total (3541ms).
[14:20:15.372] <TB3> INFO: Test took 4664ms.
[14:20:15.375] <TB3> INFO: scanning low vcal = 50
[14:20:15.707] <TB3> INFO: Expecting 41600 events.
[14:20:19.899] <TB3> INFO: 41600 events read in total (3475ms).
[14:20:19.899] <TB3> INFO: Test took 4524ms.
[14:20:19.902] <TB3> INFO: scanning low vcal = 60
[14:20:20.260] <TB3> INFO: Expecting 41600 events.
[14:20:24.476] <TB3> INFO: 41600 events read in total (3500ms).
[14:20:24.476] <TB3> INFO: Test took 4574ms.
[14:20:24.479] <TB3> INFO: scanning low vcal = 70
[14:20:24.837] <TB3> INFO: Expecting 41600 events.
[14:20:29.110] <TB3> INFO: 41600 events read in total (3557ms).
[14:20:29.110] <TB3> INFO: Test took 4631ms.
[14:20:29.114] <TB3> INFO: scanning low vcal = 80
[14:20:29.435] <TB3> INFO: Expecting 41600 events.
[14:20:33.722] <TB3> INFO: 41600 events read in total (3571ms).
[14:20:33.722] <TB3> INFO: Test took 4608ms.
[14:20:33.726] <TB3> INFO: scanning low vcal = 90
[14:20:34.061] <TB3> INFO: Expecting 41600 events.
[14:20:38.538] <TB3> INFO: 41600 events read in total (3760ms).
[14:20:38.539] <TB3> INFO: Test took 4813ms.
[14:20:38.542] <TB3> INFO: scanning low vcal = 100
[14:20:38.900] <TB3> INFO: Expecting 41600 events.
[14:20:43.074] <TB3> INFO: 41600 events read in total (3458ms).
[14:20:43.075] <TB3> INFO: Test took 4533ms.
[14:20:43.077] <TB3> INFO: scanning low vcal = 110
[14:20:43.427] <TB3> INFO: Expecting 41600 events.
[14:20:47.663] <TB3> INFO: 41600 events read in total (3520ms).
[14:20:47.663] <TB3> INFO: Test took 4586ms.
[14:20:47.667] <TB3> INFO: scanning low vcal = 120
[14:20:48.012] <TB3> INFO: Expecting 41600 events.
[14:20:52.234] <TB3> INFO: 41600 events read in total (3506ms).
[14:20:52.235] <TB3> INFO: Test took 4568ms.
[14:20:52.237] <TB3> INFO: scanning low vcal = 130
[14:20:52.591] <TB3> INFO: Expecting 41600 events.
[14:20:56.889] <TB3> INFO: 41600 events read in total (3581ms).
[14:20:56.890] <TB3> INFO: Test took 4652ms.
[14:20:56.893] <TB3> INFO: scanning low vcal = 140
[14:20:57.245] <TB3> INFO: Expecting 41600 events.
[14:21:01.510] <TB3> INFO: 41600 events read in total (3548ms).
[14:21:01.510] <TB3> INFO: Test took 4617ms.
[14:21:01.513] <TB3> INFO: scanning low vcal = 150
[14:21:01.858] <TB3> INFO: Expecting 41600 events.
[14:21:06.046] <TB3> INFO: 41600 events read in total (3472ms).
[14:21:06.046] <TB3> INFO: Test took 4533ms.
[14:21:06.049] <TB3> INFO: scanning low vcal = 160
[14:21:06.405] <TB3> INFO: Expecting 41600 events.
[14:21:10.588] <TB3> INFO: 41600 events read in total (3467ms).
[14:21:10.588] <TB3> INFO: Test took 4538ms.
[14:21:10.591] <TB3> INFO: scanning low vcal = 170
[14:21:10.948] <TB3> INFO: Expecting 41600 events.
[14:21:15.097] <TB3> INFO: 41600 events read in total (3433ms).
[14:21:15.097] <TB3> INFO: Test took 4506ms.
[14:21:15.101] <TB3> INFO: scanning low vcal = 180
[14:21:15.459] <TB3> INFO: Expecting 41600 events.
[14:21:19.766] <TB3> INFO: 41600 events read in total (3591ms).
[14:21:19.767] <TB3> INFO: Test took 4666ms.
[14:21:19.770] <TB3> INFO: scanning low vcal = 190
[14:21:20.091] <TB3> INFO: Expecting 41600 events.
[14:21:24.343] <TB3> INFO: 41600 events read in total (3535ms).
[14:21:24.343] <TB3> INFO: Test took 4573ms.
[14:21:24.346] <TB3> INFO: scanning low vcal = 200
[14:21:24.698] <TB3> INFO: Expecting 41600 events.
[14:21:28.890] <TB3> INFO: 41600 events read in total (3475ms).
[14:21:28.891] <TB3> INFO: Test took 4545ms.
[14:21:28.894] <TB3> INFO: scanning low vcal = 210
[14:21:29.246] <TB3> INFO: Expecting 41600 events.
[14:21:33.460] <TB3> INFO: 41600 events read in total (3495ms).
[14:21:33.461] <TB3> INFO: Test took 4567ms.
[14:21:33.463] <TB3> INFO: scanning low vcal = 220
[14:21:33.791] <TB3> INFO: Expecting 41600 events.
[14:21:38.025] <TB3> INFO: 41600 events read in total (3517ms).
[14:21:38.025] <TB3> INFO: Test took 4562ms.
[14:21:38.028] <TB3> INFO: scanning low vcal = 230
[14:21:38.370] <TB3> INFO: Expecting 41600 events.
[14:21:42.527] <TB3> INFO: 41600 events read in total (3441ms).
[14:21:42.527] <TB3> INFO: Test took 4499ms.
[14:21:42.530] <TB3> INFO: scanning low vcal = 240
[14:21:42.886] <TB3> INFO: Expecting 41600 events.
[14:21:47.066] <TB3> INFO: 41600 events read in total (3463ms).
[14:21:47.067] <TB3> INFO: Test took 4537ms.
[14:21:47.070] <TB3> INFO: scanning low vcal = 250
[14:21:47.409] <TB3> INFO: Expecting 41600 events.
[14:21:51.615] <TB3> INFO: 41600 events read in total (3490ms).
[14:21:51.615] <TB3> INFO: Test took 4545ms.
[14:21:51.619] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:21:51.975] <TB3> INFO: Expecting 41600 events.
[14:21:56.276] <TB3> INFO: 41600 events read in total (3585ms).
[14:21:56.276] <TB3> INFO: Test took 4657ms.
[14:21:56.279] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:21:56.607] <TB3> INFO: Expecting 41600 events.
[14:22:00.720] <TB3> INFO: 41600 events read in total (3397ms).
[14:22:00.720] <TB3> INFO: Test took 4441ms.
[14:22:00.723] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:22:01.083] <TB3> INFO: Expecting 41600 events.
[14:22:05.132] <TB3> INFO: 41600 events read in total (3332ms).
[14:22:05.133] <TB3> INFO: Test took 4410ms.
[14:22:05.136] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:22:05.496] <TB3> INFO: Expecting 41600 events.
[14:22:09.630] <TB3> INFO: 41600 events read in total (3418ms).
[14:22:09.631] <TB3> INFO: Test took 4495ms.
[14:22:09.633] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:22:09.993] <TB3> INFO: Expecting 41600 events.
[14:22:13.988] <TB3> INFO: 41600 events read in total (3279ms).
[14:22:13.989] <TB3> INFO: Test took 4356ms.
[14:22:14.401] <TB3> INFO: PixTestGainPedestal::measure() done
[14:22:44.815] <TB3> INFO: PixTestGainPedestal::fit() done
[14:22:44.815] <TB3> INFO: non-linearity mean: 0.962 0.957 0.952 0.956 0.963 0.956 0.953 0.958 0.959 0.954 0.951 0.959 0.947 0.957 0.967 0.958
[14:22:44.816] <TB3> INFO: non-linearity RMS: 0.005 0.005 0.006 0.006 0.006 0.005 0.007 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.005 0.006
[14:22:44.816] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:22:44.835] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:22:44.853] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:22:44.872] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:22:44.890] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:22:44.909] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:22:44.928] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:22:44.946] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:22:44.965] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:22:44.984] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:22:45.002] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:22:45.022] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:22:45.041] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:22:45.060] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:22:45.078] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:22:45.097] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:22:45.116] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 166 seconds
[14:22:45.122] <TB3> INFO: readReadbackCal: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C15.dat
[14:22:45.123] <TB3> INFO: PixTestReadback::doTest() start.
[14:22:45.124] <TB3> INFO: PixTestReadback::RES sent once
[14:22:56.366] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C0.dat
[14:22:56.366] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C1.dat
[14:22:56.366] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C2.dat
[14:22:56.366] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C3.dat
[14:22:56.366] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C4.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C5.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C6.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C7.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C8.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C9.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C10.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C11.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C12.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C13.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C14.dat
[14:22:56.367] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C15.dat
[14:22:56.399] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:22:56.399] <TB3> INFO: PixTestReadback::RES sent once
[14:23:07.612] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C0.dat
[14:23:07.612] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C1.dat
[14:23:07.612] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C2.dat
[14:23:07.612] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C3.dat
[14:23:07.612] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C4.dat
[14:23:07.612] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C5.dat
[14:23:07.612] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C6.dat
[14:23:07.612] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C7.dat
[14:23:07.613] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C8.dat
[14:23:07.613] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C9.dat
[14:23:07.613] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C10.dat
[14:23:07.613] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C11.dat
[14:23:07.613] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C12.dat
[14:23:07.613] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C13.dat
[14:23:07.613] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C14.dat
[14:23:07.613] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C15.dat
[14:23:07.644] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:23:07.645] <TB3> INFO: PixTestReadback::RES sent once
[14:23:16.262] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:23:16.262] <TB3> INFO: Vbg will be calibrated using Vd calibration
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 147.3calibrated Vbg = 1.20182 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.4calibrated Vbg = 1.20364 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 161.2calibrated Vbg = 1.2026 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 145.4calibrated Vbg = 1.20977 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.9calibrated Vbg = 1.21327 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.8calibrated Vbg = 1.21061 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.2calibrated Vbg = 1.21823 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.5calibrated Vbg = 1.21313 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 158calibrated Vbg = 1.21516 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.4calibrated Vbg = 1.20997 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159.4calibrated Vbg = 1.21214 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.4calibrated Vbg = 1.20627 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 148.7calibrated Vbg = 1.20183 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156calibrated Vbg = 1.20431 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.3calibrated Vbg = 1.20518 :::*/*/*/*/
[14:23:16.262] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 148calibrated Vbg = 1.20202 :::*/*/*/*/
[14:23:16.264] <TB3> INFO: PixTestReadback::RES sent once
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C0.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C1.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C2.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C3.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C4.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C5.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C6.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C7.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C8.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C9.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C10.dat
[14:26:10.781] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C11.dat
[14:26:10.782] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C12.dat
[14:26:10.782] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C13.dat
[14:26:10.782] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C14.dat
[14:26:10.782] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C15.dat
[14:26:10.812] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:26:10.812] <TB3> INFO: PixTestReadback::doTest() done
[14:26:10.828] <TB3> INFO: enter test to run
[14:26:10.828] <TB3> INFO: test: exit no parameter change
[14:26:11.388] <TB3> QUIET: Connection to board 170 closed.
[14:26:11.467] <TB3> INFO: pXar: this is the end, my friend