[09:15:07.683] <TB3> INFO: *** Welcome to pxar ***
[09:15:07.683] <TB3> INFO: *** Today: 2015/08/31
[09:15:07.683] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C15.dat
[09:15:07.685] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:15:07.685] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//defaultMaskFile.dat
[09:15:07.685] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters_C15.dat
[09:15:07.758] <TB3> INFO: clk: 4
[09:15:07.758] <TB3> INFO: ctr: 4
[09:15:07.758] <TB3> INFO: sda: 19
[09:15:07.758] <TB3> INFO: tin: 9
[09:15:07.758] <TB3> INFO: level: 15
[09:15:07.758] <TB3> INFO: triggerdelay: 0
[09:15:07.758] <TB3> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[09:15:07.758] <TB3> INFO: Log level: INFO
[09:15:07.765] <TB3> INFO: Found DTB DTB_WZ4I6J
[09:15:07.775] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[09:15:07.779] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[09:15:07.781] <TB3> INFO: RPC call hashes of host and DTB match: 397073690
[09:15:09.309] <TB3> INFO: DUT info:
[09:15:09.309] <TB3> INFO: The DUT currently contains the following objects:
[09:15:09.309] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[09:15:09.309] <TB3> INFO: TBM Core alpha (0): 7 registers set
[09:15:09.309] <TB3> INFO: TBM Core beta (1): 7 registers set
[09:15:09.309] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:15:09.309] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.309] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.309] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.309] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.309] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.309] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.309] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.310] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:15:09.711] <TB3> INFO: enter 'restricted' command line mode
[09:15:09.711] <TB3> INFO: enter test to run
[09:15:09.711] <TB3> INFO: test: pretest no parameter change
[09:15:09.711] <TB3> INFO: running: pretest
[09:15:09.718] <TB3> INFO: ######################################################################
[09:15:09.718] <TB3> INFO: PixTestPretest::doTest()
[09:15:09.718] <TB3> INFO: ######################################################################
[09:15:09.720] <TB3> INFO: ----------------------------------------------------------------------
[09:15:09.720] <TB3> INFO: PixTestPretest::programROC()
[09:15:09.720] <TB3> INFO: ----------------------------------------------------------------------
[09:15:27.737] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:15:27.737] <TB3> INFO: IA differences per ROC: 19.3 20.1 20.1 16.9 17.7 17.7 16.1 17.7 17.7 18.5 17.7 20.1 17.7 23.3 19.3 19.3
[09:15:27.815] <TB3> INFO: ----------------------------------------------------------------------
[09:15:27.815] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:15:27.815] <TB3> INFO: ----------------------------------------------------------------------
[09:15:47.389] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[09:15:47.391] <TB3> INFO: ----------------------------------------------------------------------
[09:15:47.391] <TB3> INFO: PixTestPretest::findTiming()
[09:15:47.391] <TB3> INFO: ----------------------------------------------------------------------
[09:15:47.391] <TB3> INFO: PixTestCmd::init()

[09:18:15.470] <TB3> INFO: TBM phases: 160MHz: 4, 400MHz: 6, TBM delays: ROC(0/1):3, header/trailer: 1, token: 0
[09:18:15.470] <TB3> INFO: (success/tries = 100/100), width = 4
[09:18:15.473] <TB3> INFO: ----------------------------------------------------------------------
[09:18:15.473] <TB3> INFO: PixTestPretest::findWorkingPixel()
[09:18:15.473] <TB3> INFO: ----------------------------------------------------------------------
[09:18:15.612] <TB3> INFO: Expecting 231680 events.
[09:18:24.337] <TB3> INFO: 231680 events read in total (8008ms).
[09:18:24.341] <TB3> INFO: Test took 8863ms.
[09:18:24.644] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:18:24.685] <TB3> INFO: ----------------------------------------------------------------------
[09:18:24.685] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[09:18:24.685] <TB3> INFO: ----------------------------------------------------------------------
[09:18:24.824] <TB3> INFO: Expecting 231680 events.
[09:18:34.073] <TB3> INFO: 231680 events read in total (8533ms).
[09:18:34.078] <TB3> INFO: Test took 9386ms.
[09:18:34.403] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[09:18:34.403] <TB3> INFO: CalDel: 153 161 144 138 169 146 135 138 139 146 142 137 140 132 144 112
[09:18:34.403] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:18:34.407] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C0.dat
[09:18:34.407] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C1.dat
[09:18:34.407] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C2.dat
[09:18:34.407] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C3.dat
[09:18:34.408] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C4.dat
[09:18:34.408] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C5.dat
[09:18:34.409] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C6.dat
[09:18:34.409] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C7.dat
[09:18:34.409] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C8.dat
[09:18:34.410] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C9.dat
[09:18:34.410] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C10.dat
[09:18:34.410] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C11.dat
[09:18:34.410] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C12.dat
[09:18:34.411] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C13.dat
[09:18:34.411] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C14.dat
[09:18:34.412] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C15.dat
[09:18:34.412] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//tbmParameters_C0a.dat
[09:18:34.412] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:18:34.412] <TB3> INFO: PixTestPretest::doTest() done, duration: 204 seconds
[09:18:34.479] <TB3> INFO: enter test to run
[09:18:34.479] <TB3> INFO: test: fulltest no parameter change
[09:18:34.479] <TB3> INFO: running: fulltest
[09:18:34.479] <TB3> INFO: ######################################################################
[09:18:34.479] <TB3> INFO: PixTestFullTest::doTest()
[09:18:34.479] <TB3> INFO: ######################################################################
[09:18:34.480] <TB3> INFO: ######################################################################
[09:18:34.480] <TB3> INFO: PixTestAlive::doTest()
[09:18:34.480] <TB3> INFO: ######################################################################
[09:18:34.482] <TB3> INFO: ----------------------------------------------------------------------
[09:18:34.482] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:18:34.482] <TB3> INFO: ----------------------------------------------------------------------
[09:18:34.788] <TB3> INFO: Expecting 41600 events.
[09:18:39.221] <TB3> INFO: 41600 events read in total (3717ms).
[09:18:39.222] <TB3> INFO: Test took 4739ms.
[09:18:39.228] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:39.524] <TB3> INFO: PixTestAlive::aliveTest() done
[09:18:39.524] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 3 0 0 1 0 0 0 0
[09:18:39.526] <TB3> INFO: ----------------------------------------------------------------------
[09:18:39.526] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:18:39.526] <TB3> INFO: ----------------------------------------------------------------------
[09:18:39.842] <TB3> INFO: Expecting 41600 events.
[09:18:42.974] <TB3> INFO: 41600 events read in total (2415ms).
[09:18:42.974] <TB3> INFO: Test took 3446ms.
[09:18:42.974] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:42.974] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:18:43.290] <TB3> INFO: PixTestAlive::maskTest() done
[09:18:43.290] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:18:43.291] <TB3> INFO: ----------------------------------------------------------------------
[09:18:43.291] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:18:43.291] <TB3> INFO: ----------------------------------------------------------------------
[09:18:43.605] <TB3> INFO: Expecting 41600 events.
[09:18:48.036] <TB3> INFO: 41600 events read in total (3715ms).
[09:18:48.036] <TB3> INFO: Test took 4743ms.
[09:18:48.042] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:48.336] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[09:18:48.336] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:18:48.337] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[09:18:48.348] <TB3> INFO: ######################################################################
[09:18:48.348] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:18:48.348] <TB3> INFO: ######################################################################
[09:18:48.352] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[09:18:48.365] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:18:48.365] <TB3> INFO: run 1 of 1
[09:18:48.690] <TB3> INFO: Expecting 3120000 events.
[09:19:23.919] <TB3> INFO: 839730 events read in total (34513ms).
[09:19:56.070] <TB3> INFO: 1668575 events read in total (66664ms).
[09:20:30.645] <TB3> INFO: 2505500 events read in total (101240ms).
[09:20:54.237] <TB3> INFO: 3120000 events read in total (124831ms).
[09:20:54.282] <TB3> INFO: Test took 125918ms.
[09:20:54.387] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:18.663] <TB3> INFO: PixTestBBMap::doTest() done, duration: 150 seconds
[09:21:18.663] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 3 0 0 0 0 0 0 1
[09:21:18.663] <TB3> INFO: separation cut (per ROC): 81 80 96 86 78 99 85 87 84 79 94 87 78 81 76 90
[09:21:18.739] <TB3> INFO: ######################################################################
[09:21:18.739] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:21:18.739] <TB3> INFO: ######################################################################
[09:21:18.739] <TB3> INFO: ----------------------------------------------------------------------
[09:21:18.739] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:21:18.739] <TB3> INFO: ----------------------------------------------------------------------
[09:21:18.739] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[09:21:18.748] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[09:21:18.748] <TB3> INFO: run 1 of 1
[09:21:19.069] <TB3> INFO: Expecting 31200000 events.
[09:21:44.146] <TB3> INFO: 958800 events read in total (24360ms).
[09:22:08.368] <TB3> INFO: 1902450 events read in total (48582ms).
[09:22:32.510] <TB3> INFO: 2841150 events read in total (72724ms).
[09:22:56.810] <TB3> INFO: 3782150 events read in total (97024ms).
[09:23:20.802] <TB3> INFO: 4716750 events read in total (121016ms).
[09:23:44.844] <TB3> INFO: 5654250 events read in total (145058ms).
[09:24:08.928] <TB3> INFO: 6590950 events read in total (169142ms).
[09:24:32.991] <TB3> INFO: 7525750 events read in total (193205ms).
[09:24:57.233] <TB3> INFO: 8459500 events read in total (217447ms).
[09:25:21.230] <TB3> INFO: 9391400 events read in total (241444ms).
[09:25:45.229] <TB3> INFO: 10325550 events read in total (265443ms).
[09:26:09.074] <TB3> INFO: 11258250 events read in total (289288ms).
[09:26:33.119] <TB3> INFO: 12192000 events read in total (313333ms).
[09:26:57.276] <TB3> INFO: 13122150 events read in total (337490ms).
[09:27:21.276] <TB3> INFO: 14052700 events read in total (361490ms).
[09:27:45.228] <TB3> INFO: 14983300 events read in total (385442ms).
[09:28:09.081] <TB3> INFO: 15907400 events read in total (409295ms).
[09:28:33.054] <TB3> INFO: 16831350 events read in total (433268ms).
[09:28:57.093] <TB3> INFO: 17750200 events read in total (457307ms).
[09:29:21.174] <TB3> INFO: 18672250 events read in total (481388ms).
[09:29:44.914] <TB3> INFO: 19587950 events read in total (505128ms).
[09:30:08.902] <TB3> INFO: 20506900 events read in total (529116ms).
[09:30:33.016] <TB3> INFO: 21424250 events read in total (553230ms).
[09:30:57.119] <TB3> INFO: 22341700 events read in total (577333ms).
[09:31:21.180] <TB3> INFO: 23256050 events read in total (601394ms).
[09:31:45.198] <TB3> INFO: 24173300 events read in total (625412ms).
[09:32:09.014] <TB3> INFO: 25087400 events read in total (649228ms).
[09:32:32.892] <TB3> INFO: 26005150 events read in total (673106ms).
[09:32:56.880] <TB3> INFO: 26918000 events read in total (697094ms).
[09:33:20.817] <TB3> INFO: 27837750 events read in total (721031ms).
[09:33:44.759] <TB3> INFO: 28754100 events read in total (744973ms).
[09:34:07.030] <TB3> INFO: 29672600 events read in total (767244ms).
[09:34:29.086] <TB3> INFO: 30590600 events read in total (789300ms).
[09:34:44.895] <TB3> INFO: 31200000 events read in total (805109ms).
[09:34:44.925] <TB3> INFO: Test took 806177ms.
[09:34:45.007] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:45.112] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:46.607] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:48.106] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:49.496] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:51.026] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:52.585] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:54.020] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:55.420] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:56.806] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:58.193] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:34:59.602] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:35:00.985] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:35:02.368] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:35:03.794] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:35:05.233] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:35:06.630] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:35:08.058] <TB3> INFO: PixTestScurves::scurves() done
[09:35:08.058] <TB3> INFO: Vcal mean: 87.44 88.13 93.64 93.48 86.76 100.38 92.62 86.74 88.82 86.91 93.80 90.34 77.53 81.13 85.02 96.50
[09:35:08.058] <TB3> INFO: Vcal RMS: 5.22 5.57 6.23 5.95 5.07 5.86 5.28 5.31 5.83 5.70 5.95 5.23 4.83 4.41 5.55 5.61
[09:35:08.059] <TB3> INFO: PixTestScurves::fullTest() done, duration: 829 seconds
[09:35:08.136] <TB3> INFO: ######################################################################
[09:35:08.136] <TB3> INFO: PixTestTrim::doTest()
[09:35:08.136] <TB3> INFO: ######################################################################
[09:35:08.137] <TB3> INFO: ----------------------------------------------------------------------
[09:35:08.137] <TB3> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[09:35:08.137] <TB3> INFO: ----------------------------------------------------------------------
[09:35:08.223] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:35:08.223] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:35:08.233] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:35:08.233] <TB3> INFO: run 1 of 1
[09:35:08.551] <TB3> INFO: Expecting 13312000 events.
[09:35:34.834] <TB3> INFO: 1081160 events read in total (25566ms).
[09:36:00.237] <TB3> INFO: 2154880 events read in total (50969ms).
[09:36:25.544] <TB3> INFO: 3228860 events read in total (76276ms).
[09:36:52.821] <TB3> INFO: 4299380 events read in total (103553ms).
[09:37:20.271] <TB3> INFO: 5365840 events read in total (131003ms).
[09:37:47.753] <TB3> INFO: 6429140 events read in total (158485ms).
[09:38:15.137] <TB3> INFO: 7496700 events read in total (185869ms).
[09:38:42.617] <TB3> INFO: 8565620 events read in total (213349ms).
[09:39:09.940] <TB3> INFO: 9636000 events read in total (240672ms).
[09:39:37.603] <TB3> INFO: 10708100 events read in total (268335ms).
[09:40:04.450] <TB3> INFO: 11781780 events read in total (295182ms).
[09:40:31.329] <TB3> INFO: 12856840 events read in total (322061ms).
[09:40:43.246] <TB3> INFO: 13312000 events read in total (333978ms).
[09:40:43.279] <TB3> INFO: Test took 335046ms.
[09:40:43.330] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:03.382] <TB3> INFO: ROC 0 VthrComp = 94
[09:41:03.382] <TB3> INFO: ROC 1 VthrComp = 92
[09:41:03.382] <TB3> INFO: ROC 2 VthrComp = 98
[09:41:03.382] <TB3> INFO: ROC 3 VthrComp = 95
[09:41:03.382] <TB3> INFO: ROC 4 VthrComp = 90
[09:41:03.382] <TB3> INFO: ROC 5 VthrComp = 102
[09:41:03.382] <TB3> INFO: ROC 6 VthrComp = 96
[09:41:03.382] <TB3> INFO: ROC 7 VthrComp = 96
[09:41:03.382] <TB3> INFO: ROC 8 VthrComp = 95
[09:41:03.383] <TB3> INFO: ROC 9 VthrComp = 89
[09:41:03.383] <TB3> INFO: ROC 10 VthrComp = 98
[09:41:03.383] <TB3> INFO: ROC 11 VthrComp = 98
[09:41:03.383] <TB3> INFO: ROC 12 VthrComp = 83
[09:41:03.383] <TB3> INFO: ROC 13 VthrComp = 91
[09:41:03.383] <TB3> INFO: ROC 14 VthrComp = 87
[09:41:03.383] <TB3> INFO: ROC 15 VthrComp = 101
[09:41:03.383] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:41:03.383] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:41:03.393] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:41:03.393] <TB3> INFO: run 1 of 1
[09:41:03.719] <TB3> INFO: Expecting 13312000 events.
[09:41:29.456] <TB3> INFO: 780500 events read in total (25021ms).
[09:41:54.331] <TB3> INFO: 1557660 events read in total (49896ms).
[09:42:19.335] <TB3> INFO: 2334500 events read in total (74900ms).
[09:42:41.701] <TB3> INFO: 3110840 events read in total (97266ms).
[09:43:06.687] <TB3> INFO: 3887160 events read in total (122252ms).
[09:43:31.577] <TB3> INFO: 4664260 events read in total (147142ms).
[09:43:56.337] <TB3> INFO: 5441240 events read in total (171902ms).
[09:44:21.066] <TB3> INFO: 6217660 events read in total (196631ms).
[09:44:45.821] <TB3> INFO: 6991200 events read in total (221386ms).
[09:45:10.766] <TB3> INFO: 7761600 events read in total (246331ms).
[09:45:35.561] <TB3> INFO: 8529540 events read in total (271126ms).
[09:46:00.524] <TB3> INFO: 9296860 events read in total (296089ms).
[09:46:25.197] <TB3> INFO: 10062860 events read in total (320762ms).
[09:46:49.996] <TB3> INFO: 10828280 events read in total (345561ms).
[09:47:14.780] <TB3> INFO: 11593360 events read in total (370345ms).
[09:47:37.526] <TB3> INFO: 12359080 events read in total (393091ms).
[09:48:01.573] <TB3> INFO: 13125520 events read in total (417138ms).
[09:48:07.872] <TB3> INFO: 13312000 events read in total (423437ms).
[09:48:07.913] <TB3> INFO: Test took 424520ms.
[09:48:08.063] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:33.649] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.9245 for pixel 18/72 mean/min/max = 45.1437/32.356/57.9314
[09:48:33.649] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.6087 for pixel 25/73 mean/min/max = 45.5006/31.3924/59.6088
[09:48:33.649] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.0893 for pixel 24/79 mean/min/max = 46.3947/31.6471/61.1423
[09:48:33.650] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.5714 for pixel 9/4 mean/min/max = 46.207/31.6913/60.7227
[09:48:33.650] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 58.1386 for pixel 51/19 mean/min/max = 45.393/32.5919/58.1942
[09:48:33.650] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 61.3838 for pixel 18/75 mean/min/max = 46.4104/31.3782/61.4426
[09:48:33.650] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 59.078 for pixel 17/11 mean/min/max = 45.4569/31.773/59.1408
[09:48:33.651] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.4696 for pixel 8/1 mean/min/max = 44.5134/31.5331/57.4936
[09:48:33.651] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 57.6713 for pixel 25/79 mean/min/max = 44.8841/32.0423/57.7258
[09:48:33.651] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.5703 for pixel 10/61 mean/min/max = 46.7918/31.6365/61.9471
[09:48:33.651] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 59.3698 for pixel 0/62 mean/min/max = 45.7303/32.0541/59.4066
[09:48:33.652] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.592 for pixel 1/75 mean/min/max = 44.5315/31.4025/57.6605
[09:48:33.652] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 58.5754 for pixel 2/67 mean/min/max = 45.3637/32.0642/58.6633
[09:48:33.652] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.4769 for pixel 1/79 mean/min/max = 44.3597/32.1932/56.5263
[09:48:33.652] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 60.5289 for pixel 0/2 mean/min/max = 46.1251/31.7012/60.549
[09:48:33.653] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 59.5355 for pixel 0/77 mean/min/max = 46.1073/32.6522/59.5624
[09:48:33.653] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:33.785] <TB3> INFO: Expecting 1029120 events.
[09:48:57.663] <TB3> INFO: 1029120 events read in total (23162ms).
[09:48:57.669] <TB3> INFO: Expecting 1029120 events.
[09:49:21.477] <TB3> INFO: 1029120 events read in total (23268ms).
[09:49:21.484] <TB3> INFO: Expecting 1029120 events.
[09:49:45.096] <TB3> INFO: 1029120 events read in total (23071ms).
[09:49:45.106] <TB3> INFO: Expecting 1029120 events.
[09:50:08.797] <TB3> INFO: 1029120 events read in total (23152ms).
[09:50:08.808] <TB3> INFO: Expecting 1029120 events.
[09:50:32.263] <TB3> INFO: 1029120 events read in total (22913ms).
[09:50:32.275] <TB3> INFO: Expecting 1029120 events.
[09:50:53.917] <TB3> INFO: 1029120 events read in total (21093ms).
[09:50:53.937] <TB3> INFO: Expecting 1029120 events.
[09:51:17.060] <TB3> INFO: 1029120 events read in total (22596ms).
[09:51:17.078] <TB3> INFO: Expecting 1029120 events.
[09:51:40.637] <TB3> INFO: 1029120 events read in total (23031ms).
[09:51:40.656] <TB3> INFO: Expecting 1029120 events.
[09:52:04.340] <TB3> INFO: 1029120 events read in total (23153ms).
[09:52:04.362] <TB3> INFO: Expecting 1029120 events.
[09:52:28.157] <TB3> INFO: 1029120 events read in total (23267ms).
[09:52:28.185] <TB3> INFO: Expecting 1029120 events.
[09:52:51.703] <TB3> INFO: 1029120 events read in total (22990ms).
[09:52:51.726] <TB3> INFO: Expecting 1029120 events.
[09:53:15.563] <TB3> INFO: 1029120 events read in total (23310ms).
[09:53:15.594] <TB3> INFO: Expecting 1029120 events.
[09:53:39.495] <TB3> INFO: 1029120 events read in total (23374ms).
[09:53:39.528] <TB3> INFO: Expecting 1029120 events.
[09:54:03.226] <TB3> INFO: 1029120 events read in total (23170ms).
[09:54:03.256] <TB3> INFO: Expecting 1029120 events.
[09:54:26.922] <TB3> INFO: 1029120 events read in total (23139ms).
[09:54:26.956] <TB3> INFO: Expecting 1029120 events.
[09:54:50.618] <TB3> INFO: 1029120 events read in total (23134ms).
[09:54:50.651] <TB3> INFO: Test took 376998ms.
[09:54:51.655] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:54:51.664] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:54:51.664] <TB3> INFO: run 1 of 1
[09:54:51.974] <TB3> INFO: Expecting 16640000 events.
[09:55:16.884] <TB3> INFO: 724460 events read in total (24193ms).
[09:55:41.245] <TB3> INFO: 1445780 events read in total (48554ms).
[09:56:05.670] <TB3> INFO: 2166800 events read in total (72979ms).
[09:56:30.175] <TB3> INFO: 2888920 events read in total (97484ms).
[09:56:54.549] <TB3> INFO: 3609880 events read in total (121858ms).
[09:57:19.030] <TB3> INFO: 4331300 events read in total (146339ms).
[09:57:43.552] <TB3> INFO: 5052560 events read in total (170861ms).
[09:58:07.741] <TB3> INFO: 5774860 events read in total (195050ms).
[09:58:32.086] <TB3> INFO: 6496960 events read in total (219395ms).
[09:58:56.363] <TB3> INFO: 7217820 events read in total (243672ms).
[09:59:20.630] <TB3> INFO: 7939440 events read in total (267939ms).
[09:59:45.083] <TB3> INFO: 8658840 events read in total (292392ms).
[10:00:09.388] <TB3> INFO: 9375440 events read in total (316697ms).
[10:00:33.641] <TB3> INFO: 10091400 events read in total (340950ms).
[10:00:57.785] <TB3> INFO: 10806360 events read in total (365094ms).
[10:01:21.619] <TB3> INFO: 11520860 events read in total (388928ms).
[10:01:45.810] <TB3> INFO: 12234780 events read in total (413119ms).
[10:02:10.036] <TB3> INFO: 12947620 events read in total (437346ms).
[10:02:34.270] <TB3> INFO: 13661380 events read in total (461579ms).
[10:02:58.394] <TB3> INFO: 14373820 events read in total (485703ms).
[10:03:22.651] <TB3> INFO: 15087480 events read in total (509960ms).
[10:03:44.958] <TB3> INFO: 15800500 events read in total (532267ms).
[10:04:06.933] <TB3> INFO: 16514760 events read in total (554242ms).
[10:04:11.534] <TB3> INFO: 16640000 events read in total (558843ms).
[10:04:11.594] <TB3> INFO: Test took 559930ms.
[10:04:11.794] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:40.463] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.200375 .. 118.103802
[10:04:40.557] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 128 (-1/-1) hits flags = 16 (plus default)
[10:04:40.566] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[10:04:40.566] <TB3> INFO: run 1 of 1
[10:04:40.894] <TB3> INFO: Expecting 10732800 events.
[10:05:06.254] <TB3> INFO: 767240 events read in total (24634ms).
[10:05:28.945] <TB3> INFO: 1534600 events read in total (47325ms).
[10:05:51.608] <TB3> INFO: 2302420 events read in total (69988ms).
[10:06:14.248] <TB3> INFO: 3069940 events read in total (92628ms).
[10:06:37.247] <TB3> INFO: 3837900 events read in total (115627ms).
[10:07:01.952] <TB3> INFO: 4604960 events read in total (140332ms).
[10:07:26.895] <TB3> INFO: 5373460 events read in total (165275ms).
[10:07:51.650] <TB3> INFO: 6140660 events read in total (190030ms).
[10:08:14.482] <TB3> INFO: 6907320 events read in total (212862ms).
[10:08:37.399] <TB3> INFO: 7672060 events read in total (235779ms).
[10:09:02.120] <TB3> INFO: 8435720 events read in total (260500ms).
[10:09:27.081] <TB3> INFO: 9199620 events read in total (285461ms).
[10:09:51.863] <TB3> INFO: 9963660 events read in total (310243ms).
[10:10:16.747] <TB3> INFO: 10728200 events read in total (335127ms).
[10:10:17.383] <TB3> INFO: 10732800 events read in total (335763ms).
[10:10:17.424] <TB3> INFO: Test took 336858ms.
[10:10:17.561] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:40.811] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 15.481834 .. 98.886589
[10:10:40.905] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 5 .. 108 (-1/-1) hits flags = 16 (plus default)
[10:10:40.914] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[10:10:40.914] <TB3> INFO: run 1 of 1
[10:10:41.225] <TB3> INFO: Expecting 8652800 events.
[10:11:06.907] <TB3> INFO: 775060 events read in total (24959ms).
[10:11:31.775] <TB3> INFO: 1550300 events read in total (49827ms).
[10:11:56.380] <TB3> INFO: 2325400 events read in total (74432ms).
[10:12:21.216] <TB3> INFO: 3100540 events read in total (99268ms).
[10:12:45.939] <TB3> INFO: 3875580 events read in total (123991ms).
[10:13:10.642] <TB3> INFO: 4650380 events read in total (148694ms).
[10:13:35.695] <TB3> INFO: 5425440 events read in total (173747ms).
[10:14:00.324] <TB3> INFO: 6199700 events read in total (198376ms).
[10:14:25.094] <TB3> INFO: 6973520 events read in total (223146ms).
[10:14:50.268] <TB3> INFO: 7747500 events read in total (248320ms).
[10:15:15.227] <TB3> INFO: 8521160 events read in total (273279ms).
[10:15:19.834] <TB3> INFO: 8652800 events read in total (277886ms).
[10:15:19.862] <TB3> INFO: Test took 278948ms.
[10:15:19.956] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:38.775] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 20.303867 .. 89.063777
[10:15:38.855] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 10 .. 99 (-1/-1) hits flags = 16 (plus default)
[10:15:38.864] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[10:15:38.864] <TB3> INFO: run 1 of 1
[10:15:39.177] <TB3> INFO: Expecting 7488000 events.
[10:16:02.745] <TB3> INFO: 771360 events read in total (22851ms).
[10:16:25.220] <TB3> INFO: 1542400 events read in total (45326ms).
[10:16:50.276] <TB3> INFO: 2313720 events read in total (70382ms).
[10:17:15.088] <TB3> INFO: 3084820 events read in total (95194ms).
[10:17:39.997] <TB3> INFO: 3856160 events read in total (120103ms).
[10:18:04.678] <TB3> INFO: 4627000 events read in total (144784ms).
[10:18:28.996] <TB3> INFO: 5397520 events read in total (169102ms).
[10:18:53.355] <TB3> INFO: 6167880 events read in total (193461ms).
[10:19:18.277] <TB3> INFO: 6938060 events read in total (218383ms).
[10:19:36.052] <TB3> INFO: 7488000 events read in total (236158ms).
[10:19:36.077] <TB3> INFO: Test took 237214ms.
[10:19:36.162] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:56.192] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 12.338566 .. 66.609724
[10:19:56.272] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 2 .. 76 (-1/-1) hits flags = 16 (plus default)
[10:19:56.281] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[10:19:56.281] <TB3> INFO: run 1 of 1
[10:19:56.594] <TB3> INFO: Expecting 6240000 events.
[10:20:22.690] <TB3> INFO: 851840 events read in total (25379ms).
[10:20:47.164] <TB3> INFO: 1703400 events read in total (49853ms).
[10:21:12.700] <TB3> INFO: 2554760 events read in total (75389ms).
[10:21:38.215] <TB3> INFO: 3406420 events read in total (100904ms).
[10:22:02.644] <TB3> INFO: 4257880 events read in total (125333ms).
[10:22:25.969] <TB3> INFO: 5108820 events read in total (148658ms).
[10:22:49.418] <TB3> INFO: 5960120 events read in total (172107ms).
[10:22:58.102] <TB3> INFO: 6240000 events read in total (180791ms).
[10:22:58.119] <TB3> INFO: Test took 181838ms.
[10:22:58.174] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:14.614] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:23:14.614] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[10:23:14.623] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[10:23:14.623] <TB3> INFO: run 1 of 1
[10:23:14.935] <TB3> INFO: Expecting 3411200 events.
[10:23:41.486] <TB3> INFO: 878840 events read in total (25835ms).
[10:24:07.547] <TB3> INFO: 1757860 events read in total (51896ms).
[10:24:32.937] <TB3> INFO: 2636220 events read in total (77287ms).
[10:24:55.356] <TB3> INFO: 3411200 events read in total (99705ms).
[10:24:55.370] <TB3> INFO: Test took 100747ms.
[10:24:55.402] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:09.569] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:25:09.569] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:25:09.569] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:25:09.569] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:25:09.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:25:09.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:25:09.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:25:09.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:25:09.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:25:09.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:25:09.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:25:09.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:25:09.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:25:09.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:25:09.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:25:09.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:25:09.572] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C0.dat
[10:25:09.582] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C1.dat
[10:25:09.590] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C2.dat
[10:25:09.597] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C3.dat
[10:25:09.605] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C4.dat
[10:25:09.614] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C5.dat
[10:25:09.622] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C6.dat
[10:25:09.631] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C7.dat
[10:25:09.639] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C8.dat
[10:25:09.646] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C9.dat
[10:25:09.654] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C10.dat
[10:25:09.661] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C11.dat
[10:25:09.670] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C12.dat
[10:25:09.678] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C13.dat
[10:25:09.685] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C14.dat
[10:25:09.692] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C15.dat
[10:25:09.700] <TB3> INFO: PixTestTrim::trimTest() done
[10:25:09.700] <TB3> INFO: vtrim: 97 99 100 97 80 102 99 94 81 105 90 104 101 87 101 109
[10:25:09.700] <TB3> INFO: vthrcomp: 94 92 98 95 90 102 96 96 95 89 98 98 83 91 87 101
[10:25:09.700] <TB3> INFO: vcal mean: 34.96 35.00 34.97 34.97 34.89 34.97 34.96 34.98 34.98 34.99 35.06 34.96 35.04 35.01 34.97 34.98
[10:25:09.700] <TB3> INFO: vcal RMS: 0.73 0.72 0.72 0.74 0.69 0.76 0.73 0.71 0.91 0.75 0.71 0.92 0.67 0.64 0.74 0.73
[10:25:09.700] <TB3> INFO: bits mean: 9.67 9.41 8.67 9.14 8.89 9.38 9.48 9.56 8.94 9.15 8.65 9.56 9.42 9.06 9.04 8.90
[10:25:09.700] <TB3> INFO: bits RMS: 2.62 2.81 3.05 2.82 2.90 2.73 2.74 2.79 2.96 2.76 3.10 2.81 2.73 2.95 2.91 2.81
[10:25:09.708] <TB3> INFO: ----------------------------------------------------------------------
[10:25:09.708] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:25:09.708] <TB3> INFO: ----------------------------------------------------------------------
[10:25:09.712] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[10:25:09.726] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:25:09.726] <TB3> INFO: run 1 of 1
[10:25:10.060] <TB3> INFO: Expecting 8320000 events.
[10:25:40.033] <TB3> INFO: 929240 events read in total (29257ms).
[10:26:09.161] <TB3> INFO: 1849800 events read in total (58385ms).
[10:26:38.267] <TB3> INFO: 2767540 events read in total (87491ms).
[10:27:05.888] <TB3> INFO: 3683380 events read in total (115112ms).
[10:27:34.989] <TB3> INFO: 4593360 events read in total (144213ms).
[10:28:04.111] <TB3> INFO: 5498860 events read in total (173335ms).
[10:28:33.012] <TB3> INFO: 6403200 events read in total (202236ms).
[10:29:02.128] <TB3> INFO: 7306110 events read in total (231352ms).
[10:29:29.319] <TB3> INFO: 8214040 events read in total (258543ms).
[10:29:32.760] <TB3> INFO: 8320000 events read in total (261984ms).
[10:29:32.794] <TB3> INFO: Test took 263068ms.
[10:29:32.900] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:59.317] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 170 (-1/-1) hits flags = 16 (plus default)
[10:29:59.326] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:29:59.326] <TB3> INFO: run 1 of 1
[10:29:59.629] <TB3> INFO: Expecting 7113600 events.
[10:30:29.919] <TB3> INFO: 956420 events read in total (29569ms).
[10:30:59.640] <TB3> INFO: 1903420 events read in total (59290ms).
[10:31:27.971] <TB3> INFO: 2847710 events read in total (87621ms).
[10:31:57.769] <TB3> INFO: 3786470 events read in total (117419ms).
[10:32:27.334] <TB3> INFO: 4717530 events read in total (146984ms).
[10:32:56.955] <TB3> INFO: 5646960 events read in total (176605ms).
[10:33:25.753] <TB3> INFO: 6576410 events read in total (205403ms).
[10:33:41.655] <TB3> INFO: 7113600 events read in total (221305ms).
[10:33:41.686] <TB3> INFO: Test took 222360ms.
[10:33:41.768] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:04.154] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 158 (-1/-1) hits flags = 16 (plus default)
[10:34:04.162] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:34:04.162] <TB3> INFO: run 1 of 1
[10:34:04.465] <TB3> INFO: Expecting 6614400 events.
[10:34:35.710] <TB3> INFO: 988200 events read in total (30528ms).
[10:35:05.873] <TB3> INFO: 1966330 events read in total (60691ms).
[10:35:33.842] <TB3> INFO: 2940420 events read in total (88660ms).
[10:36:01.699] <TB3> INFO: 3904900 events read in total (116517ms).
[10:36:29.183] <TB3> INFO: 4863660 events read in total (144001ms).
[10:36:58.994] <TB3> INFO: 5820660 events read in total (173812ms).
[10:37:21.785] <TB3> INFO: 6614400 events read in total (196603ms).
[10:37:21.812] <TB3> INFO: Test took 197650ms.
[10:37:21.880] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:43.318] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 16 (plus default)
[10:37:43.328] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:37:43.328] <TB3> INFO: run 1 of 1
[10:37:43.679] <TB3> INFO: Expecting 6572800 events.
[10:38:14.611] <TB3> INFO: 990500 events read in total (30215ms).
[10:38:44.866] <TB3> INFO: 1970810 events read in total (60470ms).
[10:39:15.078] <TB3> INFO: 2946960 events read in total (90682ms).
[10:39:44.604] <TB3> INFO: 3913610 events read in total (120208ms).
[10:40:13.121] <TB3> INFO: 4874080 events read in total (148725ms).
[10:40:43.028] <TB3> INFO: 5834180 events read in total (178632ms).
[10:41:04.172] <TB3> INFO: 6572800 events read in total (199776ms).
[10:41:04.201] <TB3> INFO: Test took 200873ms.
[10:41:04.271] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:25.629] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 16 (plus default)
[10:41:25.637] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:41:25.637] <TB3> INFO: run 1 of 1
[10:41:25.941] <TB3> INFO: Expecting 6572800 events.
[10:41:56.917] <TB3> INFO: 989860 events read in total (30259ms).
[10:42:26.956] <TB3> INFO: 1969460 events read in total (60299ms).
[10:42:57.162] <TB3> INFO: 2944920 events read in total (90505ms).
[10:43:26.188] <TB3> INFO: 3910790 events read in total (119530ms).
[10:43:54.942] <TB3> INFO: 4870540 events read in total (148285ms).
[10:44:24.809] <TB3> INFO: 5829730 events read in total (178151ms).
[10:44:46.125] <TB3> INFO: 6572800 events read in total (199467ms).
[10:44:46.151] <TB3> INFO: Test took 200513ms.
[10:44:46.219] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:07.448] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:45:07.449] <TB3> INFO: PixTestTrim::doTest() done, duration: 4199 seconds
[10:45:08.156] <TB3> INFO: ######################################################################
[10:45:08.156] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:45:08.156] <TB3> INFO: ######################################################################
[10:45:08.490] <TB3> INFO: Expecting 41600 events.
[10:45:12.911] <TB3> INFO: 41600 events read in total (3700ms).
[10:45:12.912] <TB3> INFO: Test took 4754ms.
[10:45:12.919] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:13.486] <TB3> INFO: Expecting 41600 events.
[10:45:17.972] <TB3> INFO: 41600 events read in total (3769ms).
[10:45:17.973] <TB3> INFO: Test took 4801ms.
[10:45:17.979] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:18.332] <TB3> INFO: Expecting 41600 events.
[10:45:22.828] <TB3> INFO: 41600 events read in total (3780ms).
[10:45:22.828] <TB3> INFO: Test took 4821ms.
[10:45:22.834] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:23.186] <TB3> INFO: Expecting 41600 events.
[10:45:27.690] <TB3> INFO: 41600 events read in total (3788ms).
[10:45:27.690] <TB3> INFO: Test took 4829ms.
[10:45:27.697] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:27.706] <TB3> INFO: The DUT currently contains the following objects:
[10:45:27.706] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:27.706] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:27.706] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:27.706] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:27.706] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.707] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.027] <TB3> INFO: Expecting 2560 events.
[10:45:29.097] <TB3> INFO: 2560 events read in total (353ms).
[10:45:29.097] <TB3> INFO: Test took 1390ms.
[10:45:29.098] <TB3> INFO: The DUT currently contains the following objects:
[10:45:29.098] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:29.098] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:29.098] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:29.098] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:29.098] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.098] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.099] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.099] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.099] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.099] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.099] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.512] <TB3> INFO: Expecting 2560 events.
[10:45:30.581] <TB3> INFO: 2560 events read in total (353ms).
[10:45:30.581] <TB3> INFO: Test took 1482ms.
[10:45:30.581] <TB3> INFO: The DUT currently contains the following objects:
[10:45:30.582] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:30.582] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:30.582] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:30.582] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:30.582] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.582] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.996] <TB3> INFO: Expecting 2560 events.
[10:45:32.066] <TB3> INFO: 2560 events read in total (354ms).
[10:45:32.067] <TB3> INFO: Test took 1485ms.
[10:45:32.067] <TB3> INFO: The DUT currently contains the following objects:
[10:45:32.067] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:32.067] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:32.067] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:32.067] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:32.067] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.067] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.068] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.068] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.068] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.068] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.068] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:32.481] <TB3> INFO: Expecting 2560 events.
[10:45:33.550] <TB3> INFO: 2560 events read in total (352ms).
[10:45:33.551] <TB3> INFO: Test took 1483ms.
[10:45:33.551] <TB3> INFO: The DUT currently contains the following objects:
[10:45:33.551] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:33.551] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:33.551] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:33.551] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:33.551] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.551] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.552] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.552] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.552] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.552] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.552] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.552] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:33.966] <TB3> INFO: Expecting 2560 events.
[10:45:35.034] <TB3> INFO: 2560 events read in total (352ms).
[10:45:35.034] <TB3> INFO: Test took 1482ms.
[10:45:35.035] <TB3> INFO: The DUT currently contains the following objects:
[10:45:35.035] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:35.035] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:35.035] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:35.035] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:35.035] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.035] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.035] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.035] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.035] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.035] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.035] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.035] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.036] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.036] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.036] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.036] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.036] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.036] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.036] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.036] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:35.449] <TB3> INFO: Expecting 2560 events.
[10:45:36.519] <TB3> INFO: 2560 events read in total (354ms).
[10:45:36.520] <TB3> INFO: Test took 1484ms.
[10:45:36.520] <TB3> INFO: The DUT currently contains the following objects:
[10:45:36.520] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:36.520] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:36.520] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:36.521] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:36.521] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.521] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:36.934] <TB3> INFO: Expecting 2560 events.
[10:45:38.019] <TB3> INFO: 2560 events read in total (369ms).
[10:45:38.019] <TB3> INFO: Test took 1498ms.
[10:45:38.019] <TB3> INFO: The DUT currently contains the following objects:
[10:45:38.020] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:38.020] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:38.020] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:38.020] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:38.020] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.020] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:38.434] <TB3> INFO: Expecting 2560 events.
[10:45:39.502] <TB3> INFO: 2560 events read in total (352ms).
[10:45:39.502] <TB3> INFO: Test took 1482ms.
[10:45:39.503] <TB3> INFO: The DUT currently contains the following objects:
[10:45:39.503] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:39.503] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:39.503] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:39.503] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:39.503] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.503] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.504] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.504] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.504] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.504] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.504] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.504] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:39.917] <TB3> INFO: Expecting 2560 events.
[10:45:40.986] <TB3> INFO: 2560 events read in total (352ms).
[10:45:40.986] <TB3> INFO: Test took 1482ms.
[10:45:40.986] <TB3> INFO: The DUT currently contains the following objects:
[10:45:40.986] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:40.986] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:40.986] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:40.986] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:40.986] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.986] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.986] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.986] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:40.987] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:41.401] <TB3> INFO: Expecting 2560 events.
[10:45:42.464] <TB3> INFO: 2560 events read in total (347ms).
[10:45:42.465] <TB3> INFO: Test took 1478ms.
[10:45:42.465] <TB3> INFO: The DUT currently contains the following objects:
[10:45:42.465] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:42.465] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:42.465] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:42.465] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:42.465] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.465] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:42.879] <TB3> INFO: Expecting 2560 events.
[10:45:43.949] <TB3> INFO: 2560 events read in total (354ms).
[10:45:43.950] <TB3> INFO: Test took 1485ms.
[10:45:43.950] <TB3> INFO: The DUT currently contains the following objects:
[10:45:43.950] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:43.950] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:43.950] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:43.950] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:43.950] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.950] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.950] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.950] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:43.951] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:44.365] <TB3> INFO: Expecting 2560 events.
[10:45:45.434] <TB3> INFO: 2560 events read in total (353ms).
[10:45:45.434] <TB3> INFO: Test took 1483ms.
[10:45:45.435] <TB3> INFO: The DUT currently contains the following objects:
[10:45:45.435] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:45.435] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:45.435] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:45.435] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:45.435] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.435] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.436] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:45.849] <TB3> INFO: Expecting 2560 events.
[10:45:46.920] <TB3> INFO: 2560 events read in total (355ms).
[10:45:46.920] <TB3> INFO: Test took 1484ms.
[10:45:46.921] <TB3> INFO: The DUT currently contains the following objects:
[10:45:46.921] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:46.921] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:46.921] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:46.921] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:46.921] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.921] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.922] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.922] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.922] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.922] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.922] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:46.922] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:47.335] <TB3> INFO: Expecting 2560 events.
[10:45:48.405] <TB3> INFO: 2560 events read in total (354ms).
[10:45:48.405] <TB3> INFO: Test took 1483ms.
[10:45:48.405] <TB3> INFO: The DUT currently contains the following objects:
[10:45:48.405] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:48.405] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:48.405] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:48.405] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:48.405] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.405] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.406] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.406] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.406] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.406] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.406] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:48.820] <TB3> INFO: Expecting 2560 events.
[10:45:49.888] <TB3> INFO: 2560 events read in total (351ms).
[10:45:49.888] <TB3> INFO: Test took 1482ms.
[10:45:49.889] <TB3> INFO: The DUT currently contains the following objects:
[10:45:49.889] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:49.889] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:45:49.889] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:45:49.889] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:49.889] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:49.889] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:50.303] <TB3> INFO: Expecting 2560 events.
[10:45:51.375] <TB3> INFO: 2560 events read in total (355ms).
[10:45:51.375] <TB3> INFO: Test took 1486ms.
[10:45:51.380] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:51.792] <TB3> INFO: Expecting 655360 events.
[10:46:08.429] <TB3> INFO: 655360 events read in total (15921ms).
[10:46:08.438] <TB3> INFO: Expecting 655360 events.
[10:46:25.028] <TB3> INFO: 655360 events read in total (16062ms).
[10:46:25.044] <TB3> INFO: Expecting 655360 events.
[10:46:41.476] <TB3> INFO: 655360 events read in total (15904ms).
[10:46:41.492] <TB3> INFO: Expecting 655360 events.
[10:46:58.026] <TB3> INFO: 655360 events read in total (16006ms).
[10:46:58.048] <TB3> INFO: Expecting 655360 events.
[10:47:13.182] <TB3> INFO: 655360 events read in total (14607ms).
[10:47:13.205] <TB3> INFO: Expecting 655360 events.
[10:47:29.497] <TB3> INFO: 655360 events read in total (15764ms).
[10:47:29.524] <TB3> INFO: Expecting 655360 events.
[10:47:46.015] <TB3> INFO: 655360 events read in total (15964ms).
[10:47:46.046] <TB3> INFO: Expecting 655360 events.
[10:48:02.558] <TB3> INFO: 655360 events read in total (15984ms).
[10:48:02.598] <TB3> INFO: Expecting 655360 events.
[10:48:18.900] <TB3> INFO: 655360 events read in total (15774ms).
[10:48:18.937] <TB3> INFO: Expecting 655360 events.
[10:48:35.214] <TB3> INFO: 655360 events read in total (15749ms).
[10:48:35.255] <TB3> INFO: Expecting 655360 events.
[10:48:51.560] <TB3> INFO: 655360 events read in total (15777ms).
[10:48:51.605] <TB3> INFO: Expecting 655360 events.
[10:49:08.098] <TB3> INFO: 655360 events read in total (15966ms).
[10:49:08.147] <TB3> INFO: Expecting 655360 events.
[10:49:24.725] <TB3> INFO: 655360 events read in total (16050ms).
[10:49:24.778] <TB3> INFO: Expecting 655360 events.
[10:49:41.260] <TB3> INFO: 655360 events read in total (15954ms).
[10:49:41.316] <TB3> INFO: Expecting 655360 events.
[10:49:57.692] <TB3> INFO: 655360 events read in total (15848ms).
[10:49:57.748] <TB3> INFO: Expecting 655360 events.
[10:50:14.111] <TB3> INFO: 655360 events read in total (15836ms).
[10:50:14.171] <TB3> INFO: Test took 262791ms.
[10:50:14.251] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:50:14.560] <TB3> INFO: Expecting 655360 events.
[10:50:31.561] <TB3> INFO: 655360 events read in total (16285ms).
[10:50:31.570] <TB3> INFO: Expecting 655360 events.
[10:50:46.728] <TB3> INFO: 655360 events read in total (14630ms).
[10:50:46.740] <TB3> INFO: Expecting 655360 events.
[10:51:02.085] <TB3> INFO: 655360 events read in total (14817ms).
[10:51:02.101] <TB3> INFO: Expecting 655360 events.
[10:51:18.541] <TB3> INFO: 655360 events read in total (15913ms).
[10:51:18.562] <TB3> INFO: Expecting 655360 events.
[10:51:34.871] <TB3> INFO: 655360 events read in total (15782ms).
[10:51:34.894] <TB3> INFO: Expecting 655360 events.
[10:51:51.161] <TB3> INFO: 655360 events read in total (15739ms).
[10:51:51.189] <TB3> INFO: Expecting 655360 events.
[10:52:07.506] <TB3> INFO: 655360 events read in total (15789ms).
[10:52:07.549] <TB3> INFO: Expecting 655360 events.
[10:52:23.979] <TB3> INFO: 655360 events read in total (15902ms).
[10:52:24.012] <TB3> INFO: Expecting 655360 events.
[10:52:40.449] <TB3> INFO: 655360 events read in total (15909ms).
[10:52:40.489] <TB3> INFO: Expecting 655360 events.
[10:52:57.003] <TB3> INFO: 655360 events read in total (15986ms).
[10:52:57.043] <TB3> INFO: Expecting 655360 events.
[10:53:13.567] <TB3> INFO: 655360 events read in total (15996ms).
[10:53:13.621] <TB3> INFO: Expecting 655360 events.
[10:53:30.173] <TB3> INFO: 655360 events read in total (16025ms).
[10:53:30.223] <TB3> INFO: Expecting 655360 events.
[10:53:46.594] <TB3> INFO: 655360 events read in total (15843ms).
[10:53:46.656] <TB3> INFO: Expecting 655360 events.
[10:54:03.141] <TB3> INFO: 655360 events read in total (15957ms).
[10:54:03.199] <TB3> INFO: Expecting 655360 events.
[10:54:19.442] <TB3> INFO: 655360 events read in total (15716ms).
[10:54:19.505] <TB3> INFO: Expecting 655360 events.
[10:54:35.812] <TB3> INFO: 655360 events read in total (15779ms).
[10:54:35.872] <TB3> INFO: Test took 261621ms.
[10:54:36.098] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.108] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.118] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.127] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.137] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.145] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.152] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.159] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.169] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.176] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.184] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.194] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.203] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.210] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.217] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.225] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:36.273] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:54:36.273] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:54:36.273] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:54:36.274] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:54:36.274] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:54:36.274] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:54:36.274] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:54:36.274] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:54:36.275] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:54:36.275] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:54:36.275] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:54:36.275] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:54:36.275] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:54:36.276] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:54:36.276] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:54:36.276] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:54:36.592] <TB3> INFO: Expecting 41600 events.
[10:54:41.035] <TB3> INFO: 41600 events read in total (3727ms).
[10:54:41.036] <TB3> INFO: Test took 4757ms.
[10:54:41.602] <TB3> INFO: Expecting 41600 events.
[10:54:46.033] <TB3> INFO: 41600 events read in total (3714ms).
[10:54:46.034] <TB3> INFO: Test took 4760ms.
[10:54:46.572] <TB3> INFO: Expecting 41600 events.
[10:54:50.997] <TB3> INFO: 41600 events read in total (3709ms).
[10:54:50.998] <TB3> INFO: Test took 4731ms.
[10:54:51.235] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:51.367] <TB3> INFO: Expecting 2560 events.
[10:54:52.435] <TB3> INFO: 2560 events read in total (352ms).
[10:54:52.435] <TB3> INFO: Test took 1200ms.
[10:54:52.438] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:52.851] <TB3> INFO: Expecting 2560 events.
[10:54:53.919] <TB3> INFO: 2560 events read in total (352ms).
[10:54:53.920] <TB3> INFO: Test took 1482ms.
[10:54:53.923] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:54.336] <TB3> INFO: Expecting 2560 events.
[10:54:55.403] <TB3> INFO: 2560 events read in total (351ms).
[10:54:55.404] <TB3> INFO: Test took 1481ms.
[10:54:55.407] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:55.820] <TB3> INFO: Expecting 2560 events.
[10:54:56.889] <TB3> INFO: 2560 events read in total (353ms).
[10:54:56.889] <TB3> INFO: Test took 1483ms.
[10:54:56.892] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:57.305] <TB3> INFO: Expecting 2560 events.
[10:54:58.377] <TB3> INFO: 2560 events read in total (355ms).
[10:54:58.378] <TB3> INFO: Test took 1486ms.
[10:54:58.381] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:58.794] <TB3> INFO: Expecting 2560 events.
[10:54:59.863] <TB3> INFO: 2560 events read in total (353ms).
[10:54:59.864] <TB3> INFO: Test took 1483ms.
[10:54:59.867] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:00.280] <TB3> INFO: Expecting 2560 events.
[10:55:01.351] <TB3> INFO: 2560 events read in total (355ms).
[10:55:01.351] <TB3> INFO: Test took 1484ms.
[10:55:01.356] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:01.767] <TB3> INFO: Expecting 2560 events.
[10:55:02.835] <TB3> INFO: 2560 events read in total (352ms).
[10:55:02.835] <TB3> INFO: Test took 1479ms.
[10:55:02.837] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:03.251] <TB3> INFO: Expecting 2560 events.
[10:55:04.319] <TB3> INFO: 2560 events read in total (352ms).
[10:55:04.319] <TB3> INFO: Test took 1482ms.
[10:55:04.322] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:04.735] <TB3> INFO: Expecting 2560 events.
[10:55:05.804] <TB3> INFO: 2560 events read in total (353ms).
[10:55:05.804] <TB3> INFO: Test took 1482ms.
[10:55:05.807] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:06.220] <TB3> INFO: Expecting 2560 events.
[10:55:07.291] <TB3> INFO: 2560 events read in total (354ms).
[10:55:07.291] <TB3> INFO: Test took 1484ms.
[10:55:07.294] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:07.707] <TB3> INFO: Expecting 2560 events.
[10:55:08.779] <TB3> INFO: 2560 events read in total (354ms).
[10:55:08.781] <TB3> INFO: Test took 1487ms.
[10:55:08.784] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:09.196] <TB3> INFO: Expecting 2560 events.
[10:55:10.264] <TB3> INFO: 2560 events read in total (352ms).
[10:55:10.264] <TB3> INFO: Test took 1480ms.
[10:55:10.267] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:10.680] <TB3> INFO: Expecting 2560 events.
[10:55:11.745] <TB3> INFO: 2560 events read in total (348ms).
[10:55:11.745] <TB3> INFO: Test took 1478ms.
[10:55:11.748] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:12.162] <TB3> INFO: Expecting 2560 events.
[10:55:13.232] <TB3> INFO: 2560 events read in total (354ms).
[10:55:13.233] <TB3> INFO: Test took 1485ms.
[10:55:13.236] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:13.649] <TB3> INFO: Expecting 2560 events.
[10:55:14.719] <TB3> INFO: 2560 events read in total (354ms).
[10:55:14.720] <TB3> INFO: Test took 1484ms.
[10:55:14.723] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:15.136] <TB3> INFO: Expecting 2560 events.
[10:55:16.207] <TB3> INFO: 2560 events read in total (355ms).
[10:55:16.208] <TB3> INFO: Test took 1486ms.
[10:55:16.211] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:16.624] <TB3> INFO: Expecting 2560 events.
[10:55:17.695] <TB3> INFO: 2560 events read in total (355ms).
[10:55:17.696] <TB3> INFO: Test took 1485ms.
[10:55:17.699] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:18.112] <TB3> INFO: Expecting 2560 events.
[10:55:19.181] <TB3> INFO: 2560 events read in total (352ms).
[10:55:19.181] <TB3> INFO: Test took 1483ms.
[10:55:19.184] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:19.597] <TB3> INFO: Expecting 2560 events.
[10:55:20.668] <TB3> INFO: 2560 events read in total (355ms).
[10:55:20.668] <TB3> INFO: Test took 1485ms.
[10:55:20.671] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:21.084] <TB3> INFO: Expecting 2560 events.
[10:55:22.149] <TB3> INFO: 2560 events read in total (348ms).
[10:55:22.149] <TB3> INFO: Test took 1478ms.
[10:55:22.151] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:22.565] <TB3> INFO: Expecting 2560 events.
[10:55:23.635] <TB3> INFO: 2560 events read in total (353ms).
[10:55:23.635] <TB3> INFO: Test took 1485ms.
[10:55:23.640] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:24.051] <TB3> INFO: Expecting 2560 events.
[10:55:25.121] <TB3> INFO: 2560 events read in total (354ms).
[10:55:25.121] <TB3> INFO: Test took 1481ms.
[10:55:25.124] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:25.537] <TB3> INFO: Expecting 2560 events.
[10:55:26.605] <TB3> INFO: 2560 events read in total (351ms).
[10:55:26.606] <TB3> INFO: Test took 1482ms.
[10:55:26.608] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:27.022] <TB3> INFO: Expecting 2560 events.
[10:55:28.093] <TB3> INFO: 2560 events read in total (355ms).
[10:55:28.093] <TB3> INFO: Test took 1485ms.
[10:55:28.096] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:28.509] <TB3> INFO: Expecting 2560 events.
[10:55:29.593] <TB3> INFO: 2560 events read in total (367ms).
[10:55:29.593] <TB3> INFO: Test took 1497ms.
[10:55:29.596] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:30.009] <TB3> INFO: Expecting 2560 events.
[10:55:31.080] <TB3> INFO: 2560 events read in total (354ms).
[10:55:31.080] <TB3> INFO: Test took 1484ms.
[10:55:31.083] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:31.496] <TB3> INFO: Expecting 2560 events.
[10:55:32.581] <TB3> INFO: 2560 events read in total (369ms).
[10:55:32.581] <TB3> INFO: Test took 1499ms.
[10:55:32.584] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:32.997] <TB3> INFO: Expecting 2560 events.
[10:55:34.069] <TB3> INFO: 2560 events read in total (355ms).
[10:55:34.069] <TB3> INFO: Test took 1485ms.
[10:55:34.071] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:34.486] <TB3> INFO: Expecting 2560 events.
[10:55:35.556] <TB3> INFO: 2560 events read in total (354ms).
[10:55:35.557] <TB3> INFO: Test took 1486ms.
[10:55:35.559] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:35.972] <TB3> INFO: Expecting 2560 events.
[10:55:37.044] <TB3> INFO: 2560 events read in total (355ms).
[10:55:37.045] <TB3> INFO: Test took 1486ms.
[10:55:37.047] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:37.461] <TB3> INFO: Expecting 2560 events.
[10:55:38.528] <TB3> INFO: 2560 events read in total (351ms).
[10:55:38.528] <TB3> INFO: Test took 1481ms.
[10:55:39.155] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 630 seconds
[10:55:39.155] <TB3> INFO: PH scale (per ROC): 78 70 78 76 79 80 77 86 85 79 84 85 79 96 77 83
[10:55:39.155] <TB3> INFO: PH offset (per ROC): 163 159 166 180 150 175 178 154 156 171 164 144 144 151 166 166
[10:55:39.329] <TB3> INFO: ######################################################################
[10:55:39.329] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:55:39.329] <TB3> INFO: ######################################################################
[10:55:39.339] <TB3> INFO: scanning low vcal = 10
[10:55:39.647] <TB3> INFO: Expecting 41600 events.
[10:55:43.255] <TB3> INFO: 41600 events read in total (2891ms).
[10:55:43.255] <TB3> INFO: Test took 3916ms.
[10:55:43.257] <TB3> INFO: scanning low vcal = 20
[10:55:43.671] <TB3> INFO: Expecting 41600 events.
[10:55:47.300] <TB3> INFO: 41600 events read in total (2912ms).
[10:55:47.300] <TB3> INFO: Test took 4043ms.
[10:55:47.303] <TB3> INFO: scanning low vcal = 30
[10:55:47.716] <TB3> INFO: Expecting 41600 events.
[10:55:51.348] <TB3> INFO: 41600 events read in total (2916ms).
[10:55:51.349] <TB3> INFO: Test took 4046ms.
[10:55:51.352] <TB3> INFO: scanning low vcal = 40
[10:55:51.755] <TB3> INFO: Expecting 41600 events.
[10:55:55.956] <TB3> INFO: 41600 events read in total (3484ms).
[10:55:55.957] <TB3> INFO: Test took 4605ms.
[10:55:55.960] <TB3> INFO: scanning low vcal = 50
[10:55:56.301] <TB3> INFO: Expecting 41600 events.
[10:56:00.514] <TB3> INFO: 41600 events read in total (3496ms).
[10:56:00.515] <TB3> INFO: Test took 4555ms.
[10:56:00.518] <TB3> INFO: scanning low vcal = 60
[10:56:00.861] <TB3> INFO: Expecting 41600 events.
[10:56:05.090] <TB3> INFO: 41600 events read in total (3512ms).
[10:56:05.090] <TB3> INFO: Test took 4572ms.
[10:56:05.094] <TB3> INFO: scanning low vcal = 70
[10:56:05.444] <TB3> INFO: Expecting 41600 events.
[10:56:09.657] <TB3> INFO: 41600 events read in total (3496ms).
[10:56:09.658] <TB3> INFO: Test took 4564ms.
[10:56:09.660] <TB3> INFO: scanning low vcal = 80
[10:56:10.014] <TB3> INFO: Expecting 41600 events.
[10:56:14.236] <TB3> INFO: 41600 events read in total (3505ms).
[10:56:14.237] <TB3> INFO: Test took 4576ms.
[10:56:14.241] <TB3> INFO: scanning low vcal = 90
[10:56:14.578] <TB3> INFO: Expecting 41600 events.
[10:56:18.846] <TB3> INFO: 41600 events read in total (3552ms).
[10:56:18.847] <TB3> INFO: Test took 4606ms.
[10:56:18.850] <TB3> INFO: scanning low vcal = 100
[10:56:19.204] <TB3> INFO: Expecting 41600 events.
[10:56:23.421] <TB3> INFO: 41600 events read in total (3501ms).
[10:56:23.421] <TB3> INFO: Test took 4571ms.
[10:56:23.424] <TB3> INFO: scanning low vcal = 110
[10:56:23.778] <TB3> INFO: Expecting 41600 events.
[10:56:28.024] <TB3> INFO: 41600 events read in total (3529ms).
[10:56:28.025] <TB3> INFO: Test took 4601ms.
[10:56:28.028] <TB3> INFO: scanning low vcal = 120
[10:56:28.372] <TB3> INFO: Expecting 41600 events.
[10:56:32.549] <TB3> INFO: 41600 events read in total (3460ms).
[10:56:32.549] <TB3> INFO: Test took 4521ms.
[10:56:32.552] <TB3> INFO: scanning low vcal = 130
[10:56:32.887] <TB3> INFO: Expecting 41600 events.
[10:56:37.143] <TB3> INFO: 41600 events read in total (3539ms).
[10:56:37.144] <TB3> INFO: Test took 4592ms.
[10:56:37.147] <TB3> INFO: scanning low vcal = 140
[10:56:37.481] <TB3> INFO: Expecting 41600 events.
[10:56:41.739] <TB3> INFO: 41600 events read in total (3542ms).
[10:56:41.740] <TB3> INFO: Test took 4593ms.
[10:56:41.743] <TB3> INFO: scanning low vcal = 150
[10:56:42.085] <TB3> INFO: Expecting 41600 events.
[10:56:46.321] <TB3> INFO: 41600 events read in total (3520ms).
[10:56:46.321] <TB3> INFO: Test took 4578ms.
[10:56:46.324] <TB3> INFO: scanning low vcal = 160
[10:56:46.669] <TB3> INFO: Expecting 41600 events.
[10:56:50.884] <TB3> INFO: 41600 events read in total (3499ms).
[10:56:50.884] <TB3> INFO: Test took 4560ms.
[10:56:50.888] <TB3> INFO: scanning low vcal = 170
[10:56:51.235] <TB3> INFO: Expecting 41600 events.
[10:56:55.450] <TB3> INFO: 41600 events read in total (3499ms).
[10:56:55.451] <TB3> INFO: Test took 4563ms.
[10:56:55.455] <TB3> INFO: scanning low vcal = 180
[10:56:55.805] <TB3> INFO: Expecting 41600 events.
[10:57:00.052] <TB3> INFO: 41600 events read in total (3531ms).
[10:57:00.053] <TB3> INFO: Test took 4598ms.
[10:57:00.056] <TB3> INFO: scanning low vcal = 190
[10:57:00.390] <TB3> INFO: Expecting 41600 events.
[10:57:04.579] <TB3> INFO: 41600 events read in total (3472ms).
[10:57:04.580] <TB3> INFO: Test took 4524ms.
[10:57:04.582] <TB3> INFO: scanning low vcal = 200
[10:57:04.939] <TB3> INFO: Expecting 41600 events.
[10:57:09.123] <TB3> INFO: 41600 events read in total (3467ms).
[10:57:09.124] <TB3> INFO: Test took 4542ms.
[10:57:09.127] <TB3> INFO: scanning low vcal = 210
[10:57:09.482] <TB3> INFO: Expecting 41600 events.
[10:57:13.723] <TB3> INFO: 41600 events read in total (3525ms).
[10:57:13.723] <TB3> INFO: Test took 4596ms.
[10:57:13.726] <TB3> INFO: scanning low vcal = 220
[10:57:14.075] <TB3> INFO: Expecting 41600 events.
[10:57:18.253] <TB3> INFO: 41600 events read in total (3462ms).
[10:57:18.254] <TB3> INFO: Test took 4527ms.
[10:57:18.257] <TB3> INFO: scanning low vcal = 230
[10:57:18.603] <TB3> INFO: Expecting 41600 events.
[10:57:22.796] <TB3> INFO: 41600 events read in total (3477ms).
[10:57:22.797] <TB3> INFO: Test took 4540ms.
[10:57:22.800] <TB3> INFO: scanning low vcal = 240
[10:57:23.148] <TB3> INFO: Expecting 41600 events.
[10:57:27.413] <TB3> INFO: 41600 events read in total (3548ms).
[10:57:27.414] <TB3> INFO: Test took 4614ms.
[10:57:27.417] <TB3> INFO: scanning low vcal = 250
[10:57:27.741] <TB3> INFO: Expecting 41600 events.
[10:57:31.993] <TB3> INFO: 41600 events read in total (3535ms).
[10:57:31.994] <TB3> INFO: Test took 4577ms.
[10:57:31.998] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[10:57:32.345] <TB3> INFO: Expecting 41600 events.
[10:57:36.598] <TB3> INFO: 41600 events read in total (3537ms).
[10:57:36.598] <TB3> INFO: Test took 4600ms.
[10:57:36.601] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[10:57:36.956] <TB3> INFO: Expecting 41600 events.
[10:57:41.021] <TB3> INFO: 41600 events read in total (3349ms).
[10:57:41.021] <TB3> INFO: Test took 4420ms.
[10:57:41.024] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[10:57:41.362] <TB3> INFO: Expecting 41600 events.
[10:57:45.437] <TB3> INFO: 41600 events read in total (3359ms).
[10:57:45.437] <TB3> INFO: Test took 4413ms.
[10:57:45.440] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[10:57:45.779] <TB3> INFO: Expecting 41600 events.
[10:57:49.932] <TB3> INFO: 41600 events read in total (3437ms).
[10:57:49.933] <TB3> INFO: Test took 4493ms.
[10:57:49.937] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:57:50.291] <TB3> INFO: Expecting 41600 events.
[10:57:54.324] <TB3> INFO: 41600 events read in total (3317ms).
[10:57:54.325] <TB3> INFO: Test took 4388ms.
[10:57:54.945] <TB3> INFO: PixTestGainPedestal::measure() done
[10:58:27.055] <TB3> INFO: PixTestGainPedestal::fit() done
[10:58:27.055] <TB3> INFO: non-linearity mean: 0.960 0.957 0.948 0.954 0.963 0.958 0.953 0.959 0.958 0.954 0.951 0.959 0.945 0.962 0.961 0.958
[10:58:27.055] <TB3> INFO: non-linearity RMS: 0.006 0.005 0.007 0.006 0.005 0.005 0.007 0.006 0.006 0.006 0.006 0.006 0.007 0.005 0.005 0.005
[10:58:27.055] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:58:27.074] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:58:27.093] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:58:27.113] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:58:27.131] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:58:27.150] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:58:27.170] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:58:27.189] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:58:27.207] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:58:27.226] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:58:27.245] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:58:27.263] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:58:27.282] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:58:27.301] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:58:27.319] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:58:27.338] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:58:27.357] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[10:58:27.363] <TB3> INFO: readReadbackCal: /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C15.dat
[10:58:27.364] <TB3> INFO: PixTestReadback::doTest() start.
[10:58:27.365] <TB3> INFO: PixTestReadback::RES sent once
[10:58:38.652] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C0.dat
[10:58:38.652] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C1.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C2.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C3.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C4.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C5.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C6.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C7.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C8.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C9.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C10.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C11.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C12.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C13.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C14.dat
[10:58:38.653] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C15.dat
[10:58:38.687] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:58:38.688] <TB3> INFO: PixTestReadback::RES sent once
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C0.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C1.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C2.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C3.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C4.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C5.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C6.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C7.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C8.dat
[10:58:49.917] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C9.dat
[10:58:49.918] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C10.dat
[10:58:49.918] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C11.dat
[10:58:49.918] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C12.dat
[10:58:49.918] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C13.dat
[10:58:49.918] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C14.dat
[10:58:49.918] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C15.dat
[10:58:49.947] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:58:49.948] <TB3> INFO: PixTestReadback::RES sent once
[10:58:58.585] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:58:58.585] <TB3> INFO: Vbg will be calibrated using Vd calibration
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 147calibrated Vbg = 1.19654 :::*/*/*/*/
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.7calibrated Vbg = 1.20524 :::*/*/*/*/
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 160.9calibrated Vbg = 1.19983 :::*/*/*/*/
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 145.4calibrated Vbg = 1.20591 :::*/*/*/*/
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.7calibrated Vbg = 1.21449 :::*/*/*/*/
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.8calibrated Vbg = 1.21091 :::*/*/*/*/
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 158.2calibrated Vbg = 1.21677 :::*/*/*/*/
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.6calibrated Vbg = 1.21113 :::*/*/*/*/
[10:58:58.585] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.8calibrated Vbg = 1.21465 :::*/*/*/*/
[10:58:58.586] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.4calibrated Vbg = 1.20888 :::*/*/*/*/
[10:58:58.586] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159.2calibrated Vbg = 1.21172 :::*/*/*/*/
[10:58:58.586] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.2calibrated Vbg = 1.20442 :::*/*/*/*/
[10:58:58.586] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149calibrated Vbg = 1.20561 :::*/*/*/*/
[10:58:58.586] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 155.6calibrated Vbg = 1.20077 :::*/*/*/*/
[10:58:58.586] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.2calibrated Vbg = 1.20485 :::*/*/*/*/
[10:58:58.586] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 147.9calibrated Vbg = 1.1996 :::*/*/*/*/
[10:58:58.589] <TB3> INFO: PixTestReadback::RES sent once
[11:01:53.449] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C0.dat
[11:01:53.450] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C1.dat
[11:01:53.450] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C2.dat
[11:01:53.450] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C3.dat
[11:01:53.450] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C4.dat
[11:01:53.450] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C5.dat
[11:01:53.450] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C6.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C7.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C8.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C9.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C10.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C11.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C12.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C13.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C14.dat
[11:01:53.451] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2096_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C15.dat
[11:01:53.483] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:01:53.484] <TB3> INFO: PixTestReadback::doTest() done
[11:01:53.501] <TB3> INFO: enter test to run
[11:01:53.501] <TB3> INFO: test: exit no parameter change
[11:01:54.223] <TB3> QUIET: Connection to board 170 closed.
[11:01:54.302] <TB3> INFO: pXar: this is the end, my friend