[15:09:36.675] <TB2> INFO: *** Welcome to pxar ***
[15:09:36.675] <TB2> INFO: *** Today: 2015/08/31
[15:09:36.675] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C15.dat
[15:09:36.676] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:09:36.676] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//defaultMaskFile.dat
[15:09:36.676] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters_C15.dat
[15:09:36.749] <TB2> INFO: clk: 4
[15:09:36.749] <TB2> INFO: ctr: 4
[15:09:36.749] <TB2> INFO: sda: 19
[15:09:36.749] <TB2> INFO: tin: 9
[15:09:36.749] <TB2> INFO: level: 15
[15:09:36.749] <TB2> INFO: triggerdelay: 0
[15:09:36.749] <TB2> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[15:09:36.749] <TB2> INFO: Log level: INFO
[15:09:36.755] <TB2> INFO: Found DTB DTB_WXC55Z
[15:09:36.764] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[15:09:36.768] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[15:09:36.770] <TB2> INFO: RPC call hashes of host and DTB match: 397073690
[15:09:38.293] <TB2> INFO: DUT info:
[15:09:38.293] <TB2> INFO: The DUT currently contains the following objects:
[15:09:38.294] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:38.294] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:09:38.294] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:09:38.294] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:09:38.294] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.294] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.295] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.295] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:38.696] <TB2> INFO: enter 'restricted' command line mode
[15:09:38.696] <TB2> INFO: enter test to run
[15:09:38.696] <TB2> INFO: test: pretest no parameter change
[15:09:38.696] <TB2> INFO: running: pretest
[15:09:38.705] <TB2> INFO: ######################################################################
[15:09:38.705] <TB2> INFO: PixTestPretest::doTest()
[15:09:38.705] <TB2> INFO: ######################################################################
[15:09:38.707] <TB2> INFO: ----------------------------------------------------------------------
[15:09:38.707] <TB2> INFO: PixTestPretest::programROC()
[15:09:38.707] <TB2> INFO: ----------------------------------------------------------------------
[15:09:56.726] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:09:56.727] <TB2> INFO: IA differences per ROC: 18.5 17.7 19.3 18.5 20.1 16.9 20.9 19.3 17.7 17.7 20.9 20.1 20.1 18.5 17.7 17.7
[15:09:56.809] <TB2> INFO: ----------------------------------------------------------------------
[15:09:56.809] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:09:56.809] <TB2> INFO: ----------------------------------------------------------------------
[15:10:00.683] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 369.8 mA = 23.1125 mA/ROC
[15:10:00.684] <TB2> INFO: ----------------------------------------------------------------------
[15:10:00.684] <TB2> INFO: PixTestPretest::findTiming()
[15:10:00.684] <TB2> INFO: ----------------------------------------------------------------------
[15:10:00.685] <TB2> INFO: PixTestCmd::init()

[15:11:46.628] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[15:11:46.628] <TB2> INFO: (success/tries = 100/100), width = 4
[15:11:46.631] <TB2> INFO: ----------------------------------------------------------------------
[15:11:46.631] <TB2> INFO: PixTestPretest::findWorkingPixel()
[15:11:46.631] <TB2> INFO: ----------------------------------------------------------------------
[15:11:46.770] <TB2> INFO: Expecting 231680 events.
[15:11:55.537] <TB2> INFO: 231680 events read in total (8051ms).
[15:11:55.541] <TB2> INFO: Test took 8905ms.
[15:11:55.847] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:11:55.886] <TB2> INFO: ----------------------------------------------------------------------
[15:11:55.886] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[15:11:55.886] <TB2> INFO: ----------------------------------------------------------------------
[15:11:56.024] <TB2> INFO: Expecting 231680 events.
[15:12:05.210] <TB2> INFO: 231680 events read in total (8469ms).
[15:12:05.214] <TB2> INFO: Test took 9322ms.
[15:12:05.532] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[15:12:05.532] <TB2> INFO: CalDel: 136 131 141 159 125 142 144 132 131 144 150 135 145 150 126 143
[15:12:05.532] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:12:05.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C0.dat
[15:12:05.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C1.dat
[15:12:05.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C2.dat
[15:12:05.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C3.dat
[15:12:05.536] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C4.dat
[15:12:05.536] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C5.dat
[15:12:05.536] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C6.dat
[15:12:05.536] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C7.dat
[15:12:05.536] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C8.dat
[15:12:05.537] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C9.dat
[15:12:05.537] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C10.dat
[15:12:05.537] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C11.dat
[15:12:05.537] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C12.dat
[15:12:05.538] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C13.dat
[15:12:05.538] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C14.dat
[15:12:05.538] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C15.dat
[15:12:05.538] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0a.dat
[15:12:05.538] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:12:05.539] <TB2> INFO: PixTestPretest::doTest() done, duration: 146 seconds
[15:12:05.605] <TB2> INFO: enter test to run
[15:12:05.605] <TB2> INFO: test: fulltest no parameter change
[15:12:05.605] <TB2> INFO: running: fulltest
[15:12:05.605] <TB2> INFO: ######################################################################
[15:12:05.605] <TB2> INFO: PixTestFullTest::doTest()
[15:12:05.605] <TB2> INFO: ######################################################################
[15:12:05.606] <TB2> INFO: ######################################################################
[15:12:05.606] <TB2> INFO: PixTestAlive::doTest()
[15:12:05.606] <TB2> INFO: ######################################################################
[15:12:05.608] <TB2> INFO: ----------------------------------------------------------------------
[15:12:05.608] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:05.608] <TB2> INFO: ----------------------------------------------------------------------
[15:12:05.911] <TB2> INFO: Expecting 41600 events.
[15:12:10.342] <TB2> INFO: 41600 events read in total (3715ms).
[15:12:10.342] <TB2> INFO: Test took 4733ms.
[15:12:10.349] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:10.637] <TB2> INFO: PixTestAlive::aliveTest() done
[15:12:10.637] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0
[15:12:10.639] <TB2> INFO: ----------------------------------------------------------------------
[15:12:10.639] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:10.639] <TB2> INFO: ----------------------------------------------------------------------
[15:12:10.987] <TB2> INFO: Expecting 41600 events.
[15:12:14.100] <TB2> INFO: 41600 events read in total (2397ms).
[15:12:14.100] <TB2> INFO: Test took 3459ms.
[15:12:14.100] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:14.101] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:12:14.417] <TB2> INFO: PixTestAlive::maskTest() done
[15:12:14.417] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:14.419] <TB2> INFO: ----------------------------------------------------------------------
[15:12:14.419] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:14.419] <TB2> INFO: ----------------------------------------------------------------------
[15:12:14.765] <TB2> INFO: Expecting 41600 events.
[15:12:19.146] <TB2> INFO: 41600 events read in total (3664ms).
[15:12:19.147] <TB2> INFO: Test took 4726ms.
[15:12:19.154] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:19.446] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[15:12:19.446] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:19.446] <TB2> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[15:12:19.458] <TB2> INFO: ######################################################################
[15:12:19.458] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:12:19.458] <TB2> INFO: ######################################################################
[15:12:19.462] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[15:12:19.476] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[15:12:19.476] <TB2> INFO: run 1 of 1
[15:12:19.799] <TB2> INFO: Expecting 3120000 events.
[15:12:55.715] <TB2> INFO: 869980 events read in total (35200ms).
[15:13:30.863] <TB2> INFO: 1724850 events read in total (70348ms).
[15:14:05.937] <TB2> INFO: 2593960 events read in total (105422ms).
[15:14:27.011] <TB2> INFO: 3120000 events read in total (126496ms).
[15:14:27.054] <TB2> INFO: Test took 127578ms.
[15:14:27.155] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:49.051] <TB2> INFO: PixTestBBMap::doTest() done, duration: 149 seconds
[15:14:49.051] <TB2> INFO: number of dead bumps (per ROC): 6 0 0 0 0 0 0 0 1 0 0 0 0 8 0 3
[15:14:49.051] <TB2> INFO: separation cut (per ROC): 81 76 80 81 88 90 94 93 93 92 87 84 83 81 97 74
[15:14:49.119] <TB2> INFO: ######################################################################
[15:14:49.119] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:49.119] <TB2> INFO: ######################################################################
[15:14:49.119] <TB2> INFO: ----------------------------------------------------------------------
[15:14:49.119] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:49.119] <TB2> INFO: ----------------------------------------------------------------------
[15:14:49.120] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[15:14:49.128] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[15:14:49.128] <TB2> INFO: run 1 of 1
[15:14:49.431] <TB2> INFO: Expecting 31200000 events.
[15:15:12.289] <TB2> INFO: 969700 events read in total (22140ms).
[15:15:36.201] <TB2> INFO: 1924850 events read in total (46052ms).
[15:16:00.536] <TB2> INFO: 2871050 events read in total (70387ms).
[15:16:24.630] <TB2> INFO: 3817300 events read in total (94481ms).
[15:16:48.785] <TB2> INFO: 4761400 events read in total (118636ms).
[15:17:12.989] <TB2> INFO: 5705150 events read in total (142840ms).
[15:17:37.362] <TB2> INFO: 6649150 events read in total (167213ms).
[15:18:01.602] <TB2> INFO: 7589600 events read in total (191453ms).
[15:18:25.765] <TB2> INFO: 8530950 events read in total (215616ms).
[15:18:49.916] <TB2> INFO: 9470300 events read in total (239767ms).
[15:19:14.260] <TB2> INFO: 10409450 events read in total (264111ms).
[15:19:38.488] <TB2> INFO: 11349600 events read in total (288339ms).
[15:20:02.568] <TB2> INFO: 12286350 events read in total (312419ms).
[15:20:26.721] <TB2> INFO: 13222900 events read in total (336572ms).
[15:20:50.659] <TB2> INFO: 14157400 events read in total (360510ms).
[15:21:14.730] <TB2> INFO: 15093100 events read in total (384581ms).
[15:21:38.716] <TB2> INFO: 16019650 events read in total (408567ms).
[15:22:02.634] <TB2> INFO: 16947550 events read in total (432485ms).
[15:22:26.415] <TB2> INFO: 17869850 events read in total (456266ms).
[15:22:50.249] <TB2> INFO: 18794200 events read in total (480100ms).
[15:23:14.364] <TB2> INFO: 19716600 events read in total (504215ms).
[15:23:38.368] <TB2> INFO: 20639400 events read in total (528219ms).
[15:24:02.245] <TB2> INFO: 21561150 events read in total (552096ms).
[15:24:26.453] <TB2> INFO: 22482050 events read in total (576304ms).
[15:24:50.528] <TB2> INFO: 23400000 events read in total (600379ms).
[15:25:14.776] <TB2> INFO: 24320300 events read in total (624627ms).
[15:25:38.567] <TB2> INFO: 25237400 events read in total (648418ms).
[15:26:02.567] <TB2> INFO: 26156850 events read in total (672418ms).
[15:26:26.685] <TB2> INFO: 27075950 events read in total (696536ms).
[15:26:50.521] <TB2> INFO: 27994950 events read in total (720373ms).
[15:27:14.653] <TB2> INFO: 28916450 events read in total (744504ms).
[15:27:38.520] <TB2> INFO: 29837550 events read in total (768371ms).
[15:28:02.666] <TB2> INFO: 30769350 events read in total (792517ms).
[15:28:13.200] <TB2> INFO: 31200000 events read in total (803051ms).
[15:28:13.233] <TB2> INFO: Test took 804105ms.
[15:28:13.321] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:13.416] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:14.795] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:16.334] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:17.745] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:19.141] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:20.511] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:21.872] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:23.233] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:24.616] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:26.187] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:27.627] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:29.015] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:30.390] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:31.829] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:33.160] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:34.494] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:28:35.882] <TB2> INFO: PixTestScurves::scurves() done
[15:28:35.882] <TB2> INFO: Vcal mean: 90.26 86.34 83.21 82.46 86.09 94.05 94.01 97.21 94.81 93.61 86.39 84.80 87.44 103.82 98.85 85.72
[15:28:35.882] <TB2> INFO: Vcal RMS: 5.02 5.49 4.67 5.09 5.46 5.56 6.23 5.59 5.19 6.59 5.47 4.72 5.96 5.30 5.78 4.82
[15:28:35.882] <TB2> INFO: PixTestScurves::fullTest() done, duration: 826 seconds
[15:28:35.957] <TB2> INFO: ######################################################################
[15:28:35.957] <TB2> INFO: PixTestTrim::doTest()
[15:28:35.957] <TB2> INFO: ######################################################################
[15:28:35.958] <TB2> INFO: ----------------------------------------------------------------------
[15:28:35.958] <TB2> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[15:28:35.958] <TB2> INFO: ----------------------------------------------------------------------
[15:28:36.041] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:28:36.041] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:28:36.049] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[15:28:36.049] <TB2> INFO: run 1 of 1
[15:28:36.356] <TB2> INFO: Expecting 13312000 events.
[15:29:03.604] <TB2> INFO: 1098140 events read in total (26530ms).
[15:29:31.273] <TB2> INFO: 2190480 events read in total (54199ms).
[15:29:58.893] <TB2> INFO: 3280540 events read in total (81819ms).
[15:30:26.489] <TB2> INFO: 4368160 events read in total (109415ms).
[15:30:54.106] <TB2> INFO: 5450260 events read in total (137032ms).
[15:31:21.651] <TB2> INFO: 6529180 events read in total (164577ms).
[15:31:49.313] <TB2> INFO: 7615440 events read in total (192239ms).
[15:32:16.869] <TB2> INFO: 8705640 events read in total (219795ms).
[15:32:44.555] <TB2> INFO: 9794700 events read in total (247481ms).
[15:33:12.144] <TB2> INFO: 10887960 events read in total (275070ms).
[15:33:39.927] <TB2> INFO: 11982980 events read in total (302853ms).
[15:34:07.519] <TB2> INFO: 13078460 events read in total (330445ms).
[15:34:13.734] <TB2> INFO: 13312000 events read in total (336660ms).
[15:34:13.763] <TB2> INFO: Test took 337714ms.
[15:34:13.810] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:31.829] <TB2> INFO: ROC 0 VthrComp = 90
[15:34:31.829] <TB2> INFO: ROC 1 VthrComp = 86
[15:34:31.829] <TB2> INFO: ROC 2 VthrComp = 86
[15:34:31.830] <TB2> INFO: ROC 3 VthrComp = 82
[15:34:31.830] <TB2> INFO: ROC 4 VthrComp = 88
[15:34:31.830] <TB2> INFO: ROC 5 VthrComp = 92
[15:34:31.830] <TB2> INFO: ROC 6 VthrComp = 96
[15:34:31.830] <TB2> INFO: ROC 7 VthrComp = 97
[15:34:31.830] <TB2> INFO: ROC 8 VthrComp = 91
[15:34:31.830] <TB2> INFO: ROC 9 VthrComp = 91
[15:34:31.830] <TB2> INFO: ROC 10 VthrComp = 87
[15:34:31.830] <TB2> INFO: ROC 11 VthrComp = 86
[15:34:31.830] <TB2> INFO: ROC 12 VthrComp = 85
[15:34:31.831] <TB2> INFO: ROC 13 VthrComp = 100
[15:34:31.831] <TB2> INFO: ROC 14 VthrComp = 97
[15:34:31.831] <TB2> INFO: ROC 15 VthrComp = 86
[15:34:31.831] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:34:31.831] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:34:31.841] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[15:34:31.841] <TB2> INFO: run 1 of 1
[15:34:32.144] <TB2> INFO: Expecting 13312000 events.
[15:34:56.300] <TB2> INFO: 781920 events read in total (23440ms).
[15:35:18.983] <TB2> INFO: 1559760 events read in total (46123ms).
[15:35:41.395] <TB2> INFO: 2336840 events read in total (68535ms).
[15:36:04.030] <TB2> INFO: 3114180 events read in total (91170ms).
[15:36:26.359] <TB2> INFO: 3891040 events read in total (113499ms).
[15:36:50.877] <TB2> INFO: 4669080 events read in total (138017ms).
[15:37:15.852] <TB2> INFO: 5446820 events read in total (162992ms).
[15:37:40.917] <TB2> INFO: 6224900 events read in total (188057ms).
[15:38:05.767] <TB2> INFO: 6998620 events read in total (212907ms).
[15:38:30.643] <TB2> INFO: 7769500 events read in total (237783ms).
[15:38:55.502] <TB2> INFO: 8538560 events read in total (262642ms).
[15:39:20.203] <TB2> INFO: 9306680 events read in total (287343ms).
[15:39:45.120] <TB2> INFO: 10072660 events read in total (312260ms).
[15:40:09.861] <TB2> INFO: 10837920 events read in total (337001ms).
[15:40:34.718] <TB2> INFO: 11602680 events read in total (361858ms).
[15:40:59.324] <TB2> INFO: 12367960 events read in total (386464ms).
[15:41:24.314] <TB2> INFO: 13135200 events read in total (411454ms).
[15:41:30.217] <TB2> INFO: 13312000 events read in total (417357ms).
[15:41:30.257] <TB2> INFO: Test took 418417ms.
[15:41:30.410] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:53.928] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.7597 for pixel 24/1 mean/min/max = 46.934/34.1013/59.7668
[15:41:53.928] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.553 for pixel 10/69 mean/min/max = 46.5122/32.3552/60.6692
[15:41:53.928] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 56.3044 for pixel 24/79 mean/min/max = 44.2588/32.1511/56.3664
[15:41:53.928] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.045 for pixel 11/1 mean/min/max = 45.6634/32.056/59.2708
[15:41:53.929] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.6385 for pixel 0/24 mean/min/max = 47.1213/33.5552/60.6875
[15:41:53.929] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.4792 for pixel 11/76 mean/min/max = 45.4748/32.468/58.4815
[15:41:53.929] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.6829 for pixel 12/69 mean/min/max = 45.6/31.3762/59.8237
[15:41:53.929] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.6828 for pixel 0/65 mean/min/max = 45.1945/31.6396/58.7494
[15:41:53.930] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 61.104 for pixel 15/74 mean/min/max = 47.3151/33.4168/61.2134
[15:41:53.930] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 60.3739 for pixel 36/78 mean/min/max = 47.0471/33.4962/60.598
[15:41:53.930] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 59.1503 for pixel 18/1 mean/min/max = 45.5792/31.9851/59.1732
[15:41:53.930] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 56.3477 for pixel 0/79 mean/min/max = 44.3319/32.2516/56.4122
[15:41:53.931] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.2607 for pixel 0/2 mean/min/max = 46.2153/32.1148/60.3159
[15:41:53.931] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.0924 for pixel 2/7 mean/min/max = 45.1095/31.9197/58.2994
[15:41:53.931] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 60.2295 for pixel 0/58 mean/min/max = 45.83/31.4153/60.2447
[15:41:53.931] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 56.5836 for pixel 4/0 mean/min/max = 44.3245/32.0281/56.621
[15:41:53.931] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:54.062] <TB2> INFO: Expecting 1029120 events.
[15:42:16.749] <TB2> INFO: 1029120 events read in total (21970ms).
[15:42:16.755] <TB2> INFO: Expecting 1029120 events.
[15:42:40.380] <TB2> INFO: 1029120 events read in total (23093ms).
[15:42:40.389] <TB2> INFO: Expecting 1029120 events.
[15:43:03.935] <TB2> INFO: 1029120 events read in total (23018ms).
[15:43:03.943] <TB2> INFO: Expecting 1029120 events.
[15:43:27.438] <TB2> INFO: 1029120 events read in total (22961ms).
[15:43:27.449] <TB2> INFO: Expecting 1029120 events.
[15:43:51.167] <TB2> INFO: 1029120 events read in total (23183ms).
[15:43:51.180] <TB2> INFO: Expecting 1029120 events.
[15:44:14.641] <TB2> INFO: 1029120 events read in total (22920ms).
[15:44:14.655] <TB2> INFO: Expecting 1029120 events.
[15:44:38.606] <TB2> INFO: 1029120 events read in total (23415ms).
[15:44:38.626] <TB2> INFO: Expecting 1029120 events.
[15:45:02.314] <TB2> INFO: 1029120 events read in total (23160ms).
[15:45:02.333] <TB2> INFO: Expecting 1029120 events.
[15:45:25.810] <TB2> INFO: 1029120 events read in total (22950ms).
[15:45:25.830] <TB2> INFO: Expecting 1029120 events.
[15:45:49.603] <TB2> INFO: 1029120 events read in total (23243ms).
[15:45:49.624] <TB2> INFO: Expecting 1029120 events.
[15:46:13.270] <TB2> INFO: 1029120 events read in total (23118ms).
[15:46:13.295] <TB2> INFO: Expecting 1029120 events.
[15:46:36.537] <TB2> INFO: 1029120 events read in total (22714ms).
[15:46:36.568] <TB2> INFO: Expecting 1029120 events.
[15:47:00.110] <TB2> INFO: 1029120 events read in total (23014ms).
[15:47:00.139] <TB2> INFO: Expecting 1029120 events.
[15:47:23.826] <TB2> INFO: 1029120 events read in total (23159ms).
[15:47:23.855] <TB2> INFO: Expecting 1029120 events.
[15:47:47.268] <TB2> INFO: 1029120 events read in total (22885ms).
[15:47:47.299] <TB2> INFO: Expecting 1029120 events.
[15:48:10.797] <TB2> INFO: 1029120 events read in total (22970ms).
[15:48:10.835] <TB2> INFO: Test took 376904ms.
[15:48:12.032] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[15:48:12.041] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[15:48:12.042] <TB2> INFO: run 1 of 1
[15:48:12.390] <TB2> INFO: Expecting 16640000 events.
[15:48:37.117] <TB2> INFO: 725140 events read in total (24011ms).
[15:49:01.348] <TB2> INFO: 1447340 events read in total (48242ms).
[15:49:25.512] <TB2> INFO: 2169620 events read in total (72406ms).
[15:49:49.986] <TB2> INFO: 2891720 events read in total (96880ms).
[15:50:14.211] <TB2> INFO: 3613840 events read in total (121105ms).
[15:50:38.543] <TB2> INFO: 4335580 events read in total (145437ms).
[15:51:02.825] <TB2> INFO: 5057700 events read in total (169719ms).
[15:51:26.988] <TB2> INFO: 5781120 events read in total (193882ms).
[15:51:51.384] <TB2> INFO: 6503660 events read in total (218278ms).
[15:52:15.676] <TB2> INFO: 7225940 events read in total (242570ms).
[15:52:40.030] <TB2> INFO: 7948780 events read in total (266924ms).
[15:53:04.274] <TB2> INFO: 8668380 events read in total (291168ms).
[15:53:28.497] <TB2> INFO: 9385760 events read in total (315391ms).
[15:53:52.729] <TB2> INFO: 10102220 events read in total (339623ms).
[15:54:16.884] <TB2> INFO: 10817460 events read in total (363778ms).
[15:54:40.986] <TB2> INFO: 11532880 events read in total (387880ms).
[15:55:05.111] <TB2> INFO: 12246800 events read in total (412005ms).
[15:55:29.217] <TB2> INFO: 12959660 events read in total (436111ms).
[15:55:53.037] <TB2> INFO: 13672520 events read in total (459931ms).
[15:56:17.459] <TB2> INFO: 14384660 events read in total (484353ms).
[15:56:41.534] <TB2> INFO: 15097920 events read in total (508428ms).
[15:57:05.633] <TB2> INFO: 15810200 events read in total (532527ms).
[15:57:29.956] <TB2> INFO: 16524360 events read in total (556850ms).
[15:57:34.257] <TB2> INFO: 16640000 events read in total (561151ms).
[15:57:34.327] <TB2> INFO: Test took 562285ms.
[15:57:34.552] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:01.705] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.091055 .. 52.660889
[15:58:01.780] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 62 (-1/-1) hits flags = 16 (plus default)
[15:58:01.788] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[15:58:01.788] <TB2> INFO: run 1 of 1
[15:58:02.090] <TB2> INFO: Expecting 5241600 events.
[15:58:27.706] <TB2> INFO: 916880 events read in total (24896ms).
[15:58:54.053] <TB2> INFO: 1836200 events read in total (51243ms).
[15:59:20.464] <TB2> INFO: 2756540 events read in total (77655ms).
[15:59:46.700] <TB2> INFO: 3671660 events read in total (103890ms).
[16:00:12.937] <TB2> INFO: 4579680 events read in total (130128ms).
[16:00:32.175] <TB2> INFO: 5241600 events read in total (149365ms).
[16:00:32.194] <TB2> INFO: Test took 150406ms.
[16:00:32.235] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:45.961] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 16.979362 .. 46.786301
[16:00:46.036] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 6 .. 56 (-1/-1) hits flags = 16 (plus default)
[16:00:46.045] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:00:46.045] <TB2> INFO: run 1 of 1
[16:00:46.351] <TB2> INFO: Expecting 4243200 events.
[16:01:13.403] <TB2> INFO: 925480 events read in total (26335ms).
[16:01:39.701] <TB2> INFO: 1851900 events read in total (52634ms).
[16:02:06.262] <TB2> INFO: 2777160 events read in total (79194ms).
[16:02:32.715] <TB2> INFO: 3699820 events read in total (105647ms).
[16:02:48.561] <TB2> INFO: 4243200 events read in total (121494ms).
[16:02:48.585] <TB2> INFO: Test took 122541ms.
[16:02:48.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:01.783] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 21.406447 .. 43.794452
[16:03:01.866] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 11 .. 53 (-1/-1) hits flags = 16 (plus default)
[16:03:01.875] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:03:01.875] <TB2> INFO: run 1 of 1
[16:03:02.191] <TB2> INFO: Expecting 3577600 events.
[16:03:29.456] <TB2> INFO: 920900 events read in total (26545ms).
[16:03:55.832] <TB2> INFO: 1842060 events read in total (52921ms).
[16:04:22.265] <TB2> INFO: 2762040 events read in total (79354ms).
[16:04:45.932] <TB2> INFO: 3577600 events read in total (103021ms).
[16:04:45.948] <TB2> INFO: Test took 104073ms.
[16:04:45.977] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:04:59.282] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 24.046953 .. 43.478681
[16:04:59.360] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 14 .. 53 (-1/-1) hits flags = 16 (plus default)
[16:04:59.369] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:04:59.369] <TB2> INFO: run 1 of 1
[16:04:59.676] <TB2> INFO: Expecting 3328000 events.
[16:05:24.016] <TB2> INFO: 900780 events read in total (23622ms).
[16:05:47.914] <TB2> INFO: 1801580 events read in total (47520ms).
[16:06:11.845] <TB2> INFO: 2702160 events read in total (71452ms).
[16:06:28.848] <TB2> INFO: 3328000 events read in total (88454ms).
[16:06:28.871] <TB2> INFO: Test took 89502ms.
[16:06:28.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:41.856] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:06:41.857] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[16:06:41.868] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[16:06:41.868] <TB2> INFO: run 1 of 1
[16:06:42.229] <TB2> INFO: Expecting 3411200 events.
[16:07:08.934] <TB2> INFO: 878360 events read in total (25989ms).
[16:07:34.950] <TB2> INFO: 1757200 events read in total (52006ms).
[16:08:00.997] <TB2> INFO: 2635420 events read in total (78053ms).
[16:08:23.793] <TB2> INFO: 3411200 events read in total (100848ms).
[16:08:23.809] <TB2> INFO: Test took 101941ms.
[16:08:23.846] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:08:36.770] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:08:36.770] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:08:36.770] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:08:36.770] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:08:36.770] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:08:36.770] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:08:36.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:08:36.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:08:36.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:08:36.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:08:36.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:08:36.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:08:36.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:08:36.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:08:36.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:08:36.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:08:36.772] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C0.dat
[16:08:36.779] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C1.dat
[16:08:36.785] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C2.dat
[16:08:36.792] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C3.dat
[16:08:36.800] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C4.dat
[16:08:36.807] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C5.dat
[16:08:36.817] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C6.dat
[16:08:36.827] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C7.dat
[16:08:36.837] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C8.dat
[16:08:36.848] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C9.dat
[16:08:36.857] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C10.dat
[16:08:36.864] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C11.dat
[16:08:36.873] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C12.dat
[16:08:36.881] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C13.dat
[16:08:36.891] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C14.dat
[16:08:36.900] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C15.dat
[16:08:36.910] <TB2> INFO: PixTestTrim::trimTest() done
[16:08:36.910] <TB2> INFO: vtrim: 96 104 80 89 101 91 105 97 100 100 96 77 91 89 96 80
[16:08:36.910] <TB2> INFO: vthrcomp: 90 86 86 82 88 92 96 97 91 91 87 86 85 100 97 86
[16:08:36.910] <TB2> INFO: vcal mean: 34.99 34.95 34.98 35.03 35.00 35.03 34.94 34.94 35.01 34.94 34.96 35.00 34.99 34.95 34.98 35.01
[16:08:36.910] <TB2> INFO: vcal RMS: 0.74 0.75 0.68 0.72 0.72 0.75 0.76 0.73 0.74 1.42 0.72 0.67 0.74 0.76 0.75 0.75
[16:08:36.910] <TB2> INFO: bits mean: 8.72 9.31 9.60 9.21 8.30 9.20 9.34 9.22 8.84 8.93 9.47 9.27 8.73 9.43 9.07 10.04
[16:08:36.910] <TB2> INFO: bits RMS: 2.66 2.68 2.72 2.83 2.88 2.76 2.87 2.91 2.64 2.65 2.74 2.89 2.97 2.78 2.97 2.54
[16:08:36.917] <TB2> INFO: ----------------------------------------------------------------------
[16:08:36.917] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[16:08:36.917] <TB2> INFO: ----------------------------------------------------------------------
[16:08:36.919] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[16:08:36.929] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:08:36.929] <TB2> INFO: run 1 of 1
[16:08:37.233] <TB2> INFO: Expecting 8320000 events.
[16:09:07.390] <TB2> INFO: 945340 events read in total (29442ms).
[16:09:36.771] <TB2> INFO: 1879530 events read in total (58822ms).
[16:10:06.288] <TB2> INFO: 2810680 events read in total (88339ms).
[16:10:32.964] <TB2> INFO: 3738420 events read in total (115015ms).
[16:11:02.144] <TB2> INFO: 4660040 events read in total (144195ms).
[16:11:31.434] <TB2> INFO: 5577880 events read in total (173485ms).
[16:12:00.704] <TB2> INFO: 6493780 events read in total (202755ms).
[16:12:30.172] <TB2> INFO: 7409500 events read in total (232223ms).
[16:12:59.338] <TB2> INFO: 8320000 events read in total (261389ms).
[16:12:59.383] <TB2> INFO: Test took 262454ms.
[16:12:59.505] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:13:25.990] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 174 (-1/-1) hits flags = 16 (plus default)
[16:13:25.998] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:13:25.998] <TB2> INFO: run 1 of 1
[16:13:26.301] <TB2> INFO: Expecting 7280000 events.
[16:13:56.765] <TB2> INFO: 963690 events read in total (29748ms).
[16:14:26.516] <TB2> INFO: 1915730 events read in total (59499ms).
[16:14:56.134] <TB2> INFO: 2863930 events read in total (89117ms).
[16:15:23.122] <TB2> INFO: 3805710 events read in total (116105ms).
[16:15:52.502] <TB2> INFO: 4738980 events read in total (145485ms).
[16:16:21.951] <TB2> INFO: 5670110 events read in total (174934ms).
[16:16:51.177] <TB2> INFO: 6600530 events read in total (204160ms).
[16:17:12.545] <TB2> INFO: 7280000 events read in total (225528ms).
[16:17:12.586] <TB2> INFO: Test took 226588ms.
[16:17:12.681] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:17:37.816] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 161 (-1/-1) hits flags = 16 (plus default)
[16:17:37.824] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:17:37.824] <TB2> INFO: run 1 of 1
[16:17:38.145] <TB2> INFO: Expecting 6739200 events.
[16:18:09.318] <TB2> INFO: 998390 events read in total (30457ms).
[16:18:39.606] <TB2> INFO: 1984340 events read in total (60745ms).
[16:19:09.525] <TB2> INFO: 2964350 events read in total (90665ms).
[16:19:38.088] <TB2> INFO: 3934090 events read in total (119227ms).
[16:20:08.072] <TB2> INFO: 4897610 events read in total (149211ms).
[16:20:37.916] <TB2> INFO: 5858620 events read in total (179055ms).
[16:21:04.850] <TB2> INFO: 6739200 events read in total (205989ms).
[16:21:04.879] <TB2> INFO: Test took 207055ms.
[16:21:04.956] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:21:27.106] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 160 (-1/-1) hits flags = 16 (plus default)
[16:21:27.115] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:21:27.115] <TB2> INFO: run 1 of 1
[16:21:27.420] <TB2> INFO: Expecting 6697600 events.
[16:21:58.511] <TB2> INFO: 1001300 events read in total (30373ms).
[16:22:28.850] <TB2> INFO: 1990080 events read in total (60712ms).
[16:22:57.368] <TB2> INFO: 2973030 events read in total (89231ms).
[16:23:27.269] <TB2> INFO: 3944110 events read in total (119131ms).
[16:23:57.508] <TB2> INFO: 4910040 events read in total (149370ms).
[16:24:27.526] <TB2> INFO: 5872930 events read in total (179388ms).
[16:24:51.828] <TB2> INFO: 6697600 events read in total (203690ms).
[16:24:51.874] <TB2> INFO: Test took 204759ms.
[16:24:51.955] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:16.014] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 16 (plus default)
[16:25:16.023] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:25:16.023] <TB2> INFO: run 1 of 1
[16:25:16.326] <TB2> INFO: Expecting 6572800 events.
[16:25:47.712] <TB2> INFO: 1010760 events read in total (30667ms).
[16:26:17.850] <TB2> INFO: 2007760 events read in total (60805ms).
[16:26:48.193] <TB2> INFO: 2998450 events read in total (91149ms).
[16:27:18.384] <TB2> INFO: 3976830 events read in total (121339ms).
[16:27:48.354] <TB2> INFO: 4950070 events read in total (151309ms).
[16:28:18.252] <TB2> INFO: 5921320 events read in total (181207ms).
[16:28:38.438] <TB2> INFO: 6572800 events read in total (201393ms).
[16:28:38.480] <TB2> INFO: Test took 202457ms.
[16:28:38.555] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:01.692] <TB2> INFO: PixTestTrim::trimBitTest() done
[16:29:01.694] <TB2> INFO: PixTestTrim::doTest() done, duration: 3625 seconds
[16:29:02.387] <TB2> INFO: ######################################################################
[16:29:02.387] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:29:02.387] <TB2> INFO: ######################################################################
[16:29:02.720] <TB2> INFO: Expecting 41600 events.
[16:29:07.018] <TB2> INFO: 41600 events read in total (3582ms).
[16:29:07.019] <TB2> INFO: Test took 4629ms.
[16:29:07.027] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:07.599] <TB2> INFO: Expecting 41600 events.
[16:29:11.919] <TB2> INFO: 41600 events read in total (3604ms).
[16:29:11.920] <TB2> INFO: Test took 4641ms.
[16:29:11.926] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:12.283] <TB2> INFO: Expecting 41600 events.
[16:29:16.617] <TB2> INFO: 41600 events read in total (3618ms).
[16:29:16.617] <TB2> INFO: Test took 4658ms.
[16:29:16.624] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:16.630] <TB2> INFO: The DUT currently contains the following objects:
[16:29:16.630] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:16.630] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:16.630] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:16.630] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:16.630] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.630] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.631] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.631] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.955] <TB2> INFO: Expecting 2560 events.
[16:29:18.018] <TB2> INFO: 2560 events read in total (347ms).
[16:29:18.018] <TB2> INFO: Test took 1387ms.
[16:29:18.018] <TB2> INFO: The DUT currently contains the following objects:
[16:29:18.018] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:18.018] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:18.018] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:18.018] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:18.018] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.018] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.019] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.019] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.019] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.019] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.019] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.432] <TB2> INFO: Expecting 2560 events.
[16:29:19.494] <TB2> INFO: 2560 events read in total (346ms).
[16:29:19.494] <TB2> INFO: Test took 1475ms.
[16:29:19.494] <TB2> INFO: The DUT currently contains the following objects:
[16:29:19.494] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:19.494] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:19.494] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:19.494] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:19.494] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.494] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.908] <TB2> INFO: Expecting 2560 events.
[16:29:20.969] <TB2> INFO: 2560 events read in total (345ms).
[16:29:20.969] <TB2> INFO: Test took 1475ms.
[16:29:20.969] <TB2> INFO: The DUT currently contains the following objects:
[16:29:20.969] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:20.969] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:20.969] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:20.969] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:20.969] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.969] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.969] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.969] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.969] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.969] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.970] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.384] <TB2> INFO: Expecting 2560 events.
[16:29:22.444] <TB2> INFO: 2560 events read in total (344ms).
[16:29:22.444] <TB2> INFO: Test took 1474ms.
[16:29:22.445] <TB2> INFO: The DUT currently contains the following objects:
[16:29:22.445] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:22.445] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:22.445] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:22.445] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:22.445] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.445] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.859] <TB2> INFO: Expecting 2560 events.
[16:29:23.920] <TB2> INFO: 2560 events read in total (345ms).
[16:29:23.920] <TB2> INFO: Test took 1475ms.
[16:29:23.920] <TB2> INFO: The DUT currently contains the following objects:
[16:29:23.920] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:23.920] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:23.920] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:23.920] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:23.920] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.920] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.920] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.920] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.920] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.920] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.920] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.921] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.335] <TB2> INFO: Expecting 2560 events.
[16:29:25.398] <TB2> INFO: 2560 events read in total (347ms).
[16:29:25.398] <TB2> INFO: Test took 1477ms.
[16:29:25.398] <TB2> INFO: The DUT currently contains the following objects:
[16:29:25.398] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:25.399] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:25.399] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:25.399] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:25.399] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.399] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.813] <TB2> INFO: Expecting 2560 events.
[16:29:26.875] <TB2> INFO: 2560 events read in total (346ms).
[16:29:26.875] <TB2> INFO: Test took 1476ms.
[16:29:26.875] <TB2> INFO: The DUT currently contains the following objects:
[16:29:26.875] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:26.875] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:26.875] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:26.875] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:26.875] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.875] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.876] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.876] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.876] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.876] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.876] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.876] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.290] <TB2> INFO: Expecting 2560 events.
[16:29:28.352] <TB2> INFO: 2560 events read in total (346ms).
[16:29:28.352] <TB2> INFO: Test took 1476ms.
[16:29:28.352] <TB2> INFO: The DUT currently contains the following objects:
[16:29:28.352] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:28.352] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:28.352] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:28.352] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:28.352] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.352] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.353] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.353] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.353] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.353] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.353] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:28.766] <TB2> INFO: Expecting 2560 events.
[16:29:29.827] <TB2> INFO: 2560 events read in total (345ms).
[16:29:29.827] <TB2> INFO: Test took 1474ms.
[16:29:29.827] <TB2> INFO: The DUT currently contains the following objects:
[16:29:29.827] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:29.827] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:29.827] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:29.827] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:29.827] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.827] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.827] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.827] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.827] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.827] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.827] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.827] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.828] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.828] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.828] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.828] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.828] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.828] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.828] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.828] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.242] <TB2> INFO: Expecting 2560 events.
[16:29:31.326] <TB2> INFO: 2560 events read in total (367ms).
[16:29:31.326] <TB2> INFO: Test took 1498ms.
[16:29:31.327] <TB2> INFO: The DUT currently contains the following objects:
[16:29:31.327] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:31.327] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:31.327] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:31.327] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:31.327] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.327] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:31.741] <TB2> INFO: Expecting 2560 events.
[16:29:32.812] <TB2> INFO: 2560 events read in total (354ms).
[16:29:32.812] <TB2> INFO: Test took 1485ms.
[16:29:32.813] <TB2> INFO: The DUT currently contains the following objects:
[16:29:32.813] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:32.813] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:32.813] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:32.813] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:32.813] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.813] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.814] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.227] <TB2> INFO: Expecting 2560 events.
[16:29:34.298] <TB2> INFO: 2560 events read in total (355ms).
[16:29:34.298] <TB2> INFO: Test took 1484ms.
[16:29:34.298] <TB2> INFO: The DUT currently contains the following objects:
[16:29:34.298] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:34.298] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:34.299] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:34.299] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:34.299] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.299] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:34.713] <TB2> INFO: Expecting 2560 events.
[16:29:35.783] <TB2> INFO: 2560 events read in total (354ms).
[16:29:35.783] <TB2> INFO: Test took 1484ms.
[16:29:35.784] <TB2> INFO: The DUT currently contains the following objects:
[16:29:35.784] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:35.784] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:35.784] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:35.784] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:35.784] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.784] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.785] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.785] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.785] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.785] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.199] <TB2> INFO: Expecting 2560 events.
[16:29:37.269] <TB2> INFO: 2560 events read in total (354ms).
[16:29:37.270] <TB2> INFO: Test took 1485ms.
[16:29:37.270] <TB2> INFO: The DUT currently contains the following objects:
[16:29:37.270] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:37.270] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:37.270] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:37.270] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:37.270] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.270] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.270] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.270] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.271] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.684] <TB2> INFO: Expecting 2560 events.
[16:29:38.755] <TB2> INFO: 2560 events read in total (354ms).
[16:29:38.755] <TB2> INFO: Test took 1484ms.
[16:29:38.756] <TB2> INFO: The DUT currently contains the following objects:
[16:29:38.756] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:38.756] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:38.756] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:38.756] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:38.756] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.756] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.756] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.756] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.756] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.756] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.757] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.170] <TB2> INFO: Expecting 2560 events.
[16:29:40.241] <TB2> INFO: 2560 events read in total (355ms).
[16:29:40.242] <TB2> INFO: Test took 1485ms.
[16:29:40.245] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:29:40.659] <TB2> INFO: Expecting 655360 events.
[16:29:57.168] <TB2> INFO: 655360 events read in total (15793ms).
[16:29:57.177] <TB2> INFO: Expecting 655360 events.
[16:30:13.464] <TB2> INFO: 655360 events read in total (15759ms).
[16:30:13.479] <TB2> INFO: Expecting 655360 events.
[16:30:29.895] <TB2> INFO: 655360 events read in total (15888ms).
[16:30:29.911] <TB2> INFO: Expecting 655360 events.
[16:30:46.353] <TB2> INFO: 655360 events read in total (15915ms).
[16:30:46.374] <TB2> INFO: Expecting 655360 events.
[16:31:02.805] <TB2> INFO: 655360 events read in total (15903ms).
[16:31:02.828] <TB2> INFO: Expecting 655360 events.
[16:31:19.396] <TB2> INFO: 655360 events read in total (16040ms).
[16:31:19.429] <TB2> INFO: Expecting 655360 events.
[16:31:35.816] <TB2> INFO: 655360 events read in total (15859ms).
[16:31:35.849] <TB2> INFO: Expecting 655360 events.
[16:31:52.365] <TB2> INFO: 655360 events read in total (15989ms).
[16:31:52.401] <TB2> INFO: Expecting 655360 events.
[16:32:08.782] <TB2> INFO: 655360 events read in total (15854ms).
[16:32:08.821] <TB2> INFO: Expecting 655360 events.
[16:32:25.284] <TB2> INFO: 655360 events read in total (15935ms).
[16:32:25.328] <TB2> INFO: Expecting 655360 events.
[16:32:41.593] <TB2> INFO: 655360 events read in total (15738ms).
[16:32:41.641] <TB2> INFO: Expecting 655360 events.
[16:32:58.090] <TB2> INFO: 655360 events read in total (15921ms).
[16:32:58.138] <TB2> INFO: Expecting 655360 events.
[16:33:14.114] <TB2> INFO: 655360 events read in total (15448ms).
[16:33:14.168] <TB2> INFO: Expecting 655360 events.
[16:33:29.222] <TB2> INFO: 655360 events read in total (14527ms).
[16:33:29.276] <TB2> INFO: Expecting 655360 events.
[16:33:45.777] <TB2> INFO: 655360 events read in total (15973ms).
[16:33:45.833] <TB2> INFO: Expecting 655360 events.
[16:34:02.198] <TB2> INFO: 655360 events read in total (15837ms).
[16:34:02.274] <TB2> INFO: Test took 262029ms.
[16:34:02.372] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:34:02.679] <TB2> INFO: Expecting 655360 events.
[16:34:19.302] <TB2> INFO: 655360 events read in total (15907ms).
[16:34:19.312] <TB2> INFO: Expecting 655360 events.
[16:34:35.582] <TB2> INFO: 655360 events read in total (15742ms).
[16:34:35.595] <TB2> INFO: Expecting 655360 events.
[16:34:52.074] <TB2> INFO: 655360 events read in total (15951ms).
[16:34:52.091] <TB2> INFO: Expecting 655360 events.
[16:35:08.011] <TB2> INFO: 655360 events read in total (15393ms).
[16:35:08.034] <TB2> INFO: Expecting 655360 events.
[16:35:23.077] <TB2> INFO: 655360 events read in total (14516ms).
[16:35:23.103] <TB2> INFO: Expecting 655360 events.
[16:35:38.073] <TB2> INFO: 655360 events read in total (14443ms).
[16:35:38.101] <TB2> INFO: Expecting 655360 events.
[16:35:53.212] <TB2> INFO: 655360 events read in total (14583ms).
[16:35:53.246] <TB2> INFO: Expecting 655360 events.
[16:36:08.443] <TB2> INFO: 655360 events read in total (14670ms).
[16:36:08.483] <TB2> INFO: Expecting 655360 events.
[16:36:23.594] <TB2> INFO: 655360 events read in total (14583ms).
[16:36:23.636] <TB2> INFO: Expecting 655360 events.
[16:36:39.368] <TB2> INFO: 655360 events read in total (15205ms).
[16:36:39.411] <TB2> INFO: Expecting 655360 events.
[16:36:55.135] <TB2> INFO: 655360 events read in total (15197ms).
[16:36:55.184] <TB2> INFO: Expecting 655360 events.
[16:37:10.225] <TB2> INFO: 655360 events read in total (14514ms).
[16:37:10.278] <TB2> INFO: Expecting 655360 events.
[16:37:26.993] <TB2> INFO: 655360 events read in total (16188ms).
[16:37:27.058] <TB2> INFO: Expecting 655360 events.
[16:37:43.476] <TB2> INFO: 655360 events read in total (15891ms).
[16:37:43.546] <TB2> INFO: Expecting 655360 events.
[16:38:00.267] <TB2> INFO: 655360 events read in total (16194ms).
[16:38:00.339] <TB2> INFO: Expecting 655360 events.
[16:38:16.749] <TB2> INFO: 655360 events read in total (15882ms).
[16:38:16.823] <TB2> INFO: Test took 254451ms.
[16:38:17.068] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.077] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.086] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.095] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:17.102] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:38:17.110] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[16:38:17.118] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[16:38:17.127] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.134] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:17.143] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:38:17.151] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.160] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.169] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.177] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.184] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:17.192] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.200] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.208] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.216] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.226] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.233] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.241] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.248] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:17.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:38:17.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:38:17.286] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:38:17.287] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:38:17.288] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:38:17.288] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:38:17.288] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:38:17.595] <TB2> INFO: Expecting 41600 events.
[16:38:21.998] <TB2> INFO: 41600 events read in total (3686ms).
[16:38:21.999] <TB2> INFO: Test took 4708ms.
[16:38:22.576] <TB2> INFO: Expecting 41600 events.
[16:38:27.038] <TB2> INFO: 41600 events read in total (3745ms).
[16:38:27.038] <TB2> INFO: Test took 4811ms.
[16:38:27.621] <TB2> INFO: Expecting 41600 events.
[16:38:32.048] <TB2> INFO: 41600 events read in total (3711ms).
[16:38:32.048] <TB2> INFO: Test took 4780ms.
[16:38:32.288] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:32.420] <TB2> INFO: Expecting 2560 events.
[16:38:33.490] <TB2> INFO: 2560 events read in total (354ms).
[16:38:33.490] <TB2> INFO: Test took 1202ms.
[16:38:33.493] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:33.906] <TB2> INFO: Expecting 2560 events.
[16:38:34.973] <TB2> INFO: 2560 events read in total (351ms).
[16:38:34.974] <TB2> INFO: Test took 1481ms.
[16:38:34.978] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:35.389] <TB2> INFO: Expecting 2560 events.
[16:38:36.458] <TB2> INFO: 2560 events read in total (352ms).
[16:38:36.458] <TB2> INFO: Test took 1480ms.
[16:38:36.461] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:36.874] <TB2> INFO: Expecting 2560 events.
[16:38:37.942] <TB2> INFO: 2560 events read in total (352ms).
[16:38:37.942] <TB2> INFO: Test took 1481ms.
[16:38:37.945] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:38.358] <TB2> INFO: Expecting 2560 events.
[16:38:39.430] <TB2> INFO: 2560 events read in total (355ms).
[16:38:39.430] <TB2> INFO: Test took 1485ms.
[16:38:39.435] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:39.846] <TB2> INFO: Expecting 2560 events.
[16:38:40.915] <TB2> INFO: 2560 events read in total (353ms).
[16:38:40.915] <TB2> INFO: Test took 1480ms.
[16:38:40.918] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:41.331] <TB2> INFO: Expecting 2560 events.
[16:38:42.401] <TB2> INFO: 2560 events read in total (354ms).
[16:38:42.401] <TB2> INFO: Test took 1483ms.
[16:38:42.405] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:42.817] <TB2> INFO: Expecting 2560 events.
[16:38:43.885] <TB2> INFO: 2560 events read in total (352ms).
[16:38:43.885] <TB2> INFO: Test took 1480ms.
[16:38:43.888] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:44.301] <TB2> INFO: Expecting 2560 events.
[16:38:45.373] <TB2> INFO: 2560 events read in total (356ms).
[16:38:45.373] <TB2> INFO: Test took 1485ms.
[16:38:45.376] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:45.789] <TB2> INFO: Expecting 2560 events.
[16:38:46.858] <TB2> INFO: 2560 events read in total (353ms).
[16:38:46.858] <TB2> INFO: Test took 1482ms.
[16:38:46.861] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:47.274] <TB2> INFO: Expecting 2560 events.
[16:38:48.357] <TB2> INFO: 2560 events read in total (367ms).
[16:38:48.357] <TB2> INFO: Test took 1496ms.
[16:38:48.361] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:48.773] <TB2> INFO: Expecting 2560 events.
[16:38:49.838] <TB2> INFO: 2560 events read in total (348ms).
[16:38:49.839] <TB2> INFO: Test took 1478ms.
[16:38:49.842] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:50.255] <TB2> INFO: Expecting 2560 events.
[16:38:51.322] <TB2> INFO: 2560 events read in total (351ms).
[16:38:51.323] <TB2> INFO: Test took 1481ms.
[16:38:51.326] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:51.738] <TB2> INFO: Expecting 2560 events.
[16:38:52.806] <TB2> INFO: 2560 events read in total (351ms).
[16:38:52.806] <TB2> INFO: Test took 1480ms.
[16:38:52.811] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:53.222] <TB2> INFO: Expecting 2560 events.
[16:38:54.292] <TB2> INFO: 2560 events read in total (354ms).
[16:38:54.292] <TB2> INFO: Test took 1482ms.
[16:38:54.296] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:54.708] <TB2> INFO: Expecting 2560 events.
[16:38:55.780] <TB2> INFO: 2560 events read in total (355ms).
[16:38:55.780] <TB2> INFO: Test took 1484ms.
[16:38:55.783] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:56.196] <TB2> INFO: Expecting 2560 events.
[16:38:57.265] <TB2> INFO: 2560 events read in total (353ms).
[16:38:57.265] <TB2> INFO: Test took 1482ms.
[16:38:57.268] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:57.681] <TB2> INFO: Expecting 2560 events.
[16:38:58.750] <TB2> INFO: 2560 events read in total (352ms).
[16:38:58.751] <TB2> INFO: Test took 1484ms.
[16:38:58.753] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:59.166] <TB2> INFO: Expecting 2560 events.
[16:39:00.234] <TB2> INFO: 2560 events read in total (351ms).
[16:39:00.234] <TB2> INFO: Test took 1481ms.
[16:39:00.237] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:00.650] <TB2> INFO: Expecting 2560 events.
[16:39:01.720] <TB2> INFO: 2560 events read in total (354ms).
[16:39:01.720] <TB2> INFO: Test took 1484ms.
[16:39:01.723] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:02.136] <TB2> INFO: Expecting 2560 events.
[16:39:03.203] <TB2> INFO: 2560 events read in total (351ms).
[16:39:03.204] <TB2> INFO: Test took 1481ms.
[16:39:03.207] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:03.619] <TB2> INFO: Expecting 2560 events.
[16:39:04.689] <TB2> INFO: 2560 events read in total (353ms).
[16:39:04.689] <TB2> INFO: Test took 1482ms.
[16:39:04.692] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:05.105] <TB2> INFO: Expecting 2560 events.
[16:39:06.177] <TB2> INFO: 2560 events read in total (355ms).
[16:39:06.177] <TB2> INFO: Test took 1485ms.
[16:39:06.180] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:06.592] <TB2> INFO: Expecting 2560 events.
[16:39:07.663] <TB2> INFO: 2560 events read in total (354ms).
[16:39:07.664] <TB2> INFO: Test took 1485ms.
[16:39:07.667] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:08.079] <TB2> INFO: Expecting 2560 events.
[16:39:09.148] <TB2> INFO: 2560 events read in total (352ms).
[16:39:09.149] <TB2> INFO: Test took 1483ms.
[16:39:09.151] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:09.564] <TB2> INFO: Expecting 2560 events.
[16:39:10.633] <TB2> INFO: 2560 events read in total (352ms).
[16:39:10.633] <TB2> INFO: Test took 1482ms.
[16:39:10.636] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:11.049] <TB2> INFO: Expecting 2560 events.
[16:39:12.118] <TB2> INFO: 2560 events read in total (353ms).
[16:39:12.118] <TB2> INFO: Test took 1482ms.
[16:39:12.120] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:12.534] <TB2> INFO: Expecting 2560 events.
[16:39:13.602] <TB2> INFO: 2560 events read in total (352ms).
[16:39:13.603] <TB2> INFO: Test took 1483ms.
[16:39:13.606] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:14.019] <TB2> INFO: Expecting 2560 events.
[16:39:15.088] <TB2> INFO: 2560 events read in total (353ms).
[16:39:15.088] <TB2> INFO: Test took 1483ms.
[16:39:15.091] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:15.504] <TB2> INFO: Expecting 2560 events.
[16:39:16.570] <TB2> INFO: 2560 events read in total (349ms).
[16:39:16.570] <TB2> INFO: Test took 1479ms.
[16:39:16.573] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:16.986] <TB2> INFO: Expecting 2560 events.
[16:39:18.053] <TB2> INFO: 2560 events read in total (351ms).
[16:39:18.053] <TB2> INFO: Test took 1481ms.
[16:39:18.056] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:18.470] <TB2> INFO: Expecting 2560 events.
[16:39:19.541] <TB2> INFO: 2560 events read in total (355ms).
[16:39:19.541] <TB2> INFO: Test took 1485ms.
[16:39:20.172] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 617 seconds
[16:39:20.172] <TB2> INFO: PH scale (per ROC): 71 69 80 69 73 67 75 67 67 77 78 69 64 67 65 78
[16:39:20.172] <TB2> INFO: PH offset (per ROC): 174 176 184 176 179 177 202 187 177 175 170 167 185 185 200 172
[16:39:20.380] <TB2> INFO: ######################################################################
[16:39:20.380] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:39:20.380] <TB2> INFO: ######################################################################
[16:39:20.391] <TB2> INFO: scanning low vcal = 10
[16:39:20.736] <TB2> INFO: Expecting 41600 events.
[16:39:24.355] <TB2> INFO: 41600 events read in total (2902ms).
[16:39:24.355] <TB2> INFO: Test took 3963ms.
[16:39:24.358] <TB2> INFO: scanning low vcal = 20
[16:39:24.770] <TB2> INFO: Expecting 41600 events.
[16:39:28.368] <TB2> INFO: 41600 events read in total (2883ms).
[16:39:28.369] <TB2> INFO: Test took 4011ms.
[16:39:28.371] <TB2> INFO: scanning low vcal = 30
[16:39:28.783] <TB2> INFO: Expecting 41600 events.
[16:39:32.430] <TB2> INFO: 41600 events read in total (2931ms).
[16:39:32.431] <TB2> INFO: Test took 4060ms.
[16:39:32.433] <TB2> INFO: scanning low vcal = 40
[16:39:32.838] <TB2> INFO: Expecting 41600 events.
[16:39:36.985] <TB2> INFO: 41600 events read in total (3430ms).
[16:39:36.985] <TB2> INFO: Test took 4552ms.
[16:39:36.988] <TB2> INFO: scanning low vcal = 50
[16:39:37.337] <TB2> INFO: Expecting 41600 events.
[16:39:41.522] <TB2> INFO: 41600 events read in total (3468ms).
[16:39:41.523] <TB2> INFO: Test took 4534ms.
[16:39:41.526] <TB2> INFO: scanning low vcal = 60
[16:39:41.866] <TB2> INFO: Expecting 41600 events.
[16:39:46.079] <TB2> INFO: 41600 events read in total (3496ms).
[16:39:46.079] <TB2> INFO: Test took 4553ms.
[16:39:46.082] <TB2> INFO: scanning low vcal = 70
[16:39:46.423] <TB2> INFO: Expecting 41600 events.
[16:39:50.644] <TB2> INFO: 41600 events read in total (3505ms).
[16:39:50.645] <TB2> INFO: Test took 4563ms.
[16:39:50.648] <TB2> INFO: scanning low vcal = 80
[16:39:50.998] <TB2> INFO: Expecting 41600 events.
[16:39:55.198] <TB2> INFO: 41600 events read in total (3483ms).
[16:39:55.199] <TB2> INFO: Test took 4551ms.
[16:39:55.202] <TB2> INFO: scanning low vcal = 90
[16:39:55.543] <TB2> INFO: Expecting 41600 events.
[16:39:59.888] <TB2> INFO: 41600 events read in total (3629ms).
[16:39:59.889] <TB2> INFO: Test took 4687ms.
[16:39:59.892] <TB2> INFO: scanning low vcal = 100
[16:40:00.248] <TB2> INFO: Expecting 41600 events.
[16:40:04.472] <TB2> INFO: 41600 events read in total (3507ms).
[16:40:04.473] <TB2> INFO: Test took 4581ms.
[16:40:04.475] <TB2> INFO: scanning low vcal = 110
[16:40:04.817] <TB2> INFO: Expecting 41600 events.
[16:40:09.021] <TB2> INFO: 41600 events read in total (3488ms).
[16:40:09.021] <TB2> INFO: Test took 4546ms.
[16:40:09.024] <TB2> INFO: scanning low vcal = 120
[16:40:09.375] <TB2> INFO: Expecting 41600 events.
[16:40:13.566] <TB2> INFO: 41600 events read in total (3474ms).
[16:40:13.566] <TB2> INFO: Test took 4542ms.
[16:40:13.569] <TB2> INFO: scanning low vcal = 130
[16:40:13.919] <TB2> INFO: Expecting 41600 events.
[16:40:18.115] <TB2> INFO: 41600 events read in total (3480ms).
[16:40:18.116] <TB2> INFO: Test took 4547ms.
[16:40:18.119] <TB2> INFO: scanning low vcal = 140
[16:40:18.465] <TB2> INFO: Expecting 41600 events.
[16:40:22.649] <TB2> INFO: 41600 events read in total (3468ms).
[16:40:22.650] <TB2> INFO: Test took 4531ms.
[16:40:22.652] <TB2> INFO: scanning low vcal = 150
[16:40:23.001] <TB2> INFO: Expecting 41600 events.
[16:40:27.186] <TB2> INFO: 41600 events read in total (3469ms).
[16:40:27.187] <TB2> INFO: Test took 4535ms.
[16:40:27.189] <TB2> INFO: scanning low vcal = 160
[16:40:27.543] <TB2> INFO: Expecting 41600 events.
[16:40:31.769] <TB2> INFO: 41600 events read in total (3510ms).
[16:40:31.769] <TB2> INFO: Test took 4580ms.
[16:40:31.772] <TB2> INFO: scanning low vcal = 170
[16:40:32.130] <TB2> INFO: Expecting 41600 events.
[16:40:36.327] <TB2> INFO: 41600 events read in total (3481ms).
[16:40:36.328] <TB2> INFO: Test took 4555ms.
[16:40:36.332] <TB2> INFO: scanning low vcal = 180
[16:40:36.671] <TB2> INFO: Expecting 41600 events.
[16:40:40.696] <TB2> INFO: 41600 events read in total (3309ms).
[16:40:40.696] <TB2> INFO: Test took 4364ms.
[16:40:40.699] <TB2> INFO: scanning low vcal = 190
[16:40:41.056] <TB2> INFO: Expecting 41600 events.
[16:40:45.114] <TB2> INFO: 41600 events read in total (3341ms).
[16:40:45.114] <TB2> INFO: Test took 4415ms.
[16:40:45.117] <TB2> INFO: scanning low vcal = 200
[16:40:45.471] <TB2> INFO: Expecting 41600 events.
[16:40:49.509] <TB2> INFO: 41600 events read in total (3322ms).
[16:40:49.509] <TB2> INFO: Test took 4392ms.
[16:40:49.512] <TB2> INFO: scanning low vcal = 210
[16:40:49.867] <TB2> INFO: Expecting 41600 events.
[16:40:53.896] <TB2> INFO: 41600 events read in total (3313ms).
[16:40:53.896] <TB2> INFO: Test took 4384ms.
[16:40:53.899] <TB2> INFO: scanning low vcal = 220
[16:40:54.251] <TB2> INFO: Expecting 41600 events.
[16:40:58.294] <TB2> INFO: 41600 events read in total (3327ms).
[16:40:58.295] <TB2> INFO: Test took 4396ms.
[16:40:58.298] <TB2> INFO: scanning low vcal = 230
[16:40:58.638] <TB2> INFO: Expecting 41600 events.
[16:41:02.838] <TB2> INFO: 41600 events read in total (3483ms).
[16:41:02.838] <TB2> INFO: Test took 4540ms.
[16:41:02.841] <TB2> INFO: scanning low vcal = 240
[16:41:03.193] <TB2> INFO: Expecting 41600 events.
[16:41:07.382] <TB2> INFO: 41600 events read in total (3473ms).
[16:41:07.383] <TB2> INFO: Test took 4542ms.
[16:41:07.385] <TB2> INFO: scanning low vcal = 250
[16:41:07.721] <TB2> INFO: Expecting 41600 events.
[16:41:11.925] <TB2> INFO: 41600 events read in total (3488ms).
[16:41:11.925] <TB2> INFO: Test took 4540ms.
[16:41:11.930] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[16:41:12.275] <TB2> INFO: Expecting 41600 events.
[16:41:16.427] <TB2> INFO: 41600 events read in total (3436ms).
[16:41:16.428] <TB2> INFO: Test took 4498ms.
[16:41:16.430] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[16:41:16.784] <TB2> INFO: Expecting 41600 events.
[16:41:21.031] <TB2> INFO: 41600 events read in total (3530ms).
[16:41:21.031] <TB2> INFO: Test took 4601ms.
[16:41:21.034] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[16:41:21.379] <TB2> INFO: Expecting 41600 events.
[16:41:25.566] <TB2> INFO: 41600 events read in total (3470ms).
[16:41:25.567] <TB2> INFO: Test took 4532ms.
[16:41:25.569] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[16:41:25.922] <TB2> INFO: Expecting 41600 events.
[16:41:30.221] <TB2> INFO: 41600 events read in total (3583ms).
[16:41:30.221] <TB2> INFO: Test took 4652ms.
[16:41:30.225] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:41:30.570] <TB2> INFO: Expecting 41600 events.
[16:41:34.817] <TB2> INFO: 41600 events read in total (3531ms).
[16:41:34.818] <TB2> INFO: Test took 4593ms.
[16:41:35.463] <TB2> INFO: PixTestGainPedestal::measure() done
[16:42:10.945] <TB2> INFO: PixTestGainPedestal::fit() done
[16:42:10.945] <TB2> INFO: non-linearity mean: 0.960 0.964 0.962 0.952 0.958 0.957 0.957 0.963 0.958 0.959 0.956 0.958 0.955 0.956 0.957 0.956
[16:42:10.945] <TB2> INFO: non-linearity RMS: 0.007 0.006 0.006 0.006 0.007 0.007 0.006 0.006 0.007 0.007 0.006 0.006 0.007 0.007 0.008 0.006
[16:42:10.945] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:42:10.965] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:42:10.985] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:42:11.004] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:42:11.023] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:42:11.048] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:42:11.068] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:42:11.088] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:42:11.107] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:42:11.127] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:42:11.146] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:42:11.166] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:42:11.186] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:42:11.205] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:42:11.224] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:42:11.242] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:42:11.260] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 170 seconds
[16:42:11.266] <TB2> INFO: readReadbackCal: /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:42:11.267] <TB2> INFO: PixTestReadback::doTest() start.
[16:42:11.268] <TB2> INFO: PixTestReadback::RES sent once
[16:42:22.567] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[16:42:22.568] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[16:42:22.568] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[16:42:22.568] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[16:42:22.569] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[16:42:22.570] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:42:22.602] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[16:42:22.603] <TB2> INFO: PixTestReadback::RES sent once
[16:42:33.828] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[16:42:33.828] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[16:42:33.828] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[16:42:33.829] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[16:42:33.830] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:42:33.859] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[16:42:33.860] <TB2> INFO: PixTestReadback::RES sent once
[16:42:42.492] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[16:42:42.492] <TB2> INFO: Vbg will be calibrated using Vd calibration
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 162calibrated Vbg = 1.20419 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 157.1calibrated Vbg = 1.20143 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.3calibrated Vbg = 1.21054 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 153.8calibrated Vbg = 1.21255 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.2calibrated Vbg = 1.22102 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.1calibrated Vbg = 1.22224 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.1calibrated Vbg = 1.22394 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 164.1calibrated Vbg = 1.22309 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155calibrated Vbg = 1.22234 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.6calibrated Vbg = 1.22262 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 148calibrated Vbg = 1.21141 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 152.6calibrated Vbg = 1.21512 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 157.2calibrated Vbg = 1.20886 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.6calibrated Vbg = 1.20356 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.3calibrated Vbg = 1.20627 :::*/*/*/*/
[16:42:42.492] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 149calibrated Vbg = 1.20565 :::*/*/*/*/
[16:42:42.496] <TB2> INFO: PixTestReadback::RES sent once
[16:45:37.247] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[16:45:37.247] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[16:45:37.247] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[16:45:37.247] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[16:45:37.247] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[16:45:37.248] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2094_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:45:37.271] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[16:45:37.272] <TB2> INFO: PixTestReadback::doTest() done
[16:45:37.286] <TB2> INFO: enter test to run
[16:45:37.286] <TB2> INFO: test: exit no parameter change
[16:45:37.913] <TB2> QUIET: Connection to board 156 closed.
[16:45:37.993] <TB2> INFO: pXar: this is the end, my friend