Test Date: 2015-08-31 11:07
Analysis date: 2016-05-26 03:43
Logfile
LogfileView
[15:09:26.603] <TB1> INFO: *** Welcome to pxar ***
[15:09:26.603] <TB1> INFO: *** Today: 2015/08/31
[15:09:26.603] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C15.dat
[15:09:26.604] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:09:26.604] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//defaultMaskFile.dat
[15:09:26.604] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters_C15.dat
[15:09:26.668] <TB1> INFO: clk: 4
[15:09:26.668] <TB1> INFO: ctr: 4
[15:09:26.668] <TB1> INFO: sda: 19
[15:09:26.668] <TB1> INFO: tin: 9
[15:09:26.668] <TB1> INFO: level: 15
[15:09:26.668] <TB1> INFO: triggerdelay: 0
[15:09:26.668] <TB1> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[15:09:26.668] <TB1> INFO: Log level: INFO
[15:09:26.674] <TB1> INFO: Found DTB DTB_WXBYFL
[15:09:26.686] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[15:09:26.690] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[15:09:26.692] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[15:09:28.210] <TB1> INFO: DUT info:
[15:09:28.210] <TB1> INFO: The DUT currently contains the following objects:
[15:09:28.210] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:28.210] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:09:28.210] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:09:28.210] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:09:28.210] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.210] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:09:28.611] <TB1> INFO: enter 'restricted' command line mode
[15:09:28.611] <TB1> INFO: enter test to run
[15:09:28.611] <TB1> INFO: test: pretest no parameter change
[15:09:28.611] <TB1> INFO: running: pretest
[15:09:28.615] <TB1> INFO: ######################################################################
[15:09:28.615] <TB1> INFO: PixTestPretest::doTest()
[15:09:28.615] <TB1> INFO: ######################################################################
[15:09:28.617] <TB1> INFO: ----------------------------------------------------------------------
[15:09:28.617] <TB1> INFO: PixTestPretest::programROC()
[15:09:28.617] <TB1> INFO: ----------------------------------------------------------------------
[15:09:46.638] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:09:46.638] <TB1> INFO: IA differences per ROC: 19.3 18.5 18.5 17.7 19.3 20.1 19.3 19.3 19.3 19.3 18.5 20.9 21.7 18.5 19.3 18.5
[15:09:46.734] <TB1> INFO: ----------------------------------------------------------------------
[15:09:46.734] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:09:46.734] <TB1> INFO: ----------------------------------------------------------------------
[15:09:51.228] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[15:09:51.231] <TB1> INFO: ----------------------------------------------------------------------
[15:09:51.231] <TB1> INFO: PixTestPretest::findTiming()
[15:09:51.232] <TB1> INFO: ----------------------------------------------------------------------
[15:09:51.232] <TB1> INFO: PixTestCmd::init()
[15:09:51.951] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!

[15:11:39.992] <TB1> INFO: TBM phases: 160MHz: 1, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[15:11:39.992] <TB1> INFO: (success/tries = 100/100), width = 4
[15:11:39.995] <TB1> INFO: ----------------------------------------------------------------------
[15:11:39.995] <TB1> INFO: PixTestPretest::findWorkingPixel()
[15:11:39.995] <TB1> INFO: ----------------------------------------------------------------------
[15:11:40.135] <TB1> INFO: Expecting 231680 events.
[15:11:48.974] <TB1> INFO: 231680 events read in total (8121ms).
[15:11:48.979] <TB1> INFO: Test took 8979ms.
[15:11:49.303] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:11:49.354] <TB1> INFO: ----------------------------------------------------------------------
[15:11:49.354] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[15:11:49.354] <TB1> INFO: ----------------------------------------------------------------------
[15:11:49.495] <TB1> INFO: Expecting 231680 events.
[15:11:58.916] <TB1> INFO: 231680 events read in total (8704ms).
[15:11:58.921] <TB1> INFO: Test took 9559ms.
[15:11:59.267] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[15:11:59.268] <TB1> INFO: CalDel: 145 128 133 133 119 124 144 126 124 131 160 175 157 120 146 143
[15:11:59.268] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:11:59.272] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C0.dat
[15:11:59.272] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C1.dat
[15:11:59.273] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C2.dat
[15:11:59.273] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C3.dat
[15:11:59.273] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C4.dat
[15:11:59.274] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C5.dat
[15:11:59.274] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C6.dat
[15:11:59.274] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C7.dat
[15:11:59.274] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C8.dat
[15:11:59.275] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C9.dat
[15:11:59.275] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C10.dat
[15:11:59.275] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C11.dat
[15:11:59.276] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C12.dat
[15:11:59.276] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C13.dat
[15:11:59.276] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C14.dat
[15:11:59.276] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters_C15.dat
[15:11:59.277] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0a.dat
[15:11:59.277] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:11:59.277] <TB1> INFO: PixTestPretest::doTest() done, duration: 150 seconds
[15:11:59.344] <TB1> INFO: enter test to run
[15:11:59.344] <TB1> INFO: test: fulltest no parameter change
[15:11:59.344] <TB1> INFO: running: fulltest
[15:11:59.344] <TB1> INFO: ######################################################################
[15:11:59.344] <TB1> INFO: PixTestFullTest::doTest()
[15:11:59.344] <TB1> INFO: ######################################################################
[15:11:59.346] <TB1> INFO: ######################################################################
[15:11:59.346] <TB1> INFO: PixTestAlive::doTest()
[15:11:59.346] <TB1> INFO: ######################################################################
[15:11:59.347] <TB1> INFO: ----------------------------------------------------------------------
[15:11:59.347] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:11:59.347] <TB1> INFO: ----------------------------------------------------------------------
[15:11:59.673] <TB1> INFO: Expecting 41600 events.
[15:12:04.076] <TB1> INFO: 41600 events read in total (3685ms).
[15:12:04.077] <TB1> INFO: Test took 4727ms.
[15:12:04.083] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:04.388] <TB1> INFO: PixTestAlive::aliveTest() done
[15:12:04.388] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:04.390] <TB1> INFO: ----------------------------------------------------------------------
[15:12:04.390] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:04.390] <TB1> INFO: ----------------------------------------------------------------------
[15:12:04.710] <TB1> INFO: Expecting 41600 events.
[15:12:07.858] <TB1> INFO: 41600 events read in total (2431ms).
[15:12:07.859] <TB1> INFO: Test took 3467ms.
[15:12:07.859] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:07.859] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:12:08.187] <TB1> INFO: PixTestAlive::maskTest() done
[15:12:08.187] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:08.191] <TB1> INFO: ----------------------------------------------------------------------
[15:12:08.191] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:12:08.191] <TB1> INFO: ----------------------------------------------------------------------
[15:12:08.506] <TB1> INFO: Expecting 41600 events.
[15:12:12.982] <TB1> INFO: 41600 events read in total (3759ms).
[15:12:12.983] <TB1> INFO: Test took 4789ms.
[15:12:12.990] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:13.287] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[15:12:13.287] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12:13.287] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[15:12:13.300] <TB1> INFO: ######################################################################
[15:12:13.300] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:12:13.300] <TB1> INFO: ######################################################################
[15:12:13.304] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[15:12:13.318] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[15:12:13.318] <TB1> INFO: run 1 of 1
[15:12:13.628] <TB1> INFO: Expecting 3120000 events.
[15:12:49.282] <TB1> INFO: 847910 events read in total (34937ms).
[15:13:24.134] <TB1> INFO: 1681545 events read in total (69789ms).
[15:13:58.835] <TB1> INFO: 2524280 events read in total (104490ms).
[15:14:23.456] <TB1> INFO: 3120000 events read in total (129111ms).
[15:14:23.508] <TB1> INFO: Test took 130190ms.
[15:14:23.616] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:46.499] <TB1> INFO: PixTestBBMap::doTest() done, duration: 153 seconds
[15:14:46.499] <TB1> INFO: number of dead bumps (per ROC): 4 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1
[15:14:46.499] <TB1> INFO: separation cut (per ROC): 78 90 83 87 92 77 74 96 88 68 94 67 76 73 71 73
[15:14:46.581] <TB1> INFO: ######################################################################
[15:14:46.581] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:46.581] <TB1> INFO: ######################################################################
[15:14:46.581] <TB1> INFO: ----------------------------------------------------------------------
[15:14:46.581] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:46.581] <TB1> INFO: ----------------------------------------------------------------------
[15:14:46.582] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[15:14:46.592] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[15:14:46.592] <TB1> INFO: run 1 of 1
[15:14:46.903] <TB1> INFO: Expecting 31200000 events.
[15:15:09.830] <TB1> INFO: 971700 events read in total (22210ms).
[15:15:33.108] <TB1> INFO: 1925650 events read in total (45488ms).
[15:15:57.444] <TB1> INFO: 2875300 events read in total (69824ms).
[15:16:21.738] <TB1> INFO: 3829650 events read in total (94118ms).
[15:16:45.824] <TB1> INFO: 4778350 events read in total (118204ms).
[15:17:10.059] <TB1> INFO: 5727400 events read in total (142439ms).
[15:17:34.359] <TB1> INFO: 6674850 events read in total (166739ms).
[15:17:58.573] <TB1> INFO: 7623000 events read in total (190953ms).
[15:18:22.893] <TB1> INFO: 8569300 events read in total (215273ms).
[15:18:47.117] <TB1> INFO: 9514800 events read in total (239497ms).
[15:19:11.378] <TB1> INFO: 10461000 events read in total (263758ms).
[15:19:35.492] <TB1> INFO: 11407250 events read in total (287872ms).
[15:19:59.671] <TB1> INFO: 12349900 events read in total (312051ms).
[15:20:23.890] <TB1> INFO: 13295550 events read in total (336270ms).
[15:20:47.980] <TB1> INFO: 14236950 events read in total (360360ms).
[15:21:12.056] <TB1> INFO: 15179850 events read in total (384436ms).
[15:21:36.307] <TB1> INFO: 16115300 events read in total (408687ms).
[15:22:00.414] <TB1> INFO: 17047650 events read in total (432794ms).
[15:22:24.646] <TB1> INFO: 17979950 events read in total (457026ms).
[15:22:48.570] <TB1> INFO: 18910600 events read in total (480950ms).
[15:23:12.855] <TB1> INFO: 19839700 events read in total (505235ms).
[15:23:37.010] <TB1> INFO: 20766850 events read in total (529390ms).
[15:24:01.116] <TB1> INFO: 21696600 events read in total (553496ms).
[15:24:25.175] <TB1> INFO: 22622300 events read in total (577555ms).
[15:24:49.315] <TB1> INFO: 23549000 events read in total (601695ms).
[15:25:13.568] <TB1> INFO: 24476100 events read in total (625948ms).
[15:25:37.650] <TB1> INFO: 25401850 events read in total (650030ms).
[15:26:01.660] <TB1> INFO: 26325250 events read in total (674040ms).
[15:26:25.946] <TB1> INFO: 27252600 events read in total (698326ms).
[15:26:50.031] <TB1> INFO: 28181000 events read in total (722411ms).
[15:27:14.227] <TB1> INFO: 29109400 events read in total (746607ms).
[15:27:38.424] <TB1> INFO: 30040200 events read in total (770804ms).
[15:28:02.686] <TB1> INFO: 30979850 events read in total (795066ms).
[15:28:08.602] <TB1> INFO: 31200000 events read in total (800982ms).
[15:28:08.632] <TB1> INFO: Test took 802040ms.
[15:28:08.709] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:08.821] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:10.389] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:12.013] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:13.742] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:15.277] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:16.746] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:18.173] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:19.657] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:21.205] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:22.653] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:24.028] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:25.350] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:26.749] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:28.099] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:29.538] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:30.970] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:28:32.519] <TB1> INFO: PixTestScurves::scurves() done
[15:28:32.519] <TB1> INFO: Vcal mean: 95.59 102.72 91.83 94.77 98.46 92.24 89.90 103.96 92.42 87.39 106.66 85.49 91.02 89.70 82.38 87.30
[15:28:32.519] <TB1> INFO: Vcal RMS: 5.79 5.43 5.49 5.01 5.50 5.92 5.51 5.99 5.30 4.75 4.87 4.50 5.74 5.66 4.38 5.28
[15:28:32.520] <TB1> INFO: PixTestScurves::fullTest() done, duration: 825 seconds
[15:28:32.594] <TB1> INFO: ######################################################################
[15:28:32.594] <TB1> INFO: PixTestTrim::doTest()
[15:28:32.594] <TB1> INFO: ######################################################################
[15:28:32.596] <TB1> INFO: ----------------------------------------------------------------------
[15:28:32.596] <TB1> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[15:28:32.596] <TB1> INFO: ----------------------------------------------------------------------
[15:28:32.677] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:28:32.677] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:28:32.686] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:28:32.686] <TB1> INFO: run 1 of 1
[15:28:32.989] <TB1> INFO: Expecting 13312000 events.
[15:29:00.302] <TB1> INFO: 1104140 events read in total (26593ms).
[15:29:28.454] <TB1> INFO: 2204440 events read in total (54745ms).
[15:29:56.422] <TB1> INFO: 3301460 events read in total (82713ms).
[15:30:24.590] <TB1> INFO: 4394660 events read in total (110881ms).
[15:30:52.429] <TB1> INFO: 5484660 events read in total (138720ms).
[15:31:20.397] <TB1> INFO: 6572440 events read in total (166688ms).
[15:31:48.422] <TB1> INFO: 7667540 events read in total (194713ms).
[15:32:16.456] <TB1> INFO: 8762020 events read in total (222748ms).
[15:32:44.494] <TB1> INFO: 9859420 events read in total (250785ms).
[15:33:12.601] <TB1> INFO: 10958240 events read in total (278892ms).
[15:33:40.647] <TB1> INFO: 12054740 events read in total (306938ms).
[15:34:08.702] <TB1> INFO: 13156660 events read in total (334993ms).
[15:34:13.047] <TB1> INFO: 13312000 events read in total (339338ms).
[15:34:13.083] <TB1> INFO: Test took 340397ms.
[15:34:13.137] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:32.020] <TB1> INFO: ROC 0 VthrComp = 97
[15:34:32.020] <TB1> INFO: ROC 1 VthrComp = 102
[15:34:32.020] <TB1> INFO: ROC 2 VthrComp = 95
[15:34:32.020] <TB1> INFO: ROC 3 VthrComp = 98
[15:34:32.020] <TB1> INFO: ROC 4 VthrComp = 101
[15:34:32.021] <TB1> INFO: ROC 5 VthrComp = 94
[15:34:32.021] <TB1> INFO: ROC 6 VthrComp = 92
[15:34:32.021] <TB1> INFO: ROC 7 VthrComp = 104
[15:34:32.021] <TB1> INFO: ROC 8 VthrComp = 97
[15:34:32.021] <TB1> INFO: ROC 9 VthrComp = 90
[15:34:32.021] <TB1> INFO: ROC 10 VthrComp = 104
[15:34:32.022] <TB1> INFO: ROC 11 VthrComp = 85
[15:34:32.022] <TB1> INFO: ROC 12 VthrComp = 93
[15:34:32.022] <TB1> INFO: ROC 13 VthrComp = 92
[15:34:32.022] <TB1> INFO: ROC 14 VthrComp = 85
[15:34:32.023] <TB1> INFO: ROC 15 VthrComp = 88
[15:34:32.023] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:34:32.023] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:34:32.032] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:34:32.032] <TB1> INFO: run 1 of 1
[15:34:32.362] <TB1> INFO: Expecting 13312000 events.
[15:34:56.678] <TB1> INFO: 780360 events read in total (23599ms).
[15:35:19.533] <TB1> INFO: 1557900 events read in total (46454ms).
[15:35:42.311] <TB1> INFO: 2334960 events read in total (69232ms).
[15:36:05.293] <TB1> INFO: 3111920 events read in total (92214ms).
[15:36:28.037] <TB1> INFO: 3889120 events read in total (114958ms).
[15:36:52.603] <TB1> INFO: 4666840 events read in total (139524ms).
[15:37:17.562] <TB1> INFO: 5444280 events read in total (164483ms).
[15:37:42.396] <TB1> INFO: 6221960 events read in total (189317ms).
[15:38:07.504] <TB1> INFO: 6996260 events read in total (214425ms).
[15:38:32.475] <TB1> INFO: 7766480 events read in total (239396ms).
[15:38:57.369] <TB1> INFO: 8535660 events read in total (264290ms).
[15:39:22.234] <TB1> INFO: 9302900 events read in total (289155ms).
[15:39:47.191] <TB1> INFO: 10069780 events read in total (314112ms).
[15:40:12.056] <TB1> INFO: 10836320 events read in total (338977ms).
[15:40:36.855] <TB1> INFO: 11601140 events read in total (363777ms).
[15:41:01.707] <TB1> INFO: 12366920 events read in total (388628ms).
[15:41:26.502] <TB1> INFO: 13134040 events read in total (413423ms).
[15:41:32.259] <TB1> INFO: 13312000 events read in total (419180ms).
[15:41:32.314] <TB1> INFO: Test took 420281ms.
[15:41:32.477] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:56.936] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 59.003 for pixel 7/1 mean/min/max = 45.4313/31.5486/59.314
[15:41:56.936] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 57.6685 for pixel 12/76 mean/min/max = 45.2669/32.7778/57.756
[15:41:56.936] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.7126 for pixel 0/59 mean/min/max = 45.0384/32.1803/57.8964
[15:41:56.936] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 56.4781 for pixel 21/7 mean/min/max = 44.4064/32.1097/56.7032
[15:41:56.937] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.9938 for pixel 7/78 mean/min/max = 45.6296/32.1873/59.0719
[15:41:56.937] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 60.5359 for pixel 2/15 mean/min/max = 46.3984/32.2319/60.5649
[15:41:56.937] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.4224 for pixel 13/79 mean/min/max = 45.8091/33.0295/58.5888
[15:41:56.937] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 62.5819 for pixel 5/79 mean/min/max = 48.0522/33.4908/62.6137
[15:41:56.938] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 57.3048 for pixel 17/79 mean/min/max = 44.7953/32.1478/57.4428
[15:41:56.938] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 57.8309 for pixel 21/21 mean/min/max = 45.8797/33.9197/57.8396
[15:41:56.938] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.1427 for pixel 6/65 mean/min/max = 47.5811/34.7268/60.4354
[15:41:56.938] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 56.8585 for pixel 39/0 mean/min/max = 44.9451/32.7721/57.1181
[15:41:56.939] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 59.9452 for pixel 9/78 mean/min/max = 46.4118/32.8127/60.0109
[15:41:56.939] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 60.049 for pixel 15/75 mean/min/max = 46.6213/33.0913/60.1513
[15:41:56.939] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 56.4082 for pixel 4/2 mean/min/max = 44.5507/32.4225/56.6789
[15:41:56.939] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 60.6813 for pixel 4/76 mean/min/max = 47.0023/33.2928/60.7119
[15:41:56.939] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:57.072] <TB1> INFO: Expecting 1029120 events.
[15:42:20.527] <TB1> INFO: 1029120 events read in total (22738ms).
[15:42:20.533] <TB1> INFO: Expecting 1029120 events.
[15:42:44.226] <TB1> INFO: 1029120 events read in total (23158ms).
[15:42:44.233] <TB1> INFO: Expecting 1029120 events.
[15:43:08.018] <TB1> INFO: 1029120 events read in total (23237ms).
[15:43:08.028] <TB1> INFO: Expecting 1029120 events.
[15:43:31.860] <TB1> INFO: 1029120 events read in total (23290ms).
[15:43:31.872] <TB1> INFO: Expecting 1029120 events.
[15:43:55.988] <TB1> INFO: 1029120 events read in total (23578ms).
[15:43:56.001] <TB1> INFO: Expecting 1029120 events.
[15:44:19.863] <TB1> INFO: 1029120 events read in total (23332ms).
[15:44:19.879] <TB1> INFO: Expecting 1029120 events.
[15:44:43.613] <TB1> INFO: 1029120 events read in total (23206ms).
[15:44:43.630] <TB1> INFO: Expecting 1029120 events.
[15:45:07.552] <TB1> INFO: 1029120 events read in total (23380ms).
[15:45:07.573] <TB1> INFO: Expecting 1029120 events.
[15:45:31.223] <TB1> INFO: 1029120 events read in total (23122ms).
[15:45:31.245] <TB1> INFO: Expecting 1029120 events.
[15:45:54.815] <TB1> INFO: 1029120 events read in total (23042ms).
[15:45:54.837] <TB1> INFO: Expecting 1029120 events.
[15:46:18.648] <TB1> INFO: 1029120 events read in total (23279ms).
[15:46:18.672] <TB1> INFO: Expecting 1029120 events.
[15:46:42.163] <TB1> INFO: 1029120 events read in total (22961ms).
[15:46:42.195] <TB1> INFO: Expecting 1029120 events.
[15:47:05.900] <TB1> INFO: 1029120 events read in total (23176ms).
[15:47:05.928] <TB1> INFO: Expecting 1029120 events.
[15:47:29.576] <TB1> INFO: 1029120 events read in total (23120ms).
[15:47:29.606] <TB1> INFO: Expecting 1029120 events.
[15:47:53.263] <TB1> INFO: 1029120 events read in total (23129ms).
[15:47:53.300] <TB1> INFO: Expecting 1029120 events.
[15:48:16.938] <TB1> INFO: 1029120 events read in total (23110ms).
[15:48:16.979] <TB1> INFO: Test took 380040ms.
[15:48:18.058] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[15:48:18.066] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:48:18.067] <TB1> INFO: run 1 of 1
[15:48:18.374] <TB1> INFO: Expecting 16640000 events.
[15:48:43.325] <TB1> INFO: 725440 events read in total (24233ms).
[15:49:07.615] <TB1> INFO: 1447740 events read in total (48523ms).
[15:49:31.843] <TB1> INFO: 2170640 events read in total (72751ms).
[15:49:56.245] <TB1> INFO: 2893780 events read in total (97153ms).
[15:50:20.712] <TB1> INFO: 3615820 events read in total (121620ms).
[15:50:45.148] <TB1> INFO: 4338320 events read in total (146056ms).
[15:51:09.421] <TB1> INFO: 5061300 events read in total (170329ms).
[15:51:33.619] <TB1> INFO: 5785140 events read in total (194527ms).
[15:51:57.899] <TB1> INFO: 6507600 events read in total (218807ms).
[15:52:22.143] <TB1> INFO: 7230620 events read in total (243051ms).
[15:52:46.625] <TB1> INFO: 7953840 events read in total (267533ms).
[15:53:10.962] <TB1> INFO: 8674260 events read in total (291870ms).
[15:53:35.305] <TB1> INFO: 9391560 events read in total (316213ms).
[15:53:59.731] <TB1> INFO: 10108720 events read in total (340639ms).
[15:54:24.110] <TB1> INFO: 10824380 events read in total (365018ms).
[15:54:48.341] <TB1> INFO: 11539860 events read in total (389249ms).
[15:55:12.534] <TB1> INFO: 12255200 events read in total (413442ms).
[15:55:36.701] <TB1> INFO: 12969320 events read in total (437609ms).
[15:56:01.065] <TB1> INFO: 13683120 events read in total (461973ms).
[15:56:25.390] <TB1> INFO: 14396400 events read in total (486298ms).
[15:56:49.635] <TB1> INFO: 15110740 events read in total (510543ms).
[15:57:13.741] <TB1> INFO: 15824360 events read in total (534649ms).
[15:57:37.382] <TB1> INFO: 16539480 events read in total (558290ms).
[15:57:40.873] <TB1> INFO: 16640000 events read in total (561781ms).
[15:57:40.951] <TB1> INFO: Test took 562884ms.
[15:57:41.199] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:06.859] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.062122 .. 50.665631
[15:58:06.936] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 60 (-1/-1) hits flags = 16 (plus default)
[15:58:06.944] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:58:06.944] <TB1> INFO: run 1 of 1
[15:58:07.251] <TB1> INFO: Expecting 5075200 events.
[15:58:34.068] <TB1> INFO: 928440 events read in total (26096ms).
[15:59:00.516] <TB1> INFO: 1859220 events read in total (52544ms).
[15:59:27.009] <TB1> INFO: 2790360 events read in total (79037ms).
[15:59:53.643] <TB1> INFO: 3716460 events read in total (105671ms).
[16:00:20.033] <TB1> INFO: 4636580 events read in total (132061ms).
[16:00:32.832] <TB1> INFO: 5075200 events read in total (144860ms).
[16:00:32.851] <TB1> INFO: Test took 145907ms.
[16:00:32.890] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:47.014] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 15.820501 .. 45.731995
[16:00:47.108] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 5 .. 55 (-1/-1) hits flags = 16 (plus default)
[16:00:47.117] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[16:00:47.117] <TB1> INFO: run 1 of 1
[16:00:47.465] <TB1> INFO: Expecting 4243200 events.
[16:01:14.882] <TB1> INFO: 937380 events read in total (26698ms).
[16:01:41.439] <TB1> INFO: 1875640 events read in total (53255ms).
[16:02:08.126] <TB1> INFO: 2813040 events read in total (79943ms).
[16:02:34.698] <TB1> INFO: 3748880 events read in total (106514ms).
[16:02:48.960] <TB1> INFO: 4243200 events read in total (120777ms).
[16:02:48.978] <TB1> INFO: Test took 121861ms.
[16:02:49.016] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:03.095] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 20.930296 .. 42.644893
[16:03:03.170] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 10 .. 52 (-1/-1) hits flags = 16 (plus default)
[16:03:03.179] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[16:03:03.179] <TB1> INFO: run 1 of 1
[16:03:03.483] <TB1> INFO: Expecting 3577600 events.
[16:03:30.810] <TB1> INFO: 935140 events read in total (26610ms).
[16:03:57.385] <TB1> INFO: 1870580 events read in total (53185ms).
[16:04:24.053] <TB1> INFO: 2804960 events read in total (79854ms).
[16:04:46.261] <TB1> INFO: 3577600 events read in total (102061ms).
[16:04:46.282] <TB1> INFO: Test took 103103ms.
[16:04:46.316] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:04:58.532] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 22.617767 .. 42.644893
[16:04:58.609] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 12 .. 52 (-1/-1) hits flags = 16 (plus default)
[16:04:58.618] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[16:04:58.618] <TB1> INFO: run 1 of 1
[16:04:58.925] <TB1> INFO: Expecting 3411200 events.
[16:05:23.788] <TB1> INFO: 922380 events read in total (24146ms).
[16:05:48.329] <TB1> INFO: 1844760 events read in total (48687ms).
[16:06:12.975] <TB1> INFO: 2766940 events read in total (73334ms).
[16:06:30.374] <TB1> INFO: 3411200 events read in total (90732ms).
[16:06:30.393] <TB1> INFO: Test took 91775ms.
[16:06:30.426] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:43.686] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:06:43.686] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[16:06:43.694] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[16:06:43.694] <TB1> INFO: run 1 of 1
[16:06:44.004] <TB1> INFO: Expecting 3411200 events.
[16:07:10.857] <TB1> INFO: 877880 events read in total (26136ms).
[16:07:36.808] <TB1> INFO: 1755420 events read in total (52087ms).
[16:08:03.052] <TB1> INFO: 2633240 events read in total (78332ms).
[16:08:26.049] <TB1> INFO: 3411200 events read in total (101328ms).
[16:08:26.063] <TB1> INFO: Test took 102370ms.
[16:08:26.097] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:08:39.015] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:08:39.015] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:08:39.016] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:08:39.016] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:08:39.017] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:08:39.017] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:08:39.017] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:08:39.018] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:08:39.018] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:08:39.018] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:08:39.019] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:08:39.019] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:08:39.019] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:08:39.020] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:08:39.020] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:08:39.020] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:08:39.021] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C0.dat
[16:08:39.032] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C1.dat
[16:08:39.039] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C2.dat
[16:08:39.047] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C3.dat
[16:08:39.056] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C4.dat
[16:08:39.065] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C5.dat
[16:08:39.071] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C6.dat
[16:08:39.077] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C7.dat
[16:08:39.084] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C8.dat
[16:08:39.090] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C9.dat
[16:08:39.098] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C10.dat
[16:08:39.104] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C11.dat
[16:08:39.111] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C12.dat
[16:08:39.117] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C13.dat
[16:08:39.123] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C14.dat
[16:08:39.129] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//trimParameters35_C15.dat
[16:08:39.135] <TB1> INFO: PixTestTrim::trimTest() done
[16:08:39.135] <TB1> INFO: vtrim: 91 85 92 89 98 107 87 112 97 86 107 81 94 101 91 101
[16:08:39.135] <TB1> INFO: vthrcomp: 97 102 95 98 101 94 92 104 97 90 104 85 93 92 85 88
[16:08:39.135] <TB1> INFO: vcal mean: 34.96 34.98 35.00 34.97 34.99 35.01 35.00 35.00 35.00 34.97 34.99 34.98 34.99 34.97 34.91 34.94
[16:08:39.135] <TB1> INFO: vcal RMS: 0.78 0.72 0.73 0.68 0.73 0.72 0.71 0.75 0.68 0.70 0.72 0.70 0.77 0.73 0.69 0.69
[16:08:39.135] <TB1> INFO: bits mean: 9.63 9.07 9.12 9.69 9.38 8.99 8.97 8.15 9.35 8.99 8.49 9.17 8.48 8.89 9.50 8.70
[16:08:39.135] <TB1> INFO: bits RMS: 2.71 2.81 2.91 2.70 2.74 2.81 2.75 2.84 2.81 2.63 2.57 2.81 3.06 2.77 2.71 2.75
[16:08:39.144] <TB1> INFO: ----------------------------------------------------------------------
[16:08:39.144] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[16:08:39.144] <TB1> INFO: ----------------------------------------------------------------------
[16:08:39.149] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[16:08:39.166] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[16:08:39.166] <TB1> INFO: run 1 of 1
[16:08:39.506] <TB1> INFO: Expecting 8320000 events.
[16:09:09.964] <TB1> INFO: 945140 events read in total (29741ms).
[16:09:39.550] <TB1> INFO: 1881750 events read in total (59327ms).
[16:10:09.061] <TB1> INFO: 2816210 events read in total (88838ms).
[16:10:35.799] <TB1> INFO: 3748200 events read in total (115576ms).
[16:11:05.229] <TB1> INFO: 4674760 events read in total (145006ms).
[16:11:34.776] <TB1> INFO: 5596450 events read in total (174553ms).
[16:12:04.208] <TB1> INFO: 6516950 events read in total (203985ms).
[16:12:33.548] <TB1> INFO: 7437130 events read in total (233325ms).
[16:13:01.446] <TB1> INFO: 8320000 events read in total (261223ms).
[16:13:01.482] <TB1> INFO: Test took 262316ms.
[16:13:01.582] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:13:27.749] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 174 (-1/-1) hits flags = 16 (plus default)
[16:13:27.758] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[16:13:27.758] <TB1> INFO: run 1 of 1
[16:13:28.069] <TB1> INFO: Expecting 7280000 events.
[16:13:58.683] <TB1> INFO: 965000 events read in total (29897ms).
[16:14:28.396] <TB1> INFO: 1921020 events read in total (59610ms).
[16:14:58.197] <TB1> INFO: 2874660 events read in total (89411ms).
[16:15:25.707] <TB1> INFO: 3823500 events read in total (116921ms).
[16:15:55.244] <TB1> INFO: 4764270 events read in total (146458ms).
[16:16:24.707] <TB1> INFO: 5702510 events read in total (175921ms).
[16:16:54.181] <TB1> INFO: 6640660 events read in total (205395ms).
[16:17:14.102] <TB1> INFO: 7280000 events read in total (225316ms).
[16:17:14.134] <TB1> INFO: Test took 226376ms.
[16:17:14.219] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:17:38.174] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 160 (-1/-1) hits flags = 16 (plus default)
[16:17:38.183] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[16:17:38.183] <TB1> INFO: run 1 of 1
[16:17:38.487] <TB1> INFO: Expecting 6697600 events.
[16:18:09.595] <TB1> INFO: 1003280 events read in total (30390ms).
[16:18:39.945] <TB1> INFO: 1997210 events read in total (60740ms).
[16:19:10.123] <TB1> INFO: 2987660 events read in total (90919ms).
[16:19:38.785] <TB1> INFO: 3967840 events read in total (119580ms).
[16:20:08.913] <TB1> INFO: 4941880 events read in total (149708ms).
[16:20:38.959] <TB1> INFO: 5914750 events read in total (179754ms).
[16:21:03.134] <TB1> INFO: 6697600 events read in total (203929ms).
[16:21:03.169] <TB1> INFO: Test took 204986ms.
[16:21:03.244] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:21:27.781] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 160 (-1/-1) hits flags = 16 (plus default)
[16:21:27.790] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[16:21:27.790] <TB1> INFO: run 1 of 1
[16:21:28.096] <TB1> INFO: Expecting 6697600 events.
[16:21:59.304] <TB1> INFO: 1002830 events read in total (30491ms).
[16:22:29.787] <TB1> INFO: 1996360 events read in total (60974ms).
[16:22:58.769] <TB1> INFO: 2986420 events read in total (89957ms).
[16:23:28.903] <TB1> INFO: 3966330 events read in total (120090ms).
[16:23:59.068] <TB1> INFO: 4939720 events read in total (150255ms).
[16:24:29.211] <TB1> INFO: 5911920 events read in total (180398ms).
[16:24:52.233] <TB1> INFO: 6697600 events read in total (203420ms).
[16:24:52.260] <TB1> INFO: Test took 204470ms.
[16:24:52.330] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:14.694] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 161 (-1/-1) hits flags = 16 (plus default)
[16:25:14.703] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[16:25:14.703] <TB1> INFO: run 1 of 1
[16:25:15.007] <TB1> INFO: Expecting 6739200 events.
[16:25:46.066] <TB1> INFO: 999150 events read in total (30341ms).
[16:26:16.424] <TB1> INFO: 1989130 events read in total (60699ms).
[16:26:46.696] <TB1> INFO: 2975590 events read in total (90972ms).
[16:27:16.789] <TB1> INFO: 3952410 events read in total (121064ms).
[16:27:46.806] <TB1> INFO: 4922980 events read in total (151081ms).
[16:28:16.819] <TB1> INFO: 5891320 events read in total (181094ms).
[16:28:42.219] <TB1> INFO: 6739200 events read in total (206494ms).
[16:28:42.252] <TB1> INFO: Test took 207549ms.
[16:28:42.333] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:06.742] <TB1> INFO: PixTestTrim::trimBitTest() done
[16:29:06.743] <TB1> INFO: PixTestTrim::doTest() done, duration: 3634 seconds
[16:29:07.422] <TB1> INFO: ######################################################################
[16:29:07.422] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:29:07.422] <TB1> INFO: ######################################################################
[16:29:07.748] <TB1> INFO: Expecting 41600 events.
[16:29:12.071] <TB1> INFO: 41600 events read in total (3605ms).
[16:29:12.072] <TB1> INFO: Test took 4648ms.
[16:29:12.080] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:12.671] <TB1> INFO: Expecting 41600 events.
[16:29:17.030] <TB1> INFO: 41600 events read in total (3642ms).
[16:29:17.030] <TB1> INFO: Test took 4696ms.
[16:29:17.036] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:17.389] <TB1> INFO: Expecting 41600 events.
[16:29:21.717] <TB1> INFO: 41600 events read in total (3611ms).
[16:29:21.718] <TB1> INFO: Test took 4654ms.
[16:29:21.725] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:21.734] <TB1> INFO: The DUT currently contains the following objects:
[16:29:21.734] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:21.734] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:21.734] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:21.734] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:21.734] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:21.734] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.068] <TB1> INFO: Expecting 2560 events.
[16:29:23.133] <TB1> INFO: 2560 events read in total (348ms).
[16:29:23.133] <TB1> INFO: Test took 1399ms.
[16:29:23.133] <TB1> INFO: The DUT currently contains the following objects:
[16:29:23.133] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:23.133] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:23.133] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:23.133] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:23.133] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.133] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.134] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.134] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.134] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.549] <TB1> INFO: Expecting 2560 events.
[16:29:24.612] <TB1> INFO: 2560 events read in total (346ms).
[16:29:24.612] <TB1> INFO: Test took 1478ms.
[16:29:24.612] <TB1> INFO: The DUT currently contains the following objects:
[16:29:24.612] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:24.612] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:24.612] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:24.612] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:24.612] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.612] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.612] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.613] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.028] <TB1> INFO: Expecting 2560 events.
[16:29:26.092] <TB1> INFO: 2560 events read in total (347ms).
[16:29:26.094] <TB1> INFO: Test took 1481ms.
[16:29:26.094] <TB1> INFO: The DUT currently contains the following objects:
[16:29:26.094] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:26.094] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:26.094] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:26.094] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:26.094] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.094] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:26.508] <TB1> INFO: Expecting 2560 events.
[16:29:27.571] <TB1> INFO: 2560 events read in total (346ms).
[16:29:27.571] <TB1> INFO: Test took 1477ms.
[16:29:27.572] <TB1> INFO: The DUT currently contains the following objects:
[16:29:27.572] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:27.572] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:27.572] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:27.572] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:27.572] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.572] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:27.987] <TB1> INFO: Expecting 2560 events.
[16:29:29.050] <TB1> INFO: 2560 events read in total (346ms).
[16:29:29.050] <TB1> INFO: Test took 1478ms.
[16:29:29.050] <TB1> INFO: The DUT currently contains the following objects:
[16:29:29.050] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:29.050] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:29.050] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:29.050] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:29.051] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.051] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:29.466] <TB1> INFO: Expecting 2560 events.
[16:29:30.535] <TB1> INFO: 2560 events read in total (352ms).
[16:29:30.538] <TB1> INFO: Test took 1487ms.
[16:29:30.538] <TB1> INFO: The DUT currently contains the following objects:
[16:29:30.538] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:30.538] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:30.539] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:30.539] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:30.539] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.539] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.539] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.539] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.539] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.539] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.539] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.539] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.539] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.540] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.540] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.540] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.540] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.540] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.540] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.540] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:30.953] <TB1> INFO: Expecting 2560 events.
[16:29:32.026] <TB1> INFO: 2560 events read in total (356ms).
[16:29:32.026] <TB1> INFO: Test took 1486ms.
[16:29:32.027] <TB1> INFO: The DUT currently contains the following objects:
[16:29:32.027] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:32.027] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:32.027] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:32.027] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:32.027] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.027] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:32.442] <TB1> INFO: Expecting 2560 events.
[16:29:33.513] <TB1> INFO: 2560 events read in total (355ms).
[16:29:33.515] <TB1> INFO: Test took 1488ms.
[16:29:33.516] <TB1> INFO: The DUT currently contains the following objects:
[16:29:33.516] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:33.516] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:33.516] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:33.516] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:33.516] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.516] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:33.930] <TB1> INFO: Expecting 2560 events.
[16:29:35.000] <TB1> INFO: 2560 events read in total (353ms).
[16:29:35.001] <TB1> INFO: Test took 1485ms.
[16:29:35.001] <TB1> INFO: The DUT currently contains the following objects:
[16:29:35.001] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:35.001] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:35.002] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:35.002] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:35.002] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.002] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.003] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.003] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:35.417] <TB1> INFO: Expecting 2560 events.
[16:29:36.487] <TB1> INFO: 2560 events read in total (353ms).
[16:29:36.487] <TB1> INFO: Test took 1484ms.
[16:29:36.488] <TB1> INFO: The DUT currently contains the following objects:
[16:29:36.488] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:36.488] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:36.488] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:36.488] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:36.488] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.488] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.489] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.489] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.489] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.489] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.489] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:36.903] <TB1> INFO: Expecting 2560 events.
[16:29:37.973] <TB1> INFO: 2560 events read in total (353ms).
[16:29:37.974] <TB1> INFO: Test took 1485ms.
[16:29:37.976] <TB1> INFO: The DUT currently contains the following objects:
[16:29:37.976] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:37.976] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:37.976] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:37.976] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:37.976] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.976] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.977] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.977] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.977] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:37.977] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:38.389] <TB1> INFO: Expecting 2560 events.
[16:29:39.460] <TB1> INFO: 2560 events read in total (353ms).
[16:29:39.460] <TB1> INFO: Test took 1483ms.
[16:29:39.461] <TB1> INFO: The DUT currently contains the following objects:
[16:29:39.461] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:39.461] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:39.461] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:39.461] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:39.461] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.461] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.462] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.462] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:39.876] <TB1> INFO: Expecting 2560 events.
[16:29:40.945] <TB1> INFO: 2560 events read in total (352ms).
[16:29:40.945] <TB1> INFO: Test took 1483ms.
[16:29:40.946] <TB1> INFO: The DUT currently contains the following objects:
[16:29:40.946] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:40.946] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:40.946] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:40.946] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:40.946] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.946] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.947] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.947] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.947] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.947] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.947] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:40.947] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:41.361] <TB1> INFO: Expecting 2560 events.
[16:29:42.431] <TB1> INFO: 2560 events read in total (353ms).
[16:29:42.431] <TB1> INFO: Test took 1484ms.
[16:29:42.432] <TB1> INFO: The DUT currently contains the following objects:
[16:29:42.432] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:42.432] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:42.432] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:42.432] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:42.432] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.432] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.433] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.433] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:42.847] <TB1> INFO: Expecting 2560 events.
[16:29:43.917] <TB1> INFO: 2560 events read in total (353ms).
[16:29:43.917] <TB1> INFO: Test took 1484ms.
[16:29:43.917] <TB1> INFO: The DUT currently contains the following objects:
[16:29:43.917] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:43.917] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:29:43.917] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:29:43.918] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:43.918] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:43.918] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:44.333] <TB1> INFO: Expecting 2560 events.
[16:29:45.405] <TB1> INFO: 2560 events read in total (355ms).
[16:29:45.405] <TB1> INFO: Test took 1487ms.
[16:29:45.411] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:29:45.823] <TB1> INFO: Expecting 655360 events.
[16:30:02.357] <TB1> INFO: 655360 events read in total (15817ms).
[16:30:02.367] <TB1> INFO: Expecting 655360 events.
[16:30:18.701] <TB1> INFO: 655360 events read in total (15806ms).
[16:30:18.713] <TB1> INFO: Expecting 655360 events.
[16:30:35.252] <TB1> INFO: 655360 events read in total (16011ms).
[16:30:35.272] <TB1> INFO: Expecting 655360 events.
[16:30:51.697] <TB1> INFO: 655360 events read in total (15897ms).
[16:30:51.716] <TB1> INFO: Expecting 655360 events.
[16:31:08.227] <TB1> INFO: 655360 events read in total (15982ms).
[16:31:08.255] <TB1> INFO: Expecting 655360 events.
[16:31:24.678] <TB1> INFO: 655360 events read in total (15895ms).
[16:31:24.706] <TB1> INFO: Expecting 655360 events.
[16:31:41.071] <TB1> INFO: 655360 events read in total (15837ms).
[16:31:41.108] <TB1> INFO: Expecting 655360 events.
[16:31:57.582] <TB1> INFO: 655360 events read in total (15946ms).
[16:31:57.615] <TB1> INFO: Expecting 655360 events.
[16:32:14.243] <TB1> INFO: 655360 events read in total (16099ms).
[16:32:14.291] <TB1> INFO: Expecting 655360 events.
[16:32:30.654] <TB1> INFO: 655360 events read in total (15835ms).
[16:32:30.695] <TB1> INFO: Expecting 655360 events.
[16:32:47.044] <TB1> INFO: 655360 events read in total (15821ms).
[16:32:47.094] <TB1> INFO: Expecting 655360 events.
[16:33:03.608] <TB1> INFO: 655360 events read in total (15986ms).
[16:33:03.671] <TB1> INFO: Expecting 655360 events.
[16:33:18.948] <TB1> INFO: 655360 events read in total (14748ms).
[16:33:18.999] <TB1> INFO: Expecting 655360 events.
[16:33:33.993] <TB1> INFO: 655360 events read in total (14465ms).
[16:33:34.048] <TB1> INFO: Expecting 655360 events.
[16:33:50.565] <TB1> INFO: 655360 events read in total (15989ms).
[16:33:50.647] <TB1> INFO: Expecting 655360 events.
[16:34:07.121] <TB1> INFO: 655360 events read in total (15945ms).
[16:34:07.188] <TB1> INFO: Test took 261777ms.
[16:34:07.286] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:34:07.589] <TB1> INFO: Expecting 655360 events.
[16:34:24.247] <TB1> INFO: 655360 events read in total (15941ms).
[16:34:24.256] <TB1> INFO: Expecting 655360 events.
[16:34:40.535] <TB1> INFO: 655360 events read in total (15751ms).
[16:34:40.547] <TB1> INFO: Expecting 655360 events.
[16:34:56.986] <TB1> INFO: 655360 events read in total (15911ms).
[16:34:57.006] <TB1> INFO: Expecting 655360 events.
[16:35:12.410] <TB1> INFO: 655360 events read in total (14876ms).
[16:35:12.430] <TB1> INFO: Expecting 655360 events.
[16:35:27.522] <TB1> INFO: 655360 events read in total (14564ms).
[16:35:27.551] <TB1> INFO: Expecting 655360 events.
[16:35:42.842] <TB1> INFO: 655360 events read in total (14762ms).
[16:35:42.870] <TB1> INFO: Expecting 655360 events.
[16:35:58.313] <TB1> INFO: 655360 events read in total (14915ms).
[16:35:58.358] <TB1> INFO: Expecting 655360 events.
[16:36:13.615] <TB1> INFO: 655360 events read in total (14729ms).
[16:36:13.658] <TB1> INFO: Expecting 655360 events.
[16:36:28.918] <TB1> INFO: 655360 events read in total (14732ms).
[16:36:28.964] <TB1> INFO: Expecting 655360 events.
[16:36:44.880] <TB1> INFO: 655360 events read in total (15388ms).
[16:36:44.922] <TB1> INFO: Expecting 655360 events.
[16:37:00.132] <TB1> INFO: 655360 events read in total (14681ms).
[16:37:00.178] <TB1> INFO: Expecting 655360 events.
[16:37:15.139] <TB1> INFO: 655360 events read in total (14432ms).
[16:37:15.202] <TB1> INFO: Expecting 655360 events.
[16:37:31.929] <TB1> INFO: 655360 events read in total (16199ms).
[16:37:31.980] <TB1> INFO: Expecting 655360 events.
[16:37:48.474] <TB1> INFO: 655360 events read in total (15966ms).
[16:37:48.531] <TB1> INFO: Expecting 655360 events.
[16:38:04.933] <TB1> INFO: 655360 events read in total (15873ms).
[16:38:04.993] <TB1> INFO: Expecting 655360 events.
[16:38:21.353] <TB1> INFO: 655360 events read in total (15832ms).
[16:38:21.416] <TB1> INFO: Test took 254131ms.
[16:38:21.610] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.617] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.624] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:21.631] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.638] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.645] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.652] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:21.659] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.666] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.673] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:21.680] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[16:38:21.687] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[16:38:21.694] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.701] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.708] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.715] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.722] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.729] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.736] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.743] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.750] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:21.757] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:21.764] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[16:38:21.771] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[16:38:21.778] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[16:38:21.784] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[16:38:21.791] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[16:38:21.798] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[16:38:21.805] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[16:38:21.812] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[16:38:21.867] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:38:21.868] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:38:21.868] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:38:21.868] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:38:21.869] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:38:21.869] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:38:21.869] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:38:21.869] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:38:21.870] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:38:21.870] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:38:21.870] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:38:21.870] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:38:21.871] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:38:21.871] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:38:21.871] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:38:21.871] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:38:22.190] <TB1> INFO: Expecting 41600 events.
[16:38:26.649] <TB1> INFO: 41600 events read in total (3742ms).
[16:38:26.650] <TB1> INFO: Test took 4774ms.
[16:38:27.219] <TB1> INFO: Expecting 41600 events.
[16:38:31.697] <TB1> INFO: 41600 events read in total (3760ms).
[16:38:31.698] <TB1> INFO: Test took 4799ms.
[16:38:32.252] <TB1> INFO: Expecting 41600 events.
[16:38:36.693] <TB1> INFO: 41600 events read in total (3724ms).
[16:38:36.694] <TB1> INFO: Test took 4759ms.
[16:38:36.941] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:37.074] <TB1> INFO: Expecting 2560 events.
[16:38:38.143] <TB1> INFO: 2560 events read in total (352ms).
[16:38:38.144] <TB1> INFO: Test took 1203ms.
[16:38:38.149] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:38.560] <TB1> INFO: Expecting 2560 events.
[16:38:39.628] <TB1> INFO: 2560 events read in total (351ms).
[16:38:39.629] <TB1> INFO: Test took 1480ms.
[16:38:39.632] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:40.045] <TB1> INFO: Expecting 2560 events.
[16:38:41.116] <TB1> INFO: 2560 events read in total (354ms).
[16:38:41.117] <TB1> INFO: Test took 1485ms.
[16:38:41.120] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:41.533] <TB1> INFO: Expecting 2560 events.
[16:38:42.606] <TB1> INFO: 2560 events read in total (356ms).
[16:38:42.606] <TB1> INFO: Test took 1486ms.
[16:38:42.609] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:43.023] <TB1> INFO: Expecting 2560 events.
[16:38:44.093] <TB1> INFO: 2560 events read in total (354ms).
[16:38:44.094] <TB1> INFO: Test took 1485ms.
[16:38:44.097] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:44.510] <TB1> INFO: Expecting 2560 events.
[16:38:45.583] <TB1> INFO: 2560 events read in total (356ms).
[16:38:45.583] <TB1> INFO: Test took 1486ms.
[16:38:45.586] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:46.000] <TB1> INFO: Expecting 2560 events.
[16:38:47.070] <TB1> INFO: 2560 events read in total (353ms).
[16:38:47.070] <TB1> INFO: Test took 1484ms.
[16:38:47.074] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:47.488] <TB1> INFO: Expecting 2560 events.
[16:38:48.559] <TB1> INFO: 2560 events read in total (354ms).
[16:38:48.560] <TB1> INFO: Test took 1486ms.
[16:38:48.563] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:48.977] <TB1> INFO: Expecting 2560 events.
[16:38:50.049] <TB1> INFO: 2560 events read in total (355ms).
[16:38:50.049] <TB1> INFO: Test took 1486ms.
[16:38:50.053] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:50.466] <TB1> INFO: Expecting 2560 events.
[16:38:51.538] <TB1> INFO: 2560 events read in total (355ms).
[16:38:51.538] <TB1> INFO: Test took 1486ms.
[16:38:51.542] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:51.955] <TB1> INFO: Expecting 2560 events.
[16:38:53.027] <TB1> INFO: 2560 events read in total (355ms).
[16:38:53.027] <TB1> INFO: Test took 1485ms.
[16:38:53.031] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:53.444] <TB1> INFO: Expecting 2560 events.
[16:38:54.518] <TB1> INFO: 2560 events read in total (357ms).
[16:38:54.518] <TB1> INFO: Test took 1488ms.
[16:38:54.521] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:54.935] <TB1> INFO: Expecting 2560 events.
[16:38:56.005] <TB1> INFO: 2560 events read in total (353ms).
[16:38:56.006] <TB1> INFO: Test took 1485ms.
[16:38:56.009] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:56.422] <TB1> INFO: Expecting 2560 events.
[16:38:57.493] <TB1> INFO: 2560 events read in total (354ms).
[16:38:57.494] <TB1> INFO: Test took 1486ms.
[16:38:57.498] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:57.911] <TB1> INFO: Expecting 2560 events.
[16:38:58.981] <TB1> INFO: 2560 events read in total (353ms).
[16:38:58.981] <TB1> INFO: Test took 1483ms.
[16:38:58.984] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:59.398] <TB1> INFO: Expecting 2560 events.
[16:39:00.472] <TB1> INFO: 2560 events read in total (357ms).
[16:39:00.472] <TB1> INFO: Test took 1488ms.
[16:39:00.476] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:00.890] <TB1> INFO: Expecting 2560 events.
[16:39:01.964] <TB1> INFO: 2560 events read in total (357ms).
[16:39:01.964] <TB1> INFO: Test took 1488ms.
[16:39:01.967] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:02.381] <TB1> INFO: Expecting 2560 events.
[16:39:03.453] <TB1> INFO: 2560 events read in total (355ms).
[16:39:03.454] <TB1> INFO: Test took 1487ms.
[16:39:03.457] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:03.871] <TB1> INFO: Expecting 2560 events.
[16:39:04.942] <TB1> INFO: 2560 events read in total (354ms).
[16:39:04.943] <TB1> INFO: Test took 1486ms.
[16:39:04.946] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:05.359] <TB1> INFO: Expecting 2560 events.
[16:39:06.430] <TB1> INFO: 2560 events read in total (354ms).
[16:39:06.431] <TB1> INFO: Test took 1485ms.
[16:39:06.434] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:06.847] <TB1> INFO: Expecting 2560 events.
[16:39:07.920] <TB1> INFO: 2560 events read in total (355ms).
[16:39:07.920] <TB1> INFO: Test took 1486ms.
[16:39:07.924] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:08.337] <TB1> INFO: Expecting 2560 events.
[16:39:09.408] <TB1> INFO: 2560 events read in total (354ms).
[16:39:09.408] <TB1> INFO: Test took 1484ms.
[16:39:09.411] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:09.825] <TB1> INFO: Expecting 2560 events.
[16:39:10.897] <TB1> INFO: 2560 events read in total (355ms).
[16:39:10.897] <TB1> INFO: Test took 1486ms.
[16:39:10.901] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:11.314] <TB1> INFO: Expecting 2560 events.
[16:39:12.385] <TB1> INFO: 2560 events read in total (354ms).
[16:39:12.385] <TB1> INFO: Test took 1485ms.
[16:39:12.389] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:12.802] <TB1> INFO: Expecting 2560 events.
[16:39:13.874] <TB1> INFO: 2560 events read in total (355ms).
[16:39:13.874] <TB1> INFO: Test took 1486ms.
[16:39:13.878] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:14.291] <TB1> INFO: Expecting 2560 events.
[16:39:15.361] <TB1> INFO: 2560 events read in total (353ms).
[16:39:15.362] <TB1> INFO: Test took 1485ms.
[16:39:15.365] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:15.779] <TB1> INFO: Expecting 2560 events.
[16:39:16.849] <TB1> INFO: 2560 events read in total (354ms).
[16:39:16.850] <TB1> INFO: Test took 1485ms.
[16:39:16.853] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:17.267] <TB1> INFO: Expecting 2560 events.
[16:39:18.338] <TB1> INFO: 2560 events read in total (355ms).
[16:39:18.338] <TB1> INFO: Test took 1485ms.
[16:39:18.343] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:18.755] <TB1> INFO: Expecting 2560 events.
[16:39:19.826] <TB1> INFO: 2560 events read in total (354ms).
[16:39:19.826] <TB1> INFO: Test took 1484ms.
[16:39:19.829] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:20.242] <TB1> INFO: Expecting 2560 events.
[16:39:21.315] <TB1> INFO: 2560 events read in total (356ms).
[16:39:21.315] <TB1> INFO: Test took 1486ms.
[16:39:21.320] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:21.732] <TB1> INFO: Expecting 2560 events.
[16:39:22.803] <TB1> INFO: 2560 events read in total (354ms).
[16:39:22.803] <TB1> INFO: Test took 1483ms.
[16:39:22.807] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:39:23.220] <TB1> INFO: Expecting 2560 events.
[16:39:24.294] <TB1> INFO: 2560 events read in total (357ms).
[16:39:24.295] <TB1> INFO: Test took 1489ms.
[16:39:24.974] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 617 seconds
[16:39:24.974] <TB1> INFO: PH scale (per ROC): 77 70 75 80 80 74 80 75 80 79 67 74 73 79 76 75
[16:39:24.974] <TB1> INFO: PH offset (per ROC): 155 181 175 167 174 165 158 184 189 186 180 175 173 181 172 176
[16:39:25.180] <TB1> INFO: ######################################################################
[16:39:25.180] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:39:25.180] <TB1> INFO: ######################################################################
[16:39:25.191] <TB1> INFO: scanning low vcal = 10
[16:39:25.496] <TB1> INFO: Expecting 41600 events.
[16:39:29.072] <TB1> INFO: 41600 events read in total (2859ms).
[16:39:29.072] <TB1> INFO: Test took 3881ms.
[16:39:29.075] <TB1> INFO: scanning low vcal = 20
[16:39:29.488] <TB1> INFO: Expecting 41600 events.
[16:39:33.087] <TB1> INFO: 41600 events read in total (2882ms).
[16:39:33.088] <TB1> INFO: Test took 4013ms.
[16:39:33.091] <TB1> INFO: scanning low vcal = 30
[16:39:33.503] <TB1> INFO: Expecting 41600 events.
[16:39:37.125] <TB1> INFO: 41600 events read in total (2905ms).
[16:39:37.125] <TB1> INFO: Test took 4034ms.
[16:39:37.128] <TB1> INFO: scanning low vcal = 40
[16:39:37.536] <TB1> INFO: Expecting 41600 events.
[16:39:41.735] <TB1> INFO: 41600 events read in total (3482ms).
[16:39:41.736] <TB1> INFO: Test took 4608ms.
[16:39:41.739] <TB1> INFO: scanning low vcal = 50
[16:39:42.084] <TB1> INFO: Expecting 41600 events.
[16:39:46.300] <TB1> INFO: 41600 events read in total (3499ms).
[16:39:46.301] <TB1> INFO: Test took 4562ms.
[16:39:46.305] <TB1> INFO: scanning low vcal = 60
[16:39:46.654] <TB1> INFO: Expecting 41600 events.
[16:39:50.873] <TB1> INFO: 41600 events read in total (3502ms).
[16:39:50.874] <TB1> INFO: Test took 4569ms.
[16:39:50.877] <TB1> INFO: scanning low vcal = 70
[16:39:51.235] <TB1> INFO: Expecting 41600 events.
[16:39:55.480] <TB1> INFO: 41600 events read in total (3528ms).
[16:39:55.481] <TB1> INFO: Test took 4604ms.
[16:39:55.485] <TB1> INFO: scanning low vcal = 80
[16:39:55.828] <TB1> INFO: Expecting 41600 events.
[16:40:00.032] <TB1> INFO: 41600 events read in total (3487ms).
[16:40:00.032] <TB1> INFO: Test took 4547ms.
[16:40:00.036] <TB1> INFO: scanning low vcal = 90
[16:40:00.395] <TB1> INFO: Expecting 41600 events.
[16:40:04.734] <TB1> INFO: 41600 events read in total (3622ms).
[16:40:04.735] <TB1> INFO: Test took 4699ms.
[16:40:04.739] <TB1> INFO: scanning low vcal = 100
[16:40:05.083] <TB1> INFO: Expecting 41600 events.
[16:40:09.288] <TB1> INFO: 41600 events read in total (3488ms).
[16:40:09.288] <TB1> INFO: Test took 4549ms.
[16:40:09.292] <TB1> INFO: scanning low vcal = 110
[16:40:09.645] <TB1> INFO: Expecting 41600 events.
[16:40:13.860] <TB1> INFO: 41600 events read in total (3498ms).
[16:40:13.860] <TB1> INFO: Test took 4568ms.
[16:40:13.864] <TB1> INFO: scanning low vcal = 120
[16:40:14.215] <TB1> INFO: Expecting 41600 events.
[16:40:18.467] <TB1> INFO: 41600 events read in total (3535ms).
[16:40:18.467] <TB1> INFO: Test took 4603ms.
[16:40:18.470] <TB1> INFO: scanning low vcal = 130
[16:40:18.792] <TB1> INFO: Expecting 41600 events.
[16:40:22.989] <TB1> INFO: 41600 events read in total (3480ms).
[16:40:22.990] <TB1> INFO: Test took 4519ms.
[16:40:22.994] <TB1> INFO: scanning low vcal = 140
[16:40:23.344] <TB1> INFO: Expecting 41600 events.
[16:40:27.531] <TB1> INFO: 41600 events read in total (3469ms).
[16:40:27.532] <TB1> INFO: Test took 4538ms.
[16:40:27.536] <TB1> INFO: scanning low vcal = 150
[16:40:27.890] <TB1> INFO: Expecting 41600 events.
[16:40:32.078] <TB1> INFO: 41600 events read in total (3471ms).
[16:40:32.078] <TB1> INFO: Test took 4542ms.
[16:40:32.082] <TB1> INFO: scanning low vcal = 160
[16:40:32.433] <TB1> INFO: Expecting 41600 events.
[16:40:36.611] <TB1> INFO: 41600 events read in total (3461ms).
[16:40:36.612] <TB1> INFO: Test took 4530ms.
[16:40:36.615] <TB1> INFO: scanning low vcal = 170
[16:40:36.958] <TB1> INFO: Expecting 41600 events.
[16:40:40.996] <TB1> INFO: 41600 events read in total (3321ms).
[16:40:40.997] <TB1> INFO: Test took 4382ms.
[16:40:41.002] <TB1> INFO: scanning low vcal = 180
[16:40:41.351] <TB1> INFO: Expecting 41600 events.
[16:40:45.447] <TB1> INFO: 41600 events read in total (3380ms).
[16:40:45.448] <TB1> INFO: Test took 4446ms.
[16:40:45.451] <TB1> INFO: scanning low vcal = 190
[16:40:45.801] <TB1> INFO: Expecting 41600 events.
[16:40:49.894] <TB1> INFO: 41600 events read in total (3376ms).
[16:40:49.894] <TB1> INFO: Test took 4443ms.
[16:40:49.898] <TB1> INFO: scanning low vcal = 200
[16:40:50.253] <TB1> INFO: Expecting 41600 events.
[16:40:54.339] <TB1> INFO: 41600 events read in total (3369ms).
[16:40:54.339] <TB1> INFO: Test took 4441ms.
[16:40:54.343] <TB1> INFO: scanning low vcal = 210
[16:40:54.692] <TB1> INFO: Expecting 41600 events.
[16:40:58.786] <TB1> INFO: 41600 events read in total (3377ms).
[16:40:58.786] <TB1> INFO: Test took 4443ms.
[16:40:58.790] <TB1> INFO: scanning low vcal = 220
[16:40:59.142] <TB1> INFO: Expecting 41600 events.
[16:41:03.342] <TB1> INFO: 41600 events read in total (3483ms).
[16:41:03.342] <TB1> INFO: Test took 4552ms.
[16:41:03.346] <TB1> INFO: scanning low vcal = 230
[16:41:03.701] <TB1> INFO: Expecting 41600 events.
[16:41:07.878] <TB1> INFO: 41600 events read in total (3460ms).
[16:41:07.879] <TB1> INFO: Test took 4533ms.
[16:41:07.886] <TB1> INFO: scanning low vcal = 240
[16:41:08.231] <TB1> INFO: Expecting 41600 events.
[16:41:12.412] <TB1> INFO: 41600 events read in total (3464ms).
[16:41:12.412] <TB1> INFO: Test took 4525ms.
[16:41:12.417] <TB1> INFO: scanning low vcal = 250
[16:41:12.768] <TB1> INFO: Expecting 41600 events.
[16:41:16.931] <TB1> INFO: 41600 events read in total (3446ms).
[16:41:16.931] <TB1> INFO: Test took 4514ms.
[16:41:16.937] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[16:41:17.285] <TB1> INFO: Expecting 41600 events.
[16:41:21.498] <TB1> INFO: 41600 events read in total (3496ms).
[16:41:21.499] <TB1> INFO: Test took 4562ms.
[16:41:21.503] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[16:41:21.849] <TB1> INFO: Expecting 41600 events.
[16:41:26.022] <TB1> INFO: 41600 events read in total (3456ms).
[16:41:26.023] <TB1> INFO: Test took 4520ms.
[16:41:26.027] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[16:41:26.361] <TB1> INFO: Expecting 41600 events.
[16:41:30.592] <TB1> INFO: 41600 events read in total (3514ms).
[16:41:30.593] <TB1> INFO: Test took 4566ms.
[16:41:30.597] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[16:41:30.930] <TB1> INFO: Expecting 41600 events.
[16:41:35.230] <TB1> INFO: 41600 events read in total (3583ms).
[16:41:35.231] <TB1> INFO: Test took 4634ms.
[16:41:35.234] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:41:35.588] <TB1> INFO: Expecting 41600 events.
[16:41:39.631] <TB1> INFO: 41600 events read in total (3326ms).
[16:41:39.633] <TB1> INFO: Test took 4399ms.
[16:41:40.088] <TB1> INFO: PixTestGainPedestal::measure() done
[16:42:13.325] <TB1> INFO: PixTestGainPedestal::fit() done
[16:42:13.325] <TB1> INFO: non-linearity mean: 0.956 0.961 0.953 0.965 0.961 0.960 0.967 0.952 0.957 0.959 0.961 0.964 0.949 0.959 0.953 0.965
[16:42:13.325] <TB1> INFO: non-linearity RMS: 0.007 0.005 0.007 0.005 0.006 0.005 0.004 0.008 0.006 0.007 0.006 0.007 0.008 0.006 0.006 0.004
[16:42:13.325] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:42:13.343] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:42:13.361] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:42:13.379] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:42:13.398] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:42:13.416] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:42:13.434] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:42:13.452] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:42:13.470] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:42:13.488] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:42:13.506] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:42:13.524] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:42:13.542] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:42:13.559] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:42:13.577] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:42:13.595] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:42:13.613] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[16:42:13.619] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:42:13.620] <TB1> INFO: PixTestReadback::doTest() start.
[16:42:13.621] <TB1> INFO: PixTestReadback::RES sent once
[16:42:25.018] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[16:42:25.018] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[16:42:25.019] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[16:42:25.020] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[16:42:25.020] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[16:42:25.020] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:42:25.068] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:42:25.069] <TB1> INFO: PixTestReadback::RES sent once
[16:42:36.386] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[16:42:36.386] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[16:42:36.386] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[16:42:36.386] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[16:42:36.386] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[16:42:36.386] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[16:42:36.387] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:42:36.435] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:42:36.436] <TB1> INFO: PixTestReadback::RES sent once
[16:42:45.130] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:42:45.130] <TB1> INFO: Vbg will be calibrated using Vd calibration
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.2calibrated Vbg = 1.20486 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 161.8calibrated Vbg = 1.20689 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 144.7calibrated Vbg = 1.21097 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 153.6calibrated Vbg = 1.21841 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156.6calibrated Vbg = 1.21615 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.3calibrated Vbg = 1.22107 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 151.5calibrated Vbg = 1.22201 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 157.1calibrated Vbg = 1.21653 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152calibrated Vbg = 1.22653 :::*/*/*/*/
[16:42:45.130] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.5calibrated Vbg = 1.22459 :::*/*/*/*/
[16:42:45.131] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.8calibrated Vbg = 1.22292 :::*/*/*/*/
[16:42:45.131] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157.9calibrated Vbg = 1.2224 :::*/*/*/*/
[16:42:45.131] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 154.6calibrated Vbg = 1.21031 :::*/*/*/*/
[16:42:45.131] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 163.2calibrated Vbg = 1.21122 :::*/*/*/*/
[16:42:45.131] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153.4calibrated Vbg = 1.21922 :::*/*/*/*/
[16:42:45.131] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 146.7calibrated Vbg = 1.21436 :::*/*/*/*/
[16:42:45.135] <TB1> INFO: PixTestReadback::RES sent once
[16:45:40.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C0.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C1.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C2.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C3.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C4.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C5.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C6.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C7.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C8.dat
[16:45:40.735] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C9.dat
[16:45:40.736] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C10.dat
[16:45:40.736] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C11.dat
[16:45:40.736] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C12.dat
[16:45:40.736] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C13.dat
[16:45:40.736] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C14.dat
[16:45:40.736] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//004_FulltestPxar_p17//readbackCal_C15.dat
[16:45:40.781] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:45:40.783] <TB1> INFO: PixTestReadback::doTest() done
[16:45:40.803] <TB1> INFO: enter test to run
[16:45:40.803] <TB1> INFO: test: exit no parameter change
[16:45:41.411] <TB1> QUIET: Connection to board 153 closed.
[16:45:41.491] <TB1> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master