[12:34:46.142] <TB1> INFO: *** Welcome to pxar ***
[12:34:46.143] <TB1> INFO: *** Today: 2015/08/31
[12:34:46.143] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C15.dat
[12:34:46.143] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:34:46.143] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//defaultMaskFile.dat
[12:34:46.143] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters_C15.dat
[12:34:46.213] <TB1> INFO: clk: 4
[12:34:46.213] <TB1> INFO: ctr: 4
[12:34:46.213] <TB1> INFO: sda: 19
[12:34:46.213] <TB1> INFO: tin: 9
[12:34:46.213] <TB1> INFO: level: 15
[12:34:46.213] <TB1> INFO: triggerdelay: 0
[12:34:46.213] <TB1> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[12:34:46.213] <TB1> INFO: Log level: INFO
[12:34:46.221] <TB1> INFO: Found DTB DTB_WXBYFL
[12:34:46.235] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[12:34:46.238] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[12:34:46.241] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[12:34:47.761] <TB1> INFO: DUT info:
[12:34:47.761] <TB1> INFO: The DUT currently contains the following objects:
[12:34:47.761] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:34:47.761] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:34:47.761] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:34:47.761] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:34:47.761] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.761] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.761] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.761] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.761] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.761] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.761] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.761] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.761] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.762] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.762] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.762] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.762] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.762] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.762] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:47.762] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:34:48.163] <TB1> INFO: enter 'restricted' command line mode
[12:34:48.163] <TB1> INFO: enter test to run
[12:34:48.163] <TB1> INFO: test: pretest no parameter change
[12:34:48.163] <TB1> INFO: running: pretest
[12:34:48.169] <TB1> INFO: ######################################################################
[12:34:48.169] <TB1> INFO: PixTestPretest::doTest()
[12:34:48.169] <TB1> INFO: ######################################################################
[12:34:48.171] <TB1> INFO: ----------------------------------------------------------------------
[12:34:48.171] <TB1> INFO: PixTestPretest::programROC()
[12:34:48.171] <TB1> INFO: ----------------------------------------------------------------------
[12:35:06.193] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:35:06.193] <TB1> INFO: IA differences per ROC: 19.3 19.3 18.5 16.9 18.5 20.1 19.3 18.5 19.3 18.5 19.3 20.1 21.7 17.7 19.3 18.5
[12:35:06.273] <TB1> INFO: ----------------------------------------------------------------------
[12:35:06.273] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:35:06.273] <TB1> INFO: ----------------------------------------------------------------------
[12:35:11.171] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[12:35:11.173] <TB1> INFO: ----------------------------------------------------------------------
[12:35:11.173] <TB1> INFO: PixTestPretest::findTiming()
[12:35:11.173] <TB1> INFO: ----------------------------------------------------------------------
[12:35:11.173] <TB1> INFO: PixTestCmd::init()

[12:37:10.445] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[12:37:10.445] <TB1> INFO: (success/tries = 100/100), width = 5
[12:37:10.449] <TB1> INFO: ----------------------------------------------------------------------
[12:37:10.449] <TB1> INFO: PixTestPretest::findWorkingPixel()
[12:37:10.449] <TB1> INFO: ----------------------------------------------------------------------
[12:37:10.587] <TB1> INFO: Expecting 231680 events.
[12:37:19.439] <TB1> INFO: 231680 events read in total (8135ms).
[12:37:19.444] <TB1> INFO: Test took 8992ms.
[12:37:19.762] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:37:19.812] <TB1> INFO: ----------------------------------------------------------------------
[12:37:19.812] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[12:37:19.812] <TB1> INFO: ----------------------------------------------------------------------
[12:37:19.951] <TB1> INFO: Expecting 231680 events.
[12:37:29.290] <TB1> INFO: 231680 events read in total (8621ms).
[12:37:29.295] <TB1> INFO: Test took 9477ms.
[12:37:29.637] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[12:37:29.637] <TB1> INFO: CalDel: 157 137 141 142 126 131 153 132 131 139 170 185 167 125 154 148
[12:37:29.637] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:37:29.641] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C0.dat
[12:37:29.641] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C1.dat
[12:37:29.641] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C2.dat
[12:37:29.642] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C3.dat
[12:37:29.642] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C4.dat
[12:37:29.642] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C5.dat
[12:37:29.643] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C6.dat
[12:37:29.643] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C7.dat
[12:37:29.643] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C8.dat
[12:37:29.644] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C9.dat
[12:37:29.644] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C10.dat
[12:37:29.644] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C11.dat
[12:37:29.644] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C12.dat
[12:37:29.645] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C13.dat
[12:37:29.645] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C14.dat
[12:37:29.645] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters_C15.dat
[12:37:29.646] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//tbmParameters_C0a.dat
[12:37:29.646] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:37:29.646] <TB1> INFO: PixTestPretest::doTest() done, duration: 161 seconds
[12:37:29.728] <TB1> INFO: enter test to run
[12:37:29.729] <TB1> INFO: test: fulltest no parameter change
[12:37:29.729] <TB1> INFO: running: fulltest
[12:37:29.729] <TB1> INFO: ######################################################################
[12:37:29.729] <TB1> INFO: PixTestFullTest::doTest()
[12:37:29.729] <TB1> INFO: ######################################################################
[12:37:29.730] <TB1> INFO: ######################################################################
[12:37:29.730] <TB1> INFO: PixTestAlive::doTest()
[12:37:29.730] <TB1> INFO: ######################################################################
[12:37:29.732] <TB1> INFO: ----------------------------------------------------------------------
[12:37:29.732] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:37:29.732] <TB1> INFO: ----------------------------------------------------------------------
[12:37:30.071] <TB1> INFO: Expecting 41600 events.
[12:37:34.470] <TB1> INFO: 41600 events read in total (3682ms).
[12:37:34.470] <TB1> INFO: Test took 4736ms.
[12:37:34.477] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:34.777] <TB1> INFO: PixTestAlive::aliveTest() done
[12:37:34.777] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:37:34.779] <TB1> INFO: ----------------------------------------------------------------------
[12:37:34.779] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:37:34.779] <TB1> INFO: ----------------------------------------------------------------------
[12:37:35.114] <TB1> INFO: Expecting 41600 events.
[12:37:38.272] <TB1> INFO: 41600 events read in total (2442ms).
[12:37:38.274] <TB1> INFO: Test took 3492ms.
[12:37:38.274] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:38.275] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:37:38.601] <TB1> INFO: PixTestAlive::maskTest() done
[12:37:38.601] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:37:38.605] <TB1> INFO: ----------------------------------------------------------------------
[12:37:38.605] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:37:38.605] <TB1> INFO: ----------------------------------------------------------------------
[12:37:38.949] <TB1> INFO: Expecting 41600 events.
[12:37:43.301] <TB1> INFO: 41600 events read in total (3635ms).
[12:37:43.301] <TB1> INFO: Test took 4692ms.
[12:37:43.308] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:43.610] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[12:37:43.610] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:37:43.610] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:37:43.618] <TB1> INFO: ######################################################################
[12:37:43.618] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:37:43.618] <TB1> INFO: ######################################################################
[12:37:43.623] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[12:37:43.635] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:37:43.635] <TB1> INFO: run 1 of 1
[12:37:43.972] <TB1> INFO: Expecting 3120000 events.
[12:38:19.374] <TB1> INFO: 827160 events read in total (34685ms).
[12:38:53.701] <TB1> INFO: 1642400 events read in total (69012ms).
[12:39:28.279] <TB1> INFO: 2464865 events read in total (103590ms).
[12:39:55.770] <TB1> INFO: 3120000 events read in total (131081ms).
[12:39:55.819] <TB1> INFO: Test took 132184ms.
[12:39:55.925] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:19.894] <TB1> INFO: PixTestBBMap::doTest() done, duration: 156 seconds
[12:40:19.894] <TB1> INFO: number of dead bumps (per ROC): 4 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1
[12:40:19.894] <TB1> INFO: separation cut (per ROC): 73 83 73 83 88 74 70 93 80 70 94 69 70 74 69 72
[12:40:19.968] <TB1> INFO: ######################################################################
[12:40:19.968] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:40:19.968] <TB1> INFO: ######################################################################
[12:40:19.968] <TB1> INFO: ----------------------------------------------------------------------
[12:40:19.968] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:40:19.968] <TB1> INFO: ----------------------------------------------------------------------
[12:40:19.969] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[12:40:19.977] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[12:40:19.977] <TB1> INFO: run 1 of 1
[12:40:20.281] <TB1> INFO: Expecting 31200000 events.
[12:40:43.110] <TB1> INFO: 931300 events read in total (22112ms).
[12:41:07.128] <TB1> INFO: 1847900 events read in total (46130ms).
[12:41:31.290] <TB1> INFO: 2760600 events read in total (70292ms).
[12:41:55.066] <TB1> INFO: 3677450 events read in total (94068ms).
[12:42:18.857] <TB1> INFO: 4588950 events read in total (117859ms).
[12:42:42.696] <TB1> INFO: 5502500 events read in total (141698ms).
[12:43:06.616] <TB1> INFO: 6411100 events read in total (165618ms).
[12:43:30.659] <TB1> INFO: 7324150 events read in total (189661ms).
[12:43:54.744] <TB1> INFO: 8232050 events read in total (213746ms).
[12:44:18.629] <TB1> INFO: 9141500 events read in total (237631ms).
[12:44:42.508] <TB1> INFO: 10049300 events read in total (261510ms).
[12:45:06.380] <TB1> INFO: 10961700 events read in total (285382ms).
[12:45:30.367] <TB1> INFO: 11867450 events read in total (309369ms).
[12:45:54.209] <TB1> INFO: 12777250 events read in total (333211ms).
[12:46:18.177] <TB1> INFO: 13683800 events read in total (357179ms).
[12:46:41.963] <TB1> INFO: 14592750 events read in total (380965ms).
[12:47:05.817] <TB1> INFO: 15497750 events read in total (404819ms).
[12:47:29.769] <TB1> INFO: 16399850 events read in total (428771ms).
[12:47:53.599] <TB1> INFO: 17298750 events read in total (452602ms).
[12:48:17.276] <TB1> INFO: 18198000 events read in total (476278ms).
[12:48:41.059] <TB1> INFO: 19094250 events read in total (500061ms).
[12:49:04.434] <TB1> INFO: 19992800 events read in total (523436ms).
[12:49:28.236] <TB1> INFO: 20887400 events read in total (547238ms).
[12:49:51.968] <TB1> INFO: 21785600 events read in total (570970ms).
[12:50:15.790] <TB1> INFO: 22679100 events read in total (594792ms).
[12:50:39.545] <TB1> INFO: 23576250 events read in total (618547ms).
[12:51:03.237] <TB1> INFO: 24470850 events read in total (642239ms).
[12:51:26.941] <TB1> INFO: 25367150 events read in total (665943ms).
[12:51:50.673] <TB1> INFO: 26260350 events read in total (689675ms).
[12:52:14.505] <TB1> INFO: 27156250 events read in total (713507ms).
[12:52:38.372] <TB1> INFO: 28052150 events read in total (737374ms).
[12:53:02.195] <TB1> INFO: 28951550 events read in total (761197ms).
[12:53:26.095] <TB1> INFO: 29848050 events read in total (785097ms).
[12:53:49.968] <TB1> INFO: 30751100 events read in total (808970ms).
[12:54:01.834] <TB1> INFO: 31200000 events read in total (820837ms).
[12:54:01.865] <TB1> INFO: Test took 821888ms.
[12:54:01.955] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:02.050] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:03.542] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:05.017] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:06.508] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:07.905] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:09.306] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:10.728] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:12.221] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:13.712] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:15.197] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:16.661] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:18.114] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:19.659] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:21.053] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:22.428] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:23.845] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:54:25.260] <TB1> INFO: PixTestScurves::scurves() done
[12:54:25.260] <TB1> INFO: Vcal mean: 88.96 93.92 81.66 90.05 90.82 82.96 82.18 97.16 86.82 78.58 102.47 79.06 79.92 83.03 73.71 80.23
[12:54:25.260] <TB1> INFO: Vcal RMS: 5.56 5.43 4.65 5.11 5.52 5.24 4.69 6.00 5.19 3.99 5.40 4.02 4.60 5.10 4.28 4.76
[12:54:25.260] <TB1> INFO: PixTestScurves::fullTest() done, duration: 845 seconds
[12:54:25.332] <TB1> INFO: ######################################################################
[12:54:25.332] <TB1> INFO: PixTestTrim::doTest()
[12:54:25.332] <TB1> INFO: ######################################################################
[12:54:25.334] <TB1> INFO: ----------------------------------------------------------------------
[12:54:25.334] <TB1> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[12:54:25.334] <TB1> INFO: ----------------------------------------------------------------------
[12:54:25.415] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:54:25.415] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[12:54:25.425] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:54:25.425] <TB1> INFO: run 1 of 1
[12:54:25.768] <TB1> INFO: Expecting 13312000 events.
[12:54:53.236] <TB1> INFO: 1084120 events read in total (26751ms).
[12:55:19.435] <TB1> INFO: 2162740 events read in total (52950ms).
[12:55:47.288] <TB1> INFO: 3238620 events read in total (80803ms).
[12:56:15.141] <TB1> INFO: 4310940 events read in total (108656ms).
[12:56:42.872] <TB1> INFO: 5377960 events read in total (136387ms).
[12:57:10.638] <TB1> INFO: 6441560 events read in total (164153ms).
[12:57:38.414] <TB1> INFO: 7510400 events read in total (191929ms).
[12:58:06.139] <TB1> INFO: 8581240 events read in total (219654ms).
[12:58:33.949] <TB1> INFO: 9653380 events read in total (247464ms).
[12:59:01.580] <TB1> INFO: 10728540 events read in total (275095ms).
[12:59:29.211] <TB1> INFO: 11801000 events read in total (302726ms).
[12:59:57.069] <TB1> INFO: 12875540 events read in total (330584ms).
[13:00:08.499] <TB1> INFO: 13312000 events read in total (342014ms).
[13:00:08.529] <TB1> INFO: Test took 343104ms.
[13:00:08.582] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:27.120] <TB1> INFO: ROC 0 VthrComp = 96
[13:00:27.121] <TB1> INFO: ROC 1 VthrComp = 99
[13:00:27.122] <TB1> INFO: ROC 2 VthrComp = 89
[13:00:27.122] <TB1> INFO: ROC 3 VthrComp = 98
[13:00:27.122] <TB1> INFO: ROC 4 VthrComp = 99
[13:00:27.122] <TB1> INFO: ROC 5 VthrComp = 89
[13:00:27.122] <TB1> INFO: ROC 6 VthrComp = 91
[13:00:27.123] <TB1> INFO: ROC 7 VthrComp = 102
[13:00:27.123] <TB1> INFO: ROC 8 VthrComp = 96
[13:00:27.123] <TB1> INFO: ROC 9 VthrComp = 84
[13:00:27.123] <TB1> INFO: ROC 10 VthrComp = 104
[13:00:27.123] <TB1> INFO: ROC 11 VthrComp = 81
[13:00:27.123] <TB1> INFO: ROC 12 VthrComp = 85
[13:00:27.123] <TB1> INFO: ROC 13 VthrComp = 89
[13:00:27.123] <TB1> INFO: ROC 14 VthrComp = 79
[13:00:27.124] <TB1> INFO: ROC 15 VthrComp = 84
[13:00:27.124] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:00:27.124] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[13:00:27.133] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:00:27.133] <TB1> INFO: run 1 of 1
[13:00:27.460] <TB1> INFO: Expecting 13312000 events.
[13:00:53.213] <TB1> INFO: 779520 events read in total (25036ms).
[13:01:15.480] <TB1> INFO: 1555740 events read in total (47303ms).
[13:01:40.448] <TB1> INFO: 2330860 events read in total (72271ms).
[13:02:05.330] <TB1> INFO: 3105740 events read in total (97153ms).
[13:02:30.241] <TB1> INFO: 3880660 events read in total (122064ms).
[13:02:55.048] <TB1> INFO: 4656560 events read in total (146871ms).
[13:03:19.953] <TB1> INFO: 5432000 events read in total (171776ms).
[13:03:44.982] <TB1> INFO: 6207600 events read in total (196805ms).
[13:04:09.932] <TB1> INFO: 6980540 events read in total (221755ms).
[13:04:34.837] <TB1> INFO: 7749600 events read in total (246660ms).
[13:04:59.693] <TB1> INFO: 8517640 events read in total (271516ms).
[13:05:22.122] <TB1> INFO: 9284300 events read in total (293945ms).
[13:05:44.630] <TB1> INFO: 10050340 events read in total (316453ms).
[13:06:07.400] <TB1> INFO: 10816000 events read in total (339223ms).
[13:06:29.927] <TB1> INFO: 11580720 events read in total (361750ms).
[13:06:54.350] <TB1> INFO: 12346820 events read in total (386173ms).
[13:07:19.155] <TB1> INFO: 13113160 events read in total (410978ms).
[13:07:25.899] <TB1> INFO: 13312000 events read in total (417722ms).
[13:07:25.939] <TB1> INFO: Test took 418806ms.
[13:07:26.076] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:49.031] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.7818 for pixel 16/16 mean/min/max = 45.0808/31.2753/58.8862
[13:07:49.031] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 57.4299 for pixel 17/17 mean/min/max = 44.6675/31.6851/57.6499
[13:07:49.031] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.8853 for pixel 25/15 mean/min/max = 45.3502/32.8101/57.8902
[13:07:49.031] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 56.917 for pixel 50/74 mean/min/max = 44.5265/32.066/56.987
[13:07:49.032] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.5565 for pixel 0/70 mean/min/max = 44.9747/31.3861/58.5633
[13:07:49.032] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 59.7418 for pixel 8/78 mean/min/max = 46.1052/32.3449/59.8654
[13:07:49.032] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 56.6415 for pixel 1/79 mean/min/max = 44.3316/31.7772/56.886
[13:07:49.032] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.9292 for pixel 5/61 mean/min/max = 46.5824/32.038/61.1268
[13:07:49.033] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 57.3346 for pixel 32/9 mean/min/max = 44.6125/31.7439/57.4812
[13:07:49.033] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 57.3833 for pixel 24/1 mean/min/max = 45.2597/33.1173/57.402
[13:07:49.033] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.5888 for pixel 17/27 mean/min/max = 47.1188/33.5259/60.7117
[13:07:49.033] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 57.5878 for pixel 21/4 mean/min/max = 45.4401/33.2249/57.6554
[13:07:49.034] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 58.7642 for pixel 0/42 mean/min/max = 45.542/32.1614/58.9225
[13:07:49.034] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 59.6773 for pixel 1/71 mean/min/max = 46.2553/32.6862/59.8245
[13:07:49.034] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 57.1115 for pixel 47/5 mean/min/max = 46.0445/34.7037/57.3853
[13:07:49.034] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 59.5678 for pixel 26/7 mean/min/max = 45.7873/32.0014/59.5732
[13:07:49.035] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:49.168] <TB1> INFO: Expecting 1029120 events.
[13:08:12.859] <TB1> INFO: 1029120 events read in total (22975ms).
[13:08:12.865] <TB1> INFO: Expecting 1029120 events.
[13:08:34.550] <TB1> INFO: 1029120 events read in total (21155ms).
[13:08:34.558] <TB1> INFO: Expecting 1029120 events.
[13:08:58.574] <TB1> INFO: 1029120 events read in total (23487ms).
[13:08:58.584] <TB1> INFO: Expecting 1029120 events.
[13:09:22.386] <TB1> INFO: 1029120 events read in total (23271ms).
[13:09:22.398] <TB1> INFO: Expecting 1029120 events.
[13:09:46.279] <TB1> INFO: 1029120 events read in total (23353ms).
[13:09:46.292] <TB1> INFO: Expecting 1029120 events.
[13:10:10.212] <TB1> INFO: 1029120 events read in total (23379ms).
[13:10:10.230] <TB1> INFO: Expecting 1029120 events.
[13:10:34.024] <TB1> INFO: 1029120 events read in total (23265ms).
[13:10:34.040] <TB1> INFO: Expecting 1029120 events.
[13:10:58.045] <TB1> INFO: 1029120 events read in total (23469ms).
[13:10:58.066] <TB1> INFO: Expecting 1029120 events.
[13:11:22.089] <TB1> INFO: 1029120 events read in total (23495ms).
[13:11:22.113] <TB1> INFO: Expecting 1029120 events.
[13:11:45.946] <TB1> INFO: 1029120 events read in total (23304ms).
[13:11:45.971] <TB1> INFO: Expecting 1029120 events.
[13:12:09.827] <TB1> INFO: 1029120 events read in total (23327ms).
[13:12:09.856] <TB1> INFO: Expecting 1029120 events.
[13:12:33.580] <TB1> INFO: 1029120 events read in total (23196ms).
[13:12:33.608] <TB1> INFO: Expecting 1029120 events.
[13:12:57.198] <TB1> INFO: 1029120 events read in total (23062ms).
[13:12:57.234] <TB1> INFO: Expecting 1029120 events.
[13:13:21.103] <TB1> INFO: 1029120 events read in total (23342ms).
[13:13:21.135] <TB1> INFO: Expecting 1029120 events.
[13:13:45.321] <TB1> INFO: 1029120 events read in total (23657ms).
[13:13:45.360] <TB1> INFO: Expecting 1029120 events.
[13:14:09.237] <TB1> INFO: 1029120 events read in total (23348ms).
[13:14:09.272] <TB1> INFO: Test took 380237ms.
[13:14:10.406] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:14:10.416] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:14:10.416] <TB1> INFO: run 1 of 1
[13:14:10.749] <TB1> INFO: Expecting 16640000 events.
[13:14:35.957] <TB1> INFO: 724040 events read in total (24491ms).
[13:14:59.990] <TB1> INFO: 1445400 events read in total (48524ms).
[13:15:24.348] <TB1> INFO: 2166740 events read in total (72882ms).
[13:15:48.703] <TB1> INFO: 2888180 events read in total (97237ms).
[13:16:13.235] <TB1> INFO: 3609120 events read in total (121769ms).
[13:16:37.506] <TB1> INFO: 4329860 events read in total (146040ms).
[13:17:01.906] <TB1> INFO: 5051120 events read in total (170441ms).
[13:17:26.482] <TB1> INFO: 5773520 events read in total (195016ms).
[13:17:50.891] <TB1> INFO: 6494620 events read in total (219425ms).
[13:18:15.304] <TB1> INFO: 7215920 events read in total (243838ms).
[13:18:39.696] <TB1> INFO: 7937500 events read in total (268230ms).
[13:19:04.016] <TB1> INFO: 8656760 events read in total (292550ms).
[13:19:28.286] <TB1> INFO: 9373160 events read in total (316820ms).
[13:19:52.618] <TB1> INFO: 10089180 events read in total (341152ms).
[13:20:16.918] <TB1> INFO: 10803860 events read in total (365452ms).
[13:20:41.180] <TB1> INFO: 11518800 events read in total (389714ms).
[13:21:05.647] <TB1> INFO: 12233740 events read in total (414181ms).
[13:21:29.875] <TB1> INFO: 12947100 events read in total (438409ms).
[13:21:54.167] <TB1> INFO: 13661060 events read in total (462701ms).
[13:22:18.480] <TB1> INFO: 14373800 events read in total (487014ms).
[13:22:42.768] <TB1> INFO: 15087960 events read in total (511302ms).
[13:23:07.117] <TB1> INFO: 15801440 events read in total (535651ms).
[13:23:31.487] <TB1> INFO: 16516140 events read in total (560021ms).
[13:23:35.926] <TB1> INFO: 16640000 events read in total (564460ms).
[13:23:35.987] <TB1> INFO: Test took 565572ms.
[13:23:36.222] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:01.919] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.172630 .. 51.490926
[13:24:01.993] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 61 (-1/-1) hits flags = 16 (plus default)
[13:24:02.002] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:24:02.002] <TB1> INFO: run 1 of 1
[13:24:02.306] <TB1> INFO: Expecting 5158400 events.
[13:24:27.453] <TB1> INFO: 922560 events read in total (24430ms).
[13:24:53.027] <TB1> INFO: 1847140 events read in total (50004ms).
[13:25:19.402] <TB1> INFO: 2771280 events read in total (76379ms).
[13:25:45.603] <TB1> INFO: 3690180 events read in total (102580ms).
[13:26:11.838] <TB1> INFO: 4602820 events read in total (128815ms).
[13:26:27.842] <TB1> INFO: 5158400 events read in total (144819ms).
[13:26:27.867] <TB1> INFO: Test took 145865ms.
[13:26:27.913] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:44.008] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 16.255739 .. 45.627792
[13:26:44.113] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 6 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:26:44.124] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:26:44.124] <TB1> INFO: run 1 of 1
[13:26:44.472] <TB1> INFO: Expecting 4160000 events.
[13:27:11.632] <TB1> INFO: 931740 events read in total (26443ms).
[13:27:38.173] <TB1> INFO: 1864340 events read in total (52985ms).
[13:28:04.791] <TB1> INFO: 2795520 events read in total (79603ms).
[13:28:31.349] <TB1> INFO: 3724580 events read in total (106160ms).
[13:28:44.078] <TB1> INFO: 4160000 events read in total (118889ms).
[13:28:44.099] <TB1> INFO: Test took 119975ms.
[13:28:44.138] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:58.158] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 19.944353 .. 42.572081
[13:28:58.235] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 9 .. 52 (-1/-1) hits flags = 16 (plus default)
[13:28:58.244] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:28:58.244] <TB1> INFO: run 1 of 1
[13:28:58.551] <TB1> INFO: Expecting 3660800 events.
[13:29:26.043] <TB1> INFO: 942200 events read in total (26775ms).
[13:29:52.829] <TB1> INFO: 1884660 events read in total (53561ms).
[13:30:19.534] <TB1> INFO: 2825540 events read in total (80266ms).
[13:30:43.266] <TB1> INFO: 3660800 events read in total (103998ms).
[13:30:43.283] <TB1> INFO: Test took 105039ms.
[13:30:43.316] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:58.181] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 22.755131 .. 42.159610
[13:30:58.285] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 12 .. 52 (-1/-1) hits flags = 16 (plus default)
[13:30:58.295] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:30:58.295] <TB1> INFO: run 1 of 1
[13:30:58.642] <TB1> INFO: Expecting 3411200 events.
[13:31:26.064] <TB1> INFO: 922180 events read in total (26705ms).
[13:31:52.684] <TB1> INFO: 1844560 events read in total (53325ms).
[13:32:19.107] <TB1> INFO: 2766620 events read in total (79749ms).
[13:32:37.821] <TB1> INFO: 3411200 events read in total (98462ms).
[13:32:37.835] <TB1> INFO: Test took 99540ms.
[13:32:37.865] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:50.000] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:32:50.000] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:32:50.009] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:32:50.009] <TB1> INFO: run 1 of 1
[13:32:50.342] <TB1> INFO: Expecting 3411200 events.
[13:33:16.928] <TB1> INFO: 878740 events read in total (25869ms).
[13:33:43.140] <TB1> INFO: 1757380 events read in total (52081ms).
[13:34:09.067] <TB1> INFO: 2635360 events read in total (78008ms).
[13:34:32.253] <TB1> INFO: 3411200 events read in total (101194ms).
[13:34:32.272] <TB1> INFO: Test took 102264ms.
[13:34:32.311] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:46.765] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:34:46.765] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:34:46.766] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:34:46.766] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:34:46.766] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:34:46.766] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:34:46.767] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:34:46.767] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:34:46.767] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:34:46.767] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:34:46.767] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:34:46.768] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:34:46.768] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:34:46.768] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:34:46.768] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:34:46.768] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:34:46.769] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:34:46.779] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:34:46.786] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:34:46.793] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:34:46.800] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:34:46.807] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:34:46.814] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:34:46.821] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:34:46.827] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:34:46.834] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:34:46.841] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:34:46.847] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:34:46.854] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:34:46.861] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:34:46.867] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:34:46.873] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:34:46.879] <TB1> INFO: PixTestTrim::trimTest() done
[13:34:46.879] <TB1> INFO: vtrim: 93 92 105 89 96 109 90 117 106 88 110 89 92 104 94 103
[13:34:46.879] <TB1> INFO: vthrcomp: 96 99 89 98 99 89 91 102 96 84 104 81 85 89 79 84
[13:34:46.879] <TB1> INFO: vcal mean: 34.94 34.98 34.99 35.01 34.97 35.00 34.96 34.98 34.92 34.99 35.00 35.00 34.99 34.95 34.99 34.98
[13:34:46.879] <TB1> INFO: vcal RMS: 0.74 0.73 0.70 0.66 0.70 0.69 0.68 0.74 0.65 0.70 0.69 0.67 0.75 0.70 0.66 0.69
[13:34:46.879] <TB1> INFO: bits mean: 9.58 9.68 9.46 9.34 9.43 9.04 9.53 8.95 9.53 9.27 8.67 9.12 8.95 8.97 8.68 9.27
[13:34:46.879] <TB1> INFO: bits RMS: 2.76 2.72 2.62 2.84 2.85 2.78 2.76 2.85 2.75 2.63 2.69 2.68 2.99 2.77 2.62 2.75
[13:34:46.888] <TB1> INFO: ----------------------------------------------------------------------
[13:34:46.888] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:34:46.888] <TB1> INFO: ----------------------------------------------------------------------
[13:34:46.892] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:34:46.901] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:34:46.901] <TB1> INFO: run 1 of 1
[13:34:47.206] <TB1> INFO: Expecting 8320000 events.
[13:35:15.420] <TB1> INFO: 909710 events read in total (27498ms).
[13:35:42.279] <TB1> INFO: 1812950 events read in total (54357ms).
[13:36:09.343] <TB1> INFO: 2713340 events read in total (81421ms).
[13:36:36.030] <TB1> INFO: 3612040 events read in total (108108ms).
[13:37:03.877] <TB1> INFO: 4507720 events read in total (135955ms).
[13:37:32.695] <TB1> INFO: 5397900 events read in total (164773ms).
[13:38:01.692] <TB1> INFO: 6287350 events read in total (193770ms).
[13:38:30.647] <TB1> INFO: 7175670 events read in total (222725ms).
[13:38:59.245] <TB1> INFO: 8067470 events read in total (251323ms).
[13:39:06.973] <TB1> INFO: 8320000 events read in total (259051ms).
[13:39:07.021] <TB1> INFO: Test took 260120ms.
[13:39:07.137] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:32.277] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 169 (-1/-1) hits flags = 16 (plus default)
[13:39:32.286] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:39:32.286] <TB1> INFO: run 1 of 1
[13:39:32.601] <TB1> INFO: Expecting 7072000 events.
[13:40:02.842] <TB1> INFO: 935970 events read in total (29524ms).
[13:40:30.926] <TB1> INFO: 1862820 events read in total (57608ms).
[13:41:00.340] <TB1> INFO: 2787500 events read in total (87022ms).
[13:41:27.638] <TB1> INFO: 3708280 events read in total (114320ms).
[13:41:56.970] <TB1> INFO: 4621300 events read in total (143652ms).
[13:42:26.285] <TB1> INFO: 5532010 events read in total (172967ms).
[13:42:55.543] <TB1> INFO: 6443590 events read in total (202225ms).
[13:43:15.694] <TB1> INFO: 7072000 events read in total (222376ms).
[13:43:15.728] <TB1> INFO: Test took 223442ms.
[13:43:15.832] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:41.863] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 16 (plus default)
[13:43:41.872] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:43:41.872] <TB1> INFO: run 1 of 1
[13:43:42.190] <TB1> INFO: Expecting 6572800 events.
[13:44:11.043] <TB1> INFO: 964910 events read in total (28132ms).
[13:44:40.808] <TB1> INFO: 1920020 events read in total (57897ms).
[13:45:10.534] <TB1> INFO: 2871920 events read in total (87624ms).
[13:45:38.072] <TB1> INFO: 3816810 events read in total (115161ms).
[13:46:07.788] <TB1> INFO: 4754960 events read in total (144877ms).
[13:46:37.342] <TB1> INFO: 5691980 events read in total (174431ms).
[13:47:04.974] <TB1> INFO: 6572800 events read in total (202063ms).
[13:47:05.004] <TB1> INFO: Test took 203132ms.
[13:47:05.079] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:28.055] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 158 (-1/-1) hits flags = 16 (plus default)
[13:47:28.063] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:47:28.063] <TB1> INFO: run 1 of 1
[13:47:28.367] <TB1> INFO: Expecting 6614400 events.
[13:47:58.980] <TB1> INFO: 961670 events read in total (29897ms).
[13:48:28.880] <TB1> INFO: 1913810 events read in total (59797ms).
[13:48:58.685] <TB1> INFO: 2862650 events read in total (89602ms).
[13:49:27.839] <TB1> INFO: 3804220 events read in total (118756ms).
[13:49:57.507] <TB1> INFO: 4739650 events read in total (148424ms).
[13:50:24.443] <TB1> INFO: 5672990 events read in total (175360ms).
[13:50:53.978] <TB1> INFO: 6614400 events read in total (204895ms).
[13:50:54.012] <TB1> INFO: Test took 205949ms.
[13:50:54.099] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:18.667] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 16 (plus default)
[13:51:18.675] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:51:18.676] <TB1> INFO: run 1 of 1
[13:51:18.980] <TB1> INFO: Expecting 6572800 events.
[13:51:49.622] <TB1> INFO: 963610 events read in total (29925ms).
[13:52:19.446] <TB1> INFO: 1917820 events read in total (59749ms).
[13:52:49.134] <TB1> INFO: 2868540 events read in total (89438ms).
[13:53:19.045] <TB1> INFO: 3812070 events read in total (119348ms).
[13:53:48.639] <TB1> INFO: 4749050 events read in total (148943ms).
[13:54:15.997] <TB1> INFO: 5684600 events read in total (176300ms).
[13:54:43.904] <TB1> INFO: 6572800 events read in total (204207ms).
[13:54:43.936] <TB1> INFO: Test took 205260ms.
[13:54:44.010] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:11.312] <TB1> INFO: PixTestTrim::trimBitTest() done
[13:55:11.313] <TB1> INFO: PixTestTrim::doTest() done, duration: 3645 seconds
[13:55:11.975] <TB1> INFO: ######################################################################
[13:55:11.975] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:55:11.975] <TB1> INFO: ######################################################################
[13:55:12.280] <TB1> INFO: Expecting 41600 events.
[13:55:16.759] <TB1> INFO: 41600 events read in total (3755ms).
[13:55:16.760] <TB1> INFO: Test took 4784ms.
[13:55:16.766] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:17.337] <TB1> INFO: Expecting 41600 events.
[13:55:21.816] <TB1> INFO: 41600 events read in total (3762ms).
[13:55:21.817] <TB1> INFO: Test took 4786ms.
[13:55:21.824] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:22.168] <TB1> INFO: Expecting 41600 events.
[13:55:26.665] <TB1> INFO: 41600 events read in total (3780ms).
[13:55:26.666] <TB1> INFO: Test took 4827ms.
[13:55:26.673] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:26.682] <TB1> INFO: The DUT currently contains the following objects:
[13:55:26.682] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:26.682] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:26.682] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:26.682] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:26.682] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.682] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.682] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.682] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.682] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.682] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.682] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:26.683] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:27.004] <TB1> INFO: Expecting 2560 events.
[13:55:28.076] <TB1> INFO: 2560 events read in total (355ms).
[13:55:28.076] <TB1> INFO: Test took 1393ms.
[13:55:28.077] <TB1> INFO: The DUT currently contains the following objects:
[13:55:28.077] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:28.077] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:28.077] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:28.077] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:28.077] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.077] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.078] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.078] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.078] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.078] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:28.492] <TB1> INFO: Expecting 2560 events.
[13:55:29.565] <TB1> INFO: 2560 events read in total (356ms).
[13:55:29.565] <TB1> INFO: Test took 1487ms.
[13:55:29.566] <TB1> INFO: The DUT currently contains the following objects:
[13:55:29.566] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:29.566] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:29.566] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:29.566] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:29.566] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.566] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:29.981] <TB1> INFO: Expecting 2560 events.
[13:55:31.054] <TB1> INFO: 2560 events read in total (356ms).
[13:55:31.054] <TB1> INFO: Test took 1487ms.
[13:55:31.054] <TB1> INFO: The DUT currently contains the following objects:
[13:55:31.054] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:31.055] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:31.055] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:31.055] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:31.055] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.055] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:31.470] <TB1> INFO: Expecting 2560 events.
[13:55:32.541] <TB1> INFO: 2560 events read in total (355ms).
[13:55:32.542] <TB1> INFO: Test took 1487ms.
[13:55:32.542] <TB1> INFO: The DUT currently contains the following objects:
[13:55:32.543] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:32.543] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:32.543] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:32.543] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:32.543] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.543] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:32.958] <TB1> INFO: Expecting 2560 events.
[13:55:34.027] <TB1> INFO: 2560 events read in total (353ms).
[13:55:34.027] <TB1> INFO: Test took 1483ms.
[13:55:34.028] <TB1> INFO: The DUT currently contains the following objects:
[13:55:34.028] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:34.028] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:34.028] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:34.028] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:34.028] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.028] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.028] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.028] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.028] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.028] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.033] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.033] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.033] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.033] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.034] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.034] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.034] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.034] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.034] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.034] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:34.443] <TB1> INFO: Expecting 2560 events.
[13:55:35.514] <TB1> INFO: 2560 events read in total (354ms).
[13:55:35.514] <TB1> INFO: Test took 1480ms.
[13:55:35.515] <TB1> INFO: The DUT currently contains the following objects:
[13:55:35.515] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:35.515] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:35.515] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:35.515] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:35.515] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.515] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:35.930] <TB1> INFO: Expecting 2560 events.
[13:55:37.002] <TB1> INFO: 2560 events read in total (355ms).
[13:55:37.003] <TB1> INFO: Test took 1488ms.
[13:55:37.003] <TB1> INFO: The DUT currently contains the following objects:
[13:55:37.003] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:37.003] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:37.004] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:37.004] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:37.004] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.004] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:37.419] <TB1> INFO: Expecting 2560 events.
[13:55:38.490] <TB1> INFO: 2560 events read in total (354ms).
[13:55:38.491] <TB1> INFO: Test took 1487ms.
[13:55:38.491] <TB1> INFO: The DUT currently contains the following objects:
[13:55:38.491] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:38.491] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:38.491] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:38.491] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:38.491] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.491] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.491] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.491] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.491] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.492] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:38.906] <TB1> INFO: Expecting 2560 events.
[13:55:39.977] <TB1> INFO: 2560 events read in total (354ms).
[13:55:39.977] <TB1> INFO: Test took 1485ms.
[13:55:39.978] <TB1> INFO: The DUT currently contains the following objects:
[13:55:39.978] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:39.978] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:39.978] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:39.978] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:39.978] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.978] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.978] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.978] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.978] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.978] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:39.979] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:40.393] <TB1> INFO: Expecting 2560 events.
[13:55:41.464] <TB1> INFO: 2560 events read in total (355ms).
[13:55:41.465] <TB1> INFO: Test took 1486ms.
[13:55:41.465] <TB1> INFO: The DUT currently contains the following objects:
[13:55:41.465] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:41.465] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:41.465] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:41.466] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:41.466] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.466] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:41.880] <TB1> INFO: Expecting 2560 events.
[13:55:42.946] <TB1> INFO: 2560 events read in total (349ms).
[13:55:42.946] <TB1> INFO: Test took 1480ms.
[13:55:42.947] <TB1> INFO: The DUT currently contains the following objects:
[13:55:42.947] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:42.947] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:42.947] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:42.947] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:42.947] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.947] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.948] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.948] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.948] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.948] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:42.948] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:43.362] <TB1> INFO: Expecting 2560 events.
[13:55:44.433] <TB1> INFO: 2560 events read in total (354ms).
[13:55:44.434] <TB1> INFO: Test took 1486ms.
[13:55:44.434] <TB1> INFO: The DUT currently contains the following objects:
[13:55:44.434] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:44.434] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:44.434] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:44.434] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:44.435] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.435] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:44.850] <TB1> INFO: Expecting 2560 events.
[13:55:45.920] <TB1> INFO: 2560 events read in total (353ms).
[13:55:45.920] <TB1> INFO: Test took 1485ms.
[13:55:45.921] <TB1> INFO: The DUT currently contains the following objects:
[13:55:45.921] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:45.921] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:45.921] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:45.921] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:45.921] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:45.921] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:46.336] <TB1> INFO: Expecting 2560 events.
[13:55:47.407] <TB1> INFO: 2560 events read in total (354ms).
[13:55:47.407] <TB1> INFO: Test took 1486ms.
[13:55:47.408] <TB1> INFO: The DUT currently contains the following objects:
[13:55:47.408] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:47.408] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:47.408] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:47.408] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:47.408] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.408] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:47.823] <TB1> INFO: Expecting 2560 events.
[13:55:48.895] <TB1> INFO: 2560 events read in total (355ms).
[13:55:48.895] <TB1> INFO: Test took 1487ms.
[13:55:48.896] <TB1> INFO: The DUT currently contains the following objects:
[13:55:48.896] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:55:48.896] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:55:48.896] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:55:48.896] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:55:48.896] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.896] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.896] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.896] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.896] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.896] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.896] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:48.897] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:55:49.311] <TB1> INFO: Expecting 2560 events.
[13:55:50.382] <TB1> INFO: 2560 events read in total (355ms).
[13:55:50.382] <TB1> INFO: Test took 1485ms.
[13:55:50.387] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:55:50.800] <TB1> INFO: Expecting 655360 events.
[13:56:07.658] <TB1> INFO: 655360 events read in total (16142ms).
[13:56:07.669] <TB1> INFO: Expecting 655360 events.
[13:56:24.180] <TB1> INFO: 655360 events read in total (15982ms).
[13:56:24.193] <TB1> INFO: Expecting 655360 events.
[13:56:40.685] <TB1> INFO: 655360 events read in total (15964ms).
[13:56:40.700] <TB1> INFO: Expecting 655360 events.
[13:56:57.201] <TB1> INFO: 655360 events read in total (15973ms).
[13:56:57.225] <TB1> INFO: Expecting 655360 events.
[13:57:13.779] <TB1> INFO: 655360 events read in total (16026ms).
[13:57:13.805] <TB1> INFO: Expecting 655360 events.
[13:57:30.356] <TB1> INFO: 655360 events read in total (16022ms).
[13:57:30.383] <TB1> INFO: Expecting 655360 events.
[13:57:46.117] <TB1> INFO: 655360 events read in total (15206ms).
[13:57:46.149] <TB1> INFO: Expecting 655360 events.
[13:58:01.040] <TB1> INFO: 655360 events read in total (14363ms).
[13:58:01.074] <TB1> INFO: Expecting 655360 events.
[13:58:16.061] <TB1> INFO: 655360 events read in total (14459ms).
[13:58:16.102] <TB1> INFO: Expecting 655360 events.
[13:58:31.204] <TB1> INFO: 655360 events read in total (14574ms).
[13:58:31.253] <TB1> INFO: Expecting 655360 events.
[13:58:47.970] <TB1> INFO: 655360 events read in total (16189ms).
[13:58:48.024] <TB1> INFO: Expecting 655360 events.
[13:59:04.470] <TB1> INFO: 655360 events read in total (15918ms).
[13:59:04.519] <TB1> INFO: Expecting 655360 events.
[13:59:21.304] <TB1> INFO: 655360 events read in total (16257ms).
[13:59:21.367] <TB1> INFO: Expecting 655360 events.
[13:59:38.023] <TB1> INFO: 655360 events read in total (16127ms).
[13:59:38.091] <TB1> INFO: Expecting 655360 events.
[13:59:54.651] <TB1> INFO: 655360 events read in total (16032ms).
[13:59:54.720] <TB1> INFO: Expecting 655360 events.
[14:00:11.337] <TB1> INFO: 655360 events read in total (16089ms).
[14:00:11.399] <TB1> INFO: Test took 261012ms.
[14:00:11.480] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:11.788] <TB1> INFO: Expecting 655360 events.
[14:00:28.503] <TB1> INFO: 655360 events read in total (15997ms).
[14:00:28.512] <TB1> INFO: Expecting 655360 events.
[14:00:44.913] <TB1> INFO: 655360 events read in total (15873ms).
[14:00:44.928] <TB1> INFO: Expecting 655360 events.
[14:01:01.460] <TB1> INFO: 655360 events read in total (16004ms).
[14:01:01.476] <TB1> INFO: Expecting 655360 events.
[14:01:18.088] <TB1> INFO: 655360 events read in total (16084ms).
[14:01:18.107] <TB1> INFO: Expecting 655360 events.
[14:01:33.218] <TB1> INFO: 655360 events read in total (14583ms).
[14:01:33.244] <TB1> INFO: Expecting 655360 events.
[14:01:48.715] <TB1> INFO: 655360 events read in total (14943ms).
[14:01:48.742] <TB1> INFO: Expecting 655360 events.
[14:02:03.814] <TB1> INFO: 655360 events read in total (14544ms).
[14:02:03.845] <TB1> INFO: Expecting 655360 events.
[14:02:20.040] <TB1> INFO: 655360 events read in total (15667ms).
[14:02:20.077] <TB1> INFO: Expecting 655360 events.
[14:02:36.540] <TB1> INFO: 655360 events read in total (15935ms).
[14:02:36.581] <TB1> INFO: Expecting 655360 events.
[14:02:53.110] <TB1> INFO: 655360 events read in total (16001ms).
[14:02:53.163] <TB1> INFO: Expecting 655360 events.
[14:03:09.595] <TB1> INFO: 655360 events read in total (15904ms).
[14:03:09.641] <TB1> INFO: Expecting 655360 events.
[14:03:26.177] <TB1> INFO: 655360 events read in total (16008ms).
[14:03:26.236] <TB1> INFO: Expecting 655360 events.
[14:03:42.685] <TB1> INFO: 655360 events read in total (15920ms).
[14:03:42.744] <TB1> INFO: Expecting 655360 events.
[14:03:59.405] <TB1> INFO: 655360 events read in total (16133ms).
[14:03:59.468] <TB1> INFO: Expecting 655360 events.
[14:04:15.990] <TB1> INFO: 655360 events read in total (15993ms).
[14:04:16.048] <TB1> INFO: Expecting 655360 events.
[14:04:32.585] <TB1> INFO: 655360 events read in total (16009ms).
[14:04:32.651] <TB1> INFO: Test took 261171ms.
[14:04:32.852] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.860] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.868] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.875] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.882] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:04:32.890] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.897] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.905] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:04:32.914] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:04:32.922] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.929] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.937] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.944] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.951] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.958] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.965] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.972] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.980] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:32.987] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:04:33.043] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:04:33.043] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:04:33.043] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:04:33.044] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:04:33.045] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:04:33.045] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:04:33.045] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:04:33.045] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:04:33.367] <TB1> INFO: Expecting 41600 events.
[14:04:37.888] <TB1> INFO: 41600 events read in total (3804ms).
[14:04:37.888] <TB1> INFO: Test took 4838ms.
[14:04:38.484] <TB1> INFO: Expecting 41600 events.
[14:04:42.984] <TB1> INFO: 41600 events read in total (3783ms).
[14:04:42.984] <TB1> INFO: Test took 4854ms.
[14:04:43.545] <TB1> INFO: Expecting 41600 events.
[14:04:48.076] <TB1> INFO: 41600 events read in total (3814ms).
[14:04:48.077] <TB1> INFO: Test took 4855ms.
[14:04:48.307] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:48.441] <TB1> INFO: Expecting 2560 events.
[14:04:49.512] <TB1> INFO: 2560 events read in total (354ms).
[14:04:49.513] <TB1> INFO: Test took 1206ms.
[14:04:49.517] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:49.929] <TB1> INFO: Expecting 2560 events.
[14:04:51.000] <TB1> INFO: 2560 events read in total (353ms).
[14:04:51.000] <TB1> INFO: Test took 1483ms.
[14:04:51.003] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:51.416] <TB1> INFO: Expecting 2560 events.
[14:04:52.490] <TB1> INFO: 2560 events read in total (357ms).
[14:04:52.490] <TB1> INFO: Test took 1487ms.
[14:04:52.493] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:52.907] <TB1> INFO: Expecting 2560 events.
[14:04:53.979] <TB1> INFO: 2560 events read in total (355ms).
[14:04:53.980] <TB1> INFO: Test took 1487ms.
[14:04:53.983] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:54.397] <TB1> INFO: Expecting 2560 events.
[14:04:55.468] <TB1> INFO: 2560 events read in total (354ms).
[14:04:55.468] <TB1> INFO: Test took 1485ms.
[14:04:55.471] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:55.885] <TB1> INFO: Expecting 2560 events.
[14:04:56.957] <TB1> INFO: 2560 events read in total (355ms).
[14:04:56.957] <TB1> INFO: Test took 1486ms.
[14:04:56.960] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:57.374] <TB1> INFO: Expecting 2560 events.
[14:04:58.439] <TB1> INFO: 2560 events read in total (348ms).
[14:04:58.439] <TB1> INFO: Test took 1479ms.
[14:04:58.441] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:58.856] <TB1> INFO: Expecting 2560 events.
[14:04:59.920] <TB1> INFO: 2560 events read in total (347ms).
[14:04:59.920] <TB1> INFO: Test took 1479ms.
[14:04:59.922] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:00.337] <TB1> INFO: Expecting 2560 events.
[14:05:01.400] <TB1> INFO: 2560 events read in total (346ms).
[14:05:01.401] <TB1> INFO: Test took 1479ms.
[14:05:01.403] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:01.818] <TB1> INFO: Expecting 2560 events.
[14:05:02.882] <TB1> INFO: 2560 events read in total (348ms).
[14:05:02.883] <TB1> INFO: Test took 1480ms.
[14:05:02.885] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:03.299] <TB1> INFO: Expecting 2560 events.
[14:05:04.364] <TB1> INFO: 2560 events read in total (348ms).
[14:05:04.365] <TB1> INFO: Test took 1480ms.
[14:05:04.367] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:04.781] <TB1> INFO: Expecting 2560 events.
[14:05:05.847] <TB1> INFO: 2560 events read in total (349ms).
[14:05:05.848] <TB1> INFO: Test took 1481ms.
[14:05:05.851] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:06.265] <TB1> INFO: Expecting 2560 events.
[14:05:07.330] <TB1> INFO: 2560 events read in total (348ms).
[14:05:07.330] <TB1> INFO: Test took 1479ms.
[14:05:07.335] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:07.747] <TB1> INFO: Expecting 2560 events.
[14:05:08.812] <TB1> INFO: 2560 events read in total (348ms).
[14:05:08.812] <TB1> INFO: Test took 1477ms.
[14:05:08.815] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:09.229] <TB1> INFO: Expecting 2560 events.
[14:05:10.294] <TB1> INFO: 2560 events read in total (348ms).
[14:05:10.294] <TB1> INFO: Test took 1479ms.
[14:05:10.297] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:10.712] <TB1> INFO: Expecting 2560 events.
[14:05:11.777] <TB1> INFO: 2560 events read in total (348ms).
[14:05:11.778] <TB1> INFO: Test took 1481ms.
[14:05:11.780] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:12.194] <TB1> INFO: Expecting 2560 events.
[14:05:13.258] <TB1> INFO: 2560 events read in total (347ms).
[14:05:13.259] <TB1> INFO: Test took 1479ms.
[14:05:13.261] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:13.675] <TB1> INFO: Expecting 2560 events.
[14:05:14.740] <TB1> INFO: 2560 events read in total (348ms).
[14:05:14.740] <TB1> INFO: Test took 1479ms.
[14:05:14.743] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:15.157] <TB1> INFO: Expecting 2560 events.
[14:05:16.223] <TB1> INFO: 2560 events read in total (349ms).
[14:05:16.224] <TB1> INFO: Test took 1481ms.
[14:05:16.226] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:16.640] <TB1> INFO: Expecting 2560 events.
[14:05:17.705] <TB1> INFO: 2560 events read in total (348ms).
[14:05:17.706] <TB1> INFO: Test took 1480ms.
[14:05:17.709] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:18.122] <TB1> INFO: Expecting 2560 events.
[14:05:19.188] <TB1> INFO: 2560 events read in total (349ms).
[14:05:19.189] <TB1> INFO: Test took 1480ms.
[14:05:19.191] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:19.605] <TB1> INFO: Expecting 2560 events.
[14:05:20.672] <TB1> INFO: 2560 events read in total (350ms).
[14:05:20.672] <TB1> INFO: Test took 1481ms.
[14:05:20.675] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:21.089] <TB1> INFO: Expecting 2560 events.
[14:05:22.154] <TB1> INFO: 2560 events read in total (348ms).
[14:05:22.154] <TB1> INFO: Test took 1479ms.
[14:05:22.158] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:22.571] <TB1> INFO: Expecting 2560 events.
[14:05:23.635] <TB1> INFO: 2560 events read in total (348ms).
[14:05:23.635] <TB1> INFO: Test took 1477ms.
[14:05:23.638] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:24.053] <TB1> INFO: Expecting 2560 events.
[14:05:25.117] <TB1> INFO: 2560 events read in total (347ms).
[14:05:25.117] <TB1> INFO: Test took 1479ms.
[14:05:25.120] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:25.534] <TB1> INFO: Expecting 2560 events.
[14:05:26.600] <TB1> INFO: 2560 events read in total (349ms).
[14:05:26.602] <TB1> INFO: Test took 1482ms.
[14:05:26.604] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:27.018] <TB1> INFO: Expecting 2560 events.
[14:05:28.082] <TB1> INFO: 2560 events read in total (347ms).
[14:05:28.082] <TB1> INFO: Test took 1478ms.
[14:05:28.085] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:28.499] <TB1> INFO: Expecting 2560 events.
[14:05:29.564] <TB1> INFO: 2560 events read in total (348ms).
[14:05:29.564] <TB1> INFO: Test took 1479ms.
[14:05:29.567] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:29.981] <TB1> INFO: Expecting 2560 events.
[14:05:31.047] <TB1> INFO: 2560 events read in total (350ms).
[14:05:31.047] <TB1> INFO: Test took 1480ms.
[14:05:31.050] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:31.464] <TB1> INFO: Expecting 2560 events.
[14:05:32.527] <TB1> INFO: 2560 events read in total (347ms).
[14:05:32.527] <TB1> INFO: Test took 1477ms.
[14:05:32.531] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:32.944] <TB1> INFO: Expecting 2560 events.
[14:05:34.009] <TB1> INFO: 2560 events read in total (348ms).
[14:05:34.010] <TB1> INFO: Test took 1479ms.
[14:05:34.012] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:34.426] <TB1> INFO: Expecting 2560 events.
[14:05:35.490] <TB1> INFO: 2560 events read in total (347ms).
[14:05:35.490] <TB1> INFO: Test took 1478ms.
[14:05:36.149] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 624 seconds
[14:05:36.149] <TB1> INFO: PH scale (per ROC): 88 78 85 93 93 81 91 82 90 87 74 83 84 91 84 80
[14:05:36.149] <TB1> INFO: PH offset (per ROC): 134 163 154 144 150 144 135 164 172 166 163 155 148 161 149 157
[14:05:36.328] <TB1> INFO: ######################################################################
[14:05:36.328] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:05:36.328] <TB1> INFO: ######################################################################
[14:05:36.339] <TB1> INFO: scanning low vcal = 10
[14:05:36.647] <TB1> INFO: Expecting 41600 events.
[14:05:40.198] <TB1> INFO: 41600 events read in total (2834ms).
[14:05:40.198] <TB1> INFO: Test took 3859ms.
[14:05:40.202] <TB1> INFO: scanning low vcal = 20
[14:05:40.615] <TB1> INFO: Expecting 41600 events.
[14:05:44.177] <TB1> INFO: 41600 events read in total (2845ms).
[14:05:44.177] <TB1> INFO: Test took 3975ms.
[14:05:44.180] <TB1> INFO: scanning low vcal = 30
[14:05:44.594] <TB1> INFO: Expecting 41600 events.
[14:05:48.167] <TB1> INFO: 41600 events read in total (2856ms).
[14:05:48.168] <TB1> INFO: Test took 3988ms.
[14:05:48.171] <TB1> INFO: scanning low vcal = 40
[14:05:48.578] <TB1> INFO: Expecting 41600 events.
[14:05:52.675] <TB1> INFO: 41600 events read in total (3380ms).
[14:05:52.675] <TB1> INFO: Test took 4504ms.
[14:05:52.679] <TB1> INFO: scanning low vcal = 50
[14:05:53.022] <TB1> INFO: Expecting 41600 events.
[14:05:57.077] <TB1> INFO: 41600 events read in total (3338ms).
[14:05:57.078] <TB1> INFO: Test took 4399ms.
[14:05:57.082] <TB1> INFO: scanning low vcal = 60
[14:05:57.436] <TB1> INFO: Expecting 41600 events.
[14:06:01.515] <TB1> INFO: 41600 events read in total (3362ms).
[14:06:01.515] <TB1> INFO: Test took 4433ms.
[14:06:01.519] <TB1> INFO: scanning low vcal = 70
[14:06:01.875] <TB1> INFO: Expecting 41600 events.
[14:06:05.977] <TB1> INFO: 41600 events read in total (3385ms).
[14:06:05.978] <TB1> INFO: Test took 4459ms.
[14:06:05.981] <TB1> INFO: scanning low vcal = 80
[14:06:06.329] <TB1> INFO: Expecting 41600 events.
[14:06:10.439] <TB1> INFO: 41600 events read in total (3393ms).
[14:06:10.440] <TB1> INFO: Test took 4459ms.
[14:06:10.443] <TB1> INFO: scanning low vcal = 90
[14:06:10.775] <TB1> INFO: Expecting 41600 events.
[14:06:14.936] <TB1> INFO: 41600 events read in total (3444ms).
[14:06:14.937] <TB1> INFO: Test took 4494ms.
[14:06:14.940] <TB1> INFO: scanning low vcal = 100
[14:06:15.295] <TB1> INFO: Expecting 41600 events.
[14:06:19.340] <TB1> INFO: 41600 events read in total (3329ms).
[14:06:19.341] <TB1> INFO: Test took 4401ms.
[14:06:19.345] <TB1> INFO: scanning low vcal = 110
[14:06:19.684] <TB1> INFO: Expecting 41600 events.
[14:06:23.753] <TB1> INFO: 41600 events read in total (3352ms).
[14:06:23.753] <TB1> INFO: Test took 4408ms.
[14:06:23.757] <TB1> INFO: scanning low vcal = 120
[14:06:24.111] <TB1> INFO: Expecting 41600 events.
[14:06:28.193] <TB1> INFO: 41600 events read in total (3364ms).
[14:06:28.194] <TB1> INFO: Test took 4437ms.
[14:06:28.197] <TB1> INFO: scanning low vcal = 130
[14:06:28.540] <TB1> INFO: Expecting 41600 events.
[14:06:32.607] <TB1> INFO: 41600 events read in total (3350ms).
[14:06:32.608] <TB1> INFO: Test took 4411ms.
[14:06:32.612] <TB1> INFO: scanning low vcal = 140
[14:06:32.968] <TB1> INFO: Expecting 41600 events.
[14:06:37.218] <TB1> INFO: 41600 events read in total (3534ms).
[14:06:37.219] <TB1> INFO: Test took 4607ms.
[14:06:37.223] <TB1> INFO: scanning low vcal = 150
[14:06:37.569] <TB1> INFO: Expecting 41600 events.
[14:06:41.616] <TB1> INFO: 41600 events read in total (3330ms).
[14:06:41.617] <TB1> INFO: Test took 4394ms.
[14:06:41.621] <TB1> INFO: scanning low vcal = 160
[14:06:41.960] <TB1> INFO: Expecting 41600 events.
[14:06:46.180] <TB1> INFO: 41600 events read in total (3503ms).
[14:06:46.180] <TB1> INFO: Test took 4559ms.
[14:06:46.184] <TB1> INFO: scanning low vcal = 170
[14:06:46.533] <TB1> INFO: Expecting 41600 events.
[14:06:50.738] <TB1> INFO: 41600 events read in total (3488ms).
[14:06:50.738] <TB1> INFO: Test took 4554ms.
[14:06:50.743] <TB1> INFO: scanning low vcal = 180
[14:06:51.097] <TB1> INFO: Expecting 41600 events.
[14:06:55.357] <TB1> INFO: 41600 events read in total (3543ms).
[14:06:55.358] <TB1> INFO: Test took 4615ms.
[14:06:55.361] <TB1> INFO: scanning low vcal = 190
[14:06:55.700] <TB1> INFO: Expecting 41600 events.
[14:06:59.945] <TB1> INFO: 41600 events read in total (3528ms).
[14:06:59.945] <TB1> INFO: Test took 4584ms.
[14:06:59.949] <TB1> INFO: scanning low vcal = 200
[14:07:00.294] <TB1> INFO: Expecting 41600 events.
[14:07:04.480] <TB1> INFO: 41600 events read in total (3469ms).
[14:07:04.481] <TB1> INFO: Test took 4532ms.
[14:07:04.485] <TB1> INFO: scanning low vcal = 210
[14:07:04.840] <TB1> INFO: Expecting 41600 events.
[14:07:09.038] <TB1> INFO: 41600 events read in total (3480ms).
[14:07:09.039] <TB1> INFO: Test took 4554ms.
[14:07:09.042] <TB1> INFO: scanning low vcal = 220
[14:07:09.393] <TB1> INFO: Expecting 41600 events.
[14:07:13.557] <TB1> INFO: 41600 events read in total (3446ms).
[14:07:13.557] <TB1> INFO: Test took 4515ms.
[14:07:13.560] <TB1> INFO: scanning low vcal = 230
[14:07:13.913] <TB1> INFO: Expecting 41600 events.
[14:07:18.124] <TB1> INFO: 41600 events read in total (3494ms).
[14:07:18.125] <TB1> INFO: Test took 4564ms.
[14:07:18.128] <TB1> INFO: scanning low vcal = 240
[14:07:18.481] <TB1> INFO: Expecting 41600 events.
[14:07:22.698] <TB1> INFO: 41600 events read in total (3500ms).
[14:07:22.698] <TB1> INFO: Test took 4569ms.
[14:07:22.702] <TB1> INFO: scanning low vcal = 250
[14:07:23.057] <TB1> INFO: Expecting 41600 events.
[14:07:27.302] <TB1> INFO: 41600 events read in total (3528ms).
[14:07:27.303] <TB1> INFO: Test took 4601ms.
[14:07:27.309] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[14:07:27.656] <TB1> INFO: Expecting 41600 events.
[14:07:31.907] <TB1> INFO: 41600 events read in total (3534ms).
[14:07:31.908] <TB1> INFO: Test took 4599ms.
[14:07:31.912] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[14:07:32.261] <TB1> INFO: Expecting 41600 events.
[14:07:36.492] <TB1> INFO: 41600 events read in total (3515ms).
[14:07:36.493] <TB1> INFO: Test took 4581ms.
[14:07:36.497] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[14:07:36.847] <TB1> INFO: Expecting 41600 events.
[14:07:41.089] <TB1> INFO: 41600 events read in total (3525ms).
[14:07:41.090] <TB1> INFO: Test took 4593ms.
[14:07:41.093] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[14:07:41.438] <TB1> INFO: Expecting 41600 events.
[14:07:45.810] <TB1> INFO: 41600 events read in total (3655ms).
[14:07:45.811] <TB1> INFO: Test took 4718ms.
[14:07:45.815] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:07:46.155] <TB1> INFO: Expecting 41600 events.
[14:07:50.465] <TB1> INFO: 41600 events read in total (3593ms).
[14:07:50.465] <TB1> INFO: Test took 4650ms.
[14:07:50.921] <TB1> INFO: PixTestGainPedestal::measure() done
[14:08:23.499] <TB1> INFO: PixTestGainPedestal::fit() done
[14:08:23.499] <TB1> INFO: non-linearity mean: 0.957 0.954 0.955 0.962 0.958 0.956 0.960 0.950 0.950 0.951 0.956 0.963 0.951 0.958 0.948 0.956
[14:08:23.499] <TB1> INFO: non-linearity RMS: 0.006 0.006 0.005 0.004 0.006 0.005 0.005 0.007 0.006 0.007 0.006 0.007 0.006 0.005 0.006 0.006
[14:08:23.499] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:08:23.518] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:08:23.537] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:08:23.556] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:08:23.574] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:08:23.594] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:08:23.612] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:08:23.631] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:08:23.659] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:08:23.681] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:08:23.700] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:08:23.719] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:08:23.738] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:08:23.756] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:08:23.775] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:08:23.794] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:08:23.813] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[14:08:23.819] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C15.dat
[14:08:23.820] <TB1> INFO: PixTestReadback::doTest() start.
[14:08:23.821] <TB1> INFO: PixTestReadback::RES sent once
[14:08:35.203] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C0.dat
[14:08:35.204] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C1.dat
[14:08:35.204] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C2.dat
[14:08:35.204] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C3.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C4.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C5.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C6.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C7.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C8.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C9.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C10.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C11.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C12.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C13.dat
[14:08:35.205] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C14.dat
[14:08:35.206] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C15.dat
[14:08:35.256] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:08:35.256] <TB1> INFO: PixTestReadback::RES sent once
[14:08:46.574] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C0.dat
[14:08:46.574] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C1.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C2.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C3.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C4.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C5.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C6.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C7.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C8.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C9.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C10.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C11.dat
[14:08:46.575] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C12.dat
[14:08:46.576] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C13.dat
[14:08:46.576] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C14.dat
[14:08:46.576] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C15.dat
[14:08:46.623] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:08:46.624] <TB1> INFO: PixTestReadback::RES sent once
[14:08:55.310] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:08:55.310] <TB1> INFO: Vbg will be calibrated using Vd calibration
[14:08:55.310] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 148.8calibrated Vbg = 1.18612 :::*/*/*/*/
[14:08:55.310] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 161.1calibrated Vbg = 1.18866 :::*/*/*/*/
[14:08:55.310] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 142.1calibrated Vbg = 1.18579 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 152.3calibrated Vbg = 1.19768 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156.1calibrated Vbg = 1.19524 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.5calibrated Vbg = 1.20268 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 150.6calibrated Vbg = 1.20442 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156.6calibrated Vbg = 1.20303 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151calibrated Vbg = 1.20357 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.4calibrated Vbg = 1.20193 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.7calibrated Vbg = 1.20595 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.4calibrated Vbg = 1.20659 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.2calibrated Vbg = 1.197 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 164.2calibrated Vbg = 1.19436 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153.5calibrated Vbg = 1.19982 :::*/*/*/*/
[14:08:55.311] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 146.1calibrated Vbg = 1.19144 :::*/*/*/*/
[14:08:55.314] <TB1> INFO: PixTestReadback::RES sent once
[14:11:50.927] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C0.dat
[14:11:50.927] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C1.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C2.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C3.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C4.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C5.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C6.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C7.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C8.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C9.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C10.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C11.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C12.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C13.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C14.dat
[14:11:50.928] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//002_FulltestPxar_m20//readbackCal_C15.dat
[14:11:50.973] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:11:50.974] <TB1> INFO: PixTestReadback::doTest() done
[14:11:50.990] <TB1> INFO: enter test to run
[14:11:50.990] <TB1> INFO: test: exit no parameter change
[14:11:51.605] <TB1> QUIET: Connection to board 153 closed.
[14:11:51.686] <TB1> INFO: pXar: this is the end, my friend