[09:14:47.726] <TB1> INFO: *** Welcome to pxar ***
[09:14:47.726] <TB1> INFO: *** Today: 2015/08/31
[09:14:47.726] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C15.dat
[09:14:47.726] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:14:47.726] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//defaultMaskFile.dat
[09:14:47.726] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters_C15.dat
[09:14:47.814] <TB1> INFO: clk: 4
[09:14:47.814] <TB1> INFO: ctr: 4
[09:14:47.814] <TB1> INFO: sda: 19
[09:14:47.814] <TB1> INFO: tin: 9
[09:14:47.814] <TB1> INFO: level: 15
[09:14:47.814] <TB1> INFO: triggerdelay: 0
[09:14:47.814] <TB1> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[09:14:47.814] <TB1> INFO: Log level: INFO
[09:14:47.821] <TB1> INFO: Found DTB DTB_WXBYFL
[09:14:47.834] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[09:14:47.838] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[09:14:47.840] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[09:14:49.386] <TB1> INFO: DUT info:
[09:14:49.386] <TB1> INFO: The DUT currently contains the following objects:
[09:14:49.386] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:14:49.386] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:14:49.386] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:14:49.386] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:14:49.386] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.386] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:14:49.787] <TB1> INFO: enter 'restricted' command line mode
[09:14:49.787] <TB1> INFO: enter test to run
[09:14:49.788] <TB1> INFO: test: pretest no parameter change
[09:14:49.788] <TB1> INFO: running: pretest
[09:14:49.794] <TB1> INFO: ######################################################################
[09:14:49.795] <TB1> INFO: PixTestPretest::doTest()
[09:14:49.795] <TB1> INFO: ######################################################################
[09:14:49.797] <TB1> INFO: ----------------------------------------------------------------------
[09:14:49.797] <TB1> INFO: PixTestPretest::programROC()
[09:14:49.797] <TB1> INFO: ----------------------------------------------------------------------
[09:15:07.819] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:15:07.819] <TB1> INFO: IA differences per ROC: 19.3 18.5 17.7 16.9 18.5 20.1 19.3 18.5 19.3 18.5 18.5 20.1 21.7 18.5 19.3 18.5
[09:15:07.907] <TB1> INFO: ----------------------------------------------------------------------
[09:15:07.907] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:15:07.907] <TB1> INFO: ----------------------------------------------------------------------
[09:15:11.195] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 377 mA = 23.5625 mA/ROC
[09:15:11.198] <TB1> INFO: ----------------------------------------------------------------------
[09:15:11.198] <TB1> INFO: PixTestPretest::findTiming()
[09:15:11.198] <TB1> INFO: ----------------------------------------------------------------------
[09:15:11.198] <TB1> INFO: PixTestCmd::init()

[09:17:00.989] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 3, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[09:17:00.989] <TB1> INFO: (success/tries = 100/100), width = 4
[09:17:00.992] <TB1> INFO: ----------------------------------------------------------------------
[09:17:00.992] <TB1> INFO: PixTestPretest::findWorkingPixel()
[09:17:00.992] <TB1> INFO: ----------------------------------------------------------------------
[09:17:01.131] <TB1> INFO: Expecting 231680 events.
[09:17:09.949] <TB1> INFO: 231680 events read in total (8100ms).
[09:17:09.954] <TB1> INFO: Test took 8959ms.
[09:17:10.267] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:17:10.318] <TB1> INFO: ----------------------------------------------------------------------
[09:17:10.318] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[09:17:10.318] <TB1> INFO: ----------------------------------------------------------------------
[09:17:10.459] <TB1> INFO: Expecting 231680 events.
[09:17:19.769] <TB1> INFO: 231680 events read in total (8594ms).
[09:17:19.773] <TB1> INFO: Test took 9448ms.
[09:17:20.150] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[09:17:20.150] <TB1> INFO: CalDel: 157 137 141 142 127 131 153 133 131 139 171 186 166 126 154 149
[09:17:20.150] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:17:20.154] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C0.dat
[09:17:20.154] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C1.dat
[09:17:20.154] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C2.dat
[09:17:20.155] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C3.dat
[09:17:20.155] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C4.dat
[09:17:20.155] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C5.dat
[09:17:20.155] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C6.dat
[09:17:20.156] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C7.dat
[09:17:20.156] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C8.dat
[09:17:20.156] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C9.dat
[09:17:20.157] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C10.dat
[09:17:20.157] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C11.dat
[09:17:20.157] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C12.dat
[09:17:20.157] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C13.dat
[09:17:20.158] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C14.dat
[09:17:20.158] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters_C15.dat
[09:17:20.158] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//tbmParameters_C0a.dat
[09:17:20.158] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:17:20.159] <TB1> INFO: PixTestPretest::doTest() done, duration: 150 seconds
[09:17:20.228] <TB1> INFO: enter test to run
[09:17:20.228] <TB1> INFO: test: fulltest no parameter change
[09:17:20.228] <TB1> INFO: running: fulltest
[09:17:20.228] <TB1> INFO: ######################################################################
[09:17:20.228] <TB1> INFO: PixTestFullTest::doTest()
[09:17:20.228] <TB1> INFO: ######################################################################
[09:17:20.229] <TB1> INFO: ######################################################################
[09:17:20.229] <TB1> INFO: PixTestAlive::doTest()
[09:17:20.230] <TB1> INFO: ######################################################################
[09:17:20.231] <TB1> INFO: ----------------------------------------------------------------------
[09:17:20.231] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:17:20.231] <TB1> INFO: ----------------------------------------------------------------------
[09:17:20.552] <TB1> INFO: Expecting 41600 events.
[09:17:25.023] <TB1> INFO: 41600 events read in total (3754ms).
[09:17:25.023] <TB1> INFO: Test took 4790ms.
[09:17:25.031] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:25.332] <TB1> INFO: PixTestAlive::aliveTest() done
[09:17:25.332] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:17:25.335] <TB1> INFO: ----------------------------------------------------------------------
[09:17:25.335] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:17:25.335] <TB1> INFO: ----------------------------------------------------------------------
[09:17:25.655] <TB1> INFO: Expecting 41600 events.
[09:17:28.833] <TB1> INFO: 41600 events read in total (2461ms).
[09:17:28.834] <TB1> INFO: Test took 3497ms.
[09:17:28.834] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:28.834] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:17:29.163] <TB1> INFO: PixTestAlive::maskTest() done
[09:17:29.163] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:17:29.167] <TB1> INFO: ----------------------------------------------------------------------
[09:17:29.167] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:17:29.167] <TB1> INFO: ----------------------------------------------------------------------
[09:17:29.478] <TB1> INFO: Expecting 41600 events.
[09:17:33.917] <TB1> INFO: 41600 events read in total (3722ms).
[09:17:33.917] <TB1> INFO: Test took 4748ms.
[09:17:33.923] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:34.229] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[09:17:34.230] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:17:34.230] <TB1> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[09:17:34.240] <TB1> INFO: ######################################################################
[09:17:34.240] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:17:34.240] <TB1> INFO: ######################################################################
[09:17:34.244] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[09:17:34.255] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[09:17:34.256] <TB1> INFO: run 1 of 1
[09:17:34.565] <TB1> INFO: Expecting 3120000 events.
[09:18:10.027] <TB1> INFO: 836850 events read in total (34745ms).
[09:18:44.084] <TB1> INFO: 1660760 events read in total (68802ms).
[09:19:18.693] <TB1> INFO: 2495480 events read in total (103412ms).
[09:19:44.423] <TB1> INFO: 3120000 events read in total (129141ms).
[09:19:44.474] <TB1> INFO: Test took 130218ms.
[09:19:44.584] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:06.261] <TB1> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[09:20:06.261] <TB1> INFO: number of dead bumps (per ROC): 4 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1
[09:20:06.261] <TB1> INFO: separation cut (per ROC): 70 75 72 73 77 74 70 77 77 66 91 68 70 73 67 72
[09:20:06.331] <TB1> INFO: ######################################################################
[09:20:06.331] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:20:06.331] <TB1> INFO: ######################################################################
[09:20:06.332] <TB1> INFO: ----------------------------------------------------------------------
[09:20:06.332] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:20:06.332] <TB1> INFO: ----------------------------------------------------------------------
[09:20:06.332] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[09:20:06.340] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[09:20:06.340] <TB1> INFO: run 1 of 1
[09:20:06.651] <TB1> INFO: Expecting 31200000 events.
[09:20:31.145] <TB1> INFO: 916700 events read in total (23777ms).
[09:20:52.636] <TB1> INFO: 1819600 events read in total (45268ms).
[09:21:14.112] <TB1> INFO: 2720250 events read in total (66744ms).
[09:21:37.926] <TB1> INFO: 3622200 events read in total (90558ms).
[09:22:01.687] <TB1> INFO: 4522050 events read in total (114319ms).
[09:22:25.360] <TB1> INFO: 5421550 events read in total (137992ms).
[09:22:49.102] <TB1> INFO: 6319550 events read in total (161734ms).
[09:23:12.655] <TB1> INFO: 7218550 events read in total (185287ms).
[09:23:36.379] <TB1> INFO: 8114400 events read in total (209011ms).
[09:24:00.155] <TB1> INFO: 9011750 events read in total (232787ms).
[09:24:24.132] <TB1> INFO: 9907850 events read in total (256764ms).
[09:24:48.002] <TB1> INFO: 10806050 events read in total (280634ms).
[09:25:12.056] <TB1> INFO: 11702100 events read in total (304688ms).
[09:25:36.008] <TB1> INFO: 12598050 events read in total (328640ms).
[09:25:59.965] <TB1> INFO: 13492400 events read in total (352597ms).
[09:26:23.866] <TB1> INFO: 14389300 events read in total (376498ms).
[09:26:47.760] <TB1> INFO: 15283400 events read in total (400392ms).
[09:27:11.761] <TB1> INFO: 16173100 events read in total (424393ms).
[09:27:35.740] <TB1> INFO: 17061100 events read in total (448372ms).
[09:27:59.619] <TB1> INFO: 17947100 events read in total (472251ms).
[09:28:23.462] <TB1> INFO: 18836100 events read in total (496094ms).
[09:28:47.183] <TB1> INFO: 19718700 events read in total (519815ms).
[09:29:11.164] <TB1> INFO: 20605650 events read in total (543796ms).
[09:29:34.882] <TB1> INFO: 21487350 events read in total (567514ms).
[09:29:58.727] <TB1> INFO: 22372600 events read in total (591359ms).
[09:30:22.405] <TB1> INFO: 23254950 events read in total (615037ms).
[09:30:46.210] <TB1> INFO: 24140350 events read in total (638842ms).
[09:31:09.965] <TB1> INFO: 25020150 events read in total (662597ms).
[09:31:33.836] <TB1> INFO: 25905150 events read in total (686468ms).
[09:31:57.647] <TB1> INFO: 26786100 events read in total (710279ms).
[09:32:21.423] <TB1> INFO: 27671800 events read in total (734055ms).
[09:32:45.354] <TB1> INFO: 28554950 events read in total (757986ms).
[09:33:09.409] <TB1> INFO: 29441200 events read in total (782041ms).
[09:33:33.308] <TB1> INFO: 30327000 events read in total (805940ms).
[09:33:56.470] <TB1> INFO: 31200000 events read in total (829102ms).
[09:33:56.507] <TB1> INFO: Test took 830167ms.
[09:33:56.602] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:56.730] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:33:58.535] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:00.321] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:02.155] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:03.895] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:05.585] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:07.381] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:09.196] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:10.975] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:12.782] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:14.645] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:16.395] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:18.255] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:20.084] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:21.879] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:23.718] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:34:25.423] <TB1> INFO: PixTestScurves::scurves() done
[09:34:25.423] <TB1> INFO: Vcal mean: 85.13 89.79 79.27 83.70 85.65 80.39 79.10 88.72 80.92 74.40 99.65 76.53 79.74 79.15 70.17 76.41
[09:34:25.423] <TB1> INFO: Vcal RMS: 5.31 5.41 4.49 4.79 5.29 5.01 4.48 5.85 4.60 4.28 5.38 4.07 4.59 4.71 4.56 4.81
[09:34:25.423] <TB1> INFO: PixTestScurves::fullTest() done, duration: 859 seconds
[09:34:25.494] <TB1> INFO: ######################################################################
[09:34:25.494] <TB1> INFO: PixTestTrim::doTest()
[09:34:25.494] <TB1> INFO: ######################################################################
[09:34:25.496] <TB1> INFO: ----------------------------------------------------------------------
[09:34:25.496] <TB1> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[09:34:25.496] <TB1> INFO: ----------------------------------------------------------------------
[09:34:25.601] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:34:25.601] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:34:25.611] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:34:25.611] <TB1> INFO: run 1 of 1
[09:34:25.951] <TB1> INFO: Expecting 13312000 events.
[09:34:53.373] <TB1> INFO: 1093600 events read in total (26704ms).
[09:35:18.836] <TB1> INFO: 2182420 events read in total (52167ms).
[09:35:44.558] <TB1> INFO: 3267420 events read in total (77889ms).
[09:36:10.536] <TB1> INFO: 4350160 events read in total (103867ms).
[09:36:36.257] <TB1> INFO: 5427140 events read in total (129588ms).
[09:37:04.114] <TB1> INFO: 6503420 events read in total (157445ms).
[09:37:31.952] <TB1> INFO: 7585000 events read in total (185283ms).
[09:37:59.930] <TB1> INFO: 8667800 events read in total (213261ms).
[09:38:27.888] <TB1> INFO: 9751400 events read in total (241219ms).
[09:38:55.909] <TB1> INFO: 10837380 events read in total (269240ms).
[09:39:23.812] <TB1> INFO: 11922340 events read in total (297143ms).
[09:39:51.725] <TB1> INFO: 13010480 events read in total (325056ms).
[09:39:59.821] <TB1> INFO: 13312000 events read in total (333152ms).
[09:39:59.854] <TB1> INFO: Test took 334243ms.
[09:39:59.908] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:18.925] <TB1> INFO: ROC 0 VthrComp = 90
[09:40:18.926] <TB1> INFO: ROC 1 VthrComp = 94
[09:40:18.926] <TB1> INFO: ROC 2 VthrComp = 86
[09:40:18.926] <TB1> INFO: ROC 3 VthrComp = 90
[09:40:18.926] <TB1> INFO: ROC 4 VthrComp = 92
[09:40:18.927] <TB1> INFO: ROC 5 VthrComp = 86
[09:40:18.927] <TB1> INFO: ROC 6 VthrComp = 86
[09:40:18.927] <TB1> INFO: ROC 7 VthrComp = 93
[09:40:18.927] <TB1> INFO: ROC 8 VthrComp = 88
[09:40:18.927] <TB1> INFO: ROC 9 VthrComp = 79
[09:40:18.927] <TB1> INFO: ROC 10 VthrComp = 101
[09:40:18.928] <TB1> INFO: ROC 11 VthrComp = 78
[09:40:18.928] <TB1> INFO: ROC 12 VthrComp = 85
[09:40:18.928] <TB1> INFO: ROC 13 VthrComp = 84
[09:40:18.928] <TB1> INFO: ROC 14 VthrComp = 76
[09:40:18.928] <TB1> INFO: ROC 15 VthrComp = 79
[09:40:18.928] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:40:18.928] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:40:18.939] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:40:18.939] <TB1> INFO: run 1 of 1
[09:40:19.251] <TB1> INFO: Expecting 13312000 events.
[09:40:44.700] <TB1> INFO: 779340 events read in total (24732ms).
[09:41:07.698] <TB1> INFO: 1555020 events read in total (47730ms).
[09:41:32.739] <TB1> INFO: 2329860 events read in total (72771ms).
[09:41:57.704] <TB1> INFO: 3104680 events read in total (97736ms).
[09:42:22.767] <TB1> INFO: 3879480 events read in total (122799ms).
[09:42:45.288] <TB1> INFO: 4654780 events read in total (145320ms).
[09:43:10.430] <TB1> INFO: 5429680 events read in total (170462ms).
[09:43:35.471] <TB1> INFO: 6205020 events read in total (195503ms).
[09:44:00.237] <TB1> INFO: 6977600 events read in total (220269ms).
[09:44:24.977] <TB1> INFO: 7746480 events read in total (245009ms).
[09:44:49.868] <TB1> INFO: 8514300 events read in total (269900ms).
[09:45:14.795] <TB1> INFO: 9280800 events read in total (294827ms).
[09:45:39.555] <TB1> INFO: 10046700 events read in total (319587ms).
[09:46:04.523] <TB1> INFO: 10812220 events read in total (344555ms).
[09:46:29.292] <TB1> INFO: 11576740 events read in total (369324ms).
[09:46:54.114] <TB1> INFO: 12342300 events read in total (394146ms).
[09:47:19.057] <TB1> INFO: 13108860 events read in total (419089ms).
[09:47:25.794] <TB1> INFO: 13312000 events read in total (425826ms).
[09:47:25.837] <TB1> INFO: Test took 426898ms.
[09:47:25.977] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:49.430] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 59.5135 for pixel 5/13 mean/min/max = 45.9481/32.2899/59.6064
[09:47:49.430] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 57.3361 for pixel 0/25 mean/min/max = 44.7968/31.8557/57.7379
[09:47:49.430] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.1264 for pixel 14/55 mean/min/max = 44.3742/31.5213/57.2271
[09:47:49.431] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 56.9909 for pixel 50/74 mean/min/max = 44.6222/32.2223/57.022
[09:47:49.431] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.84 for pixel 22/68 mean/min/max = 45.5509/32.1274/58.9743
[09:47:49.431] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.7895 for pixel 30/79 mean/min/max = 45.0743/31.2603/58.8883
[09:47:49.431] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 56.7125 for pixel 51/79 mean/min/max = 44.2136/31.6179/56.8094
[09:47:49.432] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.4352 for pixel 23/65 mean/min/max = 46.2186/31.8736/60.5637
[09:47:49.432] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 57.8367 for pixel 18/79 mean/min/max = 45.3512/32.7199/57.9826
[09:47:49.432] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 57.9692 for pixel 31/79 mean/min/max = 46.3314/34.4223/58.2404
[09:47:49.432] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 59.5352 for pixel 8/55 mean/min/max = 46.001/32.4372/59.5649
[09:47:49.433] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.7852 for pixel 21/4 mean/min/max = 46.8497/34.8728/58.8266
[09:47:49.433] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 58.7379 for pixel 3/3 mean/min/max = 45.3584/31.9171/58.7997
[09:47:49.433] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 59.0241 for pixel 0/70 mean/min/max = 45.6306/32.1432/59.1181
[09:47:49.434] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 56.7962 for pixel 0/1 mean/min/max = 45.4563/34.038/56.8747
[09:47:49.434] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 61.6785 for pixel 0/54 mean/min/max = 47.9406/34.1719/61.7093
[09:47:49.434] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:49.567] <TB1> INFO: Expecting 1029120 events.
[09:48:12.699] <TB1> INFO: 1029120 events read in total (22415ms).
[09:48:12.703] <TB1> INFO: Expecting 1029120 events.
[09:48:34.376] <TB1> INFO: 1029120 events read in total (21121ms).
[09:48:34.383] <TB1> INFO: Expecting 1029120 events.
[09:48:58.384] <TB1> INFO: 1029120 events read in total (23458ms).
[09:48:58.393] <TB1> INFO: Expecting 1029120 events.
[09:49:22.129] <TB1> INFO: 1029120 events read in total (23199ms).
[09:49:22.141] <TB1> INFO: Expecting 1029120 events.
[09:49:45.977] <TB1> INFO: 1029120 events read in total (23306ms).
[09:49:45.991] <TB1> INFO: Expecting 1029120 events.
[09:50:10.077] <TB1> INFO: 1029120 events read in total (23557ms).
[09:50:10.094] <TB1> INFO: Expecting 1029120 events.
[09:50:33.798] <TB1> INFO: 1029120 events read in total (23176ms).
[09:50:33.816] <TB1> INFO: Expecting 1029120 events.
[09:50:55.736] <TB1> INFO: 1029120 events read in total (21387ms).
[09:50:55.754] <TB1> INFO: Expecting 1029120 events.
[09:51:19.314] <TB1> INFO: 1029120 events read in total (23032ms).
[09:51:19.336] <TB1> INFO: Expecting 1029120 events.
[09:51:42.871] <TB1> INFO: 1029120 events read in total (23006ms).
[09:51:42.892] <TB1> INFO: Expecting 1029120 events.
[09:52:06.728] <TB1> INFO: 1029120 events read in total (23301ms).
[09:52:06.752] <TB1> INFO: Expecting 1029120 events.
[09:52:30.567] <TB1> INFO: 1029120 events read in total (23287ms).
[09:52:30.594] <TB1> INFO: Expecting 1029120 events.
[09:52:54.535] <TB1> INFO: 1029120 events read in total (23413ms).
[09:52:54.565] <TB1> INFO: Expecting 1029120 events.
[09:53:18.349] <TB1> INFO: 1029120 events read in total (23255ms).
[09:53:18.385] <TB1> INFO: Expecting 1029120 events.
[09:53:42.195] <TB1> INFO: 1029120 events read in total (23282ms).
[09:53:42.227] <TB1> INFO: Expecting 1029120 events.
[09:54:06.100] <TB1> INFO: 1029120 events read in total (23345ms).
[09:54:06.134] <TB1> INFO: Test took 376700ms.
[09:54:07.131] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:54:07.140] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:54:07.140] <TB1> INFO: run 1 of 1
[09:54:07.448] <TB1> INFO: Expecting 16640000 events.
[09:54:32.618] <TB1> INFO: 724620 events read in total (24453ms).
[09:54:56.858] <TB1> INFO: 1446040 events read in total (48693ms).
[09:55:21.360] <TB1> INFO: 2167700 events read in total (73195ms).
[09:55:45.783] <TB1> INFO: 2889740 events read in total (97618ms).
[09:56:10.254] <TB1> INFO: 3610760 events read in total (122089ms).
[09:56:34.702] <TB1> INFO: 4331800 events read in total (146537ms).
[09:56:59.315] <TB1> INFO: 5053700 events read in total (171150ms).
[09:57:23.869] <TB1> INFO: 5776140 events read in total (195704ms).
[09:57:48.410] <TB1> INFO: 6497660 events read in total (220245ms).
[09:58:12.570] <TB1> INFO: 7219240 events read in total (244405ms).
[09:58:36.945] <TB1> INFO: 7941160 events read in total (268780ms).
[09:59:01.303] <TB1> INFO: 8660740 events read in total (293138ms).
[09:59:25.649] <TB1> INFO: 9377460 events read in total (317484ms).
[09:59:50.098] <TB1> INFO: 10093900 events read in total (341933ms).
[10:00:14.486] <TB1> INFO: 10809280 events read in total (366321ms).
[10:00:38.902] <TB1> INFO: 11524700 events read in total (390737ms).
[10:01:03.227] <TB1> INFO: 12239620 events read in total (415062ms).
[10:01:27.474] <TB1> INFO: 12953680 events read in total (439309ms).
[10:01:51.922] <TB1> INFO: 13667860 events read in total (463757ms).
[10:02:16.331] <TB1> INFO: 14381440 events read in total (488166ms).
[10:02:40.504] <TB1> INFO: 15096020 events read in total (512339ms).
[10:03:05.013] <TB1> INFO: 15809940 events read in total (536848ms).
[10:03:29.396] <TB1> INFO: 16525440 events read in total (561231ms).
[10:03:33.712] <TB1> INFO: 16640000 events read in total (565547ms).
[10:03:33.780] <TB1> INFO: Test took 566641ms.
[10:03:34.003] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:05.294] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 1.789661 .. 255.000000
[10:04:05.384] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 1 .. 255 (-1/-1) hits flags = 16 (plus default)
[10:04:05.393] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[10:04:05.393] <TB1> INFO: run 1 of 1
[10:04:05.717] <TB1> INFO: Expecting 21216000 events.
[10:04:28.228] <TB1> INFO: 710860 events read in total (21793ms).
[10:04:51.536] <TB1> INFO: 1421840 events read in total (45101ms).
[10:05:14.345] <TB1> INFO: 2133140 events read in total (67910ms).
[10:05:36.393] <TB1> INFO: 2843980 events read in total (89958ms).
[10:05:58.860] <TB1> INFO: 3555280 events read in total (112425ms).
[10:06:20.758] <TB1> INFO: 4266460 events read in total (134323ms).
[10:06:43.447] <TB1> INFO: 4977440 events read in total (157012ms).
[10:07:07.780] <TB1> INFO: 5688860 events read in total (181345ms).
[10:07:31.947] <TB1> INFO: 6399880 events read in total (205512ms).
[10:07:56.203] <TB1> INFO: 7111280 events read in total (229768ms).
[10:08:18.199] <TB1> INFO: 7822240 events read in total (251764ms).
[10:08:41.478] <TB1> INFO: 8533560 events read in total (275043ms).
[10:09:05.638] <TB1> INFO: 9244700 events read in total (299203ms).
[10:09:29.977] <TB1> INFO: 9955900 events read in total (323542ms).
[10:09:54.345] <TB1> INFO: 10667200 events read in total (347910ms).
[10:10:18.701] <TB1> INFO: 11378000 events read in total (372266ms).
[10:10:40.595] <TB1> INFO: 12089080 events read in total (394160ms).
[10:11:05.164] <TB1> INFO: 12800120 events read in total (418729ms).
[10:11:29.516] <TB1> INFO: 13511060 events read in total (443081ms).
[10:11:53.763] <TB1> INFO: 14220760 events read in total (467328ms).
[10:12:18.041] <TB1> INFO: 14930740 events read in total (491606ms).
[10:12:42.315] <TB1> INFO: 15641020 events read in total (515880ms).
[10:13:06.765] <TB1> INFO: 16350840 events read in total (540330ms).
[10:13:31.201] <TB1> INFO: 17060580 events read in total (564766ms).
[10:13:55.559] <TB1> INFO: 17770340 events read in total (589124ms).
[10:14:19.886] <TB1> INFO: 18479960 events read in total (613451ms).
[10:14:44.370] <TB1> INFO: 19189660 events read in total (637935ms).
[10:15:08.596] <TB1> INFO: 19899260 events read in total (662161ms).
[10:15:30.859] <TB1> INFO: 20609120 events read in total (684425ms).
[10:15:51.187] <TB1> INFO: 21216000 events read in total (704752ms).
[10:15:51.305] <TB1> INFO: Test took 705911ms.
[10:15:51.611] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:24.740] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 16.239468 .. 45.230772
[10:16:24.825] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 6 .. 55 (-1/-1) hits flags = 16 (plus default)
[10:16:24.834] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[10:16:24.834] <TB1> INFO: run 1 of 1
[10:16:25.172] <TB1> INFO: Expecting 4160000 events.
[10:16:52.597] <TB1> INFO: 931900 events read in total (26701ms).
[10:17:19.153] <TB1> INFO: 1864080 events read in total (53257ms).
[10:17:45.767] <TB1> INFO: 2795680 events read in total (79871ms).
[10:18:12.584] <TB1> INFO: 3725080 events read in total (106688ms).
[10:18:25.442] <TB1> INFO: 4160000 events read in total (119546ms).
[10:18:25.460] <TB1> INFO: Test took 120625ms.
[10:18:25.497] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:40.762] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 20.427372 .. 42.445937
[10:18:40.844] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 10 .. 52 (-1/-1) hits flags = 16 (plus default)
[10:18:40.853] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[10:18:40.853] <TB1> INFO: run 1 of 1
[10:18:41.171] <TB1> INFO: Expecting 3577600 events.
[10:19:08.593] <TB1> INFO: 935620 events read in total (26705ms).
[10:19:35.416] <TB1> INFO: 1871400 events read in total (53528ms).
[10:19:59.957] <TB1> INFO: 2806000 events read in total (78069ms).
[10:20:22.252] <TB1> INFO: 3577600 events read in total (100364ms).
[10:20:22.268] <TB1> INFO: Test took 101415ms.
[10:20:22.302] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:37.464] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 11.500000 .. 42.244282
[10:20:37.561] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 1 .. 52 (-1/-1) hits flags = 16 (plus default)
[10:20:37.570] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[10:20:37.570] <TB1> INFO: run 1 of 1
[10:20:37.915] <TB1> INFO: Expecting 4326400 events.
[10:21:05.595] <TB1> INFO: 986280 events read in total (26963ms).
[10:21:32.571] <TB1> INFO: 1972180 events read in total (53939ms).
[10:21:59.070] <TB1> INFO: 2958520 events read in total (80438ms).
[10:22:23.715] <TB1> INFO: 3944440 events read in total (105083ms).
[10:22:34.512] <TB1> INFO: 4326400 events read in total (115880ms).
[10:22:34.531] <TB1> INFO: Test took 116961ms.
[10:22:34.564] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:47.180] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:22:47.180] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[10:22:47.189] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[10:22:47.189] <TB1> INFO: run 1 of 1
[10:22:47.494] <TB1> INFO: Expecting 3411200 events.
[10:23:11.899] <TB1> INFO: 878800 events read in total (23688ms).
[10:23:38.225] <TB1> INFO: 1757140 events read in total (50014ms).
[10:24:04.541] <TB1> INFO: 2635280 events read in total (76331ms).
[10:24:27.702] <TB1> INFO: 3411200 events read in total (99491ms).
[10:24:27.716] <TB1> INFO: Test took 100527ms.
[10:24:27.749] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:42.391] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:24:42.391] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:24:42.392] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:24:42.393] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:24:42.393] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:24:42.393] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:24:42.393] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:24:42.393] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C0.dat
[10:24:42.400] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C1.dat
[10:24:42.408] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C2.dat
[10:24:42.415] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C3.dat
[10:24:42.422] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C4.dat
[10:24:42.429] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C5.dat
[10:24:42.437] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C6.dat
[10:24:42.444] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C7.dat
[10:24:42.451] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C8.dat
[10:24:42.458] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C9.dat
[10:24:42.465] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C10.dat
[10:24:42.471] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C11.dat
[10:24:42.479] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C12.dat
[10:24:42.485] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C13.dat
[10:24:42.492] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C14.dat
[10:24:42.500] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//trimParameters35_C15.dat
[10:24:42.507] <TB1> INFO: PixTestTrim::trimTest() done
[10:24:42.507] <TB1> INFO: vtrim: 88 83 94 85 98 101 78 110 95 81 100 92 98 91 86 105
[10:24:42.507] <TB1> INFO: vthrcomp: 90 94 86 90 92 86 86 93 88 79 101 78 85 84 76 79
[10:24:42.507] <TB1> INFO: vcal mean: 34.99 34.99 35.00 35.00 34.99 34.99 34.98 34.99 34.97 35.00 34.99 34.99 34.97 34.85 35.01 35.01
[10:24:42.507] <TB1> INFO: vcal RMS: 0.72 0.71 0.72 0.66 0.71 0.71 0.69 0.74 0.67 0.68 0.70 0.68 0.88 0.83 0.66 0.68
[10:24:42.507] <TB1> INFO: bits mean: 9.01 9.29 9.61 9.43 9.51 9.41 8.97 9.12 8.91 8.57 8.91 8.70 9.41 8.83 8.75 8.52
[10:24:42.507] <TB1> INFO: bits RMS: 2.81 2.84 2.80 2.76 2.66 2.85 3.06 2.83 2.83 2.65 2.83 2.53 2.82 2.98 2.71 2.62
[10:24:42.516] <TB1> INFO: ----------------------------------------------------------------------
[10:24:42.516] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:24:42.516] <TB1> INFO: ----------------------------------------------------------------------
[10:24:42.520] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[10:24:42.530] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:24:42.530] <TB1> INFO: run 1 of 1
[10:24:42.851] <TB1> INFO: Expecting 8320000 events.
[10:25:10.076] <TB1> INFO: 899290 events read in total (26506ms).
[10:25:39.094] <TB1> INFO: 1792090 events read in total (55524ms).
[10:26:08.306] <TB1> INFO: 2683010 events read in total (84736ms).
[10:26:37.274] <TB1> INFO: 3572390 events read in total (113704ms).
[10:27:04.984] <TB1> INFO: 4457940 events read in total (141414ms).
[10:27:33.799] <TB1> INFO: 5339210 events read in total (170229ms).
[10:28:02.761] <TB1> INFO: 6218400 events read in total (199191ms).
[10:28:31.281] <TB1> INFO: 7097590 events read in total (227711ms).
[10:29:00.183] <TB1> INFO: 7979160 events read in total (256613ms).
[10:29:11.607] <TB1> INFO: 8320000 events read in total (268037ms).
[10:29:11.655] <TB1> INFO: Test took 269125ms.
[10:29:11.789] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:39.450] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 166 (-1/-1) hits flags = 16 (plus default)
[10:29:39.459] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:29:39.459] <TB1> INFO: run 1 of 1
[10:29:39.769] <TB1> INFO: Expecting 6947200 events.
[10:30:08.777] <TB1> INFO: 928600 events read in total (28291ms).
[10:30:38.184] <TB1> INFO: 1849140 events read in total (57698ms).
[10:31:07.463] <TB1> INFO: 2767450 events read in total (86977ms).
[10:31:36.718] <TB1> INFO: 3681900 events read in total (116232ms).
[10:32:05.984] <TB1> INFO: 4589060 events read in total (145498ms).
[10:32:35.145] <TB1> INFO: 5494230 events read in total (174659ms).
[10:33:04.278] <TB1> INFO: 6400240 events read in total (203792ms).
[10:33:21.874] <TB1> INFO: 6947200 events read in total (221388ms).
[10:33:21.907] <TB1> INFO: Test took 222448ms.
[10:33:22.006] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:46.520] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 154 (-1/-1) hits flags = 16 (plus default)
[10:33:46.529] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:33:46.529] <TB1> INFO: run 1 of 1
[10:33:46.834] <TB1> INFO: Expecting 6448000 events.
[10:34:16.661] <TB1> INFO: 957620 events read in total (29110ms).
[10:34:46.589] <TB1> INFO: 1906350 events read in total (59038ms).
[10:35:14.871] <TB1> INFO: 2852000 events read in total (87320ms).
[10:35:42.203] <TB1> INFO: 3789890 events read in total (114652ms).
[10:36:09.691] <TB1> INFO: 4722420 events read in total (142140ms).
[10:36:37.574] <TB1> INFO: 5653150 events read in total (170023ms).
[10:37:02.686] <TB1> INFO: 6448000 events read in total (195135ms).
[10:37:02.715] <TB1> INFO: Test took 196186ms.
[10:37:02.789] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:25.436] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 153 (-1/-1) hits flags = 16 (plus default)
[10:37:25.445] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:37:25.445] <TB1> INFO: run 1 of 1
[10:37:25.772] <TB1> INFO: Expecting 6406400 events.
[10:37:55.818] <TB1> INFO: 959640 events read in total (29327ms).
[10:38:25.621] <TB1> INFO: 1910440 events read in total (59131ms).
[10:38:55.506] <TB1> INFO: 2857970 events read in total (89016ms).
[10:39:25.249] <TB1> INFO: 3797240 events read in total (118758ms).
[10:39:52.698] <TB1> INFO: 4730850 events read in total (146207ms).
[10:40:22.157] <TB1> INFO: 5664080 events read in total (175666ms).
[10:40:45.587] <TB1> INFO: 6406400 events read in total (199096ms).
[10:40:45.616] <TB1> INFO: Test took 200171ms.
[10:40:45.701] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:09.064] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 154 (-1/-1) hits flags = 16 (plus default)
[10:41:09.073] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:41:09.073] <TB1> INFO: run 1 of 1
[10:41:09.378] <TB1> INFO: Expecting 6448000 events.
[10:41:39.809] <TB1> INFO: 956250 events read in total (29711ms).
[10:42:09.538] <TB1> INFO: 1903840 events read in total (59440ms).
[10:42:39.157] <TB1> INFO: 2848130 events read in total (89059ms).
[10:43:08.848] <TB1> INFO: 3784780 events read in total (118750ms).
[10:43:35.870] <TB1> INFO: 4716070 events read in total (145772ms).
[10:44:05.409] <TB1> INFO: 5645580 events read in total (175311ms).
[10:44:30.698] <TB1> INFO: 6448000 events read in total (200600ms).
[10:44:30.730] <TB1> INFO: Test took 201657ms.
[10:44:30.805] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:53.036] <TB1> INFO: PixTestTrim::trimBitTest() done
[10:44:53.037] <TB1> INFO: PixTestTrim::doTest() done, duration: 4227 seconds
[10:44:53.707] <TB1> INFO: ######################################################################
[10:44:53.707] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:44:53.707] <TB1> INFO: ######################################################################
[10:44:54.016] <TB1> INFO: Expecting 41600 events.
[10:44:58.296] <TB1> INFO: 41600 events read in total (3560ms).
[10:44:58.297] <TB1> INFO: Test took 4588ms.
[10:44:58.304] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:58.902] <TB1> INFO: Expecting 41600 events.
[10:45:03.244] <TB1> INFO: 41600 events read in total (3625ms).
[10:45:03.244] <TB1> INFO: Test took 4679ms.
[10:45:03.251] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:03.597] <TB1> INFO: Expecting 41600 events.
[10:45:07.922] <TB1> INFO: 41600 events read in total (3608ms).
[10:45:07.923] <TB1> INFO: Test took 4644ms.
[10:45:07.929] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:07.937] <TB1> INFO: The DUT currently contains the following objects:
[10:45:07.937] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:07.937] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:07.937] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:07.937] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:07.937] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:07.937] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:08.277] <TB1> INFO: Expecting 2560 events.
[10:45:09.347] <TB1> INFO: 2560 events read in total (353ms).
[10:45:09.348] <TB1> INFO: Test took 1411ms.
[10:45:09.348] <TB1> INFO: The DUT currently contains the following objects:
[10:45:09.348] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:09.348] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:09.348] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:09.348] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:09.348] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.348] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.348] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.348] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.348] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.348] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.349] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:09.763] <TB1> INFO: Expecting 2560 events.
[10:45:10.833] <TB1> INFO: 2560 events read in total (352ms).
[10:45:10.833] <TB1> INFO: Test took 1484ms.
[10:45:10.834] <TB1> INFO: The DUT currently contains the following objects:
[10:45:10.834] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:10.834] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:10.834] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:10.834] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:10.834] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.834] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.834] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.834] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.834] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.834] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.834] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.834] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.834] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.835] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.835] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.835] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.835] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.835] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.835] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:10.835] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:11.249] <TB1> INFO: Expecting 2560 events.
[10:45:12.322] <TB1> INFO: 2560 events read in total (356ms).
[10:45:12.322] <TB1> INFO: Test took 1487ms.
[10:45:12.322] <TB1> INFO: The DUT currently contains the following objects:
[10:45:12.322] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:12.322] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:12.322] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:12.322] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:12.322] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.322] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.323] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.323] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.323] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.323] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:12.738] <TB1> INFO: Expecting 2560 events.
[10:45:13.811] <TB1> INFO: 2560 events read in total (356ms).
[10:45:13.812] <TB1> INFO: Test took 1489ms.
[10:45:13.812] <TB1> INFO: The DUT currently contains the following objects:
[10:45:13.812] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:13.812] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:13.812] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:13.812] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:13.812] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.812] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.812] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.812] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.812] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.812] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.812] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.812] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.813] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.813] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.813] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.813] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.813] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.813] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.813] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:13.813] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:14.228] <TB1> INFO: Expecting 2560 events.
[10:45:15.298] <TB1> INFO: 2560 events read in total (353ms).
[10:45:15.298] <TB1> INFO: Test took 1485ms.
[10:45:15.299] <TB1> INFO: The DUT currently contains the following objects:
[10:45:15.299] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:15.299] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:15.299] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:15.299] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:15.299] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.299] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.300] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.300] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:15.714] <TB1> INFO: Expecting 2560 events.
[10:45:16.786] <TB1> INFO: 2560 events read in total (355ms).
[10:45:16.786] <TB1> INFO: Test took 1486ms.
[10:45:16.787] <TB1> INFO: The DUT currently contains the following objects:
[10:45:16.787] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:16.787] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:16.787] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:16.787] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:16.787] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.787] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.788] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.788] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.788] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.788] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:16.788] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:17.202] <TB1> INFO: Expecting 2560 events.
[10:45:18.267] <TB1> INFO: 2560 events read in total (348ms).
[10:45:18.267] <TB1> INFO: Test took 1479ms.
[10:45:18.268] <TB1> INFO: The DUT currently contains the following objects:
[10:45:18.268] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:18.268] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:18.268] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:18.268] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:18.268] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.268] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.269] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:18.684] <TB1> INFO: Expecting 2560 events.
[10:45:19.754] <TB1> INFO: 2560 events read in total (353ms).
[10:45:19.754] <TB1> INFO: Test took 1485ms.
[10:45:19.755] <TB1> INFO: The DUT currently contains the following objects:
[10:45:19.755] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:19.755] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:19.755] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:19.755] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:19.755] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.755] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.755] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.755] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.755] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.755] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.755] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:19.756] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:20.170] <TB1> INFO: Expecting 2560 events.
[10:45:21.243] <TB1> INFO: 2560 events read in total (356ms).
[10:45:21.244] <TB1> INFO: Test took 1488ms.
[10:45:21.246] <TB1> INFO: The DUT currently contains the following objects:
[10:45:21.246] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:21.246] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:21.246] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:21.246] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:21.246] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.246] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.246] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.247] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:21.660] <TB1> INFO: Expecting 2560 events.
[10:45:22.732] <TB1> INFO: 2560 events read in total (355ms).
[10:45:22.732] <TB1> INFO: Test took 1485ms.
[10:45:22.733] <TB1> INFO: The DUT currently contains the following objects:
[10:45:22.733] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:22.733] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:22.733] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:22.733] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:22.733] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.733] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.734] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:22.734] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:23.148] <TB1> INFO: Expecting 2560 events.
[10:45:24.219] <TB1> INFO: 2560 events read in total (354ms).
[10:45:24.219] <TB1> INFO: Test took 1485ms.
[10:45:24.220] <TB1> INFO: The DUT currently contains the following objects:
[10:45:24.220] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:24.220] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:24.220] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:24.220] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:24.220] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.220] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.221] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.221] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:24.635] <TB1> INFO: Expecting 2560 events.
[10:45:25.707] <TB1> INFO: 2560 events read in total (354ms).
[10:45:25.707] <TB1> INFO: Test took 1486ms.
[10:45:25.707] <TB1> INFO: The DUT currently contains the following objects:
[10:45:25.708] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:25.708] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:25.708] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:25.708] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:25.708] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.708] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.709] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.709] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:25.709] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:26.122] <TB1> INFO: Expecting 2560 events.
[10:45:27.196] <TB1> INFO: 2560 events read in total (357ms).
[10:45:27.197] <TB1> INFO: Test took 1488ms.
[10:45:27.197] <TB1> INFO: The DUT currently contains the following objects:
[10:45:27.197] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:27.197] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:27.197] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:27.197] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:27.197] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.197] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.197] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.197] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.197] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.197] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.198] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:27.612] <TB1> INFO: Expecting 2560 events.
[10:45:28.684] <TB1> INFO: 2560 events read in total (355ms).
[10:45:28.685] <TB1> INFO: Test took 1487ms.
[10:45:28.685] <TB1> INFO: The DUT currently contains the following objects:
[10:45:28.685] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:28.685] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:28.685] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:28.685] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:28.685] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:28.685] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:29.101] <TB1> INFO: Expecting 2560 events.
[10:45:30.172] <TB1> INFO: 2560 events read in total (354ms).
[10:45:30.172] <TB1> INFO: Test took 1487ms.
[10:45:30.173] <TB1> INFO: The DUT currently contains the following objects:
[10:45:30.173] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:30.173] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:45:30.173] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:45:30.173] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:45:30.173] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.173] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.174] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.174] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:45:30.588] <TB1> INFO: Expecting 2560 events.
[10:45:31.660] <TB1> INFO: 2560 events read in total (355ms).
[10:45:31.660] <TB1> INFO: Test took 1486ms.
[10:45:31.665] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:32.078] <TB1> INFO: Expecting 655360 events.
[10:45:48.589] <TB1> INFO: 655360 events read in total (15794ms).
[10:45:48.598] <TB1> INFO: Expecting 655360 events.
[10:46:05.107] <TB1> INFO: 655360 events read in total (15981ms).
[10:46:05.123] <TB1> INFO: Expecting 655360 events.
[10:46:21.579] <TB1> INFO: 655360 events read in total (15927ms).
[10:46:21.598] <TB1> INFO: Expecting 655360 events.
[10:46:38.069] <TB1> INFO: 655360 events read in total (15942ms).
[10:46:38.090] <TB1> INFO: Expecting 655360 events.
[10:46:54.688] <TB1> INFO: 655360 events read in total (16070ms).
[10:46:54.717] <TB1> INFO: Expecting 655360 events.
[10:47:09.735] <TB1> INFO: 655360 events read in total (14490ms).
[10:47:09.761] <TB1> INFO: Expecting 655360 events.
[10:47:25.869] <TB1> INFO: 655360 events read in total (15580ms).
[10:47:25.904] <TB1> INFO: Expecting 655360 events.
[10:47:42.723] <TB1> INFO: 655360 events read in total (16290ms).
[10:47:42.762] <TB1> INFO: Expecting 655360 events.
[10:47:59.250] <TB1> INFO: 655360 events read in total (15959ms).
[10:47:59.288] <TB1> INFO: Expecting 655360 events.
[10:48:15.952] <TB1> INFO: 655360 events read in total (16136ms).
[10:48:15.999] <TB1> INFO: Expecting 655360 events.
[10:48:32.394] <TB1> INFO: 655360 events read in total (15867ms).
[10:48:32.439] <TB1> INFO: Expecting 655360 events.
[10:48:49.023] <TB1> INFO: 655360 events read in total (16056ms).
[10:48:49.082] <TB1> INFO: Expecting 655360 events.
[10:49:05.511] <TB1> INFO: 655360 events read in total (15900ms).
[10:49:05.559] <TB1> INFO: Expecting 655360 events.
[10:49:22.134] <TB1> INFO: 655360 events read in total (16047ms).
[10:49:22.188] <TB1> INFO: Expecting 655360 events.
[10:49:38.718] <TB1> INFO: 655360 events read in total (16001ms).
[10:49:38.774] <TB1> INFO: Expecting 655360 events.
[10:49:55.293] <TB1> INFO: 655360 events read in total (15990ms).
[10:49:55.355] <TB1> INFO: Test took 263690ms.
[10:49:55.439] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:49:55.746] <TB1> INFO: Expecting 655360 events.
[10:50:12.430] <TB1> INFO: 655360 events read in total (15967ms).
[10:50:12.440] <TB1> INFO: Expecting 655360 events.
[10:50:28.871] <TB1> INFO: 655360 events read in total (15902ms).
[10:50:28.883] <TB1> INFO: Expecting 655360 events.
[10:50:44.047] <TB1> INFO: 655360 events read in total (14635ms).
[10:50:44.063] <TB1> INFO: Expecting 655360 events.
[10:50:59.097] <TB1> INFO: 655360 events read in total (14506ms).
[10:50:59.119] <TB1> INFO: Expecting 655360 events.
[10:51:15.603] <TB1> INFO: 655360 events read in total (15956ms).
[10:51:15.631] <TB1> INFO: Expecting 655360 events.
[10:51:32.179] <TB1> INFO: 655360 events read in total (16019ms).
[10:51:32.207] <TB1> INFO: Expecting 655360 events.
[10:51:48.701] <TB1> INFO: 655360 events read in total (15966ms).
[10:51:48.732] <TB1> INFO: Expecting 655360 events.
[10:52:05.210] <TB1> INFO: 655360 events read in total (15950ms).
[10:52:05.243] <TB1> INFO: Expecting 655360 events.
[10:52:21.833] <TB1> INFO: 655360 events read in total (16062ms).
[10:52:21.877] <TB1> INFO: Expecting 655360 events.
[10:52:38.453] <TB1> INFO: 655360 events read in total (16048ms).
[10:52:38.498] <TB1> INFO: Expecting 655360 events.
[10:52:55.119] <TB1> INFO: 655360 events read in total (16093ms).
[10:52:55.167] <TB1> INFO: Expecting 655360 events.
[10:53:11.686] <TB1> INFO: 655360 events read in total (15990ms).
[10:53:11.735] <TB1> INFO: Expecting 655360 events.
[10:53:28.322] <TB1> INFO: 655360 events read in total (16060ms).
[10:53:28.375] <TB1> INFO: Expecting 655360 events.
[10:53:44.946] <TB1> INFO: 655360 events read in total (16042ms).
[10:53:45.003] <TB1> INFO: Expecting 655360 events.
[10:54:01.535] <TB1> INFO: 655360 events read in total (16003ms).
[10:54:01.599] <TB1> INFO: Expecting 655360 events.
[10:54:18.135] <TB1> INFO: 655360 events read in total (16008ms).
[10:54:18.207] <TB1> INFO: Test took 262768ms.
[10:54:18.430] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.438] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.445] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.453] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.460] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.468] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.475] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[10:54:18.483] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[10:54:18.490] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[10:54:18.497] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.505] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.512] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.520] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.527] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.535] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.542] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.550] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.557] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.565] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:54:18.622] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:54:18.622] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:54:18.622] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:54:18.622] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:54:18.622] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:54:18.623] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:54:18.623] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:54:18.623] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:54:18.623] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:54:18.623] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:54:18.624] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:54:18.624] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:54:18.624] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:54:18.624] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:54:18.624] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:54:18.625] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:54:18.942] <TB1> INFO: Expecting 41600 events.
[10:54:23.422] <TB1> INFO: 41600 events read in total (3763ms).
[10:54:23.423] <TB1> INFO: Test took 4794ms.
[10:54:23.986] <TB1> INFO: Expecting 41600 events.
[10:54:28.492] <TB1> INFO: 41600 events read in total (3789ms).
[10:54:28.493] <TB1> INFO: Test took 4847ms.
[10:54:29.044] <TB1> INFO: Expecting 41600 events.
[10:54:33.520] <TB1> INFO: 41600 events read in total (3759ms).
[10:54:33.521] <TB1> INFO: Test took 4803ms.
[10:54:33.751] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:33.884] <TB1> INFO: Expecting 2560 events.
[10:54:34.955] <TB1> INFO: 2560 events read in total (354ms).
[10:54:34.955] <TB1> INFO: Test took 1204ms.
[10:54:34.959] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:35.372] <TB1> INFO: Expecting 2560 events.
[10:54:36.439] <TB1> INFO: 2560 events read in total (350ms).
[10:54:36.439] <TB1> INFO: Test took 1480ms.
[10:54:36.442] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:36.856] <TB1> INFO: Expecting 2560 events.
[10:54:37.928] <TB1> INFO: 2560 events read in total (355ms).
[10:54:37.929] <TB1> INFO: Test took 1487ms.
[10:54:37.932] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:38.346] <TB1> INFO: Expecting 2560 events.
[10:54:39.416] <TB1> INFO: 2560 events read in total (353ms).
[10:54:39.417] <TB1> INFO: Test took 1485ms.
[10:54:39.420] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:39.834] <TB1> INFO: Expecting 2560 events.
[10:54:40.906] <TB1> INFO: 2560 events read in total (355ms).
[10:54:40.907] <TB1> INFO: Test took 1487ms.
[10:54:40.910] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:41.323] <TB1> INFO: Expecting 2560 events.
[10:54:42.393] <TB1> INFO: 2560 events read in total (353ms).
[10:54:42.394] <TB1> INFO: Test took 1484ms.
[10:54:42.397] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:42.811] <TB1> INFO: Expecting 2560 events.
[10:54:43.881] <TB1> INFO: 2560 events read in total (353ms).
[10:54:43.881] <TB1> INFO: Test took 1485ms.
[10:54:43.885] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:44.298] <TB1> INFO: Expecting 2560 events.
[10:54:45.371] <TB1> INFO: 2560 events read in total (356ms).
[10:54:45.372] <TB1> INFO: Test took 1487ms.
[10:54:45.375] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:45.788] <TB1> INFO: Expecting 2560 events.
[10:54:46.859] <TB1> INFO: 2560 events read in total (354ms).
[10:54:46.860] <TB1> INFO: Test took 1485ms.
[10:54:46.864] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:47.277] <TB1> INFO: Expecting 2560 events.
[10:54:48.348] <TB1> INFO: 2560 events read in total (354ms).
[10:54:48.349] <TB1> INFO: Test took 1485ms.
[10:54:48.352] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:48.766] <TB1> INFO: Expecting 2560 events.
[10:54:49.836] <TB1> INFO: 2560 events read in total (353ms).
[10:54:49.836] <TB1> INFO: Test took 1484ms.
[10:54:49.839] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:50.253] <TB1> INFO: Expecting 2560 events.
[10:54:51.319] <TB1> INFO: 2560 events read in total (349ms).
[10:54:51.320] <TB1> INFO: Test took 1481ms.
[10:54:51.323] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:51.736] <TB1> INFO: Expecting 2560 events.
[10:54:52.806] <TB1> INFO: 2560 events read in total (353ms).
[10:54:52.807] <TB1> INFO: Test took 1485ms.
[10:54:52.810] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:53.223] <TB1> INFO: Expecting 2560 events.
[10:54:54.294] <TB1> INFO: 2560 events read in total (354ms).
[10:54:54.294] <TB1> INFO: Test took 1485ms.
[10:54:54.298] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:54.711] <TB1> INFO: Expecting 2560 events.
[10:54:55.784] <TB1> INFO: 2560 events read in total (355ms).
[10:54:55.785] <TB1> INFO: Test took 1487ms.
[10:54:55.788] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:56.202] <TB1> INFO: Expecting 2560 events.
[10:54:57.274] <TB1> INFO: 2560 events read in total (355ms).
[10:54:57.275] <TB1> INFO: Test took 1487ms.
[10:54:57.278] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:57.692] <TB1> INFO: Expecting 2560 events.
[10:54:58.761] <TB1> INFO: 2560 events read in total (353ms).
[10:54:58.762] <TB1> INFO: Test took 1484ms.
[10:54:58.765] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:59.179] <TB1> INFO: Expecting 2560 events.
[10:55:00.252] <TB1> INFO: 2560 events read in total (356ms).
[10:55:00.252] <TB1> INFO: Test took 1487ms.
[10:55:00.255] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:00.669] <TB1> INFO: Expecting 2560 events.
[10:55:01.743] <TB1> INFO: 2560 events read in total (357ms).
[10:55:01.743] <TB1> INFO: Test took 1488ms.
[10:55:01.746] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:02.160] <TB1> INFO: Expecting 2560 events.
[10:55:03.231] <TB1> INFO: 2560 events read in total (354ms).
[10:55:03.231] <TB1> INFO: Test took 1485ms.
[10:55:03.234] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:03.648] <TB1> INFO: Expecting 2560 events.
[10:55:04.719] <TB1> INFO: 2560 events read in total (354ms).
[10:55:04.719] <TB1> INFO: Test took 1485ms.
[10:55:04.722] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:05.136] <TB1> INFO: Expecting 2560 events.
[10:55:06.208] <TB1> INFO: 2560 events read in total (355ms).
[10:55:06.209] <TB1> INFO: Test took 1487ms.
[10:55:06.212] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:06.625] <TB1> INFO: Expecting 2560 events.
[10:55:07.696] <TB1> INFO: 2560 events read in total (354ms).
[10:55:07.696] <TB1> INFO: Test took 1484ms.
[10:55:07.701] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:08.113] <TB1> INFO: Expecting 2560 events.
[10:55:09.183] <TB1> INFO: 2560 events read in total (353ms).
[10:55:09.184] <TB1> INFO: Test took 1484ms.
[10:55:09.187] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:09.600] <TB1> INFO: Expecting 2560 events.
[10:55:10.671] <TB1> INFO: 2560 events read in total (353ms).
[10:55:10.671] <TB1> INFO: Test took 1484ms.
[10:55:10.675] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:11.088] <TB1> INFO: Expecting 2560 events.
[10:55:12.161] <TB1> INFO: 2560 events read in total (356ms).
[10:55:12.162] <TB1> INFO: Test took 1488ms.
[10:55:12.165] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:12.579] <TB1> INFO: Expecting 2560 events.
[10:55:13.648] <TB1> INFO: 2560 events read in total (352ms).
[10:55:13.649] <TB1> INFO: Test took 1484ms.
[10:55:13.652] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:14.066] <TB1> INFO: Expecting 2560 events.
[10:55:15.136] <TB1> INFO: 2560 events read in total (353ms).
[10:55:15.136] <TB1> INFO: Test took 1484ms.
[10:55:15.140] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:15.553] <TB1> INFO: Expecting 2560 events.
[10:55:16.625] <TB1> INFO: 2560 events read in total (355ms).
[10:55:16.625] <TB1> INFO: Test took 1486ms.
[10:55:16.629] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:17.042] <TB1> INFO: Expecting 2560 events.
[10:55:18.113] <TB1> INFO: 2560 events read in total (354ms).
[10:55:18.113] <TB1> INFO: Test took 1485ms.
[10:55:18.116] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:18.530] <TB1> INFO: Expecting 2560 events.
[10:55:19.602] <TB1> INFO: 2560 events read in total (355ms).
[10:55:19.602] <TB1> INFO: Test took 1486ms.
[10:55:19.606] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:20.019] <TB1> INFO: Expecting 2560 events.
[10:55:21.104] <TB1> INFO: 2560 events read in total (368ms).
[10:55:21.105] <TB1> INFO: Test took 1500ms.
[10:55:21.786] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 628 seconds
[10:55:21.786] <TB1> INFO: PH scale (per ROC): 86 78 86 93 92 81 92 82 90 89 74 82 83 90 86 80
[10:55:21.786] <TB1> INFO: PH offset (per ROC): 134 163 154 144 151 144 135 164 172 166 163 155 149 161 149 157
[10:55:21.972] <TB1> INFO: ######################################################################
[10:55:21.972] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:55:21.972] <TB1> INFO: ######################################################################
[10:55:21.983] <TB1> INFO: scanning low vcal = 10
[10:55:22.315] <TB1> INFO: Expecting 41600 events.
[10:55:25.942] <TB1> INFO: 41600 events read in total (2910ms).
[10:55:25.942] <TB1> INFO: Test took 3959ms.
[10:55:25.945] <TB1> INFO: scanning low vcal = 20
[10:55:26.358] <TB1> INFO: Expecting 41600 events.
[10:55:29.996] <TB1> INFO: 41600 events read in total (2921ms).
[10:55:29.997] <TB1> INFO: Test took 4052ms.
[10:55:29.999] <TB1> INFO: scanning low vcal = 30
[10:55:30.412] <TB1> INFO: Expecting 41600 events.
[10:55:34.088] <TB1> INFO: 41600 events read in total (2959ms).
[10:55:34.089] <TB1> INFO: Test took 4089ms.
[10:55:34.093] <TB1> INFO: scanning low vcal = 40
[10:55:34.498] <TB1> INFO: Expecting 41600 events.
[10:55:38.725] <TB1> INFO: 41600 events read in total (3510ms).
[10:55:38.726] <TB1> INFO: Test took 4633ms.
[10:55:38.730] <TB1> INFO: scanning low vcal = 50
[10:55:39.061] <TB1> INFO: Expecting 41600 events.
[10:55:43.269] <TB1> INFO: 41600 events read in total (3491ms).
[10:55:43.269] <TB1> INFO: Test took 4539ms.
[10:55:43.273] <TB1> INFO: scanning low vcal = 60
[10:55:43.610] <TB1> INFO: Expecting 41600 events.
[10:55:47.806] <TB1> INFO: 41600 events read in total (3479ms).
[10:55:47.807] <TB1> INFO: Test took 4534ms.
[10:55:47.811] <TB1> INFO: scanning low vcal = 70
[10:55:48.150] <TB1> INFO: Expecting 41600 events.
[10:55:52.349] <TB1> INFO: 41600 events read in total (3482ms).
[10:55:52.349] <TB1> INFO: Test took 4538ms.
[10:55:52.353] <TB1> INFO: scanning low vcal = 80
[10:55:52.699] <TB1> INFO: Expecting 41600 events.
[10:55:56.885] <TB1> INFO: 41600 events read in total (3469ms).
[10:55:56.886] <TB1> INFO: Test took 4533ms.
[10:55:56.890] <TB1> INFO: scanning low vcal = 90
[10:55:57.237] <TB1> INFO: Expecting 41600 events.
[10:56:01.494] <TB1> INFO: 41600 events read in total (3540ms).
[10:56:01.495] <TB1> INFO: Test took 4605ms.
[10:56:01.499] <TB1> INFO: scanning low vcal = 100
[10:56:01.847] <TB1> INFO: Expecting 41600 events.
[10:56:06.000] <TB1> INFO: 41600 events read in total (3436ms).
[10:56:06.001] <TB1> INFO: Test took 4502ms.
[10:56:06.005] <TB1> INFO: scanning low vcal = 110
[10:56:06.359] <TB1> INFO: Expecting 41600 events.
[10:56:10.540] <TB1> INFO: 41600 events read in total (3464ms).
[10:56:10.540] <TB1> INFO: Test took 4535ms.
[10:56:10.544] <TB1> INFO: scanning low vcal = 120
[10:56:10.894] <TB1> INFO: Expecting 41600 events.
[10:56:15.068] <TB1> INFO: 41600 events read in total (3457ms).
[10:56:15.069] <TB1> INFO: Test took 4525ms.
[10:56:15.072] <TB1> INFO: scanning low vcal = 130
[10:56:15.429] <TB1> INFO: Expecting 41600 events.
[10:56:19.570] <TB1> INFO: 41600 events read in total (3424ms).
[10:56:19.571] <TB1> INFO: Test took 4499ms.
[10:56:19.574] <TB1> INFO: scanning low vcal = 140
[10:56:19.927] <TB1> INFO: Expecting 41600 events.
[10:56:24.095] <TB1> INFO: 41600 events read in total (3451ms).
[10:56:24.096] <TB1> INFO: Test took 4522ms.
[10:56:24.100] <TB1> INFO: scanning low vcal = 150
[10:56:24.442] <TB1> INFO: Expecting 41600 events.
[10:56:28.618] <TB1> INFO: 41600 events read in total (3459ms).
[10:56:28.618] <TB1> INFO: Test took 4518ms.
[10:56:28.622] <TB1> INFO: scanning low vcal = 160
[10:56:28.975] <TB1> INFO: Expecting 41600 events.
[10:56:33.127] <TB1> INFO: 41600 events read in total (3435ms).
[10:56:33.127] <TB1> INFO: Test took 4505ms.
[10:56:33.132] <TB1> INFO: scanning low vcal = 170
[10:56:33.480] <TB1> INFO: Expecting 41600 events.
[10:56:37.635] <TB1> INFO: 41600 events read in total (3438ms).
[10:56:37.636] <TB1> INFO: Test took 4504ms.
[10:56:37.642] <TB1> INFO: scanning low vcal = 180
[10:56:37.990] <TB1> INFO: Expecting 41600 events.
[10:56:42.190] <TB1> INFO: 41600 events read in total (3483ms).
[10:56:42.191] <TB1> INFO: Test took 4549ms.
[10:56:42.195] <TB1> INFO: scanning low vcal = 190
[10:56:42.545] <TB1> INFO: Expecting 41600 events.
[10:56:46.725] <TB1> INFO: 41600 events read in total (3463ms).
[10:56:46.726] <TB1> INFO: Test took 4531ms.
[10:56:46.729] <TB1> INFO: scanning low vcal = 200
[10:56:47.071] <TB1> INFO: Expecting 41600 events.
[10:56:51.277] <TB1> INFO: 41600 events read in total (3489ms).
[10:56:51.277] <TB1> INFO: Test took 4548ms.
[10:56:51.280] <TB1> INFO: scanning low vcal = 210
[10:56:51.628] <TB1> INFO: Expecting 41600 events.
[10:56:55.819] <TB1> INFO: 41600 events read in total (3474ms).
[10:56:55.819] <TB1> INFO: Test took 4539ms.
[10:56:55.823] <TB1> INFO: scanning low vcal = 220
[10:56:56.155] <TB1> INFO: Expecting 41600 events.
[10:57:00.380] <TB1> INFO: 41600 events read in total (3508ms).
[10:57:00.381] <TB1> INFO: Test took 4558ms.
[10:57:00.384] <TB1> INFO: scanning low vcal = 230
[10:57:00.733] <TB1> INFO: Expecting 41600 events.
[10:57:04.967] <TB1> INFO: 41600 events read in total (3517ms).
[10:57:04.968] <TB1> INFO: Test took 4584ms.
[10:57:04.971] <TB1> INFO: scanning low vcal = 240
[10:57:05.318] <TB1> INFO: Expecting 41600 events.
[10:57:09.501] <TB1> INFO: 41600 events read in total (3466ms).
[10:57:09.502] <TB1> INFO: Test took 4531ms.
[10:57:09.506] <TB1> INFO: scanning low vcal = 250
[10:57:09.858] <TB1> INFO: Expecting 41600 events.
[10:57:14.071] <TB1> INFO: 41600 events read in total (3496ms).
[10:57:14.072] <TB1> INFO: Test took 4566ms.
[10:57:14.078] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[10:57:14.416] <TB1> INFO: Expecting 41600 events.
[10:57:18.631] <TB1> INFO: 41600 events read in total (3498ms).
[10:57:18.632] <TB1> INFO: Test took 4554ms.
[10:57:18.635] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[10:57:18.979] <TB1> INFO: Expecting 41600 events.
[10:57:23.211] <TB1> INFO: 41600 events read in total (3515ms).
[10:57:23.212] <TB1> INFO: Test took 4577ms.
[10:57:23.215] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[10:57:23.562] <TB1> INFO: Expecting 41600 events.
[10:57:27.782] <TB1> INFO: 41600 events read in total (3503ms).
[10:57:27.783] <TB1> INFO: Test took 4568ms.
[10:57:27.787] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[10:57:28.134] <TB1> INFO: Expecting 41600 events.
[10:57:32.471] <TB1> INFO: 41600 events read in total (3620ms).
[10:57:32.472] <TB1> INFO: Test took 4685ms.
[10:57:32.476] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:57:32.826] <TB1> INFO: Expecting 41600 events.
[10:57:37.009] <TB1> INFO: 41600 events read in total (3465ms).
[10:57:37.010] <TB1> INFO: Test took 4534ms.
[10:57:37.480] <TB1> INFO: PixTestGainPedestal::measure() done
[10:58:09.513] <TB1> INFO: PixTestGainPedestal::fit() done
[10:58:09.513] <TB1> INFO: non-linearity mean: 0.955 0.954 0.956 0.962 0.958 0.956 0.961 0.950 0.949 0.954 0.956 0.961 0.951 0.957 0.952 0.957
[10:58:09.513] <TB1> INFO: non-linearity RMS: 0.007 0.006 0.005 0.004 0.006 0.005 0.005 0.007 0.006 0.007 0.006 0.007 0.006 0.005 0.005 0.006
[10:58:09.513] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:58:09.532] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:58:09.550] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:58:09.569] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:58:09.587] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:58:09.605] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:58:09.623] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:58:09.642] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:58:09.660] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:58:09.678] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:58:09.697] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:58:09.715] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:58:09.734] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:58:09.752] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:58:09.770] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:58:09.789] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:58:09.807] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[10:58:09.813] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C15.dat
[10:58:09.815] <TB1> INFO: PixTestReadback::doTest() start.
[10:58:09.816] <TB1> INFO: PixTestReadback::RES sent once
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C0.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C1.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C2.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C3.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C4.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C5.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C6.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C7.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C8.dat
[10:58:21.192] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C9.dat
[10:58:21.193] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C10.dat
[10:58:21.193] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C11.dat
[10:58:21.193] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C12.dat
[10:58:21.193] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C13.dat
[10:58:21.193] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C14.dat
[10:58:21.193] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C15.dat
[10:58:21.239] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:58:21.240] <TB1> INFO: PixTestReadback::RES sent once
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C0.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C1.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C2.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C3.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C4.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C5.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C6.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C7.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C8.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C9.dat
[10:58:32.539] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C10.dat
[10:58:32.540] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C11.dat
[10:58:32.540] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C12.dat
[10:58:32.540] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C13.dat
[10:58:32.540] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C14.dat
[10:58:32.540] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C15.dat
[10:58:32.588] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:58:32.588] <TB1> INFO: PixTestReadback::RES sent once
[10:58:41.276] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:58:41.276] <TB1> INFO: Vbg will be calibrated using Vd calibration
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 149calibrated Vbg = 1.18494 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 161.5calibrated Vbg = 1.19013 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 142.2calibrated Vbg = 1.18623 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 152.5calibrated Vbg = 1.19973 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 155.9calibrated Vbg = 1.19635 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.4calibrated Vbg = 1.20148 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 150.2calibrated Vbg = 1.20208 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156.2calibrated Vbg = 1.19719 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.8calibrated Vbg = 1.20219 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.6calibrated Vbg = 1.20475 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.9calibrated Vbg = 1.20256 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.1calibrated Vbg = 1.20396 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.4calibrated Vbg = 1.19348 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 164.2calibrated Vbg = 1.19207 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153.5calibrated Vbg = 1.20117 :::*/*/*/*/
[10:58:41.276] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 146.1calibrated Vbg = 1.18956 :::*/*/*/*/
[10:58:41.280] <TB1> INFO: PixTestReadback::RES sent once
[11:01:36.918] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C0.dat
[11:01:36.918] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C1.dat
[11:01:36.918] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C2.dat
[11:01:36.918] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C3.dat
[11:01:36.918] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C4.dat
[11:01:36.918] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C5.dat
[11:01:36.918] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C6.dat
[11:01:36.918] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C7.dat
[11:01:36.919] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C8.dat
[11:01:36.919] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C9.dat
[11:01:36.919] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C10.dat
[11:01:36.919] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C11.dat
[11:01:36.919] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C12.dat
[11:01:36.919] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C13.dat
[11:01:36.919] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C14.dat
[11:01:36.919] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2093_FullQualification_2015-08-31_11h07m_1441012069//000_FulltestPxar_m20//readbackCal_C15.dat
[11:01:36.968] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[11:01:36.970] <TB1> INFO: PixTestReadback::doTest() done
[11:01:36.998] <TB1> INFO: enter test to run
[11:01:36.998] <TB1> INFO: test: exit no parameter change
[11:01:37.712] <TB1> QUIET: Connection to board 153 closed.
[11:01:37.792] <TB1> INFO: pXar: this is the end, my friend