[15:10:36.220] <TB0> INFO: *** Welcome to pxar ***
[15:10:36.220] <TB0> INFO: *** Today: 2015/09/02
[15:10:36.220] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C15.dat
[15:10:36.220] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:10:36.221] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//defaultMaskFile.dat
[15:10:36.221] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters_C15.dat
[15:10:36.286] <TB0> INFO: clk: 4
[15:10:36.286] <TB0> INFO: ctr: 4
[15:10:36.286] <TB0> INFO: sda: 19
[15:10:36.286] <TB0> INFO: tin: 9
[15:10:36.286] <TB0> INFO: level: 15
[15:10:36.286] <TB0> INFO: triggerdelay: 0
[15:10:36.286] <TB0> QUIET: Instanciating API for pxar prod-10
[15:10:36.286] <TB0> INFO: Log level: INFO
[15:10:36.293] <TB0> INFO: Found DTB DTB_WS6AYH
[15:10:36.302] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[15:10:36.305] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
------------------------------------------------------
[15:10:36.308] <TB0> INFO: RPC call hashes of host and DTB match: 397073690
[15:10:37.821] <TB0> INFO: DUT info:
[15:10:37.821] <TB0> INFO: The DUT currently contains the following objects:
[15:10:37.821] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:10:37.821] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:10:37.821] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:10:37.821] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:10:37.821] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:37.822] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:10:38.222] <TB0> INFO: enter 'restricted' command line mode
[15:10:38.222] <TB0> INFO: enter test to run
[15:10:38.223] <TB0> INFO: test: pretest no parameter change
[15:10:38.223] <TB0> INFO: running: pretest
[15:10:38.227] <TB0> INFO: ######################################################################
[15:10:38.227] <TB0> INFO: PixTestPretest::doTest()
[15:10:38.227] <TB0> INFO: ######################################################################
[15:10:38.228] <TB0> INFO: ----------------------------------------------------------------------
[15:10:38.228] <TB0> INFO: PixTestPretest::programROC()
[15:10:38.228] <TB0> INFO: ----------------------------------------------------------------------
[15:10:56.245] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:10:56.245] <TB0> INFO: IA differences per ROC: 16.9 17.7 17.7 17.7 17.7 17.7 19.3 17.7 18.5 18.5 17.7 17.7 19.3 17.7 18.5 18.5
[15:10:56.313] <TB0> INFO: ----------------------------------------------------------------------
[15:10:56.313] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:10:56.313] <TB0> INFO: ----------------------------------------------------------------------
[15:11:15.874] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 388.3 mA = 24.2687 mA/ROC
[15:11:15.877] <TB0> INFO: ----------------------------------------------------------------------
[15:11:15.877] <TB0> INFO: PixTestPretest::findWorkingPixel()
[15:11:15.877] <TB0> INFO: ----------------------------------------------------------------------
[15:11:16.016] <TB0> INFO: Expecting 231680 events.
[15:11:25.443] <TB0> INFO: 231680 events read in total (8709ms).
[15:11:25.508] <TB0> INFO: Test took 9625ms.
[15:11:25.776] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:11:25.816] <TB0> INFO: ----------------------------------------------------------------------
[15:11:25.817] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[15:11:25.817] <TB0> INFO: ----------------------------------------------------------------------
[15:11:25.954] <TB0> INFO: Expecting 231680 events.
[15:11:35.399] <TB0> INFO: 231680 events read in total (8729ms).
[15:11:35.404] <TB0> INFO: Test took 9582ms.
[15:11:35.726] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[15:11:35.726] <TB0> INFO: CalDel: 128 163 145 139 131 127 124 132 138 141 133 131 137 152 137 131
[15:11:35.726] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:11:35.729] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C0.dat
[15:11:35.730] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C1.dat
[15:11:35.730] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C2.dat
[15:11:35.730] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C3.dat
[15:11:35.730] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C4.dat
[15:11:35.731] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C5.dat
[15:11:35.731] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C6.dat
[15:11:35.731] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C7.dat
[15:11:35.731] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C8.dat
[15:11:35.732] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C9.dat
[15:11:35.732] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C10.dat
[15:11:35.732] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C11.dat
[15:11:35.732] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C12.dat
[15:11:35.732] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C13.dat
[15:11:35.733] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C14.dat
[15:11:35.733] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters_C15.dat
[15:11:35.733] <TB0> INFO: write tbm parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0a.dat
[15:11:35.733] <TB0> INFO: write tbm parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:11:35.733] <TB0> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[15:11:35.828] <TB0> INFO: enter test to run
[15:11:35.828] <TB0> INFO: test: fulltest no parameter change
[15:11:35.828] <TB0> INFO: running: fulltest
[15:11:35.828] <TB0> INFO: ######################################################################
[15:11:35.828] <TB0> INFO: PixTestFullTest::doTest()
[15:11:35.828] <TB0> INFO: ######################################################################
[15:11:35.830] <TB0> INFO: ######################################################################
[15:11:35.830] <TB0> INFO: PixTestAlive::doTest()
[15:11:35.830] <TB0> INFO: ######################################################################
[15:11:35.831] <TB0> INFO: ----------------------------------------------------------------------
[15:11:35.831] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:11:35.831] <TB0> INFO: ----------------------------------------------------------------------
[15:11:36.148] <TB0> INFO: Expecting 41600 events.
[15:11:40.611] <TB0> INFO: 41600 events read in total (3747ms).
[15:11:40.612] <TB0> INFO: Test took 4779ms.
[15:11:40.620] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:40.905] <TB0> INFO: PixTestAlive::aliveTest() done
[15:11:40.905] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0
[15:11:40.907] <TB0> INFO: ----------------------------------------------------------------------
[15:11:40.907] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:11:40.907] <TB0> INFO: ----------------------------------------------------------------------
[15:11:41.235] <TB0> INFO: Expecting 41600 events.
[15:11:44.538] <TB0> INFO: 41600 events read in total (2587ms).
[15:11:44.538] <TB0> INFO: Test took 3629ms.
[15:11:44.538] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:44.539] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:11:44.858] <TB0> INFO: PixTestAlive::maskTest() done
[15:11:44.858] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:11:44.860] <TB0> INFO: ----------------------------------------------------------------------
[15:11:44.860] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:11:44.860] <TB0> INFO: ----------------------------------------------------------------------
[15:11:45.174] <TB0> INFO: Expecting 41600 events.
[15:11:49.608] <TB0> INFO: 41600 events read in total (3718ms).
[15:11:49.609] <TB0> INFO: Test took 4747ms.
[15:11:49.667] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:49.904] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[15:11:49.904] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:11:49.904] <TB0> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[15:11:49.920] <TB0> INFO: ######################################################################
[15:11:49.920] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:11:49.920] <TB0> INFO: ######################################################################
[15:11:49.923] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[15:11:49.936] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:11:49.936] <TB0> INFO: run 1 of 1
[15:11:50.259] <TB0> INFO: Expecting 3120000 events.
[15:12:26.315] <TB0> INFO: 857450 events read in total (35340ms).
[15:13:01.887] <TB0> INFO: 1704585 events read in total (70913ms).
[15:13:37.957] <TB0> INFO: 2567545 events read in total (106983ms).
[15:14:02.034] <TB0> INFO: 3120000 events read in total (131059ms).
[15:14:02.082] <TB0> INFO: Test took 132146ms.
[15:14:02.185] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:27.513] <TB0> INFO: PixTestBBMap::doTest() done, duration: 157 seconds
[15:14:27.513] <TB0> INFO: number of dead bumps (per ROC): 7 1 0 0 0 0 0 3 2 0 0 0 0 1 0 52
[15:14:27.513] <TB0> INFO: separation cut (per ROC): 86 96 88 89 92 92 95 85 87 89 88 97 99 67 97 68
[15:14:27.586] <TB0> INFO: ######################################################################
[15:14:27.586] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:27.586] <TB0> INFO: ######################################################################
[15:14:27.586] <TB0> INFO: ----------------------------------------------------------------------
[15:14:27.586] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[15:14:27.586] <TB0> INFO: ----------------------------------------------------------------------
[15:14:27.586] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[15:14:27.597] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[15:14:27.597] <TB0> INFO: run 1 of 1
[15:14:27.971] <TB0> INFO: Expecting 31200000 events.
[15:14:52.808] <TB0> INFO: 993000 events read in total (24121ms).
[15:15:19.211] <TB0> INFO: 1969300 events read in total (50524ms).
[15:15:45.773] <TB0> INFO: 2938950 events read in total (77086ms).
[15:16:12.813] <TB0> INFO: 3909150 events read in total (104126ms).
[15:16:39.680] <TB0> INFO: 4879900 events read in total (130993ms).
[15:17:06.760] <TB0> INFO: 5842500 events read in total (158073ms).
[15:17:33.822] <TB0> INFO: 6809300 events read in total (185135ms).
[15:18:00.651] <TB0> INFO: 7775400 events read in total (211964ms).
[15:18:27.737] <TB0> INFO: 8736850 events read in total (239050ms).
[15:18:55.047] <TB0> INFO: 9702350 events read in total (266360ms).
[15:19:21.338] <TB0> INFO: 10663250 events read in total (292651ms).
[15:19:47.980] <TB0> INFO: 11624900 events read in total (319293ms).
[15:20:15.170] <TB0> INFO: 12584750 events read in total (346483ms).
[15:20:42.179] <TB0> INFO: 13543400 events read in total (373492ms).
[15:21:09.446] <TB0> INFO: 14504550 events read in total (400759ms).
[15:21:36.895] <TB0> INFO: 15459550 events read in total (428208ms).
[15:22:04.376] <TB0> INFO: 16409300 events read in total (455689ms).
[15:22:32.199] <TB0> INFO: 17355100 events read in total (483512ms).
[15:22:59.455] <TB0> INFO: 18304100 events read in total (510768ms).
[15:23:26.698] <TB0> INFO: 19250100 events read in total (538011ms).
[15:23:53.788] <TB0> INFO: 20191650 events read in total (565101ms).
[15:24:21.249] <TB0> INFO: 21135550 events read in total (592562ms).
[15:24:48.627] <TB0> INFO: 22078950 events read in total (619940ms).
[15:25:16.560] <TB0> INFO: 23023650 events read in total (647873ms).
[15:25:43.554] <TB0> INFO: 23964300 events read in total (674867ms).
[15:26:10.629] <TB0> INFO: 24905000 events read in total (701942ms).
[15:26:37.357] <TB0> INFO: 25847950 events read in total (728670ms).
[15:27:04.229] <TB0> INFO: 26787450 events read in total (755542ms).
[15:27:31.716] <TB0> INFO: 27732850 events read in total (783029ms).
[15:27:58.994] <TB0> INFO: 28675450 events read in total (810307ms).
[15:28:24.197] <TB0> INFO: 29622750 events read in total (835510ms).
[15:28:50.484] <TB0> INFO: 30568750 events read in total (861797ms).
[15:29:09.517] <TB0> INFO: 31200000 events read in total (880831ms).
[15:29:09.547] <TB0> INFO: Test took 881950ms.
[15:29:09.622] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:09.715] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:11.170] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:12.574] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:13.991] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:15.519] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:17.048] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:18.549] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:19.950] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:21.427] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:23.013] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:24.463] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:25.958] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:27.500] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:29.144] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:30.701] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:32.190] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:29:33.667] <TB0> INFO: PixTestScurves::scurves() done
[15:29:33.667] <TB0> INFO: Vcal mean: 92.90 109.13 94.61 92.31 88.30 106.36 94.20 87.75 89.15 94.55 94.49 101.65 95.99 81.70 98.55 89.86
[15:29:33.667] <TB0> INFO: Vcal RMS: 5.00 5.48 5.04 5.33 5.60 5.60 5.95 5.65 5.71 5.74 5.09 5.69 4.92 4.25 6.33 5.77
[15:29:33.667] <TB0> INFO: PixTestScurves::fullTest() done, duration: 906 seconds
[15:29:33.743] <TB0> INFO: ######################################################################
[15:29:33.743] <TB0> INFO: PixTestTrim::doTest()
[15:29:33.743] <TB0> INFO: ######################################################################
[15:29:33.744] <TB0> INFO: ----------------------------------------------------------------------
[15:29:33.744] <TB0> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[15:29:33.744] <TB0> INFO: ----------------------------------------------------------------------
[15:29:33.828] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:29:33.828] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:29:33.836] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[15:29:33.837] <TB0> INFO: run 1 of 1
[15:29:34.141] <TB0> INFO: Expecting 13312000 events.
[15:30:01.516] <TB0> INFO: 1106980 events read in total (26658ms).
[15:30:30.885] <TB0> INFO: 2210980 events read in total (56027ms).
[15:31:00.279] <TB0> INFO: 3312220 events read in total (85421ms).
[15:31:30.078] <TB0> INFO: 4409500 events read in total (115220ms).
[15:31:59.827] <TB0> INFO: 5504960 events read in total (144969ms).
[15:32:29.441] <TB0> INFO: 6596760 events read in total (174583ms).
[15:32:58.661] <TB0> INFO: 7695120 events read in total (203803ms).
[15:33:28.095] <TB0> INFO: 8795360 events read in total (233237ms).
[15:33:58.008] <TB0> INFO: 9900140 events read in total (263150ms).
[15:34:25.714] <TB0> INFO: 11004160 events read in total (290856ms).
[15:34:55.275] <TB0> INFO: 12109420 events read in total (320417ms).
[15:35:22.272] <TB0> INFO: 13218660 events read in total (347414ms).
[15:35:25.151] <TB0> INFO: 13312000 events read in total (350293ms).
[15:35:25.188] <TB0> INFO: Test took 351351ms.
[15:35:25.241] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:45.153] <TB0> INFO: ROC 0 VthrComp = 93
[15:35:45.153] <TB0> INFO: ROC 1 VthrComp = 103
[15:35:45.154] <TB0> INFO: ROC 2 VthrComp = 94
[15:35:45.155] <TB0> INFO: ROC 3 VthrComp = 97
[15:35:45.155] <TB0> INFO: ROC 4 VthrComp = 91
[15:35:45.155] <TB0> INFO: ROC 5 VthrComp = 100
[15:35:45.155] <TB0> INFO: ROC 6 VthrComp = 100
[15:35:45.155] <TB0> INFO: ROC 7 VthrComp = 89
[15:35:45.155] <TB0> INFO: ROC 8 VthrComp = 92
[15:35:45.155] <TB0> INFO: ROC 9 VthrComp = 91
[15:35:45.155] <TB0> INFO: ROC 10 VthrComp = 93
[15:35:45.156] <TB0> INFO: ROC 11 VthrComp = 101
[15:35:45.156] <TB0> INFO: ROC 12 VthrComp = 98
[15:35:45.156] <TB0> INFO: ROC 13 VthrComp = 85
[15:35:45.156] <TB0> INFO: ROC 14 VthrComp = 97
[15:35:45.156] <TB0> INFO: ROC 15 VthrComp = 92
[15:35:45.156] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:35:45.156] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:35:45.166] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[15:35:45.166] <TB0> INFO: run 1 of 1
[15:35:45.473] <TB0> INFO: Expecting 13312000 events.
[15:36:11.272] <TB0> INFO: 779860 events read in total (25084ms).
[15:36:34.240] <TB0> INFO: 1556980 events read in total (48051ms).
[15:37:01.588] <TB0> INFO: 2332800 events read in total (75399ms).
[15:37:29.170] <TB0> INFO: 3109760 events read in total (102981ms).
[15:37:56.741] <TB0> INFO: 3885900 events read in total (130552ms).
[15:38:24.448] <TB0> INFO: 4663040 events read in total (158259ms).
[15:38:52.880] <TB0> INFO: 5439860 events read in total (186691ms).
[15:39:21.127] <TB0> INFO: 6217540 events read in total (214938ms).
[15:39:49.416] <TB0> INFO: 6991680 events read in total (243227ms).
[15:40:17.576] <TB0> INFO: 7762360 events read in total (271387ms).
[15:40:45.686] <TB0> INFO: 8531020 events read in total (299497ms).
[15:41:14.104] <TB0> INFO: 9298900 events read in total (327915ms).
[15:41:41.392] <TB0> INFO: 10065560 events read in total (355203ms).
[15:42:08.720] <TB0> INFO: 10831020 events read in total (382531ms).
[15:42:36.883] <TB0> INFO: 11595920 events read in total (410694ms).
[15:43:05.401] <TB0> INFO: 12362220 events read in total (439212ms).
[15:43:33.760] <TB0> INFO: 13129040 events read in total (467571ms).
[15:43:40.183] <TB0> INFO: 13312000 events read in total (473994ms).
[15:43:40.220] <TB0> INFO: Test took 475055ms.
[15:43:40.368] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:05.873] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 57.7884 for pixel 10/71 mean/min/max = 45.6643/33.3965/57.9321
[15:44:05.873] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 61.2424 for pixel 17/77 mean/min/max = 46.9199/32.377/61.4627
[15:44:05.874] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 58.1401 for pixel 21/2 mean/min/max = 45.6756/33.1319/58.2193
[15:44:05.874] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 55.6993 for pixel 12/77 mean/min/max = 43.7882/31.7894/55.787
[15:44:05.874] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 58.7416 for pixel 45/79 mean/min/max = 46.1952/33.6419/58.7485
[15:44:05.875] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 60.6344 for pixel 9/2 mean/min/max = 46.6692/32.6758/60.6626
[15:44:05.875] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.0252 for pixel 11/79 mean/min/max = 44.6004/31.1373/58.0635
[15:44:05.876] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 59.2523 for pixel 3/0 mean/min/max = 46.1493/32.9485/59.35
[15:44:05.876] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.016 for pixel 0/44 mean/min/max = 46.4818/32.8759/60.0877
[15:44:05.876] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 61.1831 for pixel 14/4 mean/min/max = 46.8949/32.4316/61.3581
[15:44:05.877] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 58.0378 for pixel 20/0 mean/min/max = 45.8822/33.7107/58.0537
[15:44:05.877] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 57.9436 for pixel 24/77 mean/min/max = 44.9189/31.8873/57.9506
[15:44:05.878] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 56.5313 for pixel 51/14 mean/min/max = 44.6569/32.6067/56.7071
[15:44:05.878] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 55.7476 for pixel 51/79 mean/min/max = 44.1234/32.3799/55.867
[15:44:05.878] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 61.0725 for pixel 43/79 mean/min/max = 46.4728/31.4967/61.449
[15:44:05.879] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 60.0229 for pixel 17/0 mean/min/max = 46.4267/32.7684/60.085
[15:44:05.879] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:44:06.011] <TB0> INFO: Expecting 1029120 events.
[15:44:30.816] <TB0> INFO: 1029120 events read in total (24088ms).
[15:44:30.821] <TB0> INFO: Expecting 1029120 events.
[15:44:52.926] <TB0> INFO: 1029120 events read in total (21554ms).
[15:44:52.933] <TB0> INFO: Expecting 1029120 events.
[15:45:19.694] <TB0> INFO: 1029120 events read in total (26219ms).
[15:45:19.703] <TB0> INFO: Expecting 1029120 events.
[15:45:46.617] <TB0> INFO: 1029120 events read in total (26381ms).
[15:45:46.628] <TB0> INFO: Expecting 1029120 events.
[15:46:14.105] <TB0> INFO: 1029120 events read in total (26936ms).
[15:46:14.119] <TB0> INFO: Expecting 1029120 events.
[15:46:40.794] <TB0> INFO: 1029120 events read in total (26143ms).
[15:46:40.808] <TB0> INFO: Expecting 1029120 events.
[15:47:07.756] <TB0> INFO: 1029120 events read in total (26402ms).
[15:47:07.771] <TB0> INFO: Expecting 1029120 events.
[15:47:34.954] <TB0> INFO: 1029120 events read in total (26651ms).
[15:47:34.973] <TB0> INFO: Expecting 1029120 events.
[15:48:01.852] <TB0> INFO: 1029120 events read in total (26344ms).
[15:48:01.872] <TB0> INFO: Expecting 1029120 events.
[15:48:28.444] <TB0> INFO: 1029120 events read in total (26040ms).
[15:48:28.465] <TB0> INFO: Expecting 1029120 events.
[15:48:54.765] <TB0> INFO: 1029120 events read in total (25767ms).
[15:48:54.795] <TB0> INFO: Expecting 1029120 events.
[15:49:21.907] <TB0> INFO: 1029120 events read in total (26586ms).
[15:49:21.934] <TB0> INFO: Expecting 1029120 events.
[15:49:49.360] <TB0> INFO: 1029120 events read in total (26898ms).
[15:49:49.390] <TB0> INFO: Expecting 1029120 events.
[15:50:16.215] <TB0> INFO: 1029120 events read in total (26298ms).
[15:50:16.245] <TB0> INFO: Expecting 1029120 events.
[15:50:43.305] <TB0> INFO: 1029120 events read in total (26533ms).
[15:50:43.339] <TB0> INFO: Expecting 1029120 events.
[15:51:11.040] <TB0> INFO: 1029120 events read in total (27174ms).
[15:51:11.075] <TB0> INFO: Test took 425196ms.
[15:51:12.188] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[15:51:12.197] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[15:51:12.197] <TB0> INFO: run 1 of 1
[15:51:12.535] <TB0> INFO: Expecting 16640000 events.
[15:51:40.975] <TB0> INFO: 724180 events read in total (27724ms).
[15:52:08.555] <TB0> INFO: 1445760 events read in total (55304ms).
[15:52:36.739] <TB0> INFO: 2167460 events read in total (83488ms).
[15:53:04.788] <TB0> INFO: 2889820 events read in total (111537ms).
[15:53:32.861] <TB0> INFO: 3611880 events read in total (139610ms).
[15:54:01.347] <TB0> INFO: 4333820 events read in total (168096ms).
[15:54:29.507] <TB0> INFO: 5055340 events read in total (196256ms).
[15:54:57.635] <TB0> INFO: 5778880 events read in total (224384ms).
[15:55:25.703] <TB0> INFO: 6501660 events read in total (252452ms).
[15:55:54.345] <TB0> INFO: 7224120 events read in total (281094ms).
[15:56:22.541] <TB0> INFO: 7947220 events read in total (309290ms).
[15:56:50.934] <TB0> INFO: 8667560 events read in total (337683ms).
[15:57:19.562] <TB0> INFO: 9385500 events read in total (366311ms).
[15:57:46.580] <TB0> INFO: 10102460 events read in total (393329ms).
[15:58:13.126] <TB0> INFO: 10818220 events read in total (419875ms).
[15:58:41.265] <TB0> INFO: 11533820 events read in total (448014ms).
[15:59:09.148] <TB0> INFO: 12249200 events read in total (475897ms).
[15:59:36.899] <TB0> INFO: 12962640 events read in total (503648ms).
[16:00:04.627] <TB0> INFO: 13675760 events read in total (531376ms).
[16:00:32.274] <TB0> INFO: 14389060 events read in total (559023ms).
[16:01:00.387] <TB0> INFO: 15103540 events read in total (587136ms).
[16:01:25.461] <TB0> INFO: 15817580 events read in total (612210ms).
[16:01:53.677] <TB0> INFO: 16533000 events read in total (640426ms).
[16:01:57.872] <TB0> INFO: 16640000 events read in total (644621ms).
[16:01:57.930] <TB0> INFO: Test took 645733ms.
[16:01:58.126] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:26.757] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.186962 .. 255.000000
[16:02:26.847] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 255 (-1/-1) hits flags = 16 (plus default)
[16:02:26.857] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[16:02:26.857] <TB0> INFO: run 1 of 1
[16:02:27.183] <TB0> INFO: Expecting 21299200 events.
[16:02:54.163] <TB0> INFO: 712200 events read in total (26261ms).
[16:03:16.217] <TB0> INFO: 1424420 events read in total (48315ms).
[16:03:41.839] <TB0> INFO: 2136620 events read in total (73937ms).
[16:04:09.523] <TB0> INFO: 2848860 events read in total (101621ms).
[16:04:37.778] <TB0> INFO: 3561660 events read in total (129876ms).
[16:05:05.786] <TB0> INFO: 4274200 events read in total (157884ms).
[16:05:31.350] <TB0> INFO: 4986580 events read in total (183448ms).
[16:05:56.821] <TB0> INFO: 5699700 events read in total (208919ms).
[16:06:22.509] <TB0> INFO: 6412160 events read in total (234607ms).
[16:06:48.424] <TB0> INFO: 7124520 events read in total (260522ms).
[16:07:14.637] <TB0> INFO: 7836820 events read in total (286735ms).
[16:07:42.394] <TB0> INFO: 8549840 events read in total (314492ms).
[16:08:10.116] <TB0> INFO: 9262580 events read in total (342214ms).
[16:08:37.706] <TB0> INFO: 9975280 events read in total (369804ms).
[16:09:05.092] <TB0> INFO: 10688240 events read in total (397190ms).
[16:09:31.176] <TB0> INFO: 11400640 events read in total (423274ms).
[16:09:58.937] <TB0> INFO: 12113200 events read in total (451035ms).
[16:10:24.926] <TB0> INFO: 12825920 events read in total (477024ms).
[16:10:51.725] <TB0> INFO: 13538060 events read in total (503823ms).
[16:11:19.424] <TB0> INFO: 14249980 events read in total (531522ms).
[16:11:47.165] <TB0> INFO: 14962040 events read in total (559263ms).
[16:12:14.844] <TB0> INFO: 15673580 events read in total (586942ms).
[16:12:42.540] <TB0> INFO: 16384400 events read in total (614638ms).
[16:13:10.228] <TB0> INFO: 17095080 events read in total (642326ms).
[16:13:37.414] <TB0> INFO: 17806320 events read in total (669512ms).
[16:14:02.088] <TB0> INFO: 18517160 events read in total (694186ms).
[16:14:29.176] <TB0> INFO: 19228340 events read in total (721274ms).
[16:14:56.147] <TB0> INFO: 19939620 events read in total (748245ms).
[16:15:22.456] <TB0> INFO: 20651240 events read in total (774554ms).
[16:15:46.779] <TB0> INFO: 21299200 events read in total (798877ms).
[16:15:46.888] <TB0> INFO: Test took 800031ms.
[16:15:47.160] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:16:17.300] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 17.252434 .. 45.980216
[16:16:17.394] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 7 .. 55 (-1/-1) hits flags = 16 (plus default)
[16:16:17.402] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[16:16:17.402] <TB0> INFO: run 1 of 1
[16:16:17.737] <TB0> INFO: Expecting 4076800 events.
[16:16:47.186] <TB0> INFO: 927540 events read in total (28731ms).
[16:17:11.416] <TB0> INFO: 1854040 events read in total (52961ms).
[16:17:39.332] <TB0> INFO: 2780820 events read in total (80878ms).
[16:18:08.066] <TB0> INFO: 3705420 events read in total (109611ms).
[16:18:19.233] <TB0> INFO: 4076800 events read in total (120779ms).
[16:18:19.248] <TB0> INFO: Test took 121845ms.
[16:18:19.284] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:18:32.005] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 2.644304 .. 43.629130
[16:18:32.087] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 2 .. 53 (-1/-1) hits flags = 16 (plus default)
[16:18:32.096] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[16:18:32.096] <TB0> INFO: run 1 of 1
[16:18:32.412] <TB0> INFO: Expecting 4326400 events.
[16:19:03.398] <TB0> INFO: 972000 events read in total (30270ms).
[16:19:33.723] <TB0> INFO: 1944320 events read in total (60595ms).
[16:20:04.149] <TB0> INFO: 2916260 events read in total (91022ms).
[16:20:29.434] <TB0> INFO: 3887240 events read in total (116306ms).
[16:20:43.020] <TB0> INFO: 4326400 events read in total (129892ms).
[16:20:43.036] <TB0> INFO: Test took 130940ms.
[16:20:43.068] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:20:55.794] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 3.139151 .. 43.600759
[16:20:55.869] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 3 .. 53 (-1/-1) hits flags = 16 (plus default)
[16:20:55.878] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[16:20:55.878] <TB0> INFO: run 1 of 1
[16:20:56.183] <TB0> INFO: Expecting 4243200 events.
[16:21:26.840] <TB0> INFO: 966800 events read in total (29941ms).
[16:21:54.902] <TB0> INFO: 1933820 events read in total (58003ms).
[16:22:24.494] <TB0> INFO: 2901260 events read in total (87596ms).
[16:22:53.933] <TB0> INFO: 3868280 events read in total (117034ms).
[16:23:06.798] <TB0> INFO: 4243200 events read in total (129899ms).
[16:23:06.814] <TB0> INFO: Test took 130936ms.
[16:23:06.844] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:23:19.776] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:23:19.776] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[16:23:19.785] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[16:23:19.785] <TB0> INFO: run 1 of 1
[16:23:20.091] <TB0> INFO: Expecting 3411200 events.
[16:23:49.349] <TB0> INFO: 878720 events read in total (28542ms).
[16:24:17.955] <TB0> INFO: 1757160 events read in total (57148ms).
[16:24:46.586] <TB0> INFO: 2635260 events read in total (85779ms).
[16:25:11.869] <TB0> INFO: 3411200 events read in total (111062ms).
[16:25:11.891] <TB0> INFO: Test took 112106ms.
[16:25:11.929] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:25.336] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:25:25.336] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:25:25.336] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:25:25.336] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:25:25.337] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:25:25.338] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:25:25.338] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:25:25.338] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C0.dat
[16:25:25.345] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C1.dat
[16:25:25.353] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C2.dat
[16:25:25.360] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C3.dat
[16:25:25.367] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C4.dat
[16:25:25.375] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C5.dat
[16:25:25.382] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C6.dat
[16:25:25.389] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C7.dat
[16:25:25.397] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C8.dat
[16:25:25.404] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C9.dat
[16:25:25.411] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C10.dat
[16:25:25.418] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C11.dat
[16:25:25.426] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C12.dat
[16:25:25.433] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C13.dat
[16:25:25.440] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C14.dat
[16:25:25.448] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//trimParameters35_C15.dat
[16:25:25.455] <TB0> INFO: PixTestTrim::trimTest() done
[16:25:25.455] <TB0> INFO: vtrim: 94 103 86 85 88 97 92 88 101 98 90 90 85 80 95 110
[16:25:25.455] <TB0> INFO: vthrcomp: 93 103 94 97 91 100 100 89 92 91 93 101 98 85 97 92
[16:25:25.455] <TB0> INFO: vcal mean: 35.02 34.97 35.03 34.92 34.99 34.98 34.97 35.04 35.01 34.96 34.98 34.91 34.98 34.98 34.95 34.99
[16:25:25.455] <TB0> INFO: vcal RMS: 0.67 1.14 0.69 0.87 0.67 0.74 0.73 0.68 0.69 0.73 0.69 0.92 0.66 0.68 0.77 0.72
[16:25:25.455] <TB0> INFO: bits mean: 8.92 9.02 8.93 10.02 8.61 8.90 9.55 8.69 8.39 9.08 8.75 9.42 9.17 9.14 9.12 9.16
[16:25:25.455] <TB0> INFO: bits RMS: 2.73 2.75 2.75 2.61 2.79 2.76 2.88 2.85 3.07 2.72 2.82 2.81 2.84 2.91 2.89 2.73
[16:25:25.462] <TB0> INFO: ----------------------------------------------------------------------
[16:25:25.462] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[16:25:25.462] <TB0> INFO: ----------------------------------------------------------------------
[16:25:25.464] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[16:25:25.473] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[16:25:25.473] <TB0> INFO: run 1 of 1
[16:25:25.788] <TB0> INFO: Expecting 8320000 events.
[16:25:56.815] <TB0> INFO: 964490 events read in total (30311ms).
[16:26:30.008] <TB0> INFO: 1918060 events read in total (63504ms).
[16:27:00.610] <TB0> INFO: 2867800 events read in total (94106ms).
[16:27:32.755] <TB0> INFO: 3813970 events read in total (126251ms).
[16:28:02.643] <TB0> INFO: 4753080 events read in total (156139ms).
[16:28:35.827] <TB0> INFO: 5687820 events read in total (189323ms).
[16:29:03.878] <TB0> INFO: 6621510 events read in total (217374ms).
[16:29:34.263] <TB0> INFO: 7555870 events read in total (247759ms).
[16:30:00.010] <TB0> INFO: 8320000 events read in total (273506ms).
[16:30:00.050] <TB0> INFO: Test took 274577ms.
[16:30:00.149] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:30:27.285] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 182 (-1/-1) hits flags = 16 (plus default)
[16:30:27.294] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[16:30:27.294] <TB0> INFO: run 1 of 1
[16:30:27.603] <TB0> INFO: Expecting 7612800 events.
[16:31:00.358] <TB0> INFO: 963330 events read in total (32039ms).
[16:31:32.326] <TB0> INFO: 1916810 events read in total (64007ms).
[16:32:04.325] <TB0> INFO: 2865870 events read in total (96006ms).
[16:32:33.728] <TB0> INFO: 3812270 events read in total (125409ms).
[16:33:05.570] <TB0> INFO: 4748910 events read in total (157251ms).
[16:33:35.300] <TB0> INFO: 5683740 events read in total (186981ms).
[16:34:04.914] <TB0> INFO: 6618230 events read in total (216595ms).
[16:34:36.116] <TB0> INFO: 7558630 events read in total (247797ms).
[16:34:38.474] <TB0> INFO: 7612800 events read in total (250155ms).
[16:34:38.508] <TB0> INFO: Test took 251214ms.
[16:34:38.601] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:35:02.972] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 168 (-1/-1) hits flags = 16 (plus default)
[16:35:02.981] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[16:35:02.981] <TB0> INFO: run 1 of 1
[16:35:03.285] <TB0> INFO: Expecting 7030400 events.
[16:35:32.672] <TB0> INFO: 1000040 events read in total (28671ms).
[16:36:02.008] <TB0> INFO: 1987790 events read in total (58007ms).
[16:36:30.543] <TB0> INFO: 2971730 events read in total (86543ms).
[16:37:02.282] <TB0> INFO: 3947250 events read in total (118281ms).
[16:37:33.940] <TB0> INFO: 4915930 events read in total (149939ms).
[16:38:05.830] <TB0> INFO: 5882480 events read in total (181829ms).
[16:38:34.143] <TB0> INFO: 6852630 events read in total (210142ms).
[16:38:39.566] <TB0> INFO: 7030400 events read in total (215565ms).
[16:38:39.596] <TB0> INFO: Test took 216615ms.
[16:38:39.671] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:39:04.825] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 167 (-1/-1) hits flags = 16 (plus default)
[16:39:04.834] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[16:39:04.834] <TB0> INFO: run 1 of 1
[16:39:05.151] <TB0> INFO: Expecting 6988800 events.
[16:39:39.312] <TB0> INFO: 1002490 events read in total (33443ms).
[16:40:11.945] <TB0> INFO: 1992480 events read in total (66076ms).
[16:40:45.524] <TB0> INFO: 2978960 events read in total (99656ms).
[16:41:19.841] <TB0> INFO: 3956010 events read in total (133972ms).
[16:41:52.483] <TB0> INFO: 4926700 events read in total (166614ms).
[16:42:24.175] <TB0> INFO: 5895570 events read in total (198306ms).
[16:42:57.652] <TB0> INFO: 6869030 events read in total (231783ms).
[16:43:01.517] <TB0> INFO: 6988800 events read in total (235648ms).
[16:43:01.560] <TB0> INFO: Test took 236726ms.
[16:43:01.653] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:43:25.630] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 167 (-1/-1) hits flags = 16 (plus default)
[16:43:25.639] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[16:43:25.639] <TB0> INFO: run 1 of 1
[16:43:25.944] <TB0> INFO: Expecting 6988800 events.
[16:43:58.735] <TB0> INFO: 1001870 events read in total (32074ms).
[16:44:32.751] <TB0> INFO: 1991560 events read in total (66091ms).
[16:45:05.792] <TB0> INFO: 2977190 events read in total (99132ms).
[16:45:38.751] <TB0> INFO: 3953760 events read in total (132090ms).
[16:46:12.012] <TB0> INFO: 4923770 events read in total (165351ms).
[16:46:45.113] <TB0> INFO: 5892020 events read in total (198452ms).
[16:47:17.895] <TB0> INFO: 6864860 events read in total (231234ms).
[16:47:21.781] <TB0> INFO: 6988800 events read in total (235120ms).
[16:47:21.808] <TB0> INFO: Test took 236169ms.
[16:47:21.886] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:47:44.796] <TB0> INFO: PixTestTrim::trimBitTest() done
[16:47:44.797] <TB0> INFO: PixTestTrim::doTest() done, duration: 4691 seconds
[16:47:45.539] <TB0> INFO: ######################################################################
[16:47:45.539] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:47:45.539] <TB0> INFO: ######################################################################
[16:47:45.872] <TB0> INFO: Expecting 41600 events.
[16:47:50.156] <TB0> INFO: 41600 events read in total (3567ms).
[16:47:50.156] <TB0> INFO: Test took 4616ms.
[16:47:50.162] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:47:50.730] <TB0> INFO: Expecting 41600 events.
[16:47:55.097] <TB0> INFO: 41600 events read in total (3651ms).
[16:47:55.098] <TB0> INFO: Test took 4670ms.
[16:47:55.104] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:47:55.448] <TB0> INFO: Expecting 41600 events.
[16:47:59.766] <TB0> INFO: 41600 events read in total (3602ms).
[16:47:59.767] <TB0> INFO: Test took 4648ms.
[16:47:59.773] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:47:59.779] <TB0> INFO: The DUT currently contains the following objects:
[16:47:59.779] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:47:59.779] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:47:59.779] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:47:59.779] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:47:59.779] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.779] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.779] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:47:59.780] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:00.123] <TB0> INFO: Expecting 2560 events.
[16:48:01.186] <TB0> INFO: 2560 events read in total (347ms).
[16:48:01.186] <TB0> INFO: Test took 1406ms.
[16:48:01.186] <TB0> INFO: The DUT currently contains the following objects:
[16:48:01.186] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:01.186] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:01.186] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:01.186] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:01.186] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.186] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:01.600] <TB0> INFO: Expecting 2560 events.
[16:48:02.676] <TB0> INFO: 2560 events read in total (360ms).
[16:48:02.676] <TB0> INFO: Test took 1490ms.
[16:48:02.677] <TB0> INFO: The DUT currently contains the following objects:
[16:48:02.677] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:02.677] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:02.677] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:02.677] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:02.677] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:02.677] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:03.091] <TB0> INFO: Expecting 2560 events.
[16:48:04.157] <TB0> INFO: 2560 events read in total (350ms).
[16:48:04.158] <TB0> INFO: Test took 1481ms.
[16:48:04.158] <TB0> INFO: The DUT currently contains the following objects:
[16:48:04.158] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:04.158] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:04.158] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:04.158] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:04.158] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.158] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.158] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.158] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.158] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.158] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.158] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.159] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:04.572] <TB0> INFO: Expecting 2560 events.
[16:48:05.639] <TB0> INFO: 2560 events read in total (351ms).
[16:48:05.640] <TB0> INFO: Test took 1481ms.
[16:48:05.640] <TB0> INFO: The DUT currently contains the following objects:
[16:48:05.640] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:05.640] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:05.640] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:05.640] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:05.640] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.640] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.640] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.640] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.640] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.640] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:05.641] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:06.055] <TB0> INFO: Expecting 2560 events.
[16:48:07.122] <TB0> INFO: 2560 events read in total (351ms).
[16:48:07.122] <TB0> INFO: Test took 1481ms.
[16:48:07.123] <TB0> INFO: The DUT currently contains the following objects:
[16:48:07.123] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:07.123] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:07.123] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:07.123] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:07.123] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.123] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:07.537] <TB0> INFO: Expecting 2560 events.
[16:48:08.619] <TB0> INFO: 2560 events read in total (366ms).
[16:48:08.619] <TB0> INFO: Test took 1496ms.
[16:48:08.620] <TB0> INFO: The DUT currently contains the following objects:
[16:48:08.620] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:08.620] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:08.620] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:08.620] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:08.620] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.620] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.621] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.621] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:08.621] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:09.034] <TB0> INFO: Expecting 2560 events.
[16:48:10.102] <TB0> INFO: 2560 events read in total (352ms).
[16:48:10.102] <TB0> INFO: Test took 1481ms.
[16:48:10.103] <TB0> INFO: The DUT currently contains the following objects:
[16:48:10.103] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:10.103] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:10.103] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:10.103] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:10.103] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.103] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.103] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.103] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.103] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.103] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.103] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.103] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.104] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.104] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.104] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.104] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.104] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.104] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.104] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.104] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:10.517] <TB0> INFO: Expecting 2560 events.
[16:48:11.588] <TB0> INFO: 2560 events read in total (355ms).
[16:48:11.588] <TB0> INFO: Test took 1484ms.
[16:48:11.589] <TB0> INFO: The DUT currently contains the following objects:
[16:48:11.589] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:11.589] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:11.589] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:11.589] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:11.589] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.589] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:11.590] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:12.003] <TB0> INFO: Expecting 2560 events.
[16:48:13.070] <TB0> INFO: 2560 events read in total (351ms).
[16:48:13.071] <TB0> INFO: Test took 1481ms.
[16:48:13.071] <TB0> INFO: The DUT currently contains the following objects:
[16:48:13.071] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:13.071] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:13.071] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:13.071] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:13.071] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.071] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.071] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.072] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:13.485] <TB0> INFO: Expecting 2560 events.
[16:48:14.554] <TB0> INFO: 2560 events read in total (353ms).
[16:48:14.555] <TB0> INFO: Test took 1483ms.
[16:48:14.555] <TB0> INFO: The DUT currently contains the following objects:
[16:48:14.555] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:14.555] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:14.555] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:14.555] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:14.555] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.555] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.555] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.555] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.556] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:14.970] <TB0> INFO: Expecting 2560 events.
[16:48:16.051] <TB0> INFO: 2560 events read in total (365ms).
[16:48:16.051] <TB0> INFO: Test took 1495ms.
[16:48:16.051] <TB0> INFO: The DUT currently contains the following objects:
[16:48:16.051] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:16.051] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:16.052] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:16.052] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:16.052] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.052] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:16.466] <TB0> INFO: Expecting 2560 events.
[16:48:17.548] <TB0> INFO: 2560 events read in total (366ms).
[16:48:17.548] <TB0> INFO: Test took 1496ms.
[16:48:17.548] <TB0> INFO: The DUT currently contains the following objects:
[16:48:17.548] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:17.549] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:17.549] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:17.549] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:17.549] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.549] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:17.962] <TB0> INFO: Expecting 2560 events.
[16:48:19.029] <TB0> INFO: 2560 events read in total (351ms).
[16:48:19.030] <TB0> INFO: Test took 1481ms.
[16:48:19.030] <TB0> INFO: The DUT currently contains the following objects:
[16:48:19.030] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:19.030] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:19.030] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:19.030] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:19.030] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.030] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.031] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.031] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.031] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.031] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.031] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:19.444] <TB0> INFO: Expecting 2560 events.
[16:48:20.511] <TB0> INFO: 2560 events read in total (351ms).
[16:48:20.511] <TB0> INFO: Test took 1480ms.
[16:48:20.512] <TB0> INFO: The DUT currently contains the following objects:
[16:48:20.512] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:20.512] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:20.512] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:20.512] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:20.512] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.512] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.512] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.512] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.512] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.512] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.512] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.512] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.512] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.513] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.513] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.513] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.513] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.513] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.513] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.513] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:20.926] <TB0> INFO: Expecting 2560 events.
[16:48:22.003] <TB0> INFO: 2560 events read in total (360ms).
[16:48:22.004] <TB0> INFO: Test took 1491ms.
[16:48:22.004] <TB0> INFO: The DUT currently contains the following objects:
[16:48:22.004] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:22.004] <TB0> INFO: TBM Core alpha (0): 7 registers set
[16:48:22.004] <TB0> INFO: TBM Core beta (1): 7 registers set
[16:48:22.004] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:22.004] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.005] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:22.418] <TB0> INFO: Expecting 2560 events.
[16:48:23.486] <TB0> INFO: 2560 events read in total (352ms).
[16:48:23.486] <TB0> INFO: Test took 1481ms.
[16:48:23.490] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:48:23.903] <TB0> INFO: Expecting 655360 events.
[16:48:41.617] <TB0> INFO: 655360 events read in total (16998ms).
[16:48:41.626] <TB0> INFO: Expecting 655360 events.
[16:49:00.197] <TB0> INFO: 655360 events read in total (18044ms).
[16:49:00.210] <TB0> INFO: Expecting 655360 events.
[16:49:16.974] <TB0> INFO: 655360 events read in total (16236ms).
[16:49:16.992] <TB0> INFO: Expecting 655360 events.
[16:49:35.531] <TB0> INFO: 655360 events read in total (18011ms).
[16:49:35.550] <TB0> INFO: Expecting 655360 events.
[16:49:52.541] <TB0> INFO: 655360 events read in total (16464ms).
[16:49:52.565] <TB0> INFO: Expecting 655360 events.
[16:50:11.475] <TB0> INFO: 655360 events read in total (18383ms).
[16:50:11.504] <TB0> INFO: Expecting 655360 events.
[16:50:28.973] <TB0> INFO: 655360 events read in total (16942ms).
[16:50:29.001] <TB0> INFO: Expecting 655360 events.
[16:50:47.267] <TB0> INFO: 655360 events read in total (17739ms).
[16:50:47.299] <TB0> INFO: Expecting 655360 events.
[16:51:06.066] <TB0> INFO: 655360 events read in total (18240ms).
[16:51:06.102] <TB0> INFO: Expecting 655360 events.
[16:51:23.146] <TB0> INFO: 655360 events read in total (16517ms).
[16:51:23.185] <TB0> INFO: Expecting 655360 events.
[16:51:41.922] <TB0> INFO: 655360 events read in total (18210ms).
[16:51:41.975] <TB0> INFO: Expecting 655360 events.
[16:51:58.512] <TB0> INFO: 655360 events read in total (16010ms).
[16:51:58.560] <TB0> INFO: Expecting 655360 events.
[16:52:17.260] <TB0> INFO: 655360 events read in total (18172ms).
[16:52:17.309] <TB0> INFO: Expecting 655360 events.
[16:52:32.914] <TB0> INFO: 655360 events read in total (15077ms).
[16:52:32.983] <TB0> INFO: Expecting 655360 events.
[16:52:48.325] <TB0> INFO: 655360 events read in total (14814ms).
[16:52:48.383] <TB0> INFO: Expecting 655360 events.
[16:53:05.576] <TB0> INFO: 655360 events read in total (16666ms).
[16:53:05.639] <TB0> INFO: Test took 282149ms.
[16:53:05.720] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:06.030] <TB0> INFO: Expecting 655360 events.
[16:53:23.136] <TB0> INFO: 655360 events read in total (16390ms).
[16:53:23.144] <TB0> INFO: Expecting 655360 events.
[16:53:40.006] <TB0> INFO: 655360 events read in total (16334ms).
[16:53:40.018] <TB0> INFO: Expecting 655360 events.
[16:53:57.365] <TB0> INFO: 655360 events read in total (16820ms).
[16:53:57.381] <TB0> INFO: Expecting 655360 events.
[16:54:14.765] <TB0> INFO: 655360 events read in total (16857ms).
[16:54:14.786] <TB0> INFO: Expecting 655360 events.
[16:54:32.162] <TB0> INFO: 655360 events read in total (16849ms).
[16:54:32.186] <TB0> INFO: Expecting 655360 events.
[16:54:49.191] <TB0> INFO: 655360 events read in total (16477ms).
[16:54:49.219] <TB0> INFO: Expecting 655360 events.
[16:55:06.627] <TB0> INFO: 655360 events read in total (16881ms).
[16:55:06.660] <TB0> INFO: Expecting 655360 events.
[16:55:23.424] <TB0> INFO: 655360 events read in total (16237ms).
[16:55:23.456] <TB0> INFO: Expecting 655360 events.
[16:55:40.650] <TB0> INFO: 655360 events read in total (16666ms).
[16:55:40.689] <TB0> INFO: Expecting 655360 events.
[16:55:57.919] <TB0> INFO: 655360 events read in total (16702ms).
[16:55:57.960] <TB0> INFO: Expecting 655360 events.
[16:56:15.173] <TB0> INFO: 655360 events read in total (16686ms).
[16:56:15.215] <TB0> INFO: Expecting 655360 events.
[16:56:32.437] <TB0> INFO: 655360 events read in total (16694ms).
[16:56:32.488] <TB0> INFO: Expecting 655360 events.
[16:56:49.750] <TB0> INFO: 655360 events read in total (16735ms).
[16:56:49.805] <TB0> INFO: Expecting 655360 events.
[16:57:06.766] <TB0> INFO: 655360 events read in total (16434ms).
[16:57:06.823] <TB0> INFO: Expecting 655360 events.
[16:57:23.926] <TB0> INFO: 655360 events read in total (16575ms).
[16:57:23.987] <TB0> INFO: Expecting 655360 events.
[16:57:41.409] <TB0> INFO: 655360 events read in total (16895ms).
[16:57:41.472] <TB0> INFO: Test took 275752ms.
[16:57:41.663] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.670] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.677] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.684] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.691] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.699] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.706] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.713] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.720] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.727] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.734] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.741] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.748] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.755] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.762] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.769] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:41.817] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:57:41.817] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:57:41.817] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:57:41.817] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:57:41.818] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:57:41.818] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:57:41.818] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:57:41.818] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:57:41.818] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:57:41.819] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:57:41.819] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:57:41.819] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:57:41.819] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:57:41.820] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:57:41.820] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:57:41.820] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:57:42.130] <TB0> INFO: Expecting 41600 events.
[16:57:46.741] <TB0> INFO: 41600 events read in total (3895ms).
[16:57:46.741] <TB0> INFO: Test took 4918ms.
[16:57:47.315] <TB0> INFO: Expecting 41600 events.
[16:57:51.768] <TB0> INFO: 41600 events read in total (3737ms).
[16:57:51.769] <TB0> INFO: Test took 4808ms.
[16:57:52.304] <TB0> INFO: Expecting 41600 events.
[16:57:56.620] <TB0> INFO: 41600 events read in total (3600ms).
[16:57:56.620] <TB0> INFO: Test took 4634ms.
[16:57:56.856] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:57:56.989] <TB0> INFO: Expecting 2560 events.
[16:57:58.053] <TB0> INFO: 2560 events read in total (348ms).
[16:57:58.053] <TB0> INFO: Test took 1197ms.
[16:57:58.056] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:57:58.468] <TB0> INFO: Expecting 2560 events.
[16:57:59.559] <TB0> INFO: 2560 events read in total (375ms).
[16:57:59.559] <TB0> INFO: Test took 1503ms.
[16:57:59.561] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:57:59.974] <TB0> INFO: Expecting 2560 events.
[16:58:01.036] <TB0> INFO: 2560 events read in total (346ms).
[16:58:01.036] <TB0> INFO: Test took 1475ms.
[16:58:01.038] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:01.452] <TB0> INFO: Expecting 2560 events.
[16:58:02.513] <TB0> INFO: 2560 events read in total (345ms).
[16:58:02.513] <TB0> INFO: Test took 1475ms.
[16:58:02.515] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:02.928] <TB0> INFO: Expecting 2560 events.
[16:58:03.992] <TB0> INFO: 2560 events read in total (348ms).
[16:58:03.992] <TB0> INFO: Test took 1477ms.
[16:58:03.994] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:04.408] <TB0> INFO: Expecting 2560 events.
[16:58:05.471] <TB0> INFO: 2560 events read in total (347ms).
[16:58:05.471] <TB0> INFO: Test took 1477ms.
[16:58:05.473] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:05.887] <TB0> INFO: Expecting 2560 events.
[16:58:07.086] <TB0> INFO: 2560 events read in total (348ms).
[16:58:07.087] <TB0> INFO: Test took 1614ms.
[16:58:07.088] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:07.502] <TB0> INFO: Expecting 2560 events.
[16:58:08.566] <TB0> INFO: 2560 events read in total (348ms).
[16:58:08.566] <TB0> INFO: Test took 1478ms.
[16:58:08.568] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:08.981] <TB0> INFO: Expecting 2560 events.
[16:58:10.056] <TB0> INFO: 2560 events read in total (359ms).
[16:58:10.056] <TB0> INFO: Test took 1488ms.
[16:58:10.058] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:10.472] <TB0> INFO: Expecting 2560 events.
[16:58:11.536] <TB0> INFO: 2560 events read in total (348ms).
[16:58:11.537] <TB0> INFO: Test took 1479ms.
[16:58:11.538] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:11.952] <TB0> INFO: Expecting 2560 events.
[16:58:13.040] <TB0> INFO: 2560 events read in total (372ms).
[16:58:13.041] <TB0> INFO: Test took 1503ms.
[16:58:13.042] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:13.456] <TB0> INFO: Expecting 2560 events.
[16:58:14.517] <TB0> INFO: 2560 events read in total (345ms).
[16:58:14.517] <TB0> INFO: Test took 1475ms.
[16:58:14.519] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:14.932] <TB0> INFO: Expecting 2560 events.
[16:58:16.007] <TB0> INFO: 2560 events read in total (358ms).
[16:58:16.008] <TB0> INFO: Test took 1489ms.
[16:58:16.009] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:16.423] <TB0> INFO: Expecting 2560 events.
[16:58:17.513] <TB0> INFO: 2560 events read in total (374ms).
[16:58:17.514] <TB0> INFO: Test took 1505ms.
[16:58:17.516] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:17.930] <TB0> INFO: Expecting 2560 events.
[16:58:18.995] <TB0> INFO: 2560 events read in total (349ms).
[16:58:18.995] <TB0> INFO: Test took 1479ms.
[16:58:18.997] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:19.411] <TB0> INFO: Expecting 2560 events.
[16:58:20.495] <TB0> INFO: 2560 events read in total (368ms).
[16:58:20.495] <TB0> INFO: Test took 1498ms.
[16:58:20.498] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:20.911] <TB0> INFO: Expecting 2560 events.
[16:58:21.994] <TB0> INFO: 2560 events read in total (367ms).
[16:58:21.994] <TB0> INFO: Test took 1496ms.
[16:58:21.997] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:22.410] <TB0> INFO: Expecting 2560 events.
[16:58:23.492] <TB0> INFO: 2560 events read in total (366ms).
[16:58:23.492] <TB0> INFO: Test took 1495ms.
[16:58:23.495] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:23.907] <TB0> INFO: Expecting 2560 events.
[16:58:24.978] <TB0> INFO: 2560 events read in total (355ms).
[16:58:24.979] <TB0> INFO: Test took 1484ms.
[16:58:24.981] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:25.394] <TB0> INFO: Expecting 2560 events.
[16:58:26.467] <TB0> INFO: 2560 events read in total (356ms).
[16:58:26.467] <TB0> INFO: Test took 1486ms.
[16:58:26.470] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:26.883] <TB0> INFO: Expecting 2560 events.
[16:58:27.967] <TB0> INFO: 2560 events read in total (368ms).
[16:58:27.967] <TB0> INFO: Test took 1498ms.
[16:58:27.970] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:28.383] <TB0> INFO: Expecting 2560 events.
[16:58:29.452] <TB0> INFO: 2560 events read in total (352ms).
[16:58:29.452] <TB0> INFO: Test took 1482ms.
[16:58:29.454] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:29.868] <TB0> INFO: Expecting 2560 events.
[16:58:30.937] <TB0> INFO: 2560 events read in total (353ms).
[16:58:30.937] <TB0> INFO: Test took 1483ms.
[16:58:30.940] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:31.353] <TB0> INFO: Expecting 2560 events.
[16:58:32.421] <TB0> INFO: 2560 events read in total (353ms).
[16:58:32.422] <TB0> INFO: Test took 1483ms.
[16:58:32.425] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:32.837] <TB0> INFO: Expecting 2560 events.
[16:58:33.909] <TB0> INFO: 2560 events read in total (355ms).
[16:58:33.909] <TB0> INFO: Test took 1484ms.
[16:58:33.911] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:34.324] <TB0> INFO: Expecting 2560 events.
[16:58:35.422] <TB0> INFO: 2560 events read in total (382ms).
[16:58:35.422] <TB0> INFO: Test took 1511ms.
[16:58:35.425] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:35.838] <TB0> INFO: Expecting 2560 events.
[16:58:36.921] <TB0> INFO: 2560 events read in total (367ms).
[16:58:36.921] <TB0> INFO: Test took 1497ms.
[16:58:36.924] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:37.336] <TB0> INFO: Expecting 2560 events.
[16:58:38.410] <TB0> INFO: 2560 events read in total (357ms).
[16:58:38.410] <TB0> INFO: Test took 1487ms.
[16:58:38.413] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:38.825] <TB0> INFO: Expecting 2560 events.
[16:58:39.951] <TB0> INFO: 2560 events read in total (410ms).
[16:58:39.951] <TB0> INFO: Test took 1538ms.
[16:58:39.954] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:40.366] <TB0> INFO: Expecting 2560 events.
[16:58:41.438] <TB0> INFO: 2560 events read in total (355ms).
[16:58:41.438] <TB0> INFO: Test took 1484ms.
[16:58:41.442] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:41.853] <TB0> INFO: Expecting 2560 events.
[16:58:42.925] <TB0> INFO: 2560 events read in total (356ms).
[16:58:42.925] <TB0> INFO: Test took 1484ms.
[16:58:42.929] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:43.341] <TB0> INFO: Expecting 2560 events.
[16:58:44.410] <TB0> INFO: 2560 events read in total (353ms).
[16:58:44.410] <TB0> INFO: Test took 1481ms.
[16:58:45.022] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 659 seconds
[16:58:45.022] <TB0> INFO: PH scale (per ROC): 68 66 67 69 77 64 72 72 83 78 69 60 78 82 74 72
[16:58:45.022] <TB0> INFO: PH offset (per ROC): 181 187 172 175 173 181 175 179 177 175 179 173 152 160 177 175
[16:58:45.204] <TB0> INFO: ######################################################################
[16:58:45.204] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:58:45.204] <TB0> INFO: ######################################################################
[16:58:45.217] <TB0> INFO: scanning low vcal = 10
[16:58:45.524] <TB0> INFO: Expecting 41600 events.
[16:58:49.300] <TB0> INFO: 41600 events read in total (3060ms).
[16:58:49.300] <TB0> INFO: Test took 4083ms.
[16:58:49.303] <TB0> INFO: scanning low vcal = 20
[16:58:49.714] <TB0> INFO: Expecting 41600 events.
[16:58:53.443] <TB0> INFO: 41600 events read in total (3013ms).
[16:58:53.443] <TB0> INFO: Test took 4139ms.
[16:58:53.447] <TB0> INFO: scanning low vcal = 30
[16:58:53.858] <TB0> INFO: Expecting 41600 events.
[16:58:57.769] <TB0> INFO: 41600 events read in total (3195ms).
[16:58:57.770] <TB0> INFO: Test took 4323ms.
[16:58:57.772] <TB0> INFO: scanning low vcal = 40
[16:58:58.177] <TB0> INFO: Expecting 41600 events.
[16:59:02.493] <TB0> INFO: 41600 events read in total (3600ms).
[16:59:02.494] <TB0> INFO: Test took 4722ms.
[16:59:02.497] <TB0> INFO: scanning low vcal = 50
[16:59:02.842] <TB0> INFO: Expecting 41600 events.
[16:59:07.462] <TB0> INFO: 41600 events read in total (3904ms).
[16:59:07.462] <TB0> INFO: Test took 4965ms.
[16:59:07.466] <TB0> INFO: scanning low vcal = 60
[16:59:07.795] <TB0> INFO: Expecting 41600 events.
[16:59:12.283] <TB0> INFO: 41600 events read in total (3772ms).
[16:59:12.283] <TB0> INFO: Test took 4817ms.
[16:59:12.286] <TB0> INFO: scanning low vcal = 70
[16:59:12.638] <TB0> INFO: Expecting 41600 events.
[16:59:16.909] <TB0> INFO: 41600 events read in total (3555ms).
[16:59:16.909] <TB0> INFO: Test took 4623ms.
[16:59:16.912] <TB0> INFO: scanning low vcal = 80
[16:59:17.267] <TB0> INFO: Expecting 41600 events.
[16:59:21.557] <TB0> INFO: 41600 events read in total (3573ms).
[16:59:21.557] <TB0> INFO: Test took 4645ms.
[16:59:21.561] <TB0> INFO: scanning low vcal = 90
[16:59:21.971] <TB0> INFO: Expecting 41600 events.
[16:59:26.482] <TB0> INFO: 41600 events read in total (3795ms).
[16:59:26.483] <TB0> INFO: Test took 4922ms.
[16:59:26.486] <TB0> INFO: scanning low vcal = 100
[16:59:26.839] <TB0> INFO: Expecting 41600 events.
[16:59:31.331] <TB0> INFO: 41600 events read in total (3775ms).
[16:59:31.332] <TB0> INFO: Test took 4846ms.
[16:59:31.334] <TB0> INFO: scanning low vcal = 110
[16:59:31.680] <TB0> INFO: Expecting 41600 events.
[16:59:35.886] <TB0> INFO: 41600 events read in total (3490ms).
[16:59:35.887] <TB0> INFO: Test took 4553ms.
[16:59:35.889] <TB0> INFO: scanning low vcal = 120
[16:59:36.244] <TB0> INFO: Expecting 41600 events.
[16:59:40.687] <TB0> INFO: 41600 events read in total (3727ms).
[16:59:40.689] <TB0> INFO: Test took 4800ms.
[16:59:40.693] <TB0> INFO: scanning low vcal = 130
[16:59:41.022] <TB0> INFO: Expecting 41600 events.
[16:59:45.520] <TB0> INFO: 41600 events read in total (3782ms).
[16:59:45.521] <TB0> INFO: Test took 4828ms.
[16:59:45.524] <TB0> INFO: scanning low vcal = 140
[16:59:45.874] <TB0> INFO: Expecting 41600 events.
[16:59:50.161] <TB0> INFO: 41600 events read in total (3571ms).
[16:59:50.161] <TB0> INFO: Test took 4637ms.
[16:59:50.164] <TB0> INFO: scanning low vcal = 150
[16:59:50.515] <TB0> INFO: Expecting 41600 events.
[16:59:54.708] <TB0> INFO: 41600 events read in total (3477ms).
[16:59:54.708] <TB0> INFO: Test took 4544ms.
[16:59:54.711] <TB0> INFO: scanning low vcal = 160
[16:59:55.060] <TB0> INFO: Expecting 41600 events.
[16:59:59.552] <TB0> INFO: 41600 events read in total (3776ms).
[16:59:59.552] <TB0> INFO: Test took 4841ms.
[16:59:59.555] <TB0> INFO: scanning low vcal = 170
[16:59:59.895] <TB0> INFO: Expecting 41600 events.
[17:00:04.385] <TB0> INFO: 41600 events read in total (3773ms).
[17:00:04.386] <TB0> INFO: Test took 4831ms.
[17:00:04.390] <TB0> INFO: scanning low vcal = 180
[17:00:04.735] <TB0> INFO: Expecting 41600 events.
[17:00:09.027] <TB0> INFO: 41600 events read in total (3575ms).
[17:00:09.027] <TB0> INFO: Test took 4637ms.
[17:00:09.030] <TB0> INFO: scanning low vcal = 190
[17:00:09.381] <TB0> INFO: Expecting 41600 events.
[17:00:13.764] <TB0> INFO: 41600 events read in total (3667ms).
[17:00:13.765] <TB0> INFO: Test took 4735ms.
[17:00:13.767] <TB0> INFO: scanning low vcal = 200
[17:00:14.115] <TB0> INFO: Expecting 41600 events.
[17:00:18.512] <TB0> INFO: 41600 events read in total (3680ms).
[17:00:18.513] <TB0> INFO: Test took 4746ms.
[17:00:18.516] <TB0> INFO: scanning low vcal = 210
[17:00:18.861] <TB0> INFO: Expecting 41600 events.
[17:00:23.291] <TB0> INFO: 41600 events read in total (3714ms).
[17:00:23.292] <TB0> INFO: Test took 4776ms.
[17:00:23.295] <TB0> INFO: scanning low vcal = 220
[17:00:23.648] <TB0> INFO: Expecting 41600 events.
[17:00:27.877] <TB0> INFO: 41600 events read in total (3513ms).
[17:00:27.878] <TB0> INFO: Test took 4583ms.
[17:00:27.881] <TB0> INFO: scanning low vcal = 230
[17:00:28.224] <TB0> INFO: Expecting 41600 events.
[17:00:32.762] <TB0> INFO: 41600 events read in total (3821ms).
[17:00:32.762] <TB0> INFO: Test took 4881ms.
[17:00:32.765] <TB0> INFO: scanning low vcal = 240
[17:00:33.113] <TB0> INFO: Expecting 41600 events.
[17:00:37.660] <TB0> INFO: 41600 events read in total (3831ms).
[17:00:37.660] <TB0> INFO: Test took 4895ms.
[17:00:37.663] <TB0> INFO: scanning low vcal = 250
[17:00:38.019] <TB0> INFO: Expecting 41600 events.
[17:00:42.296] <TB0> INFO: 41600 events read in total (3561ms).
[17:00:42.296] <TB0> INFO: Test took 4633ms.
[17:00:42.300] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[17:00:42.636] <TB0> INFO: Expecting 41600 events.
[17:00:46.866] <TB0> INFO: 41600 events read in total (3514ms).
[17:00:46.866] <TB0> INFO: Test took 4566ms.
[17:00:46.869] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[17:00:47.215] <TB0> INFO: Expecting 41600 events.
[17:00:51.704] <TB0> INFO: 41600 events read in total (3773ms).
[17:00:51.704] <TB0> INFO: Test took 4835ms.
[17:00:51.707] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[17:00:52.057] <TB0> INFO: Expecting 41600 events.
[17:00:56.407] <TB0> INFO: 41600 events read in total (3634ms).
[17:00:56.408] <TB0> INFO: Test took 4701ms.
[17:00:56.410] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[17:00:56.763] <TB0> INFO: Expecting 41600 events.
[17:01:00.994] <TB0> INFO: 41600 events read in total (3515ms).
[17:01:00.994] <TB0> INFO: Test took 4584ms.
[17:01:00.997] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:01:01.345] <TB0> INFO: Expecting 41600 events.
[17:01:05.507] <TB0> INFO: 41600 events read in total (3447ms).
[17:01:05.508] <TB0> INFO: Test took 4511ms.
[17:01:05.944] <TB0> INFO: PixTestGainPedestal::measure() done
[17:01:39.801] <TB0> INFO: PixTestGainPedestal::fit() done
[17:01:39.801] <TB0> INFO: non-linearity mean: 0.955 0.953 0.966 0.950 0.953 0.961 0.961 0.959 0.955 0.961 0.960 0.949 0.954 0.962 0.955 0.959
[17:01:39.801] <TB0> INFO: non-linearity RMS: 0.008 0.009 0.005 0.006 0.007 0.005 0.006 0.006 0.007 0.008 0.007 0.008 0.006 0.006 0.007 0.006
[17:01:39.801] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[17:01:39.820] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[17:01:39.839] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[17:01:39.858] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[17:01:39.877] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[17:01:39.907] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[17:01:39.935] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[17:01:39.953] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[17:01:39.971] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[17:01:39.989] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[17:01:40.007] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[17:01:40.025] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[17:01:40.044] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[17:01:40.062] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[17:01:40.080] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[17:01:40.098] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[17:01:40.116] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 174 seconds
[17:01:40.122] <TB0> INFO: readReadbackCal: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[17:01:40.123] <TB0> INFO: PixTestReadback::doTest() start.
[17:01:40.124] <TB0> INFO: PixTestReadback::RES sent once
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[17:02:01.875] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[17:02:01.876] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[17:02:01.876] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[17:02:01.876] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[17:02:01.876] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[17:02:01.904] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:02:01.905] <TB0> INFO: PixTestReadback::RES sent once
[17:02:23.610] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[17:02:23.610] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[17:02:23.610] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[17:02:23.610] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[17:02:23.610] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[17:02:23.611] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[17:02:23.611] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[17:02:23.611] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[17:02:23.611] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[17:02:23.612] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[17:02:23.612] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[17:02:23.612] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[17:02:23.612] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[17:02:23.612] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[17:02:23.613] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[17:02:23.613] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[17:02:23.649] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:02:23.649] <TB0> INFO: PixTestReadback::RES sent once
[17:02:40.506] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:02:40.506] <TB0> INFO: Vbg will be calibrated using Vd calibration
[17:02:40.506] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.8calibrated Vbg = 1.23434 :::*/*/*/*/
[17:02:40.506] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 157.8calibrated Vbg = 1.23081 :::*/*/*/*/
[17:02:40.506] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156.6calibrated Vbg = 1.24513 :::*/*/*/*/
[17:02:40.506] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[17:02:40.506] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.9calibrated Vbg = 1.25117 :::*/*/*/*/
[17:02:40.506] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.1calibrated Vbg = 1.26107 :::*/*/*/*/
[17:02:40.506] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155.7calibrated Vbg = 1.26216 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 156calibrated Vbg = 1.25924 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 151calibrated Vbg = 1.25135 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 152.6calibrated Vbg = 1.24818 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 146.4calibrated Vbg = 1.23466 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.1calibrated Vbg = 1.23596 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 170calibrated Vbg = 1.24534 :::*/*/*/*/
[17:02:40.507] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[17:02:40.510] <TB0> INFO: PixTestReadback::RES sent once
[17:07:20.629] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C0.dat
[17:07:20.630] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C1.dat
[17:07:20.630] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C2.dat
[17:07:20.630] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C3.dat
[17:07:20.630] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C4.dat
[17:07:20.630] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C5.dat
[17:07:20.630] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C6.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C7.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C8.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C9.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C10.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C11.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C12.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C13.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C14.dat
[17:07:20.631] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//004_FulltestPxar_p17//readbackCal_C15.dat
[17:07:20.662] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:07:20.664] <TB0> INFO: PixTestReadback::doTest() done
[17:07:20.683] <TB0> INFO: enter test to run
[17:07:20.683] <TB0> INFO: test: exit no parameter change
[17:07:21.386] <TB0> QUIET: Connection to board 73 closed.
[17:07:21.466] <TB0> INFO: pXar: this is the end, my friend