Test Date: 2015-09-02 10:55
Analysis date: 2016-05-26 03:37
Logfile
LogfileView
[09:03:06.188] <TB0> INFO: *** Welcome to pxar ***
[09:03:06.188] <TB0> INFO: *** Today: 2015/09/02
[09:03:06.188] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C15.dat
[09:03:06.188] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:03:06.188] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//defaultMaskFile.dat
[09:03:06.188] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters_C15.dat
[09:03:06.254] <TB0> INFO: clk: 4
[09:03:06.254] <TB0> INFO: ctr: 4
[09:03:06.255] <TB0> INFO: sda: 19
[09:03:06.255] <TB0> INFO: tin: 9
[09:03:06.255] <TB0> INFO: level: 15
[09:03:06.255] <TB0> INFO: triggerdelay: 0
[09:03:06.255] <TB0> QUIET: Instanciating API for pxar prod-10
[09:03:06.255] <TB0> INFO: Log level: INFO
[09:03:06.262] <TB0> INFO: Found DTB DTB_WS6AYH
[09:03:06.271] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[09:03:06.274] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
------------------------------------------------------
[09:03:06.276] <TB0> INFO: RPC call hashes of host and DTB match: 397073690
[09:03:07.786] <TB0> INFO: DUT info:
[09:03:07.786] <TB0> INFO: The DUT currently contains the following objects:
[09:03:07.786] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:03:07.786] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:03:07.786] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:03:07.786] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:03:07.786] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:07.786] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:03:08.187] <TB0> INFO: enter 'restricted' command line mode
[09:03:08.187] <TB0> INFO: enter test to run
[09:03:08.187] <TB0> INFO: test: pretest no parameter change
[09:03:08.187] <TB0> INFO: running: pretest
[09:03:08.191] <TB0> INFO: ######################################################################
[09:03:08.191] <TB0> INFO: PixTestPretest::doTest()
[09:03:08.191] <TB0> INFO: ######################################################################
[09:03:08.192] <TB0> INFO: ----------------------------------------------------------------------
[09:03:08.192] <TB0> INFO: PixTestPretest::programROC()
[09:03:08.192] <TB0> INFO: ----------------------------------------------------------------------
[09:03:26.209] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:03:26.209] <TB0> INFO: IA differences per ROC: 16.9 18.5 18.5 18.5 18.5 17.7 20.1 17.7 19.3 19.3 18.5 18.5 20.1 18.5 19.3 19.3
[09:03:26.279] <TB0> INFO: ----------------------------------------------------------------------
[09:03:26.279] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:03:26.279] <TB0> INFO: ----------------------------------------------------------------------
[09:03:45.840] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 388.3 mA = 24.2687 mA/ROC
[09:03:45.842] <TB0> INFO: ----------------------------------------------------------------------
[09:03:45.843] <TB0> INFO: PixTestPretest::findWorkingPixel()
[09:03:45.843] <TB0> INFO: ----------------------------------------------------------------------
[09:03:45.981] <TB0> INFO: Expecting 231680 events.
[09:03:55.383] <TB0> INFO: 231680 events read in total (8683ms).
[09:03:55.446] <TB0> INFO: Test took 9598ms.
[09:03:55.697] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:03:55.734] <TB0> INFO: ----------------------------------------------------------------------
[09:03:55.734] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[09:03:55.734] <TB0> INFO: ----------------------------------------------------------------------
[09:03:55.872] <TB0> INFO: Expecting 231680 events.
[09:04:05.309] <TB0> INFO: 231680 events read in total (8721ms).
[09:04:05.312] <TB0> INFO: Test took 9572ms.
[09:04:05.642] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[09:04:05.642] <TB0> INFO: CalDel: 135 174 156 144 139 134 130 139 143 147 142 139 143 161 143 140
[09:04:05.642] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:04:05.645] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C0.dat
[09:04:05.645] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C1.dat
[09:04:05.646] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C2.dat
[09:04:05.646] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C3.dat
[09:04:05.646] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C4.dat
[09:04:05.646] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C5.dat
[09:04:05.647] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C6.dat
[09:04:05.647] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C7.dat
[09:04:05.647] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C8.dat
[09:04:05.647] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C9.dat
[09:04:05.648] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C10.dat
[09:04:05.648] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C11.dat
[09:04:05.648] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C12.dat
[09:04:05.648] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C13.dat
[09:04:05.649] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C14.dat
[09:04:05.649] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters_C15.dat
[09:04:05.649] <TB0> INFO: write tbm parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//tbmParameters_C0a.dat
[09:04:05.650] <TB0> INFO: write tbm parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:04:05.650] <TB0> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[09:04:05.746] <TB0> INFO: enter test to run
[09:04:05.746] <TB0> INFO: test: fulltest no parameter change
[09:04:05.746] <TB0> INFO: running: fulltest
[09:04:05.746] <TB0> INFO: ######################################################################
[09:04:05.746] <TB0> INFO: PixTestFullTest::doTest()
[09:04:05.746] <TB0> INFO: ######################################################################
[09:04:05.748] <TB0> INFO: ######################################################################
[09:04:05.748] <TB0> INFO: PixTestAlive::doTest()
[09:04:05.748] <TB0> INFO: ######################################################################
[09:04:05.749] <TB0> INFO: ----------------------------------------------------------------------
[09:04:05.749] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:04:05.749] <TB0> INFO: ----------------------------------------------------------------------
[09:04:06.074] <TB0> INFO: Expecting 41600 events.
[09:04:10.516] <TB0> INFO: 41600 events read in total (3726ms).
[09:04:10.516] <TB0> INFO: Test took 4765ms.
[09:04:10.522] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:10.806] <TB0> INFO: PixTestAlive::aliveTest() done
[09:04:10.806] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0
[09:04:10.808] <TB0> INFO: ----------------------------------------------------------------------
[09:04:10.808] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:04:10.808] <TB0> INFO: ----------------------------------------------------------------------
[09:04:11.127] <TB0> INFO: Expecting 41600 events.
[09:04:14.449] <TB0> INFO: 41600 events read in total (2606ms).
[09:04:14.450] <TB0> INFO: Test took 3641ms.
[09:04:14.450] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:14.450] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:04:14.764] <TB0> INFO: PixTestAlive::maskTest() done
[09:04:14.764] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:04:14.766] <TB0> INFO: ----------------------------------------------------------------------
[09:04:14.766] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:04:14.766] <TB0> INFO: ----------------------------------------------------------------------
[09:04:15.086] <TB0> INFO: Expecting 41600 events.
[09:04:19.496] <TB0> INFO: 41600 events read in total (3694ms).
[09:04:19.497] <TB0> INFO: Test took 4729ms.
[09:04:19.503] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:19.790] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[09:04:19.790] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:04:19.790] <TB0> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[09:04:19.804] <TB0> INFO: ######################################################################
[09:04:19.804] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:04:19.804] <TB0> INFO: ######################################################################
[09:04:19.807] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[09:04:19.830] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[09:04:19.830] <TB0> INFO: run 1 of 1
[09:04:20.136] <TB0> INFO: Expecting 3120000 events.
[09:04:56.313] <TB0> INFO: 844765 events read in total (35460ms).
[09:05:29.013] <TB0> INFO: 1680460 events read in total (68160ms).
[09:06:02.647] <TB0> INFO: 2530495 events read in total (101794ms).
[09:06:26.788] <TB0> INFO: 3120000 events read in total (125935ms).
[09:06:26.843] <TB0> INFO: Test took 127013ms.
[09:06:26.941] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:52.109] <TB0> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[09:06:52.109] <TB0> INFO: number of dead bumps (per ROC): 6 1 0 1 0 0 0 3 2 0 0 0 0 1 0 47
[09:06:52.109] <TB0> INFO: separation cut (per ROC): 85 98 82 88 82 88 86 73 71 85 85 95 97 69 93 64
[09:06:52.180] <TB0> INFO: ######################################################################
[09:06:52.180] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:06:52.180] <TB0> INFO: ######################################################################
[09:06:52.180] <TB0> INFO: ----------------------------------------------------------------------
[09:06:52.180] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:06:52.180] <TB0> INFO: ----------------------------------------------------------------------
[09:06:52.180] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[09:06:52.190] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[09:06:52.190] <TB0> INFO: run 1 of 1
[09:06:52.492] <TB0> INFO: Expecting 31200000 events.
[09:07:16.562] <TB0> INFO: 944200 events read in total (23354ms).
[09:07:43.179] <TB0> INFO: 1874300 events read in total (49972ms).
[09:08:10.132] <TB0> INFO: 2801100 events read in total (76924ms).
[09:08:37.060] <TB0> INFO: 3726650 events read in total (103852ms).
[09:09:04.648] <TB0> INFO: 4648650 events read in total (131440ms).
[09:09:31.824] <TB0> INFO: 5571850 events read in total (158616ms).
[09:09:59.221] <TB0> INFO: 6492250 events read in total (186013ms).
[09:10:26.377] <TB0> INFO: 7415950 events read in total (213169ms).
[09:10:53.042] <TB0> INFO: 8336500 events read in total (239834ms).
[09:11:20.015] <TB0> INFO: 9254950 events read in total (266807ms).
[09:11:46.798] <TB0> INFO: 10173650 events read in total (293590ms).
[09:12:13.905] <TB0> INFO: 11094850 events read in total (320697ms).
[09:12:41.098] <TB0> INFO: 12014050 events read in total (347890ms).
[09:13:08.141] <TB0> INFO: 12931450 events read in total (374933ms).
[09:13:35.318] <TB0> INFO: 13850250 events read in total (402110ms).
[09:14:02.294] <TB0> INFO: 14766150 events read in total (429086ms).
[09:14:29.101] <TB0> INFO: 15682150 events read in total (455893ms).
[09:14:56.224] <TB0> INFO: 16589400 events read in total (483016ms).
[09:15:23.276] <TB0> INFO: 17497150 events read in total (510068ms).
[09:15:50.484] <TB0> INFO: 18404550 events read in total (537276ms).
[09:16:17.389] <TB0> INFO: 19311700 events read in total (564181ms).
[09:16:44.064] <TB0> INFO: 20215500 events read in total (590856ms).
[09:17:11.150] <TB0> INFO: 21119950 events read in total (617942ms).
[09:17:38.891] <TB0> INFO: 22025050 events read in total (645683ms).
[09:18:05.923] <TB0> INFO: 22931650 events read in total (672715ms).
[09:18:32.856] <TB0> INFO: 23832550 events read in total (699648ms).
[09:18:59.532] <TB0> INFO: 24736850 events read in total (726324ms).
[09:19:26.564] <TB0> INFO: 25638850 events read in total (753356ms).
[09:19:53.692] <TB0> INFO: 26542400 events read in total (780484ms).
[09:20:21.065] <TB0> INFO: 27446700 events read in total (807857ms).
[09:20:48.461] <TB0> INFO: 28353900 events read in total (835253ms).
[09:21:13.193] <TB0> INFO: 29259850 events read in total (859985ms).
[09:21:39.744] <TB0> INFO: 30169400 events read in total (886536ms).
[09:22:06.739] <TB0> INFO: 31091350 events read in total (913531ms).
[09:22:10.477] <TB0> INFO: 31200000 events read in total (917269ms).
[09:22:10.520] <TB0> INFO: Test took 918330ms.
[09:22:10.607] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:10.717] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:12.278] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:13.727] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:15.229] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:16.698] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:18.176] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:19.568] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:21.179] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:22.741] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:24.300] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:25.840] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:27.350] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:28.866] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:30.319] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:31.821] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:33.340] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:22:34.949] <TB0> INFO: PixTestScurves::scurves() done
[09:22:34.949] <TB0> INFO: Vcal mean: 88.61 102.11 86.38 82.46 79.49 97.39 83.43 78.86 76.71 87.52 85.72 92.06 90.72 73.91 90.50 74.48
[09:22:34.949] <TB0> INFO: Vcal RMS: 5.28 6.00 5.15 4.80 4.60 6.04 5.27 4.76 4.76 5.85 5.11 5.88 5.05 4.32 6.14 4.90
[09:22:34.949] <TB0> INFO: PixTestScurves::fullTest() done, duration: 942 seconds
[09:22:35.023] <TB0> INFO: ######################################################################
[09:22:35.023] <TB0> INFO: PixTestTrim::doTest()
[09:22:35.023] <TB0> INFO: ######################################################################
[09:22:35.026] <TB0> INFO: ----------------------------------------------------------------------
[09:22:35.026] <TB0> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[09:22:35.026] <TB0> INFO: ----------------------------------------------------------------------
[09:22:35.110] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:22:35.110] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:22:35.119] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[09:22:35.119] <TB0> INFO: run 1 of 1
[09:22:35.435] <TB0> INFO: Expecting 13312000 events.
[09:23:03.556] <TB0> INFO: 1087460 events read in total (27399ms).
[09:23:33.198] <TB0> INFO: 2171820 events read in total (57041ms).
[09:24:02.666] <TB0> INFO: 3253760 events read in total (86509ms).
[09:24:32.279] <TB0> INFO: 4332800 events read in total (116122ms).
[09:25:01.779] <TB0> INFO: 5409020 events read in total (145622ms).
[09:25:31.568] <TB0> INFO: 6481460 events read in total (175411ms).
[09:26:01.645] <TB0> INFO: 7560720 events read in total (205488ms).
[09:26:31.210] <TB0> INFO: 8642600 events read in total (235053ms).
[09:27:00.433] <TB0> INFO: 9726960 events read in total (264276ms).
[09:27:28.262] <TB0> INFO: 10811760 events read in total (292105ms).
[09:27:57.847] <TB0> INFO: 11897580 events read in total (321690ms).
[09:28:27.555] <TB0> INFO: 12984420 events read in total (351398ms).
[09:28:37.557] <TB0> INFO: 13312000 events read in total (361400ms).
[09:28:37.591] <TB0> INFO: Test took 362472ms.
[09:28:37.642] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:57.808] <TB0> INFO: ROC 0 VthrComp = 92
[09:28:57.808] <TB0> INFO: ROC 1 VthrComp = 100
[09:28:57.809] <TB0> INFO: ROC 2 VthrComp = 90
[09:28:57.809] <TB0> INFO: ROC 3 VthrComp = 89
[09:28:57.809] <TB0> INFO: ROC 4 VthrComp = 86
[09:28:57.809] <TB0> INFO: ROC 5 VthrComp = 95
[09:28:57.809] <TB0> INFO: ROC 6 VthrComp = 91
[09:28:57.809] <TB0> INFO: ROC 7 VthrComp = 83
[09:28:57.809] <TB0> INFO: ROC 8 VthrComp = 82
[09:28:57.809] <TB0> INFO: ROC 9 VthrComp = 87
[09:28:57.809] <TB0> INFO: ROC 10 VthrComp = 88
[09:28:57.809] <TB0> INFO: ROC 11 VthrComp = 95
[09:28:57.810] <TB0> INFO: ROC 12 VthrComp = 97
[09:28:57.810] <TB0> INFO: ROC 13 VthrComp = 79
[09:28:57.810] <TB0> INFO: ROC 14 VthrComp = 95
[09:28:57.810] <TB0> INFO: ROC 15 VthrComp = 78
[09:28:57.810] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:28:57.810] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:28:57.819] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[09:28:57.819] <TB0> INFO: run 1 of 1
[09:28:58.133] <TB0> INFO: Expecting 13312000 events.
[09:29:23.118] <TB0> INFO: 779340 events read in total (24269ms).
[09:29:49.848] <TB0> INFO: 1554960 events read in total (50999ms).
[09:30:16.772] <TB0> INFO: 2330020 events read in total (77923ms).
[09:30:44.059] <TB0> INFO: 3105660 events read in total (105210ms).
[09:31:11.433] <TB0> INFO: 3880180 events read in total (132584ms).
[09:31:38.770] <TB0> INFO: 4655700 events read in total (159921ms).
[09:32:06.134] <TB0> INFO: 5431520 events read in total (187285ms).
[09:32:33.642] <TB0> INFO: 6207380 events read in total (214793ms).
[09:33:00.756] <TB0> INFO: 6980480 events read in total (241907ms).
[09:33:27.985] <TB0> INFO: 7749980 events read in total (269136ms).
[09:33:55.357] <TB0> INFO: 8518180 events read in total (296508ms).
[09:34:22.412] <TB0> INFO: 9286140 events read in total (323563ms).
[09:34:47.340] <TB0> INFO: 10053000 events read in total (348491ms).
[09:35:12.856] <TB0> INFO: 10819240 events read in total (374007ms).
[09:35:38.042] <TB0> INFO: 11585340 events read in total (399193ms).
[09:36:03.108] <TB0> INFO: 12352460 events read in total (424259ms).
[09:36:28.356] <TB0> INFO: 13120740 events read in total (449507ms).
[09:36:36.222] <TB0> INFO: 13312000 events read in total (457373ms).
[09:36:36.270] <TB0> INFO: Test took 458450ms.
[09:36:36.420] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:00.101] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 57.8462 for pixel 4/1 mean/min/max = 45.4555/32.537/58.374
[09:37:00.102] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 62.4346 for pixel 2/0 mean/min/max = 47.5138/32.403/62.6246
[09:37:00.102] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 58.1834 for pixel 16/1 mean/min/max = 45.0892/31.8588/58.3197
[09:37:00.102] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 56.7439 for pixel 51/74 mean/min/max = 44.9366/33.1078/56.7655
[09:37:00.102] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 57.4981 for pixel 4/70 mean/min/max = 44.9788/32.3916/57.5659
[09:37:00.103] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 60.1912 for pixel 11/1 mean/min/max = 45.8798/31.5596/60.2
[09:37:00.103] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.2627 for pixel 0/63 mean/min/max = 45.0645/31.8386/58.2904
[09:37:00.103] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.7046 for pixel 1/79 mean/min/max = 44.5691/31.4134/57.7249
[09:37:00.103] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 58.5737 for pixel 0/44 mean/min/max = 45.4707/32.2133/58.728
[09:37:00.104] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 61.2649 for pixel 11/4 mean/min/max = 46.3091/31.3205/61.2976
[09:37:00.104] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 58.3712 for pixel 36/69 mean/min/max = 45.7313/33.0512/58.4114
[09:37:00.104] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.3993 for pixel 25/2 mean/min/max = 44.9765/31.4629/58.4901
[09:37:00.104] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 56.6635 for pixel 14/59 mean/min/max = 44.3562/31.9173/56.795
[09:37:00.105] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 57.0028 for pixel 21/78 mean/min/max = 45.8758/34.7256/57.026
[09:37:00.105] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 60.6149 for pixel 23/79 mean/min/max = 46.1028/31.4307/60.7749
[09:37:00.105] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 60.1046 for pixel 9/5 mean/min/max = 47.0053/33.8146/60.196
[09:37:00.105] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:37:00.237] <TB0> INFO: Expecting 1029120 events.
[09:37:24.482] <TB0> INFO: 1029120 events read in total (23525ms).
[09:37:24.488] <TB0> INFO: Expecting 1029120 events.
[09:37:49.337] <TB0> INFO: 1029120 events read in total (24304ms).
[09:37:49.344] <TB0> INFO: Expecting 1029120 events.
[09:38:14.766] <TB0> INFO: 1029120 events read in total (24887ms).
[09:38:14.775] <TB0> INFO: Expecting 1029120 events.
[09:38:39.817] <TB0> INFO: 1029120 events read in total (24497ms).
[09:38:39.828] <TB0> INFO: Expecting 1029120 events.
[09:39:04.926] <TB0> INFO: 1029120 events read in total (24551ms).
[09:39:04.939] <TB0> INFO: Expecting 1029120 events.
[09:39:29.964] <TB0> INFO: 1029120 events read in total (24490ms).
[09:39:29.979] <TB0> INFO: Expecting 1029120 events.
[09:39:55.033] <TB0> INFO: 1029120 events read in total (24521ms).
[09:39:55.049] <TB0> INFO: Expecting 1029120 events.
[09:40:19.951] <TB0> INFO: 1029120 events read in total (24364ms).
[09:40:19.969] <TB0> INFO: Expecting 1029120 events.
[09:40:44.950] <TB0> INFO: 1029120 events read in total (24436ms).
[09:40:44.969] <TB0> INFO: Expecting 1029120 events.
[09:41:09.787] <TB0> INFO: 1029120 events read in total (24285ms).
[09:41:09.809] <TB0> INFO: Expecting 1029120 events.
[09:41:35.516] <TB0> INFO: 1029120 events read in total (25179ms).
[09:41:35.539] <TB0> INFO: Expecting 1029120 events.
[09:42:00.624] <TB0> INFO: 1029120 events read in total (24557ms).
[09:42:00.652] <TB0> INFO: Expecting 1029120 events.
[09:42:26.371] <TB0> INFO: 1029120 events read in total (25192ms).
[09:42:26.400] <TB0> INFO: Expecting 1029120 events.
[09:42:51.825] <TB0> INFO: 1029120 events read in total (24898ms).
[09:42:51.854] <TB0> INFO: Expecting 1029120 events.
[09:43:17.422] <TB0> INFO: 1029120 events read in total (25040ms).
[09:43:17.456] <TB0> INFO: Expecting 1029120 events.
[09:43:42.590] <TB0> INFO: 1029120 events read in total (24606ms).
[09:43:42.625] <TB0> INFO: Test took 402520ms.
[09:43:43.636] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:43:43.645] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[09:43:43.645] <TB0> INFO: run 1 of 1
[09:43:43.962] <TB0> INFO: Expecting 16640000 events.
[09:44:10.847] <TB0> INFO: 723560 events read in total (26168ms).
[09:44:37.633] <TB0> INFO: 1444400 events read in total (52954ms).
[09:45:04.609] <TB0> INFO: 2165360 events read in total (79930ms).
[09:45:31.260] <TB0> INFO: 2886240 events read in total (106581ms).
[09:45:57.635] <TB0> INFO: 3607400 events read in total (132956ms).
[09:46:24.188] <TB0> INFO: 4327940 events read in total (159509ms).
[09:46:51.061] <TB0> INFO: 5048640 events read in total (186382ms).
[09:47:18.766] <TB0> INFO: 5770620 events read in total (214087ms).
[09:47:45.896] <TB0> INFO: 6491840 events read in total (241217ms).
[09:48:12.926] <TB0> INFO: 7213180 events read in total (268247ms).
[09:48:39.816] <TB0> INFO: 7934720 events read in total (295137ms).
[09:49:06.556] <TB0> INFO: 8653880 events read in total (321877ms).
[09:49:32.979] <TB0> INFO: 9370860 events read in total (348300ms).
[09:49:59.775] <TB0> INFO: 10087160 events read in total (375096ms).
[09:50:26.502] <TB0> INFO: 10802320 events read in total (401823ms).
[09:50:51.088] <TB0> INFO: 11517080 events read in total (426409ms).
[09:51:17.391] <TB0> INFO: 12232100 events read in total (452712ms).
[09:51:43.889] <TB0> INFO: 12945460 events read in total (479210ms).
[09:52:10.643] <TB0> INFO: 13658380 events read in total (505964ms).
[09:52:37.120] <TB0> INFO: 14371260 events read in total (532441ms).
[09:53:04.127] <TB0> INFO: 15085820 events read in total (559448ms).
[09:53:31.039] <TB0> INFO: 15799600 events read in total (586360ms).
[09:53:58.139] <TB0> INFO: 16514900 events read in total (613460ms).
[09:54:03.380] <TB0> INFO: 16640000 events read in total (618701ms).
[09:54:03.446] <TB0> INFO: Test took 619802ms.
[09:54:03.658] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:29.366] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.191901 .. 50.740084
[09:54:29.441] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 60 (-1/-1) hits flags = 16 (plus default)
[09:54:29.450] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[09:54:29.450] <TB0> INFO: run 1 of 1
[09:54:29.753] <TB0> INFO: Expecting 5075200 events.
[09:54:56.812] <TB0> INFO: 926440 events read in total (26338ms).
[09:55:25.520] <TB0> INFO: 1855500 events read in total (55046ms).
[09:55:54.200] <TB0> INFO: 2785140 events read in total (83726ms).
[09:56:23.321] <TB0> INFO: 3709540 events read in total (112847ms).
[09:56:51.793] <TB0> INFO: 4628300 events read in total (141319ms).
[09:57:06.594] <TB0> INFO: 5075200 events read in total (156120ms).
[09:57:06.613] <TB0> INFO: Test took 157164ms.
[09:57:06.652] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:21.245] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 17.785579 .. 45.588798
[09:57:21.326] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 7 .. 55 (-1/-1) hits flags = 16 (plus default)
[09:57:21.335] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[09:57:21.335] <TB0> INFO: run 1 of 1
[09:57:21.649] <TB0> INFO: Expecting 4076800 events.
[09:57:47.146] <TB0> INFO: 926640 events read in total (24781ms).
[09:58:17.514] <TB0> INFO: 1852800 events read in total (55149ms).
[09:58:47.233] <TB0> INFO: 2778300 events read in total (84869ms).
[09:59:17.687] <TB0> INFO: 3702180 events read in total (115322ms).
[09:59:29.489] <TB0> INFO: 4076800 events read in total (127124ms).
[09:59:29.508] <TB0> INFO: Test took 128173ms.
[09:59:29.542] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:42.966] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 21.707871 .. 43.115500
[09:59:43.049] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 11 .. 53 (-1/-1) hits flags = 16 (plus default)
[09:59:43.060] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[09:59:43.060] <TB0> INFO: run 1 of 1
[09:59:43.367] <TB0> INFO: Expecting 3577600 events.
[10:00:08.615] <TB0> INFO: 920880 events read in total (24528ms).
[10:00:38.734] <TB0> INFO: 1842000 events read in total (54647ms).
[10:01:08.759] <TB0> INFO: 2761660 events read in total (84673ms).
[10:01:35.671] <TB0> INFO: 3577600 events read in total (111584ms).
[10:01:35.682] <TB0> INFO: Test took 112622ms.
[10:01:35.716] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:48.017] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 23.675864 .. 42.943190
[10:01:48.094] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 13 .. 52 (-1/-1) hits flags = 16 (plus default)
[10:01:48.103] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[10:01:48.103] <TB0> INFO: run 1 of 1
[10:01:48.409] <TB0> INFO: Expecting 3328000 events.
[10:02:14.336] <TB0> INFO: 915900 events read in total (25211ms).
[10:02:43.665] <TB0> INFO: 1831980 events read in total (54540ms).
[10:03:10.260] <TB0> INFO: 2747360 events read in total (81135ms).
[10:03:29.592] <TB0> INFO: 3328000 events read in total (100467ms).
[10:03:29.608] <TB0> INFO: Test took 101505ms.
[10:03:29.640] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:42.999] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:03:42.999] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[10:03:43.008] <TB0> INFO: dacScan split into 1 runs with ntrig = 20
[10:03:43.008] <TB0> INFO: run 1 of 1
[10:03:43.326] <TB0> INFO: Expecting 3411200 events.
[10:04:09.443] <TB0> INFO: 878660 events read in total (25401ms).
[10:04:38.503] <TB0> INFO: 1757460 events read in total (54462ms).
[10:05:06.247] <TB0> INFO: 2635960 events read in total (82206ms).
[10:05:29.051] <TB0> INFO: 3411200 events read in total (105009ms).
[10:05:29.070] <TB0> INFO: Test took 106063ms.
[10:05:29.107] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:42.432] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:05:42.433] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:05:42.434] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:05:42.434] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:05:42.434] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:05:42.434] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:05:42.434] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:05:42.434] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:05:42.434] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C0.dat
[10:05:42.441] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C1.dat
[10:05:42.447] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C2.dat
[10:05:42.454] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C3.dat
[10:05:42.460] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C4.dat
[10:05:42.466] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C5.dat
[10:05:42.472] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C6.dat
[10:05:42.479] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C7.dat
[10:05:42.486] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C8.dat
[10:05:42.493] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C9.dat
[10:05:42.499] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C10.dat
[10:05:42.506] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C11.dat
[10:05:42.512] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C12.dat
[10:05:42.518] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C13.dat
[10:05:42.525] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C14.dat
[10:05:42.531] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//trimParameters35_C15.dat
[10:05:42.537] <TB0> INFO: PixTestTrim::trimTest() done
[10:05:42.537] <TB0> INFO: vtrim: 95 108 93 80 93 100 84 83 96 99 100 95 92 99 92 101
[10:05:42.537] <TB0> INFO: vthrcomp: 92 100 90 89 86 95 91 83 82 87 88 95 97 79 95 78
[10:05:42.537] <TB0> INFO: vcal mean: 35.01 34.98 34.96 34.98 34.95 34.96 34.99 34.95 35.04 34.98 34.96 35.01 34.99 35.00 34.97 35.00
[10:05:42.537] <TB0> INFO: vcal RMS: 0.67 0.78 0.71 0.82 0.67 0.78 0.69 0.70 0.67 0.74 0.72 0.94 0.68 0.65 0.73 0.68
[10:05:42.537] <TB0> INFO: bits mean: 8.77 8.75 9.56 8.99 9.55 9.57 8.94 9.38 8.69 9.31 9.26 9.68 9.59 9.07 8.89 8.74
[10:05:42.537] <TB0> INFO: bits RMS: 2.91 2.80 2.67 2.80 2.64 2.66 2.99 2.89 3.11 2.80 2.66 2.71 2.73 2.43 3.03 2.70
[10:05:42.544] <TB0> INFO: ----------------------------------------------------------------------
[10:05:42.544] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:05:42.544] <TB0> INFO: ----------------------------------------------------------------------
[10:05:42.547] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[10:05:42.556] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:05:42.556] <TB0> INFO: run 1 of 1
[10:05:42.862] <TB0> INFO: Expecting 8320000 events.
[10:06:11.493] <TB0> INFO: 921150 events read in total (27915ms).
[10:06:40.521] <TB0> INFO: 1833220 events read in total (56943ms).
[10:07:10.896] <TB0> INFO: 2742390 events read in total (87318ms).
[10:07:41.675] <TB0> INFO: 3649490 events read in total (118097ms).
[10:08:12.335] <TB0> INFO: 4552400 events read in total (148757ms).
[10:08:40.176] <TB0> INFO: 5451320 events read in total (176598ms).
[10:09:10.595] <TB0> INFO: 6348330 events read in total (207017ms).
[10:09:40.986] <TB0> INFO: 7245710 events read in total (237408ms).
[10:10:11.768] <TB0> INFO: 8145810 events read in total (268190ms).
[10:10:18.443] <TB0> INFO: 8320000 events read in total (274865ms).
[10:10:18.481] <TB0> INFO: Test took 275925ms.
[10:10:18.595] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:45.266] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 186 (-1/-1) hits flags = 16 (plus default)
[10:10:45.274] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:10:45.274] <TB0> INFO: run 1 of 1
[10:10:45.586] <TB0> INFO: Expecting 7779200 events.
[10:11:15.397] <TB0> INFO: 913630 events read in total (29095ms).
[10:11:44.014] <TB0> INFO: 1818610 events read in total (57712ms).
[10:12:14.029] <TB0> INFO: 2720560 events read in total (87727ms).
[10:12:44.326] <TB0> INFO: 3620840 events read in total (118024ms).
[10:13:15.486] <TB0> INFO: 4514450 events read in total (149184ms).
[10:13:46.678] <TB0> INFO: 5404840 events read in total (180376ms).
[10:14:17.888] <TB0> INFO: 6294250 events read in total (211586ms).
[10:14:49.250] <TB0> INFO: 7185300 events read in total (242948ms).
[10:15:07.642] <TB0> INFO: 7779200 events read in total (261340ms).
[10:15:07.687] <TB0> INFO: Test took 262413ms.
[10:15:07.800] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:33.520] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 170 (-1/-1) hits flags = 16 (plus default)
[10:15:33.529] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:15:33.529] <TB0> INFO: run 1 of 1
[10:15:33.841] <TB0> INFO: Expecting 7113600 events.
[10:16:03.860] <TB0> INFO: 945360 events read in total (29303ms).
[10:16:35.587] <TB0> INFO: 1880900 events read in total (61030ms).
[10:17:07.468] <TB0> INFO: 2813790 events read in total (92911ms).
[10:17:39.839] <TB0> INFO: 3741960 events read in total (125282ms).
[10:18:11.971] <TB0> INFO: 4662420 events read in total (157414ms).
[10:18:44.716] <TB0> INFO: 5580510 events read in total (190159ms).
[10:19:13.439] <TB0> INFO: 6500150 events read in total (218882ms).
[10:19:32.168] <TB0> INFO: 7113600 events read in total (237611ms).
[10:19:32.199] <TB0> INFO: Test took 238670ms.
[10:19:32.294] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:58.701] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[10:19:58.709] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:19:58.709] <TB0> INFO: run 1 of 1
[10:19:59.027] <TB0> INFO: Expecting 6656000 events.
[10:20:32.378] <TB0> INFO: 972400 events read in total (32635ms).
[10:21:04.432] <TB0> INFO: 1934180 events read in total (64689ms).
[10:21:37.211] <TB0> INFO: 2892030 events read in total (97468ms).
[10:22:09.225] <TB0> INFO: 3842290 events read in total (129482ms).
[10:22:41.396] <TB0> INFO: 4786150 events read in total (161653ms).
[10:23:11.239] <TB0> INFO: 5728610 events read in total (191496ms).
[10:23:41.677] <TB0> INFO: 6656000 events read in total (221934ms).
[10:23:41.713] <TB0> INFO: Test took 223004ms.
[10:23:41.793] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:06.143] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 158 (-1/-1) hits flags = 16 (plus default)
[10:24:06.152] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:24:06.152] <TB0> INFO: run 1 of 1
[10:24:06.466] <TB0> INFO: Expecting 6614400 events.
[10:24:38.502] <TB0> INFO: 974360 events read in total (31319ms).
[10:25:09.051] <TB0> INFO: 1938120 events read in total (61868ms).
[10:25:40.385] <TB0> INFO: 2897860 events read in total (93203ms).
[10:26:11.608] <TB0> INFO: 3849660 events read in total (124425ms).
[10:26:43.318] <TB0> INFO: 4795160 events read in total (156135ms).
[10:27:10.766] <TB0> INFO: 5739840 events read in total (183583ms).
[10:27:38.871] <TB0> INFO: 6614400 events read in total (211688ms).
[10:27:38.902] <TB0> INFO: Test took 212749ms.
[10:27:38.975] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:03.686] <TB0> INFO: PixTestTrim::trimBitTest() done
[10:28:03.687] <TB0> INFO: PixTestTrim::doTest() done, duration: 3928 seconds
[10:28:04.424] <TB0> INFO: ######################################################################
[10:28:04.424] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:28:04.424] <TB0> INFO: ######################################################################
[10:28:04.746] <TB0> INFO: Expecting 41600 events.
[10:28:09.517] <TB0> INFO: 41600 events read in total (4055ms).
[10:28:09.517] <TB0> INFO: Test took 5091ms.
[10:28:09.523] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:10.107] <TB0> INFO: Expecting 41600 events.
[10:28:14.635] <TB0> INFO: 41600 events read in total (3812ms).
[10:28:14.635] <TB0> INFO: Test took 4851ms.
[10:28:14.642] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:14.984] <TB0> INFO: Expecting 41600 events.
[10:28:19.751] <TB0> INFO: 41600 events read in total (4051ms).
[10:28:19.751] <TB0> INFO: Test took 5091ms.
[10:28:19.757] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:19.764] <TB0> INFO: The DUT currently contains the following objects:
[10:28:19.764] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:19.764] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:19.764] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:19.764] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:19.764] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:19.764] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.106] <TB0> INFO: Expecting 2560 events.
[10:28:21.174] <TB0> INFO: 2560 events read in total (352ms).
[10:28:21.174] <TB0> INFO: Test took 1410ms.
[10:28:21.174] <TB0> INFO: The DUT currently contains the following objects:
[10:28:21.175] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:21.175] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:21.175] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:21.175] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:21.175] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.175] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.588] <TB0> INFO: Expecting 2560 events.
[10:28:22.657] <TB0> INFO: 2560 events read in total (353ms).
[10:28:22.657] <TB0> INFO: Test took 1482ms.
[10:28:22.658] <TB0> INFO: The DUT currently contains the following objects:
[10:28:22.658] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:22.658] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:22.658] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:22.658] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:22.658] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.658] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.659] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.659] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.072] <TB0> INFO: Expecting 2560 events.
[10:28:24.143] <TB0> INFO: 2560 events read in total (355ms).
[10:28:24.143] <TB0> INFO: Test took 1484ms.
[10:28:24.144] <TB0> INFO: The DUT currently contains the following objects:
[10:28:24.144] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:24.144] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:24.144] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:24.144] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:24.144] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.144] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.558] <TB0> INFO: Expecting 2560 events.
[10:28:25.642] <TB0> INFO: 2560 events read in total (368ms).
[10:28:25.642] <TB0> INFO: Test took 1498ms.
[10:28:25.643] <TB0> INFO: The DUT currently contains the following objects:
[10:28:25.643] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:25.643] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:25.643] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:25.643] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:25.643] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.643] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.643] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.643] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.643] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.643] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.643] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.643] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.644] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.644] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.644] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.644] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.644] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.644] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.644] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.644] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:26.057] <TB0> INFO: Expecting 2560 events.
[10:28:27.125] <TB0> INFO: 2560 events read in total (352ms).
[10:28:27.125] <TB0> INFO: Test took 1481ms.
[10:28:27.126] <TB0> INFO: The DUT currently contains the following objects:
[10:28:27.126] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:27.126] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:27.126] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:27.126] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:27.126] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.126] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:27.540] <TB0> INFO: Expecting 2560 events.
[10:28:28.624] <TB0> INFO: 2560 events read in total (368ms).
[10:28:28.624] <TB0> INFO: Test took 1498ms.
[10:28:28.625] <TB0> INFO: The DUT currently contains the following objects:
[10:28:28.625] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:28.625] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:28.625] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:28.625] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:28.625] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:28.625] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:29.039] <TB0> INFO: Expecting 2560 events.
[10:28:30.108] <TB0> INFO: 2560 events read in total (353ms).
[10:28:30.108] <TB0> INFO: Test took 1483ms.
[10:28:30.109] <TB0> INFO: The DUT currently contains the following objects:
[10:28:30.109] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:30.109] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:30.109] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:30.109] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:30.109] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.109] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:30.523] <TB0> INFO: Expecting 2560 events.
[10:28:31.587] <TB0> INFO: 2560 events read in total (348ms).
[10:28:31.587] <TB0> INFO: Test took 1478ms.
[10:28:31.588] <TB0> INFO: The DUT currently contains the following objects:
[10:28:31.588] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:31.588] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:31.588] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:31.588] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:31.588] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:31.588] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:32.002] <TB0> INFO: Expecting 2560 events.
[10:28:33.071] <TB0> INFO: 2560 events read in total (353ms).
[10:28:33.071] <TB0> INFO: Test took 1482ms.
[10:28:33.071] <TB0> INFO: The DUT currently contains the following objects:
[10:28:33.071] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:33.072] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:33.072] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:33.072] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:33.072] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.072] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:33.486] <TB0> INFO: Expecting 2560 events.
[10:28:34.557] <TB0> INFO: 2560 events read in total (355ms).
[10:28:34.558] <TB0> INFO: Test took 1486ms.
[10:28:34.558] <TB0> INFO: The DUT currently contains the following objects:
[10:28:34.558] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:34.558] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:34.558] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:34.558] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:34.558] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.558] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.558] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.558] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.559] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:34.972] <TB0> INFO: Expecting 2560 events.
[10:28:36.056] <TB0> INFO: 2560 events read in total (367ms).
[10:28:36.056] <TB0> INFO: Test took 1497ms.
[10:28:36.057] <TB0> INFO: The DUT currently contains the following objects:
[10:28:36.057] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:36.057] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:36.057] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:36.057] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:36.057] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.057] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.058] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.058] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:36.470] <TB0> INFO: Expecting 2560 events.
[10:28:37.540] <TB0> INFO: 2560 events read in total (353ms).
[10:28:37.542] <TB0> INFO: Test took 1484ms.
[10:28:37.542] <TB0> INFO: The DUT currently contains the following objects:
[10:28:37.542] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:37.542] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:37.542] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:37.542] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:37.543] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.543] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.543] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.543] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.543] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.543] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.543] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.543] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.543] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.545] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.545] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.545] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.545] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.545] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.546] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.546] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:37.954] <TB0> INFO: Expecting 2560 events.
[10:28:39.022] <TB0> INFO: 2560 events read in total (351ms).
[10:28:39.022] <TB0> INFO: Test took 1476ms.
[10:28:39.022] <TB0> INFO: The DUT currently contains the following objects:
[10:28:39.022] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:39.022] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:39.022] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:39.022] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:39.022] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.022] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.023] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.023] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.023] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:39.437] <TB0> INFO: Expecting 2560 events.
[10:28:40.504] <TB0> INFO: 2560 events read in total (351ms).
[10:28:40.505] <TB0> INFO: Test took 1482ms.
[10:28:40.505] <TB0> INFO: The DUT currently contains the following objects:
[10:28:40.505] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:40.505] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:40.505] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:40.505] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:40.505] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.505] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.506] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.506] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.506] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.506] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.506] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.506] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:40.919] <TB0> INFO: Expecting 2560 events.
[10:28:41.988] <TB0> INFO: 2560 events read in total (352ms).
[10:28:41.988] <TB0> INFO: Test took 1482ms.
[10:28:41.989] <TB0> INFO: The DUT currently contains the following objects:
[10:28:41.989] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:41.989] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:28:41.989] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:28:41.989] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:41.989] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.989] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.990] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.990] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:41.990] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:42.403] <TB0> INFO: Expecting 2560 events.
[10:28:43.470] <TB0> INFO: 2560 events read in total (351ms).
[10:28:43.471] <TB0> INFO: Test took 1481ms.
[10:28:43.474] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:28:43.887] <TB0> INFO: Expecting 655360 events.
[10:29:03.217] <TB0> INFO: 655360 events read in total (18614ms).
[10:29:03.230] <TB0> INFO: Expecting 655360 events.
[10:29:21.986] <TB0> INFO: 655360 events read in total (18229ms).
[10:29:22.001] <TB0> INFO: Expecting 655360 events.
[10:29:40.981] <TB0> INFO: 655360 events read in total (18452ms).
[10:29:41.000] <TB0> INFO: Expecting 655360 events.
[10:29:57.664] <TB0> INFO: 655360 events read in total (16137ms).
[10:29:57.686] <TB0> INFO: Expecting 655360 events.
[10:30:16.247] <TB0> INFO: 655360 events read in total (18033ms).
[10:30:16.274] <TB0> INFO: Expecting 655360 events.
[10:30:35.139] <TB0> INFO: 655360 events read in total (18338ms).
[10:30:35.168] <TB0> INFO: Expecting 655360 events.
[10:30:53.940] <TB0> INFO: 655360 events read in total (18244ms).
[10:30:53.976] <TB0> INFO: Expecting 655360 events.
[10:31:12.853] <TB0> INFO: 655360 events read in total (18349ms).
[10:31:12.889] <TB0> INFO: Expecting 655360 events.
[10:31:31.929] <TB0> INFO: 655360 events read in total (18514ms).
[10:31:31.972] <TB0> INFO: Expecting 655360 events.
[10:31:50.855] <TB0> INFO: 655360 events read in total (18355ms).
[10:31:50.899] <TB0> INFO: Expecting 655360 events.
[10:32:10.197] <TB0> INFO: 655360 events read in total (18771ms).
[10:32:10.249] <TB0> INFO: Expecting 655360 events.
[10:32:29.063] <TB0> INFO: 655360 events read in total (18287ms).
[10:32:29.112] <TB0> INFO: Expecting 655360 events.
[10:32:47.636] <TB0> INFO: 655360 events read in total (17996ms).
[10:32:47.690] <TB0> INFO: Expecting 655360 events.
[10:33:06.407] <TB0> INFO: 655360 events read in total (18189ms).
[10:33:06.470] <TB0> INFO: Expecting 655360 events.
[10:33:25.671] <TB0> INFO: 655360 events read in total (18673ms).
[10:33:25.758] <TB0> INFO: Expecting 655360 events.
[10:33:44.883] <TB0> INFO: 655360 events read in total (18597ms).
[10:33:44.950] <TB0> INFO: Test took 301476ms.
[10:33:45.031] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:45.341] <TB0> INFO: Expecting 655360 events.
[10:34:02.487] <TB0> INFO: 655360 events read in total (16430ms).
[10:34:02.495] <TB0> INFO: Expecting 655360 events.
[10:34:21.115] <TB0> INFO: 655360 events read in total (18092ms).
[10:34:21.129] <TB0> INFO: Expecting 655360 events.
[10:34:40.101] <TB0> INFO: 655360 events read in total (18444ms).
[10:34:40.117] <TB0> INFO: Expecting 655360 events.
[10:34:58.602] <TB0> INFO: 655360 events read in total (17958ms).
[10:34:58.624] <TB0> INFO: Expecting 655360 events.
[10:35:16.082] <TB0> INFO: 655360 events read in total (16931ms).
[10:35:16.107] <TB0> INFO: Expecting 655360 events.
[10:35:33.242] <TB0> INFO: 655360 events read in total (16607ms).
[10:35:33.270] <TB0> INFO: Expecting 655360 events.
[10:35:51.355] <TB0> INFO: 655360 events read in total (17558ms).
[10:35:51.384] <TB0> INFO: Expecting 655360 events.
[10:36:09.263] <TB0> INFO: 655360 events read in total (17352ms).
[10:36:09.300] <TB0> INFO: Expecting 655360 events.
[10:36:27.330] <TB0> INFO: 655360 events read in total (17502ms).
[10:36:27.375] <TB0> INFO: Expecting 655360 events.
[10:36:44.421] <TB0> INFO: 655360 events read in total (16519ms).
[10:36:44.460] <TB0> INFO: Expecting 655360 events.
[10:37:03.331] <TB0> INFO: 655360 events read in total (18343ms).
[10:37:03.377] <TB0> INFO: Expecting 655360 events.
[10:37:21.366] <TB0> INFO: 655360 events read in total (17461ms).
[10:37:21.411] <TB0> INFO: Expecting 655360 events.
[10:37:38.572] <TB0> INFO: 655360 events read in total (16633ms).
[10:37:38.627] <TB0> INFO: Expecting 655360 events.
[10:37:55.961] <TB0> INFO: 655360 events read in total (16807ms).
[10:37:56.020] <TB0> INFO: Expecting 655360 events.
[10:38:12.785] <TB0> INFO: 655360 events read in total (16237ms).
[10:38:12.844] <TB0> INFO: Expecting 655360 events.
[10:38:29.682] <TB0> INFO: 655360 events read in total (16310ms).
[10:38:29.746] <TB0> INFO: Test took 284715ms.
[10:38:29.933] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:29.939] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:29.946] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:29.955] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:29.964] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:29.972] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:29.979] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:29.986] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:29.993] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:30.000] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:30.007] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:30.014] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:30.020] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:30.027] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:30.035] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:30.043] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:38:30.088] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:38:30.089] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:38:30.089] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:38:30.089] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:38:30.089] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:38:30.089] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:38:30.090] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:38:30.090] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:38:30.090] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:38:30.090] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:38:30.091] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:38:30.091] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:38:30.091] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:38:30.091] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:38:30.092] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:38:30.092] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:38:30.404] <TB0> INFO: Expecting 41600 events.
[10:38:34.933] <TB0> INFO: 41600 events read in total (3813ms).
[10:38:34.933] <TB0> INFO: Test took 4838ms.
[10:38:35.477] <TB0> INFO: Expecting 41600 events.
[10:38:39.999] <TB0> INFO: 41600 events read in total (3806ms).
[10:38:39.999] <TB0> INFO: Test took 4841ms.
[10:38:40.545] <TB0> INFO: Expecting 41600 events.
[10:38:45.034] <TB0> INFO: 41600 events read in total (3773ms).
[10:38:45.035] <TB0> INFO: Test took 4805ms.
[10:38:45.273] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:45.405] <TB0> INFO: Expecting 2560 events.
[10:38:46.474] <TB0> INFO: 2560 events read in total (353ms).
[10:38:46.474] <TB0> INFO: Test took 1201ms.
[10:38:46.477] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:46.890] <TB0> INFO: Expecting 2560 events.
[10:38:47.959] <TB0> INFO: 2560 events read in total (353ms).
[10:38:47.959] <TB0> INFO: Test took 1482ms.
[10:38:47.962] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:48.374] <TB0> INFO: Expecting 2560 events.
[10:38:49.458] <TB0> INFO: 2560 events read in total (367ms).
[10:38:49.458] <TB0> INFO: Test took 1496ms.
[10:38:49.460] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:49.872] <TB0> INFO: Expecting 2560 events.
[10:38:50.941] <TB0> INFO: 2560 events read in total (352ms).
[10:38:50.942] <TB0> INFO: Test took 1482ms.
[10:38:50.945] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:51.357] <TB0> INFO: Expecting 2560 events.
[10:38:52.426] <TB0> INFO: 2560 events read in total (353ms).
[10:38:52.426] <TB0> INFO: Test took 1482ms.
[10:38:52.428] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:52.842] <TB0> INFO: Expecting 2560 events.
[10:38:53.909] <TB0> INFO: 2560 events read in total (351ms).
[10:38:53.910] <TB0> INFO: Test took 1482ms.
[10:38:53.912] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:54.326] <TB0> INFO: Expecting 2560 events.
[10:38:55.409] <TB0> INFO: 2560 events read in total (367ms).
[10:38:55.410] <TB0> INFO: Test took 1499ms.
[10:38:55.414] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:55.826] <TB0> INFO: Expecting 2560 events.
[10:38:56.908] <TB0> INFO: 2560 events read in total (366ms).
[10:38:56.908] <TB0> INFO: Test took 1494ms.
[10:38:56.910] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:57.324] <TB0> INFO: Expecting 2560 events.
[10:38:58.392] <TB0> INFO: 2560 events read in total (352ms).
[10:38:58.392] <TB0> INFO: Test took 1482ms.
[10:38:58.393] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:38:58.808] <TB0> INFO: Expecting 2560 events.
[10:38:59.879] <TB0> INFO: 2560 events read in total (354ms).
[10:38:59.879] <TB0> INFO: Test took 1486ms.
[10:38:59.882] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:00.295] <TB0> INFO: Expecting 2560 events.
[10:39:01.363] <TB0> INFO: 2560 events read in total (352ms).
[10:39:01.363] <TB0> INFO: Test took 1482ms.
[10:39:01.366] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:01.779] <TB0> INFO: Expecting 2560 events.
[10:39:02.861] <TB0> INFO: 2560 events read in total (366ms).
[10:39:02.862] <TB0> INFO: Test took 1496ms.
[10:39:02.864] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:03.277] <TB0> INFO: Expecting 2560 events.
[10:39:04.373] <TB0> INFO: 2560 events read in total (380ms).
[10:39:04.373] <TB0> INFO: Test took 1509ms.
[10:39:04.376] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:04.789] <TB0> INFO: Expecting 2560 events.
[10:39:05.858] <TB0> INFO: 2560 events read in total (353ms).
[10:39:05.858] <TB0> INFO: Test took 1482ms.
[10:39:05.861] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:06.274] <TB0> INFO: Expecting 2560 events.
[10:39:07.355] <TB0> INFO: 2560 events read in total (364ms).
[10:39:07.355] <TB0> INFO: Test took 1495ms.
[10:39:07.358] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:07.769] <TB0> INFO: Expecting 2560 events.
[10:39:08.838] <TB0> INFO: 2560 events read in total (352ms).
[10:39:08.839] <TB0> INFO: Test took 1482ms.
[10:39:08.841] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:09.254] <TB0> INFO: Expecting 2560 events.
[10:39:10.335] <TB0> INFO: 2560 events read in total (365ms).
[10:39:10.336] <TB0> INFO: Test took 1495ms.
[10:39:10.339] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:10.751] <TB0> INFO: Expecting 2560 events.
[10:39:11.834] <TB0> INFO: 2560 events read in total (366ms).
[10:39:11.834] <TB0> INFO: Test took 1495ms.
[10:39:11.837] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:12.249] <TB0> INFO: Expecting 2560 events.
[10:39:13.316] <TB0> INFO: 2560 events read in total (351ms).
[10:39:13.316] <TB0> INFO: Test took 1480ms.
[10:39:13.319] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:13.732] <TB0> INFO: Expecting 2560 events.
[10:39:14.799] <TB0> INFO: 2560 events read in total (351ms).
[10:39:14.800] <TB0> INFO: Test took 1481ms.
[10:39:14.802] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:15.215] <TB0> INFO: Expecting 2560 events.
[10:39:16.296] <TB0> INFO: 2560 events read in total (365ms).
[10:39:16.297] <TB0> INFO: Test took 1495ms.
[10:39:16.299] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:16.712] <TB0> INFO: Expecting 2560 events.
[10:39:17.779] <TB0> INFO: 2560 events read in total (351ms).
[10:39:17.780] <TB0> INFO: Test took 1481ms.
[10:39:17.782] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:18.196] <TB0> INFO: Expecting 2560 events.
[10:39:19.263] <TB0> INFO: 2560 events read in total (351ms).
[10:39:19.264] <TB0> INFO: Test took 1482ms.
[10:39:19.266] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:19.679] <TB0> INFO: Expecting 2560 events.
[10:39:20.786] <TB0> INFO: 2560 events read in total (390ms).
[10:39:20.786] <TB0> INFO: Test took 1520ms.
[10:39:20.789] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:21.202] <TB0> INFO: Expecting 2560 events.
[10:39:22.269] <TB0> INFO: 2560 events read in total (351ms).
[10:39:22.270] <TB0> INFO: Test took 1481ms.
[10:39:22.273] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:22.686] <TB0> INFO: Expecting 2560 events.
[10:39:23.753] <TB0> INFO: 2560 events read in total (351ms).
[10:39:23.754] <TB0> INFO: Test took 1481ms.
[10:39:23.756] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:24.169] <TB0> INFO: Expecting 2560 events.
[10:39:25.281] <TB0> INFO: 2560 events read in total (395ms).
[10:39:25.281] <TB0> INFO: Test took 1525ms.
[10:39:25.283] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:25.697] <TB0> INFO: Expecting 2560 events.
[10:39:26.765] <TB0> INFO: 2560 events read in total (352ms).
[10:39:26.766] <TB0> INFO: Test took 1483ms.
[10:39:26.768] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:27.181] <TB0> INFO: Expecting 2560 events.
[10:39:28.250] <TB0> INFO: 2560 events read in total (352ms).
[10:39:28.250] <TB0> INFO: Test took 1482ms.
[10:39:28.255] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:28.666] <TB0> INFO: Expecting 2560 events.
[10:39:29.766] <TB0> INFO: 2560 events read in total (384ms).
[10:39:29.766] <TB0> INFO: Test took 1512ms.
[10:39:29.769] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:30.182] <TB0> INFO: Expecting 2560 events.
[10:39:31.251] <TB0> INFO: 2560 events read in total (353ms).
[10:39:31.251] <TB0> INFO: Test took 1482ms.
[10:39:31.255] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:31.667] <TB0> INFO: Expecting 2560 events.
[10:39:32.735] <TB0> INFO: 2560 events read in total (352ms).
[10:39:32.735] <TB0> INFO: Test took 1481ms.
[10:39:33.343] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 688 seconds
[10:39:33.343] <TB0> INFO: PH scale (per ROC): 78 74 73 80 89 73 82 88 92 90 77 68 89 95 82 79
[10:39:33.343] <TB0> INFO: PH offset (per ROC): 163 169 151 155 150 163 154 157 160 154 162 151 132 142 156 155
[10:39:33.519] <TB0> INFO: ######################################################################
[10:39:33.519] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:39:33.519] <TB0> INFO: ######################################################################
[10:39:33.529] <TB0> INFO: scanning low vcal = 10
[10:39:33.835] <TB0> INFO: Expecting 41600 events.
[10:39:37.450] <TB0> INFO: 41600 events read in total (2899ms).
[10:39:37.450] <TB0> INFO: Test took 3921ms.
[10:39:37.452] <TB0> INFO: scanning low vcal = 20
[10:39:37.866] <TB0> INFO: Expecting 41600 events.
[10:39:41.528] <TB0> INFO: 41600 events read in total (2946ms).
[10:39:41.528] <TB0> INFO: Test took 4076ms.
[10:39:41.532] <TB0> INFO: scanning low vcal = 30
[10:39:41.943] <TB0> INFO: Expecting 41600 events.
[10:39:45.576] <TB0> INFO: 41600 events read in total (2917ms).
[10:39:45.577] <TB0> INFO: Test took 4045ms.
[10:39:45.579] <TB0> INFO: scanning low vcal = 40
[10:39:45.981] <TB0> INFO: Expecting 41600 events.
[10:39:50.146] <TB0> INFO: 41600 events read in total (3449ms).
[10:39:50.147] <TB0> INFO: Test took 4568ms.
[10:39:50.150] <TB0> INFO: scanning low vcal = 50
[10:39:50.494] <TB0> INFO: Expecting 41600 events.
[10:39:54.673] <TB0> INFO: 41600 events read in total (3463ms).
[10:39:54.674] <TB0> INFO: Test took 4524ms.
[10:39:54.677] <TB0> INFO: scanning low vcal = 60
[10:39:55.027] <TB0> INFO: Expecting 41600 events.
[10:39:59.209] <TB0> INFO: 41600 events read in total (3466ms).
[10:39:59.210] <TB0> INFO: Test took 4533ms.
[10:39:59.212] <TB0> INFO: scanning low vcal = 70
[10:39:59.561] <TB0> INFO: Expecting 41600 events.
[10:40:03.737] <TB0> INFO: 41600 events read in total (3460ms).
[10:40:03.738] <TB0> INFO: Test took 4526ms.
[10:40:03.741] <TB0> INFO: scanning low vcal = 80
[10:40:04.085] <TB0> INFO: Expecting 41600 events.
[10:40:08.287] <TB0> INFO: 41600 events read in total (3486ms).
[10:40:08.287] <TB0> INFO: Test took 4546ms.
[10:40:08.291] <TB0> INFO: scanning low vcal = 90
[10:40:08.633] <TB0> INFO: Expecting 41600 events.
[10:40:12.939] <TB0> INFO: 41600 events read in total (3590ms).
[10:40:12.940] <TB0> INFO: Test took 4649ms.
[10:40:12.943] <TB0> INFO: scanning low vcal = 100
[10:40:13.290] <TB0> INFO: Expecting 41600 events.
[10:40:17.521] <TB0> INFO: 41600 events read in total (3515ms).
[10:40:17.521] <TB0> INFO: Test took 4578ms.
[10:40:17.525] <TB0> INFO: scanning low vcal = 110
[10:40:17.868] <TB0> INFO: Expecting 41600 events.
[10:40:22.091] <TB0> INFO: 41600 events read in total (3507ms).
[10:40:22.092] <TB0> INFO: Test took 4567ms.
[10:40:22.094] <TB0> INFO: scanning low vcal = 120
[10:40:22.448] <TB0> INFO: Expecting 41600 events.
[10:40:26.608] <TB0> INFO: 41600 events read in total (3444ms).
[10:40:26.609] <TB0> INFO: Test took 4515ms.
[10:40:26.611] <TB0> INFO: scanning low vcal = 130
[10:40:26.965] <TB0> INFO: Expecting 41600 events.
[10:40:31.139] <TB0> INFO: 41600 events read in total (3458ms).
[10:40:31.139] <TB0> INFO: Test took 4528ms.
[10:40:31.142] <TB0> INFO: scanning low vcal = 140
[10:40:31.494] <TB0> INFO: Expecting 41600 events.
[10:40:35.799] <TB0> INFO: 41600 events read in total (3589ms).
[10:40:35.800] <TB0> INFO: Test took 4658ms.
[10:40:35.802] <TB0> INFO: scanning low vcal = 150
[10:40:36.152] <TB0> INFO: Expecting 41600 events.
[10:40:40.453] <TB0> INFO: 41600 events read in total (3585ms).
[10:40:40.453] <TB0> INFO: Test took 4651ms.
[10:40:40.456] <TB0> INFO: scanning low vcal = 160
[10:40:40.797] <TB0> INFO: Expecting 41600 events.
[10:40:44.980] <TB0> INFO: 41600 events read in total (3466ms).
[10:40:44.981] <TB0> INFO: Test took 4525ms.
[10:40:44.983] <TB0> INFO: scanning low vcal = 170
[10:40:45.336] <TB0> INFO: Expecting 41600 events.
[10:40:49.578] <TB0> INFO: 41600 events read in total (3526ms).
[10:40:49.578] <TB0> INFO: Test took 4595ms.
[10:40:49.583] <TB0> INFO: scanning low vcal = 180
[10:40:49.930] <TB0> INFO: Expecting 41600 events.
[10:40:54.230] <TB0> INFO: 41600 events read in total (3584ms).
[10:40:54.230] <TB0> INFO: Test took 4647ms.
[10:40:54.233] <TB0> INFO: scanning low vcal = 190
[10:40:54.584] <TB0> INFO: Expecting 41600 events.
[10:40:58.881] <TB0> INFO: 41600 events read in total (3581ms).
[10:40:58.881] <TB0> INFO: Test took 4648ms.
[10:40:58.884] <TB0> INFO: scanning low vcal = 200
[10:40:59.224] <TB0> INFO: Expecting 41600 events.
[10:41:03.284] <TB0> INFO: 41600 events read in total (3344ms).
[10:41:03.285] <TB0> INFO: Test took 4401ms.
[10:41:03.288] <TB0> INFO: scanning low vcal = 210
[10:41:03.611] <TB0> INFO: Expecting 41600 events.
[10:41:07.748] <TB0> INFO: 41600 events read in total (3421ms).
[10:41:07.749] <TB0> INFO: Test took 4461ms.
[10:41:07.752] <TB0> INFO: scanning low vcal = 220
[10:41:08.103] <TB0> INFO: Expecting 41600 events.
[10:41:12.259] <TB0> INFO: 41600 events read in total (3440ms).
[10:41:12.259] <TB0> INFO: Test took 4507ms.
[10:41:12.262] <TB0> INFO: scanning low vcal = 230
[10:41:12.616] <TB0> INFO: Expecting 41600 events.
[10:41:16.703] <TB0> INFO: 41600 events read in total (3371ms).
[10:41:16.703] <TB0> INFO: Test took 4441ms.
[10:41:16.706] <TB0> INFO: scanning low vcal = 240
[10:41:17.061] <TB0> INFO: Expecting 41600 events.
[10:41:21.164] <TB0> INFO: 41600 events read in total (3387ms).
[10:41:21.165] <TB0> INFO: Test took 4459ms.
[10:41:21.167] <TB0> INFO: scanning low vcal = 250
[10:41:21.521] <TB0> INFO: Expecting 41600 events.
[10:41:25.558] <TB0> INFO: 41600 events read in total (3321ms).
[10:41:25.559] <TB0> INFO: Test took 4392ms.
[10:41:25.563] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[10:41:25.914] <TB0> INFO: Expecting 41600 events.
[10:41:29.954] <TB0> INFO: 41600 events read in total (3324ms).
[10:41:29.954] <TB0> INFO: Test took 4391ms.
[10:41:29.957] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[10:41:30.312] <TB0> INFO: Expecting 41600 events.
[10:41:34.623] <TB0> INFO: 41600 events read in total (3595ms).
[10:41:34.623] <TB0> INFO: Test took 4666ms.
[10:41:34.682] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[10:41:35.002] <TB0> INFO: Expecting 41600 events.
[10:41:39.268] <TB0> INFO: 41600 events read in total (3550ms).
[10:41:39.268] <TB0> INFO: Test took 4586ms.
[10:41:39.271] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[10:41:39.626] <TB0> INFO: Expecting 41600 events.
[10:41:43.921] <TB0> INFO: 41600 events read in total (3579ms).
[10:41:43.921] <TB0> INFO: Test took 4651ms.
[10:41:43.924] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:41:44.275] <TB0> INFO: Expecting 41600 events.
[10:41:48.500] <TB0> INFO: 41600 events read in total (3508ms).
[10:41:48.501] <TB0> INFO: Test took 4577ms.
[10:41:48.995] <TB0> INFO: PixTestGainPedestal::measure() done
[10:42:21.874] <TB0> INFO: PixTestGainPedestal::fit() done
[10:42:21.874] <TB0> INFO: non-linearity mean: 0.953 0.951 0.958 0.955 0.956 0.959 0.961 0.963 0.946 0.960 0.956 0.947 0.957 0.960 0.953 0.953
[10:42:21.874] <TB0> INFO: non-linearity RMS: 0.007 0.007 0.005 0.005 0.005 0.005 0.005 0.005 0.007 0.006 0.006 0.006 0.004 0.006 0.006 0.006
[10:42:21.874] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:42:21.893] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:42:21.911] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:42:21.945] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:42:21.978] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:42:22.008] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:42:22.027] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:42:22.060] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:42:22.081] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:42:22.101] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:42:22.119] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:42:22.137] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:42:22.155] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:42:22.173] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:42:22.192] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:42:22.210] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:42:22.228] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[10:42:22.234] <TB0> INFO: readReadbackCal: /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C15.dat
[10:42:22.235] <TB0> INFO: PixTestReadback::doTest() start.
[10:42:22.236] <TB0> INFO: PixTestReadback::RES sent once
[10:42:43.991] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C0.dat
[10:42:43.996] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C1.dat
[10:42:43.996] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C2.dat
[10:42:43.996] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C3.dat
[10:42:43.996] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C4.dat
[10:42:43.996] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C5.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C6.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C7.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C8.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C9.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C10.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C11.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C12.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C13.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C14.dat
[10:42:43.997] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C15.dat
[10:42:44.030] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:42:44.030] <TB0> INFO: PixTestReadback::RES sent once
[10:43:05.734] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C0.dat
[10:43:05.734] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C1.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C2.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C3.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C4.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C5.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C6.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C7.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C8.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C9.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C10.dat
[10:43:05.735] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C11.dat
[10:43:05.736] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C12.dat
[10:43:05.736] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C13.dat
[10:43:05.736] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C14.dat
[10:43:05.736] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C15.dat
[10:43:05.767] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:43:05.768] <TB0> INFO: PixTestReadback::RES sent once
[10:43:22.620] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:43:22.620] <TB0> INFO: Vbg will be calibrated using Vd calibration
[10:43:22.620] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.4calibrated Vbg = 1.21051 :::*/*/*/*/
[10:43:22.620] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 157.1calibrated Vbg = 1.20582 :::*/*/*/*/
[10:43:22.620] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156calibrated Vbg = 1.22071 :::*/*/*/*/
[10:43:22.620] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[10:43:22.620] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154calibrated Vbg = 1.22533 :::*/*/*/*/
[10:43:22.620] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.3calibrated Vbg = 1.23801 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 153.5calibrated Vbg = 1.23019 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.7calibrated Vbg = 1.23354 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 150calibrated Vbg = 1.22968 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 152.3calibrated Vbg = 1.22435 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 145calibrated Vbg = 1.21187 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 148.5calibrated Vbg = 1.21451 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 170.2calibrated Vbg = 1.22277 :::*/*/*/*/
[10:43:22.621] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[10:43:22.624] <TB0> INFO: PixTestReadback::RES sent once
[10:48:02.818] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C0.dat
[10:48:02.818] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C1.dat
[10:48:02.818] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C2.dat
[10:48:02.818] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C3.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C4.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C5.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C6.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C7.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C8.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C9.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C10.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C11.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C12.dat
[10:48:02.819] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C13.dat
[10:48:02.820] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C14.dat
[10:48:02.820] <TB0> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2092_FullQualification_2015-09-02_10h55m_1441184145//000_FulltestPxar_m20//readbackCal_C15.dat
[10:48:02.849] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:48:02.849] <TB0> INFO: PixTestReadback::doTest() done
[10:48:02.865] <TB0> INFO: enter test to run
[10:48:02.865] <TB0> INFO: test: exit no parameter change
[10:48:03.438] <TB0> QUIET: Connection to board 73 closed.
[10:48:03.517] <TB0> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master