Test Date: 2015-08-28 10:45
Analysis date: 2016-05-26 03:30
Logfile
LogfileView
[12:46:17.956] <TB3> INFO: *** Welcome to pxar ***
[12:46:17.956] <TB3> INFO: *** Today: 2015/08/28
[12:46:17.956] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C15.dat
[12:46:17.957] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:46:17.957] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//defaultMaskFile.dat
[12:46:17.957] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters_C15.dat
[12:46:18.027] <TB3> INFO: clk: 4
[12:46:18.027] <TB3> INFO: ctr: 4
[12:46:18.027] <TB3> INFO: sda: 19
[12:46:18.027] <TB3> INFO: tin: 9
[12:46:18.027] <TB3> INFO: level: 15
[12:46:18.027] <TB3> INFO: triggerdelay: 0
[12:46:18.027] <TB3> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[12:46:18.027] <TB3> INFO: Log level: INFO
[12:46:18.034] <TB3> INFO: Found DTB DTB_WZ4I6J
[12:46:18.042] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[12:46:18.045] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[12:46:18.048] <TB3> INFO: RPC call hashes of host and DTB match: 397073690
[12:46:19.577] <TB3> INFO: DUT info:
[12:46:19.577] <TB3> INFO: The DUT currently contains the following objects:
[12:46:19.577] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:46:19.577] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:46:19.577] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:46:19.577] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:46:19.577] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.577] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.577] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.577] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.577] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.578] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:19.979] <TB3> INFO: enter 'restricted' command line mode
[12:46:19.979] <TB3> INFO: enter test to run
[12:46:19.979] <TB3> INFO: test: pretest no parameter change
[12:46:19.979] <TB3> INFO: running: pretest
[12:46:19.986] <TB3> INFO: ######################################################################
[12:46:19.986] <TB3> INFO: PixTestPretest::doTest()
[12:46:19.986] <TB3> INFO: ######################################################################
[12:46:19.987] <TB3> INFO: ----------------------------------------------------------------------
[12:46:19.987] <TB3> INFO: PixTestPretest::programROC()
[12:46:19.987] <TB3> INFO: ----------------------------------------------------------------------
[12:46:38.005] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:46:38.005] <TB3> INFO: IA differences per ROC: 16.9 20.1 19.3 19.3 16.9 18.5 18.5 18.5 19.3 19.3 17.7 18.5 16.9 18.5 20.9 20.1
[12:46:38.081] <TB3> INFO: ----------------------------------------------------------------------
[12:46:38.081] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:46:38.081] <TB3> INFO: ----------------------------------------------------------------------
[12:46:45.180] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[12:46:45.181] <TB3> INFO: ----------------------------------------------------------------------
[12:46:45.181] <TB3> INFO: PixTestPretest::findTiming()
[12:46:45.181] <TB3> INFO: ----------------------------------------------------------------------
[12:46:45.181] <TB3> INFO: PixTestCmd::init()
[12:46:45.782] <TB3> WARNING: Not unmasking DUT, not setting Calibrate bits!

[12:48:37.304] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 4, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:48:37.305] <TB3> INFO: (success/tries = 100/100), width = 4
[12:48:37.306] <TB3> INFO: ----------------------------------------------------------------------
[12:48:37.306] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:48:37.306] <TB3> INFO: ----------------------------------------------------------------------
[12:48:37.442] <TB3> INFO: Expecting 231680 events.
[12:48:46.251] <TB3> INFO: 231680 events read in total (8092ms).
[12:48:46.255] <TB3> INFO: Test took 8946ms.
[12:48:46.562] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:48:46.599] <TB3> INFO: ----------------------------------------------------------------------
[12:48:46.599] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:48:46.599] <TB3> INFO: ----------------------------------------------------------------------
[12:48:46.737] <TB3> INFO: Expecting 231680 events.
[12:48:56.014] <TB3> INFO: 231680 events read in total (8561ms).
[12:48:56.018] <TB3> INFO: Test took 9414ms.
[12:48:56.343] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:48:56.343] <TB3> INFO: CalDel: 133 149 140 171 150 142 168 146 141 133 127 129 143 161 142 153
[12:48:56.343] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:48:56.345] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C0.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C1.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C2.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C3.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C4.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C5.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C6.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C7.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C8.dat
[12:48:56.346] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C9.dat
[12:48:56.347] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C10.dat
[12:48:56.347] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C11.dat
[12:48:56.347] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C12.dat
[12:48:56.347] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C13.dat
[12:48:56.347] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C14.dat
[12:48:56.347] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C15.dat
[12:48:56.347] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0a.dat
[12:48:56.347] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:48:56.347] <TB3> INFO: PixTestPretest::doTest() done, duration: 156 seconds
[12:48:56.411] <TB3> INFO: enter test to run
[12:48:56.411] <TB3> INFO: test: fulltest no parameter change
[12:48:56.411] <TB3> INFO: running: fulltest
[12:48:56.411] <TB3> INFO: ######################################################################
[12:48:56.411] <TB3> INFO: PixTestFullTest::doTest()
[12:48:56.411] <TB3> INFO: ######################################################################
[12:48:56.412] <TB3> INFO: ######################################################################
[12:48:56.412] <TB3> INFO: PixTestAlive::doTest()
[12:48:56.412] <TB3> INFO: ######################################################################
[12:48:56.414] <TB3> INFO: ----------------------------------------------------------------------
[12:48:56.414] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:48:56.414] <TB3> INFO: ----------------------------------------------------------------------
[12:48:56.718] <TB3> INFO: Expecting 41600 events.
[12:49:01.163] <TB3> INFO: 41600 events read in total (3729ms).
[12:49:01.163] <TB3> INFO: Test took 4748ms.
[12:49:01.170] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:01.448] <TB3> INFO: PixTestAlive::aliveTest() done
[12:49:01.448] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:49:01.450] <TB3> INFO: ----------------------------------------------------------------------
[12:49:01.450] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:49:01.450] <TB3> INFO: ----------------------------------------------------------------------
[12:49:01.760] <TB3> INFO: Expecting 41600 events.
[12:49:04.880] <TB3> INFO: 41600 events read in total (2404ms).
[12:49:04.880] <TB3> INFO: Test took 3429ms.
[12:49:04.880] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:04.881] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:49:05.186] <TB3> INFO: PixTestAlive::maskTest() done
[12:49:05.186] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:49:05.188] <TB3> INFO: ----------------------------------------------------------------------
[12:49:05.188] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:49:05.188] <TB3> INFO: ----------------------------------------------------------------------
[12:49:05.499] <TB3> INFO: Expecting 41600 events.
[12:49:09.876] <TB3> INFO: 41600 events read in total (3661ms).
[12:49:09.877] <TB3> INFO: Test took 4688ms.
[12:49:09.883] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:10.173] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:49:10.173] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:49:10.173] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:49:10.182] <TB3> INFO: ######################################################################
[12:49:10.182] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:49:10.182] <TB3> INFO: ######################################################################
[12:49:10.185] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[12:49:10.299] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:49:10.299] <TB3> INFO: run 1 of 1
[12:49:10.611] <TB3> INFO: Expecting 3120000 events.
[12:49:46.478] <TB3> INFO: 852630 events read in total (35150ms).
[12:50:21.373] <TB3> INFO: 1690425 events read in total (70045ms).
[12:50:55.474] <TB3> INFO: 2540430 events read in total (104146ms).
[12:51:17.853] <TB3> INFO: 3120000 events read in total (126525ms).
[12:51:17.911] <TB3> INFO: Test took 127612ms.
[12:51:18.019] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:41.519] <TB3> INFO: PixTestBBMap::doTest() done, duration: 151 seconds
[12:51:41.519] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 9 0 2
[12:51:41.519] <TB3> INFO: separation cut (per ROC): 98 97 93 77 89 80 76 83 94 89 97 96 102 70 76 86
[12:51:41.590] <TB3> INFO: ######################################################################
[12:51:41.590] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:51:41.590] <TB3> INFO: ######################################################################
[12:51:41.590] <TB3> INFO: ----------------------------------------------------------------------
[12:51:41.590] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:51:41.590] <TB3> INFO: ----------------------------------------------------------------------
[12:51:41.590] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[12:51:41.598] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:51:41.598] <TB3> INFO: run 1 of 1
[12:51:41.919] <TB3> INFO: Expecting 31200000 events.
[12:52:07.044] <TB3> INFO: 966800 events read in total (24409ms).
[12:52:31.379] <TB3> INFO: 1917050 events read in total (48744ms).
[12:52:55.595] <TB3> INFO: 2863150 events read in total (72960ms).
[12:53:19.935] <TB3> INFO: 3810400 events read in total (97300ms).
[12:53:44.126] <TB3> INFO: 4753850 events read in total (121491ms).
[12:54:08.070] <TB3> INFO: 5696950 events read in total (145435ms).
[12:54:29.841] <TB3> INFO: 6640150 events read in total (167206ms).
[12:54:51.821] <TB3> INFO: 7581600 events read in total (189186ms).
[12:55:13.901] <TB3> INFO: 8523450 events read in total (211266ms).
[12:55:35.932] <TB3> INFO: 9462150 events read in total (233297ms).
[12:56:00.051] <TB3> INFO: 10401900 events read in total (257416ms).
[12:56:24.315] <TB3> INFO: 11341950 events read in total (281680ms).
[12:56:48.576] <TB3> INFO: 12279000 events read in total (305941ms).
[12:57:12.713] <TB3> INFO: 13219550 events read in total (330078ms).
[12:57:36.842] <TB3> INFO: 14155100 events read in total (354207ms).
[12:58:00.957] <TB3> INFO: 15093650 events read in total (378322ms).
[12:58:24.856] <TB3> INFO: 16019800 events read in total (402221ms).
[12:58:48.910] <TB3> INFO: 16949550 events read in total (426275ms).
[12:59:12.938] <TB3> INFO: 17872150 events read in total (450303ms).
[12:59:36.927] <TB3> INFO: 18799450 events read in total (474292ms).
[13:00:00.842] <TB3> INFO: 19721550 events read in total (498207ms).
[13:00:24.764] <TB3> INFO: 20645550 events read in total (522129ms).
[13:00:48.631] <TB3> INFO: 21567700 events read in total (545996ms).
[13:01:12.605] <TB3> INFO: 22490650 events read in total (569970ms).
[13:01:36.593] <TB3> INFO: 23411900 events read in total (593958ms).
[13:02:00.653] <TB3> INFO: 24333250 events read in total (618018ms).
[13:02:24.776] <TB3> INFO: 25254100 events read in total (642141ms).
[13:02:48.936] <TB3> INFO: 26173600 events read in total (666301ms).
[13:03:13.108] <TB3> INFO: 27094100 events read in total (690473ms).
[13:03:37.201] <TB3> INFO: 28013700 events read in total (714566ms).
[13:04:01.232] <TB3> INFO: 28939050 events read in total (738597ms).
[13:04:25.385] <TB3> INFO: 29860300 events read in total (762750ms).
[13:04:49.796] <TB3> INFO: 30791250 events read in total (787161ms).
[13:04:59.747] <TB3> INFO: 31200000 events read in total (797112ms).
[13:04:59.779] <TB3> INFO: Test took 798181ms.
[13:04:59.858] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:59.992] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:01.448] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:02.799] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:04.272] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:05.748] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:07.141] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:08.545] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:09.958] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:11.366] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:12.767] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:14.158] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:15.538] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:16.942] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:18.370] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:19.794] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:21.228] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:05:22.777] <TB3> INFO: PixTestScurves::scurves() done
[13:05:22.777] <TB3> INFO: Vcal mean: 104.70 105.20 95.44 82.53 102.44 84.97 84.67 90.58 88.12 84.11 97.11 95.17 95.07 78.13 79.05 93.00
[13:05:22.777] <TB3> INFO: Vcal RMS: 6.32 6.58 5.93 4.57 7.09 4.98 5.64 7.21 5.21 4.97 6.94 6.33 6.19 4.21 3.93 6.77
[13:05:22.777] <TB3> INFO: PixTestScurves::fullTest() done, duration: 821 seconds
[13:05:22.856] <TB3> INFO: ######################################################################
[13:05:22.856] <TB3> INFO: PixTestTrim::doTest()
[13:05:22.856] <TB3> INFO: ######################################################################
[13:05:22.857] <TB3> INFO: ----------------------------------------------------------------------
[13:05:22.857] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:05:22.857] <TB3> INFO: ----------------------------------------------------------------------
[13:05:22.943] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:05:22.943] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[13:05:22.951] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:05:22.951] <TB3> INFO: run 1 of 1
[13:05:23.264] <TB3> INFO: Expecting 13312000 events.
[13:05:51.491] <TB3> INFO: 1088600 events read in total (27508ms).
[13:06:17.614] <TB3> INFO: 2174520 events read in total (53631ms).
[13:06:44.902] <TB3> INFO: 3259220 events read in total (80919ms).
[13:07:10.066] <TB3> INFO: 4341320 events read in total (106083ms).
[13:07:37.752] <TB3> INFO: 5419240 events read in total (133770ms).
[13:08:05.481] <TB3> INFO: 6496360 events read in total (161498ms).
[13:08:33.214] <TB3> INFO: 7578980 events read in total (189231ms).
[13:09:01.071] <TB3> INFO: 8666240 events read in total (217088ms).
[13:09:28.889] <TB3> INFO: 9755840 events read in total (244906ms).
[13:09:56.557] <TB3> INFO: 10846100 events read in total (272574ms).
[13:10:24.501] <TB3> INFO: 11938780 events read in total (300518ms).
[13:10:52.329] <TB3> INFO: 13034280 events read in total (328346ms).
[13:10:59.725] <TB3> INFO: 13312000 events read in total (335742ms).
[13:10:59.761] <TB3> INFO: Test took 336810ms.
[13:10:59.817] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:19.009] <TB3> INFO: ROC 0 VthrComp = 102
[13:11:19.009] <TB3> INFO: ROC 1 VthrComp = 101
[13:11:19.010] <TB3> INFO: ROC 2 VthrComp = 98
[13:11:19.010] <TB3> INFO: ROC 3 VthrComp = 86
[13:11:19.010] <TB3> INFO: ROC 4 VthrComp = 94
[13:11:19.010] <TB3> INFO: ROC 5 VthrComp = 88
[13:11:19.010] <TB3> INFO: ROC 6 VthrComp = 88
[13:11:19.010] <TB3> INFO: ROC 7 VthrComp = 88
[13:11:19.010] <TB3> INFO: ROC 8 VthrComp = 94
[13:11:19.010] <TB3> INFO: ROC 9 VthrComp = 90
[13:11:19.010] <TB3> INFO: ROC 10 VthrComp = 94
[13:11:19.010] <TB3> INFO: ROC 11 VthrComp = 97
[13:11:19.011] <TB3> INFO: ROC 12 VthrComp = 98
[13:11:19.011] <TB3> INFO: ROC 13 VthrComp = 84
[13:11:19.011] <TB3> INFO: ROC 14 VthrComp = 86
[13:11:19.011] <TB3> INFO: ROC 15 VthrComp = 94
[13:11:19.011] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:11:19.011] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[13:11:19.020] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:11:19.020] <TB3> INFO: run 1 of 1
[13:11:19.339] <TB3> INFO: Expecting 13312000 events.
[13:11:44.999] <TB3> INFO: 782740 events read in total (24944ms).
[13:12:09.952] <TB3> INFO: 1562080 events read in total (49897ms).
[13:12:34.957] <TB3> INFO: 2340260 events read in total (74902ms).
[13:12:57.337] <TB3> INFO: 3118240 events read in total (97282ms).
[13:13:21.608] <TB3> INFO: 3895940 events read in total (121553ms).
[13:13:45.216] <TB3> INFO: 4674200 events read in total (145161ms).
[13:14:10.140] <TB3> INFO: 5451780 events read in total (170085ms).
[13:14:34.905] <TB3> INFO: 6229660 events read in total (194850ms).
[13:14:59.521] <TB3> INFO: 7003700 events read in total (219466ms).
[13:15:24.117] <TB3> INFO: 7774300 events read in total (244062ms).
[13:15:48.925] <TB3> INFO: 8543200 events read in total (268870ms).
[13:16:13.786] <TB3> INFO: 9311000 events read in total (293731ms).
[13:16:38.540] <TB3> INFO: 10077960 events read in total (318485ms).
[13:17:03.256] <TB3> INFO: 10843500 events read in total (343201ms).
[13:17:28.025] <TB3> INFO: 11608240 events read in total (367970ms).
[13:17:52.808] <TB3> INFO: 12374000 events read in total (392753ms).
[13:18:17.755] <TB3> INFO: 13141300 events read in total (417700ms).
[13:18:23.653] <TB3> INFO: 13312000 events read in total (423598ms).
[13:18:23.706] <TB3> INFO: Test took 424686ms.
[13:18:23.866] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:47.879] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 62.4794 for pixel 1/71 mean/min/max = 46.9664/31.3171/62.6157
[13:18:47.879] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 64.4118 for pixel 8/73 mean/min/max = 47.9199/31.3357/64.5041
[13:18:47.880] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.697 for pixel 18/1 mean/min/max = 46.7245/31.7383/61.7106
[13:18:47.880] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 56.8137 for pixel 41/5 mean/min/max = 44.6285/32.3806/56.8764
[13:18:47.880] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 67.9631 for pixel 0/23 mean/min/max = 49.4108/30.8174/68.0042
[13:18:47.881] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.9315 for pixel 14/25 mean/min/max = 46.0937/33.5436/58.6437
[13:18:47.881] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 58.6137 for pixel 15/66 mean/min/max = 45.8152/32.9883/58.6421
[13:18:47.881] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 64.1367 for pixel 21/79 mean/min/max = 47.8074/31.3205/64.2942
[13:18:47.881] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 58.2184 for pixel 6/1 mean/min/max = 45.0245/31.6784/58.3707
[13:18:47.882] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.4997 for pixel 0/2 mean/min/max = 46.1566/32.657/59.6562
[13:18:47.882] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 65.2729 for pixel 0/20 mean/min/max = 47.7701/30.2657/65.2746
[13:18:47.883] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 60.7847 for pixel 3/1 mean/min/max = 45.8967/30.9076/60.8857
[13:18:47.883] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.7622 for pixel 37/79 mean/min/max = 46.3173/31.7736/60.861
[13:18:47.883] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.2635 for pixel 17/6 mean/min/max = 44.6513/32.8689/56.4337
[13:18:47.884] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 56.0446 for pixel 51/39 mean/min/max = 44.3838/32.4795/56.2882
[13:18:47.884] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 62.7022 for pixel 24/10 mean/min/max = 46.5994/30.4105/62.7883
[13:18:47.884] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:18:48.016] <TB3> INFO: Expecting 1029120 events.
[13:19:12.180] <TB3> INFO: 1029120 events read in total (23447ms).
[13:19:12.187] <TB3> INFO: Expecting 1029120 events.
[13:19:35.861] <TB3> INFO: 1029120 events read in total (23146ms).
[13:19:35.871] <TB3> INFO: Expecting 1029120 events.
[13:19:59.562] <TB3> INFO: 1029120 events read in total (23164ms).
[13:19:59.574] <TB3> INFO: Expecting 1029120 events.
[13:20:23.271] <TB3> INFO: 1029120 events read in total (23170ms).
[13:20:23.285] <TB3> INFO: Expecting 1029120 events.
[13:20:45.933] <TB3> INFO: 1029120 events read in total (22120ms).
[13:20:45.948] <TB3> INFO: Expecting 1029120 events.
[13:21:07.832] <TB3> INFO: 1029120 events read in total (21350ms).
[13:21:07.849] <TB3> INFO: Expecting 1029120 events.
[13:21:29.457] <TB3> INFO: 1029120 events read in total (21080ms).
[13:21:29.475] <TB3> INFO: Expecting 1029120 events.
[13:21:53.357] <TB3> INFO: 1029120 events read in total (23348ms).
[13:21:53.377] <TB3> INFO: Expecting 1029120 events.
[13:22:17.320] <TB3> INFO: 1029120 events read in total (23415ms).
[13:22:17.345] <TB3> INFO: Expecting 1029120 events.
[13:22:41.089] <TB3> INFO: 1029120 events read in total (23216ms).
[13:22:41.115] <TB3> INFO: Expecting 1029120 events.
[13:23:04.663] <TB3> INFO: 1029120 events read in total (23021ms).
[13:23:04.686] <TB3> INFO: Expecting 1029120 events.
[13:23:28.514] <TB3> INFO: 1029120 events read in total (23292ms).
[13:23:28.542] <TB3> INFO: Expecting 1029120 events.
[13:23:52.199] <TB3> INFO: 1029120 events read in total (23129ms).
[13:23:52.227] <TB3> INFO: Expecting 1029120 events.
[13:24:14.709] <TB3> INFO: 1029120 events read in total (21954ms).
[13:24:14.743] <TB3> INFO: Expecting 1029120 events.
[13:24:36.389] <TB3> INFO: 1029120 events read in total (21118ms).
[13:24:36.422] <TB3> INFO: Expecting 1029120 events.
[13:24:58.352] <TB3> INFO: 1029120 events read in total (21402ms).
[13:24:58.391] <TB3> INFO: Test took 370507ms.
[13:24:59.427] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:24:59.436] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:24:59.436] <TB3> INFO: run 1 of 1
[13:24:59.747] <TB3> INFO: Expecting 8320000 events.
[13:25:25.578] <TB3> INFO: 724440 events read in total (25115ms).
[13:25:51.900] <TB3> INFO: 1446970 events read in total (51437ms).
[13:26:18.642] <TB3> INFO: 2169000 events read in total (78179ms).
[13:26:45.656] <TB3> INFO: 2891250 events read in total (105193ms).
[13:27:12.593] <TB3> INFO: 3613110 events read in total (132130ms).
[13:27:39.757] <TB3> INFO: 4333250 events read in total (159294ms).
[13:28:06.604] <TB3> INFO: 5048870 events read in total (186141ms).
[13:28:33.132] <TB3> INFO: 5762820 events read in total (212669ms).
[13:28:59.945] <TB3> INFO: 6475460 events read in total (239482ms).
[13:29:26.648] <TB3> INFO: 7187120 events read in total (266185ms).
[13:29:53.601] <TB3> INFO: 7899310 events read in total (293138ms).
[13:30:09.468] <TB3> INFO: 8320000 events read in total (309005ms).
[13:30:09.529] <TB3> INFO: Test took 310093ms.
[13:30:09.730] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:36.199] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.027009 .. 255.000000
[13:30:36.282] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 255 (-1/-1) hits flags = 16 (plus default)
[13:30:36.291] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:30:36.291] <TB3> INFO: run 1 of 1
[13:30:36.616] <TB3> INFO: Expecting 21299200 events.
[13:31:01.618] <TB3> INFO: 711260 events read in total (24272ms).
[13:31:25.814] <TB3> INFO: 1423720 events read in total (48468ms).
[13:31:50.147] <TB3> INFO: 2135860 events read in total (72801ms).
[13:32:14.541] <TB3> INFO: 2848260 events read in total (97195ms).
[13:32:38.902] <TB3> INFO: 3560540 events read in total (121556ms).
[13:33:03.268] <TB3> INFO: 4272900 events read in total (145922ms).
[13:33:27.436] <TB3> INFO: 4985160 events read in total (170090ms).
[13:33:49.207] <TB3> INFO: 5697500 events read in total (191861ms).
[13:34:10.934] <TB3> INFO: 6410060 events read in total (213588ms).
[13:34:34.476] <TB3> INFO: 7122760 events read in total (237130ms).
[13:34:58.628] <TB3> INFO: 7835020 events read in total (261282ms).
[13:35:22.794] <TB3> INFO: 8547780 events read in total (285448ms).
[13:35:46.750] <TB3> INFO: 9260120 events read in total (309404ms).
[13:36:11.111] <TB3> INFO: 9972520 events read in total (333765ms).
[13:36:35.064] <TB3> INFO: 10685040 events read in total (357718ms).
[13:36:58.285] <TB3> INFO: 11397640 events read in total (380939ms).
[13:37:22.502] <TB3> INFO: 12109640 events read in total (405156ms).
[13:37:46.640] <TB3> INFO: 12821820 events read in total (429295ms).
[13:38:10.712] <TB3> INFO: 13533620 events read in total (453366ms).
[13:38:34.867] <TB3> INFO: 14245020 events read in total (477521ms).
[13:38:58.503] <TB3> INFO: 14956640 events read in total (501157ms).
[13:39:22.054] <TB3> INFO: 15668160 events read in total (524708ms).
[13:39:46.233] <TB3> INFO: 16378560 events read in total (548887ms).
[13:40:10.266] <TB3> INFO: 17089160 events read in total (572920ms).
[13:40:34.529] <TB3> INFO: 17800060 events read in total (597183ms).
[13:40:58.511] <TB3> INFO: 18509960 events read in total (621165ms).
[13:41:20.977] <TB3> INFO: 19219900 events read in total (643631ms).
[13:41:45.179] <TB3> INFO: 19930680 events read in total (667833ms).
[13:42:09.381] <TB3> INFO: 20641580 events read in total (692035ms).
[13:42:31.745] <TB3> INFO: 21299200 events read in total (714399ms).
[13:42:31.831] <TB3> INFO: Test took 715540ms.
[13:42:32.093] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:02.483] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 11.474040 .. 49.441467
[13:43:02.561] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 1 .. 59 (-1/-1) hits flags = 16 (plus default)
[13:43:02.570] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:43:02.570] <TB3> INFO: run 1 of 1
[13:43:02.874] <TB3> INFO: Expecting 4908800 events.
[13:43:28.796] <TB3> INFO: 929820 events read in total (25201ms).
[13:43:55.089] <TB3> INFO: 1859620 events read in total (51495ms).
[13:44:21.277] <TB3> INFO: 2789420 events read in total (77683ms).
[13:44:46.890] <TB3> INFO: 3717640 events read in total (103295ms).
[13:45:12.530] <TB3> INFO: 4643320 events read in total (128935ms).
[13:45:19.749] <TB3> INFO: 4908800 events read in total (136154ms).
[13:45:19.765] <TB3> INFO: Test took 137195ms.
[13:45:19.802] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:33.635] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 6.500000 .. 45.366660
[13:45:33.714] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 6 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:45:33.722] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:45:33.722] <TB3> INFO: run 1 of 1
[13:45:34.038] <TB3> INFO: Expecting 4160000 events.
[13:46:01.249] <TB3> INFO: 933920 events read in total (26494ms).
[13:46:27.351] <TB3> INFO: 1867880 events read in total (52596ms).
[13:46:53.762] <TB3> INFO: 2801580 events read in total (79007ms).
[13:47:18.073] <TB3> INFO: 3733680 events read in total (103318ms).
[13:47:30.360] <TB3> INFO: 4160000 events read in total (115605ms).
[13:47:30.375] <TB3> INFO: Test took 116653ms.
[13:47:30.408] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:43.860] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.070964 .. 45.366660
[13:47:43.946] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 1 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:47:43.954] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[13:47:43.954] <TB3> INFO: run 1 of 1
[13:47:44.275] <TB3> INFO: Expecting 4576000 events.
[13:48:11.052] <TB3> INFO: 960080 events read in total (26061ms).
[13:48:38.003] <TB3> INFO: 1919980 events read in total (53012ms).
[13:49:04.709] <TB3> INFO: 2879660 events read in total (79718ms).
[13:49:29.107] <TB3> INFO: 3839560 events read in total (104116ms).
[13:49:48.083] <TB3> INFO: 4576000 events read in total (123092ms).
[13:49:48.104] <TB3> INFO: Test took 124150ms.
[13:49:48.142] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:00.704] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:50:00.704] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:50:00.712] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:50:00.712] <TB3> INFO: run 1 of 1
[13:50:01.015] <TB3> INFO: Expecting 1705600 events.
[13:50:29.401] <TB3> INFO: 877650 events read in total (27670ms).
[13:50:57.109] <TB3> INFO: 1705600 events read in total (55378ms).
[13:50:57.128] <TB3> INFO: Test took 56417ms.
[13:50:57.161] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:11.341] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:51:11.341] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:51:11.342] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:51:11.342] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:51:11.342] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:51:11.342] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:51:11.342] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:51:11.343] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:51:11.343] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:51:11.343] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:51:11.343] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:51:11.344] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:51:11.344] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:51:11.344] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:51:11.344] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:51:11.345] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:51:11.345] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:51:11.352] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:51:11.358] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:51:11.364] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:51:11.371] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:51:11.377] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:51:11.383] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:51:11.392] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:51:11.402] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:51:11.408] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:51:11.414] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:51:11.420] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:51:11.427] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:51:11.434] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:51:11.441] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:51:11.449] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:51:11.456] <TB3> INFO: PixTestTrim::trimTest() done
[13:51:11.456] <TB3> INFO: vtrim: 119 114 102 86 114 102 94 108 92 98 104 110 98 91 77 108
[13:51:11.456] <TB3> INFO: vthrcomp: 102 101 98 86 94 88 88 88 94 90 94 97 98 84 86 94
[13:51:11.456] <TB3> INFO: vcal mean: 34.90 34.90 34.93 34.92 34.87 34.92 34.90 34.92 34.91 34.91 34.91 34.90 34.91 34.95 34.92 34.91
[13:51:11.456] <TB3> INFO: vcal RMS: 0.87 0.94 0.83 0.72 1.08 0.79 0.77 0.92 0.81 0.78 1.10 0.88 0.84 0.73 0.75 0.89
[13:51:11.456] <TB3> INFO: bits mean: 9.11 9.05 9.15 9.35 8.58 8.67 9.26 8.99 9.26 8.81 9.23 9.42 8.69 9.43 8.90 9.57
[13:51:11.456] <TB3> INFO: bits RMS: 2.82 2.75 2.81 2.77 2.97 2.78 2.60 2.83 2.93 2.83 2.85 2.83 3.01 2.65 3.04 2.77
[13:51:11.462] <TB3> INFO: ----------------------------------------------------------------------
[13:51:11.462] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:51:11.462] <TB3> INFO: ----------------------------------------------------------------------
[13:51:11.464] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:51:11.475] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:51:11.475] <TB3> INFO: run 1 of 1
[13:51:11.789] <TB3> INFO: Expecting 8320000 events.
[13:51:41.785] <TB3> INFO: 938880 events read in total (29279ms).
[13:52:10.121] <TB3> INFO: 1868010 events read in total (57615ms).
[13:52:39.449] <TB3> INFO: 2794070 events read in total (86943ms).
[13:53:08.656] <TB3> INFO: 3717960 events read in total (116150ms).
[13:53:35.221] <TB3> INFO: 4634630 events read in total (142715ms).
[13:54:04.409] <TB3> INFO: 5546990 events read in total (171903ms).
[13:54:31.382] <TB3> INFO: 6458000 events read in total (198876ms).
[13:54:58.458] <TB3> INFO: 7368680 events read in total (225952ms).
[13:55:25.775] <TB3> INFO: 8285350 events read in total (253269ms).
[13:55:27.213] <TB3> INFO: 8320000 events read in total (254707ms).
[13:55:27.257] <TB3> INFO: Test took 255782ms.
[13:55:27.389] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:54.487] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 183 (-1/-1) hits flags = 16 (plus default)
[13:55:54.495] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[13:55:54.495] <TB3> INFO: run 1 of 1
[13:55:54.846] <TB3> INFO: Expecting 7654400 events.
[13:56:24.931] <TB3> INFO: 935290 events read in total (29369ms).
[13:56:53.613] <TB3> INFO: 1861370 events read in total (58051ms).
[13:57:22.011] <TB3> INFO: 2784770 events read in total (86449ms).
[13:57:51.106] <TB3> INFO: 3705480 events read in total (115544ms).
[13:58:20.509] <TB3> INFO: 4617080 events read in total (144947ms).
[13:58:49.536] <TB3> INFO: 5526610 events read in total (173974ms).
[13:59:16.703] <TB3> INFO: 6434570 events read in total (201141ms).
[13:59:44.951] <TB3> INFO: 7344460 events read in total (229389ms).
[13:59:55.107] <TB3> INFO: 7654400 events read in total (239545ms).
[13:59:55.146] <TB3> INFO: Test took 240638ms.
[13:59:55.240] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:21.940] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 171 (-1/-1) hits flags = 16 (plus default)
[14:00:21.948] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[14:00:21.948] <TB3> INFO: run 1 of 1
[14:00:22.258] <TB3> INFO: Expecting 7155200 events.
[14:00:50.637] <TB3> INFO: 961740 events read in total (27663ms).
[14:01:19.827] <TB3> INFO: 1912950 events read in total (56853ms).
[14:01:49.442] <TB3> INFO: 2860960 events read in total (86468ms).
[14:02:18.954] <TB3> INFO: 3803860 events read in total (115980ms).
[14:02:48.320] <TB3> INFO: 4737890 events read in total (145346ms).
[14:03:15.344] <TB3> INFO: 5670310 events read in total (172370ms).
[14:03:44.749] <TB3> INFO: 6602480 events read in total (201775ms).
[14:04:01.275] <TB3> INFO: 7155200 events read in total (218301ms).
[14:04:01.307] <TB3> INFO: Test took 219359ms.
[14:04:01.389] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:24.567] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 169 (-1/-1) hits flags = 16 (plus default)
[14:04:24.575] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[14:04:24.575] <TB3> INFO: run 1 of 1
[14:04:24.878] <TB3> INFO: Expecting 7072000 events.
[14:04:53.055] <TB3> INFO: 966380 events read in total (27459ms).
[14:05:22.821] <TB3> INFO: 1921890 events read in total (57226ms).
[14:05:52.486] <TB3> INFO: 2873980 events read in total (86891ms).
[14:06:21.971] <TB3> INFO: 3819830 events read in total (116375ms).
[14:06:49.672] <TB3> INFO: 4757350 events read in total (144076ms).
[14:07:19.102] <TB3> INFO: 5693180 events read in total (173506ms).
[14:07:48.258] <TB3> INFO: 6629740 events read in total (202662ms).
[14:08:02.289] <TB3> INFO: 7072000 events read in total (216693ms).
[14:08:02.329] <TB3> INFO: Test took 217754ms.
[14:08:02.412] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:27.708] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 170 (-1/-1) hits flags = 16 (plus default)
[14:08:27.720] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[14:08:27.720] <TB3> INFO: run 1 of 1
[14:08:28.036] <TB3> INFO: Expecting 7113600 events.
[14:08:56.753] <TB3> INFO: 962680 events read in total (27999ms).
[14:09:26.442] <TB3> INFO: 1915070 events read in total (57688ms).
[14:09:56.062] <TB3> INFO: 2863800 events read in total (87309ms).
[14:10:24.629] <TB3> INFO: 3806940 events read in total (115875ms).
[14:10:52.958] <TB3> INFO: 4741370 events read in total (144204ms).
[14:11:22.421] <TB3> INFO: 5674380 events read in total (173667ms).
[14:11:51.872] <TB3> INFO: 6607340 events read in total (203118ms).
[14:12:07.916] <TB3> INFO: 7113600 events read in total (219162ms).
[14:12:07.949] <TB3> INFO: Test took 220229ms.
[14:12:08.031] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:32.793] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:12:32.795] <TB3> INFO: PixTestTrim::doTest() done, duration: 4029 seconds
[14:12:33.507] <TB3> INFO: ######################################################################
[14:12:33.514] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:12:33.514] <TB3> INFO: ######################################################################
[14:12:33.819] <TB3> INFO: Expecting 41600 events.
[14:12:38.097] <TB3> INFO: 41600 events read in total (3560ms).
[14:12:38.098] <TB3> INFO: Test took 4583ms.
[14:12:38.104] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:38.680] <TB3> INFO: Expecting 41600 events.
[14:12:43.134] <TB3> INFO: 41600 events read in total (3738ms).
[14:12:43.134] <TB3> INFO: Test took 4768ms.
[14:12:43.145] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:43.489] <TB3> INFO: Expecting 41600 events.
[14:12:47.951] <TB3> INFO: 41600 events read in total (3746ms).
[14:12:47.951] <TB3> INFO: Test took 4787ms.
[14:12:47.957] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:47.964] <TB3> INFO: The DUT currently contains the following objects:
[14:12:47.964] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:47.964] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:47.964] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:47.964] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:47.964] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.964] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.965] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.965] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:47.965] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:48.303] <TB3> INFO: Expecting 2560 events.
[14:12:49.369] <TB3> INFO: 2560 events read in total (350ms).
[14:12:49.369] <TB3> INFO: Test took 1404ms.
[14:12:49.370] <TB3> INFO: The DUT currently contains the following objects:
[14:12:49.370] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:49.370] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:49.370] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:49.370] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:49.370] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.370] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.371] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.371] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.371] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.371] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.371] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.371] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:49.784] <TB3> INFO: Expecting 2560 events.
[14:12:50.851] <TB3> INFO: 2560 events read in total (350ms).
[14:12:50.851] <TB3> INFO: Test took 1480ms.
[14:12:50.852] <TB3> INFO: The DUT currently contains the following objects:
[14:12:50.852] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:50.852] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:50.852] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:50.852] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:50.852] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.852] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.852] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.852] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.852] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.852] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.852] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.852] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.852] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.853] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.853] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.853] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.853] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.853] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.853] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:50.853] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:51.266] <TB3> INFO: Expecting 2560 events.
[14:12:52.334] <TB3> INFO: 2560 events read in total (351ms).
[14:12:52.335] <TB3> INFO: Test took 1482ms.
[14:12:52.335] <TB3> INFO: The DUT currently contains the following objects:
[14:12:52.335] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:52.335] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:52.335] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:52.335] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:52.335] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.335] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:52.750] <TB3> INFO: Expecting 2560 events.
[14:12:53.819] <TB3> INFO: 2560 events read in total (353ms).
[14:12:53.819] <TB3> INFO: Test took 1484ms.
[14:12:53.819] <TB3> INFO: The DUT currently contains the following objects:
[14:12:53.819] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:53.819] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:53.819] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:53.819] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:53.819] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.819] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:53.820] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:54.234] <TB3> INFO: Expecting 2560 events.
[14:12:55.304] <TB3> INFO: 2560 events read in total (354ms).
[14:12:55.304] <TB3> INFO: Test took 1484ms.
[14:12:55.305] <TB3> INFO: The DUT currently contains the following objects:
[14:12:55.305] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:55.305] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:55.305] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:55.305] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:55.305] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.305] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:55.719] <TB3> INFO: Expecting 2560 events.
[14:12:56.788] <TB3> INFO: 2560 events read in total (353ms).
[14:12:56.788] <TB3> INFO: Test took 1483ms.
[14:12:56.788] <TB3> INFO: The DUT currently contains the following objects:
[14:12:56.789] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:56.789] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:56.789] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:56.789] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:56.789] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:56.789] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:57.203] <TB3> INFO: Expecting 2560 events.
[14:12:58.271] <TB3> INFO: 2560 events read in total (352ms).
[14:12:58.271] <TB3> INFO: Test took 1482ms.
[14:12:58.275] <TB3> INFO: The DUT currently contains the following objects:
[14:12:58.275] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:58.275] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:58.275] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:58.275] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:58.275] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.275] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.275] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.275] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.275] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.275] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.276] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:58.686] <TB3> INFO: Expecting 2560 events.
[14:12:59.753] <TB3> INFO: 2560 events read in total (351ms).
[14:12:59.753] <TB3> INFO: Test took 1477ms.
[14:12:59.754] <TB3> INFO: The DUT currently contains the following objects:
[14:12:59.754] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:12:59.754] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:12:59.754] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:12:59.754] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:12:59.754] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.754] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.755] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.755] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.755] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.755] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.755] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:12:59.755] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:00.168] <TB3> INFO: Expecting 2560 events.
[14:13:01.251] <TB3> INFO: 2560 events read in total (366ms).
[14:13:01.251] <TB3> INFO: Test took 1496ms.
[14:13:01.251] <TB3> INFO: The DUT currently contains the following objects:
[14:13:01.251] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:01.251] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:13:01.251] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:13:01.251] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:01.251] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.251] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.251] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.252] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:01.666] <TB3> INFO: Expecting 2560 events.
[14:13:02.736] <TB3> INFO: 2560 events read in total (354ms).
[14:13:02.736] <TB3> INFO: Test took 1484ms.
[14:13:02.737] <TB3> INFO: The DUT currently contains the following objects:
[14:13:02.737] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:02.737] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:13:02.737] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:13:02.737] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:02.737] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.737] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.738] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.738] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.738] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.738] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:02.738] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:03.151] <TB3> INFO: Expecting 2560 events.
[14:13:04.220] <TB3> INFO: 2560 events read in total (352ms).
[14:13:04.220] <TB3> INFO: Test took 1482ms.
[14:13:04.221] <TB3> INFO: The DUT currently contains the following objects:
[14:13:04.221] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:04.221] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:13:04.221] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:13:04.221] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:04.221] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.221] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.222] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.222] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.222] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.222] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:04.635] <TB3> INFO: Expecting 2560 events.
[14:13:05.702] <TB3> INFO: 2560 events read in total (351ms).
[14:13:05.702] <TB3> INFO: Test took 1481ms.
[14:13:05.703] <TB3> INFO: The DUT currently contains the following objects:
[14:13:05.703] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:05.703] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:13:05.703] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:13:05.703] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:05.703] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.703] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.703] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.703] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.703] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.703] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.703] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.703] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.704] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.704] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.704] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.704] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.704] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.704] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.704] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:05.704] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:06.117] <TB3> INFO: Expecting 2560 events.
[14:13:07.187] <TB3> INFO: 2560 events read in total (353ms).
[14:13:07.187] <TB3> INFO: Test took 1483ms.
[14:13:07.187] <TB3> INFO: The DUT currently contains the following objects:
[14:13:07.187] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:07.188] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:13:07.188] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:13:07.188] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:07.188] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.188] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:07.602] <TB3> INFO: Expecting 2560 events.
[14:13:08.669] <TB3> INFO: 2560 events read in total (351ms).
[14:13:08.670] <TB3> INFO: Test took 1482ms.
[14:13:08.679] <TB3> INFO: The DUT currently contains the following objects:
[14:13:08.679] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:08.679] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:13:08.679] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:13:08.679] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:08.679] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.679] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.680] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:08.680] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:09.084] <TB3> INFO: Expecting 2560 events.
[14:13:10.154] <TB3> INFO: 2560 events read in total (353ms).
[14:13:10.155] <TB3> INFO: Test took 1475ms.
[14:13:10.155] <TB3> INFO: The DUT currently contains the following objects:
[14:13:10.155] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:10.155] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:13:10.155] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:13:10.155] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:10.155] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.155] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.155] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.155] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.155] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.155] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.155] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.155] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.156] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.156] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.156] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.156] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.156] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.156] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.156] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.156] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:10.570] <TB3> INFO: Expecting 2560 events.
[14:13:11.632] <TB3> INFO: 2560 events read in total (346ms).
[14:13:11.632] <TB3> INFO: Test took 1476ms.
[14:13:11.635] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:13:12.049] <TB3> INFO: Expecting 655360 events.
[14:13:28.587] <TB3> INFO: 655360 events read in total (15821ms).
[14:13:28.596] <TB3> INFO: Expecting 655360 events.
[14:13:44.898] <TB3> INFO: 655360 events read in total (15775ms).
[14:13:44.910] <TB3> INFO: Expecting 655360 events.
[14:14:01.389] <TB3> INFO: 655360 events read in total (15952ms).
[14:14:01.405] <TB3> INFO: Expecting 655360 events.
[14:14:17.605] <TB3> INFO: 655360 events read in total (15672ms).
[14:14:17.624] <TB3> INFO: Expecting 655360 events.
[14:14:33.942] <TB3> INFO: 655360 events read in total (15791ms).
[14:14:33.967] <TB3> INFO: Expecting 655360 events.
[14:14:50.399] <TB3> INFO: 655360 events read in total (15905ms).
[14:14:50.427] <TB3> INFO: Expecting 655360 events.
[14:15:06.764] <TB3> INFO: 655360 events read in total (15809ms).
[14:15:06.795] <TB3> INFO: Expecting 655360 events.
[14:15:23.122] <TB3> INFO: 655360 events read in total (15799ms).
[14:15:23.154] <TB3> INFO: Expecting 655360 events.
[14:15:39.482] <TB3> INFO: 655360 events read in total (15800ms).
[14:15:39.519] <TB3> INFO: Expecting 655360 events.
[14:15:55.829] <TB3> INFO: 655360 events read in total (15783ms).
[14:15:55.872] <TB3> INFO: Expecting 655360 events.
[14:16:10.904] <TB3> INFO: 655360 events read in total (14504ms).
[14:16:10.949] <TB3> INFO: Expecting 655360 events.
[14:16:26.098] <TB3> INFO: 655360 events read in total (14622ms).
[14:16:26.147] <TB3> INFO: Expecting 655360 events.
[14:16:42.342] <TB3> INFO: 655360 events read in total (15668ms).
[14:16:42.394] <TB3> INFO: Expecting 655360 events.
[14:16:58.845] <TB3> INFO: 655360 events read in total (15924ms).
[14:16:58.898] <TB3> INFO: Expecting 655360 events.
[14:17:15.097] <TB3> INFO: 655360 events read in total (15671ms).
[14:17:15.154] <TB3> INFO: Expecting 655360 events.
[14:17:31.552] <TB3> INFO: 655360 events read in total (15870ms).
[14:17:31.612] <TB3> INFO: Test took 259977ms.
[14:17:31.690] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:32.002] <TB3> INFO: Expecting 655360 events.
[14:17:47.261] <TB3> INFO: 655360 events read in total (14543ms).
[14:17:47.270] <TB3> INFO: Expecting 655360 events.
[14:18:02.447] <TB3> INFO: 655360 events read in total (14649ms).
[14:18:02.459] <TB3> INFO: Expecting 655360 events.
[14:18:18.117] <TB3> INFO: 655360 events read in total (15131ms).
[14:18:18.134] <TB3> INFO: Expecting 655360 events.
[14:18:34.533] <TB3> INFO: 655360 events read in total (15871ms).
[14:18:34.552] <TB3> INFO: Expecting 655360 events.
[14:18:50.929] <TB3> INFO: 655360 events read in total (15849ms).
[14:18:50.951] <TB3> INFO: Expecting 655360 events.
[14:19:07.236] <TB3> INFO: 655360 events read in total (15757ms).
[14:19:07.264] <TB3> INFO: Expecting 655360 events.
[14:19:23.547] <TB3> INFO: 655360 events read in total (15755ms).
[14:19:23.577] <TB3> INFO: Expecting 655360 events.
[14:19:39.820] <TB3> INFO: 655360 events read in total (15715ms).
[14:19:39.856] <TB3> INFO: Expecting 655360 events.
[14:19:56.183] <TB3> INFO: 655360 events read in total (15800ms).
[14:19:56.222] <TB3> INFO: Expecting 655360 events.
[14:20:12.292] <TB3> INFO: 655360 events read in total (15542ms).
[14:20:12.333] <TB3> INFO: Expecting 655360 events.
[14:20:28.617] <TB3> INFO: 655360 events read in total (15757ms).
[14:20:28.658] <TB3> INFO: Expecting 655360 events.
[14:20:44.787] <TB3> INFO: 655360 events read in total (15601ms).
[14:20:44.832] <TB3> INFO: Expecting 655360 events.
[14:21:01.229] <TB3> INFO: 655360 events read in total (15869ms).
[14:21:01.282] <TB3> INFO: Expecting 655360 events.
[14:21:17.526] <TB3> INFO: 655360 events read in total (15717ms).
[14:21:17.581] <TB3> INFO: Expecting 655360 events.
[14:21:33.800] <TB3> INFO: 655360 events read in total (15692ms).
[14:21:33.859] <TB3> INFO: Expecting 655360 events.
[14:21:49.739] <TB3> INFO: 655360 events read in total (15353ms).
[14:21:49.797] <TB3> INFO: Test took 258107ms.
[14:21:49.985] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:49.992] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:49.999] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.006] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.012] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.019] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.026] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.033] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.039] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.046] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.053] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.059] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.066] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.073] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.079] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:21:50.086] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:21:50.092] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:21:50.101] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.109] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:21:50.156] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:21:50.157] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:21:50.157] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:21:50.157] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:21:50.157] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:21:50.158] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:21:50.158] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:21:50.158] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:21:50.158] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:21:50.158] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:21:50.159] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:21:50.159] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:21:50.159] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:21:50.159] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:21:50.159] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:21:50.160] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:21:50.494] <TB3> INFO: Expecting 41600 events.
[14:21:54.961] <TB3> INFO: 41600 events read in total (3751ms).
[14:21:54.961] <TB3> INFO: Test took 4798ms.
[14:21:55.501] <TB3> INFO: Expecting 41600 events.
[14:21:59.990] <TB3> INFO: 41600 events read in total (3773ms).
[14:21:59.990] <TB3> INFO: Test took 4811ms.
[14:22:00.559] <TB3> INFO: Expecting 41600 events.
[14:22:05.035] <TB3> INFO: 41600 events read in total (3759ms).
[14:22:05.036] <TB3> INFO: Test took 4808ms.
[14:22:05.275] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:05.407] <TB3> INFO: Expecting 2560 events.
[14:22:06.475] <TB3> INFO: 2560 events read in total (351ms).
[14:22:06.476] <TB3> INFO: Test took 1201ms.
[14:22:06.478] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:06.892] <TB3> INFO: Expecting 2560 events.
[14:22:07.961] <TB3> INFO: 2560 events read in total (352ms).
[14:22:07.962] <TB3> INFO: Test took 1484ms.
[14:22:07.964] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:08.378] <TB3> INFO: Expecting 2560 events.
[14:22:09.447] <TB3> INFO: 2560 events read in total (353ms).
[14:22:09.448] <TB3> INFO: Test took 1484ms.
[14:22:09.450] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:09.863] <TB3> INFO: Expecting 2560 events.
[14:22:10.930] <TB3> INFO: 2560 events read in total (350ms).
[14:22:10.931] <TB3> INFO: Test took 1481ms.
[14:22:10.932] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:11.347] <TB3> INFO: Expecting 2560 events.
[14:22:12.418] <TB3> INFO: 2560 events read in total (355ms).
[14:22:12.419] <TB3> INFO: Test took 1487ms.
[14:22:12.421] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:12.835] <TB3> INFO: Expecting 2560 events.
[14:22:13.906] <TB3> INFO: 2560 events read in total (355ms).
[14:22:13.907] <TB3> INFO: Test took 1486ms.
[14:22:13.909] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:14.323] <TB3> INFO: Expecting 2560 events.
[14:22:15.391] <TB3> INFO: 2560 events read in total (352ms).
[14:22:15.392] <TB3> INFO: Test took 1483ms.
[14:22:15.394] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:15.807] <TB3> INFO: Expecting 2560 events.
[14:22:16.875] <TB3> INFO: 2560 events read in total (352ms).
[14:22:16.876] <TB3> INFO: Test took 1482ms.
[14:22:16.878] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:17.292] <TB3> INFO: Expecting 2560 events.
[14:22:18.375] <TB3> INFO: 2560 events read in total (367ms).
[14:22:18.375] <TB3> INFO: Test took 1497ms.
[14:22:18.377] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:18.791] <TB3> INFO: Expecting 2560 events.
[14:22:19.859] <TB3> INFO: 2560 events read in total (352ms).
[14:22:19.859] <TB3> INFO: Test took 1482ms.
[14:22:19.862] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:20.275] <TB3> INFO: Expecting 2560 events.
[14:22:21.357] <TB3> INFO: 2560 events read in total (366ms).
[14:22:21.358] <TB3> INFO: Test took 1497ms.
[14:22:21.360] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:21.773] <TB3> INFO: Expecting 2560 events.
[14:22:22.841] <TB3> INFO: 2560 events read in total (351ms).
[14:22:22.841] <TB3> INFO: Test took 1481ms.
[14:22:22.844] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:23.257] <TB3> INFO: Expecting 2560 events.
[14:22:24.325] <TB3> INFO: 2560 events read in total (352ms).
[14:22:24.325] <TB3> INFO: Test took 1482ms.
[14:22:24.327] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:24.740] <TB3> INFO: Expecting 2560 events.
[14:22:25.808] <TB3> INFO: 2560 events read in total (352ms).
[14:22:25.808] <TB3> INFO: Test took 1481ms.
[14:22:25.811] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:26.224] <TB3> INFO: Expecting 2560 events.
[14:22:27.292] <TB3> INFO: 2560 events read in total (352ms).
[14:22:27.292] <TB3> INFO: Test took 1481ms.
[14:22:27.295] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:27.708] <TB3> INFO: Expecting 2560 events.
[14:22:28.776] <TB3> INFO: 2560 events read in total (352ms).
[14:22:28.776] <TB3> INFO: Test took 1482ms.
[14:22:28.779] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:29.191] <TB3> INFO: Expecting 2560 events.
[14:22:30.260] <TB3> INFO: 2560 events read in total (352ms).
[14:22:30.261] <TB3> INFO: Test took 1482ms.
[14:22:30.263] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:30.676] <TB3> INFO: Expecting 2560 events.
[14:22:31.744] <TB3> INFO: 2560 events read in total (351ms).
[14:22:31.745] <TB3> INFO: Test took 1482ms.
[14:22:31.747] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:32.161] <TB3> INFO: Expecting 2560 events.
[14:22:33.230] <TB3> INFO: 2560 events read in total (353ms).
[14:22:33.231] <TB3> INFO: Test took 1484ms.
[14:22:33.233] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:33.647] <TB3> INFO: Expecting 2560 events.
[14:22:34.715] <TB3> INFO: 2560 events read in total (352ms).
[14:22:34.715] <TB3> INFO: Test took 1482ms.
[14:22:34.717] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:35.130] <TB3> INFO: Expecting 2560 events.
[14:22:36.200] <TB3> INFO: 2560 events read in total (353ms).
[14:22:36.200] <TB3> INFO: Test took 1483ms.
[14:22:36.203] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:36.616] <TB3> INFO: Expecting 2560 events.
[14:22:37.687] <TB3> INFO: 2560 events read in total (354ms).
[14:22:37.688] <TB3> INFO: Test took 1485ms.
[14:22:37.690] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:38.104] <TB3> INFO: Expecting 2560 events.
[14:22:39.173] <TB3> INFO: 2560 events read in total (353ms).
[14:22:39.173] <TB3> INFO: Test took 1483ms.
[14:22:39.175] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:39.589] <TB3> INFO: Expecting 2560 events.
[14:22:40.659] <TB3> INFO: 2560 events read in total (354ms).
[14:22:40.660] <TB3> INFO: Test took 1485ms.
[14:22:40.663] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:41.076] <TB3> INFO: Expecting 2560 events.
[14:22:42.146] <TB3> INFO: 2560 events read in total (354ms).
[14:22:42.146] <TB3> INFO: Test took 1484ms.
[14:22:42.149] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:42.562] <TB3> INFO: Expecting 2560 events.
[14:22:43.631] <TB3> INFO: 2560 events read in total (353ms).
[14:22:43.631] <TB3> INFO: Test took 1483ms.
[14:22:43.634] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:44.047] <TB3> INFO: Expecting 2560 events.
[14:22:45.115] <TB3> INFO: 2560 events read in total (352ms).
[14:22:45.115] <TB3> INFO: Test took 1481ms.
[14:22:45.117] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:45.531] <TB3> INFO: Expecting 2560 events.
[14:22:46.599] <TB3> INFO: 2560 events read in total (352ms).
[14:22:46.599] <TB3> INFO: Test took 1482ms.
[14:22:46.602] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:47.016] <TB3> INFO: Expecting 2560 events.
[14:22:48.085] <TB3> INFO: 2560 events read in total (353ms).
[14:22:48.085] <TB3> INFO: Test took 1483ms.
[14:22:48.088] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:48.501] <TB3> INFO: Expecting 2560 events.
[14:22:49.569] <TB3> INFO: 2560 events read in total (352ms).
[14:22:49.569] <TB3> INFO: Test took 1481ms.
[14:22:49.573] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:49.985] <TB3> INFO: Expecting 2560 events.
[14:22:51.054] <TB3> INFO: 2560 events read in total (353ms).
[14:22:51.055] <TB3> INFO: Test took 1483ms.
[14:22:51.057] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:51.470] <TB3> INFO: Expecting 2560 events.
[14:22:52.540] <TB3> INFO: 2560 events read in total (353ms).
[14:22:52.540] <TB3> INFO: Test took 1483ms.
[14:22:53.167] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 619 seconds
[14:22:53.167] <TB3> INFO: PH scale (per ROC): 75 73 73 86 78 79 91 71 85 80 79 77 84 92 80 79
[14:22:53.167] <TB3> INFO: PH offset (per ROC): 163 172 161 131 164 163 150 160 162 169 173 161 164 144 145 158
[14:22:53.343] <TB3> INFO: ######################################################################
[14:22:53.343] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:22:53.343] <TB3> INFO: ######################################################################
[14:22:53.353] <TB3> INFO: scanning low vcal = 10
[14:22:53.657] <TB3> INFO: Expecting 41600 events.
[14:22:57.223] <TB3> INFO: 41600 events read in total (2850ms).
[14:22:57.223] <TB3> INFO: Test took 3870ms.
[14:22:57.225] <TB3> INFO: scanning low vcal = 20
[14:22:57.638] <TB3> INFO: Expecting 41600 events.
[14:23:01.249] <TB3> INFO: 41600 events read in total (2895ms).
[14:23:01.249] <TB3> INFO: Test took 4024ms.
[14:23:01.250] <TB3> INFO: scanning low vcal = 30
[14:23:01.665] <TB3> INFO: Expecting 41600 events.
[14:23:05.336] <TB3> INFO: 41600 events read in total (2955ms).
[14:23:05.336] <TB3> INFO: Test took 4086ms.
[14:23:05.338] <TB3> INFO: scanning low vcal = 40
[14:23:05.735] <TB3> INFO: Expecting 41600 events.
[14:23:09.954] <TB3> INFO: 41600 events read in total (3502ms).
[14:23:09.955] <TB3> INFO: Test took 4617ms.
[14:23:09.957] <TB3> INFO: scanning low vcal = 50
[14:23:10.301] <TB3> INFO: Expecting 41600 events.
[14:23:14.494] <TB3> INFO: 41600 events read in total (3477ms).
[14:23:14.495] <TB3> INFO: Test took 4538ms.
[14:23:14.498] <TB3> INFO: scanning low vcal = 60
[14:23:14.851] <TB3> INFO: Expecting 41600 events.
[14:23:19.028] <TB3> INFO: 41600 events read in total (3461ms).
[14:23:19.029] <TB3> INFO: Test took 4531ms.
[14:23:19.031] <TB3> INFO: scanning low vcal = 70
[14:23:19.381] <TB3> INFO: Expecting 41600 events.
[14:23:23.394] <TB3> INFO: 41600 events read in total (3297ms).
[14:23:23.395] <TB3> INFO: Test took 4364ms.
[14:23:23.397] <TB3> INFO: scanning low vcal = 80
[14:23:23.755] <TB3> INFO: Expecting 41600 events.
[14:23:27.835] <TB3> INFO: 41600 events read in total (3364ms).
[14:23:27.836] <TB3> INFO: Test took 4439ms.
[14:23:27.839] <TB3> INFO: scanning low vcal = 90
[14:23:28.180] <TB3> INFO: Expecting 41600 events.
[14:23:32.315] <TB3> INFO: 41600 events read in total (3418ms).
[14:23:32.316] <TB3> INFO: Test took 4477ms.
[14:23:32.319] <TB3> INFO: scanning low vcal = 100
[14:23:32.668] <TB3> INFO: Expecting 41600 events.
[14:23:36.701] <TB3> INFO: 41600 events read in total (3316ms).
[14:23:36.702] <TB3> INFO: Test took 4383ms.
[14:23:36.705] <TB3> INFO: scanning low vcal = 110
[14:23:37.062] <TB3> INFO: Expecting 41600 events.
[14:23:41.090] <TB3> INFO: 41600 events read in total (3312ms).
[14:23:41.090] <TB3> INFO: Test took 4385ms.
[14:23:41.092] <TB3> INFO: scanning low vcal = 120
[14:23:41.447] <TB3> INFO: Expecting 41600 events.
[14:23:45.539] <TB3> INFO: 41600 events read in total (3376ms).
[14:23:45.540] <TB3> INFO: Test took 4448ms.
[14:23:45.542] <TB3> INFO: scanning low vcal = 130
[14:23:45.898] <TB3> INFO: Expecting 41600 events.
[14:23:49.935] <TB3> INFO: 41600 events read in total (3321ms).
[14:23:49.935] <TB3> INFO: Test took 4393ms.
[14:23:49.938] <TB3> INFO: scanning low vcal = 140
[14:23:50.288] <TB3> INFO: Expecting 41600 events.
[14:23:54.470] <TB3> INFO: 41600 events read in total (3466ms).
[14:23:54.471] <TB3> INFO: Test took 4533ms.
[14:23:54.473] <TB3> INFO: scanning low vcal = 150
[14:23:54.827] <TB3> INFO: Expecting 41600 events.
[14:23:59.025] <TB3> INFO: 41600 events read in total (3481ms).
[14:23:59.025] <TB3> INFO: Test took 4552ms.
[14:23:59.028] <TB3> INFO: scanning low vcal = 160
[14:23:59.373] <TB3> INFO: Expecting 41600 events.
[14:24:03.569] <TB3> INFO: 41600 events read in total (3480ms).
[14:24:03.570] <TB3> INFO: Test took 4542ms.
[14:24:03.573] <TB3> INFO: scanning low vcal = 170
[14:24:03.913] <TB3> INFO: Expecting 41600 events.
[14:24:07.950] <TB3> INFO: 41600 events read in total (3321ms).
[14:24:07.951] <TB3> INFO: Test took 4378ms.
[14:24:07.955] <TB3> INFO: scanning low vcal = 180
[14:24:08.304] <TB3> INFO: Expecting 41600 events.
[14:24:12.363] <TB3> INFO: 41600 events read in total (3343ms).
[14:24:12.363] <TB3> INFO: Test took 4408ms.
[14:24:12.366] <TB3> INFO: scanning low vcal = 190
[14:24:12.711] <TB3> INFO: Expecting 41600 events.
[14:24:16.747] <TB3> INFO: 41600 events read in total (3320ms).
[14:24:16.747] <TB3> INFO: Test took 4381ms.
[14:24:16.750] <TB3> INFO: scanning low vcal = 200
[14:24:17.099] <TB3> INFO: Expecting 41600 events.
[14:24:21.135] <TB3> INFO: 41600 events read in total (3320ms).
[14:24:21.136] <TB3> INFO: Test took 4386ms.
[14:24:21.138] <TB3> INFO: scanning low vcal = 210
[14:24:21.475] <TB3> INFO: Expecting 41600 events.
[14:24:25.489] <TB3> INFO: 41600 events read in total (3298ms).
[14:24:25.490] <TB3> INFO: Test took 4352ms.
[14:24:25.493] <TB3> INFO: scanning low vcal = 220
[14:24:25.850] <TB3> INFO: Expecting 41600 events.
[14:24:29.939] <TB3> INFO: 41600 events read in total (3373ms).
[14:24:29.939] <TB3> INFO: Test took 4446ms.
[14:24:29.942] <TB3> INFO: scanning low vcal = 230
[14:24:30.296] <TB3> INFO: Expecting 41600 events.
[14:24:34.308] <TB3> INFO: 41600 events read in total (3296ms).
[14:24:34.309] <TB3> INFO: Test took 4367ms.
[14:24:34.311] <TB3> INFO: scanning low vcal = 240
[14:24:34.662] <TB3> INFO: Expecting 41600 events.
[14:24:38.698] <TB3> INFO: 41600 events read in total (3320ms).
[14:24:38.698] <TB3> INFO: Test took 4387ms.
[14:24:38.701] <TB3> INFO: scanning low vcal = 250
[14:24:39.058] <TB3> INFO: Expecting 41600 events.
[14:24:43.104] <TB3> INFO: 41600 events read in total (3330ms).
[14:24:43.105] <TB3> INFO: Test took 4404ms.
[14:24:43.109] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:24:43.456] <TB3> INFO: Expecting 41600 events.
[14:24:47.514] <TB3> INFO: 41600 events read in total (3342ms).
[14:24:47.514] <TB3> INFO: Test took 4405ms.
[14:24:47.517] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:24:47.874] <TB3> INFO: Expecting 41600 events.
[14:24:51.958] <TB3> INFO: 41600 events read in total (3368ms).
[14:24:51.959] <TB3> INFO: Test took 4442ms.
[14:24:51.962] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:24:52.306] <TB3> INFO: Expecting 41600 events.
[14:24:56.373] <TB3> INFO: 41600 events read in total (3350ms).
[14:24:56.374] <TB3> INFO: Test took 4412ms.
[14:24:56.376] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:24:56.733] <TB3> INFO: Expecting 41600 events.
[14:25:00.879] <TB3> INFO: 41600 events read in total (3430ms).
[14:25:00.880] <TB3> INFO: Test took 4504ms.
[14:25:00.882] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:25:01.241] <TB3> INFO: Expecting 41600 events.
[14:25:05.289] <TB3> INFO: 41600 events read in total (3332ms).
[14:25:05.290] <TB3> INFO: Test took 4407ms.
[14:25:05.743] <TB3> INFO: PixTestGainPedestal::measure() done
[14:25:40.205] <TB3> INFO: PixTestGainPedestal::fit() done
[14:25:40.205] <TB3> INFO: non-linearity mean: 0.957 0.954 0.959 0.956 0.963 0.949 0.959 0.955 0.960 0.956 0.957 0.958 0.955 0.962 0.953 0.953
[14:25:40.205] <TB3> INFO: non-linearity RMS: 0.006 0.007 0.005 0.005 0.007 0.007 0.005 0.006 0.006 0.007 0.007 0.006 0.006 0.004 0.005 0.005
[14:25:40.205] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:25:40.227] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:25:40.247] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:25:40.267] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:25:40.287] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:25:40.306] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:25:40.326] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:25:40.346] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:25:40.365] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:25:40.383] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:25:40.403] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:25:40.422] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:25:40.446] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:25:40.464] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:25:40.482] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:25:40.502] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:25:40.523] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[14:25:40.529] <TB3> INFO: readReadbackCal: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:25:40.530] <TB3> INFO: PixTestReadback::doTest() start.
[14:25:40.531] <TB3> INFO: PixTestReadback::RES sent once
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:25:51.808] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:25:51.809] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:25:51.809] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:25:51.809] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:25:51.839] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:25:51.839] <TB3> INFO: PixTestReadback::RES sent once
[14:26:03.074] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:26:03.075] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:26:03.075] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:26:03.075] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:26:03.075] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:26:03.075] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:26:03.075] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:26:03.076] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:26:03.113] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:26:03.114] <TB3> INFO: PixTestReadback::RES sent once
[14:26:11.750] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:26:11.750] <TB3> INFO: Vbg will be calibrated using Vd calibration
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.1calibrated Vbg = 1.19675 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 160calibrated Vbg = 1.2003 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155calibrated Vbg = 1.20364 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 147calibrated Vbg = 1.21031 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.5calibrated Vbg = 1.21544 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.4calibrated Vbg = 1.21294 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 145.1calibrated Vbg = 1.213 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 158.9calibrated Vbg = 1.21458 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.2calibrated Vbg = 1.2137 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 160.5calibrated Vbg = 1.20856 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.4calibrated Vbg = 1.20794 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 148.5calibrated Vbg = 1.21137 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.5calibrated Vbg = 1.21234 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 147.7calibrated Vbg = 1.20486 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150calibrated Vbg = 1.20714 :::*/*/*/*/
[14:26:11.750] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.3calibrated Vbg = 1.19969 :::*/*/*/*/
[14:26:11.753] <TB3> INFO: PixTestReadback::RES sent once
[14:29:06.622] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:29:06.622] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:29:06.622] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:29:06.623] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:29:06.652] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:29:06.653] <TB3> INFO: PixTestReadback::doTest() done
[14:29:06.665] <TB3> INFO: enter test to run
[14:29:06.665] <TB3> INFO: test: exit no parameter change
[14:29:07.247] <TB3> QUIET: Connection to board 170 closed.
[14:29:07.326] <TB3> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master