Test Date: 2015-08-28 10:45
Analysis date: 2016-05-26 03:30
Logfile
LogfileView
[08:53:27.989] <TB3> INFO: *** Welcome to pxar ***
[08:53:27.989] <TB3> INFO: *** Today: 2015/08/28
[08:53:27.989] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C15.dat
[08:53:27.989] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:53:27.989] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//defaultMaskFile.dat
[08:53:27.989] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters_C15.dat
[08:53:28.062] <TB3> INFO: clk: 4
[08:53:28.062] <TB3> INFO: ctr: 4
[08:53:28.062] <TB3> INFO: sda: 19
[08:53:28.062] <TB3> INFO: tin: 9
[08:53:28.062] <TB3> INFO: level: 15
[08:53:28.062] <TB3> INFO: triggerdelay: 0
[08:53:28.062] <TB3> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[08:53:28.062] <TB3> INFO: Log level: INFO
[08:53:28.069] <TB3> INFO: Found DTB DTB_WZ4I6J
[08:53:28.078] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[08:53:28.081] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[08:53:28.083] <TB3> INFO: RPC call hashes of host and DTB match: 397073690
[08:53:29.629] <TB3> INFO: DUT info:
[08:53:29.629] <TB3> INFO: The DUT currently contains the following objects:
[08:53:29.629] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[08:53:29.629] <TB3> INFO: TBM Core alpha (0): 7 registers set
[08:53:29.629] <TB3> INFO: TBM Core beta (1): 7 registers set
[08:53:29.629] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:53:29.629] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.629] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.629] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.629] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:29.630] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:30.031] <TB3> INFO: enter 'restricted' command line mode
[08:53:30.031] <TB3> INFO: enter test to run
[08:53:30.031] <TB3> INFO: test: pretest no parameter change
[08:53:30.031] <TB3> INFO: running: pretest
[08:53:30.038] <TB3> INFO: ######################################################################
[08:53:30.038] <TB3> INFO: PixTestPretest::doTest()
[08:53:30.038] <TB3> INFO: ######################################################################
[08:53:30.040] <TB3> INFO: ----------------------------------------------------------------------
[08:53:30.040] <TB3> INFO: PixTestPretest::programROC()
[08:53:30.040] <TB3> INFO: ----------------------------------------------------------------------
[08:53:48.058] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:53:48.058] <TB3> INFO: IA differences per ROC: 17.7 20.1 18.5 19.3 16.9 18.5 18.5 18.5 19.3 19.3 18.5 19.3 17.7 17.7 20.9 20.9
[08:53:48.137] <TB3> INFO: ----------------------------------------------------------------------
[08:53:48.137] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:53:48.137] <TB3> INFO: ----------------------------------------------------------------------
[08:54:07.700] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[08:54:07.701] <TB3> INFO: ----------------------------------------------------------------------
[08:54:07.701] <TB3> INFO: PixTestPretest::findTiming()
[08:54:07.701] <TB3> INFO: ----------------------------------------------------------------------
[08:54:07.701] <TB3> INFO: PixTestCmd::init()
[08:54:08.302] <TB3> WARNING: Not unmasking DUT, not setting Calibrate bits!

[08:56:01.641] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 5, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[08:56:01.641] <TB3> INFO: (success/tries = 100/100), width = 5
[08:56:01.643] <TB3> INFO: ----------------------------------------------------------------------
[08:56:01.643] <TB3> INFO: PixTestPretest::findWorkingPixel()
[08:56:01.643] <TB3> INFO: ----------------------------------------------------------------------
[08:56:01.781] <TB3> INFO: Expecting 231680 events.
[08:56:10.610] <TB3> INFO: 231680 events read in total (8112ms).
[08:56:10.614] <TB3> INFO: Test took 8968ms.
[08:56:10.927] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:56:10.957] <TB3> INFO: ----------------------------------------------------------------------
[08:56:10.957] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[08:56:10.957] <TB3> INFO: ----------------------------------------------------------------------
[08:56:11.094] <TB3> INFO: Expecting 231680 events.
[08:56:20.371] <TB3> INFO: 231680 events read in total (8561ms).
[08:56:20.374] <TB3> INFO: Test took 9412ms.
[08:56:20.712] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[08:56:20.712] <TB3> INFO: CalDel: 133 149 140 170 149 142 168 147 141 133 128 129 143 161 142 152
[08:56:20.712] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:56:20.715] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C0.dat
[08:56:20.715] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C1.dat
[08:56:20.716] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C2.dat
[08:56:20.716] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C3.dat
[08:56:20.716] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C4.dat
[08:56:20.716] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C5.dat
[08:56:20.717] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C6.dat
[08:56:20.717] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C7.dat
[08:56:20.717] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C8.dat
[08:56:20.717] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C9.dat
[08:56:20.718] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C10.dat
[08:56:20.718] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C11.dat
[08:56:20.718] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C12.dat
[08:56:20.718] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C13.dat
[08:56:20.719] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C14.dat
[08:56:20.719] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C15.dat
[08:56:20.719] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//tbmParameters_C0a.dat
[08:56:20.719] <TB3> INFO: write tbm parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:56:20.719] <TB3> INFO: PixTestPretest::doTest() done, duration: 170 seconds
[08:56:20.787] <TB3> INFO: enter test to run
[08:56:20.788] <TB3> INFO: test: fulltest no parameter change
[08:56:20.788] <TB3> INFO: running: fulltest
[08:56:20.788] <TB3> INFO: ######################################################################
[08:56:20.788] <TB3> INFO: PixTestFullTest::doTest()
[08:56:20.788] <TB3> INFO: ######################################################################
[08:56:20.789] <TB3> INFO: ######################################################################
[08:56:20.789] <TB3> INFO: PixTestAlive::doTest()
[08:56:20.789] <TB3> INFO: ######################################################################
[08:56:20.791] <TB3> INFO: ----------------------------------------------------------------------
[08:56:20.791] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:20.791] <TB3> INFO: ----------------------------------------------------------------------
[08:56:21.115] <TB3> INFO: Expecting 41600 events.
[08:56:25.557] <TB3> INFO: 41600 events read in total (3726ms).
[08:56:25.558] <TB3> INFO: Test took 4766ms.
[08:56:25.564] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:25.858] <TB3> INFO: PixTestAlive::aliveTest() done
[08:56:25.858] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:25.860] <TB3> INFO: ----------------------------------------------------------------------
[08:56:25.860] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:25.860] <TB3> INFO: ----------------------------------------------------------------------
[08:56:26.192] <TB3> INFO: Expecting 41600 events.
[08:56:29.350] <TB3> INFO: 41600 events read in total (2442ms).
[08:56:29.350] <TB3> INFO: Test took 3488ms.
[08:56:29.350] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:29.351] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:56:29.669] <TB3> INFO: PixTestAlive::maskTest() done
[08:56:29.669] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:29.671] <TB3> INFO: ----------------------------------------------------------------------
[08:56:29.671] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:29.671] <TB3> INFO: ----------------------------------------------------------------------
[08:56:29.992] <TB3> INFO: Expecting 41600 events.
[08:56:34.415] <TB3> INFO: 41600 events read in total (3706ms).
[08:56:34.415] <TB3> INFO: Test took 4743ms.
[08:56:34.422] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:34.716] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[08:56:34.716] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:34.717] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[08:56:34.732] <TB3> INFO: ######################################################################
[08:56:34.732] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:56:34.732] <TB3> INFO: ######################################################################
[08:56:34.735] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[08:56:34.749] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[08:56:34.750] <TB3> INFO: run 1 of 1
[08:56:35.067] <TB3> INFO: Expecting 3120000 events.
[08:57:10.702] <TB3> INFO: 854055 events read in total (34918ms).
[08:57:45.394] <TB3> INFO: 1694305 events read in total (69610ms).
[08:58:19.450] <TB3> INFO: 2548485 events read in total (103666ms).
[08:58:41.334] <TB3> INFO: 3120000 events read in total (125550ms).
[08:58:41.400] <TB3> INFO: Test took 126650ms.
[08:58:41.526] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:05.135] <TB3> INFO: PixTestBBMap::doTest() done, duration: 150 seconds
[08:59:05.135] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 9 0 2
[08:59:05.135] <TB3> INFO: separation cut (per ROC): 93 93 86 76 86 72 71 77 85 86 91 91 97 70 73 82
[08:59:05.208] <TB3> INFO: ######################################################################
[08:59:05.208] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:59:05.208] <TB3> INFO: ######################################################################
[08:59:05.208] <TB3> INFO: ----------------------------------------------------------------------
[08:59:05.208] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:59:05.208] <TB3> INFO: ----------------------------------------------------------------------
[08:59:05.208] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[08:59:05.216] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[08:59:05.216] <TB3> INFO: run 1 of 1
[08:59:05.521] <TB3> INFO: Expecting 31200000 events.
[08:59:30.706] <TB3> INFO: 956900 events read in total (24469ms).
[08:59:54.868] <TB3> INFO: 1895400 events read in total (48631ms).
[09:00:19.116] <TB3> INFO: 2831550 events read in total (72879ms).
[09:00:43.188] <TB3> INFO: 3769450 events read in total (96951ms).
[09:01:07.295] <TB3> INFO: 4701200 events read in total (121058ms).
[09:01:31.339] <TB3> INFO: 5634250 events read in total (145102ms).
[09:01:55.605] <TB3> INFO: 6566550 events read in total (169368ms).
[09:02:19.607] <TB3> INFO: 7499000 events read in total (193370ms).
[09:02:43.883] <TB3> INFO: 8429750 events read in total (217646ms).
[09:03:07.962] <TB3> INFO: 9358900 events read in total (241725ms).
[09:03:32.296] <TB3> INFO: 10289650 events read in total (266059ms).
[09:03:56.436] <TB3> INFO: 11219450 events read in total (290199ms).
[09:04:20.614] <TB3> INFO: 12148100 events read in total (314377ms).
[09:04:44.631] <TB3> INFO: 13076400 events read in total (338394ms).
[09:05:08.714] <TB3> INFO: 14004500 events read in total (362477ms).
[09:05:32.932] <TB3> INFO: 14930500 events read in total (386695ms).
[09:05:57.233] <TB3> INFO: 15852600 events read in total (410996ms).
[09:06:21.223] <TB3> INFO: 16769850 events read in total (434986ms).
[09:06:45.082] <TB3> INFO: 17684900 events read in total (458845ms).
[09:07:09.060] <TB3> INFO: 18601050 events read in total (482823ms).
[09:07:33.080] <TB3> INFO: 19514850 events read in total (506843ms).
[09:07:57.137] <TB3> INFO: 20430250 events read in total (530900ms).
[09:08:21.338] <TB3> INFO: 21343200 events read in total (555101ms).
[09:08:45.376] <TB3> INFO: 22257700 events read in total (579139ms).
[09:09:09.246] <TB3> INFO: 23168300 events read in total (603009ms).
[09:09:33.229] <TB3> INFO: 24082100 events read in total (626992ms).
[09:09:57.234] <TB3> INFO: 24992550 events read in total (650997ms).
[09:10:21.267] <TB3> INFO: 25904850 events read in total (675030ms).
[09:10:45.354] <TB3> INFO: 26813200 events read in total (699117ms).
[09:11:09.433] <TB3> INFO: 27726650 events read in total (723196ms).
[09:11:33.602] <TB3> INFO: 28638650 events read in total (747365ms).
[09:11:57.783] <TB3> INFO: 29553850 events read in total (771546ms).
[09:12:21.018] <TB3> INFO: 30466000 events read in total (794781ms).
[09:12:37.933] <TB3> INFO: 31200000 events read in total (811696ms).
[09:12:37.963] <TB3> INFO: Test took 812747ms.
[09:12:38.041] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:38.147] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:39.562] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:40.927] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:42.342] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:43.742] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:45.108] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:46.528] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:47.953] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:49.366] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:50.758] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:52.179] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:53.561] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:54.914] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:56.416] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:57.970] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:12:59.442] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:13:00.903] <TB3> INFO: PixTestScurves::scurves() done
[09:13:00.903] <TB3> INFO: Vcal mean: 100.31 102.60 91.14 81.97 99.89 81.30 79.71 82.39 83.18 83.44 92.45 91.09 90.13 78.89 77.45 90.53
[09:13:00.903] <TB3> INFO: Vcal RMS: 6.44 6.65 5.82 4.42 7.13 4.48 5.14 6.71 4.80 4.90 6.84 6.22 6.07 4.21 3.96 6.68
[09:13:00.903] <TB3> INFO: PixTestScurves::fullTest() done, duration: 835 seconds
[09:13:00.984] <TB3> INFO: ######################################################################
[09:13:00.984] <TB3> INFO: PixTestTrim::doTest()
[09:13:00.984] <TB3> INFO: ######################################################################
[09:13:00.986] <TB3> INFO: ----------------------------------------------------------------------
[09:13:00.986] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:13:00.986] <TB3> INFO: ----------------------------------------------------------------------
[09:13:01.072] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:13:01.072] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:13:01.081] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:13:01.081] <TB3> INFO: run 1 of 1
[09:13:01.397] <TB3> INFO: Expecting 13312000 events.
[09:13:30.030] <TB3> INFO: 1095460 events read in total (27916ms).
[09:13:57.029] <TB3> INFO: 2186260 events read in total (54915ms).
[09:14:23.739] <TB3> INFO: 3274560 events read in total (81625ms).
[09:14:51.495] <TB3> INFO: 4359020 events read in total (109381ms).
[09:15:19.186] <TB3> INFO: 5438800 events read in total (137072ms).
[09:15:46.716] <TB3> INFO: 6517260 events read in total (164602ms).
[09:16:14.369] <TB3> INFO: 7601580 events read in total (192255ms).
[09:16:42.213] <TB3> INFO: 8689860 events read in total (220099ms).
[09:17:09.962] <TB3> INFO: 9777260 events read in total (247848ms).
[09:17:37.693] <TB3> INFO: 10865780 events read in total (275579ms).
[09:18:05.440] <TB3> INFO: 11956360 events read in total (303326ms).
[09:18:31.716] <TB3> INFO: 13047900 events read in total (329602ms).
[09:18:38.114] <TB3> INFO: 13312000 events read in total (336000ms).
[09:18:38.147] <TB3> INFO: Test took 337066ms.
[09:18:38.199] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:56.344] <TB3> INFO: ROC 0 VthrComp = 98
[09:18:56.344] <TB3> INFO: ROC 1 VthrComp = 98
[09:18:56.344] <TB3> INFO: ROC 2 VthrComp = 94
[09:18:56.344] <TB3> INFO: ROC 3 VthrComp = 86
[09:18:56.344] <TB3> INFO: ROC 4 VthrComp = 92
[09:18:56.344] <TB3> INFO: ROC 5 VthrComp = 84
[09:18:56.344] <TB3> INFO: ROC 6 VthrComp = 82
[09:18:56.344] <TB3> INFO: ROC 7 VthrComp = 78
[09:18:56.345] <TB3> INFO: ROC 8 VthrComp = 87
[09:18:56.345] <TB3> INFO: ROC 9 VthrComp = 89
[09:18:56.345] <TB3> INFO: ROC 10 VthrComp = 89
[09:18:56.345] <TB3> INFO: ROC 11 VthrComp = 92
[09:18:56.345] <TB3> INFO: ROC 12 VthrComp = 93
[09:18:56.345] <TB3> INFO: ROC 13 VthrComp = 86
[09:18:56.345] <TB3> INFO: ROC 14 VthrComp = 84
[09:18:56.345] <TB3> INFO: ROC 15 VthrComp = 91
[09:18:56.345] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:18:56.345] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:18:56.355] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:18:56.355] <TB3> INFO: run 1 of 1
[09:18:56.658] <TB3> INFO: Expecting 13312000 events.
[09:19:21.948] <TB3> INFO: 782520 events read in total (24573ms).
[09:19:46.675] <TB3> INFO: 1561600 events read in total (49300ms).
[09:20:11.246] <TB3> INFO: 2339620 events read in total (73871ms).
[09:20:35.307] <TB3> INFO: 3117880 events read in total (97932ms).
[09:20:58.653] <TB3> INFO: 3895500 events read in total (121278ms).
[09:21:23.592] <TB3> INFO: 4673600 events read in total (146217ms).
[09:21:48.549] <TB3> INFO: 5451040 events read in total (171174ms).
[09:22:13.308] <TB3> INFO: 6228900 events read in total (195933ms).
[09:22:38.151] <TB3> INFO: 7002980 events read in total (220776ms).
[09:23:02.852] <TB3> INFO: 7773560 events read in total (245477ms).
[09:23:27.817] <TB3> INFO: 8542620 events read in total (270442ms).
[09:23:52.516] <TB3> INFO: 9310600 events read in total (295141ms).
[09:24:15.488] <TB3> INFO: 10077660 events read in total (318113ms).
[09:24:37.986] <TB3> INFO: 10843340 events read in total (340611ms).
[09:25:00.599] <TB3> INFO: 11608280 events read in total (363224ms).
[09:25:23.013] <TB3> INFO: 12374340 events read in total (385638ms).
[09:25:46.213] <TB3> INFO: 13141860 events read in total (408838ms).
[09:25:51.489] <TB3> INFO: 13312000 events read in total (414114ms).
[09:25:51.529] <TB3> INFO: Test took 415174ms.
[09:25:51.667] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:16.051] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 61.8962 for pixel 10/77 mean/min/max = 46.414/30.9157/61.9123
[09:26:16.052] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 64.5354 for pixel 11/76 mean/min/max = 48.2626/31.7214/64.8039
[09:26:16.052] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 60.6392 for pixel 10/66 mean/min/max = 45.898/31.0387/60.7573
[09:26:16.052] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 56.5919 for pixel 23/48 mean/min/max = 44.3539/32.0965/56.6113
[09:26:16.052] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 67.4042 for pixel 15/40 mean/min/max = 49.1138/30.713/67.5146
[09:26:16.053] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.8146 for pixel 0/3 mean/min/max = 45.187/32.5374/57.8365
[09:26:16.053] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.8942 for pixel 7/79 mean/min/max = 44.9463/31.9745/57.9181
[09:26:16.053] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 67.3144 for pixel 26/78 mean/min/max = 50.1003/32.8848/67.3157
[09:26:16.054] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 58.417 for pixel 18/0 mean/min/max = 45.2971/32.1721/58.4222
[09:26:16.054] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.3682 for pixel 1/69 mean/min/max = 46.2138/32.7729/59.6546
[09:26:16.054] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 65.6664 for pixel 15/48 mean/min/max = 48.3356/30.8337/65.8374
[09:26:16.054] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 61.488 for pixel 2/29 mean/min/max = 46.95/32.0939/61.8062
[09:26:16.055] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.0305 for pixel 12/79 mean/min/max = 45.7161/31.2554/60.1769
[09:26:16.055] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 55.8763 for pixel 0/64 mean/min/max = 43.9276/31.8972/55.958
[09:26:16.055] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 56.0509 for pixel 18/6 mean/min/max = 44.2328/32.2912/56.1743
[09:26:16.056] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 62.8445 for pixel 23/3 mean/min/max = 46.9706/30.8779/63.0633
[09:26:16.056] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:26:16.188] <TB3> INFO: Expecting 1029120 events.
[09:26:40.219] <TB3> INFO: 1029120 events read in total (23314ms).
[09:26:40.224] <TB3> INFO: Expecting 1029120 events.
[09:27:03.934] <TB3> INFO: 1029120 events read in total (23173ms).
[09:27:03.941] <TB3> INFO: Expecting 1029120 events.
[09:27:27.411] <TB3> INFO: 1029120 events read in total (22935ms).
[09:27:27.420] <TB3> INFO: Expecting 1029120 events.
[09:27:51.058] <TB3> INFO: 1029120 events read in total (23105ms).
[09:27:51.068] <TB3> INFO: Expecting 1029120 events.
[09:28:14.862] <TB3> INFO: 1029120 events read in total (23264ms).
[09:28:14.875] <TB3> INFO: Expecting 1029120 events.
[09:28:38.420] <TB3> INFO: 1029120 events read in total (23013ms).
[09:28:38.434] <TB3> INFO: Expecting 1029120 events.
[09:28:59.751] <TB3> INFO: 1029120 events read in total (20779ms).
[09:28:59.768] <TB3> INFO: Expecting 1029120 events.
[09:29:23.208] <TB3> INFO: 1029120 events read in total (22896ms).
[09:29:23.224] <TB3> INFO: Expecting 1029120 events.
[09:29:46.748] <TB3> INFO: 1029120 events read in total (22990ms).
[09:29:46.767] <TB3> INFO: Expecting 1029120 events.
[09:30:10.589] <TB3> INFO: 1029120 events read in total (23287ms).
[09:30:10.612] <TB3> INFO: Expecting 1029120 events.
[09:30:34.180] <TB3> INFO: 1029120 events read in total (23041ms).
[09:30:34.204] <TB3> INFO: Expecting 1029120 events.
[09:30:57.753] <TB3> INFO: 1029120 events read in total (23021ms).
[09:30:57.783] <TB3> INFO: Expecting 1029120 events.
[09:31:21.300] <TB3> INFO: 1029120 events read in total (22990ms).
[09:31:21.327] <TB3> INFO: Expecting 1029120 events.
[09:31:45.022] <TB3> INFO: 1029120 events read in total (23165ms).
[09:31:45.051] <TB3> INFO: Expecting 1029120 events.
[09:32:08.670] <TB3> INFO: 1029120 events read in total (23085ms).
[09:32:08.700] <TB3> INFO: Expecting 1029120 events.
[09:32:32.207] <TB3> INFO: 1029120 events read in total (22979ms).
[09:32:32.240] <TB3> INFO: Test took 376184ms.
[09:32:33.207] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:32:33.215] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[09:32:33.215] <TB3> INFO: run 1 of 1
[09:32:33.524] <TB3> INFO: Expecting 8320000 events.
[09:33:01.341] <TB3> INFO: 723640 events read in total (27101ms).
[09:33:28.309] <TB3> INFO: 1445610 events read in total (54069ms).
[09:33:54.944] <TB3> INFO: 2167100 events read in total (80704ms).
[09:34:21.963] <TB3> INFO: 2888920 events read in total (107723ms).
[09:34:48.930] <TB3> INFO: 3610160 events read in total (134690ms).
[09:35:15.692] <TB3> INFO: 4329630 events read in total (161452ms).
[09:35:42.477] <TB3> INFO: 5044940 events read in total (188237ms).
[09:36:09.188] <TB3> INFO: 5758450 events read in total (214948ms).
[09:36:35.930] <TB3> INFO: 6470900 events read in total (241690ms).
[09:37:02.670] <TB3> INFO: 7182230 events read in total (268430ms).
[09:37:29.699] <TB3> INFO: 7893970 events read in total (295459ms).
[09:37:45.859] <TB3> INFO: 8320000 events read in total (311619ms).
[09:37:45.916] <TB3> INFO: Test took 312701ms.
[09:37:46.127] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:12.784] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.099215 .. 255.000000
[09:38:12.859] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 255 (-1/-1) hits flags = 16 (plus default)
[09:38:12.867] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:38:12.867] <TB3> INFO: run 1 of 1
[09:38:13.176] <TB3> INFO: Expecting 21299200 events.
[09:38:38.012] <TB3> INFO: 711220 events read in total (24120ms).
[09:39:02.147] <TB3> INFO: 1423300 events read in total (48255ms).
[09:39:26.406] <TB3> INFO: 2135860 events read in total (72514ms).
[09:39:50.442] <TB3> INFO: 2848020 events read in total (96550ms).
[09:40:14.506] <TB3> INFO: 3560280 events read in total (120614ms).
[09:40:38.927] <TB3> INFO: 4272660 events read in total (145035ms).
[09:41:03.164] <TB3> INFO: 4985020 events read in total (169272ms).
[09:41:27.400] <TB3> INFO: 5697300 events read in total (193508ms).
[09:41:50.574] <TB3> INFO: 6410040 events read in total (216682ms).
[09:42:12.245] <TB3> INFO: 7122660 events read in total (238353ms).
[09:42:36.539] <TB3> INFO: 7834800 events read in total (262647ms).
[09:43:00.945] <TB3> INFO: 8547580 events read in total (287053ms).
[09:43:25.296] <TB3> INFO: 9260080 events read in total (311404ms).
[09:43:49.558] <TB3> INFO: 9972800 events read in total (335666ms).
[09:44:14.158] <TB3> INFO: 10685100 events read in total (360266ms).
[09:44:38.237] <TB3> INFO: 11397980 events read in total (384345ms).
[09:45:02.218] <TB3> INFO: 12109840 events read in total (408326ms).
[09:45:25.324] <TB3> INFO: 12822020 events read in total (431432ms).
[09:45:49.327] <TB3> INFO: 13533540 events read in total (455435ms).
[09:46:13.315] <TB3> INFO: 14245060 events read in total (479423ms).
[09:46:37.560] <TB3> INFO: 14956640 events read in total (503668ms).
[09:47:01.860] <TB3> INFO: 15668100 events read in total (527968ms).
[09:47:25.983] <TB3> INFO: 16378580 events read in total (552091ms).
[09:47:47.902] <TB3> INFO: 17089200 events read in total (574010ms).
[09:48:12.010] <TB3> INFO: 17799960 events read in total (598118ms).
[09:48:36.372] <TB3> INFO: 18510120 events read in total (622480ms).
[09:49:00.608] <TB3> INFO: 19220260 events read in total (646717ms).
[09:49:24.823] <TB3> INFO: 19930960 events read in total (670931ms).
[09:49:48.895] <TB3> INFO: 20641700 events read in total (695003ms).
[09:50:09.943] <TB3> INFO: 21299200 events read in total (716051ms).
[09:50:10.036] <TB3> INFO: Test took 717169ms.
[09:50:10.308] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:38.824] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 16.512383 .. 47.967175
[09:50:38.901] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 6 .. 57 (-1/-1) hits flags = 16 (plus default)
[09:50:38.909] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:50:38.909] <TB3> INFO: run 1 of 1
[09:50:39.218] <TB3> INFO: Expecting 4326400 events.
[09:51:06.203] <TB3> INFO: 917120 events read in total (26266ms).
[09:51:32.532] <TB3> INFO: 1835060 events read in total (52595ms).
[09:51:58.250] <TB3> INFO: 2751500 events read in total (78313ms).
[09:52:24.035] <TB3> INFO: 3665720 events read in total (104098ms).
[09:52:43.290] <TB3> INFO: 4326400 events read in total (123353ms).
[09:52:43.316] <TB3> INFO: Test took 124407ms.
[09:52:43.358] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:57.082] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 0.994242 .. 44.241435
[09:52:57.164] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 0 .. 54 (-1/-1) hits flags = 16 (plus default)
[09:52:57.172] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:52:57.172] <TB3> INFO: run 1 of 1
[09:52:57.485] <TB3> INFO: Expecting 4576000 events.
[09:53:23.258] <TB3> INFO: 972500 events read in total (25055ms).
[09:53:50.102] <TB3> INFO: 1945240 events read in total (51899ms).
[09:54:15.562] <TB3> INFO: 2917480 events read in total (77359ms).
[09:54:40.195] <TB3> INFO: 3888420 events read in total (101992ms).
[09:54:57.832] <TB3> INFO: 4576000 events read in total (119629ms).
[09:54:57.852] <TB3> INFO: Test took 120680ms.
[09:54:57.887] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:11.221] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.240384 .. 44.178956
[09:55:11.298] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 1 .. 54 (-1/-1) hits flags = 16 (plus default)
[09:55:11.307] <TB3> INFO: dacScan split into 1 runs with ntrig = 20
[09:55:11.307] <TB3> INFO: run 1 of 1
[09:55:11.621] <TB3> INFO: Expecting 4492800 events.
[09:55:37.109] <TB3> INFO: 967680 events read in total (24772ms).
[09:56:03.911] <TB3> INFO: 1935160 events read in total (51574ms).
[09:56:30.711] <TB3> INFO: 2903040 events read in total (78374ms).
[09:56:57.527] <TB3> INFO: 3870680 events read in total (105190ms).
[09:57:13.376] <TB3> INFO: 4492800 events read in total (121039ms).
[09:57:13.386] <TB3> INFO: Test took 122079ms.
[09:57:13.416] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:26.183] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:57:26.183] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[09:57:26.191] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[09:57:26.191] <TB3> INFO: run 1 of 1
[09:57:26.497] <TB3> INFO: Expecting 1705600 events.
[09:57:56.647] <TB3> INFO: 877380 events read in total (29434ms).
[09:58:23.080] <TB3> INFO: 1705600 events read in total (55867ms).
[09:58:23.095] <TB3> INFO: Test took 56904ms.
[09:58:23.131] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:37.073] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:58:37.073] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:58:37.073] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:58:37.073] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:58:37.074] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:58:37.075] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:58:37.075] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:58:37.081] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:58:37.088] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:58:37.095] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:58:37.102] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:58:37.108] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:58:37.115] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:58:37.122] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:58:37.128] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:58:37.135] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:58:37.142] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:58:37.148] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:58:37.155] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:58:37.161] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:58:37.168] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:58:37.175] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:58:37.182] <TB3> INFO: PixTestTrim::trimTest() done
[09:58:37.182] <TB3> INFO: vtrim: 115 113 96 91 120 93 78 106 95 102 108 110 90 82 84 102
[09:58:37.182] <TB3> INFO: vthrcomp: 98 98 94 86 92 84 82 78 87 89 89 92 93 86 84 91
[09:58:37.182] <TB3> INFO: vcal mean: 34.91 34.88 34.93 34.93 34.88 34.92 34.90 34.90 34.95 34.97 34.85 34.94 34.93 34.90 34.88 34.91
[09:58:37.182] <TB3> INFO: vcal RMS: 0.95 1.07 0.84 0.77 1.34 0.81 0.77 0.89 0.81 0.80 1.09 0.85 0.86 0.73 0.78 0.88
[09:58:37.182] <TB3> INFO: bits mean: 9.38 8.93 9.45 9.77 9.07 8.86 9.01 8.44 9.52 9.14 9.36 9.08 8.77 9.33 9.73 9.24
[09:58:37.182] <TB3> INFO: bits RMS: 2.81 2.73 2.84 2.64 2.78 2.91 2.93 2.66 2.71 2.70 2.65 2.74 3.11 2.89 2.68 2.85
[09:58:37.189] <TB3> INFO: ----------------------------------------------------------------------
[09:58:37.189] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:58:37.189] <TB3> INFO: ----------------------------------------------------------------------
[09:58:37.191] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:58:37.199] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[09:58:37.199] <TB3> INFO: run 1 of 1
[09:58:37.507] <TB3> INFO: Expecting 8320000 events.
[09:59:07.541] <TB3> INFO: 930920 events read in total (29318ms).
[09:59:36.927] <TB3> INFO: 1852800 events read in total (58704ms).
[10:00:06.158] <TB3> INFO: 2771530 events read in total (87935ms).
[10:00:35.494] <TB3> INFO: 3688140 events read in total (117271ms).
[10:01:04.670] <TB3> INFO: 4598450 events read in total (146447ms).
[10:01:33.770] <TB3> INFO: 5504750 events read in total (175547ms).
[10:02:03.058] <TB3> INFO: 6409830 events read in total (204835ms).
[10:02:32.270] <TB3> INFO: 7313490 events read in total (234047ms).
[10:02:59.160] <TB3> INFO: 8222000 events read in total (260937ms).
[10:03:02.429] <TB3> INFO: 8320000 events read in total (264206ms).
[10:03:02.463] <TB3> INFO: Test took 265264ms.
[10:03:02.576] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:29.687] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 181 (-1/-1) hits flags = 16 (plus default)
[10:03:29.695] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:03:29.695] <TB3> INFO: run 1 of 1
[10:03:29.999] <TB3> INFO: Expecting 7571200 events.
[10:04:00.235] <TB3> INFO: 931550 events read in total (29520ms).
[10:04:29.594] <TB3> INFO: 1854170 events read in total (58879ms).
[10:04:58.965] <TB3> INFO: 2774640 events read in total (88250ms).
[10:05:28.388] <TB3> INFO: 3691530 events read in total (117673ms).
[10:05:57.637] <TB3> INFO: 4599060 events read in total (146922ms).
[10:06:26.873] <TB3> INFO: 5505040 events read in total (176158ms).
[10:06:54.102] <TB3> INFO: 6409530 events read in total (203387ms).
[10:07:21.089] <TB3> INFO: 7315620 events read in total (230374ms).
[10:07:29.644] <TB3> INFO: 7571200 events read in total (238929ms).
[10:07:29.678] <TB3> INFO: Test took 239983ms.
[10:07:29.776] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:54.548] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 168 (-1/-1) hits flags = 16 (plus default)
[10:07:54.556] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:07:54.556] <TB3> INFO: run 1 of 1
[10:07:54.862] <TB3> INFO: Expecting 7030400 events.
[10:08:25.568] <TB3> INFO: 960400 events read in total (29990ms).
[10:08:55.266] <TB3> INFO: 1910750 events read in total (59688ms).
[10:09:24.829] <TB3> INFO: 2857590 events read in total (89251ms).
[10:09:54.455] <TB3> INFO: 3798580 events read in total (118877ms).
[10:10:23.645] <TB3> INFO: 4730250 events read in total (148067ms).
[10:10:50.787] <TB3> INFO: 5660890 events read in total (175209ms).
[10:11:20.264] <TB3> INFO: 6591580 events read in total (204686ms).
[10:11:34.371] <TB3> INFO: 7030400 events read in total (218793ms).
[10:11:34.407] <TB3> INFO: Test took 219851ms.
[10:11:34.493] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:01.285] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 168 (-1/-1) hits flags = 16 (plus default)
[10:12:01.294] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:12:01.294] <TB3> INFO: run 1 of 1
[10:12:01.634] <TB3> INFO: Expecting 7030400 events.
[10:12:32.128] <TB3> INFO: 959730 events read in total (29778ms).
[10:13:01.867] <TB3> INFO: 1909300 events read in total (59517ms).
[10:13:31.496] <TB3> INFO: 2855570 events read in total (89146ms).
[10:14:01.023] <TB3> INFO: 3795570 events read in total (118673ms).
[10:14:28.465] <TB3> INFO: 4726790 events read in total (146115ms).
[10:14:58.029] <TB3> INFO: 5656600 events read in total (175679ms).
[10:15:27.509] <TB3> INFO: 6586740 events read in total (205159ms).
[10:15:41.659] <TB3> INFO: 7030400 events read in total (219309ms).
[10:15:41.694] <TB3> INFO: Test took 220400ms.
[10:15:41.778] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:06.064] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 168 (-1/-1) hits flags = 16 (plus default)
[10:16:06.072] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:16:06.072] <TB3> INFO: run 1 of 1
[10:16:06.376] <TB3> INFO: Expecting 7030400 events.
[10:16:36.995] <TB3> INFO: 959160 events read in total (29898ms).
[10:17:06.499] <TB3> INFO: 1907740 events read in total (59403ms).
[10:17:35.971] <TB3> INFO: 2853090 events read in total (88874ms).
[10:18:02.976] <TB3> INFO: 3792290 events read in total (115879ms).
[10:18:32.423] <TB3> INFO: 4722780 events read in total (145326ms).
[10:19:01.804] <TB3> INFO: 5651550 events read in total (174707ms).
[10:19:31.028] <TB3> INFO: 6580660 events read in total (203931ms).
[10:19:45.425] <TB3> INFO: 7030400 events read in total (218328ms).
[10:19:45.460] <TB3> INFO: Test took 219388ms.
[10:19:45.542] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:10.353] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:20:10.355] <TB3> INFO: PixTestTrim::doTest() done, duration: 4029 seconds
[10:20:11.061] <TB3> INFO: ######################################################################
[10:20:11.061] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:20:11.061] <TB3> INFO: ######################################################################
[10:20:11.368] <TB3> INFO: Expecting 41600 events.
[10:20:15.847] <TB3> INFO: 41600 events read in total (3763ms).
[10:20:15.848] <TB3> INFO: Test took 4786ms.
[10:20:15.854] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:16.454] <TB3> INFO: Expecting 41600 events.
[10:20:20.944] <TB3> INFO: 41600 events read in total (3774ms).
[10:20:20.945] <TB3> INFO: Test took 4831ms.
[10:20:20.952] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:21.285] <TB3> INFO: Expecting 41600 events.
[10:20:25.759] <TB3> INFO: 41600 events read in total (3758ms).
[10:20:25.760] <TB3> INFO: Test took 4798ms.
[10:20:25.766] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:25.773] <TB3> INFO: The DUT currently contains the following objects:
[10:20:25.773] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:25.773] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:25.773] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:25.773] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:25.773] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:25.773] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:26.118] <TB3> INFO: Expecting 2560 events.
[10:20:27.187] <TB3> INFO: 2560 events read in total (353ms).
[10:20:27.187] <TB3> INFO: Test took 1414ms.
[10:20:27.188] <TB3> INFO: The DUT currently contains the following objects:
[10:20:27.188] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:27.188] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:27.188] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:27.188] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:27.188] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.188] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.189] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.189] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.189] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.189] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.189] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:27.602] <TB3> INFO: Expecting 2560 events.
[10:20:28.669] <TB3> INFO: 2560 events read in total (351ms).
[10:20:28.669] <TB3> INFO: Test took 1480ms.
[10:20:28.669] <TB3> INFO: The DUT currently contains the following objects:
[10:20:28.669] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:28.669] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:28.669] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:28.669] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:28.669] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.669] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.669] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.669] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:28.670] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:29.084] <TB3> INFO: Expecting 2560 events.
[10:20:30.152] <TB3> INFO: 2560 events read in total (351ms).
[10:20:30.152] <TB3> INFO: Test took 1482ms.
[10:20:30.153] <TB3> INFO: The DUT currently contains the following objects:
[10:20:30.153] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:30.153] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:30.153] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:30.153] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:30.153] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.153] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.153] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.153] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.153] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.153] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.153] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.153] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.154] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.154] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.154] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.154] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.154] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.154] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.154] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.155] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:30.567] <TB3> INFO: Expecting 2560 events.
[10:20:31.635] <TB3> INFO: 2560 events read in total (352ms).
[10:20:31.635] <TB3> INFO: Test took 1480ms.
[10:20:31.636] <TB3> INFO: The DUT currently contains the following objects:
[10:20:31.636] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:31.636] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:31.636] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:31.636] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:31.636] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.636] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.637] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.637] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.637] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:31.637] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:32.050] <TB3> INFO: Expecting 2560 events.
[10:20:33.119] <TB3> INFO: 2560 events read in total (352ms).
[10:20:33.120] <TB3> INFO: Test took 1483ms.
[10:20:33.120] <TB3> INFO: The DUT currently contains the following objects:
[10:20:33.120] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:33.120] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:33.120] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:33.120] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:33.120] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.120] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.120] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.121] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:33.535] <TB3> INFO: Expecting 2560 events.
[10:20:34.597] <TB3> INFO: 2560 events read in total (346ms).
[10:20:34.598] <TB3> INFO: Test took 1477ms.
[10:20:34.598] <TB3> INFO: The DUT currently contains the following objects:
[10:20:34.598] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:34.598] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:34.598] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:34.598] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:34.598] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.598] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.598] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.598] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.599] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:34.602] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:35.013] <TB3> INFO: Expecting 2560 events.
[10:20:36.082] <TB3> INFO: 2560 events read in total (353ms).
[10:20:36.082] <TB3> INFO: Test took 1480ms.
[10:20:36.083] <TB3> INFO: The DUT currently contains the following objects:
[10:20:36.083] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:36.083] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:36.083] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:36.083] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:36.083] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.083] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:36.497] <TB3> INFO: Expecting 2560 events.
[10:20:37.565] <TB3> INFO: 2560 events read in total (352ms).
[10:20:37.565] <TB3> INFO: Test took 1482ms.
[10:20:37.565] <TB3> INFO: The DUT currently contains the following objects:
[10:20:37.565] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:37.565] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:37.565] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:37.565] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:37.565] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.565] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.565] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.565] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.565] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.565] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.565] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.565] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.565] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.566] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.566] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.566] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.566] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.566] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.566] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.566] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:37.980] <TB3> INFO: Expecting 2560 events.
[10:20:39.049] <TB3> INFO: 2560 events read in total (353ms).
[10:20:39.049] <TB3> INFO: Test took 1483ms.
[10:20:39.055] <TB3> INFO: The DUT currently contains the following objects:
[10:20:39.056] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:39.056] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:39.056] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:39.056] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:39.056] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.056] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:39.464] <TB3> INFO: Expecting 2560 events.
[10:20:40.532] <TB3> INFO: 2560 events read in total (352ms).
[10:20:40.533] <TB3> INFO: Test took 1477ms.
[10:20:40.533] <TB3> INFO: The DUT currently contains the following objects:
[10:20:40.533] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:40.533] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:40.533] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:40.533] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:40.533] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.533] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.533] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.533] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.534] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:40.947] <TB3> INFO: Expecting 2560 events.
[10:20:42.016] <TB3> INFO: 2560 events read in total (352ms).
[10:20:42.016] <TB3> INFO: Test took 1482ms.
[10:20:42.017] <TB3> INFO: The DUT currently contains the following objects:
[10:20:42.017] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:42.017] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:42.017] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:42.017] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:42.017] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.017] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.018] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:42.431] <TB3> INFO: Expecting 2560 events.
[10:20:43.496] <TB3> INFO: 2560 events read in total (349ms).
[10:20:43.496] <TB3> INFO: Test took 1478ms.
[10:20:43.497] <TB3> INFO: The DUT currently contains the following objects:
[10:20:43.497] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:43.497] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:43.497] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:43.497] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:43.497] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.497] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.497] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.497] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.497] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.497] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.497] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.497] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.498] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.498] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.498] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.498] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.498] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.498] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.498] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.498] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:43.912] <TB3> INFO: Expecting 2560 events.
[10:20:44.980] <TB3> INFO: 2560 events read in total (352ms).
[10:20:44.980] <TB3> INFO: Test took 1482ms.
[10:20:44.981] <TB3> INFO: The DUT currently contains the following objects:
[10:20:44.981] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:44.981] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:44.981] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:44.981] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:44.981] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:44.981] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.395] <TB3> INFO: Expecting 2560 events.
[10:20:46.477] <TB3> INFO: 2560 events read in total (366ms).
[10:20:46.478] <TB3> INFO: Test took 1496ms.
[10:20:46.478] <TB3> INFO: The DUT currently contains the following objects:
[10:20:46.478] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:46.478] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:46.478] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:46.478] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:46.478] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.478] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.478] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.478] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.479] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.892] <TB3> INFO: Expecting 2560 events.
[10:20:47.960] <TB3> INFO: 2560 events read in total (351ms).
[10:20:47.960] <TB3> INFO: Test took 1481ms.
[10:20:47.961] <TB3> INFO: The DUT currently contains the following objects:
[10:20:47.961] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:47.961] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:20:47.961] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:20:47.961] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:47.961] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.961] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:48.375] <TB3> INFO: Expecting 2560 events.
[10:20:49.444] <TB3> INFO: 2560 events read in total (352ms).
[10:20:49.444] <TB3> INFO: Test took 1483ms.
[10:20:49.448] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:49.861] <TB3> INFO: Expecting 655360 events.
[10:21:06.515] <TB3> INFO: 655360 events read in total (15938ms).
[10:21:06.526] <TB3> INFO: Expecting 655360 events.
[10:21:22.902] <TB3> INFO: 655360 events read in total (15849ms).
[10:21:22.916] <TB3> INFO: Expecting 655360 events.
[10:21:39.360] <TB3> INFO: 655360 events read in total (15917ms).
[10:21:39.376] <TB3> INFO: Expecting 655360 events.
[10:21:55.872] <TB3> INFO: 655360 events read in total (15968ms).
[10:21:55.893] <TB3> INFO: Expecting 655360 events.
[10:22:12.237] <TB3> INFO: 655360 events read in total (15816ms).
[10:22:12.263] <TB3> INFO: Expecting 655360 events.
[10:22:28.510] <TB3> INFO: 655360 events read in total (15720ms).
[10:22:28.537] <TB3> INFO: Expecting 655360 events.
[10:22:44.969] <TB3> INFO: 655360 events read in total (15904ms).
[10:22:45.002] <TB3> INFO: Expecting 655360 events.
[10:23:01.504] <TB3> INFO: 655360 events read in total (15974ms).
[10:23:01.539] <TB3> INFO: Expecting 655360 events.
[10:23:18.000] <TB3> INFO: 655360 events read in total (15934ms).
[10:23:18.037] <TB3> INFO: Expecting 655360 events.
[10:23:34.499] <TB3> INFO: 655360 events read in total (15934ms).
[10:23:34.540] <TB3> INFO: Expecting 655360 events.
[10:23:50.963] <TB3> INFO: 655360 events read in total (15896ms).
[10:23:51.006] <TB3> INFO: Expecting 655360 events.
[10:24:07.128] <TB3> INFO: 655360 events read in total (15595ms).
[10:24:07.176] <TB3> INFO: Expecting 655360 events.
[10:24:22.233] <TB3> INFO: 655360 events read in total (14530ms).
[10:24:22.283] <TB3> INFO: Expecting 655360 events.
[10:24:37.417] <TB3> INFO: 655360 events read in total (14607ms).
[10:24:37.491] <TB3> INFO: Expecting 655360 events.
[10:24:52.683] <TB3> INFO: 655360 events read in total (14665ms).
[10:24:52.741] <TB3> INFO: Expecting 655360 events.
[10:25:08.083] <TB3> INFO: 655360 events read in total (14814ms).
[10:25:08.145] <TB3> INFO: Test took 258698ms.
[10:25:08.230] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:08.536] <TB3> INFO: Expecting 655360 events.
[10:25:24.077] <TB3> INFO: 655360 events read in total (14825ms).
[10:25:24.087] <TB3> INFO: Expecting 655360 events.
[10:25:39.767] <TB3> INFO: 655360 events read in total (15140ms).
[10:25:39.779] <TB3> INFO: Expecting 655360 events.
[10:25:56.019] <TB3> INFO: 655360 events read in total (15712ms).
[10:25:56.035] <TB3> INFO: Expecting 655360 events.
[10:26:12.282] <TB3> INFO: 655360 events read in total (15719ms).
[10:26:12.302] <TB3> INFO: Expecting 655360 events.
[10:26:28.632] <TB3> INFO: 655360 events read in total (15803ms).
[10:26:28.655] <TB3> INFO: Expecting 655360 events.
[10:26:45.002] <TB3> INFO: 655360 events read in total (15819ms).
[10:26:45.027] <TB3> INFO: Expecting 655360 events.
[10:27:01.316] <TB3> INFO: 655360 events read in total (15761ms).
[10:27:01.344] <TB3> INFO: Expecting 655360 events.
[10:27:17.647] <TB3> INFO: 655360 events read in total (15775ms).
[10:27:17.681] <TB3> INFO: Expecting 655360 events.
[10:27:34.033] <TB3> INFO: 655360 events read in total (15824ms).
[10:27:34.071] <TB3> INFO: Expecting 655360 events.
[10:27:50.428] <TB3> INFO: 655360 events read in total (15829ms).
[10:27:50.473] <TB3> INFO: Expecting 655360 events.
[10:28:06.840] <TB3> INFO: 655360 events read in total (15839ms).
[10:28:06.886] <TB3> INFO: Expecting 655360 events.
[10:28:22.413] <TB3> INFO: 655360 events read in total (14999ms).
[10:28:22.459] <TB3> INFO: Expecting 655360 events.
[10:28:37.432] <TB3> INFO: 655360 events read in total (14446ms).
[10:28:37.481] <TB3> INFO: Expecting 655360 events.
[10:28:52.779] <TB3> INFO: 655360 events read in total (14771ms).
[10:28:52.835] <TB3> INFO: Expecting 655360 events.
[10:29:09.173] <TB3> INFO: 655360 events read in total (15810ms).
[10:29:09.228] <TB3> INFO: Expecting 655360 events.
[10:29:25.428] <TB3> INFO: 655360 events read in total (15673ms).
[10:29:25.498] <TB3> INFO: Test took 257268ms.
[10:29:25.710] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.719] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.725] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.732] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.740] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.749] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.756] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:29:25.762] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[10:29:25.769] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.775] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.782] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.788] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.795] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.802] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.809] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.818] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.826] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:29:25.834] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[10:29:25.843] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[10:29:25.851] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[10:29:25.860] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.868] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:25.915] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:29:25.916] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:29:25.916] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:29:25.916] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:29:25.916] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:29:25.916] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:29:25.917] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:29:25.917] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:29:25.917] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:29:25.917] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:29:25.917] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:29:25.918] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:29:25.918] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:29:25.918] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:29:25.918] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:29:25.918] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:29:26.242] <TB3> INFO: Expecting 41600 events.
[10:29:30.692] <TB3> INFO: 41600 events read in total (3733ms).
[10:29:30.693] <TB3> INFO: Test took 4771ms.
[10:29:31.261] <TB3> INFO: Expecting 41600 events.
[10:29:35.714] <TB3> INFO: 41600 events read in total (3737ms).
[10:29:35.715] <TB3> INFO: Test took 4783ms.
[10:29:36.257] <TB3> INFO: Expecting 41600 events.
[10:29:40.771] <TB3> INFO: 41600 events read in total (3798ms).
[10:29:40.771] <TB3> INFO: Test took 4826ms.
[10:29:41.004] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:41.137] <TB3> INFO: Expecting 2560 events.
[10:29:42.207] <TB3> INFO: 2560 events read in total (354ms).
[10:29:42.207] <TB3> INFO: Test took 1203ms.
[10:29:42.209] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:42.623] <TB3> INFO: Expecting 2560 events.
[10:29:43.690] <TB3> INFO: 2560 events read in total (351ms).
[10:29:43.690] <TB3> INFO: Test took 1481ms.
[10:29:43.693] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:44.106] <TB3> INFO: Expecting 2560 events.
[10:29:45.175] <TB3> INFO: 2560 events read in total (352ms).
[10:29:45.175] <TB3> INFO: Test took 1482ms.
[10:29:45.178] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:45.591] <TB3> INFO: Expecting 2560 events.
[10:29:46.661] <TB3> INFO: 2560 events read in total (354ms).
[10:29:46.661] <TB3> INFO: Test took 1483ms.
[10:29:46.663] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:47.077] <TB3> INFO: Expecting 2560 events.
[10:29:48.146] <TB3> INFO: 2560 events read in total (352ms).
[10:29:48.146] <TB3> INFO: Test took 1483ms.
[10:29:48.149] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:48.562] <TB3> INFO: Expecting 2560 events.
[10:29:49.632] <TB3> INFO: 2560 events read in total (354ms).
[10:29:49.632] <TB3> INFO: Test took 1483ms.
[10:29:49.635] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:50.048] <TB3> INFO: Expecting 2560 events.
[10:29:51.118] <TB3> INFO: 2560 events read in total (354ms).
[10:29:51.118] <TB3> INFO: Test took 1483ms.
[10:29:51.120] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:51.534] <TB3> INFO: Expecting 2560 events.
[10:29:52.603] <TB3> INFO: 2560 events read in total (353ms).
[10:29:52.604] <TB3> INFO: Test took 1484ms.
[10:29:52.606] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:53.020] <TB3> INFO: Expecting 2560 events.
[10:29:54.089] <TB3> INFO: 2560 events read in total (354ms).
[10:29:54.090] <TB3> INFO: Test took 1484ms.
[10:29:54.092] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:54.506] <TB3> INFO: Expecting 2560 events.
[10:29:55.574] <TB3> INFO: 2560 events read in total (352ms).
[10:29:55.575] <TB3> INFO: Test took 1483ms.
[10:29:55.577] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:55.991] <TB3> INFO: Expecting 2560 events.
[10:29:57.054] <TB3> INFO: 2560 events read in total (347ms).
[10:29:57.054] <TB3> INFO: Test took 1477ms.
[10:29:57.057] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:57.470] <TB3> INFO: Expecting 2560 events.
[10:29:58.540] <TB3> INFO: 2560 events read in total (354ms).
[10:29:58.540] <TB3> INFO: Test took 1483ms.
[10:29:58.543] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:58.955] <TB3> INFO: Expecting 2560 events.
[10:30:00.026] <TB3> INFO: 2560 events read in total (354ms).
[10:30:00.026] <TB3> INFO: Test took 1483ms.
[10:30:00.028] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:00.442] <TB3> INFO: Expecting 2560 events.
[10:30:01.504] <TB3> INFO: 2560 events read in total (346ms).
[10:30:01.505] <TB3> INFO: Test took 1477ms.
[10:30:01.507] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:01.921] <TB3> INFO: Expecting 2560 events.
[10:30:02.991] <TB3> INFO: 2560 events read in total (354ms).
[10:30:02.992] <TB3> INFO: Test took 1485ms.
[10:30:02.994] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:03.407] <TB3> INFO: Expecting 2560 events.
[10:30:04.477] <TB3> INFO: 2560 events read in total (353ms).
[10:30:04.477] <TB3> INFO: Test took 1483ms.
[10:30:04.480] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:04.893] <TB3> INFO: Expecting 2560 events.
[10:30:05.971] <TB3> INFO: 2560 events read in total (362ms).
[10:30:05.971] <TB3> INFO: Test took 1491ms.
[10:30:05.973] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:06.387] <TB3> INFO: Expecting 2560 events.
[10:30:07.457] <TB3> INFO: 2560 events read in total (354ms).
[10:30:07.458] <TB3> INFO: Test took 1485ms.
[10:30:07.460] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:07.873] <TB3> INFO: Expecting 2560 events.
[10:30:08.943] <TB3> INFO: 2560 events read in total (353ms).
[10:30:08.943] <TB3> INFO: Test took 1483ms.
[10:30:08.947] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:09.359] <TB3> INFO: Expecting 2560 events.
[10:30:10.427] <TB3> INFO: 2560 events read in total (352ms).
[10:30:10.427] <TB3> INFO: Test took 1481ms.
[10:30:10.428] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:10.843] <TB3> INFO: Expecting 2560 events.
[10:30:11.913] <TB3> INFO: 2560 events read in total (353ms).
[10:30:11.913] <TB3> INFO: Test took 1485ms.
[10:30:11.916] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:12.329] <TB3> INFO: Expecting 2560 events.
[10:30:13.398] <TB3> INFO: 2560 events read in total (353ms).
[10:30:13.398] <TB3> INFO: Test took 1482ms.
[10:30:13.401] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:13.814] <TB3> INFO: Expecting 2560 events.
[10:30:14.881] <TB3> INFO: 2560 events read in total (350ms).
[10:30:14.882] <TB3> INFO: Test took 1481ms.
[10:30:14.883] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:15.298] <TB3> INFO: Expecting 2560 events.
[10:30:16.368] <TB3> INFO: 2560 events read in total (354ms).
[10:30:16.369] <TB3> INFO: Test took 1486ms.
[10:30:16.371] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:16.785] <TB3> INFO: Expecting 2560 events.
[10:30:17.853] <TB3> INFO: 2560 events read in total (352ms).
[10:30:17.853] <TB3> INFO: Test took 1482ms.
[10:30:17.856] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:18.269] <TB3> INFO: Expecting 2560 events.
[10:30:19.333] <TB3> INFO: 2560 events read in total (347ms).
[10:30:19.333] <TB3> INFO: Test took 1477ms.
[10:30:19.336] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:19.749] <TB3> INFO: Expecting 2560 events.
[10:30:20.818] <TB3> INFO: 2560 events read in total (353ms).
[10:30:20.819] <TB3> INFO: Test took 1483ms.
[10:30:20.822] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:21.234] <TB3> INFO: Expecting 2560 events.
[10:30:22.304] <TB3> INFO: 2560 events read in total (354ms).
[10:30:22.304] <TB3> INFO: Test took 1483ms.
[10:30:22.306] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:22.720] <TB3> INFO: Expecting 2560 events.
[10:30:23.788] <TB3> INFO: 2560 events read in total (352ms).
[10:30:23.788] <TB3> INFO: Test took 1482ms.
[10:30:23.791] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:24.203] <TB3> INFO: Expecting 2560 events.
[10:30:25.272] <TB3> INFO: 2560 events read in total (352ms).
[10:30:25.272] <TB3> INFO: Test took 1481ms.
[10:30:25.275] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:25.688] <TB3> INFO: Expecting 2560 events.
[10:30:26.756] <TB3> INFO: 2560 events read in total (352ms).
[10:30:26.756] <TB3> INFO: Test took 1482ms.
[10:30:26.764] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:27.172] <TB3> INFO: Expecting 2560 events.
[10:30:28.240] <TB3> INFO: 2560 events read in total (352ms).
[10:30:28.241] <TB3> INFO: Test took 1477ms.
[10:30:28.855] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 617 seconds
[10:30:28.855] <TB3> INFO: PH scale (per ROC): 75 73 72 85 79 80 92 70 86 81 79 77 83 92 80 78
[10:30:28.855] <TB3> INFO: PH offset (per ROC): 163 172 161 131 163 163 149 161 161 167 173 160 165 144 146 158
[10:30:29.044] <TB3> INFO: ######################################################################
[10:30:29.044] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:30:29.044] <TB3> INFO: ######################################################################
[10:30:29.053] <TB3> INFO: scanning low vcal = 10
[10:30:29.384] <TB3> INFO: Expecting 41600 events.
[10:30:32.996] <TB3> INFO: 41600 events read in total (2896ms).
[10:30:32.997] <TB3> INFO: Test took 3944ms.
[10:30:32.999] <TB3> INFO: scanning low vcal = 20
[10:30:33.412] <TB3> INFO: Expecting 41600 events.
[10:30:37.024] <TB3> INFO: 41600 events read in total (2896ms).
[10:30:37.024] <TB3> INFO: Test took 4025ms.
[10:30:37.026] <TB3> INFO: scanning low vcal = 30
[10:30:37.439] <TB3> INFO: Expecting 41600 events.
[10:30:41.075] <TB3> INFO: 41600 events read in total (2919ms).
[10:30:41.076] <TB3> INFO: Test took 4050ms.
[10:30:41.078] <TB3> INFO: scanning low vcal = 40
[10:30:41.476] <TB3> INFO: Expecting 41600 events.
[10:30:45.681] <TB3> INFO: 41600 events read in total (3489ms).
[10:30:45.681] <TB3> INFO: Test took 4603ms.
[10:30:45.684] <TB3> INFO: scanning low vcal = 50
[10:30:46.034] <TB3> INFO: Expecting 41600 events.
[10:30:50.080] <TB3> INFO: 41600 events read in total (3330ms).
[10:30:50.080] <TB3> INFO: Test took 4396ms.
[10:30:50.083] <TB3> INFO: scanning low vcal = 60
[10:30:50.439] <TB3> INFO: Expecting 41600 events.
[10:30:54.506] <TB3> INFO: 41600 events read in total (3351ms).
[10:30:54.506] <TB3> INFO: Test took 4423ms.
[10:30:54.509] <TB3> INFO: scanning low vcal = 70
[10:30:54.863] <TB3> INFO: Expecting 41600 events.
[10:30:58.937] <TB3> INFO: 41600 events read in total (3358ms).
[10:30:58.938] <TB3> INFO: Test took 4429ms.
[10:30:58.940] <TB3> INFO: scanning low vcal = 80
[10:30:59.296] <TB3> INFO: Expecting 41600 events.
[10:31:03.356] <TB3> INFO: 41600 events read in total (3344ms).
[10:31:03.357] <TB3> INFO: Test took 4417ms.
[10:31:03.360] <TB3> INFO: scanning low vcal = 90
[10:31:03.713] <TB3> INFO: Expecting 41600 events.
[10:31:07.903] <TB3> INFO: 41600 events read in total (3474ms).
[10:31:07.904] <TB3> INFO: Test took 4544ms.
[10:31:07.907] <TB3> INFO: scanning low vcal = 100
[10:31:08.259] <TB3> INFO: Expecting 41600 events.
[10:31:12.326] <TB3> INFO: 41600 events read in total (3351ms).
[10:31:12.326] <TB3> INFO: Test took 4419ms.
[10:31:12.329] <TB3> INFO: scanning low vcal = 110
[10:31:12.680] <TB3> INFO: Expecting 41600 events.
[10:31:16.710] <TB3> INFO: 41600 events read in total (3314ms).
[10:31:16.710] <TB3> INFO: Test took 4381ms.
[10:31:16.713] <TB3> INFO: scanning low vcal = 120
[10:31:17.068] <TB3> INFO: Expecting 41600 events.
[10:31:21.126] <TB3> INFO: 41600 events read in total (3342ms).
[10:31:21.127] <TB3> INFO: Test took 4414ms.
[10:31:21.129] <TB3> INFO: scanning low vcal = 130
[10:31:21.477] <TB3> INFO: Expecting 41600 events.
[10:31:25.640] <TB3> INFO: 41600 events read in total (3447ms).
[10:31:25.640] <TB3> INFO: Test took 4512ms.
[10:31:25.643] <TB3> INFO: scanning low vcal = 140
[10:31:25.988] <TB3> INFO: Expecting 41600 events.
[10:31:30.193] <TB3> INFO: 41600 events read in total (3489ms).
[10:31:30.193] <TB3> INFO: Test took 4551ms.
[10:31:30.197] <TB3> INFO: scanning low vcal = 150
[10:31:30.539] <TB3> INFO: Expecting 41600 events.
[10:31:34.741] <TB3> INFO: 41600 events read in total (3486ms).
[10:31:34.742] <TB3> INFO: Test took 4545ms.
[10:31:34.745] <TB3> INFO: scanning low vcal = 160
[10:31:35.092] <TB3> INFO: Expecting 41600 events.
[10:31:39.297] <TB3> INFO: 41600 events read in total (3488ms).
[10:31:39.298] <TB3> INFO: Test took 4553ms.
[10:31:39.300] <TB3> INFO: scanning low vcal = 170
[10:31:39.650] <TB3> INFO: Expecting 41600 events.
[10:31:43.822] <TB3> INFO: 41600 events read in total (3456ms).
[10:31:43.823] <TB3> INFO: Test took 4523ms.
[10:31:43.830] <TB3> INFO: scanning low vcal = 180
[10:31:44.164] <TB3> INFO: Expecting 41600 events.
[10:31:48.359] <TB3> INFO: 41600 events read in total (3479ms).
[10:31:48.360] <TB3> INFO: Test took 4530ms.
[10:31:48.363] <TB3> INFO: scanning low vcal = 190
[10:31:48.709] <TB3> INFO: Expecting 41600 events.
[10:31:52.931] <TB3> INFO: 41600 events read in total (3506ms).
[10:31:52.932] <TB3> INFO: Test took 4569ms.
[10:31:52.935] <TB3> INFO: scanning low vcal = 200
[10:31:53.285] <TB3> INFO: Expecting 41600 events.
[10:31:57.439] <TB3> INFO: 41600 events read in total (3438ms).
[10:31:57.440] <TB3> INFO: Test took 4505ms.
[10:31:57.442] <TB3> INFO: scanning low vcal = 210
[10:31:57.797] <TB3> INFO: Expecting 41600 events.
[10:32:01.971] <TB3> INFO: 41600 events read in total (3458ms).
[10:32:01.972] <TB3> INFO: Test took 4530ms.
[10:32:01.974] <TB3> INFO: scanning low vcal = 220
[10:32:02.324] <TB3> INFO: Expecting 41600 events.
[10:32:06.492] <TB3> INFO: 41600 events read in total (3451ms).
[10:32:06.492] <TB3> INFO: Test took 4518ms.
[10:32:06.495] <TB3> INFO: scanning low vcal = 230
[10:32:06.850] <TB3> INFO: Expecting 41600 events.
[10:32:11.035] <TB3> INFO: 41600 events read in total (3469ms).
[10:32:11.036] <TB3> INFO: Test took 4541ms.
[10:32:11.039] <TB3> INFO: scanning low vcal = 240
[10:32:11.388] <TB3> INFO: Expecting 41600 events.
[10:32:15.540] <TB3> INFO: 41600 events read in total (3435ms).
[10:32:15.540] <TB3> INFO: Test took 4501ms.
[10:32:15.543] <TB3> INFO: scanning low vcal = 250
[10:32:15.898] <TB3> INFO: Expecting 41600 events.
[10:32:20.157] <TB3> INFO: 41600 events read in total (3543ms).
[10:32:20.158] <TB3> INFO: Test took 4615ms.
[10:32:20.162] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[10:32:20.509] <TB3> INFO: Expecting 41600 events.
[10:32:24.702] <TB3> INFO: 41600 events read in total (3477ms).
[10:32:24.702] <TB3> INFO: Test took 4540ms.
[10:32:24.704] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[10:32:25.056] <TB3> INFO: Expecting 41600 events.
[10:32:29.226] <TB3> INFO: 41600 events read in total (3453ms).
[10:32:29.227] <TB3> INFO: Test took 4523ms.
[10:32:29.229] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[10:32:29.576] <TB3> INFO: Expecting 41600 events.
[10:32:33.760] <TB3> INFO: 41600 events read in total (3468ms).
[10:32:33.761] <TB3> INFO: Test took 4531ms.
[10:32:33.764] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[10:32:34.111] <TB3> INFO: Expecting 41600 events.
[10:32:38.473] <TB3> INFO: 41600 events read in total (3645ms).
[10:32:38.474] <TB3> INFO: Test took 4710ms.
[10:32:38.476] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:32:38.827] <TB3> INFO: Expecting 41600 events.
[10:32:43.044] <TB3> INFO: 41600 events read in total (3500ms).
[10:32:43.044] <TB3> INFO: Test took 4568ms.
[10:32:43.533] <TB3> INFO: PixTestGainPedestal::measure() done
[10:33:15.464] <TB3> INFO: PixTestGainPedestal::fit() done
[10:33:15.464] <TB3> INFO: non-linearity mean: 0.957 0.955 0.959 0.955 0.964 0.955 0.959 0.955 0.960 0.957 0.957 0.957 0.955 0.962 0.955 0.952
[10:33:15.464] <TB3> INFO: non-linearity RMS: 0.006 0.007 0.006 0.006 0.007 0.006 0.005 0.006 0.006 0.006 0.008 0.006 0.006 0.004 0.005 0.005
[10:33:15.464] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:33:15.483] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:33:15.505] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:33:15.539] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:33:15.572] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:33:15.603] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:33:15.634] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:33:15.664] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:33:15.696] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:33:15.715] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:33:15.745] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:33:15.775] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:33:15.805] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:33:15.836] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:33:15.867] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:33:15.896] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:33:15.916] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 166 seconds
[10:33:15.924] <TB3> INFO: readReadbackCal: /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C15.dat
[10:33:15.925] <TB3> INFO: PixTestReadback::doTest() start.
[10:33:15.926] <TB3> INFO: PixTestReadback::RES sent once
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C0.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C1.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C2.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C3.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C4.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C5.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C6.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C7.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C8.dat
[10:33:27.219] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C9.dat
[10:33:27.220] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C10.dat
[10:33:27.220] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C11.dat
[10:33:27.220] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C12.dat
[10:33:27.220] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C13.dat
[10:33:27.220] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C14.dat
[10:33:27.220] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C15.dat
[10:33:27.251] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:33:27.251] <TB3> INFO: PixTestReadback::RES sent once
[10:33:38.477] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C0.dat
[10:33:38.477] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C1.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C2.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C3.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C4.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C5.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C6.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C7.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C8.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C9.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C10.dat
[10:33:38.478] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C11.dat
[10:33:38.479] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C12.dat
[10:33:38.479] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C13.dat
[10:33:38.479] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C14.dat
[10:33:38.479] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C15.dat
[10:33:38.518] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:33:38.518] <TB3> INFO: PixTestReadback::RES sent once
[10:33:47.153] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:33:47.153] <TB3> INFO: Vbg will be calibrated using Vd calibration
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158calibrated Vbg = 1.19484 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 160calibrated Vbg = 1.19617 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.1calibrated Vbg = 1.19987 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 147calibrated Vbg = 1.20992 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.4calibrated Vbg = 1.21155 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.3calibrated Vbg = 1.21213 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 144.9calibrated Vbg = 1.21231 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 159calibrated Vbg = 1.21317 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.1calibrated Vbg = 1.21187 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 160.5calibrated Vbg = 1.20787 :::*/*/*/*/
[10:33:47.153] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.6calibrated Vbg = 1.20375 :::*/*/*/*/
[10:33:47.154] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 148.8calibrated Vbg = 1.21181 :::*/*/*/*/
[10:33:47.154] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.4calibrated Vbg = 1.20641 :::*/*/*/*/
[10:33:47.154] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 147.6calibrated Vbg = 1.19858 :::*/*/*/*/
[10:33:47.154] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 149.6calibrated Vbg = 1.2029 :::*/*/*/*/
[10:33:47.154] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.5calibrated Vbg = 1.20076 :::*/*/*/*/
[10:33:47.157] <TB3> INFO: PixTestReadback::RES sent once
[10:36:42.020] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C0.dat
[10:36:42.020] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C1.dat
[10:36:42.020] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C2.dat
[10:36:42.020] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C3.dat
[10:36:42.020] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C4.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C5.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C6.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C7.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C8.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C9.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C10.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C11.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C12.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C13.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C14.dat
[10:36:42.021] <TB3> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2091_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C15.dat
[10:36:42.042] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:36:42.042] <TB3> INFO: PixTestReadback::doTest() done
[10:36:42.058] <TB3> INFO: enter test to run
[10:36:42.058] <TB3> INFO: test: exit no parameter change
[10:36:42.665] <TB3> QUIET: Connection to board 170 closed.
[10:36:42.745] <TB3> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master