[12:46:08.397] <TB2> INFO: *** Welcome to pxar ***
[12:46:08.397] <TB2> INFO: *** Today: 2015/08/28
[12:46:08.397] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C15.dat
[12:46:08.398] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:46:08.398] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//defaultMaskFile.dat
[12:46:08.398] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters_C15.dat
[12:46:08.478] <TB2> INFO: clk: 4
[12:46:08.478] <TB2> INFO: ctr: 4
[12:46:08.478] <TB2> INFO: sda: 19
[12:46:08.478] <TB2> INFO: tin: 9
[12:46:08.478] <TB2> INFO: level: 15
[12:46:08.478] <TB2> INFO: triggerdelay: 0
[12:46:08.478] <TB2> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[12:46:08.478] <TB2> INFO: Log level: INFO
[12:46:08.486] <TB2> INFO: Found DTB DTB_WXC55Z
[12:46:08.498] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[12:46:08.501] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[12:46:08.503] <TB2> INFO: RPC call hashes of host and DTB match: 397073690
[12:46:10.050] <TB2> INFO: DUT info:
[12:46:10.050] <TB2> INFO: The DUT currently contains the following objects:
[12:46:10.050] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:46:10.050] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:46:10.050] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:46:10.050] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:46:10.050] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.050] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.051] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.051] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.051] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.051] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.051] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.051] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:46:10.452] <TB2> INFO: enter 'restricted' command line mode
[12:46:10.452] <TB2> INFO: enter test to run
[12:46:10.452] <TB2> INFO: test: pretest no parameter change
[12:46:10.452] <TB2> INFO: running: pretest
[12:46:10.460] <TB2> INFO: ######################################################################
[12:46:10.460] <TB2> INFO: PixTestPretest::doTest()
[12:46:10.460] <TB2> INFO: ######################################################################
[12:46:10.462] <TB2> INFO: ----------------------------------------------------------------------
[12:46:10.462] <TB2> INFO: PixTestPretest::programROC()
[12:46:10.462] <TB2> INFO: ----------------------------------------------------------------------
[12:46:28.480] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:46:28.480] <TB2> INFO: IA differences per ROC: 20.9 19.3 21.7 17.7 18.5 17.7 18.5 19.3 20.1 19.3 19.3 20.1 20.1 17.7 18.5 20.1
[12:46:28.565] <TB2> INFO: ----------------------------------------------------------------------
[12:46:28.565] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:46:28.565] <TB2> INFO: ----------------------------------------------------------------------
[12:46:48.129] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 369.8 mA = 23.1125 mA/ROC
[12:46:48.131] <TB2> INFO: ----------------------------------------------------------------------
[12:46:48.131] <TB2> INFO: PixTestPretest::findTiming()
[12:46:48.131] <TB2> INFO: ----------------------------------------------------------------------
[12:46:48.131] <TB2> INFO: PixTestCmd::init()

[12:48:36.538] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:48:36.538] <TB2> INFO: (success/tries = 100/100), width = 4
[12:48:36.539] <TB2> INFO: ----------------------------------------------------------------------
[12:48:36.539] <TB2> INFO: PixTestPretest::findWorkingPixel()
[12:48:36.539] <TB2> INFO: ----------------------------------------------------------------------
[12:48:36.675] <TB2> INFO: Expecting 231680 events.
[12:48:45.586] <TB2> INFO: 231680 events read in total (8194ms).
[12:48:45.590] <TB2> INFO: Test took 9048ms.
[12:48:45.882] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:48:45.915] <TB2> INFO: ----------------------------------------------------------------------
[12:48:45.915] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[12:48:45.915] <TB2> INFO: ----------------------------------------------------------------------
[12:48:46.052] <TB2> INFO: Expecting 231680 events.
[12:48:55.960] <TB2> INFO: 231680 events read in total (9192ms).
[12:48:55.964] <TB2> INFO: Test took 10044ms.
[12:48:56.302] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[12:48:56.302] <TB2> INFO: CalDel: 131 134 134 138 133 157 143 149 153 175 158 168 135 145 170 147
[12:48:56.302] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:48:56.305] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C0.dat
[12:48:56.306] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C1.dat
[12:48:56.306] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C2.dat
[12:48:56.306] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C3.dat
[12:48:56.306] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C4.dat
[12:48:56.307] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C5.dat
[12:48:56.307] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C6.dat
[12:48:56.307] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C7.dat
[12:48:56.307] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C8.dat
[12:48:56.308] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C9.dat
[12:48:56.308] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C10.dat
[12:48:56.308] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C11.dat
[12:48:56.309] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C12.dat
[12:48:56.309] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C13.dat
[12:48:56.309] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C14.dat
[12:48:56.309] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C15.dat
[12:48:56.310] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0a.dat
[12:48:56.310] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:48:56.310] <TB2> INFO: PixTestPretest::doTest() done, duration: 165 seconds
[12:48:56.382] <TB2> INFO: enter test to run
[12:48:56.382] <TB2> INFO: test: fulltest no parameter change
[12:48:56.382] <TB2> INFO: running: fulltest
[12:48:56.382] <TB2> INFO: ######################################################################
[12:48:56.382] <TB2> INFO: PixTestFullTest::doTest()
[12:48:56.382] <TB2> INFO: ######################################################################
[12:48:56.383] <TB2> INFO: ######################################################################
[12:48:56.383] <TB2> INFO: PixTestAlive::doTest()
[12:48:56.383] <TB2> INFO: ######################################################################
[12:48:56.385] <TB2> INFO: ----------------------------------------------------------------------
[12:48:56.385] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:48:56.385] <TB2> INFO: ----------------------------------------------------------------------
[12:48:56.690] <TB2> INFO: Expecting 41600 events.
[12:49:01.422] <TB2> INFO: 41600 events read in total (4016ms).
[12:49:01.423] <TB2> INFO: Test took 5037ms.
[12:49:01.429] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:01.725] <TB2> INFO: PixTestAlive::aliveTest() done
[12:49:01.725] <TB2> INFO: number of dead pixels (per ROC): 1 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0
[12:49:01.727] <TB2> INFO: ----------------------------------------------------------------------
[12:49:01.727] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:49:01.727] <TB2> INFO: ----------------------------------------------------------------------
[12:49:02.039] <TB2> INFO: Expecting 41600 events.
[12:49:05.281] <TB2> INFO: 41600 events read in total (2526ms).
[12:49:05.281] <TB2> INFO: Test took 3553ms.
[12:49:05.281] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:05.282] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:49:05.596] <TB2> INFO: PixTestAlive::maskTest() done
[12:49:05.596] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:49:05.598] <TB2> INFO: ----------------------------------------------------------------------
[12:49:05.598] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:49:05.598] <TB2> INFO: ----------------------------------------------------------------------
[12:49:05.912] <TB2> INFO: Expecting 41600 events.
[12:49:10.466] <TB2> INFO: 41600 events read in total (3838ms).
[12:49:10.466] <TB2> INFO: Test took 4867ms.
[12:49:10.473] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:10.764] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[12:49:10.764] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:49:10.764] <TB2> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[12:49:10.773] <TB2> INFO: ######################################################################
[12:49:10.773] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:49:10.773] <TB2> INFO: ######################################################################
[12:49:10.776] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[12:49:10.869] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[12:49:10.869] <TB2> INFO: run 1 of 1
[12:49:11.182] <TB2> INFO: Expecting 3120000 events.
[12:49:49.644] <TB2> INFO: 842875 events read in total (37746ms).
[12:50:27.657] <TB2> INFO: 1676465 events read in total (75760ms).
[12:51:02.457] <TB2> INFO: 2526100 events read in total (110560ms).
[12:51:25.714] <TB2> INFO: 3120000 events read in total (133816ms).
[12:51:25.773] <TB2> INFO: Test took 134904ms.
[12:51:25.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:47.885] <TB2> INFO: PixTestBBMap::doTest() done, duration: 157 seconds
[12:51:47.885] <TB2> INFO: number of dead bumps (per ROC): 2 0 0 0 0 0 0 1 0 0 0 0 4 0 0 0
[12:51:47.885] <TB2> INFO: separation cut (per ROC): 81 75 73 67 71 77 77 82 94 67 68 68 64 77 65 74
[12:51:47.956] <TB2> INFO: ######################################################################
[12:51:47.956] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:51:47.956] <TB2> INFO: ######################################################################
[12:51:47.956] <TB2> INFO: ----------------------------------------------------------------------
[12:51:47.956] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:51:47.956] <TB2> INFO: ----------------------------------------------------------------------
[12:51:47.956] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[12:51:47.964] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[12:51:47.964] <TB2> INFO: run 1 of 1
[12:51:48.267] <TB2> INFO: Expecting 31200000 events.
[12:52:15.494] <TB2> INFO: 912700 events read in total (26510ms).
[12:52:41.938] <TB2> INFO: 1813400 events read in total (52954ms).
[12:53:08.731] <TB2> INFO: 2711000 events read in total (79747ms).
[12:53:35.415] <TB2> INFO: 3610000 events read in total (106431ms).
[12:54:00.928] <TB2> INFO: 4503600 events read in total (131944ms).
[12:54:25.054] <TB2> INFO: 5397850 events read in total (156070ms).
[12:54:48.032] <TB2> INFO: 6290750 events read in total (179048ms).
[12:55:11.695] <TB2> INFO: 7186850 events read in total (202711ms).
[12:55:35.939] <TB2> INFO: 8080450 events read in total (226955ms).
[12:56:01.962] <TB2> INFO: 8973950 events read in total (252978ms).
[12:56:27.998] <TB2> INFO: 9866450 events read in total (279014ms).
[12:56:53.733] <TB2> INFO: 10758050 events read in total (304749ms).
[12:57:20.142] <TB2> INFO: 11650550 events read in total (331158ms).
[12:57:46.389] <TB2> INFO: 12540100 events read in total (357405ms).
[12:58:12.607] <TB2> INFO: 13431650 events read in total (383623ms).
[12:58:38.737] <TB2> INFO: 14321800 events read in total (409753ms).
[12:59:04.895] <TB2> INFO: 15213800 events read in total (435911ms).
[12:59:30.723] <TB2> INFO: 16098450 events read in total (461739ms).
[12:59:56.391] <TB2> INFO: 16983900 events read in total (487407ms).
[13:00:22.296] <TB2> INFO: 17863250 events read in total (513312ms).
[13:00:48.305] <TB2> INFO: 18748300 events read in total (539321ms).
[13:01:14.364] <TB2> INFO: 19627050 events read in total (565380ms).
[13:01:40.390] <TB2> INFO: 20510750 events read in total (591406ms).
[13:02:06.469] <TB2> INFO: 21388800 events read in total (617485ms).
[13:02:32.846] <TB2> INFO: 22273000 events read in total (643862ms).
[13:02:59.364] <TB2> INFO: 23151400 events read in total (670380ms).
[13:03:25.134] <TB2> INFO: 24034200 events read in total (696150ms).
[13:03:50.946] <TB2> INFO: 24912100 events read in total (721962ms).
[13:04:17.228] <TB2> INFO: 25791950 events read in total (748244ms).
[13:04:43.272] <TB2> INFO: 26669700 events read in total (774288ms).
[13:05:07.908] <TB2> INFO: 27551550 events read in total (798924ms).
[13:05:33.465] <TB2> INFO: 28431800 events read in total (824481ms).
[13:06:00.581] <TB2> INFO: 29314000 events read in total (851597ms).
[13:06:22.390] <TB2> INFO: 30196450 events read in total (873406ms).
[13:06:46.646] <TB2> INFO: 31089600 events read in total (897662ms).
[13:06:50.466] <TB2> INFO: 31200000 events read in total (901482ms).
[13:06:50.495] <TB2> INFO: Test took 902531ms.
[13:06:50.583] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:50.701] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:52.098] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:53.535] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:55.035] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:56.557] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:58.003] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:59.412] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:00.865] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:02.258] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:03.626] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:05.045] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:06.465] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:07.898] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:09.320] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:10.761] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:12.204] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:07:13.669] <TB2> INFO: PixTestScurves::scurves() done
[13:07:13.669] <TB2> INFO: Vcal mean: 85.05 85.11 80.05 76.85 71.04 86.58 75.38 89.05 98.82 83.12 80.83 76.71 79.10 74.63 72.74 73.15
[13:07:13.669] <TB2> INFO: Vcal RMS: 5.82 5.69 4.47 5.10 5.45 5.42 4.66 5.85 5.50 5.48 4.72 4.69 4.97 4.93 5.02 4.85
[13:07:13.669] <TB2> INFO: PixTestScurves::fullTest() done, duration: 925 seconds
[13:07:13.742] <TB2> INFO: ######################################################################
[13:07:13.742] <TB2> INFO: PixTestTrim::doTest()
[13:07:13.742] <TB2> INFO: ######################################################################
[13:07:13.744] <TB2> INFO: ----------------------------------------------------------------------
[13:07:13.744] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:07:13.744] <TB2> INFO: ----------------------------------------------------------------------
[13:07:13.825] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:07:13.825] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[13:07:13.833] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[13:07:13.833] <TB2> INFO: run 1 of 1
[13:07:14.139] <TB2> INFO: Expecting 13312000 events.
[13:07:44.603] <TB2> INFO: 1091780 events read in total (29748ms).
[13:08:13.865] <TB2> INFO: 2176880 events read in total (59010ms).
[13:08:43.133] <TB2> INFO: 3259660 events read in total (88278ms).
[13:09:12.663] <TB2> INFO: 4341320 events read in total (117808ms).
[13:09:42.295] <TB2> INFO: 5416360 events read in total (147440ms).
[13:10:11.734] <TB2> INFO: 6488900 events read in total (176879ms).
[13:10:41.554] <TB2> INFO: 7569440 events read in total (206699ms).
[13:11:10.452] <TB2> INFO: 8652860 events read in total (235597ms).
[13:11:40.508] <TB2> INFO: 9736700 events read in total (265653ms).
[13:12:10.644] <TB2> INFO: 10821960 events read in total (295789ms).
[13:12:39.763] <TB2> INFO: 11909080 events read in total (324908ms).
[13:13:07.203] <TB2> INFO: 12999960 events read in total (352348ms).
[13:13:16.884] <TB2> INFO: 13312000 events read in total (362029ms).
[13:13:16.922] <TB2> INFO: Test took 363089ms.
[13:13:16.976] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:36.077] <TB2> INFO: ROC 0 VthrComp = 88
[13:13:36.077] <TB2> INFO: ROC 1 VthrComp = 87
[13:13:36.077] <TB2> INFO: ROC 2 VthrComp = 85
[13:13:36.077] <TB2> INFO: ROC 3 VthrComp = 77
[13:13:36.077] <TB2> INFO: ROC 4 VthrComp = 75
[13:13:36.077] <TB2> INFO: ROC 5 VthrComp = 87
[13:13:36.077] <TB2> INFO: ROC 6 VthrComp = 80
[13:13:36.077] <TB2> INFO: ROC 7 VthrComp = 91
[13:13:36.077] <TB2> INFO: ROC 8 VthrComp = 104
[13:13:36.077] <TB2> INFO: ROC 9 VthrComp = 84
[13:13:36.078] <TB2> INFO: ROC 10 VthrComp = 80
[13:13:36.078] <TB2> INFO: ROC 11 VthrComp = 80
[13:13:36.078] <TB2> INFO: ROC 12 VthrComp = 83
[13:13:36.078] <TB2> INFO: ROC 13 VthrComp = 76
[13:13:36.078] <TB2> INFO: ROC 14 VthrComp = 73
[13:13:36.078] <TB2> INFO: ROC 15 VthrComp = 77
[13:13:36.078] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:13:36.078] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[13:13:36.088] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[13:13:36.088] <TB2> INFO: run 1 of 1
[13:13:36.392] <TB2> INFO: Expecting 13312000 events.
[13:14:04.403] <TB2> INFO: 783880 events read in total (27294ms).
[13:14:31.307] <TB2> INFO: 1564080 events read in total (54198ms).
[13:14:58.712] <TB2> INFO: 2343540 events read in total (81603ms).
[13:15:25.527] <TB2> INFO: 3122540 events read in total (108418ms).
[13:15:52.243] <TB2> INFO: 3900920 events read in total (135134ms).
[13:16:19.149] <TB2> INFO: 4680040 events read in total (162040ms).
[13:16:45.367] <TB2> INFO: 5458200 events read in total (188258ms).
[13:17:12.031] <TB2> INFO: 6236680 events read in total (214922ms).
[13:17:38.717] <TB2> INFO: 7011940 events read in total (241608ms).
[13:18:05.477] <TB2> INFO: 7783580 events read in total (268368ms).
[13:18:31.584] <TB2> INFO: 8553260 events read in total (294475ms).
[13:18:57.194] <TB2> INFO: 9323140 events read in total (320085ms).
[13:19:23.929] <TB2> INFO: 10090800 events read in total (346820ms).
[13:19:51.025] <TB2> INFO: 10857840 events read in total (373916ms).
[13:20:18.020] <TB2> INFO: 11624480 events read in total (400911ms).
[13:20:43.576] <TB2> INFO: 12391620 events read in total (426467ms).
[13:21:06.254] <TB2> INFO: 13159800 events read in total (449145ms).
[13:21:11.596] <TB2> INFO: 13312000 events read in total (454487ms).
[13:21:11.644] <TB2> INFO: Test took 455556ms.
[13:21:11.792] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:34.378] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 61.0434 for pixel 3/32 mean/min/max = 46.6567/32.2006/61.1128
[13:21:34.378] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 61.2434 for pixel 15/5 mean/min/max = 46.3065/31.2161/61.397
[13:21:34.378] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.1761 for pixel 5/67 mean/min/max = 44.711/32.2445/57.1775
[13:21:34.379] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 61.3949 for pixel 11/15 mean/min/max = 47.6956/33.9026/61.4885
[13:21:34.379] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.0443 for pixel 0/76 mean/min/max = 47.1421/34.1/60.1842
[13:21:34.379] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.2998 for pixel 5/79 mean/min/max = 45.7363/32.0793/59.3934
[13:21:34.379] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 56.9936 for pixel 4/5 mean/min/max = 44.8087/32.4705/57.1468
[13:21:34.380] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 60.9233 for pixel 6/64 mean/min/max = 46.4922/32.0454/60.939
[13:21:34.380] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 60.5152 for pixel 51/2 mean/min/max = 46.7085/32.8362/60.5808
[13:21:34.380] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 62.2533 for pixel 2/3 mean/min/max = 46.7108/31.087/62.3347
[13:21:34.380] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.2475 for pixel 6/68 mean/min/max = 46.5383/32.7656/60.3109
[13:21:34.380] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.8894 for pixel 9/0 mean/min/max = 45.2812/31.5929/58.9695
[13:21:34.381] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.2394 for pixel 10/77 mean/min/max = 45.4304/31.5749/59.2859
[13:21:34.381] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.6737 for pixel 49/79 mean/min/max = 46.8823/34.0903/59.6742
[13:21:34.381] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 62.3717 for pixel 47/9 mean/min/max = 48.5191/34.3049/62.7332
[13:21:34.381] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.7187 for pixel 0/11 mean/min/max = 47.2489/34.5831/59.9146
[13:21:34.382] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:21:34.513] <TB2> INFO: Expecting 1029120 events.
[13:22:00.173] <TB2> INFO: 1029120 events read in total (24943ms).
[13:22:00.178] <TB2> INFO: Expecting 1029120 events.
[13:22:25.920] <TB2> INFO: 1029120 events read in total (25204ms).
[13:22:25.928] <TB2> INFO: Expecting 1029120 events.
[13:22:51.755] <TB2> INFO: 1029120 events read in total (25299ms).
[13:22:51.765] <TB2> INFO: Expecting 1029120 events.
[13:23:17.613] <TB2> INFO: 1029120 events read in total (25310ms).
[13:23:17.626] <TB2> INFO: Expecting 1029120 events.
[13:23:43.525] <TB2> INFO: 1029120 events read in total (25371ms).
[13:23:43.539] <TB2> INFO: Expecting 1029120 events.
[13:24:08.625] <TB2> INFO: 1029120 events read in total (24558ms).
[13:24:08.640] <TB2> INFO: Expecting 1029120 events.
[13:24:32.101] <TB2> INFO: 1029120 events read in total (22927ms).
[13:24:32.119] <TB2> INFO: Expecting 1029120 events.
[13:24:55.822] <TB2> INFO: 1029120 events read in total (23174ms).
[13:24:55.841] <TB2> INFO: Expecting 1029120 events.
[13:25:19.524] <TB2> INFO: 1029120 events read in total (23154ms).
[13:25:19.545] <TB2> INFO: Expecting 1029120 events.
[13:25:43.965] <TB2> INFO: 1029120 events read in total (23892ms).
[13:25:43.989] <TB2> INFO: Expecting 1029120 events.
[13:26:08.989] <TB2> INFO: 1029120 events read in total (24473ms).
[13:26:09.025] <TB2> INFO: Expecting 1029120 events.
[13:26:34.009] <TB2> INFO: 1029120 events read in total (24457ms).
[13:26:34.036] <TB2> INFO: Expecting 1029120 events.
[13:26:59.502] <TB2> INFO: 1029120 events read in total (24939ms).
[13:26:59.528] <TB2> INFO: Expecting 1029120 events.
[13:27:24.192] <TB2> INFO: 1029120 events read in total (24136ms).
[13:27:24.223] <TB2> INFO: Expecting 1029120 events.
[13:27:49.320] <TB2> INFO: 1029120 events read in total (24569ms).
[13:27:49.351] <TB2> INFO: Expecting 1029120 events.
[13:28:15.455] <TB2> INFO: 1029120 events read in total (25577ms).
[13:28:15.495] <TB2> INFO: Test took 401113ms.
[13:28:16.491] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:28:16.499] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:28:16.499] <TB2> INFO: run 1 of 1
[13:28:16.834] <TB2> INFO: Expecting 8320000 events.
[13:28:47.254] <TB2> INFO: 724670 events read in total (29704ms).
[13:29:17.020] <TB2> INFO: 1447660 events read in total (59470ms).
[13:29:46.345] <TB2> INFO: 2169820 events read in total (88795ms).
[13:30:14.836] <TB2> INFO: 2892380 events read in total (117286ms).
[13:30:43.566] <TB2> INFO: 3613920 events read in total (146016ms).
[13:31:13.598] <TB2> INFO: 4334810 events read in total (176048ms).
[13:31:43.863] <TB2> INFO: 5051000 events read in total (206313ms).
[13:32:14.207] <TB2> INFO: 5765920 events read in total (236657ms).
[13:32:44.306] <TB2> INFO: 6479230 events read in total (266756ms).
[13:33:14.028] <TB2> INFO: 7191710 events read in total (296478ms).
[13:33:39.657] <TB2> INFO: 7904270 events read in total (322107ms).
[13:33:54.549] <TB2> INFO: 8320000 events read in total (336999ms).
[13:33:54.613] <TB2> INFO: Test took 338114ms.
[13:33:54.830] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:22.513] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.059123 .. 255.000000
[13:34:22.595] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 255 (-1/-1) hits flags = 16 (plus default)
[13:34:22.603] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[13:34:22.604] <TB2> INFO: run 1 of 1
[13:34:22.919] <TB2> INFO: Expecting 21299200 events.
[13:34:50.932] <TB2> INFO: 712460 events read in total (27297ms).
[13:35:18.577] <TB2> INFO: 1424540 events read in total (54942ms).
[13:35:46.410] <TB2> INFO: 2136720 events read in total (82775ms).
[13:36:13.906] <TB2> INFO: 2849060 events read in total (110271ms).
[13:36:39.483] <TB2> INFO: 3561720 events read in total (135848ms).
[13:37:04.914] <TB2> INFO: 4274040 events read in total (161279ms).
[13:37:31.277] <TB2> INFO: 4986360 events read in total (187642ms).
[13:37:57.218] <TB2> INFO: 5699660 events read in total (213583ms).
[13:38:23.499] <TB2> INFO: 6412500 events read in total (239864ms).
[13:38:50.304] <TB2> INFO: 7124900 events read in total (266669ms).
[13:39:12.996] <TB2> INFO: 7837260 events read in total (289361ms).
[13:39:40.800] <TB2> INFO: 8550180 events read in total (317165ms).
[13:40:08.501] <TB2> INFO: 9263200 events read in total (344866ms).
[13:40:35.574] <TB2> INFO: 9975820 events read in total (371939ms).
[13:41:02.741] <TB2> INFO: 10688280 events read in total (399106ms).
[13:41:25.908] <TB2> INFO: 11400760 events read in total (422273ms).
[13:41:53.345] <TB2> INFO: 12113180 events read in total (449710ms).
[13:42:21.243] <TB2> INFO: 12825800 events read in total (477608ms).
[13:42:48.580] <TB2> INFO: 13537820 events read in total (504945ms).
[13:43:13.776] <TB2> INFO: 14249520 events read in total (530141ms).
[13:43:39.125] <TB2> INFO: 14961700 events read in total (555490ms).
[13:44:04.832] <TB2> INFO: 15673220 events read in total (581197ms).
[13:44:29.771] <TB2> INFO: 16384400 events read in total (606136ms).
[13:44:55.721] <TB2> INFO: 17095320 events read in total (632086ms).
[13:45:19.163] <TB2> INFO: 17806540 events read in total (655528ms).
[13:45:45.203] <TB2> INFO: 18517500 events read in total (681568ms).
[13:46:12.167] <TB2> INFO: 19228360 events read in total (708532ms).
[13:46:40.066] <TB2> INFO: 19939240 events read in total (736431ms).
[13:47:06.600] <TB2> INFO: 20650340 events read in total (762965ms).
[13:47:29.590] <TB2> INFO: 21299200 events read in total (785955ms).
[13:47:29.666] <TB2> INFO: Test took 787062ms.
[13:47:29.941] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:57.690] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 14.906899 .. 45.516310
[13:47:57.766] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 4 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:47:57.774] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[13:47:57.774] <TB2> INFO: run 1 of 1
[13:47:58.077] <TB2> INFO: Expecting 4326400 events.
[13:48:26.602] <TB2> INFO: 943280 events read in total (27795ms).
[13:48:54.361] <TB2> INFO: 1886360 events read in total (55554ms).
[13:49:21.933] <TB2> INFO: 2828680 events read in total (83127ms).
[13:49:46.322] <TB2> INFO: 3769960 events read in total (107515ms).
[13:50:01.012] <TB2> INFO: 4326400 events read in total (122205ms).
[13:50:01.027] <TB2> INFO: Test took 123254ms.
[13:50:01.062] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:14.742] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 19.614115 .. 42.579424
[13:50:14.823] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 9 .. 52 (-1/-1) hits flags = 16 (plus default)
[13:50:14.831] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[13:50:14.831] <TB2> INFO: run 1 of 1
[13:50:15.142] <TB2> INFO: Expecting 3660800 events.
[13:50:44.067] <TB2> INFO: 941600 events read in total (28208ms).
[13:51:12.148] <TB2> INFO: 1883900 events read in total (56289ms).
[13:51:40.762] <TB2> INFO: 2825420 events read in total (84904ms).
[13:52:05.396] <TB2> INFO: 3660800 events read in total (109537ms).
[13:52:05.416] <TB2> INFO: Test took 110585ms.
[13:52:05.448] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:18.081] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 2.897538 .. 42.579424
[13:52:18.156] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 2 .. 52 (-1/-1) hits flags = 16 (plus default)
[13:52:18.164] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[13:52:18.164] <TB2> INFO: run 1 of 1
[13:52:18.467] <TB2> INFO: Expecting 4243200 events.
[13:52:49.337] <TB2> INFO: 981240 events read in total (30154ms).
[13:53:18.929] <TB2> INFO: 1962260 events read in total (59746ms).
[13:53:44.240] <TB2> INFO: 2943360 events read in total (85058ms).
[13:54:13.835] <TB2> INFO: 3923660 events read in total (114652ms).
[13:54:22.383] <TB2> INFO: 4243200 events read in total (123200ms).
[13:54:22.398] <TB2> INFO: Test took 124234ms.
[13:54:22.428] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:35.248] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:54:35.248] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:54:35.258] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:54:35.258] <TB2> INFO: run 1 of 1
[13:54:35.570] <TB2> INFO: Expecting 1705600 events.
[13:55:06.709] <TB2> INFO: 878460 events read in total (30423ms).
[13:55:34.668] <TB2> INFO: 1705600 events read in total (58382ms).
[13:55:34.691] <TB2> INFO: Test took 59434ms.
[13:55:34.728] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:49.269] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:55:49.279] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:55:49.280] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:55:49.280] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:55:49.280] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:55:49.280] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:55:49.280] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:55:49.280] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:55:49.280] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:55:49.287] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:55:49.293] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:55:49.300] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:55:49.306] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:55:49.313] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:55:49.320] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:55:49.326] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:55:49.333] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:55:49.339] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:55:49.346] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:55:49.352] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:55:49.359] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:55:49.365] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:55:49.372] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:55:49.379] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:55:49.385] <TB2> INFO: PixTestTrim::trimTest() done
[13:55:49.385] <TB2> INFO: vtrim: 103 98 89 106 91 97 84 103 99 106 90 83 106 84 99 97
[13:55:49.385] <TB2> INFO: vthrcomp: 88 87 85 77 75 87 80 91 104 84 80 80 83 76 73 77
[13:55:49.385] <TB2> INFO: vcal mean: 34.94 34.89 34.94 34.91 34.97 34.90 34.96 34.89 34.95 34.92 34.94 34.95 34.94 34.95 34.91 34.98
[13:55:49.385] <TB2> INFO: vcal RMS: 0.97 0.86 0.75 0.98 1.09 0.81 0.80 0.82 0.80 0.97 0.85 0.77 0.84 0.79 0.85 0.76
[13:55:49.385] <TB2> INFO: bits mean: 8.86 9.49 9.52 8.79 8.15 9.39 9.67 9.10 8.00 9.15 9.31 9.39 9.51 8.34 8.28 8.31
[13:55:49.385] <TB2> INFO: bits RMS: 2.93 2.72 2.73 2.58 2.87 2.72 2.63 2.79 3.09 2.89 2.60 2.77 2.73 2.77 2.69 2.69
[13:55:49.392] <TB2> INFO: ----------------------------------------------------------------------
[13:55:49.392] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:55:49.392] <TB2> INFO: ----------------------------------------------------------------------
[13:55:49.394] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:55:49.402] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:55:49.402] <TB2> INFO: run 1 of 1
[13:55:49.708] <TB2> INFO: Expecting 8320000 events.
[13:56:21.864] <TB2> INFO: 899080 events read in total (31439ms).
[13:56:52.898] <TB2> INFO: 1790670 events read in total (62473ms).
[13:57:21.046] <TB2> INFO: 2679560 events read in total (90621ms).
[13:57:52.635] <TB2> INFO: 3567030 events read in total (122211ms).
[13:58:24.872] <TB2> INFO: 4450390 events read in total (154447ms).
[13:58:56.910] <TB2> INFO: 5329920 events read in total (186485ms).
[13:59:25.444] <TB2> INFO: 6208980 events read in total (215019ms).
[13:59:57.407] <TB2> INFO: 7087580 events read in total (246982ms).
[14:00:27.934] <TB2> INFO: 7967780 events read in total (277509ms).
[14:00:38.763] <TB2> INFO: 8320000 events read in total (288338ms).
[14:00:38.803] <TB2> INFO: Test took 289400ms.
[14:00:38.921] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:06.284] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 156 (-1/-1) hits flags = 16 (plus default)
[14:01:06.293] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[14:01:06.293] <TB2> INFO: run 1 of 1
[14:01:06.624] <TB2> INFO: Expecting 6531200 events.
[14:01:38.160] <TB2> INFO: 949640 events read in total (30820ms).
[14:02:08.433] <TB2> INFO: 1890550 events read in total (61093ms).
[14:02:39.221] <TB2> INFO: 2826910 events read in total (91881ms).
[14:03:07.086] <TB2> INFO: 3756620 events read in total (119746ms).
[14:03:37.668] <TB2> INFO: 4682440 events read in total (150328ms).
[14:04:06.934] <TB2> INFO: 5606360 events read in total (179594ms).
[14:04:36.481] <TB2> INFO: 6531200 events read in total (209141ms).
[14:04:36.511] <TB2> INFO: Test took 210195ms.
[14:04:36.588] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:01.271] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 146 (-1/-1) hits flags = 16 (plus default)
[14:05:01.280] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[14:05:01.280] <TB2> INFO: run 1 of 1
[14:05:01.619] <TB2> INFO: Expecting 6115200 events.
[14:05:35.254] <TB2> INFO: 977820 events read in total (32914ms).
[14:06:07.045] <TB2> INFO: 1945000 events read in total (64705ms).
[14:06:39.387] <TB2> INFO: 2907350 events read in total (97048ms).
[14:07:10.743] <TB2> INFO: 3860090 events read in total (128403ms).
[14:07:43.060] <TB2> INFO: 4810780 events read in total (160720ms).
[14:08:13.134] <TB2> INFO: 5762050 events read in total (190794ms).
[14:08:24.763] <TB2> INFO: 6115200 events read in total (202423ms).
[14:08:24.797] <TB2> INFO: Test took 203517ms.
[14:08:24.870] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:50.702] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 146 (-1/-1) hits flags = 16 (plus default)
[14:08:50.710] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[14:08:50.710] <TB2> INFO: run 1 of 1
[14:08:51.038] <TB2> INFO: Expecting 6115200 events.
[14:09:24.304] <TB2> INFO: 977250 events read in total (32549ms).
[14:09:56.681] <TB2> INFO: 1943880 events read in total (64926ms).
[14:10:27.503] <TB2> INFO: 2905790 events read in total (95749ms).
[14:10:59.315] <TB2> INFO: 3857990 events read in total (127560ms).
[14:11:31.623] <TB2> INFO: 4807880 events read in total (159868ms).
[14:12:04.380] <TB2> INFO: 5758490 events read in total (192625ms).
[14:12:15.733] <TB2> INFO: 6115200 events read in total (203978ms).
[14:12:15.762] <TB2> INFO: Test took 205052ms.
[14:12:15.829] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:37.776] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 146 (-1/-1) hits flags = 16 (plus default)
[14:12:37.784] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[14:12:37.784] <TB2> INFO: run 1 of 1
[14:12:38.088] <TB2> INFO: Expecting 6115200 events.
[14:13:11.455] <TB2> INFO: 976700 events read in total (32651ms).
[14:13:43.586] <TB2> INFO: 1942680 events read in total (64782ms).
[14:14:16.010] <TB2> INFO: 2903590 events read in total (97207ms).
[14:14:46.667] <TB2> INFO: 3855210 events read in total (127863ms).
[14:15:16.917] <TB2> INFO: 4804330 events read in total (158113ms).
[14:15:47.705] <TB2> INFO: 5754370 events read in total (188901ms).
[14:15:59.902] <TB2> INFO: 6115200 events read in total (201098ms).
[14:15:59.930] <TB2> INFO: Test took 202146ms.
[14:15:59.997] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:23.502] <TB2> INFO: PixTestTrim::trimBitTest() done
[14:16:23.503] <TB2> INFO: PixTestTrim::doTest() done, duration: 4149 seconds
[14:16:24.228] <TB2> INFO: ######################################################################
[14:16:24.228] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:16:24.228] <TB2> INFO: ######################################################################
[14:16:24.547] <TB2> INFO: Expecting 41600 events.
[14:16:28.969] <TB2> INFO: 41600 events read in total (3705ms).
[14:16:28.969] <TB2> INFO: Test took 4739ms.
[14:16:28.976] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:29.542] <TB2> INFO: Expecting 41600 events.
[14:16:34.032] <TB2> INFO: 41600 events read in total (3774ms).
[14:16:34.033] <TB2> INFO: Test took 4797ms.
[14:16:34.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:34.389] <TB2> INFO: Expecting 41600 events.
[14:16:38.927] <TB2> INFO: 41600 events read in total (3822ms).
[14:16:38.927] <TB2> INFO: Test took 4863ms.
[14:16:38.934] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:38.941] <TB2> INFO: The DUT currently contains the following objects:
[14:16:38.941] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:38.941] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:38.941] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:38.941] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:38.941] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:38.941] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:39.279] <TB2> INFO: Expecting 2560 events.
[14:16:40.405] <TB2> INFO: 2560 events read in total (410ms).
[14:16:40.405] <TB2> INFO: Test took 1464ms.
[14:16:40.406] <TB2> INFO: The DUT currently contains the following objects:
[14:16:40.406] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:40.406] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:40.406] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:40.406] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:40.406] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.406] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.407] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.407] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.407] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.407] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.407] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:40.819] <TB2> INFO: Expecting 2560 events.
[14:16:41.888] <TB2> INFO: 2560 events read in total (353ms).
[14:16:41.889] <TB2> INFO: Test took 1482ms.
[14:16:41.890] <TB2> INFO: The DUT currently contains the following objects:
[14:16:41.890] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:41.890] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:41.890] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:41.890] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:41.890] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.890] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:41.891] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:42.303] <TB2> INFO: Expecting 2560 events.
[14:16:43.371] <TB2> INFO: 2560 events read in total (352ms).
[14:16:43.371] <TB2> INFO: Test took 1480ms.
[14:16:43.371] <TB2> INFO: The DUT currently contains the following objects:
[14:16:43.371] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:43.371] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:43.371] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:43.371] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:43.372] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.372] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:43.785] <TB2> INFO: Expecting 2560 events.
[14:16:44.869] <TB2> INFO: 2560 events read in total (367ms).
[14:16:44.869] <TB2> INFO: Test took 1497ms.
[14:16:44.869] <TB2> INFO: The DUT currently contains the following objects:
[14:16:44.869] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:44.869] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:44.870] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:44.870] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:44.870] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:44.870] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:45.284] <TB2> INFO: Expecting 2560 events.
[14:16:46.352] <TB2> INFO: 2560 events read in total (352ms).
[14:16:46.352] <TB2> INFO: Test took 1482ms.
[14:16:46.353] <TB2> INFO: The DUT currently contains the following objects:
[14:16:46.353] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:46.353] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:46.353] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:46.353] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:46.353] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.353] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.353] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.353] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.353] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.353] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.353] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.353] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.353] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.354] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.354] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.354] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.354] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.354] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.354] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.354] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:46.767] <TB2> INFO: Expecting 2560 events.
[14:16:47.835] <TB2> INFO: 2560 events read in total (352ms).
[14:16:47.835] <TB2> INFO: Test took 1481ms.
[14:16:47.836] <TB2> INFO: The DUT currently contains the following objects:
[14:16:47.836] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:47.836] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:47.836] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:47.836] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:47.836] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.836] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.837] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.837] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.837] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.837] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.837] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:47.837] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:48.250] <TB2> INFO: Expecting 2560 events.
[14:16:49.361] <TB2> INFO: 2560 events read in total (395ms).
[14:16:49.361] <TB2> INFO: Test took 1524ms.
[14:16:49.362] <TB2> INFO: The DUT currently contains the following objects:
[14:16:49.362] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:49.362] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:49.362] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:49.362] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:49.362] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.362] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.363] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:49.776] <TB2> INFO: Expecting 2560 events.
[14:16:50.845] <TB2> INFO: 2560 events read in total (353ms).
[14:16:50.845] <TB2> INFO: Test took 1482ms.
[14:16:50.846] <TB2> INFO: The DUT currently contains the following objects:
[14:16:50.846] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:50.846] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:50.846] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:50.846] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:50.846] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:50.846] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:51.260] <TB2> INFO: Expecting 2560 events.
[14:16:52.328] <TB2> INFO: 2560 events read in total (352ms).
[14:16:52.329] <TB2> INFO: Test took 1483ms.
[14:16:52.329] <TB2> INFO: The DUT currently contains the following objects:
[14:16:52.329] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:52.329] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:52.330] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:52.330] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:52.330] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.330] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:52.743] <TB2> INFO: Expecting 2560 events.
[14:16:53.810] <TB2> INFO: 2560 events read in total (351ms).
[14:16:53.811] <TB2> INFO: Test took 1481ms.
[14:16:53.811] <TB2> INFO: The DUT currently contains the following objects:
[14:16:53.811] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:53.811] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:53.811] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:53.811] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:53.811] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.811] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.811] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.811] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.811] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.811] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.811] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.811] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.811] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.812] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.812] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.812] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.812] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.812] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.812] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:53.812] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:54.226] <TB2> INFO: Expecting 2560 events.
[14:16:55.293] <TB2> INFO: 2560 events read in total (351ms).
[14:16:55.293] <TB2> INFO: Test took 1481ms.
[14:16:55.293] <TB2> INFO: The DUT currently contains the following objects:
[14:16:55.293] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:55.293] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:55.294] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:55.294] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:55.294] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.294] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.294] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.294] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.294] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.294] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.294] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.296] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:55.707] <TB2> INFO: Expecting 2560 events.
[14:16:56.776] <TB2> INFO: 2560 events read in total (352ms).
[14:16:56.776] <TB2> INFO: Test took 1480ms.
[14:16:56.777] <TB2> INFO: The DUT currently contains the following objects:
[14:16:56.777] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:56.777] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:56.777] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:56.777] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:56.777] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.777] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.777] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.777] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.777] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.777] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.777] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:56.778] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:57.191] <TB2> INFO: Expecting 2560 events.
[14:16:58.261] <TB2> INFO: 2560 events read in total (354ms).
[14:16:58.261] <TB2> INFO: Test took 1483ms.
[14:16:58.262] <TB2> INFO: The DUT currently contains the following objects:
[14:16:58.262] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:58.262] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:58.262] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:58.262] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:58.262] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.262] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.263] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.263] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.263] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:58.676] <TB2> INFO: Expecting 2560 events.
[14:16:59.744] <TB2> INFO: 2560 events read in total (351ms).
[14:16:59.744] <TB2> INFO: Test took 1481ms.
[14:16:59.745] <TB2> INFO: The DUT currently contains the following objects:
[14:16:59.745] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:16:59.745] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:16:59.745] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:16:59.745] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:16:59.745] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.745] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.746] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:16:59.746] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:00.159] <TB2> INFO: Expecting 2560 events.
[14:17:01.227] <TB2> INFO: 2560 events read in total (352ms).
[14:17:01.228] <TB2> INFO: Test took 1482ms.
[14:17:01.228] <TB2> INFO: The DUT currently contains the following objects:
[14:17:01.228] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:17:01.228] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:17:01.228] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:17:01.228] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:17:01.228] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.228] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.229] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.229] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.229] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.229] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.229] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.229] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:17:01.642] <TB2> INFO: Expecting 2560 events.
[14:17:02.726] <TB2> INFO: 2560 events read in total (368ms).
[14:17:02.726] <TB2> INFO: Test took 1497ms.
[14:17:02.730] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:17:03.143] <TB2> INFO: Expecting 655360 events.
[14:17:20.533] <TB2> INFO: 655360 events read in total (16674ms).
[14:17:20.543] <TB2> INFO: Expecting 655360 events.
[14:17:37.815] <TB2> INFO: 655360 events read in total (16744ms).
[14:17:37.827] <TB2> INFO: Expecting 655360 events.
[14:17:53.315] <TB2> INFO: 655360 events read in total (14960ms).
[14:17:53.330] <TB2> INFO: Expecting 655360 events.
[14:18:08.716] <TB2> INFO: 655360 events read in total (14858ms).
[14:18:08.734] <TB2> INFO: Expecting 655360 events.
[14:18:25.485] <TB2> INFO: 655360 events read in total (16213ms).
[14:18:25.508] <TB2> INFO: Expecting 655360 events.
[14:18:42.304] <TB2> INFO: 655360 events read in total (16268ms).
[14:18:42.331] <TB2> INFO: Expecting 655360 events.
[14:18:59.182] <TB2> INFO: 655360 events read in total (16323ms).
[14:18:59.212] <TB2> INFO: Expecting 655360 events.
[14:19:15.901] <TB2> INFO: 655360 events read in total (16162ms).
[14:19:15.937] <TB2> INFO: Expecting 655360 events.
[14:19:32.607] <TB2> INFO: 655360 events read in total (16143ms).
[14:19:32.644] <TB2> INFO: Expecting 655360 events.
[14:19:49.076] <TB2> INFO: 655360 events read in total (15905ms).
[14:19:49.116] <TB2> INFO: Expecting 655360 events.
[14:20:05.771] <TB2> INFO: 655360 events read in total (16128ms).
[14:20:05.813] <TB2> INFO: Expecting 655360 events.
[14:20:22.555] <TB2> INFO: 655360 events read in total (16215ms).
[14:20:22.601] <TB2> INFO: Expecting 655360 events.
[14:20:39.252] <TB2> INFO: 655360 events read in total (16123ms).
[14:20:39.301] <TB2> INFO: Expecting 655360 events.
[14:20:55.969] <TB2> INFO: 655360 events read in total (16140ms).
[14:20:56.023] <TB2> INFO: Expecting 655360 events.
[14:21:12.568] <TB2> INFO: 655360 events read in total (16018ms).
[14:21:12.626] <TB2> INFO: Expecting 655360 events.
[14:21:29.258] <TB2> INFO: 655360 events read in total (16105ms).
[14:21:29.324] <TB2> INFO: Test took 266594ms.
[14:21:29.407] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:29.718] <TB2> INFO: Expecting 655360 events.
[14:21:46.278] <TB2> INFO: 655360 events read in total (15844ms).
[14:21:46.287] <TB2> INFO: Expecting 655360 events.
[14:22:02.505] <TB2> INFO: 655360 events read in total (15690ms).
[14:22:02.517] <TB2> INFO: Expecting 655360 events.
[14:22:18.894] <TB2> INFO: 655360 events read in total (15850ms).
[14:22:18.913] <TB2> INFO: Expecting 655360 events.
[14:22:35.142] <TB2> INFO: 655360 events read in total (15702ms).
[14:22:35.160] <TB2> INFO: Expecting 655360 events.
[14:22:51.649] <TB2> INFO: 655360 events read in total (15961ms).
[14:22:51.671] <TB2> INFO: Expecting 655360 events.
[14:23:07.994] <TB2> INFO: 655360 events read in total (15796ms).
[14:23:08.022] <TB2> INFO: Expecting 655360 events.
[14:23:23.748] <TB2> INFO: 655360 events read in total (15198ms).
[14:23:23.779] <TB2> INFO: Expecting 655360 events.
[14:23:38.759] <TB2> INFO: 655360 events read in total (14453ms).
[14:23:38.794] <TB2> INFO: Expecting 655360 events.
[14:23:53.818] <TB2> INFO: 655360 events read in total (14496ms).
[14:23:53.854] <TB2> INFO: Expecting 655360 events.
[14:24:09.797] <TB2> INFO: 655360 events read in total (15415ms).
[14:24:09.843] <TB2> INFO: Expecting 655360 events.
[14:24:24.983] <TB2> INFO: 655360 events read in total (14612ms).
[14:24:25.024] <TB2> INFO: Expecting 655360 events.
[14:24:40.256] <TB2> INFO: 655360 events read in total (14704ms).
[14:24:40.307] <TB2> INFO: Expecting 655360 events.
[14:24:55.623] <TB2> INFO: 655360 events read in total (14789ms).
[14:24:55.674] <TB2> INFO: Expecting 655360 events.
[14:25:10.954] <TB2> INFO: 655360 events read in total (14753ms).
[14:25:11.034] <TB2> INFO: Expecting 655360 events.
[14:25:26.091] <TB2> INFO: 655360 events read in total (14530ms).
[14:25:26.148] <TB2> INFO: Expecting 655360 events.
[14:25:41.240] <TB2> INFO: 655360 events read in total (14565ms).
[14:25:41.301] <TB2> INFO: Test took 251894ms.
[14:25:41.490] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.498] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.504] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:25:41.511] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.517] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:25:41.524] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:25:41.533] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:25:41.543] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:25:41.552] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[14:25:41.562] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.571] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:25:41.581] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:25:41.590] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:25:41.599] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.609] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.618] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.626] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.633] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.642] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.652] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.659] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.666] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:25:41.672] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:25:41.679] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.685] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.692] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.698] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:25:41.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:25:41.737] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:25:41.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:25:41.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:25:41.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:25:41.771] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:25:41.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:25:41.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:25:41.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:25:41.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:25:41.773] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:25:41.773] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:25:41.773] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:25:41.773] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:25:41.774] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:25:41.774] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:25:42.090] <TB2> INFO: Expecting 41600 events.
[14:25:46.566] <TB2> INFO: 41600 events read in total (3759ms).
[14:25:46.567] <TB2> INFO: Test took 4790ms.
[14:25:47.114] <TB2> INFO: Expecting 41600 events.
[14:25:51.529] <TB2> INFO: 41600 events read in total (3699ms).
[14:25:51.529] <TB2> INFO: Test took 4723ms.
[14:25:52.075] <TB2> INFO: Expecting 41600 events.
[14:25:56.613] <TB2> INFO: 41600 events read in total (3822ms).
[14:25:56.613] <TB2> INFO: Test took 4843ms.
[14:25:56.834] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:25:56.965] <TB2> INFO: Expecting 2560 events.
[14:25:58.034] <TB2> INFO: 2560 events read in total (352ms).
[14:25:58.035] <TB2> INFO: Test took 1201ms.
[14:25:58.037] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:25:58.450] <TB2> INFO: Expecting 2560 events.
[14:25:59.521] <TB2> INFO: 2560 events read in total (354ms).
[14:25:59.522] <TB2> INFO: Test took 1485ms.
[14:25:59.524] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:25:59.937] <TB2> INFO: Expecting 2560 events.
[14:26:01.005] <TB2> INFO: 2560 events read in total (352ms).
[14:26:01.005] <TB2> INFO: Test took 1481ms.
[14:26:01.007] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:01.421] <TB2> INFO: Expecting 2560 events.
[14:26:02.491] <TB2> INFO: 2560 events read in total (354ms).
[14:26:02.491] <TB2> INFO: Test took 1484ms.
[14:26:02.494] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:02.907] <TB2> INFO: Expecting 2560 events.
[14:26:03.975] <TB2> INFO: 2560 events read in total (352ms).
[14:26:03.975] <TB2> INFO: Test took 1482ms.
[14:26:03.978] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:04.391] <TB2> INFO: Expecting 2560 events.
[14:26:05.459] <TB2> INFO: 2560 events read in total (352ms).
[14:26:05.459] <TB2> INFO: Test took 1481ms.
[14:26:05.461] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:05.875] <TB2> INFO: Expecting 2560 events.
[14:26:06.944] <TB2> INFO: 2560 events read in total (353ms).
[14:26:06.944] <TB2> INFO: Test took 1483ms.
[14:26:06.947] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:07.360] <TB2> INFO: Expecting 2560 events.
[14:26:08.429] <TB2> INFO: 2560 events read in total (353ms).
[14:26:08.430] <TB2> INFO: Test took 1483ms.
[14:26:08.432] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:08.845] <TB2> INFO: Expecting 2560 events.
[14:26:09.913] <TB2> INFO: 2560 events read in total (351ms).
[14:26:09.913] <TB2> INFO: Test took 1481ms.
[14:26:09.915] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:10.329] <TB2> INFO: Expecting 2560 events.
[14:26:11.397] <TB2> INFO: 2560 events read in total (352ms).
[14:26:11.397] <TB2> INFO: Test took 1482ms.
[14:26:11.400] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:11.813] <TB2> INFO: Expecting 2560 events.
[14:26:12.880] <TB2> INFO: 2560 events read in total (351ms).
[14:26:12.880] <TB2> INFO: Test took 1481ms.
[14:26:12.883] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:13.295] <TB2> INFO: Expecting 2560 events.
[14:26:14.361] <TB2> INFO: 2560 events read in total (349ms).
[14:26:14.362] <TB2> INFO: Test took 1480ms.
[14:26:14.364] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:14.777] <TB2> INFO: Expecting 2560 events.
[14:26:15.844] <TB2> INFO: 2560 events read in total (351ms).
[14:26:15.845] <TB2> INFO: Test took 1481ms.
[14:26:15.847] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:16.260] <TB2> INFO: Expecting 2560 events.
[14:26:17.327] <TB2> INFO: 2560 events read in total (351ms).
[14:26:17.328] <TB2> INFO: Test took 1481ms.
[14:26:17.330] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:17.743] <TB2> INFO: Expecting 2560 events.
[14:26:18.810] <TB2> INFO: 2560 events read in total (350ms).
[14:26:18.810] <TB2> INFO: Test took 1480ms.
[14:26:18.813] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:19.226] <TB2> INFO: Expecting 2560 events.
[14:26:20.307] <TB2> INFO: 2560 events read in total (365ms).
[14:26:20.308] <TB2> INFO: Test took 1495ms.
[14:26:20.310] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:20.723] <TB2> INFO: Expecting 2560 events.
[14:26:21.791] <TB2> INFO: 2560 events read in total (351ms).
[14:26:21.791] <TB2> INFO: Test took 1481ms.
[14:26:21.793] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:22.207] <TB2> INFO: Expecting 2560 events.
[14:26:23.274] <TB2> INFO: 2560 events read in total (351ms).
[14:26:23.274] <TB2> INFO: Test took 1481ms.
[14:26:23.277] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:23.690] <TB2> INFO: Expecting 2560 events.
[14:26:24.770] <TB2> INFO: 2560 events read in total (364ms).
[14:26:24.770] <TB2> INFO: Test took 1494ms.
[14:26:24.772] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:25.186] <TB2> INFO: Expecting 2560 events.
[14:26:26.255] <TB2> INFO: 2560 events read in total (353ms).
[14:26:26.255] <TB2> INFO: Test took 1483ms.
[14:26:26.257] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:26.671] <TB2> INFO: Expecting 2560 events.
[14:26:27.753] <TB2> INFO: 2560 events read in total (366ms).
[14:26:27.754] <TB2> INFO: Test took 1497ms.
[14:26:27.756] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:28.169] <TB2> INFO: Expecting 2560 events.
[14:26:29.236] <TB2> INFO: 2560 events read in total (351ms).
[14:26:29.236] <TB2> INFO: Test took 1480ms.
[14:26:29.239] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:29.652] <TB2> INFO: Expecting 2560 events.
[14:26:30.719] <TB2> INFO: 2560 events read in total (351ms).
[14:26:30.720] <TB2> INFO: Test took 1481ms.
[14:26:30.722] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:31.135] <TB2> INFO: Expecting 2560 events.
[14:26:32.217] <TB2> INFO: 2560 events read in total (365ms).
[14:26:32.217] <TB2> INFO: Test took 1495ms.
[14:26:32.220] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:32.633] <TB2> INFO: Expecting 2560 events.
[14:26:33.700] <TB2> INFO: 2560 events read in total (351ms).
[14:26:33.700] <TB2> INFO: Test took 1481ms.
[14:26:33.703] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:34.116] <TB2> INFO: Expecting 2560 events.
[14:26:35.183] <TB2> INFO: 2560 events read in total (351ms).
[14:26:35.183] <TB2> INFO: Test took 1480ms.
[14:26:35.186] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:35.599] <TB2> INFO: Expecting 2560 events.
[14:26:36.666] <TB2> INFO: 2560 events read in total (351ms).
[14:26:36.666] <TB2> INFO: Test took 1480ms.
[14:26:36.669] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:37.082] <TB2> INFO: Expecting 2560 events.
[14:26:38.149] <TB2> INFO: 2560 events read in total (351ms).
[14:26:38.149] <TB2> INFO: Test took 1481ms.
[14:26:38.152] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:38.565] <TB2> INFO: Expecting 2560 events.
[14:26:39.649] <TB2> INFO: 2560 events read in total (368ms).
[14:26:39.649] <TB2> INFO: Test took 1498ms.
[14:26:39.652] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:40.065] <TB2> INFO: Expecting 2560 events.
[14:26:41.132] <TB2> INFO: 2560 events read in total (351ms).
[14:26:41.132] <TB2> INFO: Test took 1480ms.
[14:26:41.135] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:41.548] <TB2> INFO: Expecting 2560 events.
[14:26:42.615] <TB2> INFO: 2560 events read in total (351ms).
[14:26:42.615] <TB2> INFO: Test took 1480ms.
[14:26:42.617] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:26:43.031] <TB2> INFO: Expecting 2560 events.
[14:26:44.098] <TB2> INFO: 2560 events read in total (351ms).
[14:26:44.098] <TB2> INFO: Test took 1481ms.
[14:26:44.710] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 620 seconds
[14:26:44.711] <TB2> INFO: PH scale (per ROC): 76 73 91 87 86 86 89 83 80 82 77 80 90 86 79 84
[14:26:44.711] <TB2> INFO: PH offset (per ROC): 162 176 144 144 158 161 141 153 155 162 161 165 158 154 147 155
[14:26:44.913] <TB2> INFO: ######################################################################
[14:26:44.913] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:26:44.913] <TB2> INFO: ######################################################################
[14:26:44.922] <TB2> INFO: scanning low vcal = 10
[14:26:45.225] <TB2> INFO: Expecting 41600 events.
[14:26:48.842] <TB2> INFO: 41600 events read in total (2901ms).
[14:26:48.842] <TB2> INFO: Test took 3920ms.
[14:26:48.844] <TB2> INFO: scanning low vcal = 20
[14:26:49.257] <TB2> INFO: Expecting 41600 events.
[14:26:52.874] <TB2> INFO: 41600 events read in total (2900ms).
[14:26:52.874] <TB2> INFO: Test took 4030ms.
[14:26:52.876] <TB2> INFO: scanning low vcal = 30
[14:26:53.289] <TB2> INFO: Expecting 41600 events.
[14:26:56.907] <TB2> INFO: 41600 events read in total (2902ms).
[14:26:56.907] <TB2> INFO: Test took 4030ms.
[14:26:56.909] <TB2> INFO: scanning low vcal = 40
[14:26:57.315] <TB2> INFO: Expecting 41600 events.
[14:27:01.491] <TB2> INFO: 41600 events read in total (3460ms).
[14:27:01.491] <TB2> INFO: Test took 4582ms.
[14:27:01.494] <TB2> INFO: scanning low vcal = 50
[14:27:01.850] <TB2> INFO: Expecting 41600 events.
[14:27:06.012] <TB2> INFO: 41600 events read in total (3446ms).
[14:27:06.012] <TB2> INFO: Test took 4518ms.
[14:27:06.015] <TB2> INFO: scanning low vcal = 60
[14:27:06.368] <TB2> INFO: Expecting 41600 events.
[14:27:10.549] <TB2> INFO: 41600 events read in total (3465ms).
[14:27:10.550] <TB2> INFO: Test took 4535ms.
[14:27:10.553] <TB2> INFO: scanning low vcal = 70
[14:27:10.904] <TB2> INFO: Expecting 41600 events.
[14:27:15.116] <TB2> INFO: 41600 events read in total (3496ms).
[14:27:15.117] <TB2> INFO: Test took 4564ms.
[14:27:15.120] <TB2> INFO: scanning low vcal = 80
[14:27:15.471] <TB2> INFO: Expecting 41600 events.
[14:27:19.664] <TB2> INFO: 41600 events read in total (3477ms).
[14:27:19.664] <TB2> INFO: Test took 4544ms.
[14:27:19.667] <TB2> INFO: scanning low vcal = 90
[14:27:20.020] <TB2> INFO: Expecting 41600 events.
[14:27:24.372] <TB2> INFO: 41600 events read in total (3636ms).
[14:27:24.372] <TB2> INFO: Test took 4705ms.
[14:27:24.376] <TB2> INFO: scanning low vcal = 100
[14:27:24.730] <TB2> INFO: Expecting 41600 events.
[14:27:28.915] <TB2> INFO: 41600 events read in total (3469ms).
[14:27:28.916] <TB2> INFO: Test took 4540ms.
[14:27:28.918] <TB2> INFO: scanning low vcal = 110
[14:27:29.257] <TB2> INFO: Expecting 41600 events.
[14:27:33.395] <TB2> INFO: 41600 events read in total (3421ms).
[14:27:33.396] <TB2> INFO: Test took 4478ms.
[14:27:33.398] <TB2> INFO: scanning low vcal = 120
[14:27:33.753] <TB2> INFO: Expecting 41600 events.
[14:27:37.907] <TB2> INFO: 41600 events read in total (3438ms).
[14:27:37.907] <TB2> INFO: Test took 4509ms.
[14:27:37.910] <TB2> INFO: scanning low vcal = 130
[14:27:38.266] <TB2> INFO: Expecting 41600 events.
[14:27:42.446] <TB2> INFO: 41600 events read in total (3464ms).
[14:27:42.447] <TB2> INFO: Test took 4537ms.
[14:27:42.449] <TB2> INFO: scanning low vcal = 140
[14:27:42.803] <TB2> INFO: Expecting 41600 events.
[14:27:46.997] <TB2> INFO: 41600 events read in total (3478ms).
[14:27:46.998] <TB2> INFO: Test took 4549ms.
[14:27:47.001] <TB2> INFO: scanning low vcal = 150
[14:27:47.357] <TB2> INFO: Expecting 41600 events.
[14:27:51.698] <TB2> INFO: 41600 events read in total (3625ms).
[14:27:51.699] <TB2> INFO: Test took 4698ms.
[14:27:51.701] <TB2> INFO: scanning low vcal = 160
[14:27:52.024] <TB2> INFO: Expecting 41600 events.
[14:27:56.374] <TB2> INFO: 41600 events read in total (3633ms).
[14:27:56.375] <TB2> INFO: Test took 4674ms.
[14:27:56.377] <TB2> INFO: scanning low vcal = 170
[14:27:56.716] <TB2> INFO: Expecting 41600 events.
[14:28:01.033] <TB2> INFO: 41600 events read in total (3601ms).
[14:28:01.034] <TB2> INFO: Test took 4657ms.
[14:28:01.038] <TB2> INFO: scanning low vcal = 180
[14:28:01.367] <TB2> INFO: Expecting 41600 events.
[14:28:05.675] <TB2> INFO: 41600 events read in total (3591ms).
[14:28:05.675] <TB2> INFO: Test took 4637ms.
[14:28:05.678] <TB2> INFO: scanning low vcal = 190
[14:28:06.008] <TB2> INFO: Expecting 41600 events.
[14:28:10.306] <TB2> INFO: 41600 events read in total (3581ms).
[14:28:10.307] <TB2> INFO: Test took 4629ms.
[14:28:10.310] <TB2> INFO: scanning low vcal = 200
[14:28:10.670] <TB2> INFO: Expecting 41600 events.
[14:28:14.949] <TB2> INFO: 41600 events read in total (3563ms).
[14:28:14.950] <TB2> INFO: Test took 4640ms.
[14:28:14.953] <TB2> INFO: scanning low vcal = 210
[14:28:15.295] <TB2> INFO: Expecting 41600 events.
[14:28:19.505] <TB2> INFO: 41600 events read in total (3493ms).
[14:28:19.505] <TB2> INFO: Test took 4552ms.
[14:28:19.508] <TB2> INFO: scanning low vcal = 220
[14:28:19.861] <TB2> INFO: Expecting 41600 events.
[14:28:24.198] <TB2> INFO: 41600 events read in total (3621ms).
[14:28:24.199] <TB2> INFO: Test took 4691ms.
[14:28:24.202] <TB2> INFO: scanning low vcal = 230
[14:28:24.532] <TB2> INFO: Expecting 41600 events.
[14:28:28.768] <TB2> INFO: 41600 events read in total (3520ms).
[14:28:28.768] <TB2> INFO: Test took 4566ms.
[14:28:28.771] <TB2> INFO: scanning low vcal = 240
[14:28:29.128] <TB2> INFO: Expecting 41600 events.
[14:28:33.269] <TB2> INFO: 41600 events read in total (3425ms).
[14:28:33.269] <TB2> INFO: Test took 4498ms.
[14:28:33.272] <TB2> INFO: scanning low vcal = 250
[14:28:33.629] <TB2> INFO: Expecting 41600 events.
[14:28:37.788] <TB2> INFO: 41600 events read in total (3442ms).
[14:28:37.788] <TB2> INFO: Test took 4516ms.
[14:28:37.792] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:28:38.146] <TB2> INFO: Expecting 41600 events.
[14:28:42.325] <TB2> INFO: 41600 events read in total (3462ms).
[14:28:42.326] <TB2> INFO: Test took 4534ms.
[14:28:42.328] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:28:42.682] <TB2> INFO: Expecting 41600 events.
[14:28:46.819] <TB2> INFO: 41600 events read in total (3421ms).
[14:28:46.820] <TB2> INFO: Test took 4492ms.
[14:28:46.822] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:28:47.180] <TB2> INFO: Expecting 41600 events.
[14:28:51.340] <TB2> INFO: 41600 events read in total (3444ms).
[14:28:51.341] <TB2> INFO: Test took 4519ms.
[14:28:51.343] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:28:51.700] <TB2> INFO: Expecting 41600 events.
[14:28:56.019] <TB2> INFO: 41600 events read in total (3603ms).
[14:28:56.019] <TB2> INFO: Test took 4676ms.
[14:28:56.022] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:28:56.379] <TB2> INFO: Expecting 41600 events.
[14:29:00.636] <TB2> INFO: 41600 events read in total (3541ms).
[14:29:00.637] <TB2> INFO: Test took 4615ms.
[14:29:01.301] <TB2> INFO: PixTestGainPedestal::measure() done
[14:29:31.375] <TB2> INFO: PixTestGainPedestal::fit() done
[14:29:31.375] <TB2> INFO: non-linearity mean: 0.955 0.960 0.957 0.959 0.951 0.956 0.954 0.956 0.959 0.956 0.959 0.959 0.959 0.955 0.957 0.957
[14:29:31.375] <TB2> INFO: non-linearity RMS: 0.006 0.005 0.005 0.005 0.006 0.007 0.006 0.005 0.006 0.006 0.006 0.006 0.005 0.006 0.005 0.005
[14:29:31.376] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:29:31.394] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:29:31.413] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:29:31.431] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:29:31.450] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:29:31.468] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:29:31.487] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:29:31.506] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:29:31.524] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:29:31.542] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:29:31.561] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:29:31.579] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:29:31.598] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:29:31.616] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:29:31.635] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:29:31.653] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:29:31.672] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 166 seconds
[14:29:31.677] <TB2> INFO: readReadbackCal: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:29:31.678] <TB2> INFO: PixTestReadback::doTest() start.
[14:29:31.679] <TB2> INFO: PixTestReadback::RES sent once
[14:29:42.875] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:29:42.875] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:29:42.875] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:29:42.875] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:29:42.875] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:29:42.876] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:29:42.904] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:29:42.904] <TB2> INFO: PixTestReadback::RES sent once
[14:29:54.090] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:29:54.090] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:29:54.090] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:29:54.090] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:29:54.091] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:29:54.120] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:29:54.120] <TB2> INFO: PixTestReadback::RES sent once
[14:30:02.722] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:30:02.722] <TB2> INFO: Vbg will be calibrated using Vd calibration
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.1calibrated Vbg = 1.19206 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 159.1calibrated Vbg = 1.18877 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 140.4calibrated Vbg = 1.19115 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 156.1calibrated Vbg = 1.19664 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 150calibrated Vbg = 1.20712 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.5calibrated Vbg = 1.20182 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 153.3calibrated Vbg = 1.2122 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.8calibrated Vbg = 1.20556 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.5calibrated Vbg = 1.21272 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158.8calibrated Vbg = 1.20589 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.3calibrated Vbg = 1.20229 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 151.4calibrated Vbg = 1.20398 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 148.4calibrated Vbg = 1.19659 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.8calibrated Vbg = 1.18235 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158.9calibrated Vbg = 1.19405 :::*/*/*/*/
[14:30:02.722] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.3calibrated Vbg = 1.18868 :::*/*/*/*/
[14:30:02.724] <TB2> INFO: PixTestReadback::RES sent once
[14:32:57.071] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:32:57.071] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:32:57.071] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:32:57.071] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:32:57.071] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:32:57.071] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:32:57.071] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:32:57.072] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:32:57.099] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:32:57.100] <TB2> INFO: PixTestReadback::doTest() done
[14:32:57.115] <TB2> INFO: enter test to run
[14:32:57.115] <TB2> INFO: test: exit no parameter change
[14:32:57.726] <TB2> QUIET: Connection to board 156 closed.
[14:32:57.805] <TB2> INFO: pXar: this is the end, my friend