[08:53:17.900] <TB2> INFO: *** Welcome to pxar ***
[08:53:17.900] <TB2> INFO: *** Today: 2015/08/28
[08:53:17.900] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C15.dat
[08:53:17.901] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:53:17.901] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//defaultMaskFile.dat
[08:53:17.901] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters_C15.dat
[08:53:17.995] <TB2> INFO: clk: 4
[08:53:17.995] <TB2> INFO: ctr: 4
[08:53:17.995] <TB2> INFO: sda: 19
[08:53:17.995] <TB2> INFO: tin: 9
[08:53:17.995] <TB2> INFO: level: 15
[08:53:17.995] <TB2> INFO: triggerdelay: 0
[08:53:17.995] <TB2> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[08:53:17.995] <TB2> INFO: Log level: INFO
[08:53:18.003] <TB2> INFO: Found DTB DTB_WXC55Z
[08:53:18.015] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[08:53:18.018] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[08:53:18.021] <TB2> INFO: RPC call hashes of host and DTB match: 397073690
[08:53:19.545] <TB2> INFO: DUT info:
[08:53:19.545] <TB2> INFO: The DUT currently contains the following objects:
[08:53:19.545] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:53:19.545] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:53:19.545] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:53:19.545] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:53:19.545] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.545] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.546] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:53:19.947] <TB2> INFO: enter 'restricted' command line mode
[08:53:19.947] <TB2> INFO: enter test to run
[08:53:19.947] <TB2> INFO: test: pretest no parameter change
[08:53:19.947] <TB2> INFO: running: pretest
[08:53:19.954] <TB2> INFO: ######################################################################
[08:53:19.954] <TB2> INFO: PixTestPretest::doTest()
[08:53:19.954] <TB2> INFO: ######################################################################
[08:53:19.956] <TB2> INFO: ----------------------------------------------------------------------
[08:53:19.956] <TB2> INFO: PixTestPretest::programROC()
[08:53:19.956] <TB2> INFO: ----------------------------------------------------------------------
[08:53:37.973] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:53:37.973] <TB2> INFO: IA differences per ROC: 20.1 19.3 21.7 16.9 18.5 16.9 18.5 19.3 20.1 19.3 19.3 19.3 20.1 17.7 19.3 20.1
[08:53:38.048] <TB2> INFO: ----------------------------------------------------------------------
[08:53:38.048] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:53:38.048] <TB2> INFO: ----------------------------------------------------------------------
[08:53:44.326] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[08:53:44.328] <TB2> INFO: ----------------------------------------------------------------------
[08:53:44.328] <TB2> INFO: PixTestPretest::findTiming()
[08:53:44.328] <TB2> INFO: ----------------------------------------------------------------------
[08:53:44.328] <TB2> INFO: PixTestCmd::init()

[08:55:34.662] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[08:55:34.662] <TB2> INFO: (success/tries = 100/100), width = 4
[08:55:34.664] <TB2> INFO: ----------------------------------------------------------------------
[08:55:34.664] <TB2> INFO: PixTestPretest::findWorkingPixel()
[08:55:34.664] <TB2> INFO: ----------------------------------------------------------------------
[08:55:34.799] <TB2> INFO: Expecting 231680 events.
[08:55:43.906] <TB2> INFO: 231680 events read in total (8390ms).
[08:55:43.910] <TB2> INFO: Test took 9244ms.
[08:55:44.226] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:55:44.266] <TB2> INFO: ----------------------------------------------------------------------
[08:55:44.267] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[08:55:44.267] <TB2> INFO: ----------------------------------------------------------------------
[08:55:44.403] <TB2> INFO: Expecting 231680 events.
[08:55:54.121] <TB2> INFO: 231680 events read in total (9001ms).
[08:55:54.125] <TB2> INFO: Test took 9854ms.
[08:55:54.457] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[08:55:54.457] <TB2> INFO: CalDel: 130 134 133 138 133 156 143 149 154 176 158 168 135 145 168 146
[08:55:54.457] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:55:54.460] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C0.dat
[08:55:54.460] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C1.dat
[08:55:54.460] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C2.dat
[08:55:54.461] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C3.dat
[08:55:54.461] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C4.dat
[08:55:54.461] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C5.dat
[08:55:54.461] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C6.dat
[08:55:54.461] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C7.dat
[08:55:54.461] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C8.dat
[08:55:54.462] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C9.dat
[08:55:54.462] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C10.dat
[08:55:54.462] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C11.dat
[08:55:54.462] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C12.dat
[08:55:54.463] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C13.dat
[08:55:54.463] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C14.dat
[08:55:54.463] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters_C15.dat
[08:55:54.463] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//tbmParameters_C0a.dat
[08:55:54.463] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:55:54.464] <TB2> INFO: PixTestPretest::doTest() done, duration: 154 seconds
[08:55:54.530] <TB2> INFO: enter test to run
[08:55:54.530] <TB2> INFO: test: fulltest no parameter change
[08:55:54.530] <TB2> INFO: running: fulltest
[08:55:54.530] <TB2> INFO: ######################################################################
[08:55:54.530] <TB2> INFO: PixTestFullTest::doTest()
[08:55:54.530] <TB2> INFO: ######################################################################
[08:55:54.532] <TB2> INFO: ######################################################################
[08:55:54.532] <TB2> INFO: PixTestAlive::doTest()
[08:55:54.532] <TB2> INFO: ######################################################################
[08:55:54.533] <TB2> INFO: ----------------------------------------------------------------------
[08:55:54.534] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:55:54.534] <TB2> INFO: ----------------------------------------------------------------------
[08:55:54.842] <TB2> INFO: Expecting 41600 events.
[08:55:59.287] <TB2> INFO: 41600 events read in total (3729ms).
[08:55:59.287] <TB2> INFO: Test took 4752ms.
[08:55:59.293] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:59.588] <TB2> INFO: PixTestAlive::aliveTest() done
[08:55:59.588] <TB2> INFO: number of dead pixels (per ROC): 1 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0
[08:55:59.590] <TB2> INFO: ----------------------------------------------------------------------
[08:55:59.590] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:55:59.590] <TB2> INFO: ----------------------------------------------------------------------
[08:55:59.900] <TB2> INFO: Expecting 41600 events.
[08:56:03.215] <TB2> INFO: 41600 events read in total (2599ms).
[08:56:03.215] <TB2> INFO: Test took 3623ms.
[08:56:03.215] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:03.216] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:56:03.531] <TB2> INFO: PixTestAlive::maskTest() done
[08:56:03.531] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:03.533] <TB2> INFO: ----------------------------------------------------------------------
[08:56:03.533] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:03.533] <TB2> INFO: ----------------------------------------------------------------------
[08:56:03.846] <TB2> INFO: Expecting 41600 events.
[08:56:08.295] <TB2> INFO: 41600 events read in total (3733ms).
[08:56:08.295] <TB2> INFO: Test took 4760ms.
[08:56:08.302] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:08.594] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[08:56:08.594] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:08.594] <TB2> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[08:56:08.607] <TB2> INFO: ######################################################################
[08:56:08.607] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:56:08.607] <TB2> INFO: ######################################################################
[08:56:08.609] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[08:56:08.621] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[08:56:08.621] <TB2> INFO: run 1 of 1
[08:56:08.929] <TB2> INFO: Expecting 3120000 events.
[08:56:44.647] <TB2> INFO: 835750 events read in total (35002ms).
[08:57:19.965] <TB2> INFO: 1662410 events read in total (70320ms).
[08:57:55.891] <TB2> INFO: 2506150 events read in total (106247ms).
[08:58:21.647] <TB2> INFO: 3120000 events read in total (132002ms).
[08:58:21.699] <TB2> INFO: Test took 133078ms.
[08:58:21.810] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:45.383] <TB2> INFO: PixTestBBMap::doTest() done, duration: 156 seconds
[08:58:45.383] <TB2> INFO: number of dead bumps (per ROC): 2 0 0 0 1 0 0 0 0 0 0 0 4 0 0 0
[08:58:45.383] <TB2> INFO: separation cut (per ROC): 85 83 85 73 78 86 88 89 86 67 82 68 71 81 67 75
[08:58:45.456] <TB2> INFO: ######################################################################
[08:58:45.456] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:58:45.456] <TB2> INFO: ######################################################################
[08:58:45.456] <TB2> INFO: ----------------------------------------------------------------------
[08:58:45.456] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:58:45.456] <TB2> INFO: ----------------------------------------------------------------------
[08:58:45.456] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[08:58:45.464] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[08:58:45.464] <TB2> INFO: run 1 of 1
[08:58:45.775] <TB2> INFO: Expecting 31200000 events.
[08:59:09.269] <TB2> INFO: 941400 events read in total (22777ms).
[08:59:36.402] <TB2> INFO: 1866550 events read in total (49910ms).
[09:00:03.476] <TB2> INFO: 2787700 events read in total (76984ms).
[09:00:30.365] <TB2> INFO: 3711700 events read in total (103873ms).
[09:00:56.978] <TB2> INFO: 4628950 events read in total (130486ms).
[09:01:23.949] <TB2> INFO: 5548700 events read in total (157457ms).
[09:01:50.784] <TB2> INFO: 6465500 events read in total (184293ms).
[09:02:17.527] <TB2> INFO: 7387450 events read in total (211035ms).
[09:02:44.474] <TB2> INFO: 8304600 events read in total (237982ms).
[09:03:10.561] <TB2> INFO: 9223800 events read in total (264069ms).
[09:03:37.401] <TB2> INFO: 10138550 events read in total (290909ms).
[09:04:03.865] <TB2> INFO: 11058150 events read in total (317373ms).
[09:04:30.344] <TB2> INFO: 11972350 events read in total (343852ms).
[09:04:57.152] <TB2> INFO: 12889500 events read in total (370660ms).
[09:05:23.788] <TB2> INFO: 13803150 events read in total (397296ms).
[09:05:50.388] <TB2> INFO: 14718850 events read in total (423896ms).
[09:06:16.777] <TB2> INFO: 15634100 events read in total (450285ms).
[09:06:43.455] <TB2> INFO: 16540600 events read in total (476963ms).
[09:07:10.962] <TB2> INFO: 17447350 events read in total (504470ms).
[09:07:38.043] <TB2> INFO: 18352000 events read in total (531551ms).
[09:08:04.902] <TB2> INFO: 19259200 events read in total (558410ms).
[09:08:32.004] <TB2> INFO: 20164350 events read in total (585512ms).
[09:08:58.007] <TB2> INFO: 21070250 events read in total (611515ms).
[09:09:24.415] <TB2> INFO: 21973500 events read in total (637923ms).
[09:09:51.483] <TB2> INFO: 22880200 events read in total (664991ms).
[09:10:18.096] <TB2> INFO: 23782350 events read in total (691604ms).
[09:10:45.004] <TB2> INFO: 24688200 events read in total (718512ms).
[09:11:11.416] <TB2> INFO: 25590500 events read in total (744924ms).
[09:11:38.677] <TB2> INFO: 26495200 events read in total (772185ms).
[09:12:05.557] <TB2> INFO: 27397800 events read in total (799065ms).
[09:12:30.100] <TB2> INFO: 28303900 events read in total (823608ms).
[09:12:53.844] <TB2> INFO: 29210300 events read in total (847352ms).
[09:13:19.976] <TB2> INFO: 30118500 events read in total (873484ms).
[09:13:46.199] <TB2> INFO: 31036800 events read in total (899707ms).
[09:13:51.564] <TB2> INFO: 31200000 events read in total (905072ms).
[09:13:51.599] <TB2> INFO: Test took 906135ms.
[09:13:51.688] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:51.795] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:13:53.280] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:13:54.720] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:13:56.187] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:13:57.755] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:13:59.189] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:00.617] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:02.058] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:03.491] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:04.914] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:06.374] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:07.791] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:09.297] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:10.700] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:12.132] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:13.537] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:14:14.995] <TB2> INFO: PixTestScurves::scurves() done
[09:14:14.995] <TB2> INFO: Vcal mean: 87.87 91.15 86.47 82.40 79.57 91.77 83.04 92.94 91.93 82.21 95.70 77.73 85.98 80.49 81.40 78.09
[09:14:14.995] <TB2> INFO: Vcal RMS: 6.05 6.00 5.09 5.24 5.08 5.63 4.83 5.90 5.45 5.36 5.57 4.66 5.59 4.72 4.93 4.51
[09:14:14.995] <TB2> INFO: PixTestScurves::fullTest() done, duration: 929 seconds
[09:14:15.069] <TB2> INFO: ######################################################################
[09:14:15.069] <TB2> INFO: PixTestTrim::doTest()
[09:14:15.069] <TB2> INFO: ######################################################################
[09:14:15.071] <TB2> INFO: ----------------------------------------------------------------------
[09:14:15.071] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:14:15.071] <TB2> INFO: ----------------------------------------------------------------------
[09:14:15.153] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:14:15.153] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:14:15.161] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[09:14:15.161] <TB2> INFO: run 1 of 1
[09:14:15.468] <TB2> INFO: Expecting 13312000 events.
[09:14:46.313] <TB2> INFO: 1090700 events read in total (30128ms).
[09:15:16.935] <TB2> INFO: 2178220 events read in total (60750ms).
[09:15:48.463] <TB2> INFO: 3261080 events read in total (92278ms).
[09:16:20.016] <TB2> INFO: 4342060 events read in total (123831ms).
[09:16:51.157] <TB2> INFO: 5419000 events read in total (154973ms).
[09:17:21.278] <TB2> INFO: 6494620 events read in total (185093ms).
[09:17:51.698] <TB2> INFO: 7576140 events read in total (215513ms).
[09:18:21.928] <TB2> INFO: 8660260 events read in total (245743ms).
[09:18:50.055] <TB2> INFO: 9746560 events read in total (273870ms).
[09:19:21.232] <TB2> INFO: 10834500 events read in total (305047ms).
[09:19:51.745] <TB2> INFO: 11925400 events read in total (335560ms).
[09:20:22.027] <TB2> INFO: 13017220 events read in total (365842ms).
[09:20:31.025] <TB2> INFO: 13312000 events read in total (374840ms).
[09:20:31.058] <TB2> INFO: Test took 375897ms.
[09:20:31.108] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:49.601] <TB2> INFO: ROC 0 VthrComp = 92
[09:20:49.601] <TB2> INFO: ROC 1 VthrComp = 95
[09:20:49.601] <TB2> INFO: ROC 2 VthrComp = 94
[09:20:49.601] <TB2> INFO: ROC 3 VthrComp = 84
[09:20:49.602] <TB2> INFO: ROC 4 VthrComp = 86
[09:20:49.602] <TB2> INFO: ROC 5 VthrComp = 94
[09:20:49.602] <TB2> INFO: ROC 6 VthrComp = 91
[09:20:49.602] <TB2> INFO: ROC 7 VthrComp = 96
[09:20:49.602] <TB2> INFO: ROC 8 VthrComp = 96
[09:20:49.602] <TB2> INFO: ROC 9 VthrComp = 82
[09:20:49.602] <TB2> INFO: ROC 10 VthrComp = 97
[09:20:49.602] <TB2> INFO: ROC 11 VthrComp = 81
[09:20:49.602] <TB2> INFO: ROC 12 VthrComp = 92
[09:20:49.602] <TB2> INFO: ROC 13 VthrComp = 83
[09:20:49.602] <TB2> INFO: ROC 14 VthrComp = 84
[09:20:49.603] <TB2> INFO: ROC 15 VthrComp = 84
[09:20:49.603] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:20:49.603] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:20:49.611] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[09:20:49.611] <TB2> INFO: run 1 of 1
[09:20:49.915] <TB2> INFO: Expecting 13312000 events.
[09:21:17.633] <TB2> INFO: 782020 events read in total (27002ms).
[09:21:45.155] <TB2> INFO: 1559940 events read in total (54524ms).
[09:22:12.762] <TB2> INFO: 2336880 events read in total (82131ms).
[09:22:40.912] <TB2> INFO: 3114200 events read in total (110281ms).
[09:23:09.535] <TB2> INFO: 3890880 events read in total (138904ms).
[09:23:38.069] <TB2> INFO: 4668160 events read in total (167438ms).
[09:24:06.727] <TB2> INFO: 5445000 events read in total (196096ms).
[09:24:32.745] <TB2> INFO: 6221780 events read in total (222114ms).
[09:24:58.675] <TB2> INFO: 6995080 events read in total (248044ms).
[09:25:24.224] <TB2> INFO: 7765320 events read in total (273593ms).
[09:25:50.085] <TB2> INFO: 8533600 events read in total (299454ms).
[09:26:15.757] <TB2> INFO: 9301460 events read in total (325126ms).
[09:26:43.262] <TB2> INFO: 10067120 events read in total (352631ms).
[09:27:10.641] <TB2> INFO: 10833000 events read in total (380010ms).
[09:27:37.666] <TB2> INFO: 11597860 events read in total (407035ms).
[09:28:04.327] <TB2> INFO: 12363000 events read in total (433696ms).
[09:28:31.670] <TB2> INFO: 13128800 events read in total (461039ms).
[09:28:38.995] <TB2> INFO: 13312000 events read in total (468364ms).
[09:28:39.036] <TB2> INFO: Test took 469425ms.
[09:28:39.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:03.023] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 60.6445 for pixel 0/8 mean/min/max = 46.1626/31.6555/60.6697
[09:29:03.023] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 61.1248 for pixel 15/2 mean/min/max = 45.866/30.5889/61.143
[09:29:03.023] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.1181 for pixel 51/76 mean/min/max = 44.7628/32.3107/57.2149
[09:29:03.023] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.5525 for pixel 19/78 mean/min/max = 46.0268/32.3745/59.6792
[09:29:03.024] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 58.2995 for pixel 31/79 mean/min/max = 45.2032/32.0937/58.3127
[09:29:03.024] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.2126 for pixel 11/1 mean/min/max = 45.5328/31.8292/59.2363
[09:29:03.024] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.1974 for pixel 0/44 mean/min/max = 45.172/33.0866/57.2573
[09:29:03.024] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 60.2677 for pixel 0/78 mean/min/max = 45.8734/31.3595/60.3873
[09:29:03.025] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.3228 for pixel 0/75 mean/min/max = 45.5655/31.7595/59.3715
[09:29:03.025] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 62.4906 for pixel 0/50 mean/min/max = 47.1472/31.6894/62.6051
[09:29:03.025] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.2206 for pixel 7/2 mean/min/max = 46.236/32.119/60.3531
[09:29:03.026] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 59.0353 for pixel 10/5 mean/min/max = 45.3724/31.7071/59.0377
[09:29:03.026] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.6514 for pixel 0/9 mean/min/max = 45.6734/31.6738/59.6729
[09:29:03.026] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.1934 for pixel 49/79 mean/min/max = 45.4467/32.6744/58.2189
[09:29:03.027] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 60.2339 for pixel 20/2 mean/min/max = 45.9703/31.6911/60.2495
[09:29:03.027] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.9513 for pixel 16/72 mean/min/max = 45.064/32.1754/57.9526
[09:29:03.027] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:29:03.160] <TB2> INFO: Expecting 1029120 events.
[09:29:30.369] <TB2> INFO: 1029120 events read in total (26493ms).
[09:29:30.374] <TB2> INFO: Expecting 1029120 events.
[09:29:56.199] <TB2> INFO: 1029120 events read in total (25296ms).
[09:29:56.207] <TB2> INFO: Expecting 1029120 events.
[09:30:21.672] <TB2> INFO: 1029120 events read in total (24938ms).
[09:30:21.682] <TB2> INFO: Expecting 1029120 events.
[09:30:47.776] <TB2> INFO: 1029120 events read in total (25566ms).
[09:30:47.788] <TB2> INFO: Expecting 1029120 events.
[09:31:13.758] <TB2> INFO: 1029120 events read in total (25442ms).
[09:31:13.772] <TB2> INFO: Expecting 1029120 events.
[09:31:39.528] <TB2> INFO: 1029120 events read in total (25229ms).
[09:31:39.543] <TB2> INFO: Expecting 1029120 events.
[09:32:04.997] <TB2> INFO: 1029120 events read in total (24926ms).
[09:32:05.014] <TB2> INFO: Expecting 1029120 events.
[09:32:30.573] <TB2> INFO: 1029120 events read in total (25024ms).
[09:32:30.593] <TB2> INFO: Expecting 1029120 events.
[09:32:56.205] <TB2> INFO: 1029120 events read in total (25084ms).
[09:32:56.226] <TB2> INFO: Expecting 1029120 events.
[09:33:21.946] <TB2> INFO: 1029120 events read in total (25192ms).
[09:33:21.971] <TB2> INFO: Expecting 1029120 events.
[09:33:47.720] <TB2> INFO: 1029120 events read in total (25222ms).
[09:33:47.749] <TB2> INFO: Expecting 1029120 events.
[09:34:13.106] <TB2> INFO: 1029120 events read in total (24830ms).
[09:34:13.133] <TB2> INFO: Expecting 1029120 events.
[09:34:38.709] <TB2> INFO: 1029120 events read in total (25049ms).
[09:34:38.738] <TB2> INFO: Expecting 1029120 events.
[09:35:04.242] <TB2> INFO: 1029120 events read in total (24976ms).
[09:35:04.274] <TB2> INFO: Expecting 1029120 events.
[09:35:29.972] <TB2> INFO: 1029120 events read in total (25171ms).
[09:35:30.004] <TB2> INFO: Expecting 1029120 events.
[09:35:55.953] <TB2> INFO: 1029120 events read in total (25421ms).
[09:35:55.988] <TB2> INFO: Test took 412961ms.
[09:35:57.083] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:35:57.092] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[09:35:57.092] <TB2> INFO: run 1 of 1
[09:35:57.412] <TB2> INFO: Expecting 8320000 events.
[09:36:27.862] <TB2> INFO: 723180 events read in total (29734ms).
[09:36:58.969] <TB2> INFO: 1444750 events read in total (60841ms).
[09:37:29.733] <TB2> INFO: 2166160 events read in total (91605ms).
[09:37:58.706] <TB2> INFO: 2887690 events read in total (120578ms).
[09:38:26.706] <TB2> INFO: 3608790 events read in total (148578ms).
[09:38:56.101] <TB2> INFO: 4328970 events read in total (177973ms).
[09:39:25.639] <TB2> INFO: 5045120 events read in total (207511ms).
[09:39:54.810] <TB2> INFO: 5759510 events read in total (236682ms).
[09:40:25.241] <TB2> INFO: 6473080 events read in total (267113ms).
[09:40:56.005] <TB2> INFO: 7185470 events read in total (297877ms).
[09:41:26.096] <TB2> INFO: 7898330 events read in total (327968ms).
[09:41:44.661] <TB2> INFO: 8320000 events read in total (346533ms).
[09:41:44.729] <TB2> INFO: Test took 347637ms.
[09:41:44.949] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:14.491] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.129523 .. 52.474229
[09:42:14.568] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 62 (-1/-1) hits flags = 16 (plus default)
[09:42:14.576] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[09:42:14.576] <TB2> INFO: run 1 of 1
[09:42:14.884] <TB2> INFO: Expecting 5241600 events.
[09:42:43.832] <TB2> INFO: 917720 events read in total (28232ms).
[09:43:12.914] <TB2> INFO: 1835740 events read in total (57314ms).
[09:43:42.204] <TB2> INFO: 2754940 events read in total (86604ms).
[09:44:11.286] <TB2> INFO: 3668600 events read in total (115686ms).
[09:44:40.124] <TB2> INFO: 4575480 events read in total (144524ms).
[09:45:00.652] <TB2> INFO: 5241600 events read in total (165052ms).
[09:45:00.668] <TB2> INFO: Test took 166093ms.
[09:45:00.710] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:15.887] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 14.340224 .. 46.835858
[09:45:15.978] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 4 .. 56 (-1/-1) hits flags = 16 (plus default)
[09:45:15.986] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[09:45:15.986] <TB2> INFO: run 1 of 1
[09:45:16.319] <TB2> INFO: Expecting 4409600 events.
[09:45:46.391] <TB2> INFO: 936660 events read in total (29356ms).
[09:46:15.589] <TB2> INFO: 1871960 events read in total (58554ms).
[09:46:44.504] <TB2> INFO: 2806800 events read in total (87470ms).
[09:47:13.513] <TB2> INFO: 3739740 events read in total (116478ms).
[09:47:34.056] <TB2> INFO: 4409600 events read in total (137021ms).
[09:47:34.075] <TB2> INFO: Test took 138089ms.
[09:47:34.112] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:48.764] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 19.615345 .. 44.694747
[09:47:48.862] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 9 .. 54 (-1/-1) hits flags = 16 (plus default)
[09:47:48.871] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[09:47:48.872] <TB2> INFO: run 1 of 1
[09:47:49.211] <TB2> INFO: Expecting 3827200 events.
[09:48:18.998] <TB2> INFO: 925280 events read in total (29071ms).
[09:48:47.344] <TB2> INFO: 1850140 events read in total (57417ms).
[09:49:16.122] <TB2> INFO: 2774260 events read in total (86196ms).
[09:49:45.507] <TB2> INFO: 3696700 events read in total (115580ms).
[09:49:50.231] <TB2> INFO: 3827200 events read in total (120304ms).
[09:49:50.246] <TB2> INFO: Test took 121374ms.
[09:49:50.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:03.320] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 23.071801 .. 44.694747
[09:50:03.403] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 13 .. 54 (-1/-1) hits flags = 16 (plus default)
[09:50:03.412] <TB2> INFO: dacScan split into 1 runs with ntrig = 20
[09:50:03.412] <TB2> INFO: run 1 of 1
[09:50:03.729] <TB2> INFO: Expecting 3494400 events.
[09:50:31.473] <TB2> INFO: 899420 events read in total (27028ms).
[09:50:59.322] <TB2> INFO: 1798420 events read in total (54878ms).
[09:51:28.691] <TB2> INFO: 2697400 events read in total (84247ms).
[09:51:54.196] <TB2> INFO: 3494400 events read in total (109751ms).
[09:51:54.215] <TB2> INFO: Test took 110803ms.
[09:51:54.248] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:08.760] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:52:08.760] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[09:52:08.769] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[09:52:08.769] <TB2> INFO: run 1 of 1
[09:52:09.082] <TB2> INFO: Expecting 1705600 events.
[09:52:41.474] <TB2> INFO: 878800 events read in total (31676ms).
[09:53:11.177] <TB2> INFO: 1705600 events read in total (61380ms).
[09:53:11.200] <TB2> INFO: Test took 62431ms.
[09:53:11.234] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:25.451] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:53:25.452] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:53:25.452] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:53:25.452] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:53:25.452] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:53:25.453] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:53:25.453] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:53:25.453] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:53:25.453] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:53:25.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:53:25.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:53:25.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:53:25.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:53:25.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:53:25.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:53:25.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:53:25.455] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:53:25.462] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:53:25.468] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:53:25.474] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:53:25.481] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:53:25.487] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:53:25.493] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:53:25.500] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:53:25.506] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:53:25.512] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:53:25.519] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:53:25.525] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:53:25.532] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:53:25.538] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:53:25.544] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:53:25.551] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:53:25.557] <TB2> INFO: PixTestTrim::trimTest() done
[09:53:25.557] <TB2> INFO: vtrim: 105 102 89 109 103 98 82 96 102 109 99 88 102 85 115 102
[09:53:25.557] <TB2> INFO: vthrcomp: 92 95 94 84 86 94 91 96 96 82 97 81 92 83 84 84
[09:53:25.557] <TB2> INFO: vcal mean: 34.90 34.88 34.93 34.93 34.96 34.94 34.95 34.93 34.93 34.93 34.96 34.92 34.98 34.93 34.94 34.93
[09:53:25.557] <TB2> INFO: vcal RMS: 0.98 0.87 0.74 0.96 1.07 0.81 0.75 0.84 0.79 0.87 0.82 0.76 0.86 0.76 0.86 0.77
[09:53:25.557] <TB2> INFO: bits mean: 8.99 9.63 9.02 9.43 9.36 9.24 8.66 8.84 9.30 9.21 9.17 9.52 8.84 8.76 9.75 9.44
[09:53:25.557] <TB2> INFO: bits RMS: 2.99 2.77 2.92 2.66 2.83 2.83 2.97 3.08 2.79 2.75 2.76 2.68 3.01 2.95 2.59 2.74
[09:53:25.564] <TB2> INFO: ----------------------------------------------------------------------
[09:53:25.564] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:53:25.564] <TB2> INFO: ----------------------------------------------------------------------
[09:53:25.567] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:53:25.577] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[09:53:25.577] <TB2> INFO: run 1 of 1
[09:53:25.885] <TB2> INFO: Expecting 8320000 events.
[09:53:58.984] <TB2> INFO: 916600 events read in total (32383ms).
[09:54:28.895] <TB2> INFO: 1825530 events read in total (62295ms).
[09:54:58.631] <TB2> INFO: 2732630 events read in total (92030ms).
[09:55:28.334] <TB2> INFO: 3637210 events read in total (121733ms).
[09:56:00.290] <TB2> INFO: 4538620 events read in total (153689ms).
[09:56:33.285] <TB2> INFO: 5435770 events read in total (186684ms).
[09:57:04.524] <TB2> INFO: 6332990 events read in total (217923ms).
[09:57:33.923] <TB2> INFO: 7229780 events read in total (247322ms).
[09:58:05.640] <TB2> INFO: 8129710 events read in total (279039ms).
[09:58:12.815] <TB2> INFO: 8320000 events read in total (286214ms).
[09:58:12.856] <TB2> INFO: Test took 287279ms.
[09:58:12.969] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:41.014] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 162 (-1/-1) hits flags = 16 (plus default)
[09:58:41.022] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[09:58:41.022] <TB2> INFO: run 1 of 1
[09:58:41.326] <TB2> INFO: Expecting 6780800 events.
[09:59:14.182] <TB2> INFO: 961370 events read in total (32140ms).
[09:59:45.582] <TB2> INFO: 1913220 events read in total (63540ms).
[10:00:17.933] <TB2> INFO: 2861880 events read in total (95891ms).
[10:00:52.282] <TB2> INFO: 3804330 events read in total (130240ms).
[10:01:24.157] <TB2> INFO: 4741120 events read in total (162115ms).
[10:01:56.483] <TB2> INFO: 5677350 events read in total (194441ms).
[10:02:29.194] <TB2> INFO: 6616420 events read in total (227152ms).
[10:02:35.137] <TB2> INFO: 6780800 events read in total (233095ms).
[10:02:35.167] <TB2> INFO: Test took 234145ms.
[10:02:35.251] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:58.867] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 151 (-1/-1) hits flags = 16 (plus default)
[10:02:58.875] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[10:02:58.875] <TB2> INFO: run 1 of 1
[10:02:59.183] <TB2> INFO: Expecting 6323200 events.
[10:03:30.657] <TB2> INFO: 992510 events read in total (30758ms).
[10:04:02.502] <TB2> INFO: 1975390 events read in total (62604ms).
[10:04:35.975] <TB2> INFO: 2952850 events read in total (96077ms).
[10:05:08.494] <TB2> INFO: 3921120 events read in total (128595ms).
[10:05:40.940] <TB2> INFO: 4886650 events read in total (161041ms).
[10:06:13.925] <TB2> INFO: 5853050 events read in total (194026ms).
[10:06:29.287] <TB2> INFO: 6323200 events read in total (209388ms).
[10:06:29.315] <TB2> INFO: Test took 210440ms.
[10:06:29.383] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:51.442] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 16 (plus default)
[10:06:51.451] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[10:06:51.451] <TB2> INFO: run 1 of 1
[10:06:51.769] <TB2> INFO: Expecting 6281600 events.
[10:07:23.999] <TB2> INFO: 995370 events read in total (31514ms).
[10:07:55.659] <TB2> INFO: 1980460 events read in total (63174ms).
[10:08:28.489] <TB2> INFO: 2960250 events read in total (96004ms).
[10:09:01.244] <TB2> INFO: 3930680 events read in total (128759ms).
[10:09:33.854] <TB2> INFO: 4898570 events read in total (161369ms).
[10:10:07.380] <TB2> INFO: 5867650 events read in total (194895ms).
[10:10:22.169] <TB2> INFO: 6281600 events read in total (209684ms).
[10:10:22.194] <TB2> INFO: Test took 210743ms.
[10:10:22.260] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:44.282] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 16 (plus default)
[10:10:44.291] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[10:10:44.291] <TB2> INFO: run 1 of 1
[10:10:44.605] <TB2> INFO: Expecting 6281600 events.
[10:11:19.143] <TB2> INFO: 994780 events read in total (33822ms).
[10:11:49.639] <TB2> INFO: 1979090 events read in total (64318ms).
[10:12:22.118] <TB2> INFO: 2957990 events read in total (96798ms).
[10:12:55.167] <TB2> INFO: 3927720 events read in total (129846ms).
[10:13:28.879] <TB2> INFO: 4895050 events read in total (163558ms).
[10:14:00.982] <TB2> INFO: 5863210 events read in total (195661ms).
[10:14:14.553] <TB2> INFO: 6281600 events read in total (209232ms).
[10:14:14.582] <TB2> INFO: Test took 210291ms.
[10:14:14.651] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:37.044] <TB2> INFO: PixTestTrim::trimBitTest() done
[10:14:37.045] <TB2> INFO: PixTestTrim::doTest() done, duration: 3621 seconds
[10:14:37.732] <TB2> INFO: ######################################################################
[10:14:37.732] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:14:37.732] <TB2> INFO: ######################################################################
[10:14:38.040] <TB2> INFO: Expecting 41600 events.
[10:14:42.794] <TB2> INFO: 41600 events read in total (4038ms).
[10:14:42.795] <TB2> INFO: Test took 5062ms.
[10:14:42.801] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:43.364] <TB2> INFO: Expecting 41600 events.
[10:14:47.833] <TB2> INFO: 41600 events read in total (3753ms).
[10:14:47.833] <TB2> INFO: Test took 4777ms.
[10:14:47.839] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:48.181] <TB2> INFO: Expecting 41600 events.
[10:14:52.754] <TB2> INFO: 41600 events read in total (3857ms).
[10:14:52.755] <TB2> INFO: Test took 4899ms.
[10:14:52.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:52.768] <TB2> INFO: The DUT currently contains the following objects:
[10:14:52.768] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:14:52.768] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:14:52.768] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:14:52.768] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:14:52.768] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.768] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.768] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.768] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:52.769] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:53.101] <TB2> INFO: Expecting 2560 events.
[10:14:54.171] <TB2> INFO: 2560 events read in total (354ms).
[10:14:54.172] <TB2> INFO: Test took 1403ms.
[10:14:54.172] <TB2> INFO: The DUT currently contains the following objects:
[10:14:54.172] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:14:54.172] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:14:54.172] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:14:54.172] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:14:54.172] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.173] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:54.587] <TB2> INFO: Expecting 2560 events.
[10:14:55.656] <TB2> INFO: 2560 events read in total (353ms).
[10:14:55.656] <TB2> INFO: Test took 1483ms.
[10:14:55.657] <TB2> INFO: The DUT currently contains the following objects:
[10:14:55.657] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:14:55.657] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:14:55.657] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:14:55.657] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:14:55.657] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:55.657] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:56.070] <TB2> INFO: Expecting 2560 events.
[10:14:57.140] <TB2> INFO: 2560 events read in total (354ms).
[10:14:57.140] <TB2> INFO: Test took 1482ms.
[10:14:57.141] <TB2> INFO: The DUT currently contains the following objects:
[10:14:57.141] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:14:57.141] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:14:57.141] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:14:57.141] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:14:57.141] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.141] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.142] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:57.554] <TB2> INFO: Expecting 2560 events.
[10:14:58.623] <TB2> INFO: 2560 events read in total (353ms).
[10:14:58.623] <TB2> INFO: Test took 1481ms.
[10:14:58.624] <TB2> INFO: The DUT currently contains the following objects:
[10:14:58.624] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:14:58.624] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:14:58.624] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:14:58.624] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:14:58.624] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:58.624] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:14:59.038] <TB2> INFO: Expecting 2560 events.
[10:15:00.120] <TB2> INFO: 2560 events read in total (366ms).
[10:15:00.120] <TB2> INFO: Test took 1496ms.
[10:15:00.121] <TB2> INFO: The DUT currently contains the following objects:
[10:15:00.121] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:00.121] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:00.121] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:00.121] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:00.121] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.121] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.122] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.122] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.122] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.122] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.122] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:00.535] <TB2> INFO: Expecting 2560 events.
[10:15:01.630] <TB2> INFO: 2560 events read in total (379ms).
[10:15:01.631] <TB2> INFO: Test took 1509ms.
[10:15:01.631] <TB2> INFO: The DUT currently contains the following objects:
[10:15:01.631] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:01.631] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:01.631] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:01.631] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:01.631] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:01.632] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:02.045] <TB2> INFO: Expecting 2560 events.
[10:15:03.155] <TB2> INFO: 2560 events read in total (394ms).
[10:15:03.155] <TB2> INFO: Test took 1523ms.
[10:15:03.156] <TB2> INFO: The DUT currently contains the following objects:
[10:15:03.156] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:03.156] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:03.156] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:03.156] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:03.156] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.156] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.156] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.156] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.156] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.156] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.156] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.156] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.157] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.157] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.157] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.157] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.157] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.157] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.157] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.157] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:03.570] <TB2> INFO: Expecting 2560 events.
[10:15:04.666] <TB2> INFO: 2560 events read in total (380ms).
[10:15:04.666] <TB2> INFO: Test took 1509ms.
[10:15:04.667] <TB2> INFO: The DUT currently contains the following objects:
[10:15:04.667] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:04.667] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:04.667] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:04.667] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:04.667] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.667] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.667] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.667] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.667] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.667] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.667] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.667] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.668] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.668] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.668] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.668] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.668] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.668] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.668] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:04.668] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:05.081] <TB2> INFO: Expecting 2560 events.
[10:15:06.150] <TB2> INFO: 2560 events read in total (353ms).
[10:15:06.150] <TB2> INFO: Test took 1482ms.
[10:15:06.150] <TB2> INFO: The DUT currently contains the following objects:
[10:15:06.150] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:06.150] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:06.150] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:06.150] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:06.150] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.150] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.150] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.150] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.150] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.150] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.151] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:06.564] <TB2> INFO: Expecting 2560 events.
[10:15:07.646] <TB2> INFO: 2560 events read in total (365ms).
[10:15:07.646] <TB2> INFO: Test took 1495ms.
[10:15:07.647] <TB2> INFO: The DUT currently contains the following objects:
[10:15:07.647] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:07.647] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:07.647] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:07.647] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:07.647] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.647] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.648] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:07.648] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:08.061] <TB2> INFO: Expecting 2560 events.
[10:15:09.171] <TB2> INFO: 2560 events read in total (394ms).
[10:15:09.171] <TB2> INFO: Test took 1523ms.
[10:15:09.171] <TB2> INFO: The DUT currently contains the following objects:
[10:15:09.171] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:09.171] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:09.172] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:09.172] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:09.172] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.172] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:09.585] <TB2> INFO: Expecting 2560 events.
[10:15:10.654] <TB2> INFO: 2560 events read in total (352ms).
[10:15:10.655] <TB2> INFO: Test took 1483ms.
[10:15:10.655] <TB2> INFO: The DUT currently contains the following objects:
[10:15:10.655] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:10.655] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:10.655] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:10.655] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:10.655] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.655] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.655] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.655] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.655] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.655] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:10.656] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:11.069] <TB2> INFO: Expecting 2560 events.
[10:15:12.137] <TB2> INFO: 2560 events read in total (352ms).
[10:15:12.137] <TB2> INFO: Test took 1481ms.
[10:15:12.138] <TB2> INFO: The DUT currently contains the following objects:
[10:15:12.138] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:12.138] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:12.138] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:12.138] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:12.138] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.138] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:12.552] <TB2> INFO: Expecting 2560 events.
[10:15:13.619] <TB2> INFO: 2560 events read in total (351ms).
[10:15:13.619] <TB2> INFO: Test took 1481ms.
[10:15:13.620] <TB2> INFO: The DUT currently contains the following objects:
[10:15:13.620] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:13.620] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:13.620] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:13.620] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:13.620] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.620] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.621] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:13.621] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:14.034] <TB2> INFO: Expecting 2560 events.
[10:15:15.103] <TB2> INFO: 2560 events read in total (353ms).
[10:15:15.103] <TB2> INFO: Test took 1482ms.
[10:15:15.103] <TB2> INFO: The DUT currently contains the following objects:
[10:15:15.103] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:15:15.103] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:15:15.103] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:15:15.103] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:15:15.103] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.104] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:15:15.517] <TB2> INFO: Expecting 2560 events.
[10:15:16.586] <TB2> INFO: 2560 events read in total (352ms).
[10:15:16.587] <TB2> INFO: Test took 1483ms.
[10:15:16.590] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:15:17.003] <TB2> INFO: Expecting 655360 events.
[10:15:35.640] <TB2> INFO: 655360 events read in total (17921ms).
[10:15:35.649] <TB2> INFO: Expecting 655360 events.
[10:15:53.907] <TB2> INFO: 655360 events read in total (17730ms).
[10:15:53.924] <TB2> INFO: Expecting 655360 events.
[10:16:10.150] <TB2> INFO: 655360 events read in total (15698ms).
[10:16:10.168] <TB2> INFO: Expecting 655360 events.
[10:16:28.531] <TB2> INFO: 655360 events read in total (17835ms).
[10:16:28.552] <TB2> INFO: Expecting 655360 events.
[10:16:47.268] <TB2> INFO: 655360 events read in total (18189ms).
[10:16:47.290] <TB2> INFO: Expecting 655360 events.
[10:17:04.712] <TB2> INFO: 655360 events read in total (16895ms).
[10:17:04.739] <TB2> INFO: Expecting 655360 events.
[10:17:22.833] <TB2> INFO: 655360 events read in total (17566ms).
[10:17:22.866] <TB2> INFO: Expecting 655360 events.
[10:17:41.472] <TB2> INFO: 655360 events read in total (18079ms).
[10:17:41.506] <TB2> INFO: Expecting 655360 events.
[10:17:57.452] <TB2> INFO: 655360 events read in total (15418ms).
[10:17:57.487] <TB2> INFO: Expecting 655360 events.
[10:18:14.375] <TB2> INFO: 655360 events read in total (16360ms).
[10:18:14.417] <TB2> INFO: Expecting 655360 events.
[10:18:33.075] <TB2> INFO: 655360 events read in total (18130ms).
[10:18:33.118] <TB2> INFO: Expecting 655360 events.
[10:18:50.969] <TB2> INFO: 655360 events read in total (17323ms).
[10:18:51.017] <TB2> INFO: Expecting 655360 events.
[10:19:08.104] <TB2> INFO: 655360 events read in total (16559ms).
[10:19:08.167] <TB2> INFO: Expecting 655360 events.
[10:19:27.267] <TB2> INFO: 655360 events read in total (18572ms).
[10:19:27.322] <TB2> INFO: Expecting 655360 events.
[10:19:46.318] <TB2> INFO: 655360 events read in total (18468ms).
[10:19:46.381] <TB2> INFO: Expecting 655360 events.
[10:20:02.459] <TB2> INFO: 655360 events read in total (15551ms).
[10:20:02.521] <TB2> INFO: Test took 285931ms.
[10:20:02.601] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:02.910] <TB2> INFO: Expecting 655360 events.
[10:20:20.652] <TB2> INFO: 655360 events read in total (17026ms).
[10:20:20.661] <TB2> INFO: Expecting 655360 events.
[10:20:39.639] <TB2> INFO: 655360 events read in total (18451ms).
[10:20:39.651] <TB2> INFO: Expecting 655360 events.
[10:20:57.860] <TB2> INFO: 655360 events read in total (17682ms).
[10:20:57.877] <TB2> INFO: Expecting 655360 events.
[10:21:15.081] <TB2> INFO: 655360 events read in total (16676ms).
[10:21:15.101] <TB2> INFO: Expecting 655360 events.
[10:21:34.634] <TB2> INFO: 655360 events read in total (19005ms).
[10:21:34.658] <TB2> INFO: Expecting 655360 events.
[10:21:53.093] <TB2> INFO: 655360 events read in total (17908ms).
[10:21:53.120] <TB2> INFO: Expecting 655360 events.
[10:22:10.021] <TB2> INFO: 655360 events read in total (16374ms).
[10:22:10.051] <TB2> INFO: Expecting 655360 events.
[10:22:28.264] <TB2> INFO: 655360 events read in total (17686ms).
[10:22:28.296] <TB2> INFO: Expecting 655360 events.
[10:22:47.494] <TB2> INFO: 655360 events read in total (18670ms).
[10:22:47.530] <TB2> INFO: Expecting 655360 events.
[10:23:04.738] <TB2> INFO: 655360 events read in total (16681ms).
[10:23:04.778] <TB2> INFO: Expecting 655360 events.
[10:23:22.564] <TB2> INFO: 655360 events read in total (17259ms).
[10:23:22.606] <TB2> INFO: Expecting 655360 events.
[10:23:41.367] <TB2> INFO: 655360 events read in total (18233ms).
[10:23:41.419] <TB2> INFO: Expecting 655360 events.
[10:23:59.166] <TB2> INFO: 655360 events read in total (17220ms).
[10:23:59.222] <TB2> INFO: Expecting 655360 events.
[10:24:15.348] <TB2> INFO: 655360 events read in total (15599ms).
[10:24:15.406] <TB2> INFO: Expecting 655360 events.
[10:24:33.501] <TB2> INFO: 655360 events read in total (17567ms).
[10:24:33.563] <TB2> INFO: Expecting 655360 events.
[10:24:51.346] <TB2> INFO: 655360 events read in total (17256ms).
[10:24:51.407] <TB2> INFO: Test took 288807ms.
[10:24:51.606] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.613] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.621] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.628] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[10:24:51.635] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[10:24:51.643] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[10:24:51.650] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[10:24:51.657] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.664] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[10:24:51.672] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[10:24:51.680] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[10:24:51.687] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[10:24:51.695] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.703] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.711] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.719] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.727] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.735] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.742] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.749] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.757] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.764] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.772] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.780] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:24:51.819] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:24:51.819] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:24:51.820] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:24:51.821] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:24:51.821] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:24:51.821] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:24:51.821] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:24:51.821] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:24:52.189] <TB2> INFO: Expecting 41600 events.
[10:24:56.743] <TB2> INFO: 41600 events read in total (3838ms).
[10:24:56.743] <TB2> INFO: Test took 4919ms.
[10:24:57.258] <TB2> INFO: Expecting 41600 events.
[10:25:01.712] <TB2> INFO: 41600 events read in total (3738ms).
[10:25:01.712] <TB2> INFO: Test took 4758ms.
[10:25:02.261] <TB2> INFO: Expecting 41600 events.
[10:25:06.942] <TB2> INFO: 41600 events read in total (3965ms).
[10:25:06.942] <TB2> INFO: Test took 4990ms.
[10:25:07.171] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:07.304] <TB2> INFO: Expecting 2560 events.
[10:25:08.382] <TB2> INFO: 2560 events read in total (362ms).
[10:25:08.382] <TB2> INFO: Test took 1211ms.
[10:25:08.384] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:08.798] <TB2> INFO: Expecting 2560 events.
[10:25:09.871] <TB2> INFO: 2560 events read in total (346ms).
[10:25:09.872] <TB2> INFO: Test took 1488ms.
[10:25:09.874] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:10.286] <TB2> INFO: Expecting 2560 events.
[10:25:11.363] <TB2> INFO: 2560 events read in total (361ms).
[10:25:11.364] <TB2> INFO: Test took 1490ms.
[10:25:11.366] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:11.778] <TB2> INFO: Expecting 2560 events.
[10:25:12.867] <TB2> INFO: 2560 events read in total (374ms).
[10:25:12.868] <TB2> INFO: Test took 1503ms.
[10:25:12.869] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:13.283] <TB2> INFO: Expecting 2560 events.
[10:25:14.344] <TB2> INFO: 2560 events read in total (345ms).
[10:25:14.344] <TB2> INFO: Test took 1475ms.
[10:25:14.346] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:14.759] <TB2> INFO: Expecting 2560 events.
[10:25:15.834] <TB2> INFO: 2560 events read in total (359ms).
[10:25:15.834] <TB2> INFO: Test took 1489ms.
[10:25:15.836] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:16.250] <TB2> INFO: Expecting 2560 events.
[10:25:17.326] <TB2> INFO: 2560 events read in total (360ms).
[10:25:17.326] <TB2> INFO: Test took 1490ms.
[10:25:17.327] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:17.741] <TB2> INFO: Expecting 2560 events.
[10:25:18.818] <TB2> INFO: 2560 events read in total (361ms).
[10:25:18.818] <TB2> INFO: Test took 1491ms.
[10:25:18.819] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:19.233] <TB2> INFO: Expecting 2560 events.
[10:25:20.295] <TB2> INFO: 2560 events read in total (346ms).
[10:25:20.295] <TB2> INFO: Test took 1476ms.
[10:25:20.297] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:20.710] <TB2> INFO: Expecting 2560 events.
[10:25:21.785] <TB2> INFO: 2560 events read in total (359ms).
[10:25:21.786] <TB2> INFO: Test took 1489ms.
[10:25:21.787] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:22.201] <TB2> INFO: Expecting 2560 events.
[10:25:23.263] <TB2> INFO: 2560 events read in total (346ms).
[10:25:23.263] <TB2> INFO: Test took 1476ms.
[10:25:23.264] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:23.678] <TB2> INFO: Expecting 2560 events.
[10:25:24.747] <TB2> INFO: 2560 events read in total (353ms).
[10:25:24.747] <TB2> INFO: Test took 1483ms.
[10:25:24.749] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:25.163] <TB2> INFO: Expecting 2560 events.
[10:25:26.239] <TB2> INFO: 2560 events read in total (360ms).
[10:25:26.239] <TB2> INFO: Test took 1490ms.
[10:25:26.240] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:26.654] <TB2> INFO: Expecting 2560 events.
[10:25:27.716] <TB2> INFO: 2560 events read in total (346ms).
[10:25:27.716] <TB2> INFO: Test took 1476ms.
[10:25:27.717] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:28.131] <TB2> INFO: Expecting 2560 events.
[10:25:29.192] <TB2> INFO: 2560 events read in total (345ms).
[10:25:29.193] <TB2> INFO: Test took 1476ms.
[10:25:29.194] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:29.608] <TB2> INFO: Expecting 2560 events.
[10:25:30.685] <TB2> INFO: 2560 events read in total (361ms).
[10:25:30.685] <TB2> INFO: Test took 1491ms.
[10:25:30.686] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:31.100] <TB2> INFO: Expecting 2560 events.
[10:25:32.192] <TB2> INFO: 2560 events read in total (376ms).
[10:25:32.192] <TB2> INFO: Test took 1506ms.
[10:25:32.195] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:32.607] <TB2> INFO: Expecting 2560 events.
[10:25:33.687] <TB2> INFO: 2560 events read in total (362ms).
[10:25:33.688] <TB2> INFO: Test took 1493ms.
[10:25:33.689] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:34.103] <TB2> INFO: Expecting 2560 events.
[10:25:35.172] <TB2> INFO: 2560 events read in total (353ms).
[10:25:35.173] <TB2> INFO: Test took 1484ms.
[10:25:35.175] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:35.589] <TB2> INFO: Expecting 2560 events.
[10:25:36.659] <TB2> INFO: 2560 events read in total (354ms).
[10:25:36.659] <TB2> INFO: Test took 1484ms.
[10:25:36.661] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:37.075] <TB2> INFO: Expecting 2560 events.
[10:25:38.172] <TB2> INFO: 2560 events read in total (381ms).
[10:25:38.172] <TB2> INFO: Test took 1511ms.
[10:25:38.175] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:38.588] <TB2> INFO: Expecting 2560 events.
[10:25:39.681] <TB2> INFO: 2560 events read in total (377ms).
[10:25:39.681] <TB2> INFO: Test took 1506ms.
[10:25:39.683] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:40.096] <TB2> INFO: Expecting 2560 events.
[10:25:41.173] <TB2> INFO: 2560 events read in total (360ms).
[10:25:41.173] <TB2> INFO: Test took 1490ms.
[10:25:41.175] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:41.589] <TB2> INFO: Expecting 2560 events.
[10:25:42.659] <TB2> INFO: 2560 events read in total (353ms).
[10:25:42.659] <TB2> INFO: Test took 1484ms.
[10:25:42.662] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:43.076] <TB2> INFO: Expecting 2560 events.
[10:25:44.145] <TB2> INFO: 2560 events read in total (353ms).
[10:25:44.145] <TB2> INFO: Test took 1483ms.
[10:25:44.148] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:44.561] <TB2> INFO: Expecting 2560 events.
[10:25:45.630] <TB2> INFO: 2560 events read in total (353ms).
[10:25:45.630] <TB2> INFO: Test took 1482ms.
[10:25:45.633] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:46.046] <TB2> INFO: Expecting 2560 events.
[10:25:47.113] <TB2> INFO: 2560 events read in total (351ms).
[10:25:47.114] <TB2> INFO: Test took 1481ms.
[10:25:47.116] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:47.529] <TB2> INFO: Expecting 2560 events.
[10:25:48.597] <TB2> INFO: 2560 events read in total (351ms).
[10:25:48.597] <TB2> INFO: Test took 1481ms.
[10:25:48.600] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:49.013] <TB2> INFO: Expecting 2560 events.
[10:25:50.081] <TB2> INFO: 2560 events read in total (352ms).
[10:25:50.082] <TB2> INFO: Test took 1482ms.
[10:25:50.085] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:50.498] <TB2> INFO: Expecting 2560 events.
[10:25:51.563] <TB2> INFO: 2560 events read in total (349ms).
[10:25:51.564] <TB2> INFO: Test took 1480ms.
[10:25:51.566] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:51.981] <TB2> INFO: Expecting 2560 events.
[10:25:53.064] <TB2> INFO: 2560 events read in total (367ms).
[10:25:53.065] <TB2> INFO: Test took 1499ms.
[10:25:53.067] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:53.480] <TB2> INFO: Expecting 2560 events.
[10:25:54.549] <TB2> INFO: 2560 events read in total (352ms).
[10:25:54.549] <TB2> INFO: Test took 1482ms.
[10:25:55.168] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 677 seconds
[10:25:55.168] <TB2> INFO: PH scale (per ROC): 75 71 91 89 86 86 90 83 80 81 77 79 87 86 79 84
[10:25:55.168] <TB2> INFO: PH offset (per ROC): 162 175 144 144 158 161 140 151 155 162 161 165 159 154 147 155
[10:25:55.362] <TB2> INFO: ######################################################################
[10:25:55.362] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:25:55.362] <TB2> INFO: ######################################################################
[10:25:55.372] <TB2> INFO: scanning low vcal = 10
[10:25:55.675] <TB2> INFO: Expecting 41600 events.
[10:25:59.448] <TB2> INFO: 41600 events read in total (3056ms).
[10:25:59.448] <TB2> INFO: Test took 4076ms.
[10:25:59.451] <TB2> INFO: scanning low vcal = 20
[10:25:59.863] <TB2> INFO: Expecting 41600 events.
[10:26:03.762] <TB2> INFO: 41600 events read in total (3183ms).
[10:26:03.763] <TB2> INFO: Test took 4312ms.
[10:26:03.765] <TB2> INFO: scanning low vcal = 30
[10:26:04.177] <TB2> INFO: Expecting 41600 events.
[10:26:07.836] <TB2> INFO: 41600 events read in total (2943ms).
[10:26:07.836] <TB2> INFO: Test took 4071ms.
[10:26:07.839] <TB2> INFO: scanning low vcal = 40
[10:26:08.241] <TB2> INFO: Expecting 41600 events.
[10:26:12.434] <TB2> INFO: 41600 events read in total (3477ms).
[10:26:12.435] <TB2> INFO: Test took 4596ms.
[10:26:12.438] <TB2> INFO: scanning low vcal = 50
[10:26:12.774] <TB2> INFO: Expecting 41600 events.
[10:26:17.271] <TB2> INFO: 41600 events read in total (3781ms).
[10:26:17.272] <TB2> INFO: Test took 4834ms.
[10:26:17.274] <TB2> INFO: scanning low vcal = 60
[10:26:17.625] <TB2> INFO: Expecting 41600 events.
[10:26:22.088] <TB2> INFO: 41600 events read in total (3747ms).
[10:26:22.089] <TB2> INFO: Test took 4815ms.
[10:26:22.091] <TB2> INFO: scanning low vcal = 70
[10:26:22.445] <TB2> INFO: Expecting 41600 events.
[10:26:27.076] <TB2> INFO: 41600 events read in total (3915ms).
[10:26:27.076] <TB2> INFO: Test took 4985ms.
[10:26:27.078] <TB2> INFO: scanning low vcal = 80
[10:26:27.424] <TB2> INFO: Expecting 41600 events.
[10:26:31.861] <TB2> INFO: 41600 events read in total (3721ms).
[10:26:31.861] <TB2> INFO: Test took 4783ms.
[10:26:31.864] <TB2> INFO: scanning low vcal = 90
[10:26:32.219] <TB2> INFO: Expecting 41600 events.
[10:26:36.560] <TB2> INFO: 41600 events read in total (3625ms).
[10:26:36.560] <TB2> INFO: Test took 4696ms.
[10:26:36.562] <TB2> INFO: scanning low vcal = 100
[10:26:36.914] <TB2> INFO: Expecting 41600 events.
[10:26:41.412] <TB2> INFO: 41600 events read in total (3782ms).
[10:26:41.412] <TB2> INFO: Test took 4850ms.
[10:26:41.415] <TB2> INFO: scanning low vcal = 110
[10:26:41.759] <TB2> INFO: Expecting 41600 events.
[10:26:46.232] <TB2> INFO: 41600 events read in total (3757ms).
[10:26:46.233] <TB2> INFO: Test took 4818ms.
[10:26:46.235] <TB2> INFO: scanning low vcal = 120
[10:26:46.578] <TB2> INFO: Expecting 41600 events.
[10:26:50.993] <TB2> INFO: 41600 events read in total (3699ms).
[10:26:50.993] <TB2> INFO: Test took 4757ms.
[10:26:50.996] <TB2> INFO: scanning low vcal = 130
[10:26:51.341] <TB2> INFO: Expecting 41600 events.
[10:26:55.833] <TB2> INFO: 41600 events read in total (3776ms).
[10:26:55.834] <TB2> INFO: Test took 4838ms.
[10:26:55.836] <TB2> INFO: scanning low vcal = 140
[10:26:56.182] <TB2> INFO: Expecting 41600 events.
[10:27:00.357] <TB2> INFO: 41600 events read in total (3459ms).
[10:27:00.358] <TB2> INFO: Test took 4522ms.
[10:27:00.360] <TB2> INFO: scanning low vcal = 150
[10:27:00.714] <TB2> INFO: Expecting 41600 events.
[10:27:05.072] <TB2> INFO: 41600 events read in total (3642ms).
[10:27:05.072] <TB2> INFO: Test took 4712ms.
[10:27:05.075] <TB2> INFO: scanning low vcal = 160
[10:27:05.422] <TB2> INFO: Expecting 41600 events.
[10:27:10.041] <TB2> INFO: 41600 events read in total (3903ms).
[10:27:10.041] <TB2> INFO: Test took 4966ms.
[10:27:10.044] <TB2> INFO: scanning low vcal = 170
[10:27:10.384] <TB2> INFO: Expecting 41600 events.
[10:27:14.829] <TB2> INFO: 41600 events read in total (3729ms).
[10:27:14.830] <TB2> INFO: Test took 4786ms.
[10:27:14.833] <TB2> INFO: scanning low vcal = 180
[10:27:15.182] <TB2> INFO: Expecting 41600 events.
[10:27:19.722] <TB2> INFO: 41600 events read in total (3823ms).
[10:27:19.723] <TB2> INFO: Test took 4890ms.
[10:27:19.725] <TB2> INFO: scanning low vcal = 190
[10:27:20.081] <TB2> INFO: Expecting 41600 events.
[10:27:24.316] <TB2> INFO: 41600 events read in total (3519ms).
[10:27:24.316] <TB2> INFO: Test took 4591ms.
[10:27:24.319] <TB2> INFO: scanning low vcal = 200
[10:27:24.671] <TB2> INFO: Expecting 41600 events.
[10:27:28.806] <TB2> INFO: 41600 events read in total (3419ms).
[10:27:28.807] <TB2> INFO: Test took 4488ms.
[10:27:28.809] <TB2> INFO: scanning low vcal = 210
[10:27:29.164] <TB2> INFO: Expecting 41600 events.
[10:27:33.544] <TB2> INFO: 41600 events read in total (3664ms).
[10:27:33.545] <TB2> INFO: Test took 4736ms.
[10:27:33.547] <TB2> INFO: scanning low vcal = 220
[10:27:33.896] <TB2> INFO: Expecting 41600 events.
[10:27:38.365] <TB2> INFO: 41600 events read in total (3752ms).
[10:27:38.366] <TB2> INFO: Test took 4819ms.
[10:27:38.368] <TB2> INFO: scanning low vcal = 230
[10:27:38.727] <TB2> INFO: Expecting 41600 events.
[10:27:43.159] <TB2> INFO: 41600 events read in total (3716ms).
[10:27:43.159] <TB2> INFO: Test took 4791ms.
[10:27:43.162] <TB2> INFO: scanning low vcal = 240
[10:27:43.511] <TB2> INFO: Expecting 41600 events.
[10:27:47.722] <TB2> INFO: 41600 events read in total (3494ms).
[10:27:47.723] <TB2> INFO: Test took 4561ms.
[10:27:47.725] <TB2> INFO: scanning low vcal = 250
[10:27:48.071] <TB2> INFO: Expecting 41600 events.
[10:27:52.297] <TB2> INFO: 41600 events read in total (3510ms).
[10:27:52.297] <TB2> INFO: Test took 4572ms.
[10:27:52.302] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[10:27:52.647] <TB2> INFO: Expecting 41600 events.
[10:27:57.110] <TB2> INFO: 41600 events read in total (3747ms).
[10:27:57.110] <TB2> INFO: Test took 4808ms.
[10:27:57.112] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[10:27:57.463] <TB2> INFO: Expecting 41600 events.
[10:28:02.121] <TB2> INFO: 41600 events read in total (3942ms).
[10:28:02.121] <TB2> INFO: Test took 5009ms.
[10:28:02.123] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[10:28:02.473] <TB2> INFO: Expecting 41600 events.
[10:28:06.944] <TB2> INFO: 41600 events read in total (3755ms).
[10:28:06.944] <TB2> INFO: Test took 4821ms.
[10:28:06.947] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[10:28:07.290] <TB2> INFO: Expecting 41600 events.
[10:28:11.820] <TB2> INFO: 41600 events read in total (3814ms).
[10:28:11.821] <TB2> INFO: Test took 4874ms.
[10:28:11.824] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:28:12.167] <TB2> INFO: Expecting 41600 events.
[10:28:16.373] <TB2> INFO: 41600 events read in total (3490ms).
[10:28:16.373] <TB2> INFO: Test took 4549ms.
[10:28:16.848] <TB2> INFO: PixTestGainPedestal::measure() done
[10:28:50.288] <TB2> INFO: PixTestGainPedestal::fit() done
[10:28:50.288] <TB2> INFO: non-linearity mean: 0.954 0.954 0.958 0.962 0.951 0.957 0.954 0.955 0.959 0.955 0.959 0.955 0.957 0.956 0.957 0.957
[10:28:50.288] <TB2> INFO: non-linearity RMS: 0.006 0.007 0.005 0.004 0.006 0.006 0.006 0.005 0.006 0.007 0.006 0.006 0.005 0.006 0.005 0.005
[10:28:50.288] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:28:50.308] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:28:50.328] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:28:50.347] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:28:50.366] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:28:50.386] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:28:50.406] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:28:50.427] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:28:50.449] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:28:50.471] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:28:50.493] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:28:50.515] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:28:50.537] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:28:50.558] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:28:50.579] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:28:50.601] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:28:50.622] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 175 seconds
[10:28:50.629] <TB2> INFO: readReadbackCal: /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C15.dat
[10:28:50.630] <TB2> INFO: PixTestReadback::doTest() start.
[10:28:50.631] <TB2> INFO: PixTestReadback::RES sent once
[10:29:01.906] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C0.dat
[10:29:01.906] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C1.dat
[10:29:01.906] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C2.dat
[10:29:01.906] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C3.dat
[10:29:01.906] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C4.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C5.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C6.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C7.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C8.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C9.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C10.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C11.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C12.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C13.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C14.dat
[10:29:01.907] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C15.dat
[10:29:01.935] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[10:29:01.936] <TB2> INFO: PixTestReadback::RES sent once
[10:29:13.143] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C0.dat
[10:29:13.143] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C1.dat
[10:29:13.143] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C2.dat
[10:29:13.144] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C3.dat
[10:29:13.144] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C4.dat
[10:29:13.144] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C5.dat
[10:29:13.144] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C6.dat
[10:29:13.144] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C7.dat
[10:29:13.145] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C8.dat
[10:29:13.145] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C9.dat
[10:29:13.145] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C10.dat
[10:29:13.145] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C11.dat
[10:29:13.145] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C12.dat
[10:29:13.145] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C13.dat
[10:29:13.145] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C14.dat
[10:29:13.145] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C15.dat
[10:29:13.178] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[10:29:13.178] <TB2> INFO: PixTestReadback::RES sent once
[10:29:21.799] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[10:29:21.799] <TB2> INFO: Vbg will be calibrated using Vd calibration
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154calibrated Vbg = 1.19454 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 159calibrated Vbg = 1.18983 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 140.7calibrated Vbg = 1.19529 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 156.2calibrated Vbg = 1.20107 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 150calibrated Vbg = 1.21001 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.5calibrated Vbg = 1.20487 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.8calibrated Vbg = 1.21156 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156calibrated Vbg = 1.20916 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.8calibrated Vbg = 1.21465 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158.8calibrated Vbg = 1.2108 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.4calibrated Vbg = 1.20683 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 151.4calibrated Vbg = 1.21017 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 148.7calibrated Vbg = 1.19847 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 153.4calibrated Vbg = 1.18441 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158.7calibrated Vbg = 1.19457 :::*/*/*/*/
[10:29:21.799] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.5calibrated Vbg = 1.1916 :::*/*/*/*/
[10:29:21.802] <TB2> INFO: PixTestReadback::RES sent once
[10:32:16.335] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C0.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C1.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C2.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C3.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C4.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C5.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C6.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C7.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C8.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C9.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C10.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C11.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C12.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C13.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C14.dat
[10:32:16.336] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2090_FullQualification_2015-08-28_10h45m_1440751527//000_FulltestPxar_m20//readbackCal_C15.dat
[10:32:16.360] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[10:32:16.361] <TB2> INFO: PixTestReadback::doTest() done
[10:32:16.374] <TB2> INFO: enter test to run
[10:32:16.374] <TB2> INFO: test: exit no parameter change
[10:32:16.999] <TB2> QUIET: Connection to board 156 closed.
[10:32:17.079] <TB2> INFO: pXar: this is the end, my friend