Test Date: 2015-08-28 10:45
Analysis date: 2016-05-26 03:16
Logfile
LogfileView
[12:45:57.865] <TB1> INFO: *** Welcome to pxar ***
[12:45:57.865] <TB1> INFO: *** Today: 2015/08/28
[12:45:57.865] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C15.dat
[12:45:57.866] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:45:57.866] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//defaultMaskFile.dat
[12:45:57.867] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters_C15.dat
[12:45:57.955] <TB1> INFO: clk: 4
[12:45:57.955] <TB1> INFO: ctr: 4
[12:45:57.955] <TB1> INFO: sda: 19
[12:45:57.955] <TB1> INFO: tin: 9
[12:45:57.955] <TB1> INFO: level: 15
[12:45:57.955] <TB1> INFO: triggerdelay: 0
[12:45:57.955] <TB1> QUIET: Instanciating API for pxar v2.5+57~g44d0777
[12:45:57.955] <TB1> INFO: Log level: INFO
[12:45:57.964] <TB1> INFO: Found DTB DTB_WXBYFL
[12:45:57.976] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[12:45:57.980] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[12:45:57.983] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[12:45:59.532] <TB1> INFO: DUT info:
[12:45:59.532] <TB1> INFO: The DUT currently contains the following objects:
[12:45:59.532] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:45:59.532] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:45:59.532] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:45:59.532] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:45:59.532] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.532] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:45:59.933] <TB1> INFO: enter 'restricted' command line mode
[12:45:59.933] <TB1> INFO: enter test to run
[12:45:59.934] <TB1> INFO: test: pretest no parameter change
[12:45:59.934] <TB1> INFO: running: pretest
[12:45:59.939] <TB1> INFO: ######################################################################
[12:45:59.939] <TB1> INFO: PixTestPretest::doTest()
[12:45:59.939] <TB1> INFO: ######################################################################
[12:45:59.941] <TB1> INFO: ----------------------------------------------------------------------
[12:45:59.941] <TB1> INFO: PixTestPretest::programROC()
[12:45:59.941] <TB1> INFO: ----------------------------------------------------------------------
[12:46:17.963] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:46:17.963] <TB1> INFO: IA differences per ROC: 19.3 14.5 18.5 19.3 16.9 17.7 18.5 18.5 20.9 17.7 19.3 19.3 18.5 16.9 17.7 19.3
[12:46:18.040] <TB1> INFO: ----------------------------------------------------------------------
[12:46:18.040] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:46:18.040] <TB1> INFO: ----------------------------------------------------------------------
[12:46:37.633] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 388.3 mA = 24.2687 mA/ROC
[12:46:37.635] <TB1> INFO: ----------------------------------------------------------------------
[12:46:37.635] <TB1> INFO: PixTestPretest::findTiming()
[12:46:37.635] <TB1> INFO: ----------------------------------------------------------------------
[12:46:37.635] <TB1> INFO: PixTestCmd::init()
[12:46:38.299] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!

[12:48:19.146] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[12:48:19.146] <TB1> INFO: (success/tries = 100/100), width = 5
[12:48:19.148] <TB1> INFO: ----------------------------------------------------------------------
[12:48:19.148] <TB1> INFO: PixTestPretest::findWorkingPixel()
[12:48:19.148] <TB1> INFO: ----------------------------------------------------------------------
[12:48:19.285] <TB1> INFO: Expecting 231680 events.
[12:48:28.063] <TB1> INFO: 231680 events read in total (8060ms).
[12:48:28.071] <TB1> INFO: Test took 8921ms.
[12:48:28.384] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:48:28.434] <TB1> INFO: ----------------------------------------------------------------------
[12:48:28.434] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[12:48:28.434] <TB1> INFO: ----------------------------------------------------------------------
[12:48:28.572] <TB1> INFO: Expecting 231680 events.
[12:48:37.818] <TB1> INFO: 231680 events read in total (8529ms).
[12:48:37.822] <TB1> INFO: Test took 9383ms.
[12:48:38.151] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[12:48:38.151] <TB1> INFO: CalDel: 163 151 154 159 155 132 158 137 135 138 137 138 144 120 132 141
[12:48:38.151] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:48:38.154] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C0.dat
[12:48:38.154] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C1.dat
[12:48:38.154] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C2.dat
[12:48:38.154] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C3.dat
[12:48:38.155] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C4.dat
[12:48:38.155] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C5.dat
[12:48:38.155] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C6.dat
[12:48:38.155] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C7.dat
[12:48:38.156] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C8.dat
[12:48:38.156] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C9.dat
[12:48:38.156] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C10.dat
[12:48:38.156] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C11.dat
[12:48:38.156] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C12.dat
[12:48:38.157] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C13.dat
[12:48:38.157] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C14.dat
[12:48:38.157] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters_C15.dat
[12:48:38.157] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0a.dat
[12:48:38.157] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:48:38.158] <TB1> INFO: PixTestPretest::doTest() done, duration: 158 seconds
[12:48:38.225] <TB1> INFO: enter test to run
[12:48:38.225] <TB1> INFO: test: fulltest no parameter change
[12:48:38.225] <TB1> INFO: running: fulltest
[12:48:38.225] <TB1> INFO: ######################################################################
[12:48:38.225] <TB1> INFO: PixTestFullTest::doTest()
[12:48:38.225] <TB1> INFO: ######################################################################
[12:48:38.227] <TB1> INFO: ######################################################################
[12:48:38.227] <TB1> INFO: PixTestAlive::doTest()
[12:48:38.227] <TB1> INFO: ######################################################################
[12:48:38.228] <TB1> INFO: ----------------------------------------------------------------------
[12:48:38.228] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:48:38.228] <TB1> INFO: ----------------------------------------------------------------------
[12:48:38.547] <TB1> INFO: Expecting 41600 events.
[12:48:42.980] <TB1> INFO: 41600 events read in total (3716ms).
[12:48:42.981] <TB1> INFO: Test took 4751ms.
[12:48:42.987] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:43.291] <TB1> INFO: PixTestAlive::aliveTest() done
[12:48:43.291] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:48:43.293] <TB1> INFO: ----------------------------------------------------------------------
[12:48:43.293] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:48:43.293] <TB1> INFO: ----------------------------------------------------------------------
[12:48:43.612] <TB1> INFO: Expecting 41600 events.
[12:48:46.759] <TB1> INFO: 41600 events read in total (2430ms).
[12:48:46.759] <TB1> INFO: Test took 3463ms.
[12:48:46.759] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:46.760] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:48:47.088] <TB1> INFO: PixTestAlive::maskTest() done
[12:48:47.088] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:48:47.090] <TB1> INFO: ----------------------------------------------------------------------
[12:48:47.090] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:48:47.090] <TB1> INFO: ----------------------------------------------------------------------
[12:48:47.408] <TB1> INFO: Expecting 41600 events.
[12:48:51.853] <TB1> INFO: 41600 events read in total (3728ms).
[12:48:51.854] <TB1> INFO: Test took 4762ms.
[12:48:51.861] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:52.167] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[12:48:52.167] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:48:52.167] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:48:52.179] <TB1> INFO: ######################################################################
[12:48:52.179] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:48:52.179] <TB1> INFO: ######################################################################
[12:48:52.184] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[12:48:52.276] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:48:52.276] <TB1> INFO: run 1 of 1
[12:48:52.595] <TB1> INFO: Expecting 3120000 events.
[12:49:27.921] <TB1> INFO: 841885 events read in total (34609ms).
[12:50:02.166] <TB1> INFO: 1669875 events read in total (68854ms).
[12:50:36.913] <TB1> INFO: 2507830 events read in total (103601ms).
[12:51:00.779] <TB1> INFO: 3120000 events read in total (127467ms).
[12:51:00.831] <TB1> INFO: Test took 128555ms.
[12:51:00.947] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:24.135] <TB1> INFO: PixTestBBMap::doTest() done, duration: 151 seconds
[12:51:24.135] <TB1> INFO: number of dead bumps (per ROC): 5 7 1 1 2 1 0 0 0 0 0 0 0 2 4 9
[12:51:24.135] <TB1> INFO: separation cut (per ROC): 89 72 93 93 77 83 94 86 91 82 73 98 74 70 69 88
[12:51:24.217] <TB1> INFO: ######################################################################
[12:51:24.217] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:51:24.217] <TB1> INFO: ######################################################################
[12:51:24.217] <TB1> INFO: ----------------------------------------------------------------------
[12:51:24.217] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:51:24.217] <TB1> INFO: ----------------------------------------------------------------------
[12:51:24.218] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[12:51:24.226] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[12:51:24.226] <TB1> INFO: run 1 of 1
[12:51:24.542] <TB1> INFO: Expecting 31200000 events.
[12:51:46.843] <TB1> INFO: 931800 events read in total (21584ms).
[12:52:10.726] <TB1> INFO: 1852250 events read in total (45467ms).
[12:52:34.714] <TB1> INFO: 2768250 events read in total (69455ms).
[12:52:58.616] <TB1> INFO: 3687000 events read in total (93357ms).
[12:53:22.544] <TB1> INFO: 4601800 events read in total (117285ms).
[12:53:46.425] <TB1> INFO: 5517700 events read in total (141166ms).
[12:54:09.634] <TB1> INFO: 6431850 events read in total (164375ms).
[12:54:31.635] <TB1> INFO: 7347800 events read in total (186376ms).
[12:54:53.530] <TB1> INFO: 8258800 events read in total (208271ms).
[12:55:15.272] <TB1> INFO: 9171250 events read in total (230013ms).
[12:55:37.369] <TB1> INFO: 10084400 events read in total (252110ms).
[12:56:01.417] <TB1> INFO: 10999950 events read in total (276158ms).
[12:56:25.249] <TB1> INFO: 11909800 events read in total (299990ms).
[12:56:49.087] <TB1> INFO: 12822650 events read in total (323828ms).
[12:57:12.834] <TB1> INFO: 13732100 events read in total (347575ms).
[12:57:36.727] <TB1> INFO: 14644250 events read in total (371468ms).
[12:58:00.618] <TB1> INFO: 15552050 events read in total (395359ms).
[12:58:24.394] <TB1> INFO: 16453800 events read in total (419135ms).
[12:58:48.296] <TB1> INFO: 17355450 events read in total (443037ms).
[12:59:12.258] <TB1> INFO: 18259000 events read in total (466999ms).
[12:59:36.053] <TB1> INFO: 19160150 events read in total (490794ms).
[12:59:59.808] <TB1> INFO: 20060000 events read in total (514549ms).
[13:00:23.597] <TB1> INFO: 20959150 events read in total (538338ms).
[13:00:47.525] <TB1> INFO: 21859800 events read in total (562266ms).
[13:01:11.370] <TB1> INFO: 22759900 events read in total (586111ms).
[13:01:35.251] <TB1> INFO: 23657450 events read in total (609992ms).
[13:01:59.079] <TB1> INFO: 24554650 events read in total (633820ms).
[13:02:22.949] <TB1> INFO: 25454550 events read in total (657690ms).
[13:02:46.911] <TB1> INFO: 26354350 events read in total (681652ms).
[13:03:10.767] <TB1> INFO: 27253200 events read in total (705508ms).
[13:03:34.753] <TB1> INFO: 28153100 events read in total (729494ms).
[13:03:58.799] <TB1> INFO: 29055900 events read in total (753540ms).
[13:04:22.701] <TB1> INFO: 29959450 events read in total (777442ms).
[13:04:46.582] <TB1> INFO: 30868300 events read in total (801323ms).
[13:04:55.456] <TB1> INFO: 31200000 events read in total (810197ms).
[13:04:55.484] <TB1> INFO: Test took 811258ms.
[13:04:55.582] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:55.688] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:04:57.192] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:04:58.762] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:00.258] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:01.692] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:03.184] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:04.655] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:06.175] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:07.638] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:09.136] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:10.568] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:12.113] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:13.523] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:14.969] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:16.419] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:17.992] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:05:19.484] <TB1> INFO: PixTestScurves::scurves() done
[13:05:19.484] <TB1> INFO: Vcal mean: 84.35 73.71 92.54 93.61 82.28 91.52 100.01 99.69 89.44 79.22 82.00 101.48 80.14 70.57 73.36 95.80
[13:05:19.484] <TB1> INFO: Vcal RMS: 4.82 5.11 6.39 6.70 4.44 6.65 7.15 5.30 5.68 4.80 4.96 5.66 4.36 4.72 4.26 5.72
[13:05:19.484] <TB1> INFO: PixTestScurves::fullTest() done, duration: 835 seconds
[13:05:19.557] <TB1> INFO: ######################################################################
[13:05:19.557] <TB1> INFO: PixTestTrim::doTest()
[13:05:19.557] <TB1> INFO: ######################################################################
[13:05:19.559] <TB1> INFO: ----------------------------------------------------------------------
[13:05:19.559] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:05:19.559] <TB1> INFO: ----------------------------------------------------------------------
[13:05:19.645] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:05:19.645] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[13:05:19.653] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:05:19.653] <TB1> INFO: run 1 of 1
[13:05:19.967] <TB1> INFO: Expecting 13312000 events.
[13:05:48.334] <TB1> INFO: 1072580 events read in total (27649ms).
[13:06:14.563] <TB1> INFO: 2140400 events read in total (53878ms).
[13:06:40.852] <TB1> INFO: 3205460 events read in total (80167ms).
[13:07:05.750] <TB1> INFO: 4268000 events read in total (105065ms).
[13:07:33.223] <TB1> INFO: 5326640 events read in total (132538ms).
[13:08:00.632] <TB1> INFO: 6383300 events read in total (159947ms).
[13:08:28.059] <TB1> INFO: 7445020 events read in total (187374ms).
[13:08:55.554] <TB1> INFO: 8509880 events read in total (214869ms).
[13:09:23.096] <TB1> INFO: 9575720 events read in total (242411ms).
[13:09:50.809] <TB1> INFO: 10643640 events read in total (270124ms).
[13:10:18.265] <TB1> INFO: 11712840 events read in total (297580ms).
[13:10:45.800] <TB1> INFO: 12780720 events read in total (325115ms).
[13:10:59.590] <TB1> INFO: 13312000 events read in total (338905ms).
[13:10:59.622] <TB1> INFO: Test took 339969ms.
[13:10:59.676] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:18.922] <TB1> INFO: ROC 0 VthrComp = 94
[13:11:18.922] <TB1> INFO: ROC 1 VthrComp = 75
[13:11:18.922] <TB1> INFO: ROC 2 VthrComp = 96
[13:11:18.922] <TB1> INFO: ROC 3 VthrComp = 97
[13:11:18.922] <TB1> INFO: ROC 4 VthrComp = 85
[13:11:18.922] <TB1> INFO: ROC 5 VthrComp = 90
[13:11:18.922] <TB1> INFO: ROC 6 VthrComp = 100
[13:11:18.923] <TB1> INFO: ROC 7 VthrComp = 99
[13:11:18.923] <TB1> INFO: ROC 8 VthrComp = 95
[13:11:18.923] <TB1> INFO: ROC 9 VthrComp = 82
[13:11:18.923] <TB1> INFO: ROC 10 VthrComp = 87
[13:11:18.923] <TB1> INFO: ROC 11 VthrComp = 105
[13:11:18.923] <TB1> INFO: ROC 12 VthrComp = 85
[13:11:18.923] <TB1> INFO: ROC 13 VthrComp = 78
[13:11:18.923] <TB1> INFO: ROC 14 VthrComp = 79
[13:11:18.924] <TB1> INFO: ROC 15 VthrComp = 100
[13:11:18.924] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:11:18.924] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[13:11:18.933] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:11:18.933] <TB1> INFO: run 1 of 1
[13:11:19.261] <TB1> INFO: Expecting 13312000 events.
[13:11:44.863] <TB1> INFO: 779040 events read in total (24885ms).
[13:12:09.890] <TB1> INFO: 1554860 events read in total (49912ms).
[13:12:34.755] <TB1> INFO: 2330860 events read in total (74777ms).
[13:12:57.326] <TB1> INFO: 3106640 events read in total (97348ms).
[13:13:21.623] <TB1> INFO: 3881720 events read in total (121645ms).
[13:13:45.236] <TB1> INFO: 4658000 events read in total (145258ms).
[13:14:10.136] <TB1> INFO: 5433380 events read in total (170158ms).
[13:14:35.049] <TB1> INFO: 6209400 events read in total (195071ms).
[13:14:59.855] <TB1> INFO: 6981860 events read in total (219877ms).
[13:15:24.569] <TB1> INFO: 7751840 events read in total (244591ms).
[13:15:49.308] <TB1> INFO: 8520220 events read in total (269330ms).
[13:16:14.003] <TB1> INFO: 9287540 events read in total (294025ms).
[13:16:38.858] <TB1> INFO: 10053600 events read in total (318880ms).
[13:17:03.656] <TB1> INFO: 10819940 events read in total (343678ms).
[13:17:28.361] <TB1> INFO: 11585680 events read in total (368383ms).
[13:17:53.040] <TB1> INFO: 12351600 events read in total (393062ms).
[13:18:17.948] <TB1> INFO: 13118340 events read in total (417970ms).
[13:18:24.447] <TB1> INFO: 13312000 events read in total (424469ms).
[13:18:24.492] <TB1> INFO: Test took 425559ms.
[13:18:24.640] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:47.689] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 56.7596 for pixel 0/72 mean/min/max = 44.2111/31.6087/56.8135
[13:18:47.689] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 60.9657 for pixel 2/65 mean/min/max = 47.3305/33.6868/60.9742
[13:18:47.689] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 62.1939 for pixel 4/8 mean/min/max = 46.8076/31.4115/62.2037
[13:18:47.689] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 62.1957 for pixel 0/56 mean/min/max = 46.6994/31.0106/62.3882
[13:18:47.690] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 56.1372 for pixel 3/20 mean/min/max = 44.224/31.9787/56.4693
[13:18:47.690] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 65.9347 for pixel 12/67 mean/min/max = 48.65/31.3154/65.9847
[13:18:47.690] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 61.4871 for pixel 17/3 mean/min/max = 46.552/31.3327/61.7713
[13:18:47.690] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.4616 for pixel 7/3 mean/min/max = 46.2585/31.9629/60.5541
[13:18:47.691] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 59.7035 for pixel 3/78 mean/min/max = 45.5008/31.2442/59.7574
[13:18:47.691] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 56.5091 for pixel 9/21 mean/min/max = 44.3718/32.0601/56.6835
[13:18:47.691] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 57.8478 for pixel 0/79 mean/min/max = 44.5432/31.1994/57.887
[13:18:47.691] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 60.0389 for pixel 40/47 mean/min/max = 46.9263/33.8129/60.0397
[13:18:47.691] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 57.1874 for pixel 9/77 mean/min/max = 44.8293/32.4104/57.2482
[13:18:47.692] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 56.5291 for pixel 5/79 mean/min/max = 45.4528/34.2642/56.6413
[13:18:47.692] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 56.5706 for pixel 43/72 mean/min/max = 45.5224/34.4103/56.6345
[13:18:47.692] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 59.486 for pixel 1/8 mean/min/max = 45.4534/31.3876/59.5191
[13:18:47.692] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:18:47.825] <TB1> INFO: Expecting 1029120 events.
[13:19:11.708] <TB1> INFO: 1029120 events read in total (23165ms).
[13:19:11.714] <TB1> INFO: Expecting 1029120 events.
[13:19:35.488] <TB1> INFO: 1029120 events read in total (23238ms).
[13:19:35.495] <TB1> INFO: Expecting 1029120 events.
[13:19:59.197] <TB1> INFO: 1029120 events read in total (23163ms).
[13:19:59.208] <TB1> INFO: Expecting 1029120 events.
[13:20:22.922] <TB1> INFO: 1029120 events read in total (23186ms).
[13:20:22.933] <TB1> INFO: Expecting 1029120 events.
[13:20:45.610] <TB1> INFO: 1029120 events read in total (22139ms).
[13:20:45.626] <TB1> INFO: Expecting 1029120 events.
[13:21:07.507] <TB1> INFO: 1029120 events read in total (21353ms).
[13:21:07.522] <TB1> INFO: Expecting 1029120 events.
[13:21:29.197] <TB1> INFO: 1029120 events read in total (21146ms).
[13:21:29.215] <TB1> INFO: Expecting 1029120 events.
[13:21:53.117] <TB1> INFO: 1029120 events read in total (23370ms).
[13:21:53.138] <TB1> INFO: Expecting 1029120 events.
[13:22:17.034] <TB1> INFO: 1029120 events read in total (23368ms).
[13:22:17.057] <TB1> INFO: Expecting 1029120 events.
[13:22:40.817] <TB1> INFO: 1029120 events read in total (23231ms).
[13:22:40.841] <TB1> INFO: Expecting 1029120 events.
[13:23:04.304] <TB1> INFO: 1029120 events read in total (22935ms).
[13:23:04.328] <TB1> INFO: Expecting 1029120 events.
[13:23:28.089] <TB1> INFO: 1029120 events read in total (23228ms).
[13:23:28.118] <TB1> INFO: Expecting 1029120 events.
[13:23:51.827] <TB1> INFO: 1029120 events read in total (23181ms).
[13:23:51.856] <TB1> INFO: Expecting 1029120 events.
[13:24:14.146] <TB1> INFO: 1029120 events read in total (21762ms).
[13:24:14.176] <TB1> INFO: Expecting 1029120 events.
[13:24:36.323] <TB1> INFO: 1029120 events read in total (21617ms).
[13:24:36.371] <TB1> INFO: Expecting 1029120 events.
[13:24:58.331] <TB1> INFO: 1029120 events read in total (21432ms).
[13:24:58.366] <TB1> INFO: Test took 370674ms.
[13:24:59.412] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:24:59.421] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:24:59.421] <TB1> INFO: run 1 of 1
[13:24:59.734] <TB1> INFO: Expecting 8320000 events.
[13:25:25.044] <TB1> INFO: 722910 events read in total (24594ms).
[13:25:51.406] <TB1> INFO: 1444940 events read in total (50956ms).
[13:26:18.325] <TB1> INFO: 2166600 events read in total (77875ms).
[13:26:45.351] <TB1> INFO: 2888290 events read in total (104901ms).
[13:27:12.262] <TB1> INFO: 3609910 events read in total (131812ms).
[13:27:39.448] <TB1> INFO: 4330140 events read in total (158998ms).
[13:28:06.540] <TB1> INFO: 5045470 events read in total (186090ms).
[13:28:33.382] <TB1> INFO: 5758980 events read in total (212932ms).
[13:29:00.290] <TB1> INFO: 6471230 events read in total (239840ms).
[13:29:27.106] <TB1> INFO: 7182020 events read in total (266656ms).
[13:29:54.014] <TB1> INFO: 7893130 events read in total (293564ms).
[13:30:10.252] <TB1> INFO: 8320000 events read in total (309802ms).
[13:30:10.321] <TB1> INFO: Test took 310900ms.
[13:30:10.525] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:35.777] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.057016 .. 255.000000
[13:30:35.852] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 255 (-1/-1) hits flags = 16 (plus default)
[13:30:35.860] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:30:35.860] <TB1> INFO: run 1 of 1
[13:30:36.184] <TB1> INFO: Expecting 21299200 events.
[13:31:01.372] <TB1> INFO: 711440 events read in total (24470ms).
[13:31:25.705] <TB1> INFO: 1423940 events read in total (48803ms).
[13:31:49.943] <TB1> INFO: 2136300 events read in total (73041ms).
[13:32:14.422] <TB1> INFO: 2848860 events read in total (97520ms).
[13:32:38.930] <TB1> INFO: 3561300 events read in total (122028ms).
[13:33:03.327] <TB1> INFO: 4273720 events read in total (146425ms).
[13:33:27.690] <TB1> INFO: 4985960 events read in total (170788ms).
[13:33:49.322] <TB1> INFO: 5698980 events read in total (192420ms).
[13:34:11.178] <TB1> INFO: 6411580 events read in total (214276ms).
[13:34:34.823] <TB1> INFO: 7124000 events read in total (237921ms).
[13:34:59.099] <TB1> INFO: 7836520 events read in total (262197ms).
[13:35:23.391] <TB1> INFO: 8549020 events read in total (286489ms).
[13:35:47.649] <TB1> INFO: 9261420 events read in total (310747ms).
[13:36:12.059] <TB1> INFO: 9974060 events read in total (335157ms).
[13:36:36.005] <TB1> INFO: 10686820 events read in total (359103ms).
[13:36:59.480] <TB1> INFO: 11398980 events read in total (382578ms).
[13:37:23.837] <TB1> INFO: 12111380 events read in total (406935ms).
[13:37:48.339] <TB1> INFO: 12823680 events read in total (431437ms).
[13:38:12.694] <TB1> INFO: 13535560 events read in total (455792ms).
[13:38:37.150] <TB1> INFO: 14247040 events read in total (480248ms).
[13:39:00.631] <TB1> INFO: 14958580 events read in total (503729ms).
[13:39:24.552] <TB1> INFO: 15670200 events read in total (527650ms).
[13:39:48.838] <TB1> INFO: 16381100 events read in total (551936ms).
[13:40:12.930] <TB1> INFO: 17091560 events read in total (576028ms).
[13:40:37.198] <TB1> INFO: 17802200 events read in total (600296ms).
[13:41:01.474] <TB1> INFO: 18512720 events read in total (624572ms).
[13:41:23.941] <TB1> INFO: 19223360 events read in total (647039ms).
[13:41:48.167] <TB1> INFO: 19933860 events read in total (671265ms).
[13:42:12.379] <TB1> INFO: 20643800 events read in total (695477ms).
[13:42:34.527] <TB1> INFO: 21299200 events read in total (717625ms).
[13:42:34.640] <TB1> INFO: Test took 718781ms.
[13:42:34.912] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:03.507] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 13.789269 .. 45.095510
[13:43:03.599] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 3 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:43:03.607] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:43:03.607] <TB1> INFO: run 1 of 1
[13:43:03.919] <TB1> INFO: Expecting 4409600 events.
[13:43:30.401] <TB1> INFO: 947620 events read in total (25753ms).
[13:43:56.940] <TB1> INFO: 1895940 events read in total (52292ms).
[13:44:23.194] <TB1> INFO: 2843440 events read in total (78547ms).
[13:44:49.457] <TB1> INFO: 3788620 events read in total (104809ms).
[13:45:07.156] <TB1> INFO: 4409600 events read in total (122509ms).
[13:45:07.175] <TB1> INFO: Test took 123568ms.
[13:45:07.210] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:20.766] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 20.110272 .. 42.556237
[13:45:20.849] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 10 .. 52 (-1/-1) hits flags = 16 (plus default)
[13:45:20.857] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:45:20.857] <TB1> INFO: run 1 of 1
[13:45:21.174] <TB1> INFO: Expecting 3577600 events.
[13:45:47.986] <TB1> INFO: 935460 events read in total (26095ms).
[13:46:14.603] <TB1> INFO: 1870980 events read in total (52712ms).
[13:46:41.236] <TB1> INFO: 2804520 events read in total (79346ms).
[13:47:03.466] <TB1> INFO: 3577600 events read in total (101575ms).
[13:47:03.488] <TB1> INFO: Test took 102631ms.
[13:47:03.521] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:16.167] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 2.798823 .. 42.244622
[13:47:16.249] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 2 .. 52 (-1/-1) hits flags = 16 (plus default)
[13:47:16.257] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:47:16.260] <TB1> INFO: run 1 of 1
[13:47:16.577] <TB1> INFO: Expecting 4243200 events.
[13:47:42.225] <TB1> INFO: 981360 events read in total (24927ms).
[13:48:08.164] <TB1> INFO: 1962440 events read in total (50867ms).
[13:48:35.548] <TB1> INFO: 2943620 events read in total (78250ms).
[13:49:02.514] <TB1> INFO: 3924760 events read in total (105216ms).
[13:49:11.742] <TB1> INFO: 4243200 events read in total (114445ms).
[13:49:11.758] <TB1> INFO: Test took 115498ms.
[13:49:11.790] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:24.746] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:49:24.753] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:49:24.762] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:49:24.762] <TB1> INFO: run 1 of 1
[13:49:25.066] <TB1> INFO: Expecting 1705600 events.
[13:49:52.861] <TB1> INFO: 878580 events read in total (27078ms).
[13:50:18.804] <TB1> INFO: 1705600 events read in total (53021ms).
[13:50:18.822] <TB1> INFO: Test took 54061ms.
[13:50:18.856] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:32.772] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:50:32.776] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:50:32.776] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:50:32.777] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:50:32.777] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:50:32.777] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:50:32.777] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:50:32.777] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:50:32.777] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:50:32.778] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:50:32.778] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:50:32.778] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:50:32.778] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:50:32.778] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:50:32.778] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:50:32.778] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:50:32.779] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:50:32.787] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:50:32.793] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:50:32.799] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:50:32.805] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:50:32.811] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:50:32.817] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:50:32.823] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:50:32.829] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:50:32.835] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:50:32.840] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:50:32.846] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:50:32.852] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:50:32.858] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:50:32.864] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:50:32.870] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:50:32.876] <TB1> INFO: PixTestTrim::trimTest() done
[13:50:32.876] <TB1> INFO: vtrim: 96 90 110 108 92 128 112 110 114 86 84 102 83 86 95 100
[13:50:32.876] <TB1> INFO: vthrcomp: 94 75 96 97 85 90 100 99 95 82 87 105 85 78 79 100
[13:50:32.876] <TB1> INFO: vcal mean: 34.96 34.90 34.91 34.92 34.93 34.89 34.87 34.91 34.91 34.91 34.91 34.96 34.92 34.95 34.98 34.93
[13:50:32.876] <TB1> INFO: vcal RMS: 0.72 0.81 0.85 0.85 0.79 1.20 0.96 0.96 0.79 0.94 0.80 0.81 0.76 0.73 0.73 0.82
[13:50:32.876] <TB1> INFO: bits mean: 9.50 8.70 9.15 9.05 9.70 9.45 9.26 9.25 9.41 9.56 8.99 8.73 9.05 8.68 9.10 9.38
[13:50:32.876] <TB1> INFO: bits RMS: 2.83 2.71 2.89 2.92 2.66 2.59 2.77 2.76 2.81 2.73 3.16 2.67 2.87 2.66 2.47 2.83
[13:50:32.885] <TB1> INFO: ----------------------------------------------------------------------
[13:50:32.885] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:50:32.885] <TB1> INFO: ----------------------------------------------------------------------
[13:50:32.889] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:50:32.898] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:50:32.898] <TB1> INFO: run 1 of 1
[13:50:33.214] <TB1> INFO: Expecting 8320000 events.
[13:51:02.177] <TB1> INFO: 911020 events read in total (28246ms).
[13:51:31.161] <TB1> INFO: 1815450 events read in total (57230ms).
[13:52:00.287] <TB1> INFO: 2716980 events read in total (86356ms).
[13:52:28.275] <TB1> INFO: 3616900 events read in total (114344ms).
[13:52:57.136] <TB1> INFO: 4511920 events read in total (143205ms).
[13:53:24.762] <TB1> INFO: 5402820 events read in total (170831ms).
[13:53:53.259] <TB1> INFO: 6292740 events read in total (199328ms).
[13:54:20.073] <TB1> INFO: 7182400 events read in total (226142ms).
[13:54:46.779] <TB1> INFO: 8075120 events read in total (252848ms).
[13:54:54.364] <TB1> INFO: 8320000 events read in total (260434ms).
[13:54:54.406] <TB1> INFO: Test took 261507ms.
[13:54:54.521] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:21.559] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 169 (-1/-1) hits flags = 16 (plus default)
[13:55:21.567] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:55:21.567] <TB1> INFO: run 1 of 1
[13:55:21.875] <TB1> INFO: Expecting 7072000 events.
[13:55:50.008] <TB1> INFO: 934320 events read in total (27416ms).
[13:56:19.409] <TB1> INFO: 1861560 events read in total (56817ms).
[13:56:49.022] <TB1> INFO: 2786870 events read in total (86430ms).
[13:57:16.522] <TB1> INFO: 3707040 events read in total (113930ms).
[13:57:46.019] <TB1> INFO: 4621510 events read in total (143427ms).
[13:58:15.473] <TB1> INFO: 5533830 events read in total (172881ms).
[13:58:44.730] <TB1> INFO: 6447770 events read in total (202138ms).
[13:59:04.930] <TB1> INFO: 7072000 events read in total (222338ms).
[13:59:04.962] <TB1> INFO: Test took 223395ms.
[13:59:05.047] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:33.860] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 155 (-1/-1) hits flags = 16 (plus default)
[13:59:33.872] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:59:33.872] <TB1> INFO: run 1 of 1
[13:59:34.211] <TB1> INFO: Expecting 6489600 events.
[14:00:03.373] <TB1> INFO: 968910 events read in total (28445ms).
[14:00:31.668] <TB1> INFO: 1929680 events read in total (56741ms).
[14:00:58.998] <TB1> INFO: 2887540 events read in total (84071ms).
[14:01:28.859] <TB1> INFO: 3836590 events read in total (113931ms).
[14:01:58.524] <TB1> INFO: 4781610 events read in total (143596ms).
[14:02:28.282] <TB1> INFO: 5726490 events read in total (173354ms).
[14:02:52.206] <TB1> INFO: 6489600 events read in total (197278ms).
[14:02:52.239] <TB1> INFO: Test took 198367ms.
[14:02:52.316] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:18.407] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 155 (-1/-1) hits flags = 16 (plus default)
[14:03:18.416] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[14:03:18.416] <TB1> INFO: run 1 of 1
[14:03:18.758] <TB1> INFO: Expecting 6489600 events.
[14:03:49.418] <TB1> INFO: 968400 events read in total (29942ms).
[14:04:17.052] <TB1> INFO: 1928380 events read in total (57576ms).
[14:04:45.395] <TB1> INFO: 2885610 events read in total (85919ms).
[14:05:14.575] <TB1> INFO: 3833900 events read in total (115099ms).
[14:05:44.322] <TB1> INFO: 4778190 events read in total (144846ms).
[14:06:13.969] <TB1> INFO: 5722300 events read in total (174493ms).
[14:06:38.205] <TB1> INFO: 6489600 events read in total (198729ms).
[14:06:38.238] <TB1> INFO: Test took 199822ms.
[14:06:38.311] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:00.959] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 153 (-1/-1) hits flags = 16 (plus default)
[14:07:00.967] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[14:07:00.967] <TB1> INFO: run 1 of 1
[14:07:01.275] <TB1> INFO: Expecting 6406400 events.
[14:07:31.881] <TB1> INFO: 973050 events read in total (29889ms).
[14:08:01.745] <TB1> INFO: 1937490 events read in total (59753ms).
[14:08:29.199] <TB1> INFO: 2899140 events read in total (87207ms).
[14:08:57.356] <TB1> INFO: 3851590 events read in total (115364ms).
[14:09:27.038] <TB1> INFO: 4799850 events read in total (145046ms).
[14:09:56.747] <TB1> INFO: 5748690 events read in total (174755ms).
[14:10:17.317] <TB1> INFO: 6406400 events read in total (195325ms).
[14:10:17.349] <TB1> INFO: Test took 196382ms.
[14:10:17.419] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:41.134] <TB1> INFO: PixTestTrim::trimBitTest() done
[14:10:41.135] <TB1> INFO: PixTestTrim::doTest() done, duration: 3921 seconds
[14:10:41.849] <TB1> INFO: ######################################################################
[14:10:41.849] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:10:41.849] <TB1> INFO: ######################################################################
[14:10:42.163] <TB1> INFO: Expecting 41600 events.
[14:10:46.586] <TB1> INFO: 41600 events read in total (3704ms).
[14:10:46.586] <TB1> INFO: Test took 4736ms.
[14:10:46.592] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:47.175] <TB1> INFO: Expecting 41600 events.
[14:10:51.631] <TB1> INFO: 41600 events read in total (3739ms).
[14:10:51.631] <TB1> INFO: Test took 4779ms.
[14:10:51.638] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:51.989] <TB1> INFO: Expecting 41600 events.
[14:10:56.456] <TB1> INFO: 41600 events read in total (3750ms).
[14:10:56.457] <TB1> INFO: Test took 4793ms.
[14:10:56.463] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:56.471] <TB1> INFO: The DUT currently contains the following objects:
[14:10:56.471] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:10:56.471] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:10:56.471] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:10:56.471] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:10:56.471] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.471] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:56.812] <TB1> INFO: Expecting 2560 events.
[14:10:57.883] <TB1> INFO: 2560 events read in total (354ms).
[14:10:57.884] <TB1> INFO: Test took 1413ms.
[14:10:57.885] <TB1> INFO: The DUT currently contains the following objects:
[14:10:57.885] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:10:57.885] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:10:57.885] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:10:57.885] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:10:57.885] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.885] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:57.886] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:58.299] <TB1> INFO: Expecting 2560 events.
[14:10:59.371] <TB1> INFO: 2560 events read in total (354ms).
[14:10:59.371] <TB1> INFO: Test took 1485ms.
[14:10:59.372] <TB1> INFO: The DUT currently contains the following objects:
[14:10:59.372] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:10:59.372] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:10:59.372] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:10:59.372] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:10:59.372] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.372] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:10:59.787] <TB1> INFO: Expecting 2560 events.
[14:11:00.857] <TB1> INFO: 2560 events read in total (353ms).
[14:11:00.857] <TB1> INFO: Test took 1484ms.
[14:11:00.857] <TB1> INFO: The DUT currently contains the following objects:
[14:11:00.858] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:00.858] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:00.858] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:00.858] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:00.858] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.858] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.273] <TB1> INFO: Expecting 2560 events.
[14:11:02.340] <TB1> INFO: 2560 events read in total (350ms).
[14:11:02.340] <TB1> INFO: Test took 1482ms.
[14:11:02.341] <TB1> INFO: The DUT currently contains the following objects:
[14:11:02.341] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:02.341] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:02.341] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:02.341] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:02.341] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.341] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.342] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.756] <TB1> INFO: Expecting 2560 events.
[14:11:03.825] <TB1> INFO: 2560 events read in total (352ms).
[14:11:03.826] <TB1> INFO: Test took 1484ms.
[14:11:03.826] <TB1> INFO: The DUT currently contains the following objects:
[14:11:03.826] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:03.826] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:03.826] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:03.826] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:03.826] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.826] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.827] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.241] <TB1> INFO: Expecting 2560 events.
[14:11:05.312] <TB1> INFO: 2560 events read in total (353ms).
[14:11:05.313] <TB1> INFO: Test took 1486ms.
[14:11:05.313] <TB1> INFO: The DUT currently contains the following objects:
[14:11:05.313] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:05.313] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:05.313] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:05.313] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:05.313] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.313] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.314] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:05.729] <TB1> INFO: Expecting 2560 events.
[14:11:06.798] <TB1> INFO: 2560 events read in total (352ms).
[14:11:06.798] <TB1> INFO: Test took 1484ms.
[14:11:06.799] <TB1> INFO: The DUT currently contains the following objects:
[14:11:06.799] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:06.799] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:06.799] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:06.799] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:06.799] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.799] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.800] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.800] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.214] <TB1> INFO: Expecting 2560 events.
[14:11:08.285] <TB1> INFO: 2560 events read in total (354ms).
[14:11:08.285] <TB1> INFO: Test took 1485ms.
[14:11:08.286] <TB1> INFO: The DUT currently contains the following objects:
[14:11:08.286] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:08.286] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:08.286] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:08.286] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:08.286] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.286] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.287] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.287] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.287] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.287] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.701] <TB1> INFO: Expecting 2560 events.
[14:11:09.771] <TB1> INFO: 2560 events read in total (353ms).
[14:11:09.771] <TB1> INFO: Test took 1484ms.
[14:11:09.772] <TB1> INFO: The DUT currently contains the following objects:
[14:11:09.772] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:09.772] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:09.772] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:09.772] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:09.772] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.772] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.773] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.773] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.773] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.187] <TB1> INFO: Expecting 2560 events.
[14:11:11.256] <TB1> INFO: 2560 events read in total (352ms).
[14:11:11.257] <TB1> INFO: Test took 1484ms.
[14:11:11.257] <TB1> INFO: The DUT currently contains the following objects:
[14:11:11.257] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:11.257] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:11.257] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:11.258] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:11.258] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.258] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.672] <TB1> INFO: Expecting 2560 events.
[14:11:12.744] <TB1> INFO: 2560 events read in total (354ms).
[14:11:12.744] <TB1> INFO: Test took 1486ms.
[14:11:12.745] <TB1> INFO: The DUT currently contains the following objects:
[14:11:12.745] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:12.745] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:12.745] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:12.745] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:12.745] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.745] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.745] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.745] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.745] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.745] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.745] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.745] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.745] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.746] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.746] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.746] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.746] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.746] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.746] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.746] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.160] <TB1> INFO: Expecting 2560 events.
[14:11:14.230] <TB1> INFO: 2560 events read in total (353ms).
[14:11:14.230] <TB1> INFO: Test took 1484ms.
[14:11:14.231] <TB1> INFO: The DUT currently contains the following objects:
[14:11:14.231] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:14.231] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:14.231] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:14.231] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:14.231] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.231] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:14.647] <TB1> INFO: Expecting 2560 events.
[14:11:15.719] <TB1> INFO: 2560 events read in total (355ms).
[14:11:15.719] <TB1> INFO: Test took 1488ms.
[14:11:15.720] <TB1> INFO: The DUT currently contains the following objects:
[14:11:15.720] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:15.720] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:15.720] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:15.720] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:15.720] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.720] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.721] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.135] <TB1> INFO: Expecting 2560 events.
[14:11:17.207] <TB1> INFO: 2560 events read in total (355ms).
[14:11:17.207] <TB1> INFO: Test took 1486ms.
[14:11:17.208] <TB1> INFO: The DUT currently contains the following objects:
[14:11:17.208] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:17.208] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:17.208] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:17.208] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:17.208] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.208] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.623] <TB1> INFO: Expecting 2560 events.
[14:11:18.695] <TB1> INFO: 2560 events read in total (355ms).
[14:11:18.695] <TB1> INFO: Test took 1487ms.
[14:11:18.696] <TB1> INFO: The DUT currently contains the following objects:
[14:11:18.696] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:18.696] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:11:18.696] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:11:18.696] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:18.696] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.696] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.696] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.696] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.696] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.697] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:19.111] <TB1> INFO: Expecting 2560 events.
[14:11:20.183] <TB1> INFO: 2560 events read in total (355ms).
[14:11:20.184] <TB1> INFO: Test took 1487ms.
[14:11:20.189] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:20.602] <TB1> INFO: Expecting 655360 events.
[14:11:37.175] <TB1> INFO: 655360 events read in total (15856ms).
[14:11:37.184] <TB1> INFO: Expecting 655360 events.
[14:11:53.639] <TB1> INFO: 655360 events read in total (15927ms).
[14:11:53.651] <TB1> INFO: Expecting 655360 events.
[14:12:09.789] <TB1> INFO: 655360 events read in total (15610ms).
[14:12:09.804] <TB1> INFO: Expecting 655360 events.
[14:12:25.081] <TB1> INFO: 655360 events read in total (14749ms).
[14:12:25.105] <TB1> INFO: Expecting 655360 events.
[14:12:40.384] <TB1> INFO: 655360 events read in total (14751ms).
[14:12:40.411] <TB1> INFO: Expecting 655360 events.
[14:12:56.965] <TB1> INFO: 655360 events read in total (16026ms).
[14:12:56.992] <TB1> INFO: Expecting 655360 events.
[14:13:13.440] <TB1> INFO: 655360 events read in total (15920ms).
[14:13:13.469] <TB1> INFO: Expecting 655360 events.
[14:13:29.986] <TB1> INFO: 655360 events read in total (15989ms).
[14:13:30.018] <TB1> INFO: Expecting 655360 events.
[14:13:46.436] <TB1> INFO: 655360 events read in total (15889ms).
[14:13:46.474] <TB1> INFO: Expecting 655360 events.
[14:14:02.798] <TB1> INFO: 655360 events read in total (15796ms).
[14:14:02.838] <TB1> INFO: Expecting 655360 events.
[14:14:19.211] <TB1> INFO: 655360 events read in total (15844ms).
[14:14:19.259] <TB1> INFO: Expecting 655360 events.
[14:14:35.663] <TB1> INFO: 655360 events read in total (15875ms).
[14:14:35.710] <TB1> INFO: Expecting 655360 events.
[14:14:52.284] <TB1> INFO: 655360 events read in total (16046ms).
[14:14:52.336] <TB1> INFO: Expecting 655360 events.
[14:15:08.808] <TB1> INFO: 655360 events read in total (15944ms).
[14:15:08.864] <TB1> INFO: Expecting 655360 events.
[14:15:25.258] <TB1> INFO: 655360 events read in total (15866ms).
[14:15:25.320] <TB1> INFO: Expecting 655360 events.
[14:15:41.709] <TB1> INFO: 655360 events read in total (15860ms).
[14:15:41.769] <TB1> INFO: Test took 261580ms.
[14:15:41.850] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:42.159] <TB1> INFO: Expecting 655360 events.
[14:15:58.696] <TB1> INFO: 655360 events read in total (15820ms).
[14:15:58.705] <TB1> INFO: Expecting 655360 events.
[14:16:13.745] <TB1> INFO: 655360 events read in total (14511ms).
[14:16:13.759] <TB1> INFO: Expecting 655360 events.
[14:16:29.486] <TB1> INFO: 655360 events read in total (15199ms).
[14:16:29.503] <TB1> INFO: Expecting 655360 events.
[14:16:45.827] <TB1> INFO: 655360 events read in total (15796ms).
[14:16:45.848] <TB1> INFO: Expecting 655360 events.
[14:17:02.190] <TB1> INFO: 655360 events read in total (15814ms).
[14:17:02.214] <TB1> INFO: Expecting 655360 events.
[14:17:18.532] <TB1> INFO: 655360 events read in total (15790ms).
[14:17:18.558] <TB1> INFO: Expecting 655360 events.
[14:17:34.966] <TB1> INFO: 655360 events read in total (15880ms).
[14:17:35.001] <TB1> INFO: Expecting 655360 events.
[14:17:50.154] <TB1> INFO: 655360 events read in total (14625ms).
[14:17:50.186] <TB1> INFO: Expecting 655360 events.
[14:18:05.470] <TB1> INFO: 655360 events read in total (14756ms).
[14:18:05.508] <TB1> INFO: Expecting 655360 events.
[14:18:21.739] <TB1> INFO: 655360 events read in total (15702ms).
[14:18:21.780] <TB1> INFO: Expecting 655360 events.
[14:18:38.122] <TB1> INFO: 655360 events read in total (15814ms).
[14:18:38.166] <TB1> INFO: Expecting 655360 events.
[14:18:54.604] <TB1> INFO: 655360 events read in total (15910ms).
[14:18:54.650] <TB1> INFO: Expecting 655360 events.
[14:19:11.012] <TB1> INFO: 655360 events read in total (15834ms).
[14:19:11.063] <TB1> INFO: Expecting 655360 events.
[14:19:27.438] <TB1> INFO: 655360 events read in total (15847ms).
[14:19:27.494] <TB1> INFO: Expecting 655360 events.
[14:19:44.064] <TB1> INFO: 655360 events read in total (16041ms).
[14:19:44.130] <TB1> INFO: Expecting 655360 events.
[14:20:00.383] <TB1> INFO: 655360 events read in total (15724ms).
[14:20:00.451] <TB1> INFO: Test took 258601ms.
[14:20:00.661] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.668] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.677] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.685] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.692] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.698] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.705] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.712] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.719] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.726] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.732] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.739] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.746] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.753] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.760] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.767] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:00.824] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:20:00.825] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:20:00.825] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:20:00.825] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:20:00.825] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:20:00.826] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:20:00.826] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:20:00.826] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:20:00.826] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:20:00.827] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:20:00.827] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:20:00.827] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:20:00.827] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:20:00.827] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:20:00.828] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:20:00.828] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:20:01.164] <TB1> INFO: Expecting 41600 events.
[14:20:05.679] <TB1> INFO: 41600 events read in total (3798ms).
[14:20:05.680] <TB1> INFO: Test took 4848ms.
[14:20:06.242] <TB1> INFO: Expecting 41600 events.
[14:20:10.638] <TB1> INFO: 41600 events read in total (3680ms).
[14:20:10.639] <TB1> INFO: Test took 4715ms.
[14:20:11.205] <TB1> INFO: Expecting 41600 events.
[14:20:15.675] <TB1> INFO: 41600 events read in total (3753ms).
[14:20:15.675] <TB1> INFO: Test took 4793ms.
[14:20:15.908] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:16.041] <TB1> INFO: Expecting 2560 events.
[14:20:17.112] <TB1> INFO: 2560 events read in total (354ms).
[14:20:17.112] <TB1> INFO: Test took 1204ms.
[14:20:17.116] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:17.529] <TB1> INFO: Expecting 2560 events.
[14:20:18.602] <TB1> INFO: 2560 events read in total (356ms).
[14:20:18.602] <TB1> INFO: Test took 1487ms.
[14:20:18.605] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:19.019] <TB1> INFO: Expecting 2560 events.
[14:20:20.091] <TB1> INFO: 2560 events read in total (355ms).
[14:20:20.091] <TB1> INFO: Test took 1486ms.
[14:20:20.094] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:20.509] <TB1> INFO: Expecting 2560 events.
[14:20:21.578] <TB1> INFO: 2560 events read in total (352ms).
[14:20:21.579] <TB1> INFO: Test took 1485ms.
[14:20:21.582] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:21.996] <TB1> INFO: Expecting 2560 events.
[14:20:23.066] <TB1> INFO: 2560 events read in total (353ms).
[14:20:23.066] <TB1> INFO: Test took 1484ms.
[14:20:23.069] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:23.483] <TB1> INFO: Expecting 2560 events.
[14:20:24.555] <TB1> INFO: 2560 events read in total (355ms).
[14:20:24.555] <TB1> INFO: Test took 1486ms.
[14:20:24.558] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:24.972] <TB1> INFO: Expecting 2560 events.
[14:20:26.043] <TB1> INFO: 2560 events read in total (354ms).
[14:20:26.043] <TB1> INFO: Test took 1485ms.
[14:20:26.046] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:26.460] <TB1> INFO: Expecting 2560 events.
[14:20:27.532] <TB1> INFO: 2560 events read in total (355ms).
[14:20:27.532] <TB1> INFO: Test took 1486ms.
[14:20:27.535] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:27.949] <TB1> INFO: Expecting 2560 events.
[14:20:29.021] <TB1> INFO: 2560 events read in total (355ms).
[14:20:29.022] <TB1> INFO: Test took 1487ms.
[14:20:29.025] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:29.439] <TB1> INFO: Expecting 2560 events.
[14:20:30.510] <TB1> INFO: 2560 events read in total (354ms).
[14:20:30.511] <TB1> INFO: Test took 1486ms.
[14:20:30.514] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:30.927] <TB1> INFO: Expecting 2560 events.
[14:20:31.998] <TB1> INFO: 2560 events read in total (354ms).
[14:20:31.999] <TB1> INFO: Test took 1485ms.
[14:20:32.004] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:32.414] <TB1> INFO: Expecting 2560 events.
[14:20:33.482] <TB1> INFO: 2560 events read in total (350ms).
[14:20:33.483] <TB1> INFO: Test took 1480ms.
[14:20:33.486] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:33.899] <TB1> INFO: Expecting 2560 events.
[14:20:34.972] <TB1> INFO: 2560 events read in total (356ms).
[14:20:34.972] <TB1> INFO: Test took 1486ms.
[14:20:34.976] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:35.389] <TB1> INFO: Expecting 2560 events.
[14:20:36.462] <TB1> INFO: 2560 events read in total (356ms).
[14:20:36.463] <TB1> INFO: Test took 1488ms.
[14:20:36.466] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:36.879] <TB1> INFO: Expecting 2560 events.
[14:20:37.950] <TB1> INFO: 2560 events read in total (353ms).
[14:20:37.950] <TB1> INFO: Test took 1484ms.
[14:20:37.953] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:38.367] <TB1> INFO: Expecting 2560 events.
[14:20:39.438] <TB1> INFO: 2560 events read in total (354ms).
[14:20:39.439] <TB1> INFO: Test took 1486ms.
[14:20:39.442] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:39.855] <TB1> INFO: Expecting 2560 events.
[14:20:40.926] <TB1> INFO: 2560 events read in total (355ms).
[14:20:40.927] <TB1> INFO: Test took 1486ms.
[14:20:40.930] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:41.344] <TB1> INFO: Expecting 2560 events.
[14:20:42.414] <TB1> INFO: 2560 events read in total (353ms).
[14:20:42.415] <TB1> INFO: Test took 1485ms.
[14:20:42.418] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:42.832] <TB1> INFO: Expecting 2560 events.
[14:20:43.899] <TB1> INFO: 2560 events read in total (350ms).
[14:20:43.900] <TB1> INFO: Test took 1482ms.
[14:20:43.903] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:44.316] <TB1> INFO: Expecting 2560 events.
[14:20:45.387] <TB1> INFO: 2560 events read in total (354ms).
[14:20:45.387] <TB1> INFO: Test took 1484ms.
[14:20:45.390] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:45.804] <TB1> INFO: Expecting 2560 events.
[14:20:46.875] <TB1> INFO: 2560 events read in total (354ms).
[14:20:46.875] <TB1> INFO: Test took 1485ms.
[14:20:46.878] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:47.292] <TB1> INFO: Expecting 2560 events.
[14:20:48.364] <TB1> INFO: 2560 events read in total (355ms).
[14:20:48.364] <TB1> INFO: Test took 1486ms.
[14:20:48.368] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:48.781] <TB1> INFO: Expecting 2560 events.
[14:20:49.853] <TB1> INFO: 2560 events read in total (355ms).
[14:20:49.854] <TB1> INFO: Test took 1487ms.
[14:20:49.857] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:50.271] <TB1> INFO: Expecting 2560 events.
[14:20:51.343] <TB1> INFO: 2560 events read in total (356ms).
[14:20:51.343] <TB1> INFO: Test took 1487ms.
[14:20:51.347] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:51.760] <TB1> INFO: Expecting 2560 events.
[14:20:52.830] <TB1> INFO: 2560 events read in total (353ms).
[14:20:52.831] <TB1> INFO: Test took 1485ms.
[14:20:52.834] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:53.247] <TB1> INFO: Expecting 2560 events.
[14:20:54.318] <TB1> INFO: 2560 events read in total (353ms).
[14:20:54.319] <TB1> INFO: Test took 1485ms.
[14:20:54.322] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:54.735] <TB1> INFO: Expecting 2560 events.
[14:20:55.805] <TB1> INFO: 2560 events read in total (352ms).
[14:20:55.806] <TB1> INFO: Test took 1484ms.
[14:20:55.808] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:56.223] <TB1> INFO: Expecting 2560 events.
[14:20:57.294] <TB1> INFO: 2560 events read in total (354ms).
[14:20:57.295] <TB1> INFO: Test took 1487ms.
[14:20:57.298] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:57.711] <TB1> INFO: Expecting 2560 events.
[14:20:58.782] <TB1> INFO: 2560 events read in total (354ms).
[14:20:58.782] <TB1> INFO: Test took 1485ms.
[14:20:58.786] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:59.199] <TB1> INFO: Expecting 2560 events.
[14:21:00.269] <TB1> INFO: 2560 events read in total (353ms).
[14:21:00.269] <TB1> INFO: Test took 1483ms.
[14:21:00.273] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:00.687] <TB1> INFO: Expecting 2560 events.
[14:21:01.759] <TB1> INFO: 2560 events read in total (356ms).
[14:21:01.759] <TB1> INFO: Test took 1486ms.
[14:21:01.763] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:02.176] <TB1> INFO: Expecting 2560 events.
[14:21:03.247] <TB1> INFO: 2560 events read in total (353ms).
[14:21:03.248] <TB1> INFO: Test took 1486ms.
[14:21:03.926] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 622 seconds
[14:21:03.926] <TB1> INFO: PH scale (per ROC): 82 94 80 77 82 73 71 74 73 93 79 82 83 98 91 81
[14:21:03.926] <TB1> INFO: PH offset (per ROC): 140 148 175 150 160 175 151 174 144 147 144 155 150 122 140 152
[14:21:04.127] <TB1> INFO: ######################################################################
[14:21:04.127] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:21:04.127] <TB1> INFO: ######################################################################
[14:21:04.138] <TB1> INFO: scanning low vcal = 10
[14:21:04.456] <TB1> INFO: Expecting 41600 events.
[14:21:08.086] <TB1> INFO: 41600 events read in total (2913ms).
[14:21:08.086] <TB1> INFO: Test took 3948ms.
[14:21:08.088] <TB1> INFO: scanning low vcal = 20
[14:21:08.503] <TB1> INFO: Expecting 41600 events.
[14:21:12.108] <TB1> INFO: 41600 events read in total (2888ms).
[14:21:12.108] <TB1> INFO: Test took 4020ms.
[14:21:12.111] <TB1> INFO: scanning low vcal = 30
[14:21:12.525] <TB1> INFO: Expecting 41600 events.
[14:21:16.157] <TB1> INFO: 41600 events read in total (2915ms).
[14:21:16.158] <TB1> INFO: Test took 4047ms.
[14:21:16.162] <TB1> INFO: scanning low vcal = 40
[14:21:16.565] <TB1> INFO: Expecting 41600 events.
[14:21:20.774] <TB1> INFO: 41600 events read in total (3491ms).
[14:21:20.775] <TB1> INFO: Test took 4613ms.
[14:21:20.778] <TB1> INFO: scanning low vcal = 50
[14:21:21.127] <TB1> INFO: Expecting 41600 events.
[14:21:25.331] <TB1> INFO: 41600 events read in total (3487ms).
[14:21:25.332] <TB1> INFO: Test took 4554ms.
[14:21:25.335] <TB1> INFO: scanning low vcal = 60
[14:21:25.678] <TB1> INFO: Expecting 41600 events.
[14:21:29.849] <TB1> INFO: 41600 events read in total (3454ms).
[14:21:29.850] <TB1> INFO: Test took 4515ms.
[14:21:29.853] <TB1> INFO: scanning low vcal = 70
[14:21:30.206] <TB1> INFO: Expecting 41600 events.
[14:21:34.389] <TB1> INFO: 41600 events read in total (3466ms).
[14:21:34.389] <TB1> INFO: Test took 4536ms.
[14:21:34.393] <TB1> INFO: scanning low vcal = 80
[14:21:34.730] <TB1> INFO: Expecting 41600 events.
[14:21:38.958] <TB1> INFO: 41600 events read in total (3511ms).
[14:21:38.959] <TB1> INFO: Test took 4566ms.
[14:21:38.963] <TB1> INFO: scanning low vcal = 90
[14:21:39.302] <TB1> INFO: Expecting 41600 events.
[14:21:43.629] <TB1> INFO: 41600 events read in total (3610ms).
[14:21:43.629] <TB1> INFO: Test took 4666ms.
[14:21:43.633] <TB1> INFO: scanning low vcal = 100
[14:21:43.988] <TB1> INFO: Expecting 41600 events.
[14:21:48.183] <TB1> INFO: 41600 events read in total (3478ms).
[14:21:48.184] <TB1> INFO: Test took 4551ms.
[14:21:48.187] <TB1> INFO: scanning low vcal = 110
[14:21:48.534] <TB1> INFO: Expecting 41600 events.
[14:21:52.760] <TB1> INFO: 41600 events read in total (3509ms).
[14:21:52.761] <TB1> INFO: Test took 4574ms.
[14:21:52.764] <TB1> INFO: scanning low vcal = 120
[14:21:53.117] <TB1> INFO: Expecting 41600 events.
[14:21:57.295] <TB1> INFO: 41600 events read in total (3461ms).
[14:21:57.296] <TB1> INFO: Test took 4532ms.
[14:21:57.299] <TB1> INFO: scanning low vcal = 130
[14:21:57.652] <TB1> INFO: Expecting 41600 events.
[14:22:01.888] <TB1> INFO: 41600 events read in total (3519ms).
[14:22:01.889] <TB1> INFO: Test took 4590ms.
[14:22:01.892] <TB1> INFO: scanning low vcal = 140
[14:22:02.243] <TB1> INFO: Expecting 41600 events.
[14:22:06.431] <TB1> INFO: 41600 events read in total (3471ms).
[14:22:06.432] <TB1> INFO: Test took 4540ms.
[14:22:06.435] <TB1> INFO: scanning low vcal = 150
[14:22:06.788] <TB1> INFO: Expecting 41600 events.
[14:22:10.970] <TB1> INFO: 41600 events read in total (3465ms).
[14:22:10.970] <TB1> INFO: Test took 4535ms.
[14:22:10.974] <TB1> INFO: scanning low vcal = 160
[14:22:11.330] <TB1> INFO: Expecting 41600 events.
[14:22:15.537] <TB1> INFO: 41600 events read in total (3489ms).
[14:22:15.537] <TB1> INFO: Test took 4563ms.
[14:22:15.540] <TB1> INFO: scanning low vcal = 170
[14:22:15.894] <TB1> INFO: Expecting 41600 events.
[14:22:20.046] <TB1> INFO: 41600 events read in total (3435ms).
[14:22:20.046] <TB1> INFO: Test took 4506ms.
[14:22:20.051] <TB1> INFO: scanning low vcal = 180
[14:22:20.403] <TB1> INFO: Expecting 41600 events.
[14:22:24.584] <TB1> INFO: 41600 events read in total (3464ms).
[14:22:24.585] <TB1> INFO: Test took 4534ms.
[14:22:24.588] <TB1> INFO: scanning low vcal = 190
[14:22:24.942] <TB1> INFO: Expecting 41600 events.
[14:22:29.169] <TB1> INFO: 41600 events read in total (3510ms).
[14:22:29.170] <TB1> INFO: Test took 4582ms.
[14:22:29.173] <TB1> INFO: scanning low vcal = 200
[14:22:29.513] <TB1> INFO: Expecting 41600 events.
[14:22:33.702] <TB1> INFO: 41600 events read in total (3472ms).
[14:22:33.702] <TB1> INFO: Test took 4529ms.
[14:22:33.706] <TB1> INFO: scanning low vcal = 210
[14:22:34.055] <TB1> INFO: Expecting 41600 events.
[14:22:38.279] <TB1> INFO: 41600 events read in total (3507ms).
[14:22:38.279] <TB1> INFO: Test took 4573ms.
[14:22:38.283] <TB1> INFO: scanning low vcal = 220
[14:22:38.632] <TB1> INFO: Expecting 41600 events.
[14:22:42.878] <TB1> INFO: 41600 events read in total (3529ms).
[14:22:42.879] <TB1> INFO: Test took 4596ms.
[14:22:42.883] <TB1> INFO: scanning low vcal = 230
[14:22:43.213] <TB1> INFO: Expecting 41600 events.
[14:22:47.441] <TB1> INFO: 41600 events read in total (3511ms).
[14:22:47.441] <TB1> INFO: Test took 4558ms.
[14:22:47.445] <TB1> INFO: scanning low vcal = 240
[14:22:47.795] <TB1> INFO: Expecting 41600 events.
[14:22:51.979] <TB1> INFO: 41600 events read in total (3467ms).
[14:22:51.980] <TB1> INFO: Test took 4535ms.
[14:22:51.983] <TB1> INFO: scanning low vcal = 250
[14:22:52.332] <TB1> INFO: Expecting 41600 events.
[14:22:56.579] <TB1> INFO: 41600 events read in total (3530ms).
[14:22:56.580] <TB1> INFO: Test took 4597ms.
[14:22:56.586] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[14:22:56.937] <TB1> INFO: Expecting 41600 events.
[14:23:01.125] <TB1> INFO: 41600 events read in total (3471ms).
[14:23:01.126] <TB1> INFO: Test took 4540ms.
[14:23:01.129] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[14:23:01.480] <TB1> INFO: Expecting 41600 events.
[14:23:05.665] <TB1> INFO: 41600 events read in total (3468ms).
[14:23:05.665] <TB1> INFO: Test took 4536ms.
[14:23:05.669] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[14:23:06.025] <TB1> INFO: Expecting 41600 events.
[14:23:10.227] <TB1> INFO: 41600 events read in total (3485ms).
[14:23:10.227] <TB1> INFO: Test took 4558ms.
[14:23:10.231] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[14:23:10.586] <TB1> INFO: Expecting 41600 events.
[14:23:14.937] <TB1> INFO: 41600 events read in total (3634ms).
[14:23:14.938] <TB1> INFO: Test took 4707ms.
[14:23:14.941] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:23:15.291] <TB1> INFO: Expecting 41600 events.
[14:23:19.470] <TB1> INFO: 41600 events read in total (3462ms).
[14:23:19.470] <TB1> INFO: Test took 4529ms.
[14:23:19.960] <TB1> INFO: PixTestGainPedestal::measure() done
[14:23:52.481] <TB1> INFO: PixTestGainPedestal::fit() done
[14:23:52.481] <TB1> INFO: non-linearity mean: 0.952 0.959 0.954 0.953 0.954 0.956 0.946 0.956 0.953 0.956 0.953 0.956 0.954 0.961 0.956 0.951
[14:23:52.481] <TB1> INFO: non-linearity RMS: 0.006 0.006 0.005 0.006 0.005 0.006 0.007 0.007 0.006 0.005 0.005 0.005 0.006 0.004 0.005 0.006
[14:23:52.481] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:23:52.512] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:23:52.542] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:23:52.568] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:23:52.586] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:23:52.604] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:23:52.622] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:23:52.641] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:23:52.659] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:23:52.677] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:23:52.695] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:23:52.713] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:23:52.731] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:23:52.749] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:23:52.767] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:23:52.785] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:23:52.803] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[14:23:52.809] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:23:52.810] <TB1> INFO: PixTestReadback::doTest() start.
[14:23:52.811] <TB1> INFO: PixTestReadback::RES sent once
[14:24:04.187] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:24:04.187] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:24:04.187] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:24:04.187] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:24:04.187] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:24:04.187] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:24:04.187] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:24:04.187] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:24:04.188] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:24:04.188] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:24:04.188] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:24:04.188] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:24:04.188] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:24:04.188] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:24:04.188] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:24:04.188] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:24:04.240] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:24:04.241] <TB1> INFO: PixTestReadback::RES sent once
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:24:15.523] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:24:15.524] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:24:15.524] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:24:15.524] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:24:15.524] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:24:15.570] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:24:15.571] <TB1> INFO: PixTestReadback::RES sent once
[14:24:24.242] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:24:24.242] <TB1> INFO: Vbg will be calibrated using Vd calibration
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.1calibrated Vbg = 1.19658 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 161.1calibrated Vbg = 1.19401 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 162.7calibrated Vbg = 1.19896 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.1calibrated Vbg = 1.20264 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 161.5calibrated Vbg = 1.20155 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 162.3calibrated Vbg = 1.20127 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 160.9calibrated Vbg = 1.20178 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 163.4calibrated Vbg = 1.19923 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 156.2calibrated Vbg = 1.20629 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 150.9calibrated Vbg = 1.21088 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.7calibrated Vbg = 1.20332 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 159.8calibrated Vbg = 1.20121 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 150calibrated Vbg = 1.19298 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.6calibrated Vbg = 1.1861 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150.3calibrated Vbg = 1.18602 :::*/*/*/*/
[14:24:24.242] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157.2calibrated Vbg = 1.18736 :::*/*/*/*/
[14:24:24.245] <TB1> INFO: PixTestReadback::RES sent once
[14:27:19.809] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C0.dat
[14:27:19.809] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C1.dat
[14:27:19.809] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C2.dat
[14:27:19.809] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C3.dat
[14:27:19.810] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C4.dat
[14:27:19.810] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C5.dat
[14:27:19.810] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C6.dat
[14:27:19.810] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C7.dat
[14:27:19.810] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C8.dat
[14:27:19.810] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C9.dat
[14:27:19.811] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C10.dat
[14:27:19.811] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C11.dat
[14:27:19.811] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C12.dat
[14:27:19.811] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C13.dat
[14:27:19.811] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C14.dat
[14:27:19.811] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2089_FullQualification_2015-08-28_10h45m_1440751527//002_FulltestPxar_m20//readbackCal_C15.dat
[14:27:19.856] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:27:19.857] <TB1> INFO: PixTestReadback::doTest() done
[14:27:19.871] <TB1> INFO: enter test to run
[14:27:19.871] <TB1> INFO: test: exit no parameter change
[14:27:20.433] <TB1> QUIET: Connection to board 153 closed.
[14:27:20.512] <TB1> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master