Test Date: 2015-09-01 10:30
Analysis date: 2016-05-26 03:12
Logfile
LogfileView
[12:27:07.980] <TB1> INFO: *** Welcome to pxar ***
[12:27:07.980] <TB1> INFO: *** Today: 2015/09/01
[12:27:07.980] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C15.dat
[12:27:07.981] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:27:07.981] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//defaultMaskFile.dat
[12:27:07.981] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters_C15.dat
[12:27:08.064] <TB1> INFO: clk: 4
[12:27:08.064] <TB1> INFO: ctr: 4
[12:27:08.064] <TB1> INFO: sda: 19
[12:27:08.064] <TB1> INFO: tin: 9
[12:27:08.064] <TB1> INFO: level: 15
[12:27:08.064] <TB1> INFO: triggerdelay: 0
[12:27:08.064] <TB1> QUIET: Instanciating API for pxar prod-10
[12:27:08.064] <TB1> INFO: Log level: INFO
[12:27:08.071] <TB1> INFO: Found DTB DTB_WXBYFL
[12:27:08.083] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[12:27:08.086] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[12:27:08.089] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[12:27:09.633] <TB1> INFO: DUT info:
[12:27:09.633] <TB1> INFO: The DUT currently contains the following objects:
[12:27:09.633] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:27:09.633] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:27:09.633] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:27:09.633] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:27:09.633] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.633] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.633] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.633] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.633] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.633] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.633] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.633] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.634] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.634] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.634] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.634] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.634] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.634] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.634] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:09.634] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:27:10.035] <TB1> INFO: enter 'restricted' command line mode
[12:27:10.035] <TB1> INFO: enter test to run
[12:27:10.035] <TB1> INFO: test: pretest no parameter change
[12:27:10.035] <TB1> INFO: running: pretest
[12:27:10.046] <TB1> INFO: ######################################################################
[12:27:10.046] <TB1> INFO: PixTestPretest::doTest()
[12:27:10.046] <TB1> INFO: ######################################################################
[12:27:10.048] <TB1> INFO: ----------------------------------------------------------------------
[12:27:10.048] <TB1> INFO: PixTestPretest::programROC()
[12:27:10.048] <TB1> INFO: ----------------------------------------------------------------------
[12:27:28.070] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:27:28.070] <TB1> INFO: IA differences per ROC: 17.7 18.5 19.3 18.5 17.7 17.7 20.9 20.1 19.3 19.3 18.5 19.3 17.7 18.5 20.1 19.3
[12:27:28.164] <TB1> INFO: ----------------------------------------------------------------------
[12:27:28.164] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:27:28.164] <TB1> INFO: ----------------------------------------------------------------------
[12:27:32.761] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[12:27:32.763] <TB1> INFO: ----------------------------------------------------------------------
[12:27:32.763] <TB1> INFO: PixTestPretest::findTiming()
[12:27:32.763] <TB1> INFO: ----------------------------------------------------------------------
[12:27:32.763] <TB1> INFO: PixTestCmd::init()
[12:27:33.390] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!

[12:30:14.010] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:30:14.010] <TB1> INFO: (success/tries = 100/100), width = 4
[12:30:14.014] <TB1> INFO: ----------------------------------------------------------------------
[12:30:14.014] <TB1> INFO: PixTestPretest::findWorkingPixel()
[12:30:14.014] <TB1> INFO: ----------------------------------------------------------------------
[12:30:14.155] <TB1> INFO: Expecting 231680 events.
[12:30:22.965] <TB1> INFO: 231680 events read in total (8092ms).
[12:30:22.969] <TB1> INFO: Test took 8949ms.
[12:30:23.289] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:30:23.338] <TB1> INFO: ----------------------------------------------------------------------
[12:30:23.338] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[12:30:23.338] <TB1> INFO: ----------------------------------------------------------------------
[12:30:23.478] <TB1> INFO: Expecting 231680 events.
[12:30:32.813] <TB1> INFO: 231680 events read in total (8618ms).
[12:30:32.817] <TB1> INFO: Test took 9473ms.
[12:30:33.140] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[12:30:33.140] <TB1> INFO: CalDel: 143 147 171 154 155 176 140 148 143 125 161 144 150 139 149 154
[12:30:33.140] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:30:33.143] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C0.dat
[12:30:33.143] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C1.dat
[12:30:33.143] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C2.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C3.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C4.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C5.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C6.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C7.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C8.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C9.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C10.dat
[12:30:33.144] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C11.dat
[12:30:33.145] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C12.dat
[12:30:33.145] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C13.dat
[12:30:33.145] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C14.dat
[12:30:33.145] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters_C15.dat
[12:30:33.145] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//tbmParameters_C0a.dat
[12:30:33.145] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:30:33.145] <TB1> INFO: PixTestPretest::doTest() done, duration: 203 seconds
[12:30:33.209] <TB1> INFO: enter test to run
[12:30:33.209] <TB1> INFO: test: fulltest no parameter change
[12:30:33.209] <TB1> INFO: running: fulltest
[12:30:33.210] <TB1> INFO: ######################################################################
[12:30:33.210] <TB1> INFO: PixTestFullTest::doTest()
[12:30:33.210] <TB1> INFO: ######################################################################
[12:30:33.211] <TB1> INFO: ######################################################################
[12:30:33.211] <TB1> INFO: PixTestAlive::doTest()
[12:30:33.211] <TB1> INFO: ######################################################################
[12:30:33.213] <TB1> INFO: ----------------------------------------------------------------------
[12:30:33.213] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:30:33.213] <TB1> INFO: ----------------------------------------------------------------------
[12:30:33.539] <TB1> INFO: Expecting 41600 events.
[12:30:37.967] <TB1> INFO: 41600 events read in total (3711ms).
[12:30:37.968] <TB1> INFO: Test took 4753ms.
[12:30:37.974] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:38.282] <TB1> INFO: PixTestAlive::aliveTest() done
[12:30:38.282] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0
[12:30:38.284] <TB1> INFO: ----------------------------------------------------------------------
[12:30:38.284] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:30:38.284] <TB1> INFO: ----------------------------------------------------------------------
[12:30:38.609] <TB1> INFO: Expecting 41600 events.
[12:30:41.781] <TB1> INFO: 41600 events read in total (2455ms).
[12:30:41.782] <TB1> INFO: Test took 3495ms.
[12:30:41.782] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:41.783] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:30:42.110] <TB1> INFO: PixTestAlive::maskTest() done
[12:30:42.110] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:30:42.112] <TB1> INFO: ----------------------------------------------------------------------
[12:30:42.112] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:30:42.112] <TB1> INFO: ----------------------------------------------------------------------
[12:30:42.426] <TB1> INFO: Expecting 41600 events.
[12:30:46.858] <TB1> INFO: 41600 events read in total (3715ms).
[12:30:46.859] <TB1> INFO: Test took 4744ms.
[12:30:46.865] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:47.173] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[12:30:47.173] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:30:47.173] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:30:47.182] <TB1> INFO: ######################################################################
[12:30:47.182] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:30:47.182] <TB1> INFO: ######################################################################
[12:30:47.186] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[12:30:47.198] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:30:47.198] <TB1> INFO: run 1 of 1
[12:30:47.505] <TB1> INFO: Expecting 3120000 events.
[12:31:23.075] <TB1> INFO: 849180 events read in total (34853ms).
[12:31:57.795] <TB1> INFO: 1688185 events read in total (69573ms).
[12:32:30.839] <TB1> INFO: 2541500 events read in total (102617ms).
[12:32:53.049] <TB1> INFO: 3120000 events read in total (124827ms).
[12:32:53.095] <TB1> INFO: Test took 125897ms.
[12:32:53.194] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:16.861] <TB1> INFO: PixTestBBMap::doTest() done, duration: 149 seconds
[12:33:16.861] <TB1> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 1 0 0 1 2 74 11
[12:33:16.861] <TB1> INFO: separation cut (per ROC): 82 85 77 83 68 76 87 72 88 83 71 71 79 74 69 64
[12:33:16.938] <TB1> INFO: ######################################################################
[12:33:16.938] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:33:16.938] <TB1> INFO: ######################################################################
[12:33:16.938] <TB1> INFO: ----------------------------------------------------------------------
[12:33:16.938] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:33:16.938] <TB1> INFO: ----------------------------------------------------------------------
[12:33:16.938] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[12:33:16.947] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[12:33:16.947] <TB1> INFO: run 1 of 1
[12:33:17.258] <TB1> INFO: Expecting 31200000 events.
[12:33:42.252] <TB1> INFO: 921200 events read in total (24277ms).
[12:34:06.293] <TB1> INFO: 1830200 events read in total (48318ms).
[12:34:30.217] <TB1> INFO: 2736050 events read in total (72242ms).
[12:34:54.256] <TB1> INFO: 3643750 events read in total (96281ms).
[12:35:16.356] <TB1> INFO: 4544950 events read in total (118381ms).
[12:35:38.090] <TB1> INFO: 5450550 events read in total (140115ms).
[12:36:00.017] <TB1> INFO: 6351000 events read in total (162042ms).
[12:36:21.835] <TB1> INFO: 7257000 events read in total (183860ms).
[12:36:45.164] <TB1> INFO: 8158250 events read in total (207189ms).
[12:37:09.249] <TB1> INFO: 9061850 events read in total (231274ms).
[12:37:33.330] <TB1> INFO: 9962600 events read in total (255355ms).
[12:37:57.496] <TB1> INFO: 10866550 events read in total (279521ms).
[12:38:21.490] <TB1> INFO: 11766600 events read in total (303515ms).
[12:38:45.529] <TB1> INFO: 12669900 events read in total (327554ms).
[12:39:09.577] <TB1> INFO: 13570750 events read in total (351602ms).
[12:39:33.627] <TB1> INFO: 14473500 events read in total (375652ms).
[12:39:57.660] <TB1> INFO: 15372500 events read in total (399685ms).
[12:40:21.756] <TB1> INFO: 16266450 events read in total (423781ms).
[12:40:45.837] <TB1> INFO: 17158700 events read in total (447862ms).
[12:41:09.894] <TB1> INFO: 18051750 events read in total (471919ms).
[12:41:33.798] <TB1> INFO: 18943150 events read in total (495823ms).
[12:41:57.877] <TB1> INFO: 19834500 events read in total (519902ms).
[12:42:21.851] <TB1> INFO: 20724700 events read in total (543876ms).
[12:42:45.853] <TB1> INFO: 21615700 events read in total (567878ms).
[12:43:09.849] <TB1> INFO: 22506300 events read in total (591874ms).
[12:43:33.997] <TB1> INFO: 23396950 events read in total (616023ms).
[12:43:57.932] <TB1> INFO: 24287700 events read in total (639957ms).
[12:44:21.894] <TB1> INFO: 25176400 events read in total (663919ms).
[12:44:45.980] <TB1> INFO: 26067000 events read in total (688005ms).
[12:45:09.924] <TB1> INFO: 26953300 events read in total (711949ms).
[12:45:33.889] <TB1> INFO: 27844350 events read in total (735914ms).
[12:45:57.893] <TB1> INFO: 28731900 events read in total (759918ms).
[12:46:21.641] <TB1> INFO: 29623000 events read in total (783666ms).
[12:46:42.982] <TB1> INFO: 30514150 events read in total (805007ms).
[12:47:01.361] <TB1> INFO: 31200000 events read in total (823386ms).
[12:47:01.394] <TB1> INFO: Test took 824447ms.
[12:47:01.483] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:01.590] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:03.111] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:04.567] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:06.044] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:07.552] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:09.008] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:10.470] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:11.925] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:13.415] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:14.831] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:16.353] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:17.847] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:19.397] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:20.912] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:22.413] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:23.879] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:47:25.492] <TB1> INFO: PixTestScurves::scurves() done
[12:47:25.492] <TB1> INFO: Vcal mean: 86.41 84.07 80.62 76.22 72.40 82.03 83.74 72.93 89.42 87.15 79.43 76.36 83.45 84.34 79.93 75.05
[12:47:25.492] <TB1> INFO: Vcal RMS: 5.24 5.11 4.49 4.72 4.84 4.60 5.20 4.23 5.52 5.82 4.10 4.48 5.60 5.02 5.17 4.20
[12:47:25.493] <TB1> INFO: PixTestScurves::fullTest() done, duration: 848 seconds
[12:47:25.571] <TB1> INFO: ######################################################################
[12:47:25.571] <TB1> INFO: PixTestTrim::doTest()
[12:47:25.571] <TB1> INFO: ######################################################################
[12:47:25.572] <TB1> INFO: ----------------------------------------------------------------------
[12:47:25.572] <TB1> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[12:47:25.572] <TB1> INFO: ----------------------------------------------------------------------
[12:47:25.661] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:47:25.661] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[12:47:25.670] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:47:25.670] <TB1> INFO: run 1 of 1
[12:47:25.980] <TB1> INFO: Expecting 13312000 events.
[12:47:54.366] <TB1> INFO: 1076020 events read in total (27669ms).
[12:48:19.528] <TB1> INFO: 2147820 events read in total (52831ms).
[12:48:47.371] <TB1> INFO: 3216740 events read in total (80674ms).
[12:49:15.062] <TB1> INFO: 4285940 events read in total (108365ms).
[12:49:42.768] <TB1> INFO: 5349500 events read in total (136071ms).
[12:50:10.181] <TB1> INFO: 6409780 events read in total (163484ms).
[12:50:37.959] <TB1> INFO: 7474820 events read in total (191262ms).
[12:51:05.568] <TB1> INFO: 8544360 events read in total (218871ms).
[12:51:33.352] <TB1> INFO: 9614680 events read in total (246655ms).
[12:52:00.995] <TB1> INFO: 10685220 events read in total (274298ms).
[12:52:27.810] <TB1> INFO: 11753820 events read in total (301113ms).
[12:52:54.954] <TB1> INFO: 12823960 events read in total (328257ms).
[12:53:07.819] <TB1> INFO: 13312000 events read in total (341122ms).
[12:53:07.848] <TB1> INFO: Test took 342179ms.
[12:53:07.900] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:26.934] <TB1> INFO: ROC 0 VthrComp = 90
[12:53:26.934] <TB1> INFO: ROC 1 VthrComp = 91
[12:53:26.934] <TB1> INFO: ROC 2 VthrComp = 88
[12:53:26.934] <TB1> INFO: ROC 3 VthrComp = 82
[12:53:26.934] <TB1> INFO: ROC 4 VthrComp = 77
[12:53:26.935] <TB1> INFO: ROC 5 VthrComp = 84
[12:53:26.935] <TB1> INFO: ROC 6 VthrComp = 88
[12:53:26.935] <TB1> INFO: ROC 7 VthrComp = 80
[12:53:26.935] <TB1> INFO: ROC 8 VthrComp = 96
[12:53:26.935] <TB1> INFO: ROC 9 VthrComp = 90
[12:53:26.935] <TB1> INFO: ROC 10 VthrComp = 86
[12:53:26.935] <TB1> INFO: ROC 11 VthrComp = 82
[12:53:26.935] <TB1> INFO: ROC 12 VthrComp = 86
[12:53:26.936] <TB1> INFO: ROC 13 VthrComp = 89
[12:53:26.936] <TB1> INFO: ROC 14 VthrComp = 87
[12:53:26.936] <TB1> INFO: ROC 15 VthrComp = 79
[12:53:26.936] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:53:26.936] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[12:53:26.947] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:53:26.947] <TB1> INFO: run 1 of 1
[12:53:27.264] <TB1> INFO: Expecting 13312000 events.
[12:53:53.070] <TB1> INFO: 779280 events read in total (25090ms).
[12:54:17.981] <TB1> INFO: 1555100 events read in total (50001ms).
[12:54:42.123] <TB1> INFO: 2330260 events read in total (74143ms).
[12:55:05.930] <TB1> INFO: 3105080 events read in total (97950ms).
[12:55:30.933] <TB1> INFO: 3880080 events read in total (122953ms).
[12:55:55.882] <TB1> INFO: 4655360 events read in total (147902ms).
[12:56:20.923] <TB1> INFO: 5430480 events read in total (172943ms).
[12:56:45.969] <TB1> INFO: 6206640 events read in total (197989ms).
[12:57:11.012] <TB1> INFO: 6978940 events read in total (223032ms).
[12:57:35.806] <TB1> INFO: 7748780 events read in total (247826ms).
[12:58:00.677] <TB1> INFO: 8516960 events read in total (272697ms).
[12:58:25.679] <TB1> INFO: 9284580 events read in total (297699ms).
[12:58:50.539] <TB1> INFO: 10050960 events read in total (322559ms).
[12:59:15.369] <TB1> INFO: 10817380 events read in total (347389ms).
[12:59:40.267] <TB1> INFO: 11582300 events read in total (372287ms).
[13:00:02.526] <TB1> INFO: 12347320 events read in total (394546ms).
[13:00:27.455] <TB1> INFO: 13113500 events read in total (419475ms).
[13:00:34.225] <TB1> INFO: 13312000 events read in total (426245ms).
[13:00:34.273] <TB1> INFO: Test took 427326ms.
[13:00:34.432] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:58.238] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.7109 for pixel 11/67 mean/min/max = 45.6438/32.4815/58.8061
[13:00:58.238] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 57.8751 for pixel 2/79 mean/min/max = 44.8505/31.6399/58.0612
[13:00:58.239] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.3948 for pixel 51/1 mean/min/max = 45.0683/32.7256/57.411
[13:00:58.239] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 57.3924 for pixel 11/0 mean/min/max = 44.557/31.6849/57.4291
[13:00:58.239] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 57.9847 for pixel 12/0 mean/min/max = 46.1907/34.3446/58.0368
[13:00:58.240] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 57.7643 for pixel 20/14 mean/min/max = 45.2013/32.2133/58.1894
[13:00:58.240] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 60.4344 for pixel 0/70 mean/min/max = 46.2532/32.0299/60.4764
[13:00:58.240] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 55.208 for pixel 51/1 mean/min/max = 43.8415/32.3667/55.3164
[13:00:58.240] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 58.8073 for pixel 18/4 mean/min/max = 45.4223/31.9165/58.9281
[13:00:58.241] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 61.8637 for pixel 0/25 mean/min/max = 46.8877/31.7705/62.005
[13:00:58.241] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 56.1945 for pixel 0/0 mean/min/max = 44.5351/32.4749/56.5953
[13:00:58.241] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 57.2259 for pixel 0/74 mean/min/max = 44.8445/32.3827/57.3063
[13:00:58.241] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.5262 for pixel 2/39 mean/min/max = 46.7275/31.8557/61.5993
[13:00:58.242] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 58.883 for pixel 16/79 mean/min/max = 45.6341/32.3738/58.8944
[13:00:58.242] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 57.9379 for pixel 15/75 mean/min/max = 44.4506/30.8132/58.0881
[13:00:58.242] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.4153 for pixel 33/40 mean/min/max = 46.8866/35.2856/58.4877
[13:00:58.242] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:00:58.375] <TB1> INFO: Expecting 1029120 events.
[13:01:22.386] <TB1> INFO: 1029120 events read in total (23294ms).
[13:01:22.391] <TB1> INFO: Expecting 1029120 events.
[13:01:46.179] <TB1> INFO: 1029120 events read in total (23247ms).
[13:01:46.186] <TB1> INFO: Expecting 1029120 events.
[13:02:09.970] <TB1> INFO: 1029120 events read in total (23254ms).
[13:02:09.979] <TB1> INFO: Expecting 1029120 events.
[13:02:33.894] <TB1> INFO: 1029120 events read in total (23386ms).
[13:02:33.907] <TB1> INFO: Expecting 1029120 events.
[13:02:57.785] <TB1> INFO: 1029120 events read in total (23350ms).
[13:02:57.799] <TB1> INFO: Expecting 1029120 events.
[13:03:19.470] <TB1> INFO: 1029120 events read in total (21141ms).
[13:03:19.485] <TB1> INFO: Expecting 1029120 events.
[13:03:43.435] <TB1> INFO: 1029120 events read in total (23417ms).
[13:03:43.451] <TB1> INFO: Expecting 1029120 events.
[13:04:07.338] <TB1> INFO: 1029120 events read in total (23358ms).
[13:04:07.356] <TB1> INFO: Expecting 1029120 events.
[13:04:31.181] <TB1> INFO: 1029120 events read in total (23296ms).
[13:04:31.202] <TB1> INFO: Expecting 1029120 events.
[13:04:54.871] <TB1> INFO: 1029120 events read in total (23140ms).
[13:04:54.893] <TB1> INFO: Expecting 1029120 events.
[13:05:16.660] <TB1> INFO: 1029120 events read in total (21239ms).
[13:05:16.683] <TB1> INFO: Expecting 1029120 events.
[13:05:38.373] <TB1> INFO: 1029120 events read in total (21151ms).
[13:05:38.398] <TB1> INFO: Expecting 1029120 events.
[13:06:00.508] <TB1> INFO: 1029120 events read in total (21575ms).
[13:06:00.535] <TB1> INFO: Expecting 1029120 events.
[13:06:22.792] <TB1> INFO: 1029120 events read in total (21727ms).
[13:06:22.837] <TB1> INFO: Expecting 1029120 events.
[13:06:46.442] <TB1> INFO: 1029120 events read in total (23078ms).
[13:06:46.478] <TB1> INFO: Expecting 1029120 events.
[13:07:10.247] <TB1> INFO: 1029120 events read in total (23240ms).
[13:07:10.281] <TB1> INFO: Test took 372039ms.
[13:07:11.288] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:07:11.297] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:07:11.297] <TB1> INFO: run 1 of 1
[13:07:11.620] <TB1> INFO: Expecting 16640000 events.
[13:07:36.719] <TB1> INFO: 725080 events read in total (24382ms).
[13:08:01.166] <TB1> INFO: 1446800 events read in total (48829ms).
[13:08:25.453] <TB1> INFO: 2169040 events read in total (73116ms).
[13:08:49.848] <TB1> INFO: 2891060 events read in total (97511ms).
[13:09:14.196] <TB1> INFO: 3612400 events read in total (121859ms).
[13:09:38.624] <TB1> INFO: 4334420 events read in total (146287ms).
[13:10:03.055] <TB1> INFO: 5055980 events read in total (170718ms).
[13:10:27.697] <TB1> INFO: 5778940 events read in total (195360ms).
[13:10:52.219] <TB1> INFO: 6501260 events read in total (219882ms).
[13:11:16.579] <TB1> INFO: 7223020 events read in total (244242ms).
[13:11:41.065] <TB1> INFO: 7945920 events read in total (268728ms).
[13:12:05.353] <TB1> INFO: 8665820 events read in total (293016ms).
[13:12:29.545] <TB1> INFO: 9383320 events read in total (317208ms).
[13:12:54.022] <TB1> INFO: 10100060 events read in total (341685ms).
[13:13:18.330] <TB1> INFO: 10815320 events read in total (365993ms).
[13:13:42.797] <TB1> INFO: 11530760 events read in total (390460ms).
[13:14:07.270] <TB1> INFO: 12245860 events read in total (414933ms).
[13:14:31.625] <TB1> INFO: 12959480 events read in total (439288ms).
[13:14:55.861] <TB1> INFO: 13673440 events read in total (463524ms).
[13:15:20.063] <TB1> INFO: 14386300 events read in total (487726ms).
[13:15:44.358] <TB1> INFO: 15100000 events read in total (512021ms).
[13:16:06.071] <TB1> INFO: 15812920 events read in total (533734ms).
[13:16:30.496] <TB1> INFO: 16526940 events read in total (558159ms).
[13:16:34.766] <TB1> INFO: 16640000 events read in total (562429ms).
[13:16:34.827] <TB1> INFO: Test took 563530ms.
[13:16:35.037] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:59.661] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.021357 .. 84.050227
[13:16:59.737] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 94 (-1/-1) hits flags = 16 (plus default)
[13:16:59.746] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:16:59.746] <TB1> INFO: run 1 of 1
[13:17:00.052] <TB1> INFO: Expecting 7904000 events.
[13:17:26.207] <TB1> INFO: 811780 events read in total (25438ms).
[13:17:51.628] <TB1> INFO: 1624300 events read in total (50859ms).
[13:18:17.208] <TB1> INFO: 2437780 events read in total (76439ms).
[13:18:42.659] <TB1> INFO: 3250720 events read in total (101890ms).
[13:19:08.197] <TB1> INFO: 4063800 events read in total (127428ms).
[13:19:33.349] <TB1> INFO: 4876040 events read in total (152580ms).
[13:19:58.705] <TB1> INFO: 5686040 events read in total (177936ms).
[13:20:23.979] <TB1> INFO: 6494160 events read in total (203210ms).
[13:20:49.289] <TB1> INFO: 7301320 events read in total (228520ms).
[13:21:08.260] <TB1> INFO: 7904000 events read in total (247491ms).
[13:21:08.283] <TB1> INFO: Test took 248537ms.
[13:21:08.357] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:26.202] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 14.917146 .. 68.675992
[13:21:26.277] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 4 .. 78 (-1/-1) hits flags = 16 (plus default)
[13:21:26.286] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:21:26.286] <TB1> INFO: run 1 of 1
[13:21:26.590] <TB1> INFO: Expecting 6240000 events.
[13:21:52.705] <TB1> INFO: 836180 events read in total (25398ms).
[13:22:18.306] <TB1> INFO: 1672100 events read in total (50999ms).
[13:22:43.748] <TB1> INFO: 2507900 events read in total (76441ms).
[13:23:09.377] <TB1> INFO: 3343920 events read in total (102070ms).
[13:23:34.881] <TB1> INFO: 4178740 events read in total (127574ms).
[13:24:00.366] <TB1> INFO: 5012820 events read in total (153059ms).
[13:24:25.940] <TB1> INFO: 5846260 events read in total (178633ms).
[13:24:38.318] <TB1> INFO: 6240000 events read in total (191011ms).
[13:24:38.336] <TB1> INFO: Test took 192050ms.
[13:24:38.393] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:54.070] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 19.196361 .. 60.972721
[13:24:54.145] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 9 .. 70 (-1/-1) hits flags = 16 (plus default)
[13:24:54.154] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:24:54.154] <TB1> INFO: run 1 of 1
[13:24:54.460] <TB1> INFO: Expecting 5158400 events.
[13:25:20.690] <TB1> INFO: 840340 events read in total (25514ms).
[13:25:46.371] <TB1> INFO: 1680880 events read in total (51195ms).
[13:26:11.837] <TB1> INFO: 2521240 events read in total (76661ms).
[13:26:37.572] <TB1> INFO: 3361180 events read in total (102396ms).
[13:27:03.207] <TB1> INFO: 4200300 events read in total (128031ms).
[13:27:28.690] <TB1> INFO: 5038420 events read in total (153514ms).
[13:27:32.750] <TB1> INFO: 5158400 events read in total (157574ms).
[13:27:32.765] <TB1> INFO: Test took 158611ms.
[13:27:32.812] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:47.997] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 21.281715 .. 60.155887
[13:27:48.077] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 11 .. 70 (-1/-1) hits flags = 16 (plus default)
[13:27:48.086] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:27:48.086] <TB1> INFO: run 1 of 1
[13:27:48.399] <TB1> INFO: Expecting 4992000 events.
[13:28:13.638] <TB1> INFO: 830240 events read in total (24522ms).
[13:28:36.635] <TB1> INFO: 1660620 events read in total (47519ms).
[13:29:02.344] <TB1> INFO: 2490900 events read in total (73228ms).
[13:29:27.943] <TB1> INFO: 3321080 events read in total (98827ms).
[13:29:53.674] <TB1> INFO: 4150600 events read in total (124558ms).
[13:30:19.132] <TB1> INFO: 4979780 events read in total (150016ms).
[13:30:19.990] <TB1> INFO: 4992000 events read in total (150874ms).
[13:30:20.007] <TB1> INFO: Test took 151921ms.
[13:30:20.053] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:35.950] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:30:35.950] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:30:35.959] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:30:35.959] <TB1> INFO: run 1 of 1
[13:30:36.276] <TB1> INFO: Expecting 3411200 events.
[13:31:01.871] <TB1> INFO: 879620 events read in total (24878ms).
[13:31:27.923] <TB1> INFO: 1758880 events read in total (50930ms).
[13:31:54.174] <TB1> INFO: 2637680 events read in total (77181ms).
[13:32:17.409] <TB1> INFO: 3411200 events read in total (100416ms).
[13:32:17.426] <TB1> INFO: Test took 101468ms.
[13:32:17.459] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:30.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:32:30.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:32:30.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:32:30.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:32:30.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:32:30.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:32:30.319] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:32:30.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:32:30.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:32:30.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:32:30.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:32:30.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:32:30.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:32:30.320] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:32:30.321] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:32:30.321] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:32:30.321] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:32:30.329] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:32:30.335] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:32:30.342] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:32:30.348] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:32:30.354] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:32:30.360] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:32:30.366] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:32:30.373] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:32:30.379] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:32:30.386] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:32:30.392] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:32:30.397] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:32:30.404] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:32:30.410] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:32:30.416] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:32:30.422] <TB1> INFO: PixTestTrim::trimTest() done
[13:32:30.422] <TB1> INFO: vtrim: 96 89 84 100 92 98 108 81 92 102 79 85 101 88 99 86
[13:32:30.422] <TB1> INFO: vthrcomp: 90 91 88 82 77 84 88 80 96 90 86 82 86 89 87 79
[13:32:30.422] <TB1> INFO: vcal mean: 35.00 34.98 35.00 34.95 35.02 34.99 34.99 35.00 35.00 35.00 34.99 34.98 34.96 34.96 34.92 35.06
[13:32:30.422] <TB1> INFO: vcal RMS: 0.72 0.68 0.65 0.71 0.65 0.72 0.71 0.60 0.72 0.76 0.65 0.64 0.82 0.67 1.07 0.66
[13:32:30.422] <TB1> INFO: bits mean: 9.19 9.06 9.01 9.73 8.72 9.36 9.02 9.21 9.21 8.37 9.02 8.96 9.24 8.76 9.92 8.15
[13:32:30.422] <TB1> INFO: bits RMS: 2.75 2.97 2.82 2.69 2.64 2.73 2.85 2.82 2.89 3.15 2.90 2.98 2.77 2.92 2.68 2.68
[13:32:30.431] <TB1> INFO: ----------------------------------------------------------------------
[13:32:30.431] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:32:30.431] <TB1> INFO: ----------------------------------------------------------------------
[13:32:30.435] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:32:30.447] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:32:30.447] <TB1> INFO: run 1 of 1
[13:32:30.762] <TB1> INFO: Expecting 8320000 events.
[13:32:59.841] <TB1> INFO: 903270 events read in total (28362ms).
[13:33:29.009] <TB1> INFO: 1799160 events read in total (57530ms).
[13:33:58.148] <TB1> INFO: 2693340 events read in total (86669ms).
[13:34:27.341] <TB1> INFO: 3586700 events read in total (115862ms).
[13:34:55.361] <TB1> INFO: 4475780 events read in total (143882ms).
[13:35:22.675] <TB1> INFO: 5360990 events read in total (171196ms).
[13:35:49.562] <TB1> INFO: 6245730 events read in total (198083ms).
[13:36:16.601] <TB1> INFO: 7129570 events read in total (225122ms).
[13:36:44.586] <TB1> INFO: 8014650 events read in total (253107ms).
[13:36:54.019] <TB1> INFO: 8320000 events read in total (262540ms).
[13:36:54.058] <TB1> INFO: Test took 263611ms.
[13:36:54.178] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:20.768] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 154 (-1/-1) hits flags = 16 (plus default)
[13:37:20.779] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:37:20.779] <TB1> INFO: run 1 of 1
[13:37:21.099] <TB1> INFO: Expecting 6448000 events.
[13:37:51.112] <TB1> INFO: 962580 events read in total (29296ms).
[13:38:21.132] <TB1> INFO: 1916690 events read in total (59316ms).
[13:38:51.010] <TB1> INFO: 2867850 events read in total (89194ms).
[13:39:20.732] <TB1> INFO: 3810840 events read in total (118916ms).
[13:39:50.090] <TB1> INFO: 4750010 events read in total (148274ms).
[13:40:19.890] <TB1> INFO: 5687880 events read in total (178075ms).
[13:40:44.068] <TB1> INFO: 6448000 events read in total (202252ms).
[13:40:44.095] <TB1> INFO: Test took 203316ms.
[13:40:44.171] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:06.899] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 142 (-1/-1) hits flags = 16 (plus default)
[13:41:06.908] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:41:06.908] <TB1> INFO: run 1 of 1
[13:41:07.213] <TB1> INFO: Expecting 5948800 events.
[13:41:36.489] <TB1> INFO: 999320 events read in total (28559ms).
[13:42:05.886] <TB1> INFO: 1988450 events read in total (57956ms).
[13:42:36.478] <TB1> INFO: 2974200 events read in total (88548ms).
[13:43:07.006] <TB1> INFO: 3947080 events read in total (119076ms).
[13:43:37.517] <TB1> INFO: 4919790 events read in total (149587ms).
[13:44:07.999] <TB1> INFO: 5894180 events read in total (180069ms).
[13:44:09.976] <TB1> INFO: 5948800 events read in total (182046ms).
[13:44:10.003] <TB1> INFO: Test took 183095ms.
[13:44:10.067] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:31.838] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 141 (-1/-1) hits flags = 16 (plus default)
[13:44:31.848] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:44:31.848] <TB1> INFO: run 1 of 1
[13:44:32.157] <TB1> INFO: Expecting 5907200 events.
[13:45:03.629] <TB1> INFO: 1002270 events read in total (30755ms).
[13:45:33.468] <TB1> INFO: 1994200 events read in total (60594ms).
[13:46:02.639] <TB1> INFO: 2982560 events read in total (89765ms).
[13:46:33.080] <TB1> INFO: 3957830 events read in total (120206ms).
[13:47:03.554] <TB1> INFO: 4933040 events read in total (150680ms).
[13:47:34.026] <TB1> INFO: 5907200 events read in total (181152ms).
[13:47:34.053] <TB1> INFO: Test took 182205ms.
[13:47:34.115] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:55.439] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 138 (-1/-1) hits flags = 16 (plus default)
[13:47:55.448] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:47:55.448] <TB1> INFO: run 1 of 1
[13:47:55.751] <TB1> INFO: Expecting 5782400 events.
[13:48:27.370] <TB1> INFO: 1013020 events read in total (30902ms).
[13:48:57.981] <TB1> INFO: 2015050 events read in total (61513ms).
[13:49:26.397] <TB1> INFO: 3011020 events read in total (89930ms).
[13:49:56.513] <TB1> INFO: 3996010 events read in total (120045ms).
[13:50:27.106] <TB1> INFO: 4979970 events read in total (150638ms).
[13:50:52.108] <TB1> INFO: 5782400 events read in total (175640ms).
[13:50:52.132] <TB1> INFO: Test took 176684ms.
[13:50:52.190] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:13.247] <TB1> INFO: PixTestTrim::trimBitTest() done
[13:51:13.249] <TB1> INFO: PixTestTrim::doTest() done, duration: 3827 seconds
[13:51:13.952] <TB1> INFO: ######################################################################
[13:51:13.952] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:51:13.952] <TB1> INFO: ######################################################################
[13:51:14.267] <TB1> INFO: Expecting 41600 events.
[13:51:18.737] <TB1> INFO: 41600 events read in total (3749ms).
[13:51:18.738] <TB1> INFO: Test took 4785ms.
[13:51:18.745] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:19.337] <TB1> INFO: Expecting 41600 events.
[13:51:23.850] <TB1> INFO: 41600 events read in total (3796ms).
[13:51:23.851] <TB1> INFO: Test took 4842ms.
[13:51:23.865] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:24.206] <TB1> INFO: Expecting 41600 events.
[13:51:28.692] <TB1> INFO: 41600 events read in total (3769ms).
[13:51:28.693] <TB1> INFO: Test took 4812ms.
[13:51:28.699] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:28.707] <TB1> INFO: The DUT currently contains the following objects:
[13:51:28.707] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:28.707] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:28.707] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:28.707] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:28.707] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:28.707] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:29.051] <TB1> INFO: Expecting 2560 events.
[13:51:30.122] <TB1> INFO: 2560 events read in total (355ms).
[13:51:30.122] <TB1> INFO: Test took 1415ms.
[13:51:30.123] <TB1> INFO: The DUT currently contains the following objects:
[13:51:30.123] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:30.123] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:30.123] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:30.123] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:30.123] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.123] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.123] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.123] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.123] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.123] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.123] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.124] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:30.539] <TB1> INFO: Expecting 2560 events.
[13:51:31.613] <TB1> INFO: 2560 events read in total (357ms).
[13:51:31.613] <TB1> INFO: Test took 1489ms.
[13:51:31.614] <TB1> INFO: The DUT currently contains the following objects:
[13:51:31.614] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:31.614] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:31.614] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:31.614] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:31.614] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.614] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.615] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.615] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.615] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.615] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.615] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:31.615] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:32.029] <TB1> INFO: Expecting 2560 events.
[13:51:33.099] <TB1> INFO: 2560 events read in total (353ms).
[13:51:33.099] <TB1> INFO: Test took 1484ms.
[13:51:33.100] <TB1> INFO: The DUT currently contains the following objects:
[13:51:33.100] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:33.100] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:33.100] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:33.100] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:33.100] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.100] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:33.515] <TB1> INFO: Expecting 2560 events.
[13:51:34.588] <TB1> INFO: 2560 events read in total (356ms).
[13:51:34.589] <TB1> INFO: Test took 1488ms.
[13:51:34.589] <TB1> INFO: The DUT currently contains the following objects:
[13:51:34.589] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:34.589] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:34.589] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:34.589] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:34.589] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.589] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.589] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.589] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:34.590] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:35.004] <TB1> INFO: Expecting 2560 events.
[13:51:36.075] <TB1> INFO: 2560 events read in total (354ms).
[13:51:36.075] <TB1> INFO: Test took 1485ms.
[13:51:36.076] <TB1> INFO: The DUT currently contains the following objects:
[13:51:36.076] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:36.076] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:36.076] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:36.076] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:36.076] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.076] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.076] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.076] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.076] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.076] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.077] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:36.491] <TB1> INFO: Expecting 2560 events.
[13:51:37.562] <TB1> INFO: 2560 events read in total (354ms).
[13:51:37.563] <TB1> INFO: Test took 1486ms.
[13:51:37.563] <TB1> INFO: The DUT currently contains the following objects:
[13:51:37.563] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:37.563] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:37.563] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:37.563] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:37.563] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.563] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.563] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.564] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:37.978] <TB1> INFO: Expecting 2560 events.
[13:51:39.050] <TB1> INFO: 2560 events read in total (354ms).
[13:51:39.051] <TB1> INFO: Test took 1487ms.
[13:51:39.051] <TB1> INFO: The DUT currently contains the following objects:
[13:51:39.051] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:39.051] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:39.051] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:39.051] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:39.052] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.052] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:39.466] <TB1> INFO: Expecting 2560 events.
[13:51:40.540] <TB1> INFO: 2560 events read in total (357ms).
[13:51:40.540] <TB1> INFO: Test took 1488ms.
[13:51:40.541] <TB1> INFO: The DUT currently contains the following objects:
[13:51:40.541] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:40.541] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:40.541] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:40.541] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:40.541] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.541] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.541] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.541] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.541] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.541] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.541] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.541] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.541] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.542] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.542] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.542] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.542] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.542] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.542] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.542] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:40.956] <TB1> INFO: Expecting 2560 events.
[13:51:42.042] <TB1> INFO: 2560 events read in total (369ms).
[13:51:42.043] <TB1> INFO: Test took 1501ms.
[13:51:42.043] <TB1> INFO: The DUT currently contains the following objects:
[13:51:42.044] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:42.044] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:42.044] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:42.044] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:42.044] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.044] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:42.458] <TB1> INFO: Expecting 2560 events.
[13:51:43.531] <TB1> INFO: 2560 events read in total (356ms).
[13:51:43.531] <TB1> INFO: Test took 1487ms.
[13:51:43.532] <TB1> INFO: The DUT currently contains the following objects:
[13:51:43.532] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:43.532] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:43.532] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:43.532] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:43.532] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.532] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.533] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.533] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:43.947] <TB1> INFO: Expecting 2560 events.
[13:51:45.020] <TB1> INFO: 2560 events read in total (356ms).
[13:51:45.020] <TB1> INFO: Test took 1487ms.
[13:51:45.021] <TB1> INFO: The DUT currently contains the following objects:
[13:51:45.021] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:45.021] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:45.021] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:45.021] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:45.021] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.021] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.022] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.022] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.022] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.022] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:45.436] <TB1> INFO: Expecting 2560 events.
[13:51:46.509] <TB1> INFO: 2560 events read in total (356ms).
[13:51:46.509] <TB1> INFO: Test took 1487ms.
[13:51:46.510] <TB1> INFO: The DUT currently contains the following objects:
[13:51:46.510] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:46.510] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:46.510] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:46.510] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:46.510] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.510] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.510] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.510] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.510] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.510] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.510] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.510] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.510] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.511] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.511] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.511] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.511] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.511] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.511] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.511] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:46.925] <TB1> INFO: Expecting 2560 events.
[13:51:47.997] <TB1> INFO: 2560 events read in total (355ms).
[13:51:47.997] <TB1> INFO: Test took 1486ms.
[13:51:47.998] <TB1> INFO: The DUT currently contains the following objects:
[13:51:47.998] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:47.998] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:47.998] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:47.998] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:47.998] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:47.998] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:48.413] <TB1> INFO: Expecting 2560 events.
[13:51:49.483] <TB1> INFO: 2560 events read in total (353ms).
[13:51:49.483] <TB1> INFO: Test took 1485ms.
[13:51:49.484] <TB1> INFO: The DUT currently contains the following objects:
[13:51:49.484] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:49.484] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:49.484] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:49.484] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:49.484] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.484] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.484] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.484] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.484] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.484] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.484] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.485] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:49.899] <TB1> INFO: Expecting 2560 events.
[13:51:50.970] <TB1> INFO: 2560 events read in total (354ms).
[13:51:50.970] <TB1> INFO: Test took 1485ms.
[13:51:50.971] <TB1> INFO: The DUT currently contains the following objects:
[13:51:50.971] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:50.971] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:51:50.971] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:51:50.971] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:50.971] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:50.971] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:51.386] <TB1> INFO: Expecting 2560 events.
[13:51:52.457] <TB1> INFO: 2560 events read in total (354ms).
[13:51:52.458] <TB1> INFO: Test took 1487ms.
[13:51:52.463] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:52.875] <TB1> INFO: Expecting 655360 events.
[13:52:09.612] <TB1> INFO: 655360 events read in total (16020ms).
[13:52:09.622] <TB1> INFO: Expecting 655360 events.
[13:52:26.203] <TB1> INFO: 655360 events read in total (16053ms).
[13:52:26.217] <TB1> INFO: Expecting 655360 events.
[13:52:42.856] <TB1> INFO: 655360 events read in total (16110ms).
[13:52:42.871] <TB1> INFO: Expecting 655360 events.
[13:52:58.429] <TB1> INFO: 655360 events read in total (15029ms).
[13:52:58.451] <TB1> INFO: Expecting 655360 events.
[13:53:13.484] <TB1> INFO: 655360 events read in total (14505ms).
[13:53:13.506] <TB1> INFO: Expecting 655360 events.
[13:53:30.144] <TB1> INFO: 655360 events read in total (16109ms).
[13:53:30.175] <TB1> INFO: Expecting 655360 events.
[13:53:47.004] <TB1> INFO: 655360 events read in total (16300ms).
[13:53:47.034] <TB1> INFO: Expecting 655360 events.
[13:54:03.719] <TB1> INFO: 655360 events read in total (16157ms).
[13:54:03.753] <TB1> INFO: Expecting 655360 events.
[13:54:19.394] <TB1> INFO: 655360 events read in total (15112ms).
[13:54:19.446] <TB1> INFO: Expecting 655360 events.
[13:54:34.868] <TB1> INFO: 655360 events read in total (14894ms).
[13:54:34.926] <TB1> INFO: Expecting 655360 events.
[13:54:51.413] <TB1> INFO: 655360 events read in total (15959ms).
[13:54:51.456] <TB1> INFO: Expecting 655360 events.
[13:55:08.136] <TB1> INFO: 655360 events read in total (16152ms).
[13:55:08.194] <TB1> INFO: Expecting 655360 events.
[13:55:24.696] <TB1> INFO: 655360 events read in total (15974ms).
[13:55:24.756] <TB1> INFO: Expecting 655360 events.
[13:55:41.537] <TB1> INFO: 655360 events read in total (16252ms).
[13:55:41.590] <TB1> INFO: Expecting 655360 events.
[13:55:58.369] <TB1> INFO: 655360 events read in total (16250ms).
[13:55:58.437] <TB1> INFO: Expecting 655360 events.
[13:56:15.190] <TB1> INFO: 655360 events read in total (16225ms).
[13:56:15.250] <TB1> INFO: Test took 262787ms.
[13:56:15.341] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:56:15.648] <TB1> INFO: Expecting 655360 events.
[13:56:32.557] <TB1> INFO: 655360 events read in total (16192ms).
[13:56:32.567] <TB1> INFO: Expecting 655360 events.
[13:56:47.758] <TB1> INFO: 655360 events read in total (14662ms).
[13:56:47.771] <TB1> INFO: Expecting 655360 events.
[13:57:03.522] <TB1> INFO: 655360 events read in total (15222ms).
[13:57:03.540] <TB1> INFO: Expecting 655360 events.
[13:57:20.209] <TB1> INFO: 655360 events read in total (16141ms).
[13:57:20.229] <TB1> INFO: Expecting 655360 events.
[13:57:36.787] <TB1> INFO: 655360 events read in total (16030ms).
[13:57:36.810] <TB1> INFO: Expecting 655360 events.
[13:57:53.625] <TB1> INFO: 655360 events read in total (16284ms).
[13:57:53.658] <TB1> INFO: Expecting 655360 events.
[13:58:10.384] <TB1> INFO: 655360 events read in total (16198ms).
[13:58:10.414] <TB1> INFO: Expecting 655360 events.
[13:58:27.052] <TB1> INFO: 655360 events read in total (16110ms).
[13:58:27.092] <TB1> INFO: Expecting 655360 events.
[13:58:43.680] <TB1> INFO: 655360 events read in total (16060ms).
[13:58:43.716] <TB1> INFO: Expecting 655360 events.
[13:58:58.986] <TB1> INFO: 655360 events read in total (14742ms).
[13:58:59.042] <TB1> INFO: Expecting 655360 events.
[13:59:15.090] <TB1> INFO: 655360 events read in total (15519ms).
[13:59:15.136] <TB1> INFO: Expecting 655360 events.
[13:59:31.720] <TB1> INFO: 655360 events read in total (16055ms).
[13:59:31.775] <TB1> INFO: Expecting 655360 events.
[13:59:48.159] <TB1> INFO: 655360 events read in total (15856ms).
[13:59:48.216] <TB1> INFO: Expecting 655360 events.
[14:00:04.607] <TB1> INFO: 655360 events read in total (15862ms).
[14:00:04.664] <TB1> INFO: Expecting 655360 events.
[14:00:21.250] <TB1> INFO: 655360 events read in total (16057ms).
[14:00:21.311] <TB1> INFO: Expecting 655360 events.
[14:00:37.865] <TB1> INFO: 655360 events read in total (16025ms).
[14:00:37.926] <TB1> INFO: Test took 262585ms.
[14:00:38.132] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.140] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.147] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.154] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.161] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.168] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.176] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.183] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.190] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.197] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.204] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.211] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.218] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:00:38.224] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:00:38.231] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[14:00:38.240] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[14:00:38.248] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.256] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.264] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.271] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:38.327] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:00:38.327] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:00:38.327] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:00:38.327] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:00:38.327] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:00:38.328] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:00:38.328] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:00:38.328] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:00:38.328] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:00:38.328] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:00:38.328] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:00:38.329] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:00:38.329] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:00:38.329] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:00:38.329] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:00:38.329] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:00:38.654] <TB1> INFO: Expecting 41600 events.
[14:00:43.175] <TB1> INFO: 41600 events read in total (3804ms).
[14:00:43.176] <TB1> INFO: Test took 4842ms.
[14:00:43.717] <TB1> INFO: Expecting 41600 events.
[14:00:48.257] <TB1> INFO: 41600 events read in total (3823ms).
[14:00:48.258] <TB1> INFO: Test took 4855ms.
[14:00:48.827] <TB1> INFO: Expecting 41600 events.
[14:00:53.307] <TB1> INFO: 41600 events read in total (3763ms).
[14:00:53.307] <TB1> INFO: Test took 4821ms.
[14:00:53.548] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:53.681] <TB1> INFO: Expecting 2560 events.
[14:00:54.754] <TB1> INFO: 2560 events read in total (355ms).
[14:00:54.755] <TB1> INFO: Test took 1207ms.
[14:00:54.757] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:55.171] <TB1> INFO: Expecting 2560 events.
[14:00:56.243] <TB1> INFO: 2560 events read in total (354ms).
[14:00:56.243] <TB1> INFO: Test took 1486ms.
[14:00:56.246] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:56.660] <TB1> INFO: Expecting 2560 events.
[14:00:57.731] <TB1> INFO: 2560 events read in total (354ms).
[14:00:57.731] <TB1> INFO: Test took 1485ms.
[14:00:57.734] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:58.148] <TB1> INFO: Expecting 2560 events.
[14:00:59.233] <TB1> INFO: 2560 events read in total (368ms).
[14:00:59.234] <TB1> INFO: Test took 1500ms.
[14:00:59.237] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:59.651] <TB1> INFO: Expecting 2560 events.
[14:01:00.722] <TB1> INFO: 2560 events read in total (354ms).
[14:01:00.722] <TB1> INFO: Test took 1485ms.
[14:01:00.726] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:01.139] <TB1> INFO: Expecting 2560 events.
[14:01:02.210] <TB1> INFO: 2560 events read in total (354ms).
[14:01:02.210] <TB1> INFO: Test took 1484ms.
[14:01:02.213] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:02.627] <TB1> INFO: Expecting 2560 events.
[14:01:03.699] <TB1> INFO: 2560 events read in total (354ms).
[14:01:03.700] <TB1> INFO: Test took 1487ms.
[14:01:03.703] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:04.117] <TB1> INFO: Expecting 2560 events.
[14:01:05.190] <TB1> INFO: 2560 events read in total (356ms).
[14:01:05.190] <TB1> INFO: Test took 1487ms.
[14:01:05.193] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:05.607] <TB1> INFO: Expecting 2560 events.
[14:01:06.680] <TB1> INFO: 2560 events read in total (356ms).
[14:01:06.680] <TB1> INFO: Test took 1487ms.
[14:01:06.683] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:07.097] <TB1> INFO: Expecting 2560 events.
[14:01:08.169] <TB1> INFO: 2560 events read in total (354ms).
[14:01:08.169] <TB1> INFO: Test took 1486ms.
[14:01:08.173] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:08.586] <TB1> INFO: Expecting 2560 events.
[14:01:09.658] <TB1> INFO: 2560 events read in total (354ms).
[14:01:09.659] <TB1> INFO: Test took 1486ms.
[14:01:09.662] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:10.075] <TB1> INFO: Expecting 2560 events.
[14:01:11.146] <TB1> INFO: 2560 events read in total (354ms).
[14:01:11.147] <TB1> INFO: Test took 1485ms.
[14:01:11.150] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:11.564] <TB1> INFO: Expecting 2560 events.
[14:01:12.634] <TB1> INFO: 2560 events read in total (353ms).
[14:01:12.635] <TB1> INFO: Test took 1485ms.
[14:01:12.638] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:13.052] <TB1> INFO: Expecting 2560 events.
[14:01:14.126] <TB1> INFO: 2560 events read in total (357ms).
[14:01:14.126] <TB1> INFO: Test took 1488ms.
[14:01:14.129] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:14.543] <TB1> INFO: Expecting 2560 events.
[14:01:15.616] <TB1> INFO: 2560 events read in total (356ms).
[14:01:15.616] <TB1> INFO: Test took 1487ms.
[14:01:15.620] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:16.033] <TB1> INFO: Expecting 2560 events.
[14:01:17.105] <TB1> INFO: 2560 events read in total (355ms).
[14:01:17.105] <TB1> INFO: Test took 1486ms.
[14:01:17.108] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:17.522] <TB1> INFO: Expecting 2560 events.
[14:01:18.593] <TB1> INFO: 2560 events read in total (354ms).
[14:01:18.594] <TB1> INFO: Test took 1486ms.
[14:01:18.597] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:19.010] <TB1> INFO: Expecting 2560 events.
[14:01:20.080] <TB1> INFO: 2560 events read in total (353ms).
[14:01:20.081] <TB1> INFO: Test took 1484ms.
[14:01:20.085] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:20.498] <TB1> INFO: Expecting 2560 events.
[14:01:21.567] <TB1> INFO: 2560 events read in total (352ms).
[14:01:21.568] <TB1> INFO: Test took 1483ms.
[14:01:21.571] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:21.985] <TB1> INFO: Expecting 2560 events.
[14:01:23.057] <TB1> INFO: 2560 events read in total (355ms).
[14:01:23.057] <TB1> INFO: Test took 1486ms.
[14:01:23.060] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:23.473] <TB1> INFO: Expecting 2560 events.
[14:01:24.547] <TB1> INFO: 2560 events read in total (356ms).
[14:01:24.547] <TB1> INFO: Test took 1487ms.
[14:01:24.553] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:24.964] <TB1> INFO: Expecting 2560 events.
[14:01:26.035] <TB1> INFO: 2560 events read in total (354ms).
[14:01:26.036] <TB1> INFO: Test took 1483ms.
[14:01:26.039] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:26.453] <TB1> INFO: Expecting 2560 events.
[14:01:27.524] <TB1> INFO: 2560 events read in total (355ms).
[14:01:27.524] <TB1> INFO: Test took 1485ms.
[14:01:27.527] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:27.941] <TB1> INFO: Expecting 2560 events.
[14:01:29.014] <TB1> INFO: 2560 events read in total (356ms).
[14:01:29.015] <TB1> INFO: Test took 1488ms.
[14:01:29.018] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:29.432] <TB1> INFO: Expecting 2560 events.
[14:01:30.504] <TB1> INFO: 2560 events read in total (355ms).
[14:01:30.504] <TB1> INFO: Test took 1486ms.
[14:01:30.508] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:30.921] <TB1> INFO: Expecting 2560 events.
[14:01:31.992] <TB1> INFO: 2560 events read in total (354ms).
[14:01:31.992] <TB1> INFO: Test took 1484ms.
[14:01:31.996] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:32.409] <TB1> INFO: Expecting 2560 events.
[14:01:33.481] <TB1> INFO: 2560 events read in total (355ms).
[14:01:33.481] <TB1> INFO: Test took 1485ms.
[14:01:33.485] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:33.900] <TB1> INFO: Expecting 2560 events.
[14:01:34.972] <TB1> INFO: 2560 events read in total (355ms).
[14:01:34.972] <TB1> INFO: Test took 1487ms.
[14:01:34.977] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:35.389] <TB1> INFO: Expecting 2560 events.
[14:01:36.459] <TB1> INFO: 2560 events read in total (353ms).
[14:01:36.460] <TB1> INFO: Test took 1483ms.
[14:01:36.464] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:36.876] <TB1> INFO: Expecting 2560 events.
[14:01:37.947] <TB1> INFO: 2560 events read in total (354ms).
[14:01:37.947] <TB1> INFO: Test took 1484ms.
[14:01:37.950] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:38.364] <TB1> INFO: Expecting 2560 events.
[14:01:39.437] <TB1> INFO: 2560 events read in total (355ms).
[14:01:39.437] <TB1> INFO: Test took 1487ms.
[14:01:39.441] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:39.854] <TB1> INFO: Expecting 2560 events.
[14:01:40.927] <TB1> INFO: 2560 events read in total (356ms).
[14:01:40.927] <TB1> INFO: Test took 1487ms.
[14:01:41.610] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 627 seconds
[14:01:41.610] <TB1> INFO: PH scale (per ROC): 83 82 80 89 82 84 85 80 80 94 80 94 84 87 79 80
[14:01:41.610] <TB1> INFO: PH offset (per ROC): 166 152 164 145 146 160 147 148 161 160 153 144 163 159 154 155
[14:01:41.784] <TB1> INFO: ######################################################################
[14:01:41.784] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:01:41.784] <TB1> INFO: ######################################################################
[14:01:41.797] <TB1> INFO: scanning low vcal = 10
[14:01:42.102] <TB1> INFO: Expecting 41600 events.
[14:01:45.721] <TB1> INFO: 41600 events read in total (2902ms).
[14:01:45.721] <TB1> INFO: Test took 3924ms.
[14:01:45.724] <TB1> INFO: scanning low vcal = 20
[14:01:46.138] <TB1> INFO: Expecting 41600 events.
[14:01:49.761] <TB1> INFO: 41600 events read in total (2906ms).
[14:01:49.762] <TB1> INFO: Test took 4038ms.
[14:01:49.764] <TB1> INFO: scanning low vcal = 30
[14:01:50.178] <TB1> INFO: Expecting 41600 events.
[14:01:53.826] <TB1> INFO: 41600 events read in total (2931ms).
[14:01:53.826] <TB1> INFO: Test took 4062ms.
[14:01:53.829] <TB1> INFO: scanning low vcal = 40
[14:01:54.234] <TB1> INFO: Expecting 41600 events.
[14:01:58.492] <TB1> INFO: 41600 events read in total (3541ms).
[14:01:58.493] <TB1> INFO: Test took 4664ms.
[14:01:58.497] <TB1> INFO: scanning low vcal = 50
[14:01:58.849] <TB1> INFO: Expecting 41600 events.
[14:02:03.050] <TB1> INFO: 41600 events read in total (3484ms).
[14:02:03.051] <TB1> INFO: Test took 4554ms.
[14:02:03.055] <TB1> INFO: scanning low vcal = 60
[14:02:03.406] <TB1> INFO: Expecting 41600 events.
[14:02:07.619] <TB1> INFO: 41600 events read in total (3496ms).
[14:02:07.620] <TB1> INFO: Test took 4565ms.
[14:02:07.624] <TB1> INFO: scanning low vcal = 70
[14:02:07.976] <TB1> INFO: Expecting 41600 events.
[14:02:12.218] <TB1> INFO: 41600 events read in total (3526ms).
[14:02:12.218] <TB1> INFO: Test took 4594ms.
[14:02:12.222] <TB1> INFO: scanning low vcal = 80
[14:02:12.574] <TB1> INFO: Expecting 41600 events.
[14:02:16.771] <TB1> INFO: 41600 events read in total (3480ms).
[14:02:16.771] <TB1> INFO: Test took 4549ms.
[14:02:16.776] <TB1> INFO: scanning low vcal = 90
[14:02:17.127] <TB1> INFO: Expecting 41600 events.
[14:02:21.472] <TB1> INFO: 41600 events read in total (3628ms).
[14:02:21.472] <TB1> INFO: Test took 4696ms.
[14:02:21.476] <TB1> INFO: scanning low vcal = 100
[14:02:21.818] <TB1> INFO: Expecting 41600 events.
[14:02:26.035] <TB1> INFO: 41600 events read in total (3500ms).
[14:02:26.036] <TB1> INFO: Test took 4560ms.
[14:02:26.040] <TB1> INFO: scanning low vcal = 110
[14:02:26.389] <TB1> INFO: Expecting 41600 events.
[14:02:30.621] <TB1> INFO: 41600 events read in total (3515ms).
[14:02:30.622] <TB1> INFO: Test took 4582ms.
[14:02:30.625] <TB1> INFO: scanning low vcal = 120
[14:02:30.973] <TB1> INFO: Expecting 41600 events.
[14:02:35.163] <TB1> INFO: 41600 events read in total (3473ms).
[14:02:35.164] <TB1> INFO: Test took 4539ms.
[14:02:35.167] <TB1> INFO: scanning low vcal = 130
[14:02:35.514] <TB1> INFO: Expecting 41600 events.
[14:02:39.724] <TB1> INFO: 41600 events read in total (3493ms).
[14:02:39.725] <TB1> INFO: Test took 4558ms.
[14:02:39.728] <TB1> INFO: scanning low vcal = 140
[14:02:40.079] <TB1> INFO: Expecting 41600 events.
[14:02:44.325] <TB1> INFO: 41600 events read in total (3529ms).
[14:02:44.326] <TB1> INFO: Test took 4598ms.
[14:02:44.329] <TB1> INFO: scanning low vcal = 150
[14:02:44.667] <TB1> INFO: Expecting 41600 events.
[14:02:48.900] <TB1> INFO: 41600 events read in total (3516ms).
[14:02:48.901] <TB1> INFO: Test took 4572ms.
[14:02:48.904] <TB1> INFO: scanning low vcal = 160
[14:02:49.250] <TB1> INFO: Expecting 41600 events.
[14:02:53.429] <TB1> INFO: 41600 events read in total (3461ms).
[14:02:53.430] <TB1> INFO: Test took 4526ms.
[14:02:53.433] <TB1> INFO: scanning low vcal = 170
[14:02:53.787] <TB1> INFO: Expecting 41600 events.
[14:02:57.972] <TB1> INFO: 41600 events read in total (3468ms).
[14:02:57.973] <TB1> INFO: Test took 4540ms.
[14:02:57.978] <TB1> INFO: scanning low vcal = 180
[14:02:58.329] <TB1> INFO: Expecting 41600 events.
[14:03:02.555] <TB1> INFO: 41600 events read in total (3509ms).
[14:03:02.555] <TB1> INFO: Test took 4577ms.
[14:03:02.559] <TB1> INFO: scanning low vcal = 190
[14:03:02.906] <TB1> INFO: Expecting 41600 events.
[14:03:07.163] <TB1> INFO: 41600 events read in total (3537ms).
[14:03:07.163] <TB1> INFO: Test took 4604ms.
[14:03:07.166] <TB1> INFO: scanning low vcal = 200
[14:03:07.520] <TB1> INFO: Expecting 41600 events.
[14:03:11.723] <TB1> INFO: 41600 events read in total (3486ms).
[14:03:11.724] <TB1> INFO: Test took 4558ms.
[14:03:11.727] <TB1> INFO: scanning low vcal = 210
[14:03:12.068] <TB1> INFO: Expecting 41600 events.
[14:03:16.125] <TB1> INFO: 41600 events read in total (3340ms).
[14:03:16.125] <TB1> INFO: Test took 4398ms.
[14:03:16.129] <TB1> INFO: scanning low vcal = 220
[14:03:16.472] <TB1> INFO: Expecting 41600 events.
[14:03:20.528] <TB1> INFO: 41600 events read in total (3339ms).
[14:03:20.529] <TB1> INFO: Test took 4400ms.
[14:03:20.532] <TB1> INFO: scanning low vcal = 230
[14:03:20.888] <TB1> INFO: Expecting 41600 events.
[14:03:24.958] <TB1> INFO: 41600 events read in total (3354ms).
[14:03:24.959] <TB1> INFO: Test took 4427ms.
[14:03:24.962] <TB1> INFO: scanning low vcal = 240
[14:03:25.313] <TB1> INFO: Expecting 41600 events.
[14:03:29.342] <TB1> INFO: 41600 events read in total (3313ms).
[14:03:29.343] <TB1> INFO: Test took 4381ms.
[14:03:29.346] <TB1> INFO: scanning low vcal = 250
[14:03:29.701] <TB1> INFO: Expecting 41600 events.
[14:03:33.758] <TB1> INFO: 41600 events read in total (3340ms).
[14:03:33.759] <TB1> INFO: Test took 4413ms.
[14:03:33.764] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[14:03:34.112] <TB1> INFO: Expecting 41600 events.
[14:03:38.173] <TB1> INFO: 41600 events read in total (3344ms).
[14:03:38.173] <TB1> INFO: Test took 4409ms.
[14:03:38.177] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[14:03:38.526] <TB1> INFO: Expecting 41600 events.
[14:03:42.747] <TB1> INFO: 41600 events read in total (3504ms).
[14:03:42.748] <TB1> INFO: Test took 4571ms.
[14:03:42.752] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[14:03:43.097] <TB1> INFO: Expecting 41600 events.
[14:03:47.381] <TB1> INFO: 41600 events read in total (3567ms).
[14:03:47.381] <TB1> INFO: Test took 4629ms.
[14:03:47.385] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[14:03:47.722] <TB1> INFO: Expecting 41600 events.
[14:03:52.052] <TB1> INFO: 41600 events read in total (3613ms).
[14:03:52.053] <TB1> INFO: Test took 4668ms.
[14:03:52.056] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:03:52.407] <TB1> INFO: Expecting 41600 events.
[14:03:56.641] <TB1> INFO: 41600 events read in total (3517ms).
[14:03:56.642] <TB1> INFO: Test took 4586ms.
[14:03:57.147] <TB1> INFO: PixTestGainPedestal::measure() done
[14:04:31.035] <TB1> INFO: PixTestGainPedestal::fit() done
[14:04:31.035] <TB1> INFO: non-linearity mean: 0.957 0.953 0.957 0.951 0.953 0.958 0.965 0.953 0.960 0.963 0.961 0.963 0.955 0.961 0.952 0.955
[14:04:31.035] <TB1> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.006 0.006 0.005 0.006 0.005 0.006 0.005 0.003 0.005 0.005 0.006 0.006
[14:04:31.035] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:04:31.059] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:04:31.081] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:04:31.104] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:04:31.125] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:04:31.148] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:04:31.171] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:04:31.192] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:04:31.212] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:04:31.232] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:04:31.252] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:04:31.272] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:04:31.292] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:04:31.312] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:04:31.333] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:04:31.356] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:04:31.378] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 169 seconds
[14:04:31.385] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C15.dat
[14:04:31.386] <TB1> INFO: PixTestReadback::doTest() start.
[14:04:31.387] <TB1> INFO: PixTestReadback::RES sent once
[14:04:42.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C0.dat
[14:04:42.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C1.dat
[14:04:42.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C2.dat
[14:04:42.765] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C3.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C4.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C5.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C6.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C7.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C8.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C9.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C10.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C11.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C12.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C13.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C14.dat
[14:04:42.766] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C15.dat
[14:04:42.813] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:04:42.813] <TB1> INFO: PixTestReadback::RES sent once
[14:04:54.135] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C0.dat
[14:04:54.135] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C1.dat
[14:04:54.135] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C2.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C3.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C4.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C5.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C6.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C7.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C8.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C9.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C10.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C11.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C12.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C13.dat
[14:04:54.136] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C14.dat
[14:04:54.137] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C15.dat
[14:04:54.187] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:04:54.187] <TB1> INFO: PixTestReadback::RES sent once
[14:05:02.875] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:05:02.875] <TB1> INFO: Vbg will be calibrated using Vd calibration
[14:05:02.875] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.7calibrated Vbg = 1.17943 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153.2calibrated Vbg = 1.17837 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 153.2calibrated Vbg = 1.17726 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.2calibrated Vbg = 1.18734 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 158calibrated Vbg = 1.19519 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 151.7calibrated Vbg = 1.18815 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 156.1calibrated Vbg = 1.19555 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 149.7calibrated Vbg = 1.19132 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 154.5calibrated Vbg = 1.1908 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152calibrated Vbg = 1.1946 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 143calibrated Vbg = 1.18356 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 147.6calibrated Vbg = 1.18443 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.4calibrated Vbg = 1.17948 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 154.8calibrated Vbg = 1.17258 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.1calibrated Vbg = 1.17603 :::*/*/*/*/
[14:05:02.876] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 152.2calibrated Vbg = 1.17009 :::*/*/*/*/
[14:05:02.880] <TB1> INFO: PixTestReadback::RES sent once
[14:07:58.411] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C0.dat
[14:07:58.411] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C1.dat
[14:07:58.411] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C2.dat
[14:07:58.411] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C3.dat
[14:07:58.411] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C4.dat
[14:07:58.411] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C5.dat
[14:07:58.412] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C6.dat
[14:07:58.412] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C7.dat
[14:07:58.412] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C8.dat
[14:07:58.412] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C9.dat
[14:07:58.412] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C10.dat
[14:07:58.412] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C11.dat
[14:07:58.416] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C12.dat
[14:07:58.416] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C13.dat
[14:07:58.416] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C14.dat
[14:07:58.416] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//002_FulltestPxar_m20//readbackCal_C15.dat
[14:07:58.462] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[14:07:58.464] <TB1> INFO: PixTestReadback::doTest() done
[14:07:58.480] <TB1> INFO: enter test to run
[14:07:58.480] <TB1> INFO: test: exit no parameter change
[14:07:59.112] <TB1> QUIET: Connection to board 153 closed.
[14:07:59.191] <TB1> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master