Test Date: 2015-09-01 10:30
Analysis date: 2016-05-26 03:12
Logfile
LogfileView
[08:38:26.115] <TB1> INFO: *** Welcome to pxar ***
[08:38:26.115] <TB1> INFO: *** Today: 2015/09/01
[08:38:26.115] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C15.dat
[08:38:26.116] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:38:26.116] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//defaultMaskFile.dat
[08:38:26.117] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters_C15.dat
[08:38:26.188] <TB1> INFO: clk: 4
[08:38:26.188] <TB1> INFO: ctr: 4
[08:38:26.188] <TB1> INFO: sda: 19
[08:38:26.188] <TB1> INFO: tin: 9
[08:38:26.188] <TB1> INFO: level: 15
[08:38:26.188] <TB1> INFO: triggerdelay: 0
[08:38:26.188] <TB1> QUIET: Instanciating API for pxar prod-10
[08:38:26.188] <TB1> INFO: Log level: INFO
[08:38:26.195] <TB1> INFO: Found DTB DTB_WXBYFL
[08:38:26.207] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[08:38:26.211] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[08:38:26.213] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[08:38:27.756] <TB1> INFO: DUT info:
[08:38:27.756] <TB1> INFO: The DUT currently contains the following objects:
[08:38:27.756] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[08:38:27.756] <TB1> INFO: TBM Core alpha (0): 7 registers set
[08:38:27.756] <TB1> INFO: TBM Core beta (1): 7 registers set
[08:38:27.756] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:38:27.756] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.756] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.757] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.757] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.757] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.757] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.757] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:27.757] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:28.158] <TB1> INFO: enter 'restricted' command line mode
[08:38:28.158] <TB1> INFO: enter test to run
[08:38:28.158] <TB1> INFO: test: pretest no parameter change
[08:38:28.158] <TB1> INFO: running: pretest
[08:38:28.166] <TB1> INFO: ######################################################################
[08:38:28.166] <TB1> INFO: PixTestPretest::doTest()
[08:38:28.166] <TB1> INFO: ######################################################################
[08:38:28.167] <TB1> INFO: ----------------------------------------------------------------------
[08:38:28.167] <TB1> INFO: PixTestPretest::programROC()
[08:38:28.168] <TB1> INFO: ----------------------------------------------------------------------
[08:38:46.191] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:38:46.191] <TB1> INFO: IA differences per ROC: 18.5 18.5 19.3 18.5 17.7 17.7 20.9 20.1 20.1 19.3 19.3 19.3 17.7 19.3 20.1 19.3
[08:38:46.274] <TB1> INFO: ----------------------------------------------------------------------
[08:38:46.274] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:38:46.274] <TB1> INFO: ----------------------------------------------------------------------
[08:38:51.071] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 380.2 mA = 23.7625 mA/ROC
[08:38:51.074] <TB1> INFO: ----------------------------------------------------------------------
[08:38:51.074] <TB1> INFO: PixTestPretest::findTiming()
[08:38:51.074] <TB1> INFO: ----------------------------------------------------------------------
[08:38:51.074] <TB1> INFO: PixTestCmd::init()
[08:38:51.684] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!

[08:40:38.660] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[08:40:38.660] <TB1> INFO: (success/tries = 100/100), width = 4
[08:40:38.663] <TB1> INFO: ----------------------------------------------------------------------
[08:40:38.663] <TB1> INFO: PixTestPretest::findWorkingPixel()
[08:40:38.663] <TB1> INFO: ----------------------------------------------------------------------
[08:40:38.802] <TB1> INFO: Expecting 231680 events.
[08:40:47.553] <TB1> INFO: 231680 events read in total (8034ms).
[08:40:47.556] <TB1> INFO: Test took 8890ms.
[08:40:47.881] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:40:47.934] <TB1> INFO: ----------------------------------------------------------------------
[08:40:47.934] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[08:40:47.934] <TB1> INFO: ----------------------------------------------------------------------
[08:40:48.074] <TB1> INFO: Expecting 231680 events.
[08:40:57.360] <TB1> INFO: 231680 events read in total (8569ms).
[08:40:57.364] <TB1> INFO: Test took 9424ms.
[08:40:57.709] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[08:40:57.709] <TB1> INFO: CalDel: 143 147 172 154 155 176 140 148 143 125 161 143 150 138 149 154
[08:40:57.709] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:40:57.712] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C0.dat
[08:40:57.713] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C1.dat
[08:40:57.713] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C2.dat
[08:40:57.713] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C3.dat
[08:40:57.714] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C4.dat
[08:40:57.714] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C5.dat
[08:40:57.714] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C6.dat
[08:40:57.714] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C7.dat
[08:40:57.714] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C8.dat
[08:40:57.715] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C9.dat
[08:40:57.715] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C10.dat
[08:40:57.715] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C11.dat
[08:40:57.715] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C12.dat
[08:40:57.716] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C13.dat
[08:40:57.716] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C14.dat
[08:40:57.716] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters_C15.dat
[08:40:57.716] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//tbmParameters_C0a.dat
[08:40:57.716] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:40:57.717] <TB1> INFO: PixTestPretest::doTest() done, duration: 149 seconds
[08:40:57.786] <TB1> INFO: enter test to run
[08:40:57.786] <TB1> INFO: test: fulltest no parameter change
[08:40:57.787] <TB1> INFO: running: fulltest
[08:40:57.787] <TB1> INFO: ######################################################################
[08:40:57.787] <TB1> INFO: PixTestFullTest::doTest()
[08:40:57.787] <TB1> INFO: ######################################################################
[08:40:57.788] <TB1> INFO: ######################################################################
[08:40:57.788] <TB1> INFO: PixTestAlive::doTest()
[08:40:57.788] <TB1> INFO: ######################################################################
[08:40:57.790] <TB1> INFO: ----------------------------------------------------------------------
[08:40:57.790] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:40:57.790] <TB1> INFO: ----------------------------------------------------------------------
[08:40:58.101] <TB1> INFO: Expecting 41600 events.
[08:41:02.546] <TB1> INFO: 41600 events read in total (3727ms).
[08:41:02.547] <TB1> INFO: Test took 4755ms.
[08:41:02.553] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:02.859] <TB1> INFO: PixTestAlive::aliveTest() done
[08:41:02.859] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0
[08:41:02.862] <TB1> INFO: ----------------------------------------------------------------------
[08:41:02.862] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:41:02.862] <TB1> INFO: ----------------------------------------------------------------------
[08:41:03.182] <TB1> INFO: Expecting 41600 events.
[08:41:06.359] <TB1> INFO: 41600 events read in total (2460ms).
[08:41:06.360] <TB1> INFO: Test took 3494ms.
[08:41:06.360] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:06.361] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:41:06.688] <TB1> INFO: PixTestAlive::maskTest() done
[08:41:06.688] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:41:06.690] <TB1> INFO: ----------------------------------------------------------------------
[08:41:06.690] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:41:06.690] <TB1> INFO: ----------------------------------------------------------------------
[08:41:07.011] <TB1> INFO: Expecting 41600 events.
[08:41:11.456] <TB1> INFO: 41600 events read in total (3728ms).
[08:41:11.457] <TB1> INFO: Test took 4765ms.
[08:41:11.469] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:11.765] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[08:41:11.765] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:41:11.765] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[08:41:11.778] <TB1> INFO: ######################################################################
[08:41:11.778] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:41:11.778] <TB1> INFO: ######################################################################
[08:41:11.783] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[08:41:11.795] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[08:41:11.795] <TB1> INFO: run 1 of 1
[08:41:12.115] <TB1> INFO: Expecting 3120000 events.
[08:41:47.711] <TB1> INFO: 849965 events read in total (34878ms).
[08:42:22.244] <TB1> INFO: 1689610 events read in total (69411ms).
[08:42:57.251] <TB1> INFO: 2543985 events read in total (104419ms).
[08:43:21.024] <TB1> INFO: 3120000 events read in total (128191ms).
[08:43:21.074] <TB1> INFO: Test took 129279ms.
[08:43:21.172] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:42.884] <TB1> INFO: PixTestBBMap::doTest() done, duration: 151 seconds
[08:43:42.884] <TB1> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 1 0 0 1 2 80 12
[08:43:42.884] <TB1> INFO: separation cut (per ROC): 81 81 73 83 67 76 87 73 80 83 71 70 78 75 68 64
[08:43:42.974] <TB1> INFO: ######################################################################
[08:43:42.974] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:43:42.974] <TB1> INFO: ######################################################################
[08:43:42.974] <TB1> INFO: ----------------------------------------------------------------------
[08:43:42.974] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[08:43:42.974] <TB1> INFO: ----------------------------------------------------------------------
[08:43:42.974] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[08:43:42.983] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[08:43:42.983] <TB1> INFO: run 1 of 1
[08:43:43.309] <TB1> INFO: Expecting 31200000 events.
[08:44:06.236] <TB1> INFO: 920450 events read in total (22201ms).
[08:44:28.713] <TB1> INFO: 1828800 events read in total (44678ms).
[08:44:52.849] <TB1> INFO: 2734000 events read in total (68814ms).
[08:45:17.287] <TB1> INFO: 3640600 events read in total (93252ms).
[08:45:41.426] <TB1> INFO: 4541600 events read in total (117391ms).
[08:46:05.568] <TB1> INFO: 5444600 events read in total (141533ms).
[08:46:29.835] <TB1> INFO: 6344300 events read in total (165800ms).
[08:46:54.062] <TB1> INFO: 7249450 events read in total (190027ms).
[08:47:18.292] <TB1> INFO: 8149800 events read in total (214257ms).
[08:47:42.509] <TB1> INFO: 9051600 events read in total (238474ms).
[08:48:06.917] <TB1> INFO: 9951050 events read in total (262882ms).
[08:48:31.096] <TB1> INFO: 10854400 events read in total (287061ms).
[08:48:55.299] <TB1> INFO: 11753000 events read in total (311264ms).
[08:49:19.592] <TB1> INFO: 12655300 events read in total (335557ms).
[08:49:43.797] <TB1> INFO: 13554250 events read in total (359762ms).
[08:50:08.009] <TB1> INFO: 14456900 events read in total (383974ms).
[08:50:32.322] <TB1> INFO: 15353950 events read in total (408287ms).
[08:50:56.566] <TB1> INFO: 16247300 events read in total (432531ms).
[08:51:20.983] <TB1> INFO: 17137850 events read in total (456948ms).
[08:51:45.322] <TB1> INFO: 18029700 events read in total (481287ms).
[08:52:09.619] <TB1> INFO: 18920300 events read in total (505584ms).
[08:52:33.802] <TB1> INFO: 19810300 events read in total (529767ms).
[08:52:57.953] <TB1> INFO: 20699150 events read in total (553918ms).
[08:53:22.142] <TB1> INFO: 21589550 events read in total (578107ms).
[08:53:46.377] <TB1> INFO: 22479050 events read in total (602342ms).
[08:54:10.539] <TB1> INFO: 23367550 events read in total (626504ms).
[08:54:34.657] <TB1> INFO: 24258200 events read in total (650622ms).
[08:54:58.847] <TB1> INFO: 25145500 events read in total (674812ms).
[08:55:23.110] <TB1> INFO: 26035350 events read in total (699075ms).
[08:55:47.174] <TB1> INFO: 26920950 events read in total (723139ms).
[08:56:11.417] <TB1> INFO: 27809750 events read in total (747382ms).
[08:56:35.551] <TB1> INFO: 28697700 events read in total (771516ms).
[08:56:59.859] <TB1> INFO: 29587000 events read in total (795825ms).
[08:57:24.105] <TB1> INFO: 30477250 events read in total (820070ms).
[08:57:43.498] <TB1> INFO: 31200000 events read in total (839463ms).
[08:57:43.536] <TB1> INFO: Test took 840553ms.
[08:57:43.632] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:43.780] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:45.495] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:47.249] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:49.108] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:50.711] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:52.281] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:53.733] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:55.146] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:56.648] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:58.140] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:57:59.586] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:58:01.065] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:58:02.636] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:58:04.136] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:58:05.570] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:58:07.051] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:58:08.668] <TB1> INFO: PixTestScurves::scurves() done
[08:58:08.668] <TB1> INFO: Vcal mean: 86.42 81.85 78.47 76.22 72.36 82.04 83.75 72.94 86.19 87.07 79.34 75.08 83.53 84.43 79.87 75.91
[08:58:08.668] <TB1> INFO: Vcal RMS: 5.25 4.88 4.40 4.72 4.86 4.62 5.20 4.22 5.30 5.81 4.07 4.57 5.60 5.04 5.17 4.11
[08:58:08.668] <TB1> INFO: PixTestScurves::fullTest() done, duration: 865 seconds
[08:58:08.744] <TB1> INFO: ######################################################################
[08:58:08.744] <TB1> INFO: PixTestTrim::doTest()
[08:58:08.744] <TB1> INFO: ######################################################################
[08:58:08.746] <TB1> INFO: ----------------------------------------------------------------------
[08:58:08.746] <TB1> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[08:58:08.746] <TB1> INFO: ----------------------------------------------------------------------
[08:58:08.831] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:58:08.831] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[08:58:08.840] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[08:58:08.840] <TB1> INFO: run 1 of 1
[08:58:09.156] <TB1> INFO: Expecting 13312000 events.
[08:58:37.954] <TB1> INFO: 1082600 events read in total (28080ms).
[08:59:05.879] <TB1> INFO: 2161260 events read in total (56005ms).
[08:59:33.155] <TB1> INFO: 3236480 events read in total (83281ms).
[08:59:58.783] <TB1> INFO: 4311720 events read in total (108909ms).
[09:00:26.575] <TB1> INFO: 5380700 events read in total (136701ms).
[09:00:54.416] <TB1> INFO: 6446720 events read in total (164542ms).
[09:01:22.213] <TB1> INFO: 7518260 events read in total (192339ms).
[09:01:50.007] <TB1> INFO: 8593500 events read in total (220133ms).
[09:02:17.932] <TB1> INFO: 9669640 events read in total (248058ms).
[09:02:45.698] <TB1> INFO: 10745100 events read in total (275824ms).
[09:03:13.482] <TB1> INFO: 11820820 events read in total (303608ms).
[09:03:41.291] <TB1> INFO: 12898600 events read in total (331417ms).
[09:03:52.111] <TB1> INFO: 13312000 events read in total (342237ms).
[09:03:52.142] <TB1> INFO: Test took 343301ms.
[09:03:52.194] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:11.276] <TB1> INFO: ROC 0 VthrComp = 90
[09:04:11.276] <TB1> INFO: ROC 1 VthrComp = 87
[09:04:11.276] <TB1> INFO: ROC 2 VthrComp = 85
[09:04:11.276] <TB1> INFO: ROC 3 VthrComp = 82
[09:04:11.277] <TB1> INFO: ROC 4 VthrComp = 77
[09:04:11.277] <TB1> INFO: ROC 5 VthrComp = 84
[09:04:11.277] <TB1> INFO: ROC 6 VthrComp = 88
[09:04:11.277] <TB1> INFO: ROC 7 VthrComp = 80
[09:04:11.277] <TB1> INFO: ROC 8 VthrComp = 92
[09:04:11.277] <TB1> INFO: ROC 9 VthrComp = 90
[09:04:11.277] <TB1> INFO: ROC 10 VthrComp = 86
[09:04:11.277] <TB1> INFO: ROC 11 VthrComp = 81
[09:04:11.278] <TB1> INFO: ROC 12 VthrComp = 86
[09:04:11.278] <TB1> INFO: ROC 13 VthrComp = 89
[09:04:11.278] <TB1> INFO: ROC 14 VthrComp = 86
[09:04:11.278] <TB1> INFO: ROC 15 VthrComp = 80
[09:04:11.278] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:04:11.278] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[09:04:11.288] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:04:11.288] <TB1> INFO: run 1 of 1
[09:04:11.597] <TB1> INFO: Expecting 13312000 events.
[09:04:37.207] <TB1> INFO: 779180 events read in total (24894ms).
[09:05:02.223] <TB1> INFO: 1554860 events read in total (49910ms).
[09:05:24.713] <TB1> INFO: 2329500 events read in total (72400ms).
[09:05:47.797] <TB1> INFO: 3103960 events read in total (95484ms).
[09:06:10.827] <TB1> INFO: 3879100 events read in total (118514ms).
[09:06:33.743] <TB1> INFO: 4654300 events read in total (141430ms).
[09:06:58.326] <TB1> INFO: 5429100 events read in total (166013ms).
[09:07:23.407] <TB1> INFO: 6204700 events read in total (191094ms).
[09:07:48.335] <TB1> INFO: 6977240 events read in total (216022ms).
[09:08:13.201] <TB1> INFO: 7746460 events read in total (240888ms).
[09:08:38.032] <TB1> INFO: 8514380 events read in total (265719ms).
[09:09:02.935] <TB1> INFO: 9281800 events read in total (290622ms).
[09:09:27.727] <TB1> INFO: 10048000 events read in total (315414ms).
[09:09:52.641] <TB1> INFO: 10814380 events read in total (340328ms).
[09:10:17.482] <TB1> INFO: 11579300 events read in total (365169ms).
[09:10:42.498] <TB1> INFO: 12344260 events read in total (390185ms).
[09:11:07.503] <TB1> INFO: 13110360 events read in total (415190ms).
[09:11:14.331] <TB1> INFO: 13312000 events read in total (422018ms).
[09:11:14.383] <TB1> INFO: Test took 423095ms.
[09:11:14.546] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:39.059] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.6305 for pixel 6/1 mean/min/max = 45.6529/32.4982/58.8076
[09:11:39.059] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 58.218 for pixel 14/74 mean/min/max = 45.2011/32.0704/58.3318
[09:11:39.059] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 56.75 for pixel 18/74 mean/min/max = 44.2237/31.6768/56.7705
[09:11:39.060] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 57.3749 for pixel 17/54 mean/min/max = 44.5433/31.6697/57.4169
[09:11:39.060] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 57.8083 for pixel 15/70 mean/min/max = 46.1739/34.3774/57.9704
[09:11:39.060] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.1284 for pixel 1/26 mean/min/max = 45.1846/32.2327/58.1365
[09:11:39.061] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 60.4466 for pixel 21/76 mean/min/max = 46.2212/31.9582/60.4843
[09:11:39.061] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 55.1117 for pixel 18/65 mean/min/max = 43.8668/32.4149/55.3187
[09:11:39.061] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 58.767 for pixel 0/0 mean/min/max = 45.6533/32.2743/59.0322
[09:11:39.061] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 61.6919 for pixel 22/3 mean/min/max = 46.8644/31.8455/61.8834
[09:11:39.062] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 56.3764 for pixel 20/64 mean/min/max = 44.4617/32.434/56.4894
[09:11:39.062] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 57.1016 for pixel 4/71 mean/min/max = 44.8945/32.5628/57.2263
[09:11:39.062] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.4983 for pixel 0/38 mean/min/max = 46.7807/31.9476/61.6139
[09:11:39.062] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 59.0082 for pixel 16/79 mean/min/max = 45.7681/32.5/59.0361
[09:11:39.063] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.591 for pixel 6/13 mean/min/max = 45.1514/31.6783/58.6246
[09:11:39.063] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 56.903 for pixel 5/0 mean/min/max = 45.0239/33.0913/56.9566
[09:11:39.063] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:11:39.196] <TB1> INFO: Expecting 1029120 events.
[09:12:03.223] <TB1> INFO: 1029120 events read in total (23308ms).
[09:12:03.229] <TB1> INFO: Expecting 1029120 events.
[09:12:27.114] <TB1> INFO: 1029120 events read in total (23351ms).
[09:12:27.124] <TB1> INFO: Expecting 1029120 events.
[09:12:50.768] <TB1> INFO: 1029120 events read in total (23109ms).
[09:12:50.779] <TB1> INFO: Expecting 1029120 events.
[09:13:14.765] <TB1> INFO: 1029120 events read in total (23454ms).
[09:13:14.779] <TB1> INFO: Expecting 1029120 events.
[09:13:38.666] <TB1> INFO: 1029120 events read in total (23359ms).
[09:13:38.678] <TB1> INFO: Expecting 1029120 events.
[09:14:02.381] <TB1> INFO: 1029120 events read in total (23173ms).
[09:14:02.396] <TB1> INFO: Expecting 1029120 events.
[09:14:26.288] <TB1> INFO: 1029120 events read in total (23360ms).
[09:14:26.304] <TB1> INFO: Expecting 1029120 events.
[09:14:48.700] <TB1> INFO: 1029120 events read in total (21867ms).
[09:14:48.731] <TB1> INFO: Expecting 1029120 events.
[09:15:12.428] <TB1> INFO: 1029120 events read in total (23169ms).
[09:15:12.449] <TB1> INFO: Expecting 1029120 events.
[09:15:36.439] <TB1> INFO: 1029120 events read in total (23457ms).
[09:15:36.462] <TB1> INFO: Expecting 1029120 events.
[09:16:00.177] <TB1> INFO: 1029120 events read in total (23187ms).
[09:16:00.202] <TB1> INFO: Expecting 1029120 events.
[09:16:24.050] <TB1> INFO: 1029120 events read in total (23316ms).
[09:16:24.081] <TB1> INFO: Expecting 1029120 events.
[09:16:47.632] <TB1> INFO: 1029120 events read in total (23023ms).
[09:16:47.661] <TB1> INFO: Expecting 1029120 events.
[09:17:11.513] <TB1> INFO: 1029120 events read in total (23321ms).
[09:17:11.546] <TB1> INFO: Expecting 1029120 events.
[09:17:35.521] <TB1> INFO: 1029120 events read in total (23447ms).
[09:17:35.559] <TB1> INFO: Expecting 1029120 events.
[09:17:59.261] <TB1> INFO: 1029120 events read in total (23173ms).
[09:17:59.298] <TB1> INFO: Test took 380235ms.
[09:18:00.294] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:18:00.302] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:18:00.302] <TB1> INFO: run 1 of 1
[09:18:00.620] <TB1> INFO: Expecting 16640000 events.
[09:18:25.808] <TB1> INFO: 724840 events read in total (24472ms).
[09:18:50.255] <TB1> INFO: 1446280 events read in total (48919ms).
[09:19:14.909] <TB1> INFO: 2168140 events read in total (73573ms).
[09:19:39.338] <TB1> INFO: 2890220 events read in total (98002ms).
[09:20:03.728] <TB1> INFO: 3611180 events read in total (122392ms).
[09:20:28.187] <TB1> INFO: 4333200 events read in total (146851ms).
[09:20:52.579] <TB1> INFO: 5054540 events read in total (171243ms).
[09:21:15.783] <TB1> INFO: 5777220 events read in total (194447ms).
[09:21:39.559] <TB1> INFO: 6498960 events read in total (218223ms).
[09:22:03.777] <TB1> INFO: 7220760 events read in total (242441ms).
[09:22:28.219] <TB1> INFO: 7942940 events read in total (266883ms).
[09:22:52.680] <TB1> INFO: 8662400 events read in total (291344ms).
[09:23:17.224] <TB1> INFO: 9379180 events read in total (315888ms).
[09:23:41.764] <TB1> INFO: 10095160 events read in total (340428ms).
[09:24:06.098] <TB1> INFO: 10809740 events read in total (364762ms).
[09:24:30.378] <TB1> INFO: 11524080 events read in total (389042ms).
[09:24:54.687] <TB1> INFO: 12238520 events read in total (413351ms).
[09:25:18.959] <TB1> INFO: 12951500 events read in total (437623ms).
[09:25:43.410] <TB1> INFO: 13664640 events read in total (462074ms).
[09:26:07.739] <TB1> INFO: 14376720 events read in total (486403ms).
[09:26:32.288] <TB1> INFO: 15089640 events read in total (510952ms).
[09:26:56.710] <TB1> INFO: 15801560 events read in total (535374ms).
[09:27:20.950] <TB1> INFO: 16514900 events read in total (559615ms).
[09:27:25.590] <TB1> INFO: 16640000 events read in total (564254ms).
[09:27:25.663] <TB1> INFO: Test took 565361ms.
[09:27:25.876] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:51.572] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.197343 .. 85.067891
[09:27:51.648] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 95 (-1/-1) hits flags = 16 (plus default)
[09:27:51.656] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:27:51.656] <TB1> INFO: run 1 of 1
[09:27:51.961] <TB1> INFO: Expecting 7987200 events.
[09:28:18.105] <TB1> INFO: 809740 events read in total (25427ms).
[09:28:43.502] <TB1> INFO: 1621120 events read in total (50824ms).
[09:29:08.906] <TB1> INFO: 2433400 events read in total (76228ms).
[09:29:34.260] <TB1> INFO: 3244740 events read in total (101582ms).
[09:29:57.082] <TB1> INFO: 4056940 events read in total (124404ms).
[09:30:22.534] <TB1> INFO: 4866900 events read in total (149856ms).
[09:30:47.886] <TB1> INFO: 5675400 events read in total (175208ms).
[09:31:13.277] <TB1> INFO: 6482400 events read in total (200599ms).
[09:31:38.613] <TB1> INFO: 7287620 events read in total (225935ms).
[09:32:00.695] <TB1> INFO: 7987200 events read in total (248017ms).
[09:32:00.723] <TB1> INFO: Test took 249067ms.
[09:32:00.802] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:18.951] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 15.382214 .. 70.744081
[09:32:19.034] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 5 .. 80 (-1/-1) hits flags = 16 (plus default)
[09:32:19.043] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:32:19.043] <TB1> INFO: run 1 of 1
[09:32:19.350] <TB1> INFO: Expecting 6323200 events.
[09:32:43.171] <TB1> INFO: 826120 events read in total (23104ms).
[09:33:08.543] <TB1> INFO: 1652780 events read in total (48476ms).
[09:33:33.934] <TB1> INFO: 2479020 events read in total (73867ms).
[09:33:59.303] <TB1> INFO: 3305360 events read in total (99236ms).
[09:34:24.657] <TB1> INFO: 4130280 events read in total (124590ms).
[09:34:50.032] <TB1> INFO: 4954980 events read in total (149965ms).
[09:35:14.124] <TB1> INFO: 5778560 events read in total (174057ms).
[09:35:29.744] <TB1> INFO: 6323200 events read in total (189677ms).
[09:35:29.765] <TB1> INFO: Test took 190722ms.
[09:35:29.831] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:46.250] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 19.520669 .. 61.422212
[09:35:46.332] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 9 .. 71 (-1/-1) hits flags = 16 (plus default)
[09:35:46.341] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:35:46.341] <TB1> INFO: run 1 of 1
[09:35:46.660] <TB1> INFO: Expecting 5241600 events.
[09:36:10.978] <TB1> INFO: 836260 events read in total (23602ms).
[09:36:34.752] <TB1> INFO: 1673160 events read in total (47376ms).
[09:37:00.211] <TB1> INFO: 2510100 events read in total (72835ms).
[09:37:25.844] <TB1> INFO: 3346260 events read in total (98468ms).
[09:37:51.575] <TB1> INFO: 4181820 events read in total (124199ms).
[09:38:17.148] <TB1> INFO: 5016800 events read in total (149772ms).
[09:38:24.345] <TB1> INFO: 5241600 events read in total (156969ms).
[09:38:24.367] <TB1> INFO: Test took 158026ms.
[09:38:24.417] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:40.183] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 21.792500 .. 60.392432
[09:38:40.277] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 11 .. 70 (-1/-1) hits flags = 16 (plus default)
[09:38:40.286] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:38:40.286] <TB1> INFO: run 1 of 1
[09:38:40.600] <TB1> INFO: Expecting 4992000 events.
[09:39:06.898] <TB1> INFO: 829820 events read in total (25580ms).
[09:39:32.530] <TB1> INFO: 1660460 events read in total (51212ms).
[09:39:56.976] <TB1> INFO: 2490880 events read in total (75658ms).
[09:40:20.024] <TB1> INFO: 3321180 events read in total (98706ms).
[09:40:45.430] <TB1> INFO: 4150900 events read in total (124112ms).
[09:41:10.955] <TB1> INFO: 4980680 events read in total (149637ms).
[09:41:11.815] <TB1> INFO: 4992000 events read in total (150497ms).
[09:41:11.832] <TB1> INFO: Test took 151546ms.
[09:41:11.882] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:26.201] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:41:26.201] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[09:41:26.209] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[09:41:26.210] <TB1> INFO: run 1 of 1
[09:41:26.514] <TB1> INFO: Expecting 3411200 events.
[09:41:53.401] <TB1> INFO: 879420 events read in total (26170ms).
[09:42:19.518] <TB1> INFO: 1758560 events read in total (52287ms).
[09:42:44.656] <TB1> INFO: 2637100 events read in total (77425ms).
[09:43:07.889] <TB1> INFO: 3411200 events read in total (100658ms).
[09:43:07.908] <TB1> INFO: Test took 101698ms.
[09:43:07.941] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:20.311] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:43:20.311] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:43:20.311] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:43:20.311] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:43:20.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:43:20.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:43:20.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:43:20.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:43:20.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:43:20.312] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:43:20.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:43:20.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:43:20.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:43:20.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:43:20.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:43:20.313] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:43:20.314] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:43:20.321] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:43:20.330] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:43:20.338] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:43:20.347] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:43:20.355] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:43:20.363] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:43:20.372] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:43:20.380] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:43:20.388] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:43:20.396] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:43:20.405] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:43:20.413] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:43:20.420] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:43:20.426] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:43:20.432] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:43:20.438] <TB1> INFO: PixTestTrim::trimTest() done
[09:43:20.438] <TB1> INFO: vtrim: 93 94 82 99 88 94 107 88 87 116 85 90 91 91 101 90
[09:43:20.438] <TB1> INFO: vthrcomp: 90 87 85 82 77 84 88 80 92 90 86 81 86 89 86 80
[09:43:20.438] <TB1> INFO: vcal mean: 34.93 34.98 34.99 34.93 35.00 34.98 34.99 35.00 35.00 34.97 34.95 34.97 34.97 34.94 34.95 35.03
[09:43:20.438] <TB1> INFO: vcal RMS: 0.70 0.69 0.69 0.72 0.64 0.71 0.71 0.61 0.70 0.76 0.68 0.66 0.79 0.69 1.04 0.65
[09:43:20.438] <TB1> INFO: bits mean: 8.99 9.29 9.60 9.70 8.47 9.12 8.97 9.58 8.99 9.08 9.57 9.15 8.57 9.06 9.59 9.42
[09:43:20.438] <TB1> INFO: bits RMS: 2.83 2.75 2.77 2.71 2.76 2.83 2.88 2.63 2.93 2.79 2.65 2.87 3.04 2.83 2.66 2.61
[09:43:20.447] <TB1> INFO: ----------------------------------------------------------------------
[09:43:20.447] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:43:20.447] <TB1> INFO: ----------------------------------------------------------------------
[09:43:20.451] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[09:43:20.461] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[09:43:20.461] <TB1> INFO: run 1 of 1
[09:43:20.767] <TB1> INFO: Expecting 8320000 events.
[09:43:50.586] <TB1> INFO: 902180 events read in total (29102ms).
[09:44:19.185] <TB1> INFO: 1797300 events read in total (57701ms).
[09:44:48.107] <TB1> INFO: 2690360 events read in total (86623ms).
[09:45:17.193] <TB1> INFO: 3583000 events read in total (115709ms).
[09:45:46.262] <TB1> INFO: 4471220 events read in total (144778ms).
[09:46:15.397] <TB1> INFO: 5355270 events read in total (173913ms).
[09:46:42.083] <TB1> INFO: 6239160 events read in total (200599ms).
[09:47:11.029] <TB1> INFO: 7121920 events read in total (229545ms).
[09:47:37.872] <TB1> INFO: 8006060 events read in total (256389ms).
[09:47:48.020] <TB1> INFO: 8320000 events read in total (266536ms).
[09:47:48.060] <TB1> INFO: Test took 267599ms.
[09:47:48.185] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:15.713] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 151 (-1/-1) hits flags = 16 (plus default)
[09:48:15.722] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[09:48:15.722] <TB1> INFO: run 1 of 1
[09:48:16.038] <TB1> INFO: Expecting 6323200 events.
[09:48:46.636] <TB1> INFO: 969670 events read in total (29881ms).
[09:49:15.057] <TB1> INFO: 1929920 events read in total (58303ms).
[09:49:45.008] <TB1> INFO: 2887330 events read in total (88253ms).
[09:50:14.861] <TB1> INFO: 3835890 events read in total (118106ms).
[09:50:44.802] <TB1> INFO: 4780940 events read in total (148047ms).
[09:51:14.746] <TB1> INFO: 5725280 events read in total (177991ms).
[09:51:32.237] <TB1> INFO: 6323200 events read in total (195482ms).
[09:51:32.270] <TB1> INFO: Test took 196548ms.
[09:51:32.350] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:56.135] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 141 (-1/-1) hits flags = 16 (plus default)
[09:51:56.144] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[09:51:56.144] <TB1> INFO: run 1 of 1
[09:51:56.457] <TB1> INFO: Expecting 5907200 events.
[09:52:27.761] <TB1> INFO: 1000980 events read in total (30586ms).
[09:52:58.117] <TB1> INFO: 1991750 events read in total (60942ms).
[09:53:25.787] <TB1> INFO: 2978810 events read in total (88612ms).
[09:53:54.632] <TB1> INFO: 3952840 events read in total (117457ms).
[09:54:24.851] <TB1> INFO: 4926970 events read in total (147676ms).
[09:54:55.426] <TB1> INFO: 5905410 events read in total (178251ms).
[09:54:55.962] <TB1> INFO: 5907200 events read in total (178787ms).
[09:54:55.998] <TB1> INFO: Test took 179854ms.
[09:54:56.063] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:16.986] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 141 (-1/-1) hits flags = 16 (plus default)
[09:55:16.995] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[09:55:16.995] <TB1> INFO: run 1 of 1
[09:55:17.327] <TB1> INFO: Expecting 5907200 events.
[09:55:48.659] <TB1> INFO: 1000650 events read in total (30609ms).
[09:56:18.598] <TB1> INFO: 1990640 events read in total (60548ms).
[09:56:49.052] <TB1> INFO: 2977280 events read in total (91002ms).
[09:57:16.966] <TB1> INFO: 3950670 events read in total (118916ms).
[09:57:47.238] <TB1> INFO: 4924380 events read in total (149188ms).
[09:58:17.579] <TB1> INFO: 5902440 events read in total (179529ms).
[09:58:18.203] <TB1> INFO: 5907200 events read in total (180153ms).
[09:58:18.226] <TB1> INFO: Test took 181232ms.
[09:58:18.289] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:39.251] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 140 (-1/-1) hits flags = 16 (plus default)
[09:58:39.260] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[09:58:39.260] <TB1> INFO: run 1 of 1
[09:58:39.565] <TB1> INFO: Expecting 5865600 events.
[09:59:10.996] <TB1> INFO: 1003650 events read in total (30714ms).
[09:59:41.551] <TB1> INFO: 1996470 events read in total (61269ms).
[10:00:12.065] <TB1> INFO: 2984960 events read in total (91783ms).
[10:00:42.243] <TB1> INFO: 3961650 events read in total (121961ms).
[10:01:10.379] <TB1> INFO: 4937370 events read in total (150097ms).
[10:01:38.443] <TB1> INFO: 5865600 events read in total (178161ms).
[10:01:38.476] <TB1> INFO: Test took 179216ms.
[10:01:38.541] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:00.559] <TB1> INFO: PixTestTrim::trimBitTest() done
[10:02:00.560] <TB1> INFO: PixTestTrim::doTest() done, duration: 3831 seconds
[10:02:01.242] <TB1> INFO: ######################################################################
[10:02:01.243] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:02:01.243] <TB1> INFO: ######################################################################
[10:02:01.552] <TB1> INFO: Expecting 41600 events.
[10:02:05.978] <TB1> INFO: 41600 events read in total (3709ms).
[10:02:05.978] <TB1> INFO: Test took 4734ms.
[10:02:05.984] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:06.575] <TB1> INFO: Expecting 41600 events.
[10:02:11.055] <TB1> INFO: 41600 events read in total (3763ms).
[10:02:11.064] <TB1> INFO: Test took 4819ms.
[10:02:11.071] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:11.413] <TB1> INFO: Expecting 41600 events.
[10:02:15.902] <TB1> INFO: 41600 events read in total (3772ms).
[10:02:15.902] <TB1> INFO: Test took 4816ms.
[10:02:15.909] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:15.916] <TB1> INFO: The DUT currently contains the following objects:
[10:02:15.916] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:15.916] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:15.916] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:15.916] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:15.916] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.916] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:15.917] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:16.258] <TB1> INFO: Expecting 2560 events.
[10:02:17.329] <TB1> INFO: 2560 events read in total (354ms).
[10:02:17.329] <TB1> INFO: Test took 1412ms.
[10:02:17.330] <TB1> INFO: The DUT currently contains the following objects:
[10:02:17.330] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:17.330] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:17.330] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:17.330] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:17.330] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.330] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:17.745] <TB1> INFO: Expecting 2560 events.
[10:02:18.817] <TB1> INFO: 2560 events read in total (355ms).
[10:02:18.818] <TB1> INFO: Test took 1488ms.
[10:02:18.819] <TB1> INFO: The DUT currently contains the following objects:
[10:02:18.819] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:18.819] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:18.819] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:18.819] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:18.819] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:18.819] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:19.233] <TB1> INFO: Expecting 2560 events.
[10:02:20.303] <TB1> INFO: 2560 events read in total (353ms).
[10:02:20.304] <TB1> INFO: Test took 1484ms.
[10:02:20.304] <TB1> INFO: The DUT currently contains the following objects:
[10:02:20.304] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:20.304] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:20.304] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:20.304] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:20.304] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.304] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.304] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.304] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.304] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.304] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.304] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.305] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:20.719] <TB1> INFO: Expecting 2560 events.
[10:02:21.791] <TB1> INFO: 2560 events read in total (355ms).
[10:02:21.792] <TB1> INFO: Test took 1487ms.
[10:02:21.794] <TB1> INFO: The DUT currently contains the following objects:
[10:02:21.795] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:21.795] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:21.795] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:21.795] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:21.795] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:21.795] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:22.209] <TB1> INFO: Expecting 2560 events.
[10:02:23.280] <TB1> INFO: 2560 events read in total (354ms).
[10:02:23.281] <TB1> INFO: Test took 1486ms.
[10:02:23.282] <TB1> INFO: The DUT currently contains the following objects:
[10:02:23.282] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:23.282] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:23.282] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:23.282] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:23.282] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.282] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.282] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.282] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.282] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.282] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.282] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.282] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.282] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.283] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.283] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.283] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.283] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.283] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.283] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.283] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:23.697] <TB1> INFO: Expecting 2560 events.
[10:02:24.768] <TB1> INFO: 2560 events read in total (354ms).
[10:02:24.768] <TB1> INFO: Test took 1485ms.
[10:02:24.769] <TB1> INFO: The DUT currently contains the following objects:
[10:02:24.769] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:24.769] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:24.769] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:24.769] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:24.769] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.769] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.769] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.769] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.769] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.769] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.769] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.769] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.770] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.770] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.770] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.770] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.770] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.770] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.770] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:24.770] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:25.184] <TB1> INFO: Expecting 2560 events.
[10:02:26.255] <TB1> INFO: 2560 events read in total (354ms).
[10:02:26.256] <TB1> INFO: Test took 1486ms.
[10:02:26.257] <TB1> INFO: The DUT currently contains the following objects:
[10:02:26.257] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:26.257] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:26.257] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:26.257] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:26.257] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.257] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.257] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.257] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.257] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.257] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.257] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.257] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.258] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.258] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.258] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.258] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.258] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.258] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.258] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.258] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:26.671] <TB1> INFO: Expecting 2560 events.
[10:02:27.744] <TB1> INFO: 2560 events read in total (356ms).
[10:02:27.744] <TB1> INFO: Test took 1486ms.
[10:02:27.744] <TB1> INFO: The DUT currently contains the following objects:
[10:02:27.745] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:27.745] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:27.745] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:27.745] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:27.745] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:27.745] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:28.159] <TB1> INFO: Expecting 2560 events.
[10:02:29.230] <TB1> INFO: 2560 events read in total (354ms).
[10:02:29.230] <TB1> INFO: Test took 1485ms.
[10:02:29.231] <TB1> INFO: The DUT currently contains the following objects:
[10:02:29.231] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:29.231] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:29.231] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:29.231] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:29.231] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.231] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.232] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.232] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.232] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.232] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:29.646] <TB1> INFO: Expecting 2560 events.
[10:02:30.716] <TB1> INFO: 2560 events read in total (354ms).
[10:02:30.717] <TB1> INFO: Test took 1485ms.
[10:02:30.717] <TB1> INFO: The DUT currently contains the following objects:
[10:02:30.717] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:30.717] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:30.717] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:30.717] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:30.717] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:30.718] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:31.133] <TB1> INFO: Expecting 2560 events.
[10:02:32.205] <TB1> INFO: 2560 events read in total (355ms).
[10:02:32.205] <TB1> INFO: Test took 1487ms.
[10:02:32.212] <TB1> INFO: The DUT currently contains the following objects:
[10:02:32.212] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:32.212] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:32.212] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:32.212] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:32.212] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.212] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.212] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.212] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.212] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.213] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:32.621] <TB1> INFO: Expecting 2560 events.
[10:02:33.693] <TB1> INFO: 2560 events read in total (355ms).
[10:02:33.693] <TB1> INFO: Test took 1480ms.
[10:02:33.693] <TB1> INFO: The DUT currently contains the following objects:
[10:02:33.693] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:33.693] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:33.694] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:33.694] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:33.694] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:33.694] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:34.109] <TB1> INFO: Expecting 2560 events.
[10:02:35.179] <TB1> INFO: 2560 events read in total (353ms).
[10:02:35.179] <TB1> INFO: Test took 1485ms.
[10:02:35.179] <TB1> INFO: The DUT currently contains the following objects:
[10:02:35.179] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:35.179] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:35.179] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:35.179] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:35.180] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.180] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:35.595] <TB1> INFO: Expecting 2560 events.
[10:02:36.670] <TB1> INFO: 2560 events read in total (357ms).
[10:02:36.670] <TB1> INFO: Test took 1490ms.
[10:02:36.671] <TB1> INFO: The DUT currently contains the following objects:
[10:02:36.671] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:36.671] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:36.671] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:36.671] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:36.671] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.671] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.672] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.672] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.672] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.672] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.672] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:36.672] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:37.086] <TB1> INFO: Expecting 2560 events.
[10:02:38.158] <TB1> INFO: 2560 events read in total (355ms).
[10:02:38.158] <TB1> INFO: Test took 1486ms.
[10:02:38.159] <TB1> INFO: The DUT currently contains the following objects:
[10:02:38.159] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:38.159] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:02:38.159] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:02:38.159] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:38.159] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.159] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.160] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.160] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.160] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.160] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.160] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:38.574] <TB1> INFO: Expecting 2560 events.
[10:02:39.644] <TB1> INFO: 2560 events read in total (353ms).
[10:02:39.645] <TB1> INFO: Test took 1485ms.
[10:02:39.650] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:02:40.063] <TB1> INFO: Expecting 655360 events.
[10:02:56.789] <TB1> INFO: 655360 events read in total (16010ms).
[10:02:56.799] <TB1> INFO: Expecting 655360 events.
[10:03:13.339] <TB1> INFO: 655360 events read in total (16012ms).
[10:03:13.351] <TB1> INFO: Expecting 655360 events.
[10:03:29.785] <TB1> INFO: 655360 events read in total (15905ms).
[10:03:29.801] <TB1> INFO: Expecting 655360 events.
[10:03:46.336] <TB1> INFO: 655360 events read in total (16006ms).
[10:03:46.358] <TB1> INFO: Expecting 655360 events.
[10:04:02.880] <TB1> INFO: 655360 events read in total (15994ms).
[10:04:02.904] <TB1> INFO: Expecting 655360 events.
[10:04:19.378] <TB1> INFO: 655360 events read in total (15946ms).
[10:04:19.407] <TB1> INFO: Expecting 655360 events.
[10:04:34.413] <TB1> INFO: 655360 events read in total (14478ms).
[10:04:34.443] <TB1> INFO: Expecting 655360 events.
[10:04:50.247] <TB1> INFO: 655360 events read in total (15276ms).
[10:04:50.280] <TB1> INFO: Expecting 655360 events.
[10:05:06.650] <TB1> INFO: 655360 events read in total (15841ms).
[10:05:06.693] <TB1> INFO: Expecting 655360 events.
[10:05:21.749] <TB1> INFO: 655360 events read in total (14528ms).
[10:05:21.789] <TB1> INFO: Expecting 655360 events.
[10:05:36.947] <TB1> INFO: 655360 events read in total (14630ms).
[10:05:36.991] <TB1> INFO: Expecting 655360 events.
[10:05:52.319] <TB1> INFO: 655360 events read in total (14800ms).
[10:05:52.367] <TB1> INFO: Expecting 655360 events.
[10:06:07.806] <TB1> INFO: 655360 events read in total (14910ms).
[10:06:07.859] <TB1> INFO: Expecting 655360 events.
[10:06:23.227] <TB1> INFO: 655360 events read in total (14840ms).
[10:06:23.286] <TB1> INFO: Expecting 655360 events.
[10:06:39.198] <TB1> INFO: 655360 events read in total (15384ms).
[10:06:39.260] <TB1> INFO: Expecting 655360 events.
[10:06:55.886] <TB1> INFO: 655360 events read in total (16098ms).
[10:06:55.950] <TB1> INFO: Test took 256300ms.
[10:06:56.036] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:06:56.343] <TB1> INFO: Expecting 655360 events.
[10:07:13.075] <TB1> INFO: 655360 events read in total (16015ms).
[10:07:13.090] <TB1> INFO: Expecting 655360 events.
[10:07:29.854] <TB1> INFO: 655360 events read in total (16236ms).
[10:07:29.870] <TB1> INFO: Expecting 655360 events.
[10:07:44.899] <TB1> INFO: 655360 events read in total (14500ms).
[10:07:44.915] <TB1> INFO: Expecting 655360 events.
[10:08:00.092] <TB1> INFO: 655360 events read in total (14649ms).
[10:08:00.113] <TB1> INFO: Expecting 655360 events.
[10:08:15.244] <TB1> INFO: 655360 events read in total (14603ms).
[10:08:15.271] <TB1> INFO: Expecting 655360 events.
[10:08:31.946] <TB1> INFO: 655360 events read in total (16144ms).
[10:08:31.982] <TB1> INFO: Expecting 655360 events.
[10:08:48.735] <TB1> INFO: 655360 events read in total (16224ms).
[10:08:48.776] <TB1> INFO: Expecting 655360 events.
[10:09:05.568] <TB1> INFO: 655360 events read in total (16264ms).
[10:09:05.607] <TB1> INFO: Expecting 655360 events.
[10:09:22.128] <TB1> INFO: 655360 events read in total (15992ms).
[10:09:22.170] <TB1> INFO: Expecting 655360 events.
[10:09:38.925] <TB1> INFO: 655360 events read in total (16227ms).
[10:09:38.972] <TB1> INFO: Expecting 655360 events.
[10:09:55.615] <TB1> INFO: 655360 events read in total (16114ms).
[10:09:55.663] <TB1> INFO: Expecting 655360 events.
[10:10:12.258] <TB1> INFO: 655360 events read in total (16067ms).
[10:10:12.310] <TB1> INFO: Expecting 655360 events.
[10:10:28.949] <TB1> INFO: 655360 events read in total (16111ms).
[10:10:29.007] <TB1> INFO: Expecting 655360 events.
[10:10:44.340] <TB1> INFO: 655360 events read in total (14804ms).
[10:10:44.395] <TB1> INFO: Expecting 655360 events.
[10:10:59.612] <TB1> INFO: 655360 events read in total (14688ms).
[10:10:59.675] <TB1> INFO: Expecting 655360 events.
[10:11:16.405] <TB1> INFO: 655360 events read in total (16202ms).
[10:11:16.468] <TB1> INFO: Test took 260432ms.
[10:11:16.665] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.672] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.680] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.687] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.694] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.701] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.708] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.715] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.723] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.730] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.737] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.744] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.753] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[10:11:16.761] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[10:11:16.770] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[10:11:16.778] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.787] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.794] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.801] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:11:16.857] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:11:16.857] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:11:16.857] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:11:16.857] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:11:16.857] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:11:16.858] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:11:16.858] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:11:16.858] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:11:16.858] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:11:16.858] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:11:16.858] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:11:16.858] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:11:16.858] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:11:16.859] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:11:16.859] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:11:16.859] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:11:17.168] <TB1> INFO: Expecting 41600 events.
[10:11:21.726] <TB1> INFO: 41600 events read in total (3841ms).
[10:11:21.727] <TB1> INFO: Test took 4864ms.
[10:11:22.304] <TB1> INFO: Expecting 41600 events.
[10:11:26.805] <TB1> INFO: 41600 events read in total (3784ms).
[10:11:26.806] <TB1> INFO: Test took 4851ms.
[10:11:27.359] <TB1> INFO: Expecting 41600 events.
[10:11:31.882] <TB1> INFO: 41600 events read in total (3805ms).
[10:11:31.883] <TB1> INFO: Test took 4834ms.
[10:11:32.119] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:32.253] <TB1> INFO: Expecting 2560 events.
[10:11:33.327] <TB1> INFO: 2560 events read in total (357ms).
[10:11:33.328] <TB1> INFO: Test took 1209ms.
[10:11:33.332] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:33.744] <TB1> INFO: Expecting 2560 events.
[10:11:34.815] <TB1> INFO: 2560 events read in total (354ms).
[10:11:34.816] <TB1> INFO: Test took 1484ms.
[10:11:34.819] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:35.233] <TB1> INFO: Expecting 2560 events.
[10:11:36.304] <TB1> INFO: 2560 events read in total (355ms).
[10:11:36.304] <TB1> INFO: Test took 1485ms.
[10:11:36.307] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:36.722] <TB1> INFO: Expecting 2560 events.
[10:11:37.792] <TB1> INFO: 2560 events read in total (353ms).
[10:11:37.792] <TB1> INFO: Test took 1485ms.
[10:11:37.795] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:38.210] <TB1> INFO: Expecting 2560 events.
[10:11:39.285] <TB1> INFO: 2560 events read in total (358ms).
[10:11:39.285] <TB1> INFO: Test took 1490ms.
[10:11:39.289] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:39.703] <TB1> INFO: Expecting 2560 events.
[10:11:40.775] <TB1> INFO: 2560 events read in total (354ms).
[10:11:40.776] <TB1> INFO: Test took 1488ms.
[10:11:40.779] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:41.193] <TB1> INFO: Expecting 2560 events.
[10:11:42.263] <TB1> INFO: 2560 events read in total (353ms).
[10:11:42.264] <TB1> INFO: Test took 1485ms.
[10:11:42.267] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:42.681] <TB1> INFO: Expecting 2560 events.
[10:11:43.753] <TB1> INFO: 2560 events read in total (355ms).
[10:11:43.754] <TB1> INFO: Test took 1487ms.
[10:11:43.757] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:44.170] <TB1> INFO: Expecting 2560 events.
[10:11:45.242] <TB1> INFO: 2560 events read in total (354ms).
[10:11:45.242] <TB1> INFO: Test took 1485ms.
[10:11:45.245] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:45.659] <TB1> INFO: Expecting 2560 events.
[10:11:46.730] <TB1> INFO: 2560 events read in total (354ms).
[10:11:46.731] <TB1> INFO: Test took 1486ms.
[10:11:46.735] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:47.148] <TB1> INFO: Expecting 2560 events.
[10:11:48.220] <TB1> INFO: 2560 events read in total (355ms).
[10:11:48.220] <TB1> INFO: Test took 1485ms.
[10:11:48.224] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:48.637] <TB1> INFO: Expecting 2560 events.
[10:11:49.708] <TB1> INFO: 2560 events read in total (354ms).
[10:11:49.709] <TB1> INFO: Test took 1486ms.
[10:11:49.711] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:50.126] <TB1> INFO: Expecting 2560 events.
[10:11:51.200] <TB1> INFO: 2560 events read in total (358ms).
[10:11:51.201] <TB1> INFO: Test took 1490ms.
[10:11:51.205] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:51.620] <TB1> INFO: Expecting 2560 events.
[10:11:52.689] <TB1> INFO: 2560 events read in total (352ms).
[10:11:52.690] <TB1> INFO: Test took 1486ms.
[10:11:52.698] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:53.106] <TB1> INFO: Expecting 2560 events.
[10:11:54.176] <TB1> INFO: 2560 events read in total (353ms).
[10:11:54.176] <TB1> INFO: Test took 1478ms.
[10:11:54.179] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:54.593] <TB1> INFO: Expecting 2560 events.
[10:11:55.668] <TB1> INFO: 2560 events read in total (357ms).
[10:11:55.668] <TB1> INFO: Test took 1489ms.
[10:11:55.672] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:56.086] <TB1> INFO: Expecting 2560 events.
[10:11:57.159] <TB1> INFO: 2560 events read in total (356ms).
[10:11:57.159] <TB1> INFO: Test took 1487ms.
[10:11:57.162] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:57.576] <TB1> INFO: Expecting 2560 events.
[10:11:58.649] <TB1> INFO: 2560 events read in total (356ms).
[10:11:58.649] <TB1> INFO: Test took 1487ms.
[10:11:58.652] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:59.066] <TB1> INFO: Expecting 2560 events.
[10:12:00.139] <TB1> INFO: 2560 events read in total (356ms).
[10:12:00.139] <TB1> INFO: Test took 1487ms.
[10:12:00.143] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:00.556] <TB1> INFO: Expecting 2560 events.
[10:12:01.628] <TB1> INFO: 2560 events read in total (355ms).
[10:12:01.628] <TB1> INFO: Test took 1486ms.
[10:12:01.632] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:02.046] <TB1> INFO: Expecting 2560 events.
[10:12:03.119] <TB1> INFO: 2560 events read in total (356ms).
[10:12:03.119] <TB1> INFO: Test took 1487ms.
[10:12:03.123] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:03.535] <TB1> INFO: Expecting 2560 events.
[10:12:04.604] <TB1> INFO: 2560 events read in total (352ms).
[10:12:04.605] <TB1> INFO: Test took 1483ms.
[10:12:04.608] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:05.022] <TB1> INFO: Expecting 2560 events.
[10:12:06.106] <TB1> INFO: 2560 events read in total (367ms).
[10:12:06.106] <TB1> INFO: Test took 1498ms.
[10:12:06.110] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:06.524] <TB1> INFO: Expecting 2560 events.
[10:12:07.594] <TB1> INFO: 2560 events read in total (353ms).
[10:12:07.594] <TB1> INFO: Test took 1485ms.
[10:12:07.598] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:08.012] <TB1> INFO: Expecting 2560 events.
[10:12:09.085] <TB1> INFO: 2560 events read in total (356ms).
[10:12:09.085] <TB1> INFO: Test took 1487ms.
[10:12:09.089] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:09.502] <TB1> INFO: Expecting 2560 events.
[10:12:10.574] <TB1> INFO: 2560 events read in total (355ms).
[10:12:10.575] <TB1> INFO: Test took 1486ms.
[10:12:10.577] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:10.992] <TB1> INFO: Expecting 2560 events.
[10:12:12.060] <TB1> INFO: 2560 events read in total (351ms).
[10:12:12.061] <TB1> INFO: Test took 1484ms.
[10:12:12.065] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:12.477] <TB1> INFO: Expecting 2560 events.
[10:12:13.549] <TB1> INFO: 2560 events read in total (355ms).
[10:12:13.550] <TB1> INFO: Test took 1486ms.
[10:12:13.553] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:13.967] <TB1> INFO: Expecting 2560 events.
[10:12:15.039] <TB1> INFO: 2560 events read in total (355ms).
[10:12:15.039] <TB1> INFO: Test took 1486ms.
[10:12:15.045] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:15.456] <TB1> INFO: Expecting 2560 events.
[10:12:16.528] <TB1> INFO: 2560 events read in total (355ms).
[10:12:16.528] <TB1> INFO: Test took 1484ms.
[10:12:16.531] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:16.945] <TB1> INFO: Expecting 2560 events.
[10:12:18.017] <TB1> INFO: 2560 events read in total (354ms).
[10:12:18.017] <TB1> INFO: Test took 1486ms.
[10:12:18.021] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:12:18.434] <TB1> INFO: Expecting 2560 events.
[10:12:19.502] <TB1> INFO: 2560 events read in total (351ms).
[10:12:19.503] <TB1> INFO: Test took 1482ms.
[10:12:20.182] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 618 seconds
[10:12:20.182] <TB1> INFO: PH scale (per ROC): 83 83 80 91 81 85 80 80 77 94 80 93 84 87 79 80
[10:12:20.182] <TB1> INFO: PH offset (per ROC): 166 151 164 144 146 159 150 148 163 160 153 144 163 159 154 155
[10:12:20.378] <TB1> INFO: ######################################################################
[10:12:20.378] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:12:20.378] <TB1> INFO: ######################################################################
[10:12:20.389] <TB1> INFO: scanning low vcal = 10
[10:12:20.694] <TB1> INFO: Expecting 41600 events.
[10:12:24.325] <TB1> INFO: 41600 events read in total (2914ms).
[10:12:24.325] <TB1> INFO: Test took 3936ms.
[10:12:24.328] <TB1> INFO: scanning low vcal = 20
[10:12:24.741] <TB1> INFO: Expecting 41600 events.
[10:12:28.373] <TB1> INFO: 41600 events read in total (2915ms).
[10:12:28.373] <TB1> INFO: Test took 4045ms.
[10:12:28.376] <TB1> INFO: scanning low vcal = 30
[10:12:28.790] <TB1> INFO: Expecting 41600 events.
[10:12:32.443] <TB1> INFO: 41600 events read in total (2937ms).
[10:12:32.444] <TB1> INFO: Test took 4068ms.
[10:12:32.449] <TB1> INFO: scanning low vcal = 40
[10:12:32.852] <TB1> INFO: Expecting 41600 events.
[10:12:37.094] <TB1> INFO: 41600 events read in total (3525ms).
[10:12:37.095] <TB1> INFO: Test took 4646ms.
[10:12:37.098] <TB1> INFO: scanning low vcal = 50
[10:12:37.442] <TB1> INFO: Expecting 41600 events.
[10:12:41.533] <TB1> INFO: 41600 events read in total (3374ms).
[10:12:41.533] <TB1> INFO: Test took 4435ms.
[10:12:41.537] <TB1> INFO: scanning low vcal = 60
[10:12:41.920] <TB1> INFO: Expecting 41600 events.
[10:12:46.006] <TB1> INFO: 41600 events read in total (3369ms).
[10:12:46.007] <TB1> INFO: Test took 4470ms.
[10:12:46.011] <TB1> INFO: scanning low vcal = 70
[10:12:46.363] <TB1> INFO: Expecting 41600 events.
[10:12:50.417] <TB1> INFO: 41600 events read in total (3337ms).
[10:12:50.418] <TB1> INFO: Test took 4407ms.
[10:12:50.421] <TB1> INFO: scanning low vcal = 80
[10:12:50.771] <TB1> INFO: Expecting 41600 events.
[10:12:54.835] <TB1> INFO: 41600 events read in total (3347ms).
[10:12:54.835] <TB1> INFO: Test took 4414ms.
[10:12:54.839] <TB1> INFO: scanning low vcal = 90
[10:12:55.188] <TB1> INFO: Expecting 41600 events.
[10:12:59.437] <TB1> INFO: 41600 events read in total (3532ms).
[10:12:59.437] <TB1> INFO: Test took 4598ms.
[10:12:59.441] <TB1> INFO: scanning low vcal = 100
[10:12:59.784] <TB1> INFO: Expecting 41600 events.
[10:13:04.037] <TB1> INFO: 41600 events read in total (3536ms).
[10:13:04.037] <TB1> INFO: Test took 4595ms.
[10:13:04.041] <TB1> INFO: scanning low vcal = 110
[10:13:04.381] <TB1> INFO: Expecting 41600 events.
[10:13:08.572] <TB1> INFO: 41600 events read in total (3474ms).
[10:13:08.573] <TB1> INFO: Test took 4532ms.
[10:13:08.576] <TB1> INFO: scanning low vcal = 120
[10:13:08.919] <TB1> INFO: Expecting 41600 events.
[10:13:13.186] <TB1> INFO: 41600 events read in total (3550ms).
[10:13:13.187] <TB1> INFO: Test took 4611ms.
[10:13:13.190] <TB1> INFO: scanning low vcal = 130
[10:13:13.535] <TB1> INFO: Expecting 41600 events.
[10:13:17.696] <TB1> INFO: 41600 events read in total (3444ms).
[10:13:17.696] <TB1> INFO: Test took 4506ms.
[10:13:17.700] <TB1> INFO: scanning low vcal = 140
[10:13:18.043] <TB1> INFO: Expecting 41600 events.
[10:13:22.279] <TB1> INFO: 41600 events read in total (3518ms).
[10:13:22.280] <TB1> INFO: Test took 4580ms.
[10:13:22.283] <TB1> INFO: scanning low vcal = 150
[10:13:22.633] <TB1> INFO: Expecting 41600 events.
[10:13:26.892] <TB1> INFO: 41600 events read in total (3542ms).
[10:13:26.893] <TB1> INFO: Test took 4610ms.
[10:13:26.898] <TB1> INFO: scanning low vcal = 160
[10:13:27.243] <TB1> INFO: Expecting 41600 events.
[10:13:31.484] <TB1> INFO: 41600 events read in total (3524ms).
[10:13:31.484] <TB1> INFO: Test took 4586ms.
[10:13:31.488] <TB1> INFO: scanning low vcal = 170
[10:13:31.836] <TB1> INFO: Expecting 41600 events.
[10:13:36.067] <TB1> INFO: 41600 events read in total (3514ms).
[10:13:36.068] <TB1> INFO: Test took 4580ms.
[10:13:36.073] <TB1> INFO: scanning low vcal = 180
[10:13:36.408] <TB1> INFO: Expecting 41600 events.
[10:13:40.671] <TB1> INFO: 41600 events read in total (3546ms).
[10:13:40.672] <TB1> INFO: Test took 4599ms.
[10:13:40.675] <TB1> INFO: scanning low vcal = 190
[10:13:41.013] <TB1> INFO: Expecting 41600 events.
[10:13:45.232] <TB1> INFO: 41600 events read in total (3502ms).
[10:13:45.232] <TB1> INFO: Test took 4557ms.
[10:13:45.236] <TB1> INFO: scanning low vcal = 200
[10:13:45.586] <TB1> INFO: Expecting 41600 events.
[10:13:49.793] <TB1> INFO: 41600 events read in total (3490ms).
[10:13:49.794] <TB1> INFO: Test took 4558ms.
[10:13:49.798] <TB1> INFO: scanning low vcal = 210
[10:13:50.139] <TB1> INFO: Expecting 41600 events.
[10:13:54.375] <TB1> INFO: 41600 events read in total (3519ms).
[10:13:54.376] <TB1> INFO: Test took 4578ms.
[10:13:54.381] <TB1> INFO: scanning low vcal = 220
[10:13:54.733] <TB1> INFO: Expecting 41600 events.
[10:13:58.968] <TB1> INFO: 41600 events read in total (3518ms).
[10:13:58.968] <TB1> INFO: Test took 4587ms.
[10:13:58.972] <TB1> INFO: scanning low vcal = 230
[10:13:59.313] <TB1> INFO: Expecting 41600 events.
[10:14:03.549] <TB1> INFO: 41600 events read in total (3518ms).
[10:14:03.551] <TB1> INFO: Test took 4579ms.
[10:14:03.556] <TB1> INFO: scanning low vcal = 240
[10:14:03.887] <TB1> INFO: Expecting 41600 events.
[10:14:08.095] <TB1> INFO: 41600 events read in total (3491ms).
[10:14:08.095] <TB1> INFO: Test took 4539ms.
[10:14:08.099] <TB1> INFO: scanning low vcal = 250
[10:14:08.443] <TB1> INFO: Expecting 41600 events.
[10:14:12.661] <TB1> INFO: 41600 events read in total (3501ms).
[10:14:12.662] <TB1> INFO: Test took 4563ms.
[10:14:12.668] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[10:14:13.007] <TB1> INFO: Expecting 41600 events.
[10:14:17.244] <TB1> INFO: 41600 events read in total (3520ms).
[10:14:17.245] <TB1> INFO: Test took 4577ms.
[10:14:17.249] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[10:14:17.600] <TB1> INFO: Expecting 41600 events.
[10:14:21.887] <TB1> INFO: 41600 events read in total (3570ms).
[10:14:21.888] <TB1> INFO: Test took 4639ms.
[10:14:21.892] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[10:14:22.237] <TB1> INFO: Expecting 41600 events.
[10:14:26.457] <TB1> INFO: 41600 events read in total (3503ms).
[10:14:26.458] <TB1> INFO: Test took 4566ms.
[10:14:26.461] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[10:14:26.800] <TB1> INFO: Expecting 41600 events.
[10:14:31.180] <TB1> INFO: 41600 events read in total (3663ms).
[10:14:31.180] <TB1> INFO: Test took 4719ms.
[10:14:31.184] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:14:31.527] <TB1> INFO: Expecting 41600 events.
[10:14:35.759] <TB1> INFO: 41600 events read in total (3514ms).
[10:14:35.760] <TB1> INFO: Test took 4576ms.
[10:14:36.256] <TB1> INFO: PixTestGainPedestal::measure() done
[10:15:12.068] <TB1> INFO: PixTestGainPedestal::fit() done
[10:15:12.068] <TB1> INFO: non-linearity mean: 0.957 0.955 0.957 0.953 0.951 0.958 0.961 0.953 0.955 0.963 0.961 0.963 0.956 0.962 0.952 0.955
[10:15:12.068] <TB1> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.005 0.004 0.005 0.005 0.006 0.006
[10:15:12.068] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:15:12.100] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:15:12.129] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:15:12.157] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:15:12.187] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:15:12.210] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:15:12.237] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:15:12.256] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:15:12.280] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:15:12.306] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:15:12.333] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:15:12.353] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:15:12.372] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:15:12.391] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:15:12.410] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:15:12.429] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:15:12.447] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 172 seconds
[10:15:12.453] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C15.dat
[10:15:12.455] <TB1> INFO: PixTestReadback::doTest() start.
[10:15:12.456] <TB1> INFO: PixTestReadback::RES sent once
[10:15:23.879] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C0.dat
[10:15:23.880] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C1.dat
[10:15:23.880] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C2.dat
[10:15:23.880] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C3.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C4.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C5.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C6.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C7.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C8.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C9.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C10.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C11.dat
[10:15:23.881] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C12.dat
[10:15:23.882] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C13.dat
[10:15:23.882] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C14.dat
[10:15:23.882] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C15.dat
[10:15:23.932] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:15:23.932] <TB1> INFO: PixTestReadback::RES sent once
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C0.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C1.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C2.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C3.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C4.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C5.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C6.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C7.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C8.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C9.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C10.dat
[10:15:35.256] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C11.dat
[10:15:35.257] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C12.dat
[10:15:35.257] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C13.dat
[10:15:35.257] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C14.dat
[10:15:35.257] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C15.dat
[10:15:35.311] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:15:35.312] <TB1> INFO: PixTestReadback::RES sent once
[10:15:43.998] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:15:43.998] <TB1> INFO: Vbg will be calibrated using Vd calibration
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.6calibrated Vbg = 1.17932 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153.2calibrated Vbg = 1.17344 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 153.7calibrated Vbg = 1.17918 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.4calibrated Vbg = 1.19103 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 157.9calibrated Vbg = 1.19369 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 151.9calibrated Vbg = 1.19423 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 156calibrated Vbg = 1.19266 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 149.6calibrated Vbg = 1.19216 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 154.6calibrated Vbg = 1.18655 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.1calibrated Vbg = 1.196 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 143.1calibrated Vbg = 1.18724 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 147.4calibrated Vbg = 1.18515 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.5calibrated Vbg = 1.17501 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 154.9calibrated Vbg = 1.17277 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156calibrated Vbg = 1.17416 :::*/*/*/*/
[10:15:43.998] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 152.4calibrated Vbg = 1.17759 :::*/*/*/*/
[10:15:44.002] <TB1> INFO: PixTestReadback::RES sent once
[10:18:39.690] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C0.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C1.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C2.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C3.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C4.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C5.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C6.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C7.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C8.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C9.dat
[10:18:39.691] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C10.dat
[10:18:39.692] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C11.dat
[10:18:39.692] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C12.dat
[10:18:39.692] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C13.dat
[10:18:39.692] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C14.dat
[10:18:39.692] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2088_FullQualification_2015-09-01_10h30m_1441096224//000_FulltestPxar_m20//readbackCal_C15.dat
[10:18:39.738] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:18:39.740] <TB1> INFO: PixTestReadback::doTest() done
[10:18:39.755] <TB1> INFO: enter test to run
[10:18:39.755] <TB1> INFO: test: exit no parameter change
[10:18:40.370] <TB1> QUIET: Connection to board 153 closed.
[10:18:40.450] <TB1> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master