[13:27:19.059] <TB3> INFO: *** Welcome to pxar ***
[13:27:19.059] <TB3> INFO: *** Today: 2015/08/21
[13:27:19.060] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C15.dat
[13:27:19.061] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//tbmParameters_C0b.dat
[13:27:19.061] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//defaultMaskFile.dat
[13:27:19.061] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters_C15.dat
[13:27:19.144] <TB3> INFO: clk: 4
[13:27:19.144] <TB3> INFO: ctr: 4
[13:27:19.144] <TB3> INFO: sda: 19
[13:27:19.144] <TB3> INFO: tin: 9
[13:27:19.144] <TB3> INFO: level: 15
[13:27:19.144] <TB3> INFO: triggerdelay: 0
[13:27:19.144] <TB3> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[13:27:19.144] <TB3> INFO: Log level: INFO
[13:27:19.153] <TB3> INFO: Found DTB DTB_WZ4I6J
[13:27:19.163] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[13:27:19.166] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[13:27:19.169] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[13:27:20.699] <TB3> INFO: DUT info:
[13:27:20.699] <TB3> INFO: The DUT currently contains the following objects:
[13:27:20.699] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:27:20.699] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:27:20.699] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:27:20.699] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:27:20.699] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.699] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.700] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.700] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.700] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.700] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:20.700] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:21.101] <TB3> INFO: enter 'restricted' command line mode
[13:27:21.101] <TB3> INFO: enter test to run
[13:27:21.101] <TB3> INFO: test: pretest no parameter change
[13:27:21.101] <TB3> INFO: running: pretest
[13:27:21.108] <TB3> INFO: ######################################################################
[13:27:21.108] <TB3> INFO: PixTestPretest::doTest()
[13:27:21.108] <TB3> INFO: ######################################################################
[13:27:21.110] <TB3> INFO: ----------------------------------------------------------------------
[13:27:21.110] <TB3> INFO: PixTestPretest::programROC()
[13:27:21.110] <TB3> INFO: ----------------------------------------------------------------------
[13:27:39.127] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:27:39.127] <TB3> INFO: IA differences per ROC: 19.3 18.5 20.1 16.9 17.7 20.9 17.7 17.7 18.5 20.1 20.1 19.3 17.7 20.9 19.3 19.3
[13:27:39.193] <TB3> INFO: ----------------------------------------------------------------------
[13:27:39.193] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:27:39.193] <TB3> INFO: ----------------------------------------------------------------------
[13:27:44.661] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[13:27:44.664] <TB3> INFO: ----------------------------------------------------------------------
[13:27:44.664] <TB3> INFO: PixTestPretest::findWorkingPixel()
[13:27:44.664] <TB3> INFO: ----------------------------------------------------------------------
[13:27:52.888] <TB3> INFO: Test took 8221ms.
[13:27:53.184] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:27:53.216] <TB3> INFO: ----------------------------------------------------------------------
[13:27:53.216] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[13:27:53.216] <TB3> INFO: ----------------------------------------------------------------------
[13:28:01.472] <TB3> INFO: Test took 8251ms.
[13:28:01.778] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[13:28:01.778] <TB3> INFO: CalDel: 138 156 138 126 156 132 154 148 156 140 153 146 144 146 147 152
[13:28:01.778] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:28:01.782] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C0.dat
[13:28:01.782] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C1.dat
[13:28:01.782] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C2.dat
[13:28:01.783] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C3.dat
[13:28:01.783] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C4.dat
[13:28:01.783] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C5.dat
[13:28:01.783] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C6.dat
[13:28:01.783] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C7.dat
[13:28:01.784] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C8.dat
[13:28:01.784] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C9.dat
[13:28:01.784] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C10.dat
[13:28:01.784] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C11.dat
[13:28:01.785] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C12.dat
[13:28:01.785] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C13.dat
[13:28:01.785] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C14.dat
[13:28:01.785] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C15.dat
[13:28:01.785] <TB3> INFO: PixTestPretest::doTest() done, duration: 40 seconds
[13:28:01.880] <TB3> INFO: enter test to run
[13:28:01.880] <TB3> INFO: test: fulltest no parameter change
[13:28:01.880] <TB3> INFO: running: fulltest
[13:28:01.880] <TB3> INFO: ######################################################################
[13:28:01.880] <TB3> INFO: PixTestFullTest::doTest()
[13:28:01.880] <TB3> INFO: ######################################################################
[13:28:01.882] <TB3> INFO: ######################################################################
[13:28:01.882] <TB3> INFO: PixTestAlive::doTest()
[13:28:01.882] <TB3> INFO: ######################################################################
[13:28:01.883] <TB3> INFO: ----------------------------------------------------------------------
[13:28:01.883] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:28:01.883] <TB3> INFO: ----------------------------------------------------------------------
[13:28:05.333] <TB3> INFO: Test took 3448ms.
[13:28:05.360] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:05.590] <TB3> INFO: PixTestAlive::aliveTest() done
[13:28:05.590] <TB3> INFO: number of dead pixels (per ROC): 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:28:05.592] <TB3> INFO: ----------------------------------------------------------------------
[13:28:05.592] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:28:05.592] <TB3> INFO: ----------------------------------------------------------------------
[13:28:08.339] <TB3> INFO: Test took 2745ms.
[13:28:08.342] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:08.343] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:28:08.569] <TB3> INFO: PixTestAlive::maskTest() done
[13:28:08.569] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:28:08.571] <TB3> INFO: ----------------------------------------------------------------------
[13:28:08.571] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:28:08.571] <TB3> INFO: ----------------------------------------------------------------------
[13:28:11.993] <TB3> INFO: Test took 3421ms.
[13:28:12.017] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:12.249] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[13:28:12.249] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:28:12.249] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:28:12.259] <TB3> INFO: ######################################################################
[13:28:12.259] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:28:12.259] <TB3> INFO: ######################################################################
[13:28:12.262] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:28:12.274] <TB3> INFO: dacScan step from 0 .. 29
[13:28:33.601] <TB3> INFO: Test took 21327ms.
[13:28:33.639] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:33.639] <TB3> INFO: dacScan step from 30 .. 59
[13:28:57.229] <TB3> INFO: Test took 23590ms.
[13:28:57.332] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:57.365] <TB3> INFO: dacScan step from 60 .. 89
[13:29:26.311] <TB3> INFO: Test took 28945ms.
[13:29:26.572] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:26.658] <TB3> INFO: dacScan step from 90 .. 119
[13:29:55.737] <TB3> INFO: Test took 29079ms.
[13:29:55.993] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:56.077] <TB3> INFO: dacScan step from 120 .. 149
[13:30:21.041] <TB3> INFO: Test took 24964ms.
[13:30:21.287] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:44.599] <TB3> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[13:30:44.599] <TB3> INFO: number of dead bumps (per ROC): 0 1 0 0 0 0 0 0 0 0 2 0 0 0 0 0
[13:30:44.599] <TB3> INFO: separation cut (per ROC): 77 86 80 100 73 95 86 77 78 69 76 79 94 83 88 84
[13:30:44.670] <TB3> INFO: ######################################################################
[13:30:44.670] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[13:30:44.670] <TB3> INFO: ######################################################################
[13:30:44.670] <TB3> INFO: ----------------------------------------------------------------------
[13:30:44.670] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:30:44.670] <TB3> INFO: ----------------------------------------------------------------------
[13:30:44.670] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:30:44.679] <TB3> INFO: dacScan step from 0 .. 3
[13:31:03.462] <TB3> INFO: Test took 18783ms.
[13:31:03.488] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:03.488] <TB3> INFO: dacScan step from 4 .. 7
[13:31:22.301] <TB3> INFO: Test took 18813ms.
[13:31:22.328] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:22.328] <TB3> INFO: dacScan step from 8 .. 11
[13:31:41.133] <TB3> INFO: Test took 18805ms.
[13:31:41.166] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:41.166] <TB3> INFO: dacScan step from 12 .. 15
[13:32:00.074] <TB3> INFO: Test took 18908ms.
[13:32:00.100] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:00.100] <TB3> INFO: dacScan step from 16 .. 19
[13:32:19.020] <TB3> INFO: Test took 18920ms.
[13:32:19.048] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:19.048] <TB3> INFO: dacScan step from 20 .. 23
[13:32:38.033] <TB3> INFO: Test took 18985ms.
[13:32:38.059] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:38.059] <TB3> INFO: dacScan step from 24 .. 27
[13:32:56.990] <TB3> INFO: Test took 18931ms.
[13:32:57.015] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:57.015] <TB3> INFO: dacScan step from 28 .. 31
[13:33:15.921] <TB3> INFO: Test took 18906ms.
[13:33:15.946] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:15.946] <TB3> INFO: dacScan step from 32 .. 35
[13:33:34.756] <TB3> INFO: Test took 18810ms.
[13:33:34.785] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:34.785] <TB3> INFO: dacScan step from 36 .. 39
[13:33:53.617] <TB3> INFO: Test took 18832ms.
[13:33:53.649] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:53.649] <TB3> INFO: dacScan step from 40 .. 43
[13:34:12.476] <TB3> INFO: Test took 18827ms.
[13:34:12.500] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:12.500] <TB3> INFO: dacScan step from 44 .. 47
[13:34:31.321] <TB3> INFO: Test took 18820ms.
[13:34:31.349] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:31.349] <TB3> INFO: dacScan step from 48 .. 51
[13:34:50.388] <TB3> INFO: Test took 19039ms.
[13:34:50.417] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:50.417] <TB3> INFO: dacScan step from 52 .. 55
[13:35:09.367] <TB3> INFO: Test took 18950ms.
[13:35:09.395] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:09.395] <TB3> INFO: dacScan step from 56 .. 59
[13:35:28.432] <TB3> INFO: Test took 19037ms.
[13:35:28.462] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:28.462] <TB3> INFO: dacScan step from 60 .. 63
[13:35:47.476] <TB3> INFO: Test took 19014ms.
[13:35:47.507] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:47.507] <TB3> INFO: dacScan step from 64 .. 67
[13:36:06.562] <TB3> INFO: Test took 19055ms.
[13:36:06.600] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:06.601] <TB3> INFO: dacScan step from 68 .. 71
[13:36:26.117] <TB3> INFO: Test took 19516ms.
[13:36:26.168] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:26.169] <TB3> INFO: dacScan step from 72 .. 75
[13:36:46.321] <TB3> INFO: Test took 20151ms.
[13:36:46.393] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:46.396] <TB3> INFO: dacScan step from 76 .. 79
[13:37:08.434] <TB3> INFO: Test took 22038ms.
[13:37:08.530] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:08.535] <TB3> INFO: dacScan step from 80 .. 83
[13:37:33.412] <TB3> INFO: Test took 24877ms.
[13:37:33.561] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:33.569] <TB3> INFO: dacScan step from 84 .. 87
[13:37:59.810] <TB3> INFO: Test took 26241ms.
[13:38:00.007] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:00.015] <TB3> INFO: dacScan step from 88 .. 91

[13:38:27.298] <TB3> INFO: Test took 27282ms.
[13:38:27.500] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:27.509] <TB3> INFO: dacScan step from 92 .. 95
[13:38:55.501] <TB3> INFO: Test took 27992ms.
[13:38:55.727] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:55.737] <TB3> INFO: dacScan step from 96 .. 99


[13:39:24.374] <TB3> INFO: Test took 28637ms.
[13:39:24.602] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:24.613] <TB3> INFO: dacScan step from 100 .. 103





[13:39:53.538] <TB3> INFO: Test took 28925ms.
[13:39:53.773] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:53.784] <TB3> INFO: dacScan step from 104 .. 107


[13:40:22.848] <TB3> INFO: Test took 29064ms.
[13:40:23.111] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:23.123] <TB3> INFO: dacScan step from 108 .. 111


[13:40:52.280] <TB3> INFO: Test took 29157ms.
[13:40:52.539] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:52.553] <TB3> INFO: dacScan step from 112 .. 115


[13:41:21.849] <TB3> INFO: Test took 29296ms.
[13:41:22.078] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:22.090] <TB3> INFO: dacScan step from 116 .. 119



[13:41:51.398] <TB3> INFO: Test took 29308ms.
[13:41:51.625] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:51.637] <TB3> INFO: dacScan step from 120 .. 123
[13:42:20.609] <TB3> INFO: Test took 28972ms.
[13:42:20.833] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:20.846] <TB3> INFO: dacScan step from 124 .. 127
[13:42:49.654] <TB3> INFO: Test took 28808ms.
[13:42:49.924] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:49.940] <TB3> INFO: dacScan step from 128 .. 131
[13:43:18.983] <TB3> INFO: Test took 29042ms.
[13:43:19.224] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:19.237] <TB3> INFO: dacScan step from 132 .. 135
[13:43:48.235] <TB3> INFO: Test took 28998ms.
[13:43:48.475] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:48.487] <TB3> INFO: dacScan step from 136 .. 139
[13:44:17.383] <TB3> INFO: Test took 28896ms.
[13:44:17.607] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:17.619] <TB3> INFO: dacScan step from 140 .. 143
[13:44:46.628] <TB3> INFO: Test took 29008ms.
[13:44:46.847] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:46.859] <TB3> INFO: dacScan step from 144 .. 147
[13:45:14.223] <TB3> INFO: Test took 27364ms.
[13:45:14.553] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:14.566] <TB3> INFO: dacScan step from 148 .. 149
[13:45:29.574] <TB3> INFO: Test took 15008ms.
[13:45:29.708] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:29.717] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:31.250] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:32.733] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:34.199] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:35.655] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:37.201] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:38.850] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:40.457] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:42.221] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:43.908] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:45.450] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:46.955] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:48.501] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:49.999] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:51.484] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:52.910] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:54.409] <TB3> INFO: PixTestScurves::scurves() done
[13:45:54.409] <TB3> INFO: Vcal mean: 84.26 92.60 81.95 106.96 78.35 85.25 97.32 84.11 84.26 71.99 76.49 78.81 91.04 88.20 87.24 87.52
[13:45:54.409] <TB3> INFO: Vcal RMS: 5.24 6.36 5.42 6.14 4.16 4.80 5.57 4.95 5.27 4.54 4.70 4.10 5.79 5.95 5.22 6.27
[13:45:54.409] <TB3> INFO: PixTestScurves::fullTest() done, duration: 909 seconds
[13:45:54.482] <TB3> INFO: ######################################################################
[13:45:54.482] <TB3> INFO: PixTestTrim::doTest()
[13:45:54.482] <TB3> INFO: ######################################################################
[13:45:54.483] <TB3> INFO: ----------------------------------------------------------------------
[13:45:54.483] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:45:54.483] <TB3> INFO: ----------------------------------------------------------------------
[13:45:54.563] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:45:54.563] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:45:54.571] <TB3> INFO: dacScan step from 0 .. 19
[13:46:09.507] <TB3> INFO: Test took 14936ms.
[13:46:09.534] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:09.534] <TB3> INFO: dacScan step from 20 .. 39
[13:46:24.458] <TB3> INFO: Test took 14924ms.
[13:46:24.484] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:24.484] <TB3> INFO: dacScan step from 40 .. 59
[13:46:38.772] <TB3> INFO: Test took 14288ms.
[13:46:38.792] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:38.792] <TB3> INFO: dacScan step from 60 .. 79
[13:46:53.922] <TB3> INFO: Test took 15130ms.
[13:46:53.946] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:53.946] <TB3> INFO: dacScan step from 80 .. 99
[13:47:09.109] <TB3> INFO: Test took 15162ms.
[13:47:09.180] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:09.188] <TB3> INFO: dacScan step from 100 .. 119
[13:47:27.552] <TB3> INFO: Test took 18363ms.
[13:47:27.719] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:27.753] <TB3> INFO: dacScan step from 120 .. 139
[13:47:45.487] <TB3> INFO: Test took 17734ms.
[13:47:45.629] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:45.656] <TB3> INFO: dacScan step from 140 .. 159
[13:48:01.704] <TB3> INFO: Test took 16048ms.
[13:48:01.770] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:23.710] <TB3> INFO: ROC 0 VthrComp = 93
[13:48:23.710] <TB3> INFO: ROC 1 VthrComp = 93
[13:48:23.710] <TB3> INFO: ROC 2 VthrComp = 87
[13:48:23.710] <TB3> INFO: ROC 3 VthrComp = 103
[13:48:23.710] <TB3> INFO: ROC 4 VthrComp = 83
[13:48:23.710] <TB3> INFO: ROC 5 VthrComp = 98
[13:48:23.710] <TB3> INFO: ROC 6 VthrComp = 93
[13:48:23.711] <TB3> INFO: ROC 7 VthrComp = 90
[13:48:23.711] <TB3> INFO: ROC 8 VthrComp = 87
[13:48:23.711] <TB3> INFO: ROC 9 VthrComp = 77
[13:48:23.711] <TB3> INFO: ROC 10 VthrComp = 81
[13:48:23.711] <TB3> INFO: ROC 11 VthrComp = 85
[13:48:23.711] <TB3> INFO: ROC 12 VthrComp = 94
[13:48:23.711] <TB3> INFO: ROC 13 VthrComp = 92
[13:48:23.711] <TB3> INFO: ROC 14 VthrComp = 93
[13:48:23.711] <TB3> INFO: ROC 15 VthrComp = 92
[13:48:23.712] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:48:23.712] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:48:23.724] <TB3> INFO: dacScan step from 0 .. 19
[13:48:38.071] <TB3> INFO: Test took 14347ms.
[13:48:38.095] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:38.095] <TB3> INFO: dacScan step from 20 .. 39
[13:48:52.662] <TB3> INFO: Test took 14566ms.
[13:48:52.704] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:52.708] <TB3> INFO: dacScan step from 40 .. 59
[13:49:10.399] <TB3> INFO: Test took 17691ms.
[13:49:10.621] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:10.680] <TB3> INFO: dacScan step from 60 .. 79
[13:49:29.418] <TB3> INFO: Test took 18738ms.
[13:49:29.576] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:29.640] <TB3> INFO: dacScan step from 80 .. 99
[13:49:48.629] <TB3> INFO: Test took 18989ms.
[13:49:48.792] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:48.851] <TB3> INFO: dacScan step from 100 .. 119
[13:50:08.940] <TB3> INFO: Test took 20089ms.
[13:50:09.116] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:09.174] <TB3> INFO: dacScan step from 120 .. 139
[13:50:28.155] <TB3> INFO: Test took 18981ms.
[13:50:28.339] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:28.395] <TB3> INFO: dacScan step from 140 .. 159
[13:50:47.157] <TB3> INFO: Test took 18761ms.
[13:50:47.329] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:12.075] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.965 for pixel 0/41 mean/min/max = 44.9811/31.8372/58.125
[13:51:12.075] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 63.6905 for pixel 0/35 mean/min/max = 47.7455/31.5447/63.9463
[13:51:12.075] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 60.7994 for pixel 0/21 mean/min/max = 46.1567/31.4041/60.9092
[13:51:12.075] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 65.612 for pixel 0/25 mean/min/max = 48.8868/32.0853/65.6883
[13:51:12.076] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 57.1024 for pixel 51/45 mean/min/max = 44.9538/32.7371/57.1704
[13:51:12.076] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 55.4826 for pixel 51/11 mean/min/max = 43.3301/30.8169/55.8433
[13:51:12.076] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 63.5847 for pixel 16/1 mean/min/max = 47.9797/32.3079/63.6514
[13:51:12.077] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 58.583 for pixel 0/62 mean/min/max = 45.4669/32.3003/58.6336
[13:51:12.077] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.4665 for pixel 13/42 mean/min/max = 45.6532/31.8234/59.4829
[13:51:12.077] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 57.7758 for pixel 34/0 mean/min/max = 46.467/35.1501/57.784
[13:51:12.077] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 58.2812 for pixel 51/67 mean/min/max = 45.3476/32.1988/58.4965
[13:51:12.077] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.1706 for pixel 20/73 mean/min/max = 45.0063/32.7342/57.2783
[13:51:12.078] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.0723 for pixel 0/31 mean/min/max = 46.1192/31.945/60.2934
[13:51:12.078] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 61.485 for pixel 2/79 mean/min/max = 46.3592/31.2228/61.4955
[13:51:12.078] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.6171 for pixel 6/55 mean/min/max = 45.3793/32.1083/58.6502
[13:51:12.079] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 62.1289 for pixel 6/79 mean/min/max = 46.4072/30.5521/62.2623
[13:51:12.079] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:43.677] <TB3> INFO: Test took 91598ms.
[13:52:45.045] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:52:45.053] <TB3> INFO: dacScan step from 0 .. 19
[13:53:07.772] <TB3> INFO: Test took 22719ms.
[13:53:07.818] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:07.819] <TB3> INFO: dacScan step from 20 .. 39
[13:53:35.879] <TB3> INFO: Test took 28060ms.
[13:53:36.097] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:36.127] <TB3> INFO: dacScan step from 40 .. 59





[13:54:08.891] <TB3> INFO: Test took 32764ms.
[13:54:09.160] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:09.218] <TB3> INFO: dacScan step from 60 .. 79


[13:54:42.054] <TB3> INFO: Test took 32836ms.
[13:54:42.338] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:42.394] <TB3> INFO: dacScan step from 80 .. 99


[13:55:15.433] <TB3> INFO: Test took 33039ms.
[13:55:15.728] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:15.790] <TB3> INFO: dacScan step from 100 .. 119

[13:55:48.745] <TB3> INFO: Test took 32955ms.
[13:55:49.036] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:49.096] <TB3> INFO: dacScan step from 120 .. 139



[13:56:22.084] <TB3> INFO: Test took 32989ms.
[13:56:22.354] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:22.412] <TB3> INFO: dacScan step from 140 .. 159



[13:56:55.500] <TB3> INFO: Test took 33088ms.
[13:56:55.777] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:55.833] <TB3> INFO: dacScan step from 160 .. 179
[13:57:28.910] <TB3> INFO: Test took 33077ms.
[13:57:29.192] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:29.247] <TB3> INFO: dacScan step from 180 .. 199


[13:58:00.383] <TB3> INFO: Test took 31136ms.
[13:58:00.659] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:26.450] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.055821 .. 255.000000
[13:58:26.559] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:58:26.572] <TB3> INFO: dacScan step from 0 .. 19
[13:58:40.146] <TB3> INFO: Test took 13574ms.
[13:58:40.171] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:40.171] <TB3> INFO: dacScan step from 20 .. 39
[13:58:55.009] <TB3> INFO: Test took 14838ms.
[13:58:55.091] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:55.107] <TB3> INFO: dacScan step from 40 .. 59
[13:59:12.624] <TB3> INFO: Test took 17517ms.
[13:59:12.779] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:12.832] <TB3> INFO: dacScan step from 60 .. 79
[13:59:30.490] <TB3> INFO: Test took 17658ms.
[13:59:30.638] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:30.698] <TB3> INFO: dacScan step from 80 .. 99
[13:59:47.262] <TB3> INFO: Test took 16563ms.
[13:59:47.403] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:47.461] <TB3> INFO: dacScan step from 100 .. 119
[14:00:04.010] <TB3> INFO: Test took 16549ms.
[14:00:04.152] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:04.211] <TB3> INFO: dacScan step from 120 .. 139
[14:00:21.516] <TB3> INFO: Test took 17305ms.
[14:00:21.655] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:21.714] <TB3> INFO: dacScan step from 140 .. 159
[14:00:38.095] <TB3> INFO: Test took 16381ms.
[14:00:38.237] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:38.296] <TB3> INFO: dacScan step from 160 .. 179
[14:00:55.994] <TB3> INFO: Test took 17698ms.
[14:00:56.163] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:56.226] <TB3> INFO: dacScan step from 180 .. 199
[14:01:14.611] <TB3> INFO: Test took 18385ms.
[14:01:14.761] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:14.817] <TB3> INFO: dacScan step from 200 .. 219
[14:01:32.362] <TB3> INFO: Test took 17545ms.
[14:01:32.502] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:32.560] <TB3> INFO: dacScan step from 220 .. 239
[14:01:49.639] <TB3> INFO: Test took 17079ms.
[14:01:49.777] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:49.837] <TB3> INFO: dacScan step from 240 .. 255
[14:02:03.617] <TB3> INFO: Test took 13780ms.
[14:02:03.732] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:34.997] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 15.838615 .. 46.625033
[14:02:35.073] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 56 (20) hits flags = 16 (plus default)
[14:02:35.081] <TB3> INFO: dacScan step from 5 .. 24
[14:02:48.527] <TB3> INFO: Test took 13446ms.
[14:02:48.553] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:48.553] <TB3> INFO: dacScan step from 25 .. 44
[14:03:04.204] <TB3> INFO: Test took 15651ms.
[14:03:04.316] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:04.348] <TB3> INFO: dacScan step from 45 .. 56
[14:03:15.501] <TB3> INFO: Test took 11153ms.
[14:03:15.585] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:31.774] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 20.704911 .. 42.944199
[14:03:31.870] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 52 (20) hits flags = 16 (plus default)
[14:03:31.879] <TB3> INFO: dacScan step from 10 .. 29
[14:03:45.394] <TB3> INFO: Test took 13515ms.
[14:03:45.424] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:45.425] <TB3> INFO: dacScan step from 30 .. 49
[14:04:01.137] <TB3> INFO: Test took 15712ms.
[14:04:01.271] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:01.323] <TB3> INFO: dacScan step from 50 .. 52
[14:04:06.244] <TB3> INFO: Test took 4921ms.
[14:04:06.268] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:21.847] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 10.297082 .. 42.944199
[14:04:21.924] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 0 .. 52 (20) hits flags = 16 (plus default)
[14:04:21.933] <TB3> INFO: dacScan step from 0 .. 19
[14:04:34.909] <TB3> INFO: Test took 12975ms.
[14:04:34.930] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:34.930] <TB3> INFO: dacScan step from 20 .. 39
[14:04:48.733] <TB3> INFO: Test took 13803ms.
[14:04:48.801] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:48.819] <TB3> INFO: dacScan step from 40 .. 52
[14:05:00.509] <TB3> INFO: Test took 11690ms.
[14:05:00.606] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:16.632] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:05:16.632] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:05:16.641] <TB3> INFO: dacScan step from 15 .. 34
[14:05:39.884] <TB3> INFO: Test took 23243ms.
[14:05:39.954] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:39.963] <TB3> INFO: dacScan step from 35 .. 54



[14:06:11.115] <TB3> INFO: Test took 31152ms.
[14:06:11.420] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:11.482] <TB3> INFO: dacScan step from 55 .. 55
[14:06:15.662] <TB3> INFO: Test took 4180ms.
[14:06:15.677] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:29.535] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:06:29.535] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:06:29.535] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:06:29.535] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:06:29.535] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:06:29.535] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:06:29.536] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:06:29.536] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C0.dat
[14:06:29.543] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C1.dat
[14:06:29.549] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C2.dat
[14:06:29.556] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C3.dat
[14:06:29.562] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C4.dat
[14:06:29.569] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C5.dat
[14:06:29.576] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C6.dat
[14:06:29.582] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C7.dat
[14:06:29.589] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C8.dat
[14:06:29.597] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C9.dat
[14:06:29.606] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C10.dat
[14:06:29.614] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C11.dat
[14:06:29.622] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C12.dat
[14:06:29.629] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C13.dat
[14:06:29.635] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C14.dat
[14:06:29.641] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C15.dat
[14:06:29.647] <TB3> INFO: PixTestTrim::trimTest() done
[14:06:29.647] <TB3> INFO: vtrim: 109 120 108 115 84 115 124 94 100 100 83 109 91 107 108 113
[14:06:29.647] <TB3> INFO: vthrcomp: 93 93 87 103 83 98 93 90 87 77 81 85 94 92 93 92
[14:06:29.647] <TB3> INFO: vcal mean: 34.98 35.03 35.07 35.01 35.05 34.99 35.09 35.03 35.04 34.99 35.05 35.09 35.06 35.06 35.07 35.04
[14:06:29.647] <TB3> INFO: vcal RMS: 0.96 1.32 1.01 1.12 0.97 0.97 1.14 0.99 1.05 0.97 0.98 0.96 1.11 1.06 1.03 1.15
[14:06:29.647] <TB3> INFO: bits mean: 9.79 9.30 9.22 9.12 9.60 10.32 9.77 9.23 9.59 9.01 8.89 9.93 9.21 9.17 10.01 9.69
[14:06:29.647] <TB3> INFO: bits RMS: 2.65 2.70 2.85 2.60 2.58 2.57 2.37 2.78 2.65 2.43 2.96 2.46 2.78 2.86 2.50 2.76
[14:06:29.655] <TB3> INFO: ----------------------------------------------------------------------
[14:06:29.655] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[14:06:29.655] <TB3> INFO: ----------------------------------------------------------------------
[14:06:29.657] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:06:29.666] <TB3> INFO: dacScan step from 0 .. 19
[14:06:52.325] <TB3> INFO: Test took 22659ms.
[14:06:52.360] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:52.360] <TB3> INFO: dacScan step from 20 .. 39
[14:07:13.769] <TB3> INFO: Test took 21409ms.
[14:07:13.803] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:13.803] <TB3> INFO: dacScan step from 40 .. 59
[14:07:36.004] <TB3> INFO: Test took 22201ms.
[14:07:36.039] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:36.039] <TB3> INFO: dacScan step from 60 .. 79
[14:07:58.736] <TB3> INFO: Test took 22697ms.
[14:07:58.775] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:58.775] <TB3> INFO: dacScan step from 80 .. 99
[14:08:21.588] <TB3> INFO: Test took 22813ms.
[14:08:21.657] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:21.661] <TB3> INFO: dacScan step from 100 .. 119
[14:08:50.887] <TB3> INFO: Test took 29226ms.
[14:08:51.116] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:51.141] <TB3> INFO: dacScan step from 120 .. 139


[14:09:21.375] <TB3> INFO: Test took 30234ms.
[14:09:21.654] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:21.703] <TB3> INFO: dacScan step from 140 .. 159



[14:09:54.825] <TB3> INFO: Test took 33121ms.
[14:09:55.094] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:55.148] <TB3> INFO: dacScan step from 160 .. 179
[14:10:27.718] <TB3> INFO: Test took 32570ms.
[14:10:28.147] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:28.205] <TB3> INFO: dacScan step from 180 .. 199
[14:11:01.667] <TB3> INFO: Test took 33462ms.
[14:11:01.943] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:27.800] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 171 (20) hits flags = 16 (plus default)
[14:11:27.810] <TB3> INFO: dacScan step from 0 .. 19
[14:11:49.538] <TB3> INFO: Test took 21728ms.
[14:11:49.584] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:49.584] <TB3> INFO: dacScan step from 20 .. 39
[14:12:12.203] <TB3> INFO: Test took 22619ms.
[14:12:12.240] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:12.240] <TB3> INFO: dacScan step from 40 .. 59
[14:12:34.759] <TB3> INFO: Test took 22519ms.
[14:12:34.798] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:34.798] <TB3> INFO: dacScan step from 60 .. 79
[14:12:57.522] <TB3> INFO: Test took 22724ms.
[14:12:57.565] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:57.565] <TB3> INFO: dacScan step from 80 .. 99
[14:13:21.074] <TB3> INFO: Test took 23509ms.
[14:13:21.203] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:21.214] <TB3> INFO: dacScan step from 100 .. 119





[14:13:52.038] <TB3> INFO: Test took 30824ms.
[14:13:52.308] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:52.343] <TB3> INFO: dacScan step from 120 .. 139
[14:14:25.319] <TB3> INFO: Test took 32976ms.
[14:14:25.594] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:25.658] <TB3> INFO: dacScan step from 140 .. 159
[14:14:58.463] <TB3> INFO: Test took 32805ms.
[14:14:58.753] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:58.807] <TB3> INFO: dacScan step from 160 .. 171
[14:15:19.694] <TB3> INFO: Test took 20887ms.
[14:15:19.862] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:44.530] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[14:15:44.539] <TB3> INFO: dacScan step from 0 .. 19
[14:16:07.138] <TB3> INFO: Test took 22599ms.
[14:16:07.176] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:07.176] <TB3> INFO: dacScan step from 20 .. 39
[14:16:29.867] <TB3> INFO: Test took 22691ms.
[14:16:29.905] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:29.905] <TB3> INFO: dacScan step from 40 .. 59
[14:16:52.572] <TB3> INFO: Test took 22667ms.
[14:16:52.607] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:52.607] <TB3> INFO: dacScan step from 60 .. 79
[14:17:13.725] <TB3> INFO: Test took 21118ms.
[14:17:13.762] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:13.763] <TB3> INFO: dacScan step from 80 .. 99
[14:17:39.289] <TB3> INFO: Test took 25526ms.
[14:17:39.432] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:39.443] <TB3> INFO: dacScan step from 100 .. 119


[14:18:10.569] <TB3> INFO: Test took 31126ms.
[14:18:10.849] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:10.899] <TB3> INFO: dacScan step from 120 .. 139

[14:18:41.642] <TB3> INFO: Test took 30743ms.
[14:18:41.921] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:41.978] <TB3> INFO: dacScan step from 140 .. 158
[14:19:10.760] <TB3> INFO: Test took 28782ms.
[14:19:11.073] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:34.176] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[14:19:34.185] <TB3> INFO: dacScan step from 0 .. 19
[14:19:56.903] <TB3> INFO: Test took 22718ms.
[14:19:56.937] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:56.937] <TB3> INFO: dacScan step from 20 .. 39
[14:20:19.511] <TB3> INFO: Test took 22573ms.
[14:20:19.545] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:19.545] <TB3> INFO: dacScan step from 40 .. 59
[14:20:42.102] <TB3> INFO: Test took 22557ms.
[14:20:42.137] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:42.137] <TB3> INFO: dacScan step from 60 .. 79
[14:21:04.840] <TB3> INFO: Test took 22703ms.
[14:21:04.878] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:04.878] <TB3> INFO: dacScan step from 80 .. 99
[14:21:28.452] <TB3> INFO: Test took 23574ms.
[14:21:28.581] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:28.594] <TB3> INFO: dacScan step from 100 .. 119





[14:22:00.305] <TB3> INFO: Test took 31710ms.
[14:22:00.588] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:00.626] <TB3> INFO: dacScan step from 120 .. 139


[14:22:33.583] <TB3> INFO: Test took 32957ms.
[14:22:33.883] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:33.941] <TB3> INFO: dacScan step from 140 .. 158
[14:23:04.176] <TB3> INFO: Test took 30235ms.
[14:23:04.598] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:27.586] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[14:23:27.595] <TB3> INFO: dacScan step from 0 .. 19
[14:23:50.208] <TB3> INFO: Test took 22613ms.
[14:23:50.246] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:50.246] <TB3> INFO: dacScan step from 20 .. 39
[14:24:12.835] <TB3> INFO: Test took 22589ms.
[14:24:12.871] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:12.871] <TB3> INFO: dacScan step from 40 .. 59
[14:24:35.510] <TB3> INFO: Test took 22639ms.
[14:24:35.546] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:35.547] <TB3> INFO: dacScan step from 60 .. 79
[14:24:58.110] <TB3> INFO: Test took 22563ms.
[14:24:58.148] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:58.148] <TB3> INFO: dacScan step from 80 .. 99
[14:25:22.040] <TB3> INFO: Test took 23892ms.
[14:25:22.178] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:22.190] <TB3> INFO: dacScan step from 100 .. 119


[14:25:53.993] <TB3> INFO: Test took 31803ms.
[14:25:54.273] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:54.310] <TB3> INFO: dacScan step from 120 .. 139





[14:26:27.307] <TB3> INFO: Test took 32997ms.
[14:26:27.621] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:27.676] <TB3> INFO: dacScan step from 140 .. 158
[14:26:59.182] <TB3> INFO: Test took 31506ms.
[14:26:59.439] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:22.715] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:27:22.716] <TB3> INFO: PixTestTrim::doTest() done, duration: 2488 seconds
[14:27:23.421] <TB3> INFO: ######################################################################
[14:27:23.421] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:27:23.422] <TB3> INFO: ######################################################################
[14:27:26.716] <TB3> INFO: Test took 3293ms.
[14:27:26.733] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:30.210] <TB3> INFO: Test took 3280ms.
[14:27:30.270] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:33.603] <TB3> INFO: Test took 3322ms.
[14:27:33.702] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:33.713] <TB3> INFO: The DUT currently contains the following objects:
[14:27:33.713] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:33.713] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:33.713] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:33.713] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:33.713] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:33.713] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.816] <TB3> INFO: Test took 1103ms.
[14:27:34.817] <TB3> INFO: The DUT currently contains the following objects:
[14:27:34.817] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:34.817] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:34.817] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:34.817] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:34.817] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:34.817] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.920] <TB3> INFO: Test took 1103ms.
[14:27:35.921] <TB3> INFO: The DUT currently contains the following objects:
[14:27:35.921] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:35.921] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:35.921] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:35.921] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:35.921] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:35.921] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.024] <TB3> INFO: Test took 1103ms.
[14:27:37.025] <TB3> INFO: The DUT currently contains the following objects:
[14:27:37.025] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:37.025] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:37.025] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:37.025] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:37.025] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:37.025] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.128] <TB3> INFO: Test took 1103ms.
[14:27:38.129] <TB3> INFO: The DUT currently contains the following objects:
[14:27:38.129] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:38.129] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:38.129] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:38.129] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:38.129] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.129] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.130] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.130] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:38.130] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.232] <TB3> INFO: Test took 1102ms.
[14:27:39.233] <TB3> INFO: The DUT currently contains the following objects:
[14:27:39.233] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:39.233] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:39.233] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:39.233] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:39.233] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.233] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.233] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.233] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.233] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.233] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.233] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.233] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.234] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.234] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.234] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.234] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.234] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.234] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.234] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:39.234] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.337] <TB3> INFO: Test took 1103ms.
[14:27:40.338] <TB3> INFO: The DUT currently contains the following objects:
[14:27:40.338] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:40.338] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:40.338] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:40.338] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:40.338] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:40.338] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.438] <TB3> INFO: Test took 1100ms.
[14:27:41.439] <TB3> INFO: The DUT currently contains the following objects:
[14:27:41.439] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:41.439] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:41.439] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:41.439] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:41.439] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:41.439] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.540] <TB3> INFO: Test took 1101ms.
[14:27:42.540] <TB3> INFO: The DUT currently contains the following objects:
[14:27:42.540] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:42.540] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:42.540] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:42.540] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:42.540] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.540] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.540] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.540] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.540] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.540] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.540] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:42.541] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.642] <TB3> INFO: Test took 1101ms.
[14:27:43.643] <TB3> INFO: The DUT currently contains the following objects:
[14:27:43.643] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:43.643] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:43.643] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:43.643] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:43.643] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:43.643] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: Test took 1102ms.
[14:27:44.745] <TB3> INFO: The DUT currently contains the following objects:
[14:27:44.745] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:44.745] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:44.745] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:44.745] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:44.745] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:44.745] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.846] <TB3> INFO: Test took 1101ms.
[14:27:45.847] <TB3> INFO: The DUT currently contains the following objects:
[14:27:45.847] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:45.847] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:45.847] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:45.847] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:45.847] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:45.847] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: Test took 1101ms.
[14:27:46.948] <TB3> INFO: The DUT currently contains the following objects:
[14:27:46.948] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:46.948] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:46.948] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:46.948] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:46.948] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.948] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.949] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.949] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.949] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.949] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.049] <TB3> INFO: Test took 1100ms.
[14:27:48.050] <TB3> INFO: The DUT currently contains the following objects:
[14:27:48.050] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:48.050] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:48.050] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:48.050] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:48.050] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.050] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.151] <TB3> INFO: Test took 1101ms.
[14:27:49.152] <TB3> INFO: The DUT currently contains the following objects:
[14:27:49.152] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:49.152] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:49.152] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:49.152] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:49.152] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.152] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.272] <TB3> INFO: Test took 1120ms.
[14:27:50.274] <TB3> INFO: The DUT currently contains the following objects:
[14:27:50.274] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:50.274] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:27:50.274] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:27:50.274] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:50.274] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.274] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.275] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.275] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.275] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.275] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.275] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.275] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:51.382] <TB3> INFO: Test took 1107ms.
[14:27:51.386] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:31:35.079] <TB3> INFO: Test took 223693ms.
[14:31:36.666] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:16.176] <TB3> INFO: Test took 219510ms.
[14:35:18.084] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.092] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.099] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.107] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:18.114] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:18.121] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:35:18.128] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.136] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.143] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.151] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:18.158] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.165] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.172] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.179] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.186] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:18.194] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:18.203] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:35:18.211] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.219] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.228] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.236] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.243] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.250] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:18.291] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:35:18.291] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:35:18.291] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:35:18.292] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:35:18.292] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:35:18.292] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:35:18.292] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:35:18.292] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:35:18.292] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:35:18.292] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:35:18.293] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:35:18.293] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:35:18.293] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:35:18.293] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:35:18.293] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:35:18.293] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:35:21.778] <TB3> INFO: Test took 3482ms.
[14:35:25.483] <TB3> INFO: Test took 3426ms.
[14:35:29.226] <TB3> INFO: Test took 3468ms.
[14:35:29.509] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:30.430] <TB3> INFO: Test took 921ms.
[14:35:30.434] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:31.544] <TB3> INFO: Test took 1110ms.
[14:35:31.547] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:32.655] <TB3> INFO: Test took 1108ms.
[14:35:32.659] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:33.775] <TB3> INFO: Test took 1116ms.
[14:35:33.778] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:34.879] <TB3> INFO: Test took 1101ms.
[14:35:34.881] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:35.985] <TB3> INFO: Test took 1104ms.
[14:35:35.987] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:37.095] <TB3> INFO: Test took 1108ms.
[14:35:37.099] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:38.207] <TB3> INFO: Test took 1108ms.
[14:35:38.211] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:39.314] <TB3> INFO: Test took 1103ms.
[14:35:39.317] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:40.426] <TB3> INFO: Test took 1109ms.
[14:35:40.430] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:41.538] <TB3> INFO: Test took 1108ms.
[14:35:41.542] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:42.650] <TB3> INFO: Test took 1108ms.
[14:35:42.653] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:43.761] <TB3> INFO: Test took 1108ms.
[14:35:43.766] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:44.872] <TB3> INFO: Test took 1106ms.
[14:35:44.876] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:45.985] <TB3> INFO: Test took 1109ms.
[14:35:45.989] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:47.098] <TB3> INFO: Test took 1109ms.
[14:35:47.101] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:48.209] <TB3> INFO: Test took 1108ms.
[14:35:48.213] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:49.321] <TB3> INFO: Test took 1109ms.
[14:35:49.325] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:50.433] <TB3> INFO: Test took 1108ms.
[14:35:50.437] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:51.545] <TB3> INFO: Test took 1108ms.
[14:35:51.550] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:52.658] <TB3> INFO: Test took 1108ms.
[14:35:52.662] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:53.769] <TB3> INFO: Test took 1107ms.
[14:35:53.773] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:54.882] <TB3> INFO: Test took 1109ms.
[14:35:54.886] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:55.993] <TB3> INFO: Test took 1107ms.
[14:35:55.996] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:57.105] <TB3> INFO: Test took 1109ms.
[14:35:57.110] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:58.218] <TB3> INFO: Test took 1109ms.
[14:35:58.223] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:59.331] <TB3> INFO: Test took 1109ms.
[14:35:59.334] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:00.443] <TB3> INFO: Test took 1109ms.
[14:36:00.447] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:01.556] <TB3> INFO: Test took 1110ms.
[14:36:01.560] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:02.670] <TB3> INFO: Test took 1110ms.
[14:36:02.675] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:03.782] <TB3> INFO: Test took 1108ms.
[14:36:03.786] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:04.894] <TB3> INFO: Test took 1108ms.
[14:36:05.433] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 522 seconds
[14:36:05.434] <TB3> INFO: PH scale (per ROC): 86 76 85 71 90 92 77 81 93 80 84 91 90 87 83 82
[14:36:05.434] <TB3> INFO: PH offset (per ROC): 150 171 176 156 156 144 167 157 163 149 159 153 171 153 156 158
[14:36:05.620] <TB3> INFO: ######################################################################
[14:36:05.620] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:36:05.620] <TB3> INFO: ######################################################################
[14:36:05.631] <TB3> INFO: scanning low vcal = 10
[14:36:09.476] <TB3> INFO: Test took 3845ms.
[14:36:09.482] <TB3> INFO: scanning low vcal = 20
[14:36:13.342] <TB3> INFO: Test took 3860ms.
[14:36:13.347] <TB3> INFO: scanning low vcal = 30
[14:36:17.231] <TB3> INFO: Test took 3884ms.
[14:36:17.248] <TB3> INFO: scanning low vcal = 40
[14:36:21.579] <TB3> INFO: Test took 4331ms.
[14:36:21.647] <TB3> INFO: scanning low vcal = 50
[14:36:26.009] <TB3> INFO: Test took 4362ms.
[14:36:26.069] <TB3> INFO: scanning low vcal = 60
[14:36:30.427] <TB3> INFO: Test took 4358ms.
[14:36:30.488] <TB3> INFO: scanning low vcal = 70
[14:36:34.783] <TB3> INFO: Test took 4295ms.
[14:36:34.839] <TB3> INFO: scanning low vcal = 80
[14:36:39.182] <TB3> INFO: Test took 4343ms.
[14:36:39.238] <TB3> INFO: scanning low vcal = 90
[14:36:43.547] <TB3> INFO: Test took 4309ms.
[14:36:43.604] <TB3> INFO: scanning low vcal = 100
[14:36:47.936] <TB3> INFO: Test took 4332ms.
[14:36:47.991] <TB3> INFO: scanning low vcal = 110
[14:36:52.342] <TB3> INFO: Test took 4351ms.
[14:36:52.400] <TB3> INFO: scanning low vcal = 120
[14:36:56.629] <TB3> INFO: Test took 4229ms.
[14:36:56.689] <TB3> INFO: scanning low vcal = 130
[14:37:01.052] <TB3> INFO: Test took 4363ms.
[14:37:01.125] <TB3> INFO: scanning low vcal = 140
[14:37:05.598] <TB3> INFO: Test took 4473ms.
[14:37:05.660] <TB3> INFO: scanning low vcal = 150
[14:37:10.036] <TB3> INFO: Test took 4376ms.
[14:37:10.097] <TB3> INFO: scanning low vcal = 160
[14:37:14.478] <TB3> INFO: Test took 4382ms.
[14:37:14.538] <TB3> INFO: scanning low vcal = 170
[14:37:18.903] <TB3> INFO: Test took 4365ms.
[14:37:19.005] <TB3> INFO: scanning low vcal = 180
[14:37:23.362] <TB3> INFO: Test took 4357ms.
[14:37:23.431] <TB3> INFO: scanning low vcal = 190
[14:37:27.908] <TB3> INFO: Test took 4477ms.
[14:37:27.964] <TB3> INFO: scanning low vcal = 200
[14:37:32.297] <TB3> INFO: Test took 4333ms.
[14:37:32.353] <TB3> INFO: scanning low vcal = 210
[14:37:36.685] <TB3> INFO: Test took 4332ms.
[14:37:36.769] <TB3> INFO: scanning low vcal = 220
[14:37:41.221] <TB3> INFO: Test took 4452ms.
[14:37:41.284] <TB3> INFO: scanning low vcal = 230
[14:37:45.552] <TB3> INFO: Test took 4268ms.
[14:37:45.613] <TB3> INFO: scanning low vcal = 240
[14:37:49.973] <TB3> INFO: Test took 4360ms.
[14:37:50.031] <TB3> INFO: scanning low vcal = 250
[14:37:54.387] <TB3> INFO: Test took 4356ms.
[14:37:54.455] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:37:58.809] <TB3> INFO: Test took 4354ms.
[14:37:58.878] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:38:03.254] <TB3> INFO: Test took 4375ms.
[14:38:03.318] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:38:07.681] <TB3> INFO: Test took 4363ms.
[14:38:07.738] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:38:12.085] <TB3> INFO: Test took 4347ms.
[14:38:12.147] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:38:16.482] <TB3> INFO: Test took 4335ms.
[14:38:17.405] <TB3> INFO: PixTestGainPedestal::measure() done
[14:38:50.905] <TB3> INFO: PixTestGainPedestal::fit() done
[14:38:50.905] <TB3> INFO: non-linearity mean: 0.952 0.950 0.959 0.957 0.956 0.958 0.959 0.952 0.958 0.954 0.950 0.950 0.955 0.962 0.954 0.953
[14:38:50.905] <TB3> INFO: non-linearity RMS: 0.005 0.007 0.005 0.007 0.006 0.004 0.005 0.007 0.006 0.005 0.007 0.006 0.006 0.006 0.006 0.006
[14:38:50.906] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:38:50.924] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:38:50.942] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:38:50.960] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:38:50.978] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:38:50.996] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:38:51.016] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:38:51.035] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:38:51.053] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:38:51.071] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:38:51.090] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:38:51.108] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:38:51.132] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:38:51.156] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:38:51.183] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:38:51.206] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2079_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:38:51.224] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 165 seconds
[14:38:51.230] <TB3> INFO: enter test to run
[14:38:51.230] <TB3> INFO: test: exit no parameter change
[14:38:52.027] <TB3> QUIET: Connection to board 170 closed.
[14:38:52.106] <TB3> INFO: pXar: this is the end, my friend