[13:27:09.436] <TB2> INFO: *** Welcome to pxar ***
[13:27:09.436] <TB2> INFO: *** Today: 2015/08/21
[13:27:09.436] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C15.dat
[13:27:09.437] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//tbmParameters_C0b.dat
[13:27:09.437] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//defaultMaskFile.dat
[13:27:09.437] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters_C15.dat
[13:27:09.535] <TB2> INFO: clk: 4
[13:27:09.535] <TB2> INFO: ctr: 4
[13:27:09.535] <TB2> INFO: sda: 19
[13:27:09.535] <TB2> INFO: tin: 9
[13:27:09.535] <TB2> INFO: level: 15
[13:27:09.535] <TB2> INFO: triggerdelay: 0
[13:27:09.535] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[13:27:09.535] <TB2> INFO: Log level: INFO
[13:27:09.544] <TB2> INFO: Found DTB DTB_WXC55Z
[13:27:09.552] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[13:27:09.555] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[13:27:09.557] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[13:27:11.095] <TB2> INFO: DUT info:
[13:27:11.095] <TB2> INFO: The DUT currently contains the following objects:
[13:27:11.095] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:27:11.095] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:27:11.095] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:27:11.095] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:27:11.095] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.095] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.096] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.096] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:11.497] <TB2> INFO: enter 'restricted' command line mode
[13:27:11.497] <TB2> INFO: enter test to run
[13:27:11.497] <TB2> INFO: test: pretest no parameter change
[13:27:11.497] <TB2> INFO: running: pretest
[13:27:11.505] <TB2> INFO: ######################################################################
[13:27:11.505] <TB2> INFO: PixTestPretest::doTest()
[13:27:11.506] <TB2> INFO: ######################################################################
[13:27:11.507] <TB2> INFO: ----------------------------------------------------------------------
[13:27:11.507] <TB2> INFO: PixTestPretest::programROC()
[13:27:11.507] <TB2> INFO: ----------------------------------------------------------------------
[13:27:29.524] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:27:29.525] <TB2> INFO: IA differences per ROC: 16.9 19.3 17.7 16.1 20.9 20.9 18.5 18.5 19.3 18.5 17.7 18.5 19.3 20.1 20.1 20.1
[13:27:29.602] <TB2> INFO: ----------------------------------------------------------------------
[13:27:29.602] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:27:29.602] <TB2> INFO: ----------------------------------------------------------------------
[13:27:35.085] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 407.6 mA = 25.475 mA/ROC
[13:27:35.088] <TB2> INFO: ----------------------------------------------------------------------
[13:27:35.088] <TB2> INFO: PixTestPretest::findWorkingPixel()
[13:27:35.088] <TB2> INFO: ----------------------------------------------------------------------
[13:27:43.579] <TB2> INFO: Test took 8486ms.
[13:27:43.877] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:27:43.911] <TB2> INFO: ----------------------------------------------------------------------
[13:27:43.911] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[13:27:43.911] <TB2> INFO: ----------------------------------------------------------------------
[13:27:52.292] <TB2> INFO: Test took 8375ms.
[13:27:52.590] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[13:27:52.590] <TB2> INFO: CalDel: 153 154 125 140 143 140 117 142 145 148 150 137 125 134 151 146
[13:27:52.590] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 52
[13:27:52.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C0.dat
[13:27:52.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C1.dat
[13:27:52.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C2.dat
[13:27:52.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C3.dat
[13:27:52.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C4.dat
[13:27:52.596] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C5.dat
[13:27:52.596] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C6.dat
[13:27:52.596] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C7.dat
[13:27:52.596] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C8.dat
[13:27:52.597] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C9.dat
[13:27:52.597] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C10.dat
[13:27:52.597] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C11.dat
[13:27:52.597] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C12.dat
[13:27:52.598] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C13.dat
[13:27:52.598] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C14.dat
[13:27:52.598] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C15.dat
[13:27:52.598] <TB2> INFO: PixTestPretest::doTest() done, duration: 41 seconds
[13:27:52.692] <TB2> INFO: enter test to run
[13:27:52.692] <TB2> INFO: test: fulltest no parameter change
[13:27:52.692] <TB2> INFO: running: fulltest
[13:27:52.692] <TB2> INFO: ######################################################################
[13:27:52.692] <TB2> INFO: PixTestFullTest::doTest()
[13:27:52.692] <TB2> INFO: ######################################################################
[13:27:52.693] <TB2> INFO: ######################################################################
[13:27:52.693] <TB2> INFO: PixTestAlive::doTest()
[13:27:52.693] <TB2> INFO: ######################################################################
[13:27:52.695] <TB2> INFO: ----------------------------------------------------------------------
[13:27:52.695] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:27:52.695] <TB2> INFO: ----------------------------------------------------------------------
[13:27:56.120] <TB2> INFO: Test took 3424ms.
[13:27:56.141] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:56.371] <TB2> INFO: PixTestAlive::aliveTest() done
[13:27:56.371] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0
[13:27:56.372] <TB2> INFO: ----------------------------------------------------------------------
[13:27:56.373] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:27:56.373] <TB2> INFO: ----------------------------------------------------------------------
[13:27:59.125] <TB2> INFO: Test took 2751ms.
[13:27:59.129] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:59.130] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:27:59.360] <TB2> INFO: PixTestAlive::maskTest() done
[13:27:59.360] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:27:59.363] <TB2> INFO: ----------------------------------------------------------------------
[13:27:59.363] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:27:59.363] <TB2> INFO: ----------------------------------------------------------------------
[13:28:02.932] <TB2> INFO: Test took 3567ms.
[13:28:02.960] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:03.189] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[13:28:03.189] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:28:03.189] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:28:03.205] <TB2> INFO: ######################################################################
[13:28:03.205] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:28:03.205] <TB2> INFO: ######################################################################
[13:28:03.208] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:28:03.220] <TB2> INFO: dacScan step from 0 .. 29
[13:28:25.404] <TB2> INFO: Test took 22184ms.
[13:28:25.442] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:25.442] <TB2> INFO: dacScan step from 30 .. 59
[13:28:47.842] <TB2> INFO: Test took 22400ms.
[13:28:47.913] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:47.920] <TB2> INFO: dacScan step from 60 .. 89
[13:29:16.737] <TB2> INFO: Test took 28817ms.
[13:29:16.987] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:17.052] <TB2> INFO: dacScan step from 90 .. 119
[13:29:46.875] <TB2> INFO: Test took 29823ms.
[13:29:47.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:47.210] <TB2> INFO: dacScan step from 120 .. 149
[13:30:13.909] <TB2> INFO: Test took 26699ms.
[13:30:14.164] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:37.692] <TB2> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[13:30:37.692] <TB2> INFO: number of dead bumps (per ROC): 3 1 0 0 0 0 0 0 0 0 0 0 1 1 0 2
[13:30:37.692] <TB2> INFO: separation cut (per ROC): 82 95 105 87 92 100 99 87 95 88 101 97 91 108 103 106
[13:30:37.763] <TB2> INFO: ######################################################################
[13:30:37.763] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[13:30:37.763] <TB2> INFO: ######################################################################
[13:30:37.763] <TB2> INFO: ----------------------------------------------------------------------
[13:30:37.763] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:30:37.763] <TB2> INFO: ----------------------------------------------------------------------
[13:30:37.763] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:30:37.772] <TB2> INFO: dacScan step from 0 .. 3
[13:30:59.158] <TB2> INFO: Test took 21386ms.
[13:30:59.187] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:59.187] <TB2> INFO: dacScan step from 4 .. 7
[13:31:20.305] <TB2> INFO: Test took 21117ms.
[13:31:20.331] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:20.331] <TB2> INFO: dacScan step from 8 .. 11
[13:31:41.942] <TB2> INFO: Test took 21611ms.
[13:31:41.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:41.968] <TB2> INFO: dacScan step from 12 .. 15
[13:32:03.231] <TB2> INFO: Test took 21262ms.
[13:32:03.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:03.257] <TB2> INFO: dacScan step from 16 .. 19
[13:32:24.112] <TB2> INFO: Test took 20854ms.
[13:32:24.139] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:24.139] <TB2> INFO: dacScan step from 20 .. 23
[13:32:45.002] <TB2> INFO: Test took 20863ms.
[13:32:45.029] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:45.029] <TB2> INFO: dacScan step from 24 .. 27
[13:33:05.594] <TB2> INFO: Test took 20565ms.
[13:33:05.621] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:05.621] <TB2> INFO: dacScan step from 28 .. 31
[13:33:26.858] <TB2> INFO: Test took 21237ms.
[13:33:26.888] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:26.888] <TB2> INFO: dacScan step from 32 .. 35
[13:33:47.795] <TB2> INFO: Test took 20907ms.
[13:33:47.820] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:47.820] <TB2> INFO: dacScan step from 36 .. 39
[13:34:09.158] <TB2> INFO: Test took 21338ms.
[13:34:09.188] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:09.189] <TB2> INFO: dacScan step from 40 .. 43
[13:34:30.151] <TB2> INFO: Test took 20962ms.
[13:34:30.178] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:30.178] <TB2> INFO: dacScan step from 44 .. 47
[13:34:51.641] <TB2> INFO: Test took 21463ms.
[13:34:51.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:51.668] <TB2> INFO: dacScan step from 48 .. 51
[13:35:12.631] <TB2> INFO: Test took 20962ms.
[13:35:12.660] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:12.660] <TB2> INFO: dacScan step from 52 .. 55
[13:35:33.785] <TB2> INFO: Test took 21125ms.
[13:35:33.816] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:33.816] <TB2> INFO: dacScan step from 56 .. 59
[13:35:54.692] <TB2> INFO: Test took 20876ms.
[13:35:54.719] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:54.719] <TB2> INFO: dacScan step from 60 .. 63
[13:36:14.814] <TB2> INFO: Test took 20095ms.
[13:36:14.841] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:14.842] <TB2> INFO: dacScan step from 64 .. 67
[13:36:34.784] <TB2> INFO: Test took 19942ms.
[13:36:34.811] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:34.812] <TB2> INFO: dacScan step from 68 .. 71
[13:36:54.252] <TB2> INFO: Test took 19440ms.
[13:36:54.280] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:54.281] <TB2> INFO: dacScan step from 72 .. 75
[13:37:14.423] <TB2> INFO: Test took 20142ms.
[13:37:14.455] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:14.455] <TB2> INFO: dacScan step from 76 .. 79
[13:37:35.876] <TB2> INFO: Test took 21421ms.
[13:37:35.910] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:35.910] <TB2> INFO: dacScan step from 80 .. 83
[13:37:58.339] <TB2> INFO: Test took 22429ms.
[13:37:58.390] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:58.392] <TB2> INFO: dacScan step from 84 .. 87
[13:38:20.408] <TB2> INFO: Test took 22016ms.
[13:38:20.486] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:20.489] <TB2> INFO: dacScan step from 88 .. 91
[13:38:44.593] <TB2> INFO: Test took 24104ms.
[13:38:44.694] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:44.699] <TB2> INFO: dacScan step from 92 .. 95
[13:39:12.317] <TB2> INFO: Test took 27618ms.
[13:39:12.455] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:12.461] <TB2> INFO: dacScan step from 96 .. 99
[13:39:41.881] <TB2> INFO: Test took 29420ms.
[13:39:42.048] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:42.057] <TB2> INFO: dacScan step from 100 .. 103
[13:40:13.521] <TB2> INFO: Test took 31464ms.
[13:40:13.712] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:13.722] <TB2> INFO: dacScan step from 104 .. 107
[13:40:45.210] <TB2> INFO: Test took 31488ms.
[13:40:45.420] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:45.431] <TB2> INFO: dacScan step from 108 .. 111
[13:41:18.005] <TB2> INFO: Test took 32574ms.
[13:41:18.230] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:18.241] <TB2> INFO: dacScan step from 112 .. 115


[13:41:50.847] <TB2> INFO: Test took 32605ms.
[13:41:51.078] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:51.091] <TB2> INFO: dacScan step from 116 .. 119


[13:42:23.651] <TB2> INFO: Test took 32560ms.
[13:42:23.873] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:23.885] <TB2> INFO: dacScan step from 120 .. 123


[13:42:56.297] <TB2> INFO: Test took 32412ms.
[13:42:56.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:56.540] <TB2> INFO: dacScan step from 124 .. 127


[13:43:29.044] <TB2> INFO: Test took 32504ms.
[13:43:29.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:29.287] <TB2> INFO: dacScan step from 128 .. 131

[13:44:01.371] <TB2> INFO: Test took 32084ms.
[13:44:01.598] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:01.610] <TB2> INFO: dacScan step from 132 .. 135





[13:44:33.671] <TB2> INFO: Test took 32061ms.
[13:44:33.903] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:33.918] <TB2> INFO: dacScan step from 136 .. 139


[13:45:05.297] <TB2> INFO: Test took 31379ms.
[13:45:05.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:05.530] <TB2> INFO: dacScan step from 140 .. 143





[13:45:35.051] <TB2> INFO: Test took 29521ms.
[13:45:35.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:35.287] <TB2> INFO: dacScan step from 144 .. 147
[13:46:06.293] <TB2> INFO: Test took 31006ms.
[13:46:06.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:06.539] <TB2> INFO: dacScan step from 148 .. 149
[13:46:23.284] <TB2> INFO: Test took 16745ms.
[13:46:23.394] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:23.400] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:24.865] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:26.246] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:27.628] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:29.032] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:30.403] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:31.763] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:33.152] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:34.534] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:36.053] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:37.539] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:38.967] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:40.462] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:41.820] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:43.186] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:44.526] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:46:45.919] <TB2> INFO: PixTestScurves::scurves() done
[13:46:45.919] <TB2> INFO: Vcal mean: 89.19 101.58 92.03 87.54 96.04 101.90 94.49 90.55 89.46 91.22 102.85 101.81 105.99 103.65 107.39 110.78
[13:46:45.919] <TB2> INFO: Vcal RMS: 5.54 6.11 5.54 5.82 5.03 5.65 6.00 5.52 5.03 5.36 6.64 5.42 5.63 5.83 5.38 5.73
[13:46:45.919] <TB2> INFO: PixTestScurves::fullTest() done, duration: 968 seconds
[13:46:45.998] <TB2> INFO: ######################################################################
[13:46:45.998] <TB2> INFO: PixTestTrim::doTest()
[13:46:45.998] <TB2> INFO: ######################################################################
[13:46:45.999] <TB2> INFO: ----------------------------------------------------------------------
[13:46:45.999] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:46:45.999] <TB2> INFO: ----------------------------------------------------------------------
[13:46:46.086] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:46:46.086] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:46:46.094] <TB2> INFO: dacScan step from 0 .. 19
[13:47:01.280] <TB2> INFO: Test took 15186ms.
[13:47:01.301] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:01.301] <TB2> INFO: dacScan step from 20 .. 39
[13:47:15.678] <TB2> INFO: Test took 14377ms.
[13:47:15.699] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:15.699] <TB2> INFO: dacScan step from 40 .. 59
[13:47:30.784] <TB2> INFO: Test took 15085ms.
[13:47:30.813] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:30.813] <TB2> INFO: dacScan step from 60 .. 79
[13:47:45.173] <TB2> INFO: Test took 14360ms.
[13:47:45.201] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:45.201] <TB2> INFO: dacScan step from 80 .. 99
[13:48:00.476] <TB2> INFO: Test took 15275ms.
[13:48:00.506] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:00.507] <TB2> INFO: dacScan step from 100 .. 119
[13:48:17.004] <TB2> INFO: Test took 16497ms.
[13:48:17.111] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:17.132] <TB2> INFO: dacScan step from 120 .. 139
[13:48:36.348] <TB2> INFO: Test took 19216ms.
[13:48:36.592] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:36.689] <TB2> INFO: dacScan step from 140 .. 159
[13:48:54.511] <TB2> INFO: Test took 17822ms.
[13:48:54.641] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:17.362] <TB2> INFO: ROC 0 VthrComp = 91
[13:49:17.362] <TB2> INFO: ROC 1 VthrComp = 102
[13:49:17.362] <TB2> INFO: ROC 2 VthrComp = 100
[13:49:17.362] <TB2> INFO: ROC 3 VthrComp = 93
[13:49:17.362] <TB2> INFO: ROC 4 VthrComp = 104
[13:49:17.362] <TB2> INFO: ROC 5 VthrComp = 106
[13:49:17.362] <TB2> INFO: ROC 6 VthrComp = 101
[13:49:17.362] <TB2> INFO: ROC 7 VthrComp = 95
[13:49:17.362] <TB2> INFO: ROC 8 VthrComp = 100
[13:49:17.362] <TB2> INFO: ROC 9 VthrComp = 97
[13:49:17.362] <TB2> INFO: ROC 10 VthrComp = 101
[13:49:17.362] <TB2> INFO: ROC 11 VthrComp = 105
[13:49:17.363] <TB2> INFO: ROC 12 VthrComp = 107
[13:49:17.363] <TB2> INFO: ROC 13 VthrComp = 105
[13:49:17.363] <TB2> INFO: ROC 14 VthrComp = 108
[13:49:17.363] <TB2> INFO: ROC 15 VthrComp = 108
[13:49:17.363] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:49:17.363] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:49:17.373] <TB2> INFO: dacScan step from 0 .. 19
[13:49:33.397] <TB2> INFO: Test took 16024ms.
[13:49:33.423] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:33.423] <TB2> INFO: dacScan step from 20 .. 39
[13:49:48.025] <TB2> INFO: Test took 14602ms.
[13:49:48.054] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:48.057] <TB2> INFO: dacScan step from 40 .. 59
[13:50:07.141] <TB2> INFO: Test took 19084ms.
[13:50:07.283] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:07.316] <TB2> INFO: dacScan step from 60 .. 79
[13:50:28.032] <TB2> INFO: Test took 20715ms.
[13:50:28.204] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:28.271] <TB2> INFO: dacScan step from 80 .. 99
[13:50:49.608] <TB2> INFO: Test took 21337ms.
[13:50:49.777] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:49.834] <TB2> INFO: dacScan step from 100 .. 119
[13:51:09.838] <TB2> INFO: Test took 20004ms.
[13:51:10.004] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:10.062] <TB2> INFO: dacScan step from 120 .. 139
[13:51:32.156] <TB2> INFO: Test took 22094ms.
[13:51:32.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:32.379] <TB2> INFO: dacScan step from 140 .. 159
[13:51:54.438] <TB2> INFO: Test took 22059ms.
[13:51:54.620] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:19.549] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 61.1763 for pixel 12/79 mean/min/max = 46.558/31.9133/61.2027
[13:52:19.550] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 62.7503 for pixel 20/76 mean/min/max = 47.2114/31.626/62.7968
[13:52:19.550] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 60.1499 for pixel 0/49 mean/min/max = 45.8816/31.6047/60.1584
[13:52:19.550] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.2112 for pixel 0/66 mean/min/max = 45.7398/32.253/59.2267
[13:52:19.551] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 58.3131 for pixel 9/0 mean/min/max = 46.275/34.2333/58.3168
[13:52:19.551] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 61.1583 for pixel 7/75 mean/min/max = 47.1207/32.982/61.2593
[13:52:19.551] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.1585 for pixel 51/59 mean/min/max = 45.431/31.6829/59.1792
[13:52:19.551] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.3602 for pixel 23/1 mean/min/max = 45.7627/31.878/59.6473
[13:52:19.552] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 56.7982 for pixel 2/78 mean/min/max = 44.0592/31.3012/56.8173
[13:52:19.552] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.7029 for pixel 0/63 mean/min/max = 45.3075/31.9065/58.7086
[13:52:19.552] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 64.881 for pixel 5/9 mean/min/max = 48.2391/31.3284/65.1497
[13:52:19.552] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.2352 for pixel 5/39 mean/min/max = 47.4553/33.5896/61.3209
[13:52:19.553] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.1273 for pixel 4/69 mean/min/max = 47.2496/33.1791/61.3201
[13:52:19.553] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 61.7846 for pixel 45/78 mean/min/max = 47.295/32.4117/62.1783
[13:52:19.553] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 62.503 for pixel 0/0 mean/min/max = 48.3083/34.0782/62.5384
[13:52:19.553] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 66.5644 for pixel 28/1 mean/min/max = 50.1429/33.6685/66.6172
[13:52:19.554] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:58.070] <TB2> INFO: Test took 98516ms.
[13:53:59.681] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:53:59.690] <TB2> INFO: dacScan step from 0 .. 19
[13:54:23.907] <TB2> INFO: Test took 24215ms.
[13:54:23.950] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:23.953] <TB2> INFO: dacScan step from 20 .. 39
[13:54:52.647] <TB2> INFO: Test took 28694ms.
[13:54:52.898] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:52.930] <TB2> INFO: dacScan step from 40 .. 59


[13:55:27.542] <TB2> INFO: Test took 34613ms.
[13:55:27.830] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:27.886] <TB2> INFO: dacScan step from 60 .. 79





[13:56:04.603] <TB2> INFO: Test took 36717ms.
[13:56:04.903] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:04.957] <TB2> INFO: dacScan step from 80 .. 99


[13:56:40.782] <TB2> INFO: Test took 35825ms.
[13:56:41.074] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:41.132] <TB2> INFO: dacScan step from 100 .. 119
[13:57:17.407] <TB2> INFO: Test took 36275ms.
[13:57:17.682] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:17.740] <TB2> INFO: dacScan step from 120 .. 139

[13:57:52.668] <TB2> INFO: Test took 34928ms.
[13:57:52.932] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:52.989] <TB2> INFO: dacScan step from 140 .. 159


[13:58:26.488] <TB2> INFO: Test took 33499ms.
[13:58:26.914] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:26.969] <TB2> INFO: dacScan step from 160 .. 179


[13:59:03.597] <TB2> INFO: Test took 36628ms.
[13:59:03.869] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:03.926] <TB2> INFO: dacScan step from 180 .. 199


[13:59:41.167] <TB2> INFO: Test took 37241ms.
[13:59:41.436] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:05.728] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.001851 .. 255.000000
[14:00:05.806] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:00:05.815] <TB2> INFO: dacScan step from 0 .. 19
[14:00:20.509] <TB2> INFO: Test took 14694ms.
[14:00:20.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:20.527] <TB2> INFO: dacScan step from 20 .. 39
[14:00:34.531] <TB2> INFO: Test took 14004ms.
[14:00:34.605] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:34.622] <TB2> INFO: dacScan step from 40 .. 59
[14:00:51.687] <TB2> INFO: Test took 17065ms.
[14:00:51.844] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:51.902] <TB2> INFO: dacScan step from 60 .. 79
[14:01:09.777] <TB2> INFO: Test took 17874ms.
[14:01:09.922] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:09.979] <TB2> INFO: dacScan step from 80 .. 99
[14:01:28.220] <TB2> INFO: Test took 18241ms.
[14:01:28.365] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:28.426] <TB2> INFO: dacScan step from 100 .. 119
[14:01:46.884] <TB2> INFO: Test took 18458ms.
[14:01:47.061] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:47.124] <TB2> INFO: dacScan step from 120 .. 139
[14:02:04.804] <TB2> INFO: Test took 17680ms.
[14:02:04.938] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:04.995] <TB2> INFO: dacScan step from 140 .. 159
[14:02:22.102] <TB2> INFO: Test took 17107ms.
[14:02:22.236] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:22.292] <TB2> INFO: dacScan step from 160 .. 179
[14:02:40.296] <TB2> INFO: Test took 18003ms.
[14:02:40.457] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:40.517] <TB2> INFO: dacScan step from 180 .. 199
[14:03:00.042] <TB2> INFO: Test took 19524ms.
[14:03:00.203] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:00.269] <TB2> INFO: dacScan step from 200 .. 219
[14:03:17.608] <TB2> INFO: Test took 17339ms.
[14:03:17.759] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:17.824] <TB2> INFO: dacScan step from 220 .. 239
[14:03:35.188] <TB2> INFO: Test took 17363ms.
[14:03:35.351] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:35.413] <TB2> INFO: dacScan step from 240 .. 255
[14:03:50.147] <TB2> INFO: Test took 14734ms.
[14:03:50.283] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:24.802] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.499996 .. 47.196314
[14:04:24.877] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 57 (20) hits flags = 16 (plus default)
[14:04:24.886] <TB2> INFO: dacScan step from 5 .. 24
[14:04:37.949] <TB2> INFO: Test took 13063ms.
[14:04:37.967] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:37.967] <TB2> INFO: dacScan step from 25 .. 44
[14:04:53.040] <TB2> INFO: Test took 15073ms.
[14:04:53.146] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:53.178] <TB2> INFO: dacScan step from 45 .. 57
[14:05:05.168] <TB2> INFO: Test took 11990ms.
[14:05:05.314] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:21.866] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 21.423529 .. 45.877217
[14:05:21.943] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 11 .. 55 (20) hits flags = 16 (plus default)
[14:05:21.952] <TB2> INFO: dacScan step from 11 .. 30
[14:05:36.117] <TB2> INFO: Test took 14165ms.
[14:05:36.142] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:36.143] <TB2> INFO: dacScan step from 31 .. 50
[14:05:54.351] <TB2> INFO: Test took 18208ms.
[14:05:54.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:54.551] <TB2> INFO: dacScan step from 51 .. 55
[14:06:01.101] <TB2> INFO: Test took 6549ms.
[14:06:01.137] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:16.763] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 3.536548 .. 44.975250
[14:06:16.849] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 3 .. 54 (20) hits flags = 16 (plus default)
[14:06:16.858] <TB2> INFO: dacScan step from 3 .. 22
[14:06:30.189] <TB2> INFO: Test took 13331ms.
[14:06:30.213] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:30.213] <TB2> INFO: dacScan step from 23 .. 42
[14:06:46.698] <TB2> INFO: Test took 16484ms.
[14:06:46.800] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:46.829] <TB2> INFO: dacScan step from 43 .. 54
[14:06:59.308] <TB2> INFO: Test took 12479ms.
[14:06:59.415] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:15.836] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:07:15.836] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:07:15.845] <TB2> INFO: dacScan step from 15 .. 34
[14:07:39.104] <TB2> INFO: Test took 23259ms.
[14:07:39.167] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:39.178] <TB2> INFO: dacScan step from 35 .. 54


[14:08:13.821] <TB2> INFO: Test took 34643ms.
[14:08:14.101] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:14.154] <TB2> INFO: dacScan step from 55 .. 55
[14:08:18.803] <TB2> INFO: Test took 4649ms.
[14:08:18.825] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:31.997] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:08:31.998] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:08:31.999] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:08:31.999] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:08:31.999] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:08:31.999] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:08:31.999] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:08:31.999] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C0.dat
[14:08:32.005] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C1.dat
[14:08:32.011] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C2.dat
[14:08:32.017] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C3.dat
[14:08:32.023] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C4.dat
[14:08:32.029] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C5.dat
[14:08:32.035] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C6.dat
[14:08:32.041] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C7.dat
[14:08:32.047] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C8.dat
[14:08:32.053] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C9.dat
[14:08:32.059] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C10.dat
[14:08:32.065] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C11.dat
[14:08:32.070] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C12.dat
[14:08:32.076] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C13.dat
[14:08:32.082] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C14.dat
[14:08:32.088] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C15.dat
[14:08:32.094] <TB2> INFO: PixTestTrim::trimTest() done
[14:08:32.094] <TB2> INFO: vtrim: 113 124 115 116 117 135 111 123 123 105 131 142 119 132 132 137
[14:08:32.094] <TB2> INFO: vthrcomp: 91 102 100 93 104 106 101 95 100 97 101 105 107 105 108 108
[14:08:32.094] <TB2> INFO: vcal mean: 35.00 35.03 35.02 35.02 35.10 35.04 34.97 35.04 35.01 34.98 35.03 35.08 35.05 35.10 35.07 35.03
[14:08:32.094] <TB2> INFO: vcal RMS: 1.04 1.25 0.95 1.16 0.98 1.02 1.13 1.01 0.97 1.15 1.10 1.02 1.17 1.05 1.02 1.08
[14:08:32.094] <TB2> INFO: bits mean: 9.57 9.79 9.50 9.65 9.20 9.28 9.72 9.86 10.40 9.54 9.59 9.36 9.05 9.50 8.69 8.77
[14:08:32.094] <TB2> INFO: bits RMS: 2.58 2.45 2.68 2.63 2.47 2.54 2.64 2.54 2.42 2.73 2.50 2.36 2.59 2.47 2.57 2.43
[14:08:32.102] <TB2> INFO: ----------------------------------------------------------------------
[14:08:32.102] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[14:08:32.102] <TB2> INFO: ----------------------------------------------------------------------
[14:08:32.104] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:08:32.114] <TB2> INFO: dacScan step from 0 .. 19
[14:08:56.595] <TB2> INFO: Test took 24481ms.
[14:08:56.639] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:56.639] <TB2> INFO: dacScan step from 20 .. 39
[14:09:18.306] <TB2> INFO: Test took 21667ms.
[14:09:18.345] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:18.345] <TB2> INFO: dacScan step from 40 .. 59
[14:09:42.249] <TB2> INFO: Test took 23904ms.
[14:09:42.288] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:42.288] <TB2> INFO: dacScan step from 60 .. 79
[14:10:05.559] <TB2> INFO: Test took 23271ms.
[14:10:05.596] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:05.596] <TB2> INFO: dacScan step from 80 .. 99
[14:10:27.877] <TB2> INFO: Test took 22281ms.
[14:10:27.917] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:27.917] <TB2> INFO: dacScan step from 100 .. 119
[14:10:53.032] <TB2> INFO: Test took 25115ms.
[14:10:53.148] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:53.160] <TB2> INFO: dacScan step from 120 .. 139
[14:11:23.857] <TB2> INFO: Test took 30697ms.
[14:11:24.182] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:24.218] <TB2> INFO: dacScan step from 140 .. 159


[14:11:56.150] <TB2> INFO: Test took 31932ms.
[14:11:56.423] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:56.471] <TB2> INFO: dacScan step from 160 .. 179





[14:12:32.007] <TB2> INFO: Test took 35536ms.
[14:12:32.284] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:32.338] <TB2> INFO: dacScan step from 180 .. 199
[14:13:07.986] <TB2> INFO: Test took 35648ms.
[14:13:08.273] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:35.769] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 185 (20) hits flags = 16 (plus default)
[14:13:35.778] <TB2> INFO: dacScan step from 0 .. 19
[14:13:59.676] <TB2> INFO: Test took 23898ms.
[14:13:59.716] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:59.716] <TB2> INFO: dacScan step from 20 .. 39
[14:14:25.053] <TB2> INFO: Test took 25337ms.
[14:14:25.090] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:25.090] <TB2> INFO: dacScan step from 40 .. 59
[14:14:49.598] <TB2> INFO: Test took 24508ms.
[14:14:49.636] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:49.636] <TB2> INFO: dacScan step from 60 .. 79
[14:15:13.081] <TB2> INFO: Test took 23445ms.
[14:15:13.118] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:13.118] <TB2> INFO: dacScan step from 80 .. 99
[14:15:37.266] <TB2> INFO: Test took 24148ms.
[14:15:37.312] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:37.313] <TB2> INFO: dacScan step from 100 .. 119
[14:16:09.296] <TB2> INFO: Test took 31982ms.
[14:16:09.480] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:09.499] <TB2> INFO: dacScan step from 120 .. 139



[14:16:44.602] <TB2> INFO: Test took 35103ms.
[14:16:44.872] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:44.922] <TB2> INFO: dacScan step from 140 .. 159


[14:17:15.567] <TB2> INFO: Test took 30645ms.
[14:17:15.952] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:16.006] <TB2> INFO: dacScan step from 160 .. 179





[14:17:51.732] <TB2> INFO: Test took 35726ms.
[14:17:52.028] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:52.084] <TB2> INFO: dacScan step from 180 .. 185
[14:18:05.369] <TB2> INFO: Test took 13285ms.
[14:18:05.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:31.446] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 182 (20) hits flags = 16 (plus default)
[14:18:31.455] <TB2> INFO: dacScan step from 0 .. 19
[14:18:55.237] <TB2> INFO: Test took 23781ms.
[14:18:55.273] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:55.273] <TB2> INFO: dacScan step from 20 .. 39
[14:19:19.695] <TB2> INFO: Test took 24422ms.
[14:19:19.742] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:19.742] <TB2> INFO: dacScan step from 40 .. 59
[14:19:42.882] <TB2> INFO: Test took 23140ms.
[14:19:42.919] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:42.919] <TB2> INFO: dacScan step from 60 .. 79
[14:20:06.217] <TB2> INFO: Test took 23298ms.
[14:20:06.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:06.257] <TB2> INFO: dacScan step from 80 .. 99
[14:20:31.758] <TB2> INFO: Test took 25501ms.
[14:20:31.811] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:31.813] <TB2> INFO: dacScan step from 100 .. 119
[14:21:03.304] <TB2> INFO: Test took 31491ms.
[14:21:03.500] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:03.524] <TB2> INFO: dacScan step from 120 .. 139





[14:21:34.356] <TB2> INFO: Test took 30832ms.
[14:21:34.650] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:34.706] <TB2> INFO: dacScan step from 140 .. 159





[14:22:10.998] <TB2> INFO: Test took 36292ms.
[14:22:11.283] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:11.336] <TB2> INFO: dacScan step from 160 .. 179





[14:22:46.525] <TB2> INFO: Test took 35189ms.
[14:22:46.800] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:46.852] <TB2> INFO: dacScan step from 180 .. 182
[14:22:54.361] <TB2> INFO: Test took 7509ms.
[14:22:54.404] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:20.966] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 173 (20) hits flags = 16 (plus default)
[14:23:20.975] <TB2> INFO: dacScan step from 0 .. 19
[14:23:43.223] <TB2> INFO: Test took 22248ms.
[14:23:43.259] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:43.259] <TB2> INFO: dacScan step from 20 .. 39
[14:24:07.374] <TB2> INFO: Test took 24115ms.
[14:24:07.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:07.409] <TB2> INFO: dacScan step from 40 .. 59
[14:24:32.725] <TB2> INFO: Test took 25315ms.
[14:24:32.760] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:32.760] <TB2> INFO: dacScan step from 60 .. 79
[14:24:57.352] <TB2> INFO: Test took 24592ms.
[14:24:57.386] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:57.386] <TB2> INFO: dacScan step from 80 .. 99
[14:25:18.778] <TB2> INFO: Test took 21392ms.
[14:25:18.823] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:18.826] <TB2> INFO: dacScan step from 100 .. 119
[14:25:49.192] <TB2> INFO: Test took 30366ms.
[14:25:49.379] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:49.400] <TB2> INFO: dacScan step from 120 .. 139





[14:26:24.665] <TB2> INFO: Test took 35265ms.
[14:26:24.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:25.019] <TB2> INFO: dacScan step from 140 .. 159



[14:26:59.808] <TB2> INFO: Test took 34789ms.
[14:27:00.074] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:00.127] <TB2> INFO: dacScan step from 160 .. 173
[14:27:25.624] <TB2> INFO: Test took 25497ms.
[14:27:25.809] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:49.391] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 175 (20) hits flags = 16 (plus default)
[14:27:49.399] <TB2> INFO: dacScan step from 0 .. 19
[14:28:12.310] <TB2> INFO: Test took 22911ms.
[14:28:12.347] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:12.347] <TB2> INFO: dacScan step from 20 .. 39
[14:28:36.973] <TB2> INFO: Test took 24626ms.
[14:28:37.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:37.008] <TB2> INFO: dacScan step from 40 .. 59
[14:28:59.005] <TB2> INFO: Test took 21997ms.
[14:28:59.041] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:59.041] <TB2> INFO: dacScan step from 60 .. 79
[14:29:21.554] <TB2> INFO: Test took 22513ms.
[14:29:21.591] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:21.591] <TB2> INFO: dacScan step from 80 .. 99
[14:29:45.182] <TB2> INFO: Test took 23590ms.
[14:29:45.236] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:45.237] <TB2> INFO: dacScan step from 100 .. 119
[14:30:14.075] <TB2> INFO: Test took 28837ms.
[14:30:14.265] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:14.285] <TB2> INFO: dacScan step from 120 .. 139

[14:30:48.822] <TB2> INFO: Test took 34537ms.
[14:30:49.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:49.131] <TB2> INFO: dacScan step from 140 .. 159


[14:31:25.515] <TB2> INFO: Test took 36384ms.
[14:31:25.791] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:25.841] <TB2> INFO: dacScan step from 160 .. 175
[14:31:56.158] <TB2> INFO: Test took 30317ms.
[14:31:56.374] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:20.213] <TB2> INFO: PixTestTrim::trimBitTest() done
[14:32:20.215] <TB2> INFO: PixTestTrim::doTest() done, duration: 2734 seconds
[14:32:20.884] <TB2> INFO: ######################################################################
[14:32:20.884] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:32:20.884] <TB2> INFO: ######################################################################
[14:32:24.655] <TB2> INFO: Test took 3770ms.
[14:32:24.679] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:28.291] <TB2> INFO: Test took 3415ms.
[14:32:28.352] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:31.838] <TB2> INFO: Test took 3476ms.
[14:32:31.900] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:31.907] <TB2> INFO: The DUT currently contains the following objects:
[14:32:31.907] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:31.907] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:31.907] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:31.907] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:31.907] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:31.907] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.015] <TB2> INFO: Test took 1108ms.
[14:32:33.016] <TB2> INFO: The DUT currently contains the following objects:
[14:32:33.016] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:33.016] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:33.016] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:33.016] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:33.016] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.016] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.017] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.017] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:33.017] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.123] <TB2> INFO: Test took 1106ms.
[14:32:34.125] <TB2> INFO: The DUT currently contains the following objects:
[14:32:34.125] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:34.125] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:34.125] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:34.125] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:34.125] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.125] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.126] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.126] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.126] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:34.126] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.247] <TB2> INFO: Test took 1121ms.
[14:32:35.248] <TB2> INFO: The DUT currently contains the following objects:
[14:32:35.248] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:35.248] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:35.248] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:35.248] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:35.248] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.248] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.248] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:35.249] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.356] <TB2> INFO: Test took 1107ms.
[14:32:36.357] <TB2> INFO: The DUT currently contains the following objects:
[14:32:36.357] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:36.357] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:36.357] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:36.357] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:36.357] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:36.357] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.493] <TB2> INFO: Test took 1136ms.
[14:32:37.494] <TB2> INFO: The DUT currently contains the following objects:
[14:32:37.494] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:37.494] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:37.494] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:37.494] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:37.494] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.494] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.494] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.494] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.494] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.494] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:37.495] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.630] <TB2> INFO: Test took 1135ms.
[14:32:38.632] <TB2> INFO: The DUT currently contains the following objects:
[14:32:38.632] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:38.632] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:38.632] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:38.632] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:38.632] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.632] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.633] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.633] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.633] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.633] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:38.633] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.754] <TB2> INFO: Test took 1121ms.
[14:32:39.755] <TB2> INFO: The DUT currently contains the following objects:
[14:32:39.755] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:39.755] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:39.755] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:39.755] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:39.755] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.755] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.755] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.755] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.755] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:39.756] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.878] <TB2> INFO: Test took 1122ms.
[14:32:40.879] <TB2> INFO: The DUT currently contains the following objects:
[14:32:40.879] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:40.879] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:40.879] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:40.879] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:40.879] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.879] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:40.880] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.017] <TB2> INFO: Test took 1137ms.
[14:32:42.020] <TB2> INFO: The DUT currently contains the following objects:
[14:32:42.020] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:42.020] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:42.020] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:42.020] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:42.020] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.020] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:42.021] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.122] <TB2> INFO: Test took 1101ms.
[14:32:43.122] <TB2> INFO: The DUT currently contains the following objects:
[14:32:43.122] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:43.122] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:43.122] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:43.122] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:43.122] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.122] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.122] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:43.123] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: Test took 1100ms.
[14:32:44.223] <TB2> INFO: The DUT currently contains the following objects:
[14:32:44.223] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:44.223] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:44.223] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:44.223] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:44.223] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.223] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.224] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:44.224] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.339] <TB2> INFO: Test took 1115ms.
[14:32:45.340] <TB2> INFO: The DUT currently contains the following objects:
[14:32:45.340] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:45.340] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:45.340] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:45.340] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:45.340] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:45.340] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.441] <TB2> INFO: Test took 1101ms.
[14:32:46.441] <TB2> INFO: The DUT currently contains the following objects:
[14:32:46.441] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:46.441] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:46.441] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:46.441] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:46.442] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:46.442] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.544] <TB2> INFO: Test took 1102ms.
[14:32:47.545] <TB2> INFO: The DUT currently contains the following objects:
[14:32:47.545] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:47.545] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:47.545] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:47.545] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:47.545] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:47.545] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.645] <TB2> INFO: Test took 1100ms.
[14:32:48.646] <TB2> INFO: The DUT currently contains the following objects:
[14:32:48.646] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:32:48.646] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:32:48.646] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:32:48.646] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:32:48.646] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:48.646] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:32:49.746] <TB2> INFO: Test took 1100ms.
[14:32:49.749] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:55.229] <TB2> INFO: Test took 245480ms.
[14:36:57.100] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:02.195] <TB2> INFO: Test took 245095ms.
[14:41:04.051] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.058] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.064] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.071] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.078] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.085] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.091] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.098] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.104] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.111] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.118] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.124] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.131] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.138] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.144] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.151] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:41:04.214] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:41:04.230] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:41:04.230] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:41:04.238] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:41:04.239] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:41:04.242] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:41:04.242] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:41:04.244] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:41:04.244] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:41:04.244] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:41:04.244] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:41:04.250] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:41:04.250] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:41:04.254] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:41:04.254] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:41:04.255] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:41:07.691] <TB2> INFO: Test took 3434ms.
[14:41:11.646] <TB2> INFO: Test took 3679ms.
[14:41:15.683] <TB2> INFO: Test took 3756ms.
[14:41:15.963] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:16.897] <TB2> INFO: Test took 934ms.
[14:41:16.900] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:18.007] <TB2> INFO: Test took 1107ms.
[14:41:18.010] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:19.145] <TB2> INFO: Test took 1135ms.
[14:41:19.148] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:20.282] <TB2> INFO: Test took 1134ms.
[14:41:20.285] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:21.388] <TB2> INFO: Test took 1103ms.
[14:41:21.390] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:22.495] <TB2> INFO: Test took 1105ms.
[14:41:22.497] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:23.619] <TB2> INFO: Test took 1122ms.
[14:41:23.623] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:24.744] <TB2> INFO: Test took 1121ms.
[14:41:24.747] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:25.854] <TB2> INFO: Test took 1107ms.
[14:41:25.857] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:26.959] <TB2> INFO: Test took 1102ms.
[14:41:26.962] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:28.096] <TB2> INFO: Test took 1134ms.
[14:41:28.100] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:29.221] <TB2> INFO: Test took 1121ms.
[14:41:29.225] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:30.346] <TB2> INFO: Test took 1122ms.
[14:41:30.350] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:31.456] <TB2> INFO: Test took 1106ms.
[14:41:31.460] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:32.562] <TB2> INFO: Test took 1103ms.
[14:41:32.565] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:33.677] <TB2> INFO: Test took 1112ms.
[14:41:33.681] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:34.793] <TB2> INFO: Test took 1112ms.
[14:41:34.797] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:35.908] <TB2> INFO: Test took 1111ms.
[14:41:35.912] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:37.035] <TB2> INFO: Test took 1123ms.
[14:41:37.039] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:38.151] <TB2> INFO: Test took 1112ms.
[14:41:38.156] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:39.295] <TB2> INFO: Test took 1140ms.
[14:41:39.300] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:40.411] <TB2> INFO: Test took 1111ms.
[14:41:40.415] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:41.554] <TB2> INFO: Test took 1139ms.
[14:41:41.559] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:42.670] <TB2> INFO: Test took 1111ms.
[14:41:42.675] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:43.816] <TB2> INFO: Test took 1142ms.
[14:41:43.821] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:44.956] <TB2> INFO: Test took 1136ms.
[14:41:44.959] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:46.070] <TB2> INFO: Test took 1111ms.
[14:41:46.075] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:47.187] <TB2> INFO: Test took 1113ms.
[14:41:47.192] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:48.294] <TB2> INFO: Test took 1103ms.
[14:41:48.297] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:49.418] <TB2> INFO: Test took 1121ms.
[14:41:49.421] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:50.528] <TB2> INFO: Test took 1107ms.
[14:41:50.532] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:41:51.638] <TB2> INFO: Test took 1107ms.
[14:41:52.168] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 571 seconds
[14:41:52.168] <TB2> INFO: PH scale (per ROC): 90 80 90 91 83 78 80 80 88 79 81 86 85 75 73 74
[14:41:52.168] <TB2> INFO: PH offset (per ROC): 156 160 150 153 155 169 161 156 157 177 166 158 158 165 161 180
[14:41:52.344] <TB2> INFO: ######################################################################
[14:41:52.344] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:41:52.344] <TB2> INFO: ######################################################################
[14:41:52.353] <TB2> INFO: scanning low vcal = 10
[14:41:56.333] <TB2> INFO: Test took 3980ms.
[14:41:56.338] <TB2> INFO: scanning low vcal = 20
[14:42:00.389] <TB2> INFO: Test took 4051ms.
[14:42:00.396] <TB2> INFO: scanning low vcal = 30
[14:42:04.339] <TB2> INFO: Test took 3943ms.
[14:42:04.349] <TB2> INFO: scanning low vcal = 40
[14:42:08.735] <TB2> INFO: Test took 4386ms.
[14:42:08.796] <TB2> INFO: scanning low vcal = 50
[14:42:13.200] <TB2> INFO: Test took 4404ms.
[14:42:13.273] <TB2> INFO: scanning low vcal = 60
[14:42:17.721] <TB2> INFO: Test took 4448ms.
[14:42:17.787] <TB2> INFO: scanning low vcal = 70
[14:42:22.230] <TB2> INFO: Test took 4443ms.
[14:42:22.290] <TB2> INFO: scanning low vcal = 80
[14:42:26.698] <TB2> INFO: Test took 4408ms.
[14:42:26.757] <TB2> INFO: scanning low vcal = 90
[14:42:31.140] <TB2> INFO: Test took 4383ms.
[14:42:31.224] <TB2> INFO: scanning low vcal = 100
[14:42:35.611] <TB2> INFO: Test took 4387ms.
[14:42:35.688] <TB2> INFO: scanning low vcal = 110
[14:42:40.179] <TB2> INFO: Test took 4491ms.
[14:42:40.237] <TB2> INFO: scanning low vcal = 120
[14:42:44.724] <TB2> INFO: Test took 4487ms.
[14:42:44.809] <TB2> INFO: scanning low vcal = 130
[14:42:49.372] <TB2> INFO: Test took 4563ms.
[14:42:49.433] <TB2> INFO: scanning low vcal = 140
[14:42:53.809] <TB2> INFO: Test took 4376ms.
[14:42:53.866] <TB2> INFO: scanning low vcal = 150
[14:42:58.250] <TB2> INFO: Test took 4384ms.
[14:42:58.304] <TB2> INFO: scanning low vcal = 160
[14:43:02.704] <TB2> INFO: Test took 4400ms.
[14:43:02.767] <TB2> INFO: scanning low vcal = 170
[14:43:07.307] <TB2> INFO: Test took 4540ms.
[14:43:07.366] <TB2> INFO: scanning low vcal = 180
[14:43:11.932] <TB2> INFO: Test took 4566ms.
[14:43:11.987] <TB2> INFO: scanning low vcal = 190
[14:43:16.714] <TB2> INFO: Test took 4727ms.
[14:43:16.815] <TB2> INFO: scanning low vcal = 200
[14:43:21.369] <TB2> INFO: Test took 4554ms.
[14:43:21.462] <TB2> INFO: scanning low vcal = 210
[14:43:25.986] <TB2> INFO: Test took 4524ms.
[14:43:26.051] <TB2> INFO: scanning low vcal = 220
[14:43:30.619] <TB2> INFO: Test took 4568ms.
[14:43:30.678] <TB2> INFO: scanning low vcal = 230
[14:43:35.142] <TB2> INFO: Test took 4464ms.
[14:43:35.205] <TB2> INFO: scanning low vcal = 240
[14:43:39.693] <TB2> INFO: Test took 4488ms.
[14:43:39.794] <TB2> INFO: scanning low vcal = 250
[14:43:44.322] <TB2> INFO: Test took 4528ms.
[14:43:44.417] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:43:49.007] <TB2> INFO: Test took 4590ms.
[14:43:49.065] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:43:53.589] <TB2> INFO: Test took 4524ms.
[14:43:53.644] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:43:58.265] <TB2> INFO: Test took 4621ms.
[14:43:58.319] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:44:02.901] <TB2> INFO: Test took 4582ms.
[14:44:02.985] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:44:07.732] <TB2> INFO: Test took 4747ms.
[14:44:08.375] <TB2> INFO: PixTestGainPedestal::measure() done
[14:44:41.642] <TB2> INFO: PixTestGainPedestal::fit() done
[14:44:41.642] <TB2> INFO: non-linearity mean: 0.960 0.956 0.959 0.959 0.954 0.957 0.962 0.960 0.955 0.953 0.964 0.963 0.961 0.955 0.959 0.958
[14:44:41.642] <TB2> INFO: non-linearity RMS: 0.005 0.006 0.005 0.006 0.006 0.005 0.005 0.005 0.006 0.007 0.006 0.005 0.005 0.005 0.006 0.006
[14:44:41.642] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:44:41.662] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:44:41.681] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:44:41.701] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:44:41.721] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:44:41.740] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:44:41.760] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:44:41.779] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:44:41.799] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:44:41.819] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:44:41.838] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:44:41.858] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:44:41.877] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:44:41.897] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:44:41.916] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:44:41.936] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:44:41.956] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 169 seconds
[14:44:41.962] <TB2> INFO: enter test to run
[14:44:41.962] <TB2> INFO: test: exit no parameter change
[14:44:42.470] <TB2> QUIET: Connection to board 156 closed.
[14:44:42.549] <TB2> INFO: pXar: this is the end, my friend