[10:45:07.610] <TB2> INFO: *** Welcome to pxar ***
[10:45:07.610] <TB2> INFO: *** Today: 2015/08/21
[10:45:07.610] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C15.dat
[10:45:07.652] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//tbmParameters_C0b.dat
[10:45:07.653] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//defaultMaskFile.dat
[10:45:07.653] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters_C15.dat
[10:45:07.733] <TB2> INFO: clk: 4
[10:45:07.733] <TB2> INFO: ctr: 4
[10:45:07.733] <TB2> INFO: sda: 19
[10:45:07.733] <TB2> INFO: tin: 9
[10:45:07.733] <TB2> INFO: level: 15
[10:45:07.733] <TB2> INFO: triggerdelay: 0
[10:45:07.733] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[10:45:07.733] <TB2> INFO: Log level: INFO
[10:45:07.741] <TB2> INFO: Found DTB DTB_WXC55Z
[10:45:07.749] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[10:45:07.752] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[10:45:07.755] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[10:45:09.312] <TB2> INFO: DUT info:
[10:45:09.312] <TB2> INFO: The DUT currently contains the following objects:
[10:45:09.312] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:45:09.312] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:45:09.312] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:45:09.312] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:45:09.312] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.312] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.312] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.312] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.312] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.313] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:45:09.726] <TB2> INFO: enter 'restricted' command line mode
[10:45:09.726] <TB2> INFO: enter test to run
[10:45:09.726] <TB2> INFO: test: pretest no parameter change
[10:45:09.726] <TB2> INFO: running: pretest
[10:45:09.732] <TB2> INFO: ######################################################################
[10:45:09.732] <TB2> INFO: PixTestPretest::doTest()
[10:45:09.732] <TB2> INFO: ######################################################################
[10:45:09.735] <TB2> INFO: ----------------------------------------------------------------------
[10:45:09.735] <TB2> INFO: PixTestPretest::programROC()
[10:45:09.735] <TB2> INFO: ----------------------------------------------------------------------
[10:45:27.752] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:45:27.752] <TB2> INFO: IA differences per ROC: 16.9 18.5 17.7 16.1 20.1 20.1 18.5 18.5 18.5 17.7 17.7 18.5 19.3 20.1 20.1 20.1
[10:45:27.839] <TB2> INFO: ----------------------------------------------------------------------
[10:45:27.839] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:45:27.839] <TB2> INFO: ----------------------------------------------------------------------
[10:45:31.810] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[10:45:31.814] <TB2> INFO: ----------------------------------------------------------------------
[10:45:31.814] <TB2> INFO: PixTestPretest::findWorkingPixel()
[10:45:31.814] <TB2> INFO: ----------------------------------------------------------------------
[10:45:40.477] <TB2> INFO: Test took 8657ms.
[10:45:40.760] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:45:40.791] <TB2> INFO: ----------------------------------------------------------------------
[10:45:40.791] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[10:45:40.791] <TB2> INFO: ----------------------------------------------------------------------
[10:45:48.960] <TB2> INFO: Test took 8165ms.
[10:45:49.268] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[10:45:49.268] <TB2> INFO: CalDel: 153 155 126 140 144 140 118 142 146 149 150 137 125 134 152 146
[10:45:49.268] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:45:49.273] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C0.dat
[10:45:49.273] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C1.dat
[10:45:49.274] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C2.dat
[10:45:49.274] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C3.dat
[10:45:49.274] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C4.dat
[10:45:49.275] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C5.dat
[10:45:49.275] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C6.dat
[10:45:49.275] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C7.dat
[10:45:49.275] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C8.dat
[10:45:49.276] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C9.dat
[10:45:49.276] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C10.dat
[10:45:49.276] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C11.dat
[10:45:49.276] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C12.dat
[10:45:49.277] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C13.dat
[10:45:49.277] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C14.dat
[10:45:49.277] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C15.dat
[10:45:49.277] <TB2> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[10:45:49.374] <TB2> INFO: enter test to run
[10:45:49.374] <TB2> INFO: test: fulltest no parameter change
[10:45:49.374] <TB2> INFO: running: fulltest
[10:45:49.375] <TB2> INFO: ######################################################################
[10:45:49.375] <TB2> INFO: PixTestFullTest::doTest()
[10:45:49.375] <TB2> INFO: ######################################################################
[10:45:49.376] <TB2> INFO: ######################################################################
[10:45:49.376] <TB2> INFO: PixTestAlive::doTest()
[10:45:49.376] <TB2> INFO: ######################################################################
[10:45:49.377] <TB2> INFO: ----------------------------------------------------------------------
[10:45:49.377] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:45:49.377] <TB2> INFO: ----------------------------------------------------------------------
[10:45:52.826] <TB2> INFO: Test took 3447ms.
[10:45:52.843] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:53.067] <TB2> INFO: PixTestAlive::aliveTest() done
[10:45:53.067] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0
[10:45:53.069] <TB2> INFO: ----------------------------------------------------------------------
[10:45:53.069] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:45:53.069] <TB2> INFO: ----------------------------------------------------------------------
[10:45:55.735] <TB2> INFO: Test took 2665ms.
[10:45:55.737] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:55.737] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:45:55.967] <TB2> INFO: PixTestAlive::maskTest() done
[10:45:55.967] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:45:55.969] <TB2> INFO: ----------------------------------------------------------------------
[10:45:55.969] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:45:55.969] <TB2> INFO: ----------------------------------------------------------------------
[10:45:59.633] <TB2> INFO: Test took 3663ms.
[10:45:59.658] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:59.886] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[10:45:59.886] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:45:59.886] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[10:45:59.898] <TB2> INFO: ######################################################################
[10:45:59.898] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:45:59.898] <TB2> INFO: ######################################################################
[10:45:59.901] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[10:46:00.162] <TB2> INFO: dacScan step from 0 .. 29
[10:46:21.751] <TB2> INFO: Test took 21589ms.
[10:46:21.785] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:21.785] <TB2> INFO: dacScan step from 30 .. 59
[10:46:44.675] <TB2> INFO: Test took 22890ms.
[10:46:44.799] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:44.822] <TB2> INFO: dacScan step from 60 .. 89
[10:47:13.557] <TB2> INFO: Test took 28735ms.
[10:47:13.844] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:13.916] <TB2> INFO: dacScan step from 90 .. 119
[10:47:43.205] <TB2> INFO: Test took 29289ms.
[10:47:43.482] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:43.553] <TB2> INFO: dacScan step from 120 .. 149
[10:48:08.894] <TB2> INFO: Test took 25341ms.
[10:48:09.218] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:34.142] <TB2> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[10:48:34.142] <TB2> INFO: number of dead bumps (per ROC): 3 1 0 0 0 0 0 0 0 0 0 0 0 1 0 2
[10:48:34.142] <TB2> INFO: separation cut (per ROC): 79 89 99 81 75 92 89 77 81 74 99 87 101 105 92 96
[10:48:34.221] <TB2> INFO: ######################################################################
[10:48:34.221] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[10:48:34.221] <TB2> INFO: ######################################################################
[10:48:34.221] <TB2> INFO: ----------------------------------------------------------------------
[10:48:34.221] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[10:48:34.221] <TB2> INFO: ----------------------------------------------------------------------
[10:48:34.221] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[10:48:34.232] <TB2> INFO: dacScan step from 0 .. 3
[10:48:53.733] <TB2> INFO: Test took 19501ms.
[10:48:53.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:53.762] <TB2> INFO: dacScan step from 4 .. 7
[10:49:13.134] <TB2> INFO: Test took 19372ms.
[10:49:13.159] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:13.159] <TB2> INFO: dacScan step from 8 .. 11
[10:49:32.990] <TB2> INFO: Test took 19831ms.
[10:49:33.022] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:33.022] <TB2> INFO: dacScan step from 12 .. 15
[10:49:52.800] <TB2> INFO: Test took 19778ms.
[10:49:52.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:52.827] <TB2> INFO: dacScan step from 16 .. 19
[10:50:13.219] <TB2> INFO: Test took 20392ms.
[10:50:13.244] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:13.244] <TB2> INFO: dacScan step from 20 .. 23
[10:50:33.396] <TB2> INFO: Test took 20152ms.
[10:50:33.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:33.424] <TB2> INFO: dacScan step from 24 .. 27
[10:50:53.822] <TB2> INFO: Test took 20398ms.
[10:50:53.850] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:53.850] <TB2> INFO: dacScan step from 28 .. 31
[10:51:14.209] <TB2> INFO: Test took 20359ms.
[10:51:14.241] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:14.241] <TB2> INFO: dacScan step from 32 .. 35
[10:51:34.571] <TB2> INFO: Test took 20330ms.
[10:51:34.599] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:34.599] <TB2> INFO: dacScan step from 36 .. 39
[10:51:54.980] <TB2> INFO: Test took 20381ms.
[10:51:55.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:55.008] <TB2> INFO: dacScan step from 40 .. 43
[10:52:15.716] <TB2> INFO: Test took 20708ms.
[10:52:15.742] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:15.742] <TB2> INFO: dacScan step from 44 .. 47
[10:52:36.317] <TB2> INFO: Test took 20575ms.
[10:52:36.347] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:36.348] <TB2> INFO: dacScan step from 48 .. 51
[10:52:56.994] <TB2> INFO: Test took 20646ms.
[10:52:57.021] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:57.021] <TB2> INFO: dacScan step from 52 .. 55
[10:53:17.569] <TB2> INFO: Test took 20548ms.
[10:53:17.596] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:17.596] <TB2> INFO: dacScan step from 56 .. 59
[10:53:38.041] <TB2> INFO: Test took 20444ms.
[10:53:38.069] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:38.069] <TB2> INFO: dacScan step from 60 .. 63
[10:53:58.173] <TB2> INFO: Test took 20104ms.
[10:53:58.200] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:58.200] <TB2> INFO: dacScan step from 64 .. 67
[10:54:18.563] <TB2> INFO: Test took 20362ms.
[10:54:18.591] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:18.591] <TB2> INFO: dacScan step from 68 .. 71
[10:54:37.993] <TB2> INFO: Test took 19402ms.
[10:54:38.023] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:38.023] <TB2> INFO: dacScan step from 72 .. 75
[10:54:57.622] <TB2> INFO: Test took 19598ms.
[10:54:57.656] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:57.657] <TB2> INFO: dacScan step from 76 .. 79
[10:55:18.878] <TB2> INFO: Test took 21221ms.
[10:55:18.938] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:18.940] <TB2> INFO: dacScan step from 80 .. 83
[10:55:43.421] <TB2> INFO: Test took 24481ms.
[10:55:43.521] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:43.526] <TB2> INFO: dacScan step from 84 .. 87
[10:56:09.691] <TB2> INFO: Test took 26165ms.
[10:56:09.818] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:09.824] <TB2> INFO: dacScan step from 88 .. 91
[10:56:36.520] <TB2> INFO: Test took 26696ms.
[10:56:36.694] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:36.706] <TB2> INFO: dacScan step from 92 .. 95
[10:57:04.952] <TB2> INFO: Test took 28246ms.
[10:57:05.139] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:05.150] <TB2> INFO: dacScan step from 96 .. 99
[10:57:34.217] <TB2> INFO: Test took 29067ms.
[10:57:34.448] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:34.459] <TB2> INFO: dacScan step from 100 .. 103
[10:58:05.201] <TB2> INFO: Test took 30742ms.
[10:58:05.418] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:05.429] <TB2> INFO: dacScan step from 104 .. 107
[10:58:36.323] <TB2> INFO: Test took 30894ms.
[10:58:36.546] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:36.558] <TB2> INFO: dacScan step from 108 .. 111


[10:59:08.366] <TB2> INFO: Test took 31808ms.
[10:59:08.600] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:08.611] <TB2> INFO: dacScan step from 112 .. 115

[10:59:39.917] <TB2> INFO: Test took 31305ms.
[10:59:40.190] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:40.202] <TB2> INFO: dacScan step from 116 .. 119
[11:00:11.746] <TB2> INFO: Test took 31544ms.
[11:00:11.980] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:11.992] <TB2> INFO: dacScan step from 120 .. 123


[11:00:44.005] <TB2> INFO: Test took 32014ms.
[11:00:44.254] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:44.265] <TB2> INFO: dacScan step from 124 .. 127

[11:01:15.998] <TB2> INFO: Test took 31733ms.
[11:01:16.237] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:16.249] <TB2> INFO: dacScan step from 128 .. 131



[11:01:48.055] <TB2> INFO: Test took 31805ms.
[11:01:48.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:48.318] <TB2> INFO: dacScan step from 132 .. 135





[11:02:19.899] <TB2> INFO: Test took 31581ms.
[11:02:20.159] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:20.175] <TB2> INFO: dacScan step from 136 .. 139
[11:02:51.473] <TB2> INFO: Test took 31298ms.
[11:02:51.741] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:51.752] <TB2> INFO: dacScan step from 140 .. 143
[11:03:21.165] <TB2> INFO: Test took 29413ms.
[11:03:21.393] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:21.404] <TB2> INFO: dacScan step from 144 .. 147
[11:03:50.986] <TB2> INFO: Test took 29582ms.
[11:03:51.313] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:51.325] <TB2> INFO: dacScan step from 148 .. 149
[11:04:09.082] <TB2> INFO: Test took 17757ms.
[11:04:09.197] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:09.204] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:10.724] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:12.246] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:13.863] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:15.620] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:17.163] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:18.687] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:20.165] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:21.727] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:23.262] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:24.853] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:26.488] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:28.123] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:29.723] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:31.273] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:32.877] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:04:34.416] <TB2> INFO: PixTestScurves::scurves() done
[11:04:34.416] <TB2> INFO: Vcal mean: 85.88 95.35 87.83 81.87 85.97 94.84 89.27 84.76 81.49 83.30 101.10 93.49 98.14 100.17 99.21 104.51
[11:04:34.416] <TB2> INFO: Vcal RMS: 5.47 6.22 5.48 5.17 4.78 5.54 5.86 5.15 4.60 4.85 6.65 5.31 5.70 5.83 5.56 5.87
[11:04:34.416] <TB2> INFO: PixTestScurves::fullTest() done, duration: 960 seconds
[11:04:34.489] <TB2> INFO: ######################################################################
[11:04:34.489] <TB2> INFO: PixTestTrim::doTest()
[11:04:34.489] <TB2> INFO: ######################################################################
[11:04:34.490] <TB2> INFO: ----------------------------------------------------------------------
[11:04:34.490] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[11:04:34.490] <TB2> INFO: ----------------------------------------------------------------------
[11:04:34.580] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:04:34.580] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:04:34.589] <TB2> INFO: dacScan step from 0 .. 19
[11:04:49.304] <TB2> INFO: Test took 14715ms.
[11:04:49.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:49.326] <TB2> INFO: dacScan step from 20 .. 39
[11:05:05.210] <TB2> INFO: Test took 15884ms.
[11:05:05.233] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:05.233] <TB2> INFO: dacScan step from 40 .. 59
[11:05:21.073] <TB2> INFO: Test took 15839ms.
[11:05:21.094] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:21.094] <TB2> INFO: dacScan step from 60 .. 79
[11:05:36.367] <TB2> INFO: Test took 15273ms.
[11:05:36.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:36.387] <TB2> INFO: dacScan step from 80 .. 99
[11:05:52.931] <TB2> INFO: Test took 16544ms.
[11:05:52.981] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:52.986] <TB2> INFO: dacScan step from 100 .. 119
[11:06:11.942] <TB2> INFO: Test took 18956ms.
[11:06:12.086] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:12.114] <TB2> INFO: dacScan step from 120 .. 139
[11:06:32.876] <TB2> INFO: Test took 20762ms.
[11:06:33.040] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:33.077] <TB2> INFO: dacScan step from 140 .. 159
[11:06:51.000] <TB2> INFO: Test took 17923ms.
[11:06:51.078] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:12.951] <TB2> INFO: ROC 0 VthrComp = 87
[11:07:12.951] <TB2> INFO: ROC 1 VthrComp = 95
[11:07:12.951] <TB2> INFO: ROC 2 VthrComp = 95
[11:07:12.951] <TB2> INFO: ROC 3 VthrComp = 85
[11:07:12.951] <TB2> INFO: ROC 4 VthrComp = 93
[11:07:12.951] <TB2> INFO: ROC 5 VthrComp = 99
[11:07:12.951] <TB2> INFO: ROC 6 VthrComp = 96
[11:07:12.952] <TB2> INFO: ROC 7 VthrComp = 88
[11:07:12.952] <TB2> INFO: ROC 8 VthrComp = 88
[11:07:12.952] <TB2> INFO: ROC 9 VthrComp = 87
[11:07:12.952] <TB2> INFO: ROC 10 VthrComp = 99
[11:07:12.952] <TB2> INFO: ROC 11 VthrComp = 98
[11:07:12.952] <TB2> INFO: ROC 12 VthrComp = 100
[11:07:12.952] <TB2> INFO: ROC 13 VthrComp = 101
[11:07:12.952] <TB2> INFO: ROC 14 VthrComp = 101
[11:07:12.952] <TB2> INFO: ROC 15 VthrComp = 102
[11:07:12.952] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:07:12.952] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:07:12.962] <TB2> INFO: dacScan step from 0 .. 19
[11:07:27.267] <TB2> INFO: Test took 14305ms.
[11:07:27.290] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:27.290] <TB2> INFO: dacScan step from 20 .. 39
[11:07:43.977] <TB2> INFO: Test took 16687ms.
[11:07:44.014] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:44.017] <TB2> INFO: dacScan step from 40 .. 59
[11:08:04.184] <TB2> INFO: Test took 20167ms.
[11:08:04.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:04.377] <TB2> INFO: dacScan step from 60 .. 79
[11:08:23.989] <TB2> INFO: Test took 19611ms.
[11:08:24.253] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:24.324] <TB2> INFO: dacScan step from 80 .. 99
[11:08:45.493] <TB2> INFO: Test took 21169ms.
[11:08:45.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:45.717] <TB2> INFO: dacScan step from 100 .. 119
[11:09:05.641] <TB2> INFO: Test took 19924ms.
[11:09:05.798] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:05.843] <TB2> INFO: dacScan step from 120 .. 139
[11:09:26.624] <TB2> INFO: Test took 20780ms.
[11:09:26.792] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:26.833] <TB2> INFO: dacScan step from 140 .. 159
[11:09:47.711] <TB2> INFO: Test took 20878ms.
[11:09:47.882] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:15.149] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 60.7166 for pixel 13/51 mean/min/max = 46.1129/31.3872/60.8386
[11:10:15.149] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 62.1648 for pixel 0/66 mean/min/max = 46.6512/31.1316/62.1708
[11:10:15.149] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.6137 for pixel 19/79 mean/min/max = 45.5294/31.4072/59.6517
[11:10:15.149] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.1738 for pixel 1/62 mean/min/max = 45.8262/32.4022/59.2501
[11:10:15.150] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 56.9131 for pixel 19/0 mean/min/max = 44.8935/32.7248/57.0622
[11:10:15.150] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.8019 for pixel 51/79 mean/min/max = 45.7688/31.7357/59.802
[11:10:15.150] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.3891 for pixel 1/5 mean/min/max = 44.8253/31.0857/58.565
[11:10:15.151] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.8866 for pixel 10/7 mean/min/max = 46.3389/32.7151/59.9626
[11:10:15.151] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 57.9612 for pixel 4/77 mean/min/max = 45.5327/33.0464/58.019
[11:10:15.151] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.7551 for pixel 0/79 mean/min/max = 45.6138/32.4511/58.7765
[11:10:15.151] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 64.878 for pixel 5/0 mean/min/max = 48.1806/31.3778/64.9835
[11:10:15.152] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.5337 for pixel 51/3 mean/min/max = 44.9498/31.2114/58.6881
[11:10:15.152] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.1274 for pixel 2/8 mean/min/max = 45.4166/31.4727/59.3606
[11:10:15.152] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 61.5486 for pixel 7/76 mean/min/max = 46.7595/31.9487/61.5702
[11:10:15.153] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 59.7006 for pixel 40/70 mean/min/max = 45.922/31.8557/59.9882
[11:10:15.153] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 62.9105 for pixel 28/1 mean/min/max = 47.4604/31.8662/63.0546
[11:10:15.153] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:11:56.057] <TB2> INFO: Test took 100904ms.
[11:11:57.546] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:11:57.555] <TB2> INFO: dacScan step from 0 .. 19
[11:12:20.691] <TB2> INFO: Test took 23136ms.
[11:12:20.742] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:20.744] <TB2> INFO: dacScan step from 20 .. 39
[11:12:50.499] <TB2> INFO: Test took 29755ms.
[11:12:50.740] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:50.776] <TB2> INFO: dacScan step from 40 .. 59


[11:13:26.604] <TB2> INFO: Test took 35828ms.
[11:13:26.898] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:26.946] <TB2> INFO: dacScan step from 60 .. 79



[11:14:03.055] <TB2> INFO: Test took 36108ms.
[11:14:03.346] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:03.394] <TB2> INFO: dacScan step from 80 .. 99


[11:14:38.674] <TB2> INFO: Test took 35280ms.
[11:14:38.978] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:39.027] <TB2> INFO: dacScan step from 100 .. 119
[11:15:14.343] <TB2> INFO: Test took 35316ms.
[11:15:14.624] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:14.670] <TB2> INFO: dacScan step from 120 .. 139



[11:15:48.026] <TB2> INFO: Test took 33356ms.
[11:15:48.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:48.349] <TB2> INFO: dacScan step from 140 .. 159


[11:16:23.468] <TB2> INFO: Test took 35119ms.
[11:16:23.738] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:23.789] <TB2> INFO: dacScan step from 160 .. 179



[11:16:59.135] <TB2> INFO: Test took 35345ms.
[11:16:59.430] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:59.475] <TB2> INFO: dacScan step from 180 .. 199





[11:17:35.859] <TB2> INFO: Test took 36384ms.
[11:17:36.146] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:02.421] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.010886 .. 255.000000
[11:18:02.502] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[11:18:02.512] <TB2> INFO: dacScan step from 0 .. 19
[11:18:16.040] <TB2> INFO: Test took 13528ms.
[11:18:16.064] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:16.064] <TB2> INFO: dacScan step from 20 .. 39
[11:18:30.318] <TB2> INFO: Test took 14254ms.
[11:18:30.401] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:30.422] <TB2> INFO: dacScan step from 40 .. 59
[11:18:46.932] <TB2> INFO: Test took 16510ms.
[11:18:47.083] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:47.137] <TB2> INFO: dacScan step from 60 .. 79
[11:19:03.887] <TB2> INFO: Test took 16750ms.
[11:19:04.084] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:04.149] <TB2> INFO: dacScan step from 80 .. 99
[11:19:20.848] <TB2> INFO: Test took 16699ms.
[11:19:21.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:21.102] <TB2> INFO: dacScan step from 100 .. 119
[11:19:37.893] <TB2> INFO: Test took 16791ms.
[11:19:38.040] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:38.095] <TB2> INFO: dacScan step from 120 .. 139
[11:19:54.988] <TB2> INFO: Test took 16892ms.
[11:19:55.173] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:55.226] <TB2> INFO: dacScan step from 140 .. 159
[11:20:12.311] <TB2> INFO: Test took 17085ms.
[11:20:12.449] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:12.494] <TB2> INFO: dacScan step from 160 .. 179
[11:20:29.420] <TB2> INFO: Test took 16926ms.
[11:20:29.562] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:29.607] <TB2> INFO: dacScan step from 180 .. 199
[11:20:47.457] <TB2> INFO: Test took 17850ms.
[11:20:47.643] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:47.687] <TB2> INFO: dacScan step from 200 .. 219
[11:21:04.360] <TB2> INFO: Test took 16673ms.
[11:21:04.512] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:04.565] <TB2> INFO: dacScan step from 220 .. 239
[11:21:23.212] <TB2> INFO: Test took 18648ms.
[11:21:23.369] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:23.412] <TB2> INFO: dacScan step from 240 .. 255
[11:21:39.460] <TB2> INFO: Test took 16047ms.
[11:21:39.579] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:11.945] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 14.499967 .. 46.117496
[11:22:12.021] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 56 (20) hits flags = 16 (plus default)
[11:22:12.030] <TB2> INFO: dacScan step from 4 .. 23
[11:22:26.489] <TB2> INFO: Test took 14459ms.
[11:22:26.513] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:26.513] <TB2> INFO: dacScan step from 24 .. 43
[11:22:42.857] <TB2> INFO: Test took 16344ms.
[11:22:42.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:42.994] <TB2> INFO: dacScan step from 44 .. 56
[11:22:54.748] <TB2> INFO: Test took 11754ms.
[11:22:54.840] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:11.577] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.592199 .. 41.995438
[11:23:11.654] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 51 (20) hits flags = 16 (plus default)
[11:23:11.663] <TB2> INFO: dacScan step from 10 .. 29
[11:23:25.618] <TB2> INFO: Test took 13955ms.
[11:23:25.639] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:25.640] <TB2> INFO: dacScan step from 30 .. 49
[11:23:43.755] <TB2> INFO: Test took 18115ms.
[11:23:43.892] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:43.930] <TB2> INFO: dacScan step from 50 .. 51
[11:23:48.244] <TB2> INFO: Test took 4314ms.
[11:23:48.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:03.631] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 23.945674 .. 41.475172
[11:24:03.728] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 13 .. 51 (20) hits flags = 16 (plus default)
[11:24:03.738] <TB2> INFO: dacScan step from 13 .. 32
[11:24:18.281] <TB2> INFO: Test took 14543ms.
[11:24:18.310] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:18.313] <TB2> INFO: dacScan step from 33 .. 51
[11:24:35.037] <TB2> INFO: Test took 16723ms.
[11:24:35.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:50.443] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:24:50.443] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:24:50.452] <TB2> INFO: dacScan step from 15 .. 34
[11:25:14.716] <TB2> INFO: Test took 24264ms.
[11:25:14.787] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:14.798] <TB2> INFO: dacScan step from 35 .. 54


[11:25:47.269] <TB2> INFO: Test took 32471ms.
[11:25:47.552] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:47.601] <TB2> INFO: dacScan step from 55 .. 55
[11:25:51.939] <TB2> INFO: Test took 4338ms.
[11:25:51.958] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:06.254] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C0.dat
[11:26:06.254] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C1.dat
[11:26:06.255] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C2.dat
[11:26:06.255] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C3.dat
[11:26:06.255] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C4.dat
[11:26:06.256] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C5.dat
[11:26:06.256] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C6.dat
[11:26:06.256] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C7.dat
[11:26:06.256] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C8.dat
[11:26:06.256] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C9.dat
[11:26:06.257] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C10.dat
[11:26:06.257] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C11.dat
[11:26:06.257] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C12.dat
[11:26:06.257] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C13.dat
[11:26:06.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C14.dat
[11:26:06.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C15.dat
[11:26:06.258] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C0.dat
[11:26:06.269] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C1.dat
[11:26:06.277] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C2.dat
[11:26:06.283] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C3.dat
[11:26:06.290] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C4.dat
[11:26:06.297] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C5.dat
[11:26:06.304] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C6.dat
[11:26:06.311] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C7.dat
[11:26:06.317] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C8.dat
[11:26:06.324] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C9.dat
[11:26:06.332] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C10.dat
[11:26:06.338] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C11.dat
[11:26:06.345] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C12.dat
[11:26:06.352] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C13.dat
[11:26:06.359] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C14.dat
[11:26:06.366] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C15.dat
[11:26:06.372] <TB2> INFO: PixTestTrim::trimTest() done
[11:26:06.372] <TB2> INFO: vtrim: 109 111 110 111 110 110 106 111 115 99 126 109 113 130 121 123
[11:26:06.372] <TB2> INFO: vthrcomp: 87 95 95 85 93 99 96 88 88 87 99 98 100 101 101 102
[11:26:06.372] <TB2> INFO: vcal mean: 35.01 35.02 34.98 35.01 35.01 35.04 35.00 35.04 35.01 35.05 35.07 34.99 34.99 35.07 35.05 35.03
[11:26:06.372] <TB2> INFO: vcal RMS: 1.06 1.08 0.98 1.15 0.98 0.99 1.16 0.98 0.95 1.15 1.10 1.04 1.20 1.06 1.05 1.12
[11:26:06.372] <TB2> INFO: bits mean: 9.72 9.75 9.59 9.64 10.04 9.05 10.01 9.19 9.81 9.56 9.52 9.59 10.03 9.80 9.78 9.61
[11:26:06.372] <TB2> INFO: bits RMS: 2.63 2.57 2.69 2.60 2.37 2.91 2.62 2.70 2.36 2.63 2.56 2.78 2.51 2.43 2.55 2.50
[11:26:06.380] <TB2> INFO: ----------------------------------------------------------------------
[11:26:06.380] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[11:26:06.380] <TB2> INFO: ----------------------------------------------------------------------
[11:26:06.383] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:26:06.392] <TB2> INFO: dacScan step from 0 .. 19
[11:26:27.982] <TB2> INFO: Test took 21590ms.
[11:26:28.029] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:28.029] <TB2> INFO: dacScan step from 20 .. 39
[11:26:52.825] <TB2> INFO: Test took 24796ms.
[11:26:52.863] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:52.863] <TB2> INFO: dacScan step from 40 .. 59
[11:27:17.983] <TB2> INFO: Test took 25119ms.
[11:27:18.019] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:18.019] <TB2> INFO: dacScan step from 60 .. 79
[11:27:40.292] <TB2> INFO: Test took 22273ms.
[11:27:40.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:40.327] <TB2> INFO: dacScan step from 80 .. 99
[11:28:03.885] <TB2> INFO: Test took 23558ms.
[11:28:03.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:03.929] <TB2> INFO: dacScan step from 100 .. 119
[11:28:32.819] <TB2> INFO: Test took 28890ms.
[11:28:32.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:33.010] <TB2> INFO: dacScan step from 120 .. 139
[11:29:08.245] <TB2> INFO: Test took 35235ms.
[11:29:08.509] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:08.546] <TB2> INFO: dacScan step from 140 .. 159





[11:29:41.064] <TB2> INFO: Test took 32518ms.
[11:29:41.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:41.379] <TB2> INFO: dacScan step from 160 .. 179


[11:30:17.812] <TB2> INFO: Test took 36433ms.
[11:30:18.088] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:18.132] <TB2> INFO: dacScan step from 180 .. 199
[11:30:53.743] <TB2> INFO: Test took 35611ms.
[11:30:54.022] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:20.030] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 188 (20) hits flags = 16 (plus default)
[11:31:20.039] <TB2> INFO: dacScan step from 0 .. 19
[11:31:42.933] <TB2> INFO: Test took 22894ms.
[11:31:42.967] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:42.967] <TB2> INFO: dacScan step from 20 .. 39
[11:32:07.873] <TB2> INFO: Test took 24906ms.
[11:32:07.911] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:07.911] <TB2> INFO: dacScan step from 40 .. 59
[11:32:33.429] <TB2> INFO: Test took 25518ms.
[11:32:33.466] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:33.466] <TB2> INFO: dacScan step from 60 .. 79
[11:32:54.815] <TB2> INFO: Test took 21349ms.
[11:32:54.853] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:54.853] <TB2> INFO: dacScan step from 80 .. 99
[11:33:17.740] <TB2> INFO: Test took 22887ms.
[11:33:17.813] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:17.818] <TB2> INFO: dacScan step from 100 .. 119
[11:33:48.231] <TB2> INFO: Test took 30413ms.
[11:33:48.562] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:48.605] <TB2> INFO: dacScan step from 120 .. 139





[11:34:23.455] <TB2> INFO: Test took 34850ms.
[11:34:23.753] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:23.791] <TB2> INFO: dacScan step from 140 .. 159

[11:34:56.988] <TB2> INFO: Test took 33197ms.
[11:34:57.263] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:57.308] <TB2> INFO: dacScan step from 160 .. 179





[11:35:33.062] <TB2> INFO: Test took 35753ms.
[11:35:33.335] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:33.376] <TB2> INFO: dacScan step from 180 .. 188
[11:35:51.661] <TB2> INFO: Test took 18285ms.
[11:35:51.787] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:16.525] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 173 (20) hits flags = 16 (plus default)
[11:36:16.534] <TB2> INFO: dacScan step from 0 .. 19
[11:36:41.226] <TB2> INFO: Test took 24692ms.
[11:36:41.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:41.266] <TB2> INFO: dacScan step from 20 .. 39
[11:37:02.565] <TB2> INFO: Test took 21299ms.
[11:37:02.600] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:02.600] <TB2> INFO: dacScan step from 40 .. 59
[11:37:25.529] <TB2> INFO: Test took 22929ms.
[11:37:25.566] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:25.566] <TB2> INFO: dacScan step from 60 .. 79
[11:37:47.007] <TB2> INFO: Test took 21441ms.
[11:37:47.042] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:47.042] <TB2> INFO: dacScan step from 80 .. 99
[11:38:10.719] <TB2> INFO: Test took 23677ms.
[11:38:10.796] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:10.801] <TB2> INFO: dacScan step from 100 .. 119
[11:38:40.250] <TB2> INFO: Test took 29448ms.
[11:38:40.484] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:40.514] <TB2> INFO: dacScan step from 120 .. 139


[11:39:16.501] <TB2> INFO: Test took 35987ms.
[11:39:16.766] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:16.811] <TB2> INFO: dacScan step from 140 .. 159


[11:39:53.477] <TB2> INFO: Test took 36666ms.
[11:39:53.755] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:53.795] <TB2> INFO: dacScan step from 160 .. 173
[11:40:21.153] <TB2> INFO: Test took 27358ms.
[11:40:21.362] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:44.756] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 170 (20) hits flags = 16 (plus default)
[11:40:44.767] <TB2> INFO: dacScan step from 0 .. 19
[11:41:06.311] <TB2> INFO: Test took 21544ms.
[11:41:06.347] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:06.347] <TB2> INFO: dacScan step from 20 .. 39
[11:41:29.963] <TB2> INFO: Test took 23616ms.
[11:41:29.998] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:29.998] <TB2> INFO: dacScan step from 40 .. 59
[11:41:54.498] <TB2> INFO: Test took 24500ms.
[11:41:54.536] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:54.536] <TB2> INFO: dacScan step from 60 .. 79
[11:42:18.111] <TB2> INFO: Test took 23575ms.
[11:42:18.147] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:18.147] <TB2> INFO: dacScan step from 80 .. 99
[11:42:43.181] <TB2> INFO: Test took 25034ms.
[11:42:43.259] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:43.266] <TB2> INFO: dacScan step from 100 .. 119
[11:43:16.403] <TB2> INFO: Test took 33137ms.
[11:43:16.629] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:16.655] <TB2> INFO: dacScan step from 120 .. 139
[11:43:52.413] <TB2> INFO: Test took 35758ms.
[11:43:52.691] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:52.733] <TB2> INFO: dacScan step from 140 .. 159





[11:44:29.482] <TB2> INFO: Test took 36749ms.
[11:44:29.780] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:29.825] <TB2> INFO: dacScan step from 160 .. 170
[11:44:47.865] <TB2> INFO: Test took 18039ms.
[11:44:48.031] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:11.603] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 170 (20) hits flags = 16 (plus default)
[11:45:11.613] <TB2> INFO: dacScan step from 0 .. 19
[11:45:33.350] <TB2> INFO: Test took 21737ms.
[11:45:33.390] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:33.390] <TB2> INFO: dacScan step from 20 .. 39
[11:45:56.473] <TB2> INFO: Test took 23083ms.
[11:45:56.509] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:56.509] <TB2> INFO: dacScan step from 40 .. 59
[11:46:18.173] <TB2> INFO: Test took 21663ms.
[11:46:18.207] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:18.207] <TB2> INFO: dacScan step from 60 .. 79
[11:46:41.141] <TB2> INFO: Test took 22934ms.
[11:46:41.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:41.177] <TB2> INFO: dacScan step from 80 .. 99
[11:47:05.279] <TB2> INFO: Test took 24102ms.
[11:47:05.361] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:05.366] <TB2> INFO: dacScan step from 100 .. 119
[11:47:38.046] <TB2> INFO: Test took 32680ms.
[11:47:38.269] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:38.297] <TB2> INFO: dacScan step from 120 .. 139


[11:48:14.313] <TB2> INFO: Test took 36016ms.
[11:48:14.597] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:14.657] <TB2> INFO: dacScan step from 140 .. 159


[11:48:45.686] <TB2> INFO: Test took 31029ms.
[11:48:46.070] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:46.147] <TB2> INFO: dacScan step from 160 .. 170
[11:49:04.451] <TB2> INFO: Test took 18304ms.
[11:49:04.613] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:28.117] <TB2> INFO: PixTestTrim::trimBitTest() done
[11:49:28.118] <TB2> INFO: PixTestTrim::doTest() done, duration: 2693 seconds
[11:49:28.813] <TB2> INFO: ######################################################################
[11:49:28.813] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:49:28.813] <TB2> INFO: ######################################################################
[11:49:32.626] <TB2> INFO: Test took 3811ms.
[11:49:32.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:36.164] <TB2> INFO: Test took 3320ms.
[11:49:36.227] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:39.863] <TB2> INFO: Test took 3626ms.
[11:49:39.933] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:39.940] <TB2> INFO: The DUT currently contains the following objects:
[11:49:39.940] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:39.940] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:39.940] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:39.940] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:39.940] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.940] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.940] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.940] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.940] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.940] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.940] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.940] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.941] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.941] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.941] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.941] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.941] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.941] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.941] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:39.941] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.048] <TB2> INFO: Test took 1107ms.
[11:49:41.049] <TB2> INFO: The DUT currently contains the following objects:
[11:49:41.049] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:41.049] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:41.049] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:41.049] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:41.049] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.049] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.049] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:41.050] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.169] <TB2> INFO: Test took 1119ms.
[11:49:42.171] <TB2> INFO: The DUT currently contains the following objects:
[11:49:42.171] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:42.171] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:42.171] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:42.171] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:42.171] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:42.171] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.279] <TB2> INFO: Test took 1108ms.
[11:49:43.280] <TB2> INFO: The DUT currently contains the following objects:
[11:49:43.280] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:43.280] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:43.280] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:43.280] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:43.280] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.280] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.280] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.280] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.280] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.280] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.280] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:43.281] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.388] <TB2> INFO: Test took 1107ms.
[11:49:44.390] <TB2> INFO: The DUT currently contains the following objects:
[11:49:44.390] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:44.390] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:44.390] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:44.390] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:44.390] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.390] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.391] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.391] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.391] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.391] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:44.391] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.526] <TB2> INFO: Test took 1135ms.
[11:49:45.530] <TB2> INFO: The DUT currently contains the following objects:
[11:49:45.530] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:45.530] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:45.530] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:45.530] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:45.530] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:45.530] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.665] <TB2> INFO: Test took 1135ms.
[11:49:46.666] <TB2> INFO: The DUT currently contains the following objects:
[11:49:46.666] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:46.666] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:46.666] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:46.666] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:46.666] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.666] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.666] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.666] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.666] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.666] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.666] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:46.667] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.774] <TB2> INFO: Test took 1107ms.
[11:49:47.776] <TB2> INFO: The DUT currently contains the following objects:
[11:49:47.776] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:47.776] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:47.776] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:47.776] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:47.776] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.776] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.776] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.777] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.778] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:47.778] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.912] <TB2> INFO: Test took 1134ms.
[11:49:48.915] <TB2> INFO: The DUT currently contains the following objects:
[11:49:48.915] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:48.915] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:48.915] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:48.915] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:48.915] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:48.915] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.051] <TB2> INFO: Test took 1135ms.
[11:49:50.054] <TB2> INFO: The DUT currently contains the following objects:
[11:49:50.055] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:50.055] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:50.055] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:50.055] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:50.055] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.055] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:50.056] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.175] <TB2> INFO: Test took 1119ms.
[11:49:51.176] <TB2> INFO: The DUT currently contains the following objects:
[11:49:51.176] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:51.176] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:51.176] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:51.176] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:51.176] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.176] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.177] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.177] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:51.177] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.300] <TB2> INFO: Test took 1123ms.
[11:49:52.301] <TB2> INFO: The DUT currently contains the following objects:
[11:49:52.301] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:52.301] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:52.301] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:52.301] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:52.302] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:52.302] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.408] <TB2> INFO: Test took 1106ms.
[11:49:53.410] <TB2> INFO: The DUT currently contains the following objects:
[11:49:53.421] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:53.421] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:53.421] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:53.421] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:53.421] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:53.421] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.517] <TB2> INFO: Test took 1096ms.
[11:49:54.518] <TB2> INFO: The DUT currently contains the following objects:
[11:49:54.518] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:54.518] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:54.518] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:54.518] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:54.518] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:54.519] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.623] <TB2> INFO: Test took 1105ms.
[11:49:55.624] <TB2> INFO: The DUT currently contains the following objects:
[11:49:55.624] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:55.624] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:55.624] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:55.624] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:55.624] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:55.624] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.731] <TB2> INFO: Test took 1107ms.
[11:49:56.732] <TB2> INFO: The DUT currently contains the following objects:
[11:49:56.732] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:49:56.732] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:49:56.732] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:49:56.732] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:49:56.732] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.732] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.732] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.732] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.732] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:56.733] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:49:57.839] <TB2> INFO: Test took 1106ms.
[11:49:57.844] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:06.048] <TB2> INFO: Test took 248205ms.
[11:54:07.841] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:57:59.225] <TB2> INFO: Test took 231384ms.
[11:58:00.875] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.886] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.896] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.907] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.917] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.927] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.938] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.948] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[11:58:00.958] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[11:58:00.967] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[11:58:00.974] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.981] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.988] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:00.998] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[11:58:01.008] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[11:58:01.015] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:01.022] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:01.029] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:01.035] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:01.046] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:01.056] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:01.119] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C0.dat
[11:58:01.119] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C1.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C2.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C3.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C4.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C5.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C6.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C7.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C8.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C9.dat
[11:58:01.120] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C10.dat
[11:58:01.121] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C11.dat
[11:58:01.121] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C12.dat
[11:58:01.121] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C13.dat
[11:58:01.121] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C14.dat
[11:58:01.121] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C15.dat
[11:58:04.546] <TB2> INFO: Test took 3422ms.
[11:58:08.326] <TB2> INFO: Test took 3514ms.
[11:58:12.138] <TB2> INFO: Test took 3543ms.
[11:58:12.460] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:13.382] <TB2> INFO: Test took 923ms.
[11:58:13.386] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:14.492] <TB2> INFO: Test took 1106ms.
[11:58:14.494] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:15.606] <TB2> INFO: Test took 1112ms.
[11:58:15.610] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:16.722] <TB2> INFO: Test took 1112ms.
[11:58:16.726] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:17.837] <TB2> INFO: Test took 1112ms.
[11:58:17.841] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:18.952] <TB2> INFO: Test took 1111ms.
[11:58:18.956] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:20.065] <TB2> INFO: Test took 1109ms.
[11:58:20.068] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:21.175] <TB2> INFO: Test took 1107ms.
[11:58:21.179] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:22.287] <TB2> INFO: Test took 1108ms.
[11:58:22.291] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:23.413] <TB2> INFO: Test took 1122ms.
[11:58:23.416] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:24.527] <TB2> INFO: Test took 1111ms.
[11:58:24.531] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:25.643] <TB2> INFO: Test took 1112ms.
[11:58:25.647] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:26.757] <TB2> INFO: Test took 1110ms.
[11:58:26.761] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:27.888] <TB2> INFO: Test took 1127ms.
[11:58:27.892] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:29.000] <TB2> INFO: Test took 1108ms.
[11:58:29.003] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:30.112] <TB2> INFO: Test took 1109ms.
[11:58:30.116] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:31.223] <TB2> INFO: Test took 1107ms.
[11:58:31.227] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:32.333] <TB2> INFO: Test took 1106ms.
[11:58:32.337] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:33.444] <TB2> INFO: Test took 1107ms.
[11:58:33.448] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:34.555] <TB2> INFO: Test took 1107ms.
[11:58:34.559] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:35.666] <TB2> INFO: Test took 1107ms.
[11:58:35.670] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:36.790] <TB2> INFO: Test took 1121ms.
[11:58:36.794] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:37.914] <TB2> INFO: Test took 1121ms.
[11:58:37.918] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:39.024] <TB2> INFO: Test took 1107ms.
[11:58:39.028] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:40.150] <TB2> INFO: Test took 1122ms.
[11:58:40.154] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:41.274] <TB2> INFO: Test took 1120ms.
[11:58:41.277] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:42.398] <TB2> INFO: Test took 1121ms.
[11:58:42.401] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:43.507] <TB2> INFO: Test took 1106ms.
[11:58:43.511] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:44.617] <TB2> INFO: Test took 1107ms.
[11:58:44.620] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:45.756] <TB2> INFO: Test took 1136ms.
[11:58:45.759] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:46.866] <TB2> INFO: Test took 1107ms.
[11:58:46.869] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:47.976] <TB2> INFO: Test took 1107ms.
[11:58:48.503] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 559 seconds
[11:58:48.503] <TB2> INFO: PH scale (per ROC): 89 81 91 90 85 76 80 81 87 80 79 84 84 76 71 74
[11:58:48.503] <TB2> INFO: PH offset (per ROC): 155 159 149 154 155 167 161 155 157 176 169 158 159 165 161 180
[11:58:48.670] <TB2> INFO: ######################################################################
[11:58:48.670] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:58:48.670] <TB2> INFO: ######################################################################
[11:58:48.680] <TB2> INFO: scanning low vcal = 10
[11:58:52.511] <TB2> INFO: Test took 3831ms.
[11:58:52.517] <TB2> INFO: scanning low vcal = 20
[11:58:56.379] <TB2> INFO: Test took 3862ms.
[11:58:56.385] <TB2> INFO: scanning low vcal = 30
[11:59:00.219] <TB2> INFO: Test took 3834ms.
[11:59:00.229] <TB2> INFO: scanning low vcal = 40
[11:59:04.680] <TB2> INFO: Test took 4451ms.
[11:59:04.738] <TB2> INFO: scanning low vcal = 50
[11:59:09.216] <TB2> INFO: Test took 4478ms.
[11:59:09.270] <TB2> INFO: scanning low vcal = 60
[11:59:13.828] <TB2> INFO: Test took 4558ms.
[11:59:13.883] <TB2> INFO: scanning low vcal = 70
[11:59:18.455] <TB2> INFO: Test took 4572ms.
[11:59:18.528] <TB2> INFO: scanning low vcal = 80
[11:59:22.953] <TB2> INFO: Test took 4424ms.
[11:59:23.016] <TB2> INFO: scanning low vcal = 90
[11:59:27.523] <TB2> INFO: Test took 4507ms.
[11:59:27.584] <TB2> INFO: scanning low vcal = 100
[11:59:32.156] <TB2> INFO: Test took 4572ms.
[11:59:32.255] <TB2> INFO: scanning low vcal = 110
[11:59:36.868] <TB2> INFO: Test took 4613ms.
[11:59:36.930] <TB2> INFO: scanning low vcal = 120
[11:59:41.632] <TB2> INFO: Test took 4702ms.
[11:59:41.705] <TB2> INFO: scanning low vcal = 130
[11:59:46.401] <TB2> INFO: Test took 4696ms.
[11:59:46.495] <TB2> INFO: scanning low vcal = 140
[11:59:51.162] <TB2> INFO: Test took 4667ms.
[11:59:51.240] <TB2> INFO: scanning low vcal = 150
[11:59:55.775] <TB2> INFO: Test took 4535ms.
[11:59:55.832] <TB2> INFO: scanning low vcal = 160
[12:00:00.268] <TB2> INFO: Test took 4436ms.
[12:00:00.363] <TB2> INFO: scanning low vcal = 170
[12:00:04.926] <TB2> INFO: Test took 4563ms.
[12:00:04.984] <TB2> INFO: scanning low vcal = 180
[12:00:09.399] <TB2> INFO: Test took 4415ms.
[12:00:09.485] <TB2> INFO: scanning low vcal = 190
[12:00:14.118] <TB2> INFO: Test took 4633ms.
[12:00:14.218] <TB2> INFO: scanning low vcal = 200
[12:00:18.657] <TB2> INFO: Test took 4439ms.
[12:00:18.729] <TB2> INFO: scanning low vcal = 210
[12:00:22.939] <TB2> INFO: Test took 4210ms.
[12:00:22.993] <TB2> INFO: scanning low vcal = 220
[12:00:27.277] <TB2> INFO: Test took 4284ms.
[12:00:27.332] <TB2> INFO: scanning low vcal = 230
[12:00:31.646] <TB2> INFO: Test took 4314ms.
[12:00:31.704] <TB2> INFO: scanning low vcal = 240
[12:00:35.901] <TB2> INFO: Test took 4197ms.
[12:00:35.955] <TB2> INFO: scanning low vcal = 250
[12:00:40.237] <TB2> INFO: Test took 4281ms.
[12:00:40.293] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[12:00:44.599] <TB2> INFO: Test took 4306ms.
[12:00:44.670] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[12:00:48.888] <TB2> INFO: Test took 4218ms.
[12:00:48.942] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[12:00:53.171] <TB2> INFO: Test took 4229ms.
[12:00:53.224] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[12:00:57.412] <TB2> INFO: Test took 4188ms.
[12:00:57.466] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:01:01.675] <TB2> INFO: Test took 4208ms.
[12:01:02.136] <TB2> INFO: PixTestGainPedestal::measure() done
[12:01:32.409] <TB2> INFO: PixTestGainPedestal::fit() done
[12:01:32.409] <TB2> INFO: non-linearity mean: 0.957 0.957 0.960 0.959 0.956 0.951 0.961 0.961 0.955 0.957 0.961 0.961 0.961 0.957 0.956 0.958
[12:01:32.409] <TB2> INFO: non-linearity RMS: 0.006 0.006 0.005 0.005 0.005 0.007 0.005 0.005 0.007 0.006 0.006 0.006 0.005 0.005 0.006 0.006
[12:01:32.409] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[12:01:32.427] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[12:01:32.445] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[12:01:32.463] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[12:01:32.482] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[12:01:32.500] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[12:01:32.518] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[12:01:32.536] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[12:01:32.554] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[12:01:32.572] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[12:01:32.590] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[12:01:32.608] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[12:01:32.626] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[12:01:32.645] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[12:01:32.663] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[12:01:32.681] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2078_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[12:01:32.699] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 164 seconds
[12:01:32.705] <TB2> INFO: enter test to run
[12:01:32.705] <TB2> INFO: test: exit no parameter change
[12:01:33.153] <TB2> QUIET: Connection to board 156 closed.
[12:01:33.233] <TB2> INFO: pXar: this is the end, my friend