[13:26:59.484] <TB1> INFO: *** Welcome to pxar ***
[13:26:59.485] <TB1> INFO: *** Today: 2015/08/21
[13:26:59.485] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C15.dat
[13:26:59.486] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//tbmParameters_C0b.dat
[13:26:59.486] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//defaultMaskFile.dat
[13:26:59.486] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters_C15.dat
[13:26:59.581] <TB1> INFO: clk: 4
[13:26:59.581] <TB1> INFO: ctr: 4
[13:26:59.581] <TB1> INFO: sda: 19
[13:26:59.581] <TB1> INFO: tin: 9
[13:26:59.581] <TB1> INFO: level: 15
[13:26:59.581] <TB1> INFO: triggerdelay: 0
[13:26:59.581] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[13:26:59.581] <TB1> INFO: Log level: INFO
[13:26:59.589] <TB1> INFO: Found DTB DTB_WXBYFL
[13:26:59.601] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[13:26:59.605] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[13:26:59.608] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[13:27:01.134] <TB1> INFO: DUT info:
[13:27:01.134] <TB1> INFO: The DUT currently contains the following objects:
[13:27:01.134] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:27:01.134] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:27:01.134] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:27:01.134] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:27:01.134] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.134] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.134] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.134] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.134] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.134] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.134] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.134] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.135] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.135] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.135] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.135] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.135] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.135] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.135] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.135] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:27:01.536] <TB1> INFO: enter 'restricted' command line mode
[13:27:01.536] <TB1> INFO: enter test to run
[13:27:01.536] <TB1> INFO: test: pretest no parameter change
[13:27:01.536] <TB1> INFO: running: pretest
[13:27:01.542] <TB1> INFO: ######################################################################
[13:27:01.542] <TB1> INFO: PixTestPretest::doTest()
[13:27:01.542] <TB1> INFO: ######################################################################
[13:27:01.544] <TB1> INFO: ----------------------------------------------------------------------
[13:27:01.544] <TB1> INFO: PixTestPretest::programROC()
[13:27:01.544] <TB1> INFO: ----------------------------------------------------------------------
[13:27:19.566] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:27:19.566] <TB1> INFO: IA differences per ROC: 16.9 17.7 19.3 18.5 17.7 19.3 16.9 17.7 20.1 18.5 19.3 17.7 20.1 19.3 19.3 18.5
[13:27:19.651] <TB1> INFO: ----------------------------------------------------------------------
[13:27:19.651] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:27:19.651] <TB1> INFO: ----------------------------------------------------------------------
[13:27:23.239] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[13:27:23.242] <TB1> INFO: ----------------------------------------------------------------------
[13:27:23.242] <TB1> INFO: PixTestPretest::findWorkingPixel()
[13:27:23.242] <TB1> INFO: ----------------------------------------------------------------------
[13:27:31.696] <TB1> INFO: Test took 8449ms.
[13:27:32.006] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:27:32.059] <TB1> INFO: ----------------------------------------------------------------------
[13:27:32.059] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[13:27:32.059] <TB1> INFO: ----------------------------------------------------------------------
[13:27:40.384] <TB1> INFO: Test took 8315ms.
[13:27:40.723] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[13:27:40.723] <TB1> INFO: CalDel: 176 184 143 121 137 138 126 124 143 156 162 139 146 146 145 158
[13:27:40.723] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:27:40.728] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C0.dat
[13:27:40.728] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C1.dat
[13:27:40.728] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C2.dat
[13:27:40.728] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C3.dat
[13:27:40.728] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C4.dat
[13:27:40.728] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C5.dat
[13:27:40.728] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C6.dat
[13:27:40.729] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C7.dat
[13:27:40.729] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C8.dat
[13:27:40.729] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C9.dat
[13:27:40.729] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C10.dat
[13:27:40.729] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C11.dat
[13:27:40.729] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C12.dat
[13:27:40.729] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C13.dat
[13:27:40.730] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C14.dat
[13:27:40.730] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters_C15.dat
[13:27:40.730] <TB1> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[13:27:40.818] <TB1> INFO: enter test to run
[13:27:40.818] <TB1> INFO: test: fulltest no parameter change
[13:27:40.818] <TB1> INFO: running: fulltest
[13:27:40.818] <TB1> INFO: ######################################################################
[13:27:40.818] <TB1> INFO: PixTestFullTest::doTest()
[13:27:40.818] <TB1> INFO: ######################################################################
[13:27:40.821] <TB1> INFO: ######################################################################
[13:27:40.821] <TB1> INFO: PixTestAlive::doTest()
[13:27:40.821] <TB1> INFO: ######################################################################
[13:27:40.823] <TB1> INFO: ----------------------------------------------------------------------
[13:27:40.823] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:27:40.823] <TB1> INFO: ----------------------------------------------------------------------
[13:27:44.228] <TB1> INFO: Test took 3403ms.
[13:27:44.250] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:44.490] <TB1> INFO: PixTestAlive::aliveTest() done
[13:27:44.490] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[13:27:44.492] <TB1> INFO: ----------------------------------------------------------------------
[13:27:44.492] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:27:44.492] <TB1> INFO: ----------------------------------------------------------------------
[13:27:47.213] <TB1> INFO: Test took 2719ms.
[13:27:47.214] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:47.215] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:27:47.454] <TB1> INFO: PixTestAlive::maskTest() done
[13:27:47.454] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:27:47.458] <TB1> INFO: ----------------------------------------------------------------------
[13:27:47.458] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:27:47.458] <TB1> INFO: ----------------------------------------------------------------------
[13:27:50.918] <TB1> INFO: Test took 3457ms.
[13:27:50.941] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:51.189] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[13:27:51.189] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:27:51.190] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:27:51.200] <TB1> INFO: ######################################################################
[13:27:51.200] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:27:51.200] <TB1> INFO: ######################################################################
[13:27:51.205] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:27:51.222] <TB1> INFO: dacScan step from 0 .. 29
[13:28:12.567] <TB1> INFO: Test took 21345ms.
[13:28:12.599] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:12.599] <TB1> INFO: dacScan step from 30 .. 59
[13:28:35.934] <TB1> INFO: Test took 23335ms.
[13:28:36.071] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:36.088] <TB1> INFO: dacScan step from 60 .. 89
[13:29:05.163] <TB1> INFO: Test took 29075ms.
[13:29:05.439] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:05.513] <TB1> INFO: dacScan step from 90 .. 119
[13:29:34.622] <TB1> INFO: Test took 29109ms.
[13:29:34.887] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:34.965] <TB1> INFO: dacScan step from 120 .. 149
[13:30:01.213] <TB1> INFO: Test took 26248ms.
[13:30:01.438] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:25.401] <TB1> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[13:30:25.401] <TB1> INFO: number of dead bumps (per ROC): 31 1 0 1 0 0 1 0 0 0 0 1 0 0 2 1
[13:30:25.401] <TB1> INFO: separation cut (per ROC): 70 83 91 75 89 89 78 95 90 87 92 77 78 84 88 90
[13:30:25.481] <TB1> INFO: ######################################################################
[13:30:25.481] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[13:30:25.481] <TB1> INFO: ######################################################################
[13:30:25.482] <TB1> INFO: ----------------------------------------------------------------------
[13:30:25.482] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:30:25.482] <TB1> INFO: ----------------------------------------------------------------------
[13:30:25.482] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:30:25.490] <TB1> INFO: dacScan step from 0 .. 3
[13:30:43.183] <TB1> INFO: Test took 17693ms.
[13:30:43.212] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:43.212] <TB1> INFO: dacScan step from 4 .. 7
[13:31:02.278] <TB1> INFO: Test took 19066ms.
[13:31:02.308] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:02.308] <TB1> INFO: dacScan step from 8 .. 11
[13:31:21.390] <TB1> INFO: Test took 19082ms.
[13:31:21.417] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:21.418] <TB1> INFO: dacScan step from 12 .. 15
[13:31:40.477] <TB1> INFO: Test took 19059ms.
[13:31:40.508] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:40.508] <TB1> INFO: dacScan step from 16 .. 19
[13:31:59.607] <TB1> INFO: Test took 19099ms.
[13:31:59.637] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:59.637] <TB1> INFO: dacScan step from 20 .. 23
[13:32:18.725] <TB1> INFO: Test took 19088ms.
[13:32:18.754] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:18.754] <TB1> INFO: dacScan step from 24 .. 27
[13:32:37.817] <TB1> INFO: Test took 19063ms.
[13:32:37.847] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:37.847] <TB1> INFO: dacScan step from 28 .. 31
[13:32:56.865] <TB1> INFO: Test took 19018ms.
[13:32:56.891] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:56.891] <TB1> INFO: dacScan step from 32 .. 35
[13:33:15.875] <TB1> INFO: Test took 18983ms.
[13:33:15.909] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:15.909] <TB1> INFO: dacScan step from 36 .. 39
[13:33:34.856] <TB1> INFO: Test took 18947ms.
[13:33:34.882] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:34.882] <TB1> INFO: dacScan step from 40 .. 43
[13:33:53.854] <TB1> INFO: Test took 18972ms.
[13:33:53.881] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:53.881] <TB1> INFO: dacScan step from 44 .. 47
[13:34:12.979] <TB1> INFO: Test took 19097ms.
[13:34:13.010] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:13.010] <TB1> INFO: dacScan step from 48 .. 51
[13:34:31.936] <TB1> INFO: Test took 18925ms.
[13:34:31.965] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:31.965] <TB1> INFO: dacScan step from 52 .. 55
[13:34:51.070] <TB1> INFO: Test took 19105ms.
[13:34:51.099] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:51.100] <TB1> INFO: dacScan step from 56 .. 59
[13:35:10.135] <TB1> INFO: Test took 19034ms.
[13:35:10.167] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:10.168] <TB1> INFO: dacScan step from 60 .. 63
[13:35:29.287] <TB1> INFO: Test took 19119ms.
[13:35:29.318] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:29.318] <TB1> INFO: dacScan step from 64 .. 67
[13:35:48.415] <TB1> INFO: Test took 19097ms.
[13:35:48.447] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:48.447] <TB1> INFO: dacScan step from 68 .. 71
[13:36:07.425] <TB1> INFO: Test took 18978ms.
[13:36:07.457] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:07.457] <TB1> INFO: dacScan step from 72 .. 75
[13:36:26.556] <TB1> INFO: Test took 19099ms.
[13:36:26.586] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:26.587] <TB1> INFO: dacScan step from 76 .. 79
[13:36:45.958] <TB1> INFO: Test took 19371ms.
[13:36:46.003] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:46.005] <TB1> INFO: dacScan step from 80 .. 83
[13:37:07.243] <TB1> INFO: Test took 21238ms.
[13:37:07.334] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:07.340] <TB1> INFO: dacScan step from 84 .. 87
[13:37:30.357] <TB1> INFO: Test took 23017ms.
[13:37:30.495] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:30.501] <TB1> INFO: dacScan step from 88 .. 91
[13:37:54.870] <TB1> INFO: Test took 24369ms.
[13:37:55.028] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:55.035] <TB1> INFO: dacScan step from 92 .. 95
[13:38:21.461] <TB1> INFO: Test took 26426ms.
[13:38:21.662] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:21.671] <TB1> INFO: dacScan step from 96 .. 99
[13:38:49.380] <TB1> INFO: Test took 27709ms.
[13:38:49.589] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:49.600] <TB1> INFO: dacScan step from 100 .. 103


[13:39:18.470] <TB1> INFO: Test took 28870ms.
[13:39:18.701] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:18.713] <TB1> INFO: dacScan step from 104 .. 107

[13:39:47.961] <TB1> INFO: Test took 29248ms.
[13:39:48.221] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:48.235] <TB1> INFO: dacScan step from 108 .. 111



[13:40:17.829] <TB1> INFO: Test took 29594ms.
[13:40:18.065] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:18.077] <TB1> INFO: dacScan step from 112 .. 115


[13:40:47.729] <TB1> INFO: Test took 29652ms.
[13:40:47.950] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:47.963] <TB1> INFO: dacScan step from 116 .. 119


[13:41:17.703] <TB1> INFO: Test took 29740ms.
[13:41:17.943] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:17.956] <TB1> INFO: dacScan step from 120 .. 123
[13:41:47.490] <TB1> INFO: Test took 29533ms.
[13:41:47.720] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:47.733] <TB1> INFO: dacScan step from 124 .. 127


[13:42:17.328] <TB1> INFO: Test took 29595ms.
[13:42:17.571] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:17.583] <TB1> INFO: dacScan step from 128 .. 131





[13:42:46.960] <TB1> INFO: Test took 29377ms.
[13:42:47.204] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:47.218] <TB1> INFO: dacScan step from 132 .. 135
[13:43:16.652] <TB1> INFO: Test took 29434ms.
[13:43:16.875] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:16.889] <TB1> INFO: dacScan step from 136 .. 139
[13:43:46.288] <TB1> INFO: Test took 29399ms.
[13:43:46.529] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:46.544] <TB1> INFO: dacScan step from 140 .. 143
[13:44:15.855] <TB1> INFO: Test took 29311ms.
[13:44:16.083] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:16.095] <TB1> INFO: dacScan step from 144 .. 147
[13:44:45.422] <TB1> INFO: Test took 29327ms.
[13:44:45.648] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:45.660] <TB1> INFO: dacScan step from 148 .. 149
[13:45:01.717] <TB1> INFO: Test took 16057ms.
[13:45:01.836] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:01.843] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:03.307] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:04.731] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:06.235] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:07.704] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:09.125] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:10.687] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:12.152] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:13.583] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:15.115] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:16.550] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:17.942] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:19.404] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:20.858] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:22.315] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:23.805] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[13:45:25.340] <TB1> INFO: PixTestScurves::scurves() done
[13:45:25.340] <TB1> INFO: Vcal mean: 95.82 102.80 86.60 83.96 92.34 87.02 83.12 100.38 95.85 91.61 100.90 85.72 86.53 90.49 87.50 97.35
[13:45:25.340] <TB1> INFO: Vcal RMS: 6.06 5.77 5.07 4.51 5.58 5.50 4.48 5.55 5.78 5.42 6.68 5.10 5.24 6.13 5.48 6.35
[13:45:25.340] <TB1> INFO: PixTestScurves::fullTest() done, duration: 899 seconds
[13:45:25.415] <TB1> INFO: ######################################################################
[13:45:25.415] <TB1> INFO: PixTestTrim::doTest()
[13:45:25.415] <TB1> INFO: ######################################################################
[13:45:25.416] <TB1> INFO: ----------------------------------------------------------------------
[13:45:25.416] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:45:25.416] <TB1> INFO: ----------------------------------------------------------------------
[13:45:25.506] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:45:25.506] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:45:25.515] <TB1> INFO: dacScan step from 0 .. 19
[13:45:39.891] <TB1> INFO: Test took 14376ms.
[13:45:39.913] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:39.913] <TB1> INFO: dacScan step from 20 .. 39
[13:45:54.279] <TB1> INFO: Test took 14366ms.
[13:45:54.301] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:54.301] <TB1> INFO: dacScan step from 40 .. 59
[13:46:09.376] <TB1> INFO: Test took 15075ms.
[13:46:09.403] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:09.404] <TB1> INFO: dacScan step from 60 .. 79
[13:46:24.440] <TB1> INFO: Test took 15036ms.
[13:46:24.463] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:24.463] <TB1> INFO: dacScan step from 80 .. 99
[13:46:39.033] <TB1> INFO: Test took 14570ms.
[13:46:39.073] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:39.078] <TB1> INFO: dacScan step from 100 .. 119
[13:46:57.736] <TB1> INFO: Test took 18658ms.
[13:46:57.886] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:57.918] <TB1> INFO: dacScan step from 120 .. 139
[13:47:15.934] <TB1> INFO: Test took 18016ms.
[13:47:16.108] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:16.155] <TB1> INFO: dacScan step from 140 .. 159
[13:47:32.586] <TB1> INFO: Test took 16431ms.
[13:47:32.677] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:54.769] <TB1> INFO: ROC 0 VthrComp = 92
[13:47:54.769] <TB1> INFO: ROC 1 VthrComp = 97
[13:47:54.770] <TB1> INFO: ROC 2 VthrComp = 97
[13:47:54.770] <TB1> INFO: ROC 3 VthrComp = 92
[13:47:54.770] <TB1> INFO: ROC 4 VthrComp = 95
[13:47:54.770] <TB1> INFO: ROC 5 VthrComp = 95
[13:47:54.770] <TB1> INFO: ROC 6 VthrComp = 90
[13:47:54.770] <TB1> INFO: ROC 7 VthrComp = 104
[13:47:54.770] <TB1> INFO: ROC 8 VthrComp = 101
[13:47:54.770] <TB1> INFO: ROC 9 VthrComp = 97
[13:47:54.771] <TB1> INFO: ROC 10 VthrComp = 98
[13:47:54.771] <TB1> INFO: ROC 11 VthrComp = 87
[13:47:54.771] <TB1> INFO: ROC 12 VthrComp = 92
[13:47:54.771] <TB1> INFO: ROC 13 VthrComp = 92
[13:47:54.771] <TB1> INFO: ROC 14 VthrComp = 93
[13:47:54.771] <TB1> INFO: ROC 15 VthrComp = 97
[13:47:54.771] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:47:54.771] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:47:54.781] <TB1> INFO: dacScan step from 0 .. 19
[13:48:09.364] <TB1> INFO: Test took 14583ms.
[13:48:09.386] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:09.386] <TB1> INFO: dacScan step from 20 .. 39
[13:48:23.985] <TB1> INFO: Test took 14599ms.
[13:48:24.021] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:24.026] <TB1> INFO: dacScan step from 40 .. 59
[13:48:41.846] <TB1> INFO: Test took 17820ms.
[13:48:42.001] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:42.042] <TB1> INFO: dacScan step from 60 .. 79
[13:49:01.196] <TB1> INFO: Test took 19154ms.
[13:49:01.373] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:01.468] <TB1> INFO: dacScan step from 80 .. 99
[13:49:20.602] <TB1> INFO: Test took 19133ms.
[13:49:20.790] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:20.848] <TB1> INFO: dacScan step from 100 .. 119
[13:49:40.278] <TB1> INFO: Test took 19430ms.
[13:49:40.442] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:40.501] <TB1> INFO: dacScan step from 120 .. 139
[13:50:00.164] <TB1> INFO: Test took 19663ms.
[13:50:00.343] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:00.403] <TB1> INFO: dacScan step from 140 .. 159
[13:50:20.706] <TB1> INFO: Test took 20303ms.
[13:50:20.875] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:45.809] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 63.1038 for pixel 4/0 mean/min/max = 47.8752/32.5902/63.1601
[13:50:45.810] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 62.3774 for pixel 14/76 mean/min/max = 47.38/32.074/62.686
[13:50:45.810] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 56.0466 for pixel 19/1 mean/min/max = 43.8076/31.535/56.0801
[13:50:45.810] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 56.3605 for pixel 24/1 mean/min/max = 44.1897/31.9648/56.4146
[13:50:45.811] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.4607 for pixel 4/73 mean/min/max = 44.8898/31.2666/58.5129
[13:50:45.811] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.7848 for pixel 10/4 mean/min/max = 45.2307/31.6036/58.8579
[13:50:45.811] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 56.4332 for pixel 51/73 mean/min/max = 44.923/33.4036/56.4424
[13:50:45.812] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.7562 for pixel 24/79 mean/min/max = 46.5898/33.3375/59.8421
[13:50:45.812] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 59.5566 for pixel 19/5 mean/min/max = 45.8961/31.8912/59.9011
[13:50:45.812] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 58.4721 for pixel 13/72 mean/min/max = 44.8803/31.2878/58.4729
[13:50:45.813] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 66.5606 for pixel 0/78 mean/min/max = 48.8118/30.5705/67.0532
[13:50:45.813] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.3048 for pixel 0/11 mean/min/max = 45.1198/31.8669/58.3727
[13:50:45.813] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 58.5832 for pixel 22/78 mean/min/max = 45.5281/32.324/58.7323
[13:50:45.813] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 63.3471 for pixel 0/39 mean/min/max = 47.431/31.3501/63.5119
[13:50:45.814] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.0392 for pixel 8/74 mean/min/max = 45.027/31.8052/58.2488
[13:50:45.814] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 61.8961 for pixel 15/66 mean/min/max = 46.5544/31.1708/61.9381
[13:50:45.814] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:17.688] <TB1> INFO: Test took 91874ms.
[13:52:19.115] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:52:19.125] <TB1> INFO: dacScan step from 0 .. 19
[13:52:40.534] <TB1> INFO: Test took 21409ms.
[13:52:40.588] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:40.591] <TB1> INFO: dacScan step from 20 .. 39
[13:53:09.123] <TB1> INFO: Test took 28532ms.
[13:53:09.384] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:09.421] <TB1> INFO: dacScan step from 40 .. 59





[13:53:42.922] <TB1> INFO: Test took 33501ms.
[13:53:43.224] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:43.284] <TB1> INFO: dacScan step from 60 .. 79

[13:54:16.381] <TB1> INFO: Test took 33097ms.
[13:54:16.671] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:16.727] <TB1> INFO: dacScan step from 80 .. 99

[13:54:49.797] <TB1> INFO: Test took 33069ms.
[13:54:50.070] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:50.124] <TB1> INFO: dacScan step from 100 .. 119



[13:55:23.337] <TB1> INFO: Test took 33213ms.
[13:55:23.625] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:23.682] <TB1> INFO: dacScan step from 120 .. 139


[13:55:57.114] <TB1> INFO: Test took 33432ms.
[13:55:57.390] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:57.447] <TB1> INFO: dacScan step from 140 .. 159


[13:56:30.716] <TB1> INFO: Test took 33269ms.
[13:56:31.004] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:31.066] <TB1> INFO: dacScan step from 160 .. 179
[13:57:04.517] <TB1> INFO: Test took 33451ms.
[13:57:04.798] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:04.856] <TB1> INFO: dacScan step from 180 .. 199


[13:57:38.832] <TB1> INFO: Test took 33976ms.
[13:57:39.122] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:04.785] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.006930 .. 255.000000
[13:58:04.863] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:58:04.872] <TB1> INFO: dacScan step from 0 .. 19
[13:58:17.866] <TB1> INFO: Test took 12994ms.
[13:58:17.887] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:17.887] <TB1> INFO: dacScan step from 20 .. 39
[13:58:32.827] <TB1> INFO: Test took 14940ms.
[13:58:32.910] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:32.928] <TB1> INFO: dacScan step from 40 .. 59
[13:58:50.765] <TB1> INFO: Test took 17837ms.
[13:58:50.925] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:50.983] <TB1> INFO: dacScan step from 60 .. 79
[13:59:08.673] <TB1> INFO: Test took 17690ms.
[13:59:08.825] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:08.883] <TB1> INFO: dacScan step from 80 .. 99
[13:59:26.683] <TB1> INFO: Test took 17800ms.
[13:59:26.837] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:26.898] <TB1> INFO: dacScan step from 100 .. 119
[13:59:44.174] <TB1> INFO: Test took 17276ms.
[13:59:44.320] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:44.381] <TB1> INFO: dacScan step from 120 .. 139
[14:00:00.917] <TB1> INFO: Test took 16536ms.
[14:00:01.060] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:01.118] <TB1> INFO: dacScan step from 140 .. 159
[14:00:18.898] <TB1> INFO: Test took 17780ms.
[14:00:19.046] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:19.101] <TB1> INFO: dacScan step from 160 .. 179
[14:00:36.055] <TB1> INFO: Test took 16954ms.
[14:00:36.285] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:36.373] <TB1> INFO: dacScan step from 180 .. 199
[14:00:54.901] <TB1> INFO: Test took 18528ms.
[14:00:55.051] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:55.115] <TB1> INFO: dacScan step from 200 .. 219
[14:01:12.832] <TB1> INFO: Test took 17717ms.
[14:01:12.986] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:13.044] <TB1> INFO: dacScan step from 220 .. 239
[14:01:30.751] <TB1> INFO: Test took 17707ms.
[14:01:30.905] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:30.965] <TB1> INFO: dacScan step from 240 .. 255
[14:01:45.826] <TB1> INFO: Test took 14861ms.
[14:01:45.952] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:19.262] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 1.988826 .. 48.627404
[14:02:19.340] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 1 .. 58 (20) hits flags = 16 (plus default)
[14:02:19.349] <TB1> INFO: dacScan step from 1 .. 20
[14:02:32.307] <TB1> INFO: Test took 12958ms.
[14:02:32.328] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:32.328] <TB1> INFO: dacScan step from 21 .. 40
[14:02:47.295] <TB1> INFO: Test took 14967ms.
[14:02:47.384] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:47.405] <TB1> INFO: dacScan step from 41 .. 58
[14:03:03.731] <TB1> INFO: Test took 16326ms.
[14:03:03.875] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:20.716] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 16.783108 .. 48.627404
[14:03:20.791] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 6 .. 58 (20) hits flags = 16 (plus default)
[14:03:20.800] <TB1> INFO: dacScan step from 6 .. 25
[14:03:34.154] <TB1> INFO: Test took 13354ms.
[14:03:34.180] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:34.180] <TB1> INFO: dacScan step from 26 .. 45
[14:03:50.164] <TB1> INFO: Test took 15983ms.
[14:03:50.289] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:50.330] <TB1> INFO: dacScan step from 46 .. 58
[14:04:02.202] <TB1> INFO: Test took 11872ms.
[14:04:02.352] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:19.392] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 1.025651 .. 48.627404
[14:04:19.467] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 58 (20) hits flags = 16 (plus default)
[14:04:19.476] <TB1> INFO: dacScan step from 1 .. 20
[14:04:32.750] <TB1> INFO: Test took 13274ms.
[14:04:32.772] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:32.772] <TB1> INFO: dacScan step from 21 .. 40
[14:04:46.932] <TB1> INFO: Test took 14160ms.
[14:04:47.016] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:47.038] <TB1> INFO: dacScan step from 41 .. 58
[14:05:02.368] <TB1> INFO: Test took 15330ms.
[14:05:02.497] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:19.356] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:05:19.356] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:05:19.365] <TB1> INFO: dacScan step from 15 .. 34
[14:05:42.643] <TB1> INFO: Test took 23278ms.
[14:05:42.716] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:42.728] <TB1> INFO: dacScan step from 35 .. 54


[14:06:13.710] <TB1> INFO: Test took 30982ms.
[14:06:14.036] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:14.092] <TB1> INFO: dacScan step from 55 .. 55
[14:06:18.293] <TB1> INFO: Test took 4201ms.
[14:06:18.308] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:31.895] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:06:31.896] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:06:31.898] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:06:31.899] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:06:31.899] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:06:31.899] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:06:31.899] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:06:31.899] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:06:31.900] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:06:31.900] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:06:31.900] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:06:31.900] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:06:31.900] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:06:31.901] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:06:31.901] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:06:31.901] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:06:31.901] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C0.dat
[14:06:31.909] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C1.dat
[14:06:31.915] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C2.dat
[14:06:31.921] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C3.dat
[14:06:31.927] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C4.dat
[14:06:31.933] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C5.dat
[14:06:31.939] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C6.dat
[14:06:31.945] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C7.dat
[14:06:31.951] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C8.dat
[14:06:31.957] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C9.dat
[14:06:31.962] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C10.dat
[14:06:31.968] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C11.dat
[14:06:31.974] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C12.dat
[14:06:31.980] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C13.dat
[14:06:31.986] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C14.dat
[14:06:31.992] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//trimParameters35_C15.dat
[14:06:31.998] <TB1> INFO: PixTestTrim::trimTest() done
[14:06:31.998] <TB1> INFO: vtrim: 127 103 110 104 100 119 105 179 109 118 122 103 120 102 108 125
[14:06:31.998] <TB1> INFO: vthrcomp: 92 97 97 92 95 95 90 104 101 97 98 87 92 92 93 97
[14:06:31.998] <TB1> INFO: vcal mean: 35.06 35.01 34.96 35.03 35.05 35.03 35.02 34.95 35.03 35.03 35.05 35.03 35.07 35.05 34.99 35.04
[14:06:31.998] <TB1> INFO: vcal RMS: 1.23 1.58 1.01 0.97 1.07 1.03 1.10 2.03 1.05 1.07 1.20 1.06 1.02 1.02 1.00 1.06
[14:06:31.998] <TB1> INFO: bits mean: 9.36 9.38 10.16 10.24 10.25 9.78 9.56 11.49 9.65 10.33 9.48 9.90 9.74 8.98 9.76 10.02
[14:06:31.998] <TB1> INFO: bits RMS: 2.55 2.67 2.57 2.37 2.48 2.63 2.47 1.57 2.57 2.43 2.65 2.54 2.55 2.89 2.66 2.47
[14:06:32.008] <TB1> INFO: ----------------------------------------------------------------------
[14:06:32.008] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[14:06:32.008] <TB1> INFO: ----------------------------------------------------------------------
[14:06:32.012] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:06:32.021] <TB1> INFO: dacScan step from 0 .. 19
[14:06:54.692] <TB1> INFO: Test took 22671ms.
[14:06:54.729] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:54.729] <TB1> INFO: dacScan step from 20 .. 39
[14:07:16.335] <TB1> INFO: Test took 21606ms.
[14:07:16.371] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:16.371] <TB1> INFO: dacScan step from 40 .. 59
[14:07:39.048] <TB1> INFO: Test took 22677ms.
[14:07:39.088] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:39.088] <TB1> INFO: dacScan step from 60 .. 79
[14:08:01.856] <TB1> INFO: Test took 22768ms.
[14:08:01.896] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:01.896] <TB1> INFO: dacScan step from 80 .. 99
[14:08:24.058] <TB1> INFO: Test took 22162ms.
[14:08:24.102] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:24.102] <TB1> INFO: dacScan step from 100 .. 119
[14:08:50.175] <TB1> INFO: Test took 26073ms.
[14:08:50.335] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:50.351] <TB1> INFO: dacScan step from 120 .. 139



[14:09:20.251] <TB1> INFO: Test took 29900ms.
[14:09:20.530] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:20.578] <TB1> INFO: dacScan step from 140 .. 159


[14:09:54.017] <TB1> INFO: Test took 33439ms.
[14:09:54.311] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:54.370] <TB1> INFO: dacScan step from 160 .. 179
[14:10:27.129] <TB1> INFO: Test took 32759ms.
[14:10:27.403] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:27.463] <TB1> INFO: dacScan step from 180 .. 199
[14:11:01.016] <TB1> INFO: Test took 33553ms.
[14:11:01.282] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:27.290] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 174 (20) hits flags = 16 (plus default)
[14:11:27.299] <TB1> INFO: dacScan step from 0 .. 19
[14:11:48.813] <TB1> INFO: Test took 21514ms.
[14:11:48.850] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:48.850] <TB1> INFO: dacScan step from 20 .. 39
[14:12:11.638] <TB1> INFO: Test took 22788ms.
[14:12:11.678] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:11.678] <TB1> INFO: dacScan step from 40 .. 59
[14:12:34.354] <TB1> INFO: Test took 22676ms.
[14:12:34.392] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:34.392] <TB1> INFO: dacScan step from 60 .. 79
[14:12:57.214] <TB1> INFO: Test took 22821ms.
[14:12:57.250] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:57.250] <TB1> INFO: dacScan step from 80 .. 99
[14:13:19.188] <TB1> INFO: Test took 21937ms.
[14:13:19.270] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:19.274] <TB1> INFO: dacScan step from 100 .. 119
[14:13:48.386] <TB1> INFO: Test took 29112ms.
[14:13:48.629] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:48.659] <TB1> INFO: dacScan step from 120 .. 139



[14:14:21.929] <TB1> INFO: Test took 33270ms.
[14:14:22.227] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:22.285] <TB1> INFO: dacScan step from 140 .. 159

[14:14:55.616] <TB1> INFO: Test took 33331ms.
[14:14:55.905] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:55.963] <TB1> INFO: dacScan step from 160 .. 174
[14:15:21.147] <TB1> INFO: Test took 25184ms.
[14:15:21.352] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:45.485] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 162 (20) hits flags = 16 (plus default)
[14:15:45.494] <TB1> INFO: dacScan step from 0 .. 19
[14:16:08.307] <TB1> INFO: Test took 22813ms.
[14:16:08.341] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:08.342] <TB1> INFO: dacScan step from 20 .. 39
[14:16:31.026] <TB1> INFO: Test took 22684ms.
[14:16:31.068] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:31.068] <TB1> INFO: dacScan step from 40 .. 59
[14:16:53.726] <TB1> INFO: Test took 22658ms.
[14:16:53.765] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:53.765] <TB1> INFO: dacScan step from 60 .. 79
[14:17:14.948] <TB1> INFO: Test took 21183ms.
[14:17:14.982] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:14.983] <TB1> INFO: dacScan step from 80 .. 99
[14:17:38.374] <TB1> INFO: Test took 23391ms.
[14:17:38.444] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:38.449] <TB1> INFO: dacScan step from 100 .. 119
[14:18:07.836] <TB1> INFO: Test took 29386ms.
[14:18:08.095] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:08.132] <TB1> INFO: dacScan step from 120 .. 139

[14:18:39.110] <TB1> INFO: Test took 30978ms.
[14:18:39.411] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:39.471] <TB1> INFO: dacScan step from 140 .. 159





[14:19:10.397] <TB1> INFO: Test took 30925ms.
[14:19:10.683] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:10.749] <TB1> INFO: dacScan step from 160 .. 162
[14:19:17.880] <TB1> INFO: Test took 7131ms.
[14:19:17.949] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:42.007] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 161 (20) hits flags = 16 (plus default)
[14:19:42.019] <TB1> INFO: dacScan step from 0 .. 19
[14:20:04.708] <TB1> INFO: Test took 22689ms.
[14:20:04.748] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:04.749] <TB1> INFO: dacScan step from 20 .. 39
[14:20:27.469] <TB1> INFO: Test took 22720ms.
[14:20:27.508] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:27.508] <TB1> INFO: dacScan step from 40 .. 59
[14:20:50.310] <TB1> INFO: Test took 22802ms.
[14:20:50.349] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:50.349] <TB1> INFO: dacScan step from 60 .. 79
[14:21:12.147] <TB1> INFO: Test took 21798ms.
[14:21:12.187] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:12.187] <TB1> INFO: dacScan step from 80 .. 99
[14:21:34.741] <TB1> INFO: Test took 22554ms.
[14:21:34.805] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:34.810] <TB1> INFO: dacScan step from 100 .. 119
[14:22:04.710] <TB1> INFO: Test took 29900ms.
[14:22:04.987] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:05.019] <TB1> INFO: dacScan step from 120 .. 139





[14:22:38.232] <TB1> INFO: Test took 33213ms.
[14:22:38.520] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:38.576] <TB1> INFO: dacScan step from 140 .. 159
[14:23:09.802] <TB1> INFO: Test took 31226ms.
[14:23:10.132] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:10.197] <TB1> INFO: dacScan step from 160 .. 161
[14:23:15.835] <TB1> INFO: Test took 5638ms.
[14:23:15.880] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:38.288] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 160 (20) hits flags = 16 (plus default)
[14:23:38.297] <TB1> INFO: dacScan step from 0 .. 19
[14:24:01.125] <TB1> INFO: Test took 22829ms.
[14:24:01.166] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:01.166] <TB1> INFO: dacScan step from 20 .. 39
[14:24:23.965] <TB1> INFO: Test took 22799ms.
[14:24:24.000] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:24.000] <TB1> INFO: dacScan step from 40 .. 59
[14:24:46.749] <TB1> INFO: Test took 22749ms.
[14:24:46.788] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:46.788] <TB1> INFO: dacScan step from 60 .. 79
[14:25:08.175] <TB1> INFO: Test took 21387ms.
[14:25:08.210] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:08.210] <TB1> INFO: dacScan step from 80 .. 99
[14:25:31.492] <TB1> INFO: Test took 23282ms.
[14:25:31.559] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:31.564] <TB1> INFO: dacScan step from 100 .. 119
[14:26:01.351] <TB1> INFO: Test took 29786ms.
[14:26:01.590] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:01.620] <TB1> INFO: dacScan step from 120 .. 139


[14:26:34.805] <TB1> INFO: Test took 33185ms.
[14:26:35.119] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:35.177] <TB1> INFO: dacScan step from 140 .. 159


[14:27:07.278] <TB1> INFO: Test took 32101ms.
[14:27:07.575] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:07.635] <TB1> INFO: dacScan step from 160 .. 160
[14:27:11.861] <TB1> INFO: Test took 4226ms.
[14:27:11.878] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:35.455] <TB1> INFO: PixTestTrim::trimBitTest() done
[14:27:35.456] <TB1> INFO: PixTestTrim::doTest() done, duration: 2530 seconds
[14:27:36.221] <TB1> INFO: ######################################################################
[14:27:36.221] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:27:36.221] <TB1> INFO: ######################################################################
[14:27:39.530] <TB1> INFO: Test took 3307ms.
[14:27:39.548] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:43.062] <TB1> INFO: Test took 3315ms.
[14:27:43.130] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:46.451] <TB1> INFO: Test took 3308ms.
[14:27:46.510] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:46.518] <TB1> INFO: The DUT currently contains the following objects:
[14:27:46.518] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:46.518] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:46.518] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:46.518] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:46.518] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:46.518] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.624] <TB1> INFO: Test took 1106ms.
[14:27:47.624] <TB1> INFO: The DUT currently contains the following objects:
[14:27:47.624] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:47.624] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:47.625] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:47.625] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:47.625] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:47.625] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.731] <TB1> INFO: Test took 1106ms.
[14:27:48.732] <TB1> INFO: The DUT currently contains the following objects:
[14:27:48.744] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:48.744] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:48.744] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:48.744] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:48.744] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.744] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.745] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.745] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:48.745] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.842] <TB1> INFO: Test took 1097ms.
[14:27:49.843] <TB1> INFO: The DUT currently contains the following objects:
[14:27:49.843] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:49.843] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:49.843] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:49.843] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:49.843] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.843] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.843] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.843] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.843] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.843] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.843] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:49.844] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.954] <TB1> INFO: Test took 1110ms.
[14:27:50.956] <TB1> INFO: The DUT currently contains the following objects:
[14:27:50.956] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:50.956] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:50.956] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:50.956] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:50.956] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:50.956] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.066] <TB1> INFO: Test took 1110ms.
[14:27:52.067] <TB1> INFO: The DUT currently contains the following objects:
[14:27:52.067] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:52.067] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:52.067] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:52.067] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:52.067] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:52.067] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.179] <TB1> INFO: Test took 1111ms.
[14:27:53.180] <TB1> INFO: The DUT currently contains the following objects:
[14:27:53.180] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:53.180] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:53.180] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:53.180] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:53.180] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.180] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.180] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.180] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.180] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.180] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.180] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.180] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.180] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.181] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.181] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.181] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.181] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.181] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.181] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:53.181] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.291] <TB1> INFO: Test took 1110ms.
[14:27:54.293] <TB1> INFO: The DUT currently contains the following objects:
[14:27:54.293] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:54.293] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:54.293] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:54.293] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:54.293] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.293] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.293] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.293] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.293] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.293] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:54.294] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.404] <TB1> INFO: Test took 1110ms.
[14:27:55.405] <TB1> INFO: The DUT currently contains the following objects:
[14:27:55.405] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:55.405] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:55.405] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:55.405] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:55.405] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.405] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.406] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.406] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.406] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.406] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.406] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:55.406] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.516] <TB1> INFO: Test took 1110ms.
[14:27:56.517] <TB1> INFO: The DUT currently contains the following objects:
[14:27:56.517] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:56.517] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:56.517] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:56.517] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:56.517] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.517] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.518] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.518] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.518] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.518] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.518] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:56.518] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.625] <TB1> INFO: Test took 1107ms.
[14:27:57.627] <TB1> INFO: The DUT currently contains the following objects:
[14:27:57.627] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:57.627] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:57.627] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:57.627] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:57.627] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:57.627] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.737] <TB1> INFO: Test took 1110ms.
[14:27:58.738] <TB1> INFO: The DUT currently contains the following objects:
[14:27:58.738] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:58.738] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:58.738] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:58.738] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:58.738] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.738] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.738] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.738] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.738] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.738] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.738] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.738] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.738] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.739] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.739] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.739] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.739] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.739] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.739] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:58.739] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.849] <TB1> INFO: Test took 1110ms.
[14:27:59.851] <TB1> INFO: The DUT currently contains the following objects:
[14:27:59.851] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:27:59.851] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:27:59.851] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:27:59.851] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:27:59.851] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:27:59.851] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.962] <TB1> INFO: Test took 1112ms.
[14:28:00.964] <TB1> INFO: The DUT currently contains the following objects:
[14:28:00.964] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:28:00.964] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:28:00.964] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:28:00.964] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:28:00.964] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.964] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.965] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.965] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.965] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.965] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:00.965] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.075] <TB1> INFO: Test took 1111ms.
[14:28:02.077] <TB1> INFO: The DUT currently contains the following objects:
[14:28:02.077] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:28:02.077] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:28:02.077] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:28:02.077] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:28:02.077] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.077] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:02.078] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.187] <TB1> INFO: Test took 1109ms.
[14:28:03.188] <TB1> INFO: The DUT currently contains the following objects:
[14:28:03.188] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:28:03.188] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:28:03.188] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:28:03.188] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:28:03.188] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.188] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.189] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:03.189] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:28:04.301] <TB1> INFO: Test took 1112ms.
[14:28:04.307] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:31:49.840] <TB1> INFO: Test took 225533ms.
[14:31:51.094] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:33.514] <TB1> INFO: Test took 222420ms.
[14:35:35.305] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.312] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.319] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.326] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.333] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.340] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.348] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.355] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.362] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:35.369] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.376] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.383] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.390] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:35.397] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:35.404] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.411] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.418] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.425] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.432] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:35.439] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:35.495] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:35:35.496] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:35:35.496] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:35:35.496] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:35:35.497] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:35:35.497] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:35:35.497] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:35:35.497] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:35:35.497] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:35:35.498] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:35:35.498] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:35:35.498] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:35:35.498] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:35:35.498] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:35:35.499] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:35:35.499] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:35:38.963] <TB1> INFO: Test took 3459ms.
[14:35:42.710] <TB1> INFO: Test took 3451ms.
[14:35:46.475] <TB1> INFO: Test took 3477ms.
[14:35:46.763] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:47.686] <TB1> INFO: Test took 923ms.
[14:35:47.690] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:48.802] <TB1> INFO: Test took 1112ms.
[14:35:48.806] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:49.916] <TB1> INFO: Test took 1110ms.
[14:35:49.920] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:51.027] <TB1> INFO: Test took 1107ms.
[14:35:51.030] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:52.141] <TB1> INFO: Test took 1111ms.
[14:35:52.145] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:53.256] <TB1> INFO: Test took 1111ms.
[14:35:53.260] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:54.372] <TB1> INFO: Test took 1112ms.
[14:35:54.376] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:55.486] <TB1> INFO: Test took 1110ms.
[14:35:55.490] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:56.600] <TB1> INFO: Test took 1110ms.
[14:35:56.605] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:57.715] <TB1> INFO: Test took 1110ms.
[14:35:57.719] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:58.830] <TB1> INFO: Test took 1111ms.
[14:35:58.834] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:59.945] <TB1> INFO: Test took 1111ms.
[14:35:59.950] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:01.061] <TB1> INFO: Test took 1112ms.
[14:36:01.066] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:02.174] <TB1> INFO: Test took 1109ms.
[14:36:02.178] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:03.288] <TB1> INFO: Test took 1110ms.
[14:36:03.293] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:04.403] <TB1> INFO: Test took 1111ms.
[14:36:04.407] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:05.513] <TB1> INFO: Test took 1106ms.
[14:36:05.517] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:06.626] <TB1> INFO: Test took 1110ms.
[14:36:06.631] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:07.740] <TB1> INFO: Test took 1109ms.
[14:36:07.745] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:08.857] <TB1> INFO: Test took 1112ms.
[14:36:08.861] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:09.971] <TB1> INFO: Test took 1110ms.
[14:36:09.975] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:11.085] <TB1> INFO: Test took 1110ms.
[14:36:11.089] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:12.198] <TB1> INFO: Test took 1109ms.
[14:36:12.202] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:13.313] <TB1> INFO: Test took 1112ms.
[14:36:13.318] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:14.428] <TB1> INFO: Test took 1111ms.
[14:36:14.432] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:15.542] <TB1> INFO: Test took 1110ms.
[14:36:15.547] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:16.658] <TB1> INFO: Test took 1111ms.
[14:36:16.662] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:17.775] <TB1> INFO: Test took 1113ms.
[14:36:17.780] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:18.891] <TB1> INFO: Test took 1112ms.
[14:36:18.895] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:20.006] <TB1> INFO: Test took 1111ms.
[14:36:20.011] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:21.123] <TB1> INFO: Test took 1112ms.
[14:36:21.127] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:22.237] <TB1> INFO: Test took 1110ms.
[14:36:22.821] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 526 seconds
[14:36:22.821] <TB1> INFO: PH scale (per ROC): 78 69 98 86 75 83 87 80 75 83 80 84 92 83 78 81
[14:36:22.821] <TB1> INFO: PH offset (per ROC): 167 170 140 159 173 149 155 172 173 154 176 153 162 162 158 161
[14:36:23.019] <TB1> INFO: ######################################################################
[14:36:23.019] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:36:23.019] <TB1> INFO: ######################################################################
[14:36:23.030] <TB1> INFO: scanning low vcal = 10
[14:36:26.878] <TB1> INFO: Test took 3848ms.
[14:36:26.885] <TB1> INFO: scanning low vcal = 20
[14:36:30.709] <TB1> INFO: Test took 3824ms.
[14:36:30.714] <TB1> INFO: scanning low vcal = 30
[14:36:34.584] <TB1> INFO: Test took 3870ms.
[14:36:34.594] <TB1> INFO: scanning low vcal = 40
[14:36:38.948] <TB1> INFO: Test took 4354ms.
[14:36:39.016] <TB1> INFO: scanning low vcal = 50
[14:36:43.357] <TB1> INFO: Test took 4341ms.
[14:36:43.421] <TB1> INFO: scanning low vcal = 60
[14:36:47.793] <TB1> INFO: Test took 4372ms.
[14:36:47.858] <TB1> INFO: scanning low vcal = 70
[14:36:52.247] <TB1> INFO: Test took 4389ms.
[14:36:52.315] <TB1> INFO: scanning low vcal = 80
[14:36:56.579] <TB1> INFO: Test took 4264ms.
[14:36:56.677] <TB1> INFO: scanning low vcal = 90
[14:37:01.103] <TB1> INFO: Test took 4425ms.
[14:37:01.196] <TB1> INFO: scanning low vcal = 100
[14:37:05.651] <TB1> INFO: Test took 4455ms.
[14:37:05.714] <TB1> INFO: scanning low vcal = 110
[14:37:10.086] <TB1> INFO: Test took 4372ms.
[14:37:10.151] <TB1> INFO: scanning low vcal = 120
[14:37:14.521] <TB1> INFO: Test took 4370ms.
[14:37:14.577] <TB1> INFO: scanning low vcal = 130
[14:37:18.919] <TB1> INFO: Test took 4342ms.
[14:37:19.017] <TB1> INFO: scanning low vcal = 140
[14:37:23.386] <TB1> INFO: Test took 4370ms.
[14:37:23.443] <TB1> INFO: scanning low vcal = 150
[14:37:27.848] <TB1> INFO: Test took 4405ms.
[14:37:27.912] <TB1> INFO: scanning low vcal = 160
[14:37:32.280] <TB1> INFO: Test took 4368ms.
[14:37:32.347] <TB1> INFO: scanning low vcal = 170
[14:37:36.710] <TB1> INFO: Test took 4363ms.
[14:37:36.795] <TB1> INFO: scanning low vcal = 180
[14:37:41.297] <TB1> INFO: Test took 4502ms.
[14:37:41.360] <TB1> INFO: scanning low vcal = 190
[14:37:45.753] <TB1> INFO: Test took 4393ms.
[14:37:45.816] <TB1> INFO: scanning low vcal = 200
[14:37:50.148] <TB1> INFO: Test took 4332ms.
[14:37:50.210] <TB1> INFO: scanning low vcal = 210
[14:37:54.550] <TB1> INFO: Test took 4339ms.
[14:37:54.607] <TB1> INFO: scanning low vcal = 220
[14:37:58.965] <TB1> INFO: Test took 4358ms.
[14:37:59.025] <TB1> INFO: scanning low vcal = 230
[14:38:03.387] <TB1> INFO: Test took 4362ms.
[14:38:03.443] <TB1> INFO: scanning low vcal = 240
[14:38:07.792] <TB1> INFO: Test took 4348ms.
[14:38:07.852] <TB1> INFO: scanning low vcal = 250
[14:38:12.203] <TB1> INFO: Test took 4350ms.
[14:38:12.262] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[14:38:16.605] <TB1> INFO: Test took 4343ms.
[14:38:16.665] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[14:38:20.885] <TB1> INFO: Test took 4220ms.
[14:38:20.940] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[14:38:25.168] <TB1> INFO: Test took 4228ms.
[14:38:25.224] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[14:38:29.438] <TB1> INFO: Test took 4214ms.
[14:38:29.498] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:38:33.742] <TB1> INFO: Test took 4244ms.
[14:38:34.287] <TB1> INFO: PixTestGainPedestal::measure() done
[14:39:09.092] <TB1> INFO: PixTestGainPedestal::fit() done
[14:39:09.092] <TB1> INFO: non-linearity mean: 0.957 0.960 0.963 0.962 0.950 0.960 0.957 0.959 0.956 0.953 0.960 0.957 0.958 0.957 0.953 0.960
[14:39:09.092] <TB1> INFO: non-linearity RMS: 0.006 0.007 0.009 0.005 0.008 0.006 0.006 0.009 0.007 0.005 0.006 0.006 0.007 0.006 0.006 0.006
[14:39:09.092] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:39:09.113] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:39:09.134] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:39:09.154] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:39:09.175] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:39:09.195] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:39:09.216] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:39:09.237] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:39:09.258] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:39:09.279] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:39:09.299] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:39:09.319] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:39:09.340] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:39:09.361] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:39:09.382] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:39:09.402] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:39:09.423] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 166 seconds
[14:39:09.430] <TB1> INFO: enter test to run
[14:39:09.430] <TB1> INFO: test: exit no parameter change
[14:39:09.881] <TB1> QUIET: Connection to board 153 closed.
[14:39:09.961] <TB1> INFO: pXar: this is the end, my friend