[10:44:57.545] <TB1> INFO: *** Welcome to pxar ***
[10:44:57.545] <TB1> INFO: *** Today: 2015/08/21
[10:44:57.545] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C15.dat
[10:44:57.566] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//tbmParameters_C0b.dat
[10:44:57.566] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//defaultMaskFile.dat
[10:44:57.566] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters_C15.dat
[10:44:57.643] <TB1> INFO: clk: 4
[10:44:57.643] <TB1> INFO: ctr: 4
[10:44:57.643] <TB1> INFO: sda: 19
[10:44:57.643] <TB1> INFO: tin: 9
[10:44:57.643] <TB1> INFO: level: 15
[10:44:57.643] <TB1> INFO: triggerdelay: 0
[10:44:57.643] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[10:44:57.643] <TB1> INFO: Log level: INFO
[10:44:57.651] <TB1> INFO: Found DTB DTB_WXBYFL
[10:44:57.664] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[10:44:57.667] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[10:44:57.670] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[10:44:59.218] <TB1> INFO: DUT info:
[10:44:59.218] <TB1> INFO: The DUT currently contains the following objects:
[10:44:59.218] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:44:59.218] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:44:59.218] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:44:59.218] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:44:59.218] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.218] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:44:59.620] <TB1> INFO: enter 'restricted' command line mode
[10:44:59.620] <TB1> INFO: enter test to run
[10:44:59.620] <TB1> INFO: test: pretest no parameter change
[10:44:59.620] <TB1> INFO: running: pretest
[10:44:59.627] <TB1> INFO: ######################################################################
[10:44:59.627] <TB1> INFO: PixTestPretest::doTest()
[10:44:59.627] <TB1> INFO: ######################################################################
[10:44:59.629] <TB1> INFO: ----------------------------------------------------------------------
[10:44:59.629] <TB1> INFO: PixTestPretest::programROC()
[10:44:59.629] <TB1> INFO: ----------------------------------------------------------------------
[10:45:17.651] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:45:17.651] <TB1> INFO: IA differences per ROC: 16.9 17.7 19.3 19.3 17.7 19.3 16.9 18.5 20.1 18.5 19.3 18.5 20.1 20.1 19.3 19.3
[10:45:17.753] <TB1> INFO: ----------------------------------------------------------------------
[10:45:17.753] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:45:17.753] <TB1> INFO: ----------------------------------------------------------------------
[10:45:22.453] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 381.9 mA = 23.8688 mA/ROC
[10:45:22.457] <TB1> INFO: ----------------------------------------------------------------------
[10:45:22.457] <TB1> INFO: PixTestPretest::findWorkingPixel()
[10:45:22.457] <TB1> INFO: ----------------------------------------------------------------------
[10:45:30.860] <TB1> INFO: Test took 8396ms.
[10:45:31.151] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:45:31.213] <TB1> INFO: ----------------------------------------------------------------------
[10:45:31.213] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[10:45:31.213] <TB1> INFO: ----------------------------------------------------------------------
[10:45:39.493] <TB1> INFO: Test took 8270ms.
[10:45:39.817] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[10:45:39.817] <TB1> INFO: CalDel: 175 185 143 121 136 137 126 123 144 155 163 139 146 146 145 158
[10:45:39.817] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:45:39.821] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C0.dat
[10:45:39.821] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C1.dat
[10:45:39.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C2.dat
[10:45:39.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C3.dat
[10:45:39.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C4.dat
[10:45:39.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C5.dat
[10:45:39.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C6.dat
[10:45:39.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C7.dat
[10:45:39.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C8.dat
[10:45:39.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C9.dat
[10:45:39.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C10.dat
[10:45:39.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C11.dat
[10:45:39.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C12.dat
[10:45:39.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C13.dat
[10:45:39.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C14.dat
[10:45:39.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters_C15.dat
[10:45:39.823] <TB1> INFO: PixTestPretest::doTest() done, duration: 40 seconds
[10:45:39.911] <TB1> INFO: enter test to run
[10:45:39.911] <TB1> INFO: test: fulltest no parameter change
[10:45:39.911] <TB1> INFO: running: fulltest
[10:45:39.911] <TB1> INFO: ######################################################################
[10:45:39.911] <TB1> INFO: PixTestFullTest::doTest()
[10:45:39.911] <TB1> INFO: ######################################################################
[10:45:39.913] <TB1> INFO: ######################################################################
[10:45:39.913] <TB1> INFO: PixTestAlive::doTest()
[10:45:39.913] <TB1> INFO: ######################################################################
[10:45:39.914] <TB1> INFO: ----------------------------------------------------------------------
[10:45:39.914] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:45:39.914] <TB1> INFO: ----------------------------------------------------------------------
[10:45:43.398] <TB1> INFO: Test took 3481ms.
[10:45:43.420] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:43.662] <TB1> INFO: PixTestAlive::aliveTest() done
[10:45:43.662] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[10:45:43.665] <TB1> INFO: ----------------------------------------------------------------------
[10:45:43.665] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:45:43.665] <TB1> INFO: ----------------------------------------------------------------------
[10:45:46.352] <TB1> INFO: Test took 2685ms.
[10:45:46.355] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:46.356] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:45:46.599] <TB1> INFO: PixTestAlive::maskTest() done
[10:45:46.600] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:45:46.604] <TB1> INFO: ----------------------------------------------------------------------
[10:45:46.604] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:45:46.604] <TB1> INFO: ----------------------------------------------------------------------
[10:45:49.968] <TB1> INFO: Test took 3361ms.
[10:45:49.989] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:50.232] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[10:45:50.232] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:45:50.232] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[10:45:50.241] <TB1> INFO: ######################################################################
[10:45:50.241] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:45:50.241] <TB1> INFO: ######################################################################
[10:45:50.246] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[10:45:50.468] <TB1> INFO: dacScan step from 0 .. 29
[10:46:11.777] <TB1> INFO: Test took 21309ms.
[10:46:11.806] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:11.809] <TB1> INFO: dacScan step from 30 .. 59
[10:46:35.295] <TB1> INFO: Test took 23486ms.
[10:46:35.417] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:35.438] <TB1> INFO: dacScan step from 60 .. 89
[10:47:04.451] <TB1> INFO: Test took 29013ms.
[10:47:04.730] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:04.805] <TB1> INFO: dacScan step from 90 .. 119
[10:47:33.697] <TB1> INFO: Test took 28892ms.
[10:47:33.966] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:34.048] <TB1> INFO: dacScan step from 120 .. 149
[10:47:59.830] <TB1> INFO: Test took 25782ms.
[10:48:00.070] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:25.183] <TB1> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[10:48:25.184] <TB1> INFO: number of dead bumps (per ROC): 29 1 0 1 0 0 1 0 0 1 0 1 0 0 2 1
[10:48:25.184] <TB1> INFO: separation cut (per ROC): 70 80 90 74 87 83 77 98 92 85 92 80 79 84 81 90
[10:48:25.226] <TB1> INFO: ######################################################################
[10:48:25.226] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[10:48:25.226] <TB1> INFO: ######################################################################
[10:48:25.226] <TB1> INFO: ----------------------------------------------------------------------
[10:48:25.226] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[10:48:25.226] <TB1> INFO: ----------------------------------------------------------------------
[10:48:25.226] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[10:48:25.236] <TB1> INFO: dacScan step from 0 .. 3
[10:48:42.908] <TB1> INFO: Test took 17672ms.
[10:48:42.935] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:42.935] <TB1> INFO: dacScan step from 4 .. 7
[10:49:01.042] <TB1> INFO: Test took 18106ms.
[10:49:01.068] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:01.068] <TB1> INFO: dacScan step from 8 .. 11
[10:49:18.864] <TB1> INFO: Test took 17796ms.
[10:49:18.891] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:18.891] <TB1> INFO: dacScan step from 12 .. 15
[10:49:36.652] <TB1> INFO: Test took 17761ms.
[10:49:36.678] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:36.678] <TB1> INFO: dacScan step from 16 .. 19
[10:49:54.264] <TB1> INFO: Test took 17586ms.
[10:49:54.291] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:54.291] <TB1> INFO: dacScan step from 20 .. 23
[10:50:13.080] <TB1> INFO: Test took 18789ms.
[10:50:13.110] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:13.110] <TB1> INFO: dacScan step from 24 .. 27
[10:50:31.992] <TB1> INFO: Test took 18882ms.
[10:50:32.023] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:32.023] <TB1> INFO: dacScan step from 28 .. 31
[10:50:50.906] <TB1> INFO: Test took 18883ms.
[10:50:50.937] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:50.937] <TB1> INFO: dacScan step from 32 .. 35
[10:51:09.697] <TB1> INFO: Test took 18760ms.
[10:51:09.724] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:09.724] <TB1> INFO: dacScan step from 36 .. 39
[10:51:28.603] <TB1> INFO: Test took 18879ms.
[10:51:28.631] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:28.631] <TB1> INFO: dacScan step from 40 .. 43
[10:51:47.418] <TB1> INFO: Test took 18787ms.
[10:51:47.447] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:47.447] <TB1> INFO: dacScan step from 44 .. 47
[10:52:06.151] <TB1> INFO: Test took 18703ms.
[10:52:06.177] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:06.178] <TB1> INFO: dacScan step from 48 .. 51
[10:52:25.034] <TB1> INFO: Test took 18856ms.
[10:52:25.061] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:25.061] <TB1> INFO: dacScan step from 52 .. 55
[10:52:43.878] <TB1> INFO: Test took 18817ms.
[10:52:43.907] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:43.907] <TB1> INFO: dacScan step from 56 .. 59
[10:53:02.928] <TB1> INFO: Test took 19021ms.
[10:53:02.957] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:02.957] <TB1> INFO: dacScan step from 60 .. 63
[10:53:21.764] <TB1> INFO: Test took 18807ms.
[10:53:21.790] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:21.791] <TB1> INFO: dacScan step from 64 .. 67
[10:53:40.437] <TB1> INFO: Test took 18646ms.
[10:53:40.464] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:40.464] <TB1> INFO: dacScan step from 68 .. 71
[10:53:59.011] <TB1> INFO: Test took 18547ms.
[10:53:59.039] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:59.039] <TB1> INFO: dacScan step from 72 .. 75
[10:54:17.924] <TB1> INFO: Test took 18885ms.
[10:54:17.959] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:17.959] <TB1> INFO: dacScan step from 76 .. 79
[10:54:37.412] <TB1> INFO: Test took 19453ms.
[10:54:37.459] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:37.460] <TB1> INFO: dacScan step from 80 .. 83
[10:54:58.495] <TB1> INFO: Test took 21035ms.
[10:54:58.590] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:58.595] <TB1> INFO: dacScan step from 84 .. 87
[10:55:21.128] <TB1> INFO: Test took 22533ms.
[10:55:21.261] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:21.272] <TB1> INFO: dacScan step from 88 .. 91
[10:55:45.187] <TB1> INFO: Test took 23915ms.
[10:55:45.357] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:45.367] <TB1> INFO: dacScan step from 92 .. 95
[10:56:11.159] <TB1> INFO: Test took 25792ms.
[10:56:11.365] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:11.376] <TB1> INFO: dacScan step from 96 .. 99
[10:56:38.247] <TB1> INFO: Test took 26870ms.
[10:56:38.472] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:38.483] <TB1> INFO: dacScan step from 100 .. 103





[10:57:06.417] <TB1> INFO: Test took 27934ms.
[10:57:06.704] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:06.716] <TB1> INFO: dacScan step from 104 .. 107


[10:57:35.235] <TB1> INFO: Test took 28519ms.
[10:57:35.465] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:35.476] <TB1> INFO: dacScan step from 108 .. 111
[10:58:04.509] <TB1> INFO: Test took 29033ms.
[10:58:04.752] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:04.764] <TB1> INFO: dacScan step from 112 .. 115





[10:58:33.403] <TB1> INFO: Test took 28639ms.
[10:58:33.653] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:33.666] <TB1> INFO: dacScan step from 116 .. 119

[10:59:02.990] <TB1> INFO: Test took 29324ms.
[10:59:03.221] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:03.233] <TB1> INFO: dacScan step from 120 .. 123





[10:59:32.808] <TB1> INFO: Test took 29575ms.
[10:59:33.048] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:33.060] <TB1> INFO: dacScan step from 124 .. 127



[11:00:02.542] <TB1> INFO: Test took 29482ms.
[11:00:02.775] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:02.787] <TB1> INFO: dacScan step from 128 .. 131
[11:00:31.999] <TB1> INFO: Test took 29212ms.
[11:00:32.229] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:32.241] <TB1> INFO: dacScan step from 132 .. 135
[11:01:01.609] <TB1> INFO: Test took 29368ms.
[11:01:01.843] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:01.855] <TB1> INFO: dacScan step from 136 .. 139
[11:01:31.188] <TB1> INFO: Test took 29333ms.
[11:01:31.433] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:31.445] <TB1> INFO: dacScan step from 140 .. 143
[11:02:00.765] <TB1> INFO: Test took 29320ms.
[11:02:00.994] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:01.005] <TB1> INFO: dacScan step from 144 .. 147
[11:02:30.362] <TB1> INFO: Test took 29357ms.
[11:02:30.597] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:30.610] <TB1> INFO: dacScan step from 148 .. 149
[11:02:46.527] <TB1> INFO: Test took 15917ms.
[11:02:46.670] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:46.718] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:48.247] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:49.673] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:51.064] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:52.576] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:54.052] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:55.568] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:56.985] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:58.460] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:02:59.983] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:03:01.361] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:03:02.730] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:03:04.155] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:03:05.638] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:03:07.224] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:03:08.709] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:03:10.182] <TB1> INFO: PixTestScurves::scurves() done
[11:03:10.182] <TB1> INFO: Vcal mean: 94.69 100.54 86.62 83.70 91.01 83.91 83.21 102.80 97.03 90.92 99.98 89.19 86.80 90.56 83.08 97.23
[11:03:10.182] <TB1> INFO: Vcal RMS: 6.03 5.79 5.09 4.48 5.51 5.12 4.50 5.52 5.81 5.40 6.66 5.39 5.27 6.14 4.95 6.35
[11:03:10.182] <TB1> INFO: PixTestScurves::fullTest() done, duration: 884 seconds
[11:03:10.258] <TB1> INFO: ######################################################################
[11:03:10.258] <TB1> INFO: PixTestTrim::doTest()
[11:03:10.258] <TB1> INFO: ######################################################################
[11:03:10.259] <TB1> INFO: ----------------------------------------------------------------------
[11:03:10.259] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[11:03:10.259] <TB1> INFO: ----------------------------------------------------------------------
[11:03:10.344] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:03:10.344] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:03:10.352] <TB1> INFO: dacScan step from 0 .. 19
[11:03:25.450] <TB1> INFO: Test took 15098ms.
[11:03:25.475] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:25.475] <TB1> INFO: dacScan step from 20 .. 39
[11:03:39.940] <TB1> INFO: Test took 14465ms.
[11:03:39.962] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:39.962] <TB1> INFO: dacScan step from 40 .. 59
[11:03:54.357] <TB1> INFO: Test took 14395ms.
[11:03:54.378] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:54.378] <TB1> INFO: dacScan step from 60 .. 79
[11:04:09.494] <TB1> INFO: Test took 15116ms.
[11:04:09.515] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:09.515] <TB1> INFO: dacScan step from 80 .. 99
[11:04:24.335] <TB1> INFO: Test took 14820ms.
[11:04:24.387] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:24.394] <TB1> INFO: dacScan step from 100 .. 119
[11:04:41.916] <TB1> INFO: Test took 17522ms.
[11:04:42.075] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:42.107] <TB1> INFO: dacScan step from 120 .. 139
[11:05:01.406] <TB1> INFO: Test took 19299ms.
[11:05:01.576] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:01.610] <TB1> INFO: dacScan step from 140 .. 159
[11:05:18.137] <TB1> INFO: Test took 16527ms.
[11:05:18.220] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:39.716] <TB1> INFO: ROC 0 VthrComp = 92
[11:05:39.716] <TB1> INFO: ROC 1 VthrComp = 94
[11:05:39.717] <TB1> INFO: ROC 2 VthrComp = 97
[11:05:39.717] <TB1> INFO: ROC 3 VthrComp = 92
[11:05:39.717] <TB1> INFO: ROC 4 VthrComp = 93
[11:05:39.717] <TB1> INFO: ROC 5 VthrComp = 91
[11:05:39.717] <TB1> INFO: ROC 6 VthrComp = 91
[11:05:39.717] <TB1> INFO: ROC 7 VthrComp = 106
[11:05:39.718] <TB1> INFO: ROC 8 VthrComp = 101
[11:05:39.718] <TB1> INFO: ROC 9 VthrComp = 96
[11:05:39.718] <TB1> INFO: ROC 10 VthrComp = 97
[11:05:39.718] <TB1> INFO: ROC 11 VthrComp = 91
[11:05:39.718] <TB1> INFO: ROC 12 VthrComp = 92
[11:05:39.718] <TB1> INFO: ROC 13 VthrComp = 92
[11:05:39.718] <TB1> INFO: ROC 14 VthrComp = 87
[11:05:39.718] <TB1> INFO: ROC 15 VthrComp = 97
[11:05:39.718] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:05:39.719] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:05:39.728] <TB1> INFO: dacScan step from 0 .. 19
[11:05:54.762] <TB1> INFO: Test took 15034ms.
[11:05:54.789] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:54.789] <TB1> INFO: dacScan step from 20 .. 39
[11:06:09.328] <TB1> INFO: Test took 14539ms.
[11:06:09.362] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:09.365] <TB1> INFO: dacScan step from 40 .. 59
[11:06:27.398] <TB1> INFO: Test took 18033ms.
[11:06:27.553] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:27.585] <TB1> INFO: dacScan step from 60 .. 79
[11:06:47.858] <TB1> INFO: Test took 20273ms.
[11:06:48.021] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:48.066] <TB1> INFO: dacScan step from 80 .. 99
[11:07:06.911] <TB1> INFO: Test took 18844ms.
[11:07:07.088] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:07.139] <TB1> INFO: dacScan step from 100 .. 119
[11:07:26.024] <TB1> INFO: Test took 18885ms.
[11:07:26.197] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:26.251] <TB1> INFO: dacScan step from 120 .. 139
[11:07:46.538] <TB1> INFO: Test took 20287ms.
[11:07:46.719] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:46.767] <TB1> INFO: dacScan step from 140 .. 159
[11:08:06.899] <TB1> INFO: Test took 20131ms.
[11:08:07.066] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:33.170] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 62.599 for pixel 16/3 mean/min/max = 47.3416/32.0115/62.6716
[11:08:33.170] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 63.039 for pixel 4/11 mean/min/max = 48.1342/33.0022/63.2661
[11:08:33.170] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 55.8799 for pixel 23/75 mean/min/max = 43.8445/31.7353/55.9538
[11:08:33.171] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 55.9748 for pixel 38/79 mean/min/max = 44.0112/31.7901/56.2323
[11:08:33.171] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.9898 for pixel 0/68 mean/min/max = 45.6418/32.2932/58.9904
[11:08:33.171] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.6103 for pixel 21/3 mean/min/max = 45.7065/32.3199/59.093
[11:08:33.172] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 55.467 for pixel 23/9 mean/min/max = 44.1863/32.3807/55.9918
[11:08:33.172] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.1996 for pixel 39/77 mean/min/max = 46.952/33.6907/60.2132
[11:08:33.172] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 60.2279 for pixel 11/70 mean/min/max = 46.3608/32.4906/60.2309
[11:08:33.173] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 58.747 for pixel 46/79 mean/min/max = 45.381/32.0076/58.7544
[11:08:33.173] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 66.7578 for pixel 10/0 mean/min/max = 48.6959/30.5702/66.8216
[11:08:33.174] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.6708 for pixel 13/45 mean/min/max = 45.2544/31.8349/58.674
[11:08:33.174] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 58.6451 for pixel 28/67 mean/min/max = 45.627/32.4233/58.8306
[11:08:33.174] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 63.5432 for pixel 0/9 mean/min/max = 47.3946/31.2121/63.5771
[11:08:33.175] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.0681 for pixel 0/72 mean/min/max = 45.097/31.9936/58.2004
[11:08:33.175] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 61.9038 for pixel 0/9 mean/min/max = 46.4978/31.0828/61.9127
[11:08:33.176] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:05.496] <TB1> INFO: Test took 92320ms.
[11:10:07.467] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:10:07.477] <TB1> INFO: dacScan step from 0 .. 19
[11:10:29.556] <TB1> INFO: Test took 22079ms.
[11:10:29.609] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:29.611] <TB1> INFO: dacScan step from 20 .. 39
[11:10:58.321] <TB1> INFO: Test took 28710ms.
[11:10:58.564] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:58.595] <TB1> INFO: dacScan step from 40 .. 59



[11:11:31.897] <TB1> INFO: Test took 33301ms.
[11:11:32.195] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:32.244] <TB1> INFO: dacScan step from 60 .. 79


[11:12:05.417] <TB1> INFO: Test took 33174ms.
[11:12:05.691] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:05.747] <TB1> INFO: dacScan step from 80 .. 99

[11:12:39.024] <TB1> INFO: Test took 33277ms.
[11:12:39.309] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:39.358] <TB1> INFO: dacScan step from 100 .. 119

[11:13:12.678] <TB1> INFO: Test took 33320ms.
[11:13:12.971] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:13.020] <TB1> INFO: dacScan step from 120 .. 139


[11:13:46.333] <TB1> INFO: Test took 33312ms.
[11:13:46.608] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:46.653] <TB1> INFO: dacScan step from 140 .. 159
[11:14:19.707] <TB1> INFO: Test took 33054ms.
[11:14:20.007] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:20.053] <TB1> INFO: dacScan step from 160 .. 179


[11:14:53.375] <TB1> INFO: Test took 33322ms.
[11:14:53.662] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:53.708] <TB1> INFO: dacScan step from 180 .. 199

[11:15:27.776] <TB1> INFO: Test took 34068ms.
[11:15:28.071] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:53.864] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.019795 .. 255.000000
[11:15:53.943] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[11:15:53.952] <TB1> INFO: dacScan step from 0 .. 19
[11:16:07.436] <TB1> INFO: Test took 13484ms.
[11:16:07.458] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:07.458] <TB1> INFO: dacScan step from 20 .. 39
[11:16:21.619] <TB1> INFO: Test took 14161ms.
[11:16:21.707] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:21.724] <TB1> INFO: dacScan step from 40 .. 59
[11:16:38.950] <TB1> INFO: Test took 17225ms.
[11:16:39.109] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:39.163] <TB1> INFO: dacScan step from 60 .. 79
[11:16:56.888] <TB1> INFO: Test took 17725ms.
[11:16:57.034] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:57.080] <TB1> INFO: dacScan step from 80 .. 99
[11:17:14.738] <TB1> INFO: Test took 17657ms.
[11:17:14.888] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:14.937] <TB1> INFO: dacScan step from 100 .. 119
[11:17:32.739] <TB1> INFO: Test took 17802ms.
[11:17:32.898] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:32.947] <TB1> INFO: dacScan step from 120 .. 139
[11:17:49.653] <TB1> INFO: Test took 16706ms.
[11:17:49.886] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:49.969] <TB1> INFO: dacScan step from 140 .. 159
[11:18:06.771] <TB1> INFO: Test took 16802ms.
[11:18:06.926] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:06.997] <TB1> INFO: dacScan step from 160 .. 179
[11:18:24.036] <TB1> INFO: Test took 17039ms.
[11:18:24.203] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:24.274] <TB1> INFO: dacScan step from 180 .. 199
[11:18:42.150] <TB1> INFO: Test took 17876ms.
[11:18:42.366] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:42.484] <TB1> INFO: dacScan step from 200 .. 219
[11:18:59.583] <TB1> INFO: Test took 17099ms.
[11:18:59.742] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:59.808] <TB1> INFO: dacScan step from 220 .. 239
[11:19:16.591] <TB1> INFO: Test took 16783ms.
[11:19:16.745] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:16.809] <TB1> INFO: dacScan step from 240 .. 255
[11:19:30.800] <TB1> INFO: Test took 13991ms.
[11:19:30.977] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:01.807] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 0.499894 .. 58.074413
[11:20:01.884] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 68 (20) hits flags = 16 (plus default)
[11:20:01.893] <TB1> INFO: dacScan step from 0 .. 19
[11:20:14.880] <TB1> INFO: Test took 12987ms.
[11:20:14.901] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:14.901] <TB1> INFO: dacScan step from 20 .. 39
[11:20:28.923] <TB1> INFO: Test took 14022ms.
[11:20:29.006] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:29.025] <TB1> INFO: dacScan step from 40 .. 59
[11:20:45.647] <TB1> INFO: Test took 16622ms.
[11:20:45.816] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:45.876] <TB1> INFO: dacScan step from 60 .. 68
[11:20:54.959] <TB1> INFO: Test took 9083ms.
[11:20:55.025] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:12.521] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 16.747179 .. 58.074413
[11:21:12.596] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 6 .. 68 (20) hits flags = 16 (plus default)
[11:21:12.604] <TB1> INFO: dacScan step from 6 .. 25
[11:21:26.166] <TB1> INFO: Test took 13562ms.
[11:21:26.188] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:26.188] <TB1> INFO: dacScan step from 26 .. 45
[11:21:41.694] <TB1> INFO: Test took 15506ms.
[11:21:41.849] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:41.887] <TB1> INFO: dacScan step from 46 .. 65
[11:21:58.555] <TB1> INFO: Test took 16668ms.
[11:21:58.693] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:58.742] <TB1> INFO: dacScan step from 66 .. 68
[11:22:03.634] <TB1> INFO: Test took 4892ms.
[11:22:03.658] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:21.842] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 0.994241 .. 58.074413
[11:22:21.919] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 0 .. 68 (20) hits flags = 16 (plus default)
[11:22:21.928] <TB1> INFO: dacScan step from 0 .. 19
[11:22:35.527] <TB1> INFO: Test took 13599ms.
[11:22:35.553] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:35.553] <TB1> INFO: dacScan step from 20 .. 39
[11:22:49.954] <TB1> INFO: Test took 14401ms.
[11:22:50.040] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:50.061] <TB1> INFO: dacScan step from 40 .. 59
[11:23:07.006] <TB1> INFO: Test took 16945ms.
[11:23:07.206] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:07.291] <TB1> INFO: dacScan step from 60 .. 68
[11:23:16.396] <TB1> INFO: Test took 9104ms.
[11:23:16.477] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:35.257] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:23:35.257] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:23:35.266] <TB1> INFO: dacScan step from 15 .. 34
[11:23:57.316] <TB1> INFO: Test took 22050ms.
[11:23:57.431] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:57.443] <TB1> INFO: dacScan step from 35 .. 54



[11:24:28.374] <TB1> INFO: Test took 30931ms.
[11:24:28.667] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:28.721] <TB1> INFO: dacScan step from 55 .. 55
[11:24:32.955] <TB1> INFO: Test took 4234ms.
[11:24:32.979] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:46.520] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C0.dat
[11:24:46.520] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C1.dat
[11:24:46.520] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C2.dat
[11:24:46.520] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C3.dat
[11:24:46.520] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C4.dat
[11:24:46.521] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C5.dat
[11:24:46.521] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C6.dat
[11:24:46.521] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C7.dat
[11:24:46.521] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C8.dat
[11:24:46.521] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C9.dat
[11:24:46.521] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C10.dat
[11:24:46.521] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C11.dat
[11:24:46.521] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C12.dat
[11:24:46.522] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C13.dat
[11:24:46.522] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C14.dat
[11:24:46.522] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C15.dat
[11:24:46.522] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C0.dat
[11:24:46.531] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C1.dat
[11:24:46.539] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C2.dat
[11:24:46.547] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C3.dat
[11:24:46.554] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C4.dat
[11:24:46.561] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C5.dat
[11:24:46.567] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C6.dat
[11:24:46.573] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C7.dat
[11:24:46.580] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C8.dat
[11:24:46.586] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C9.dat
[11:24:46.593] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C10.dat
[11:24:46.599] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C11.dat
[11:24:46.606] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C12.dat
[11:24:46.612] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C13.dat
[11:24:46.619] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C14.dat
[11:24:46.625] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//trimParameters35_C15.dat
[11:24:46.632] <TB1> INFO: PixTestTrim::trimTest() done
[11:24:46.632] <TB1> INFO: vtrim: 128 108 122 100 97 125 108 118 109 115 124 117 122 110 104 110
[11:24:46.632] <TB1> INFO: vthrcomp: 92 94 97 92 93 91 91 106 101 96 97 91 92 92 87 97
[11:24:46.632] <TB1> INFO: vcal mean: 35.04 35.01 35.00 35.07 35.02 35.03 35.03 35.04 35.07 35.08 35.05 35.01 35.04 35.08 35.07 35.05
[11:24:46.632] <TB1> INFO: vcal RMS: 1.12 1.45 1.02 0.98 1.12 1.04 1.15 1.05 1.04 1.07 1.47 1.22 1.01 1.06 1.02 1.04
[11:24:46.632] <TB1> INFO: bits mean: 9.58 9.36 10.64 10.26 9.71 9.90 10.14 9.53 9.46 9.88 9.64 10.33 9.74 9.36 9.80 9.30
[11:24:46.632] <TB1> INFO: bits RMS: 2.53 2.51 2.31 2.43 2.54 2.47 2.39 2.35 2.58 2.49 2.57 2.29 2.49 2.72 2.63 2.81
[11:24:46.641] <TB1> INFO: ----------------------------------------------------------------------
[11:24:46.641] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[11:24:46.641] <TB1> INFO: ----------------------------------------------------------------------
[11:24:46.646] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:24:46.654] <TB1> INFO: dacScan step from 0 .. 19
[11:25:09.430] <TB1> INFO: Test took 22775ms.
[11:25:09.466] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:09.466] <TB1> INFO: dacScan step from 20 .. 39
[11:25:32.170] <TB1> INFO: Test took 22703ms.
[11:25:32.211] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:32.211] <TB1> INFO: dacScan step from 40 .. 59
[11:25:54.190] <TB1> INFO: Test took 21980ms.
[11:25:54.226] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:54.226] <TB1> INFO: dacScan step from 60 .. 79
[11:26:15.696] <TB1> INFO: Test took 21470ms.
[11:26:15.733] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:15.733] <TB1> INFO: dacScan step from 80 .. 99
[11:26:38.199] <TB1> INFO: Test took 22466ms.
[11:26:38.241] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:38.241] <TB1> INFO: dacScan step from 100 .. 119
[11:27:04.599] <TB1> INFO: Test took 26357ms.
[11:27:04.772] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:04.796] <TB1> INFO: dacScan step from 120 .. 139





[11:27:37.047] <TB1> INFO: Test took 32251ms.
[11:27:37.380] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:37.428] <TB1> INFO: dacScan step from 140 .. 159
[11:28:10.539] <TB1> INFO: Test took 33111ms.
[11:28:10.830] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:10.877] <TB1> INFO: dacScan step from 160 .. 179
[11:28:44.000] <TB1> INFO: Test took 33123ms.
[11:28:44.290] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:44.338] <TB1> INFO: dacScan step from 180 .. 199
[11:29:18.393] <TB1> INFO: Test took 34055ms.
[11:29:18.707] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:46.773] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 172 (20) hits flags = 16 (plus default)
[11:29:46.782] <TB1> INFO: dacScan step from 0 .. 19
[11:30:09.698] <TB1> INFO: Test took 22916ms.
[11:30:09.739] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:09.739] <TB1> INFO: dacScan step from 20 .. 39
[11:30:30.952] <TB1> INFO: Test took 21213ms.
[11:30:30.991] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:30.991] <TB1> INFO: dacScan step from 40 .. 59
[11:30:52.959] <TB1> INFO: Test took 21968ms.
[11:30:52.997] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:52.997] <TB1> INFO: dacScan step from 60 .. 79
[11:31:14.391] <TB1> INFO: Test took 21394ms.
[11:31:14.426] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:14.426] <TB1> INFO: dacScan step from 80 .. 99
[11:31:37.925] <TB1> INFO: Test took 23499ms.
[11:31:38.000] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:38.007] <TB1> INFO: dacScan step from 100 .. 119
[11:32:08.091] <TB1> INFO: Test took 30083ms.
[11:32:08.328] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:08.358] <TB1> INFO: dacScan step from 120 .. 139

[11:32:41.712] <TB1> INFO: Test took 33354ms.
[11:32:41.988] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:42.039] <TB1> INFO: dacScan step from 140 .. 159

[11:33:12.392] <TB1> INFO: Test took 30352ms.
[11:33:12.665] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:12.716] <TB1> INFO: dacScan step from 160 .. 172
[11:33:35.353] <TB1> INFO: Test took 22637ms.
[11:33:35.547] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:01.019] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:34:01.028] <TB1> INFO: dacScan step from 0 .. 19
[11:34:23.655] <TB1> INFO: Test took 22627ms.
[11:34:23.692] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:23.692] <TB1> INFO: dacScan step from 20 .. 39
[11:34:45.127] <TB1> INFO: Test took 21435ms.
[11:34:45.164] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:45.164] <TB1> INFO: dacScan step from 40 .. 59
[11:35:07.315] <TB1> INFO: Test took 22151ms.
[11:35:07.359] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:07.359] <TB1> INFO: dacScan step from 60 .. 79
[11:35:30.066] <TB1> INFO: Test took 22707ms.
[11:35:30.101] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:30.101] <TB1> INFO: dacScan step from 80 .. 99
[11:35:53.229] <TB1> INFO: Test took 23128ms.
[11:35:53.299] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:53.304] <TB1> INFO: dacScan step from 100 .. 119
[11:36:21.204] <TB1> INFO: Test took 27900ms.
[11:36:21.485] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:21.518] <TB1> INFO: dacScan step from 120 .. 139

[11:36:54.147] <TB1> INFO: Test took 32629ms.
[11:36:54.426] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:54.476] <TB1> INFO: dacScan step from 140 .. 159
[11:37:26.087] <TB1> INFO: Test took 31611ms.
[11:37:26.355] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:50.584] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:37:50.593] <TB1> INFO: dacScan step from 0 .. 19
[11:38:13.380] <TB1> INFO: Test took 22787ms.
[11:38:13.417] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:13.417] <TB1> INFO: dacScan step from 20 .. 39
[11:38:34.760] <TB1> INFO: Test took 21343ms.
[11:38:34.796] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:34.796] <TB1> INFO: dacScan step from 40 .. 59
[11:38:57.303] <TB1> INFO: Test took 22507ms.
[11:38:57.339] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:57.339] <TB1> INFO: dacScan step from 60 .. 79
[11:39:20.024] <TB1> INFO: Test took 22685ms.
[11:39:20.059] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:20.059] <TB1> INFO: dacScan step from 80 .. 99
[11:39:43.611] <TB1> INFO: Test took 23551ms.
[11:39:43.684] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:43.689] <TB1> INFO: dacScan step from 100 .. 119
[11:40:13.847] <TB1> INFO: Test took 30158ms.
[11:40:14.089] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:14.119] <TB1> INFO: dacScan step from 120 .. 139

[11:40:44.522] <TB1> INFO: Test took 30403ms.
[11:40:44.800] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:44.850] <TB1> INFO: dacScan step from 140 .. 159





[11:41:17.028] <TB1> INFO: Test took 32178ms.
[11:41:17.298] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:40.866] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:41:40.875] <TB1> INFO: dacScan step from 0 .. 19
[11:42:03.590] <TB1> INFO: Test took 22715ms.
[11:42:03.627] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:03.627] <TB1> INFO: dacScan step from 20 .. 39
[11:42:24.978] <TB1> INFO: Test took 21351ms.
[11:42:25.012] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:25.012] <TB1> INFO: dacScan step from 40 .. 59
[11:42:47.733] <TB1> INFO: Test took 22721ms.
[11:42:47.773] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:47.773] <TB1> INFO: dacScan step from 60 .. 79
[11:43:10.637] <TB1> INFO: Test took 22864ms.
[11:43:10.676] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:10.676] <TB1> INFO: dacScan step from 80 .. 99
[11:43:34.261] <TB1> INFO: Test took 23585ms.
[11:43:34.332] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:34.337] <TB1> INFO: dacScan step from 100 .. 119
[11:44:04.413] <TB1> INFO: Test took 30076ms.
[11:44:04.667] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:04.697] <TB1> INFO: dacScan step from 120 .. 139


[11:44:37.584] <TB1> INFO: Test took 32887ms.
[11:44:37.852] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:37.908] <TB1> INFO: dacScan step from 140 .. 159

[11:45:08.510] <TB1> INFO: Test took 30601ms.
[11:45:08.810] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:30.674] <TB1> INFO: PixTestTrim::trimBitTest() done
[11:45:30.676] <TB1> INFO: PixTestTrim::doTest() done, duration: 2540 seconds
[11:45:31.395] <TB1> INFO: ######################################################################
[11:45:31.395] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:45:31.395] <TB1> INFO: ######################################################################
[11:45:34.866] <TB1> INFO: Test took 3469ms.
[11:45:34.891] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:38.578] <TB1> INFO: Test took 3474ms.
[11:45:38.647] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:42.128] <TB1> INFO: Test took 3467ms.
[11:45:42.199] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:42.206] <TB1> INFO: The DUT currently contains the following objects:
[11:45:42.206] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:42.206] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:42.206] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:42.206] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:42.206] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.206] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:42.207] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.317] <TB1> INFO: Test took 1110ms.
[11:45:43.318] <TB1> INFO: The DUT currently contains the following objects:
[11:45:43.318] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:43.318] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:43.318] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:43.318] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:43.318] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.318] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.318] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.318] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.318] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.318] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.318] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.318] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.319] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.319] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.319] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.319] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.319] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.319] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.319] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:43.319] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.430] <TB1> INFO: Test took 1111ms.
[11:45:44.431] <TB1> INFO: The DUT currently contains the following objects:
[11:45:44.431] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:44.431] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:44.431] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:44.431] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:44.431] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.431] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.432] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.432] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.432] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.432] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.432] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:44.432] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.542] <TB1> INFO: Test took 1110ms.
[11:45:45.543] <TB1> INFO: The DUT currently contains the following objects:
[11:45:45.543] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:45.543] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:45.543] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:45.544] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:45.544] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:45.544] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.654] <TB1> INFO: Test took 1110ms.
[11:45:46.655] <TB1> INFO: The DUT currently contains the following objects:
[11:45:46.655] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:46.655] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:46.655] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:46.655] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:46.655] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.655] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.655] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.655] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:46.656] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.767] <TB1> INFO: Test took 1111ms.
[11:45:47.768] <TB1> INFO: The DUT currently contains the following objects:
[11:45:47.768] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:47.768] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:47.768] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:47.768] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:47.768] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.768] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.768] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:47.769] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.879] <TB1> INFO: Test took 1110ms.
[11:45:48.882] <TB1> INFO: The DUT currently contains the following objects:
[11:45:48.882] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:48.882] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:48.882] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:48.882] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:48.882] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.882] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:48.883] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.991] <TB1> INFO: Test took 1108ms.
[11:45:49.992] <TB1> INFO: The DUT currently contains the following objects:
[11:45:49.992] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:49.992] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:49.992] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:49.993] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:49.993] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.993] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:49.994] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.103] <TB1> INFO: Test took 1109ms.
[11:45:51.104] <TB1> INFO: The DUT currently contains the following objects:
[11:45:51.104] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:51.104] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:51.104] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:51.104] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:51.104] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.104] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.104] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.104] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:51.105] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.216] <TB1> INFO: Test took 1111ms.
[11:45:52.217] <TB1> INFO: The DUT currently contains the following objects:
[11:45:52.217] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:52.217] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:52.217] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:52.217] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:52.217] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.217] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.217] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.217] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:52.218] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.330] <TB1> INFO: Test took 1112ms.
[11:45:53.331] <TB1> INFO: The DUT currently contains the following objects:
[11:45:53.331] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:53.331] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:53.331] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:53.331] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:53.331] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:53.332] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.442] <TB1> INFO: Test took 1110ms.
[11:45:54.443] <TB1> INFO: The DUT currently contains the following objects:
[11:45:54.443] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:54.443] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:54.443] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:54.443] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:54.443] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.443] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.443] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.443] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.443] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.443] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.443] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.443] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.443] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.444] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.444] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.444] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.444] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.444] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.444] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:54.444] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.555] <TB1> INFO: Test took 1111ms.
[11:45:55.556] <TB1> INFO: The DUT currently contains the following objects:
[11:45:55.556] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:55.557] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:55.557] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:55.557] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:55.557] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.557] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.558] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:55.558] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.661] <TB1> INFO: Test took 1103ms.
[11:45:56.662] <TB1> INFO: The DUT currently contains the following objects:
[11:45:56.662] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:56.662] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:56.662] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:56.662] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:56.662] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:56.662] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.773] <TB1> INFO: Test took 1111ms.
[11:45:57.774] <TB1> INFO: The DUT currently contains the following objects:
[11:45:57.774] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:57.774] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:57.774] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:57.774] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:57.774] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.774] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.774] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.774] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.774] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.774] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.774] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.774] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.774] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.775] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.775] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.775] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.775] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.775] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.775] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:57.775] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.885] <TB1> INFO: Test took 1110ms.
[11:45:58.887] <TB1> INFO: The DUT currently contains the following objects:
[11:45:58.887] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:45:58.887] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:45:58.887] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:45:58.887] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:45:58.887] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.887] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.887] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.887] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.887] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.887] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.887] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:58.888] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:45:59.998] <TB1> INFO: Test took 1110ms.
[11:46:00.004] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:37.934] <TB1> INFO: Test took 217930ms.
[11:49:39.540] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:27.145] <TB1> INFO: Test took 227605ms.
[11:53:29.032] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.040] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.047] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.054] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.061] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.068] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.076] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.083] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.091] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.098] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.105] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.113] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[11:53:29.120] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.127] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.134] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.141] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.149] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[11:53:29.156] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[11:53:29.213] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C0.dat
[11:53:29.213] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C1.dat
[11:53:29.214] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C2.dat
[11:53:29.214] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C3.dat
[11:53:29.214] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C4.dat
[11:53:29.214] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C5.dat
[11:53:29.214] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C6.dat
[11:53:29.215] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C7.dat
[11:53:29.215] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C8.dat
[11:53:29.215] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C9.dat
[11:53:29.216] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C10.dat
[11:53:29.216] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C11.dat
[11:53:29.216] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C12.dat
[11:53:29.217] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C13.dat
[11:53:29.217] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C14.dat
[11:53:29.218] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//dacParameters35_C15.dat
[11:53:32.696] <TB1> INFO: Test took 3472ms.
[11:53:36.443] <TB1> INFO: Test took 3457ms.
[11:53:40.200] <TB1> INFO: Test took 3466ms.
[11:53:40.501] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:41.425] <TB1> INFO: Test took 924ms.
[11:53:41.429] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:42.536] <TB1> INFO: Test took 1107ms.
[11:53:42.540] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:43.650] <TB1> INFO: Test took 1110ms.
[11:53:43.654] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:44.766] <TB1> INFO: Test took 1112ms.
[11:53:44.772] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:45.882] <TB1> INFO: Test took 1110ms.
[11:53:45.886] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:46.991] <TB1> INFO: Test took 1105ms.
[11:53:46.994] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:48.104] <TB1> INFO: Test took 1110ms.
[11:53:48.108] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:49.220] <TB1> INFO: Test took 1112ms.
[11:53:49.224] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:50.334] <TB1> INFO: Test took 1110ms.
[11:53:50.338] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:51.450] <TB1> INFO: Test took 1112ms.
[11:53:51.454] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:52.566] <TB1> INFO: Test took 1112ms.
[11:53:52.570] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:53.680] <TB1> INFO: Test took 1110ms.
[11:53:53.684] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:54.795] <TB1> INFO: Test took 1111ms.
[11:53:54.799] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:55.910] <TB1> INFO: Test took 1112ms.
[11:53:55.914] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:57.024] <TB1> INFO: Test took 1110ms.
[11:53:57.029] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:58.140] <TB1> INFO: Test took 1111ms.
[11:53:58.145] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:59.257] <TB1> INFO: Test took 1113ms.
[11:53:59.261] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:00.372] <TB1> INFO: Test took 1111ms.
[11:54:00.376] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:01.486] <TB1> INFO: Test took 1110ms.
[11:54:01.490] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:02.601] <TB1> INFO: Test took 1111ms.
[11:54:02.606] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:03.716] <TB1> INFO: Test took 1110ms.
[11:54:03.720] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:04.832] <TB1> INFO: Test took 1112ms.
[11:54:04.839] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:05.948] <TB1> INFO: Test took 1110ms.
[11:54:05.952] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:07.056] <TB1> INFO: Test took 1104ms.
[11:54:07.059] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:08.169] <TB1> INFO: Test took 1110ms.
[11:54:08.174] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:09.284] <TB1> INFO: Test took 1111ms.
[11:54:09.289] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:10.398] <TB1> INFO: Test took 1109ms.
[11:54:10.403] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:11.515] <TB1> INFO: Test took 1112ms.
[11:54:11.520] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:12.632] <TB1> INFO: Test took 1112ms.
[11:54:12.636] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:13.746] <TB1> INFO: Test took 1110ms.
[11:54:13.752] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:14.862] <TB1> INFO: Test took 1111ms.
[11:54:14.867] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:15.978] <TB1> INFO: Test took 1111ms.
[11:54:16.571] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 525 seconds
[11:54:16.571] <TB1> INFO: PH scale (per ROC): 78 68 96 86 77 83 87 78 76 85 80 87 92 81 78 81
[11:54:16.571] <TB1> INFO: PH offset (per ROC): 169 170 141 159 172 149 155 171 173 153 176 150 162 162 157 161
[11:54:16.749] <TB1> INFO: ######################################################################
[11:54:16.749] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:54:16.749] <TB1> INFO: ######################################################################
[11:54:16.760] <TB1> INFO: scanning low vcal = 10
[11:54:20.526] <TB1> INFO: Test took 3766ms.
[11:54:20.530] <TB1> INFO: scanning low vcal = 20
[11:54:24.359] <TB1> INFO: Test took 3829ms.
[11:54:24.366] <TB1> INFO: scanning low vcal = 30
[11:54:28.324] <TB1> INFO: Test took 3959ms.
[11:54:28.336] <TB1> INFO: scanning low vcal = 40
[11:54:32.738] <TB1> INFO: Test took 4402ms.
[11:54:32.808] <TB1> INFO: scanning low vcal = 50
[11:54:37.200] <TB1> INFO: Test took 4392ms.
[11:54:37.263] <TB1> INFO: scanning low vcal = 60
[11:54:41.621] <TB1> INFO: Test took 4358ms.
[11:54:41.684] <TB1> INFO: scanning low vcal = 70
[11:54:46.085] <TB1> INFO: Test took 4401ms.
[11:54:46.148] <TB1> INFO: scanning low vcal = 80
[11:54:50.520] <TB1> INFO: Test took 4372ms.
[11:54:50.582] <TB1> INFO: scanning low vcal = 90
[11:54:54.962] <TB1> INFO: Test took 4380ms.
[11:54:55.044] <TB1> INFO: scanning low vcal = 100
[11:54:59.419] <TB1> INFO: Test took 4375ms.
[11:54:59.488] <TB1> INFO: scanning low vcal = 110
[11:55:03.858] <TB1> INFO: Test took 4370ms.
[11:55:03.932] <TB1> INFO: scanning low vcal = 120
[11:55:08.263] <TB1> INFO: Test took 4331ms.
[11:55:08.336] <TB1> INFO: scanning low vcal = 130
[11:55:12.692] <TB1> INFO: Test took 4356ms.
[11:55:12.760] <TB1> INFO: scanning low vcal = 140
[11:55:17.131] <TB1> INFO: Test took 4371ms.
[11:55:17.190] <TB1> INFO: scanning low vcal = 150
[11:55:21.571] <TB1> INFO: Test took 4381ms.
[11:55:21.649] <TB1> INFO: scanning low vcal = 160
[11:55:26.028] <TB1> INFO: Test took 4379ms.
[11:55:26.089] <TB1> INFO: scanning low vcal = 170
[11:55:30.499] <TB1> INFO: Test took 4410ms.
[11:55:30.569] <TB1> INFO: scanning low vcal = 180
[11:55:34.932] <TB1> INFO: Test took 4363ms.
[11:55:35.014] <TB1> INFO: scanning low vcal = 190
[11:55:39.502] <TB1> INFO: Test took 4488ms.
[11:55:39.573] <TB1> INFO: scanning low vcal = 200
[11:55:43.953] <TB1> INFO: Test took 4380ms.
[11:55:44.031] <TB1> INFO: scanning low vcal = 210
[11:55:48.420] <TB1> INFO: Test took 4389ms.
[11:55:48.481] <TB1> INFO: scanning low vcal = 220
[11:55:52.866] <TB1> INFO: Test took 4385ms.
[11:55:52.934] <TB1> INFO: scanning low vcal = 230
[11:55:57.301] <TB1> INFO: Test took 4367ms.
[11:55:57.367] <TB1> INFO: scanning low vcal = 240
[11:56:01.741] <TB1> INFO: Test took 4374ms.
[11:56:01.812] <TB1> INFO: scanning low vcal = 250
[11:56:06.188] <TB1> INFO: Test took 4376ms.
[11:56:06.253] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[11:56:10.635] <TB1> INFO: Test took 4382ms.
[11:56:10.701] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[11:56:15.071] <TB1> INFO: Test took 4370ms.
[11:56:15.146] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[11:56:19.531] <TB1> INFO: Test took 4385ms.
[11:56:19.599] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[11:56:23.966] <TB1> INFO: Test took 4367ms.
[11:56:24.036] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:56:28.438] <TB1> INFO: Test took 4402ms.
[11:56:29.000] <TB1> INFO: PixTestGainPedestal::measure() done
[11:57:04.006] <TB1> INFO: PixTestGainPedestal::fit() done
[11:57:04.006] <TB1> INFO: non-linearity mean: 0.958 0.957 0.962 0.962 0.952 0.959 0.957 0.950 0.958 0.955 0.960 0.959 0.958 0.954 0.952 0.961
[11:57:04.006] <TB1> INFO: non-linearity RMS: 0.005 0.008 0.009 0.005 0.007 0.006 0.006 0.007 0.007 0.005 0.005 0.006 0.007 0.007 0.007 0.006
[11:57:04.007] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[11:57:04.030] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[11:57:04.048] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[11:57:04.067] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[11:57:04.086] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[11:57:04.104] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[11:57:04.123] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[11:57:04.141] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[11:57:04.160] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[11:57:04.179] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[11:57:04.200] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[11:57:04.222] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[11:57:04.243] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[11:57:04.264] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[11:57:04.286] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[11:57:04.307] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2077_FullQualification_2015-08-21_12h37m_1440153422//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[11:57:04.329] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[11:57:04.336] <TB1> INFO: enter test to run
[11:57:04.337] <TB1> INFO: test: exit no parameter change
[11:57:04.803] <TB1> QUIET: Connection to board 153 closed.
[11:57:04.882] <TB1> INFO: pXar: this is the end, my friend