[10:27:24.242] <TB3> INFO: *** Welcome to pxar ***
[10:27:24.242] <TB3> INFO: *** Today: 2015/08/13
[10:27:24.242] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C15.dat
[10:27:24.242] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//tbmParameters_C0b.dat
[10:27:24.242] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//defaultMaskFile.dat
[10:27:24.242] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters_C15.dat
[10:27:24.322] <TB3> INFO: clk: 4
[10:27:24.323] <TB3> INFO: ctr: 4
[10:27:24.323] <TB3> INFO: sda: 19
[10:27:24.323] <TB3> INFO: tin: 9
[10:27:24.323] <TB3> INFO: level: 15
[10:27:24.323] <TB3> INFO: triggerdelay: 0
[10:27:24.323] <TB3> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[10:27:24.323] <TB3> INFO: Log level: INFO
[10:27:24.332] <TB3> INFO: Found DTB DTB_WZ4I6J
[10:27:24.342] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[10:27:24.345] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[10:27:24.348] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[10:27:25.875] <TB3> INFO: DUT info:
[10:27:25.875] <TB3> INFO: The DUT currently contains the following objects:
[10:27:25.875] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:25.875] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:25.875] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:25.875] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:27:25.875] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.875] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.875] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:25.876] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:26.277] <TB3> INFO: enter 'restricted' command line mode
[10:27:26.277] <TB3> INFO: enter test to run
[10:27:26.277] <TB3> INFO: test: pretest no parameter change
[10:27:26.277] <TB3> INFO: running: pretest
[10:27:26.285] <TB3> INFO: ######################################################################
[10:27:26.285] <TB3> INFO: PixTestPretest::doTest()
[10:27:26.285] <TB3> INFO: ######################################################################
[10:27:26.287] <TB3> INFO: ----------------------------------------------------------------------
[10:27:26.287] <TB3> INFO: PixTestPretest::programROC()
[10:27:26.287] <TB3> INFO: ----------------------------------------------------------------------
[10:27:44.305] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:27:44.305] <TB3> INFO: IA differences per ROC: 17.7 16.1 20.1 17.7 16.9 18.5 20.1 20.1 18.5 18.5 17.7 20.1 19.3 17.7 18.5 19.3
[10:27:44.373] <TB3> INFO: ----------------------------------------------------------------------
[10:27:44.373] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:27:44.373] <TB3> INFO: ----------------------------------------------------------------------
[10:28:03.959] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 390.7 mA = 24.4187 mA/ROC
[10:28:03.962] <TB3> INFO: ----------------------------------------------------------------------
[10:28:03.962] <TB3> INFO: PixTestPretest::findWorkingPixel()
[10:28:03.962] <TB3> INFO: ----------------------------------------------------------------------
[10:28:12.238] <TB3> INFO: Test took 8269ms.
[10:28:12.542] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:28:12.584] <TB3> INFO: ----------------------------------------------------------------------
[10:28:12.584] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[10:28:12.584] <TB3> INFO: ----------------------------------------------------------------------
[10:28:20.861] <TB3> INFO: Test took 8268ms.
[10:28:21.169] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[10:28:21.169] <TB3> INFO: CalDel: 125 121 118 135 117 137 150 117 147 143 149 139 130 128 143 143
[10:28:21.170] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:28:21.174] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C0.dat
[10:28:21.174] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C1.dat
[10:28:21.174] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C2.dat
[10:28:21.174] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C3.dat
[10:28:21.175] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C4.dat
[10:28:21.175] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C5.dat
[10:28:21.175] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C6.dat
[10:28:21.176] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C7.dat
[10:28:21.176] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C8.dat
[10:28:21.176] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C9.dat
[10:28:21.176] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C10.dat
[10:28:21.177] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C11.dat
[10:28:21.177] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C12.dat
[10:28:21.177] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C13.dat
[10:28:21.178] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C14.dat
[10:28:21.178] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C15.dat
[10:28:21.178] <TB3> INFO: PixTestPretest::doTest() done, duration: 54 seconds
[10:28:21.279] <TB3> INFO: enter test to run
[10:28:21.279] <TB3> INFO: test: fulltest no parameter change
[10:28:21.279] <TB3> INFO: running: fulltest
[10:28:21.280] <TB3> INFO: ######################################################################
[10:28:21.280] <TB3> INFO: PixTestFullTest::doTest()
[10:28:21.280] <TB3> INFO: ######################################################################
[10:28:21.281] <TB3> INFO: ######################################################################
[10:28:21.281] <TB3> INFO: PixTestAlive::doTest()
[10:28:21.281] <TB3> INFO: ######################################################################
[10:28:21.283] <TB3> INFO: ----------------------------------------------------------------------
[10:28:21.283] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:28:21.283] <TB3> INFO: ----------------------------------------------------------------------
[10:28:24.756] <TB3> INFO: Test took 3472ms.
[10:28:24.779] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:25.011] <TB3> INFO: PixTestAlive::aliveTest() done
[10:28:25.011] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0
[10:28:25.013] <TB3> INFO: ----------------------------------------------------------------------
[10:28:25.013] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:28:25.013] <TB3> INFO: ----------------------------------------------------------------------
[10:28:27.760] <TB3> INFO: Test took 2745ms.
[10:28:27.765] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:27.766] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:28:28.000] <TB3> INFO: PixTestAlive::maskTest() done
[10:28:28.000] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:28:28.004] <TB3> INFO: ----------------------------------------------------------------------
[10:28:28.004] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:28:28.004] <TB3> INFO: ----------------------------------------------------------------------
[10:28:31.480] <TB3> INFO: Test took 3472ms.
[10:28:31.502] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:31.726] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[10:28:31.726] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:28:31.726] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[10:28:31.734] <TB3> INFO: ######################################################################
[10:28:31.734] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:28:31.734] <TB3> INFO: ######################################################################
[10:28:31.736] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[10:28:31.749] <TB3> INFO: dacScan step from 0 .. 29
[10:28:53.125] <TB3> INFO: Test took 21376ms.
[10:28:53.161] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:53.161] <TB3> INFO: dacScan step from 30 .. 59
[10:29:15.696] <TB3> INFO: Test took 22535ms.
[10:29:15.783] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:15.794] <TB3> INFO: dacScan step from 60 .. 89
[10:29:44.535] <TB3> INFO: Test took 28741ms.
[10:29:44.816] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:44.892] <TB3> INFO: dacScan step from 90 .. 119
[10:30:13.100] <TB3> INFO: Test took 28208ms.
[10:30:13.448] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:13.523] <TB3> INFO: dacScan step from 120 .. 149
[10:30:39.651] <TB3> INFO: Test took 26128ms.
[10:30:39.886] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:03.574] <TB3> INFO: PixTestBBMap::doTest() done, duration: 151 seconds
[10:31:03.574] <TB3> INFO: number of dead bumps (per ROC): 9 0 0 0 0 0 0 0 0 0 0 0 0 0 2 10
[10:31:03.574] <TB3> INFO: separation cut (per ROC): 90 89 99 94 94 87 88 112 79 87 95 86 108 98 90 73
[10:31:03.646] <TB3> INFO: ######################################################################
[10:31:03.646] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[10:31:03.646] <TB3> INFO: ######################################################################
[10:31:03.646] <TB3> INFO: ----------------------------------------------------------------------
[10:31:03.646] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[10:31:03.646] <TB3> INFO: ----------------------------------------------------------------------
[10:31:03.646] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[10:31:03.655] <TB3> INFO: dacScan step from 0 .. 3
[10:31:22.709] <TB3> INFO: Test took 19054ms.
[10:31:22.739] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:22.739] <TB3> INFO: dacScan step from 4 .. 7
[10:31:41.754] <TB3> INFO: Test took 19015ms.
[10:31:41.788] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:41.788] <TB3> INFO: dacScan step from 8 .. 11
[10:32:00.805] <TB3> INFO: Test took 19017ms.
[10:32:00.832] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:00.832] <TB3> INFO: dacScan step from 12 .. 15
[10:32:19.958] <TB3> INFO: Test took 19126ms.
[10:32:19.990] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:19.990] <TB3> INFO: dacScan step from 16 .. 19
[10:32:39.054] <TB3> INFO: Test took 19064ms.
[10:32:39.082] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:39.082] <TB3> INFO: dacScan step from 20 .. 23
[10:32:57.948] <TB3> INFO: Test took 18866ms.
[10:32:57.978] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:57.978] <TB3> INFO: dacScan step from 24 .. 27
[10:33:17.035] <TB3> INFO: Test took 19057ms.
[10:33:17.063] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:17.063] <TB3> INFO: dacScan step from 28 .. 31
[10:33:35.962] <TB3> INFO: Test took 18899ms.
[10:33:35.990] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:35.990] <TB3> INFO: dacScan step from 32 .. 35
[10:33:55.002] <TB3> INFO: Test took 19012ms.
[10:33:55.033] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:55.033] <TB3> INFO: dacScan step from 36 .. 39
[10:34:13.982] <TB3> INFO: Test took 18949ms.
[10:34:14.016] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:14.016] <TB3> INFO: dacScan step from 40 .. 43
[10:34:33.032] <TB3> INFO: Test took 19016ms.
[10:34:33.058] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:33.059] <TB3> INFO: dacScan step from 44 .. 47
[10:34:51.954] <TB3> INFO: Test took 18895ms.
[10:34:51.984] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:51.984] <TB3> INFO: dacScan step from 48 .. 51
[10:35:10.137] <TB3> INFO: Test took 18153ms.
[10:35:10.165] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:10.165] <TB3> INFO: dacScan step from 52 .. 55
[10:35:27.768] <TB3> INFO: Test took 17603ms.
[10:35:27.800] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:27.800] <TB3> INFO: dacScan step from 56 .. 59
[10:35:45.569] <TB3> INFO: Test took 17769ms.
[10:35:45.596] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:45.596] <TB3> INFO: dacScan step from 60 .. 63
[10:36:03.326] <TB3> INFO: Test took 17730ms.
[10:36:03.353] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:03.353] <TB3> INFO: dacScan step from 64 .. 67
[10:36:20.824] <TB3> INFO: Test took 17471ms.
[10:36:20.853] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:20.854] <TB3> INFO: dacScan step from 68 .. 71
[10:36:39.169] <TB3> INFO: Test took 18315ms.
[10:36:39.209] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:39.209] <TB3> INFO: dacScan step from 72 .. 75
[10:36:58.598] <TB3> INFO: Test took 19389ms.
[10:36:58.645] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:58.646] <TB3> INFO: dacScan step from 76 .. 79
[10:37:18.523] <TB3> INFO: Test took 19877ms.
[10:37:18.595] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:18.598] <TB3> INFO: dacScan step from 80 .. 83
[10:37:40.370] <TB3> INFO: Test took 21772ms.
[10:37:40.499] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:40.506] <TB3> INFO: dacScan step from 84 .. 87
[10:38:04.461] <TB3> INFO: Test took 23955ms.
[10:38:04.617] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:04.626] <TB3> INFO: dacScan step from 88 .. 91
[10:38:30.332] <TB3> INFO: Test took 25706ms.
[10:38:30.514] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:30.522] <TB3> INFO: dacScan step from 92 .. 95
[10:38:58.008] <TB3> INFO: Test took 27486ms.
[10:38:58.233] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:58.243] <TB3> INFO: dacScan step from 96 .. 99
[10:39:26.628] <TB3> INFO: Test took 28385ms.
[10:39:26.853] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:26.867] <TB3> INFO: dacScan step from 100 .. 103


[10:39:55.551] <TB3> INFO: Test took 28684ms.
[10:39:55.773] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:55.785] <TB3> INFO: dacScan step from 104 .. 107


[10:40:24.961] <TB3> INFO: Test took 29176ms.
[10:40:25.208] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:25.221] <TB3> INFO: dacScan step from 108 .. 111


[10:40:54.342] <TB3> INFO: Test took 29121ms.
[10:40:54.582] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:54.594] <TB3> INFO: dacScan step from 112 .. 115


[10:41:23.941] <TB3> INFO: Test took 29346ms.
[10:41:24.170] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:24.182] <TB3> INFO: dacScan step from 116 .. 119



[10:41:53.530] <TB3> INFO: Test took 29348ms.
[10:41:53.789] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:53.803] <TB3> INFO: dacScan step from 120 .. 123





[10:42:23.186] <TB3> INFO: Test took 29383ms.
[10:42:23.422] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:23.435] <TB3> INFO: dacScan step from 124 .. 127
[10:42:52.745] <TB3> INFO: Test took 29310ms.
[10:42:52.963] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:52.978] <TB3> INFO: dacScan step from 128 .. 131
[10:43:22.180] <TB3> INFO: Test took 29202ms.
[10:43:22.423] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:22.435] <TB3> INFO: dacScan step from 132 .. 135
[10:43:51.661] <TB3> INFO: Test took 29225ms.
[10:43:51.907] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:51.920] <TB3> INFO: dacScan step from 136 .. 139
[10:44:21.045] <TB3> INFO: Test took 29125ms.
[10:44:21.294] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:21.309] <TB3> INFO: dacScan step from 140 .. 143
[10:44:50.408] <TB3> INFO: Test took 29099ms.
[10:44:50.664] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:50.678] <TB3> INFO: dacScan step from 144 .. 147
[10:45:19.535] <TB3> INFO: Test took 28857ms.
[10:45:19.771] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:19.783] <TB3> INFO: dacScan step from 148 .. 149
[10:45:34.204] <TB3> INFO: Test took 14421ms.
[10:45:34.344] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:34.352] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:35.908] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:37.466] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:38.955] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:40.414] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:41.849] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:43.282] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:44.682] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:46.007] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:47.367] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:48.725] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:50.139] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:51.610] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:53.072] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:54.496] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:55.979] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:45:57.542] <TB3> INFO: PixTestScurves::scurves() done
[10:45:57.542] <TB3> INFO: Vcal mean: 91.10 82.18 86.82 89.92 90.46 86.37 86.10 101.83 83.65 85.32 100.87 86.17 96.06 96.88 90.69 76.39
[10:45:57.542] <TB3> INFO: Vcal RMS: 6.32 4.74 5.11 5.00 5.16 5.38 5.02 6.13 5.04 4.58 5.99 4.73 5.51 5.88 5.31 4.76
[10:45:57.542] <TB3> INFO: PixTestScurves::fullTest() done, duration: 893 seconds
[10:45:57.617] <TB3> INFO: ######################################################################
[10:45:57.617] <TB3> INFO: PixTestTrim::doTest()
[10:45:57.617] <TB3> INFO: ######################################################################
[10:45:57.619] <TB3> INFO: ----------------------------------------------------------------------
[10:45:57.619] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[10:45:57.619] <TB3> INFO: ----------------------------------------------------------------------
[10:45:57.708] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:45:57.708] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:45:57.717] <TB3> INFO: dacScan step from 0 .. 19
[10:46:12.822] <TB3> INFO: Test took 15104ms.
[10:46:12.848] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:12.848] <TB3> INFO: dacScan step from 20 .. 39
[10:46:27.920] <TB3> INFO: Test took 15072ms.
[10:46:27.944] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:27.944] <TB3> INFO: dacScan step from 40 .. 59
[10:46:42.295] <TB3> INFO: Test took 14351ms.
[10:46:42.317] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:42.317] <TB3> INFO: dacScan step from 60 .. 79
[10:46:56.686] <TB3> INFO: Test took 14368ms.
[10:46:56.708] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:56.708] <TB3> INFO: dacScan step from 80 .. 99
[10:47:11.856] <TB3> INFO: Test took 15148ms.
[10:47:11.904] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:11.910] <TB3> INFO: dacScan step from 100 .. 119
[10:47:30.453] <TB3> INFO: Test took 18543ms.
[10:47:30.602] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:30.630] <TB3> INFO: dacScan step from 120 .. 139
[10:47:50.043] <TB3> INFO: Test took 19412ms.
[10:47:50.218] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:50.254] <TB3> INFO: dacScan step from 140 .. 159
[10:48:05.948] <TB3> INFO: Test took 15694ms.
[10:48:06.039] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:28.072] <TB3> INFO: ROC 0 VthrComp = 94
[10:48:28.072] <TB3> INFO: ROC 1 VthrComp = 88
[10:48:28.073] <TB3> INFO: ROC 2 VthrComp = 96
[10:48:28.073] <TB3> INFO: ROC 3 VthrComp = 97
[10:48:28.074] <TB3> INFO: ROC 4 VthrComp = 98
[10:48:28.074] <TB3> INFO: ROC 5 VthrComp = 91
[10:48:28.074] <TB3> INFO: ROC 6 VthrComp = 92
[10:48:28.074] <TB3> INFO: ROC 7 VthrComp = 104
[10:48:28.074] <TB3> INFO: ROC 8 VthrComp = 88
[10:48:28.075] <TB3> INFO: ROC 9 VthrComp = 95
[10:48:28.075] <TB3> INFO: ROC 10 VthrComp = 101
[10:48:28.075] <TB3> INFO: ROC 11 VthrComp = 93
[10:48:28.075] <TB3> INFO: ROC 12 VthrComp = 104
[10:48:28.075] <TB3> INFO: ROC 13 VthrComp = 99
[10:48:28.075] <TB3> INFO: ROC 14 VthrComp = 97
[10:48:28.076] <TB3> INFO: ROC 15 VthrComp = 81
[10:48:28.076] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:48:28.076] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:48:28.085] <TB3> INFO: dacScan step from 0 .. 19
[10:48:43.253] <TB3> INFO: Test took 15168ms.
[10:48:43.281] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:43.281] <TB3> INFO: dacScan step from 20 .. 39
[10:48:58.544] <TB3> INFO: Test took 15263ms.
[10:48:58.580] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:58.584] <TB3> INFO: dacScan step from 40 .. 59
[10:49:16.188] <TB3> INFO: Test took 17604ms.
[10:49:16.337] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:16.377] <TB3> INFO: dacScan step from 60 .. 79
[10:49:35.203] <TB3> INFO: Test took 18826ms.
[10:49:35.373] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:35.436] <TB3> INFO: dacScan step from 80 .. 99
[10:49:55.401] <TB3> INFO: Test took 19965ms.
[10:49:55.564] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:55.621] <TB3> INFO: dacScan step from 100 .. 119
[10:50:15.828] <TB3> INFO: Test took 20207ms.
[10:50:15.992] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:16.047] <TB3> INFO: dacScan step from 120 .. 139
[10:50:36.268] <TB3> INFO: Test took 20221ms.
[10:50:36.446] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:36.500] <TB3> INFO: dacScan step from 140 .. 159
[10:50:55.341] <TB3> INFO: Test took 18841ms.
[10:50:55.525] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:21.004] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 63.2478 for pixel 0/69 mean/min/max = 47.4086/31.4815/63.3357
[10:51:21.005] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 58.9154 for pixel 22/73 mean/min/max = 45.7238/32.4604/58.9872
[10:51:21.005] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 56.4163 for pixel 7/79 mean/min/max = 44.1859/31.7789/56.5929
[10:51:21.005] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 57.1687 for pixel 50/2 mean/min/max = 44.9524/32.6588/57.2459
[10:51:21.005] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 56.7229 for pixel 17/4 mean/min/max = 44.0638/31.3019/56.8257
[10:51:21.006] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.1875 for pixel 8/75 mean/min/max = 45.6388/32.0071/59.2705
[10:51:21.006] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.8344 for pixel 0/59 mean/min/max = 45.0421/32.1918/57.8924
[10:51:21.006] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 61.9149 for pixel 0/77 mean/min/max = 47.5703/33.197/61.9436
[10:51:21.007] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.4686 for pixel 0/2 mean/min/max = 46.3337/33.0571/59.6102
[10:51:21.007] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 56.4639 for pixel 38/6 mean/min/max = 44.2574/31.8982/56.6166
[10:51:21.007] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 62.5239 for pixel 0/50 mean/min/max = 47.6977/32.8137/62.5818
[10:51:21.007] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.3079 for pixel 17/2 mean/min/max = 44.7742/32.007/57.5414
[10:51:21.008] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.8167 for pixel 15/7 mean/min/max = 46.3129/32.7449/59.8808
[10:51:21.008] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 61.1202 for pixel 22/78 mean/min/max = 46.2797/31.3954/61.164
[10:51:21.008] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 57.5832 for pixel 7/75 mean/min/max = 44.53/31.3605/57.6995
[10:51:21.008] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.1677 for pixel 12/44 mean/min/max = 45.2504/31.9531/58.5477
[10:51:21.009] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:53.697] <TB3> INFO: Test took 92688ms.
[10:52:55.030] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:52:55.039] <TB3> INFO: dacScan step from 0 .. 19
[10:53:18.139] <TB3> INFO: Test took 23100ms.
[10:53:18.191] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:18.193] <TB3> INFO: dacScan step from 20 .. 39
[10:53:47.331] <TB3> INFO: Test took 29137ms.
[10:53:47.568] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:47.603] <TB3> INFO: dacScan step from 40 .. 59


[10:54:20.766] <TB3> INFO: Test took 33162ms.
[10:54:21.060] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:21.118] <TB3> INFO: dacScan step from 60 .. 79


[10:54:54.106] <TB3> INFO: Test took 32988ms.
[10:54:54.387] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:54.443] <TB3> INFO: dacScan step from 80 .. 99


[10:55:27.440] <TB3> INFO: Test took 32997ms.
[10:55:27.737] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:27.791] <TB3> INFO: dacScan step from 100 .. 119



[10:56:00.994] <TB3> INFO: Test took 33202ms.
[10:56:01.294] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:01.351] <TB3> INFO: dacScan step from 120 .. 139





[10:56:34.310] <TB3> INFO: Test took 32959ms.
[10:56:34.587] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:34.639] <TB3> INFO: dacScan step from 140 .. 159



[10:57:07.771] <TB3> INFO: Test took 33132ms.
[10:57:08.068] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:08.132] <TB3> INFO: dacScan step from 160 .. 179



[10:57:41.345] <TB3> INFO: Test took 33213ms.
[10:57:41.638] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:41.700] <TB3> INFO: dacScan step from 180 .. 199

[10:58:14.796] <TB3> INFO: Test took 33096ms.
[10:58:15.082] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:40.627] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.039576 .. 255.000000
[10:58:40.707] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[10:58:40.716] <TB3> INFO: dacScan step from 0 .. 19
[10:58:54.212] <TB3> INFO: Test took 13496ms.
[10:58:54.239] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:54.239] <TB3> INFO: dacScan step from 20 .. 39
[10:59:09.140] <TB3> INFO: Test took 14900ms.
[10:59:09.218] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:09.234] <TB3> INFO: dacScan step from 40 .. 59
[10:59:26.815] <TB3> INFO: Test took 17581ms.
[10:59:26.959] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:27.010] <TB3> INFO: dacScan step from 60 .. 79
[10:59:44.813] <TB3> INFO: Test took 17803ms.
[10:59:44.968] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:45.012] <TB3> INFO: dacScan step from 80 .. 99
[11:00:01.580] <TB3> INFO: Test took 16568ms.
[11:00:01.725] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:01.770] <TB3> INFO: dacScan step from 100 .. 119
[11:00:18.495] <TB3> INFO: Test took 16725ms.
[11:00:18.635] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:18.679] <TB3> INFO: dacScan step from 120 .. 139
[11:00:35.895] <TB3> INFO: Test took 17216ms.
[11:00:36.059] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:36.104] <TB3> INFO: dacScan step from 140 .. 159
[11:00:53.667] <TB3> INFO: Test took 17563ms.
[11:00:53.837] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:53.886] <TB3> INFO: dacScan step from 160 .. 179
[11:01:11.617] <TB3> INFO: Test took 17732ms.
[11:01:11.762] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:11.805] <TB3> INFO: dacScan step from 180 .. 199
[11:01:29.945] <TB3> INFO: Test took 18140ms.
[11:01:30.089] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:30.137] <TB3> INFO: dacScan step from 200 .. 219
[11:01:46.837] <TB3> INFO: Test took 16700ms.
[11:01:47.011] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:47.055] <TB3> INFO: dacScan step from 220 .. 239
[11:02:04.689] <TB3> INFO: Test took 17634ms.
[11:02:04.839] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:04.885] <TB3> INFO: dacScan step from 240 .. 255
[11:02:18.584] <TB3> INFO: Test took 13699ms.
[11:02:18.702] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:50.714] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 13.982597 .. 45.713406
[11:02:50.797] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 3 .. 55 (20) hits flags = 16 (plus default)
[11:02:50.806] <TB3> INFO: dacScan step from 3 .. 22
[11:03:04.337] <TB3> INFO: Test took 13531ms.
[11:03:04.359] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:04.359] <TB3> INFO: dacScan step from 23 .. 42
[11:03:19.612] <TB3> INFO: Test took 15252ms.
[11:03:19.710] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:19.732] <TB3> INFO: dacScan step from 43 .. 55
[11:03:31.501] <TB3> INFO: Test took 11769ms.
[11:03:31.593] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:47.865] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 18.874019 .. 41.209911
[11:03:47.946] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 51 (20) hits flags = 16 (plus default)
[11:03:47.955] <TB3> INFO: dacScan step from 8 .. 27
[11:04:00.964] <TB3> INFO: Test took 13009ms.
[11:04:00.983] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:00.983] <TB3> INFO: dacScan step from 28 .. 47
[11:04:16.235] <TB3> INFO: Test took 15252ms.
[11:04:16.359] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:16.395] <TB3> INFO: dacScan step from 48 .. 51
[11:04:22.033] <TB3> INFO: Test took 5638ms.
[11:04:22.078] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:37.662] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.988827 .. 41.209911
[11:04:37.738] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 51 (20) hits flags = 16 (plus default)
[11:04:37.746] <TB3> INFO: dacScan step from 1 .. 20
[11:04:51.294] <TB3> INFO: Test took 13548ms.
[11:04:51.320] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:51.320] <TB3> INFO: dacScan step from 21 .. 40
[11:05:05.406] <TB3> INFO: Test took 14086ms.
[11:05:05.485] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:05.506] <TB3> INFO: dacScan step from 41 .. 51
[11:05:16.161] <TB3> INFO: Test took 10655ms.
[11:05:16.244] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:32.174] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:05:32.174] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:05:32.184] <TB3> INFO: dacScan step from 15 .. 34
[11:05:54.062] <TB3> INFO: Test took 21878ms.
[11:05:54.127] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:54.137] <TB3> INFO: dacScan step from 35 .. 54
[11:06:24.216] <TB3> INFO: Test took 30079ms.
[11:06:24.678] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:24.789] <TB3> INFO: dacScan step from 55 .. 55
[11:06:29.110] <TB3> INFO: Test took 4321ms.
[11:06:29.130] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:44.105] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:06:44.105] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:06:44.105] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:06:44.105] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:06:44.105] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:06:44.106] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:06:44.107] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:06:44.107] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C0.dat
[11:06:44.113] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C1.dat
[11:06:44.119] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C2.dat
[11:06:44.126] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C3.dat
[11:06:44.132] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C4.dat
[11:06:44.139] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C5.dat
[11:06:44.146] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C6.dat
[11:06:44.152] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C7.dat
[11:06:44.158] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C8.dat
[11:06:44.164] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C9.dat
[11:06:44.171] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C10.dat
[11:06:44.177] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C11.dat
[11:06:44.183] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C12.dat
[11:06:44.189] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C13.dat
[11:06:44.196] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C14.dat
[11:06:44.203] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C15.dat
[11:06:44.209] <TB3> INFO: PixTestTrim::trimTest() done
[11:06:44.209] <TB3> INFO: vtrim: 160 185 100 113 104 122 112 116 100 107 113 118 128 134 102 103
[11:06:44.209] <TB3> INFO: vthrcomp: 94 88 96 97 98 91 92 104 88 95 101 93 104 99 97 81
[11:06:44.209] <TB3> INFO: vcal mean: 35.05 35.02 34.99 35.02 35.00 35.05 35.02 35.04 35.04 34.97 35.04 35.04 35.06 35.08 35.04 35.00
[11:06:44.209] <TB3> INFO: vcal RMS: 1.19 3.84 1.02 1.14 1.17 1.02 0.99 1.03 0.99 1.03 1.13 1.00 1.01 1.10 1.03 1.01
[11:06:44.209] <TB3> INFO: bits mean: 9.99 11.89 10.30 10.19 10.39 10.06 9.76 9.10 9.35 10.21 9.11 10.13 9.86 10.14 10.34 9.79
[11:06:44.209] <TB3> INFO: bits RMS: 2.45 1.54 2.45 2.36 2.45 2.50 2.58 2.57 2.57 2.46 2.71 2.43 2.37 2.44 2.43 2.58
[11:06:44.216] <TB3> INFO: ----------------------------------------------------------------------
[11:06:44.216] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[11:06:44.216] <TB3> INFO: ----------------------------------------------------------------------
[11:06:44.219] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:06:44.228] <TB3> INFO: dacScan step from 0 .. 19
[11:07:06.846] <TB3> INFO: Test took 22618ms.
[11:07:06.886] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:06.886] <TB3> INFO: dacScan step from 20 .. 39
[11:07:29.365] <TB3> INFO: Test took 22479ms.
[11:07:29.400] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:29.400] <TB3> INFO: dacScan step from 40 .. 59
[11:07:51.524] <TB3> INFO: Test took 22124ms.
[11:07:51.567] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:51.568] <TB3> INFO: dacScan step from 60 .. 79
[11:08:14.294] <TB3> INFO: Test took 22726ms.
[11:08:14.331] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:14.331] <TB3> INFO: dacScan step from 80 .. 99
[11:08:37.187] <TB3> INFO: Test took 22856ms.
[11:08:37.235] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:37.236] <TB3> INFO: dacScan step from 100 .. 119
[11:09:02.084] <TB3> INFO: Test took 24847ms.
[11:09:02.267] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:02.286] <TB3> INFO: dacScan step from 120 .. 139


[11:09:34.990] <TB3> INFO: Test took 32704ms.
[11:09:35.295] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:35.336] <TB3> INFO: dacScan step from 140 .. 159


[11:10:08.378] <TB3> INFO: Test took 33042ms.
[11:10:08.671] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:08.717] <TB3> INFO: dacScan step from 160 .. 179
[11:10:41.706] <TB3> INFO: Test took 32988ms.
[11:10:41.983] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:42.037] <TB3> INFO: dacScan step from 180 .. 199
[11:11:15.929] <TB3> INFO: Test took 33892ms.
[11:11:16.210] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:44.761] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[11:11:44.770] <TB3> INFO: dacScan step from 0 .. 19
[11:12:07.436] <TB3> INFO: Test took 22666ms.
[11:12:07.474] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:07.474] <TB3> INFO: dacScan step from 20 .. 39
[11:12:30.188] <TB3> INFO: Test took 22714ms.
[11:12:30.224] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:30.224] <TB3> INFO: dacScan step from 40 .. 59
[11:12:52.916] <TB3> INFO: Test took 22692ms.
[11:12:52.958] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:52.958] <TB3> INFO: dacScan step from 60 .. 79
[11:13:15.690] <TB3> INFO: Test took 22732ms.
[11:13:15.729] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:15.729] <TB3> INFO: dacScan step from 80 .. 99
[11:13:39.567] <TB3> INFO: Test took 23838ms.
[11:13:39.655] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:39.662] <TB3> INFO: dacScan step from 100 .. 119
[11:14:08.797] <TB3> INFO: Test took 29135ms.
[11:14:09.048] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:09.081] <TB3> INFO: dacScan step from 120 .. 139





[11:14:41.384] <TB3> INFO: Test took 32303ms.
[11:14:41.674] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:41.724] <TB3> INFO: dacScan step from 140 .. 159
[11:15:14.245] <TB3> INFO: Test took 32521ms.
[11:15:14.629] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:14.718] <TB3> INFO: dacScan step from 160 .. 165
[11:15:25.860] <TB3> INFO: Test took 11142ms.
[11:15:25.947] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:48.736] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[11:15:48.745] <TB3> INFO: dacScan step from 0 .. 19
[11:16:09.956] <TB3> INFO: Test took 21211ms.
[11:16:09.993] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:09.993] <TB3> INFO: dacScan step from 20 .. 39
[11:16:32.627] <TB3> INFO: Test took 22634ms.
[11:16:32.664] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:32.664] <TB3> INFO: dacScan step from 40 .. 59
[11:16:55.341] <TB3> INFO: Test took 22676ms.
[11:16:55.373] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:55.373] <TB3> INFO: dacScan step from 60 .. 79
[11:17:18.125] <TB3> INFO: Test took 22752ms.
[11:17:18.161] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:18.161] <TB3> INFO: dacScan step from 80 .. 99
[11:17:41.808] <TB3> INFO: Test took 23647ms.
[11:17:41.902] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:41.909] <TB3> INFO: dacScan step from 100 .. 119
[11:18:12.410] <TB3> INFO: Test took 30501ms.
[11:18:12.662] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:12.698] <TB3> INFO: dacScan step from 120 .. 139

[11:18:45.875] <TB3> INFO: Test took 33176ms.
[11:18:46.161] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:46.211] <TB3> INFO: dacScan step from 140 .. 153
[11:19:07.876] <TB3> INFO: Test took 21665ms.
[11:19:08.067] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:29.873] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[11:19:29.882] <TB3> INFO: dacScan step from 0 .. 19
[11:19:52.515] <TB3> INFO: Test took 22633ms.
[11:19:52.556] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:52.556] <TB3> INFO: dacScan step from 20 .. 39
[11:20:13.908] <TB3> INFO: Test took 21351ms.
[11:20:13.941] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:13.941] <TB3> INFO: dacScan step from 40 .. 59
[11:20:36.637] <TB3> INFO: Test took 22696ms.
[11:20:36.678] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:36.678] <TB3> INFO: dacScan step from 60 .. 79
[11:20:59.410] <TB3> INFO: Test took 22732ms.
[11:20:59.448] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:59.448] <TB3> INFO: dacScan step from 80 .. 99
[11:21:23.365] <TB3> INFO: Test took 23917ms.
[11:21:23.457] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:23.463] <TB3> INFO: dacScan step from 100 .. 119
[11:21:54.150] <TB3> INFO: Test took 30687ms.
[11:21:54.405] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:54.440] <TB3> INFO: dacScan step from 120 .. 139





[11:22:27.557] <TB3> INFO: Test took 33117ms.
[11:22:27.846] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:27.895] <TB3> INFO: dacScan step from 140 .. 152
[11:22:48.174] <TB3> INFO: Test took 20279ms.
[11:22:48.346] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:10.344] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[11:23:10.353] <TB3> INFO: dacScan step from 0 .. 19
[11:23:33.040] <TB3> INFO: Test took 22687ms.
[11:23:33.078] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:33.078] <TB3> INFO: dacScan step from 20 .. 39
[11:23:55.811] <TB3> INFO: Test took 22733ms.
[11:23:55.846] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:55.847] <TB3> INFO: dacScan step from 40 .. 59
[11:24:17.105] <TB3> INFO: Test took 21258ms.
[11:24:17.140] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:17.140] <TB3> INFO: dacScan step from 60 .. 79
[11:24:39.909] <TB3> INFO: Test took 22769ms.
[11:24:39.946] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:39.946] <TB3> INFO: dacScan step from 80 .. 99
[11:25:03.844] <TB3> INFO: Test took 23897ms.
[11:25:03.928] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:03.936] <TB3> INFO: dacScan step from 100 .. 119
[11:25:34.751] <TB3> INFO: Test took 30815ms.
[11:25:35.010] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:35.042] <TB3> INFO: dacScan step from 120 .. 139





[11:26:08.037] <TB3> INFO: Test took 32995ms.
[11:26:08.353] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:08.406] <TB3> INFO: dacScan step from 140 .. 153
[11:26:30.387] <TB3> INFO: Test took 21980ms.
[11:26:30.578] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:51.600] <TB3> INFO: PixTestTrim::trimBitTest() done
[11:26:51.602] <TB3> INFO: PixTestTrim::doTest() done, duration: 2453 seconds
[11:26:52.291] <TB3> INFO: ######################################################################
[11:26:52.291] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:26:52.291] <TB3> INFO: ######################################################################
[11:26:55.736] <TB3> INFO: Test took 3444ms.
[11:26:55.761] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:59.420] <TB3> INFO: Test took 3461ms.
[11:26:59.482] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:02.942] <TB3> INFO: Test took 3449ms.
[11:27:03.025] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:03.034] <TB3> INFO: The DUT currently contains the following objects:
[11:27:03.034] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:03.034] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:03.034] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:03.034] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:03.034] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:03.034] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.142] <TB3> INFO: Test took 1108ms.
[11:27:04.145] <TB3> INFO: The DUT currently contains the following objects:
[11:27:04.145] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:04.145] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:04.145] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:04.145] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:04.145] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.145] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.146] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.146] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.146] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:04.146] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.267] <TB3> INFO: Test took 1121ms.
[11:27:05.270] <TB3> INFO: The DUT currently contains the following objects:
[11:27:05.270] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:05.270] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:05.270] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:05.270] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:05.270] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.270] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.271] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.271] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.271] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.271] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:05.271] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.375] <TB3> INFO: Test took 1104ms.
[11:27:06.377] <TB3> INFO: The DUT currently contains the following objects:
[11:27:06.377] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:06.377] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:06.377] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:06.377] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:06.377] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.377] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.377] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.377] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.377] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:06.378] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.485] <TB3> INFO: Test took 1107ms.
[11:27:07.488] <TB3> INFO: The DUT currently contains the following objects:
[11:27:07.488] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:07.488] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:07.488] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:07.488] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:07.488] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.488] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.488] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.488] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.488] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:07.489] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.593] <TB3> INFO: Test took 1104ms.
[11:27:08.594] <TB3> INFO: The DUT currently contains the following objects:
[11:27:08.595] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:08.595] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:08.595] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:08.595] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:08.595] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.595] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.595] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.595] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.595] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.595] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.595] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:08.596] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.705] <TB3> INFO: Test took 1109ms.
[11:27:09.706] <TB3> INFO: The DUT currently contains the following objects:
[11:27:09.706] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:09.706] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:09.706] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:09.706] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:09.706] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:09.707] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.815] <TB3> INFO: Test took 1108ms.
[11:27:10.816] <TB3> INFO: The DUT currently contains the following objects:
[11:27:10.816] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:10.816] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:10.816] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:10.816] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:10.816] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:10.817] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.925] <TB3> INFO: Test took 1108ms.
[11:27:11.926] <TB3> INFO: The DUT currently contains the following objects:
[11:27:11.926] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:11.926] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:11.926] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:11.926] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:11.926] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.926] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.927] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.927] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.927] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:11.927] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.032] <TB3> INFO: Test took 1105ms.
[11:27:13.033] <TB3> INFO: The DUT currently contains the following objects:
[11:27:13.033] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:13.033] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:13.033] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:13.033] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:13.033] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.033] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.033] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.033] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:13.034] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.143] <TB3> INFO: Test took 1109ms.
[11:27:14.144] <TB3> INFO: The DUT currently contains the following objects:
[11:27:14.145] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:14.145] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:14.146] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:14.146] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:14.146] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:14.146] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.251] <TB3> INFO: Test took 1105ms.
[11:27:15.252] <TB3> INFO: The DUT currently contains the following objects:
[11:27:15.252] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:15.252] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:15.252] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:15.252] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:15.252] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.252] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:15.253] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.360] <TB3> INFO: Test took 1107ms.
[11:27:16.361] <TB3> INFO: The DUT currently contains the following objects:
[11:27:16.361] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:16.361] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:16.361] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:16.361] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:16.361] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.361] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.361] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.361] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.361] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.361] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:16.362] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.470] <TB3> INFO: Test took 1108ms.
[11:27:17.471] <TB3> INFO: The DUT currently contains the following objects:
[11:27:17.471] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:17.471] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:17.471] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:17.471] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:17.471] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:17.472] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.580] <TB3> INFO: Test took 1108ms.
[11:27:18.581] <TB3> INFO: The DUT currently contains the following objects:
[11:27:18.581] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:18.581] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:18.581] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:18.581] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:18.581] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.581] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.581] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.581] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.581] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.581] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.581] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.581] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.581] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.582] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.582] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.582] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.582] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.582] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.582] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:18.582] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.689] <TB3> INFO: Test took 1107ms.
[11:27:19.691] <TB3> INFO: The DUT currently contains the following objects:
[11:27:19.691] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[11:27:19.691] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:27:19.691] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:27:19.691] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:27:19.691] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.691] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.691] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.691] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.691] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.691] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:19.692] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:27:20.798] <TB3> INFO: Test took 1106ms.
[11:27:20.803] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:31:02.683] <TB3> INFO: Test took 221880ms.
[11:31:04.218] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:46.866] <TB3> INFO: Test took 222648ms.
[11:34:48.764] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.773] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.780] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.787] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.794] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.801] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.808] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.816] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.823] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.830] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.838] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.846] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.854] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.861] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.868] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.875] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:48.882] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:34:48.891] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:34:48.899] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:34:48.908] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:34:48.955] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:34:48.956] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:34:48.957] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:34:48.957] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:34:48.957] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:34:48.957] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:34:48.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:34:48.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:34:48.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:34:48.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:34:48.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:34:48.974] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:34:48.974] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:34:48.975] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:34:48.975] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:34:48.975] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:34:52.413] <TB3> INFO: Test took 3435ms.
[11:34:56.148] <TB3> INFO: Test took 3451ms.
[11:34:59.861] <TB3> INFO: Test took 3439ms.
[11:35:00.150] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:01.071] <TB3> INFO: Test took 921ms.
[11:35:01.075] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:02.181] <TB3> INFO: Test took 1107ms.
[11:35:02.184] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:03.288] <TB3> INFO: Test took 1104ms.
[11:35:03.291] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:04.399] <TB3> INFO: Test took 1108ms.
[11:35:04.403] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:05.506] <TB3> INFO: Test took 1103ms.
[11:35:05.508] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:06.609] <TB3> INFO: Test took 1101ms.
[11:35:06.611] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:07.713] <TB3> INFO: Test took 1102ms.
[11:35:07.716] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:08.816] <TB3> INFO: Test took 1100ms.
[11:35:08.818] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:09.921] <TB3> INFO: Test took 1103ms.
[11:35:09.923] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:11.024] <TB3> INFO: Test took 1101ms.
[11:35:11.026] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:12.128] <TB3> INFO: Test took 1102ms.
[11:35:12.130] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:13.233] <TB3> INFO: Test took 1103ms.
[11:35:13.235] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:14.336] <TB3> INFO: Test took 1101ms.
[11:35:14.339] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:15.440] <TB3> INFO: Test took 1101ms.
[11:35:15.443] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:16.545] <TB3> INFO: Test took 1102ms.
[11:35:16.548] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:17.649] <TB3> INFO: Test took 1102ms.
[11:35:17.651] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:18.753] <TB3> INFO: Test took 1102ms.
[11:35:18.755] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:19.857] <TB3> INFO: Test took 1102ms.
[11:35:19.859] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:20.961] <TB3> INFO: Test took 1102ms.
[11:35:20.965] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:22.065] <TB3> INFO: Test took 1101ms.
[11:35:22.068] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:23.168] <TB3> INFO: Test took 1100ms.
[11:35:23.170] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:24.272] <TB3> INFO: Test took 1102ms.
[11:35:24.275] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:25.376] <TB3> INFO: Test took 1101ms.
[11:35:25.379] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:26.480] <TB3> INFO: Test took 1101ms.
[11:35:26.483] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:27.590] <TB3> INFO: Test took 1107ms.
[11:35:27.595] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:28.696] <TB3> INFO: Test took 1102ms.
[11:35:28.699] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:29.800] <TB3> INFO: Test took 1101ms.
[11:35:29.803] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:30.904] <TB3> INFO: Test took 1101ms.
[11:35:30.907] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:32.008] <TB3> INFO: Test took 1101ms.
[11:35:32.010] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:33.111] <TB3> INFO: Test took 1101ms.
[11:35:33.113] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:34.215] <TB3> INFO: Test took 1102ms.
[11:35:34.217] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:35:35.318] <TB3> INFO: Test took 1101ms.
[11:35:35.838] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 523 seconds
[11:35:35.838] <TB3> INFO: PH scale (per ROC): 81 85 80 93 87 93 84 77 80 80 79 84 88 82 77 80
[11:35:35.838] <TB3> INFO: PH offset (per ROC): 162 155 161 154 154 166 159 173 155 162 165 161 161 188 157 142
[11:35:36.086] <TB3> INFO: ######################################################################
[11:35:36.086] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:35:36.086] <TB3> INFO: ######################################################################
[11:35:36.098] <TB3> INFO: scanning low vcal = 10
[11:35:39.957] <TB3> INFO: Test took 3859ms.
[11:35:39.961] <TB3> INFO: scanning low vcal = 20
[11:35:43.760] <TB3> INFO: Test took 3799ms.
[11:35:43.763] <TB3> INFO: scanning low vcal = 30
[11:35:47.554] <TB3> INFO: Test took 3791ms.
[11:35:47.562] <TB3> INFO: scanning low vcal = 40
[11:35:51.813] <TB3> INFO: Test took 4251ms.
[11:35:51.873] <TB3> INFO: scanning low vcal = 50
[11:35:56.102] <TB3> INFO: Test took 4229ms.
[11:35:56.161] <TB3> INFO: scanning low vcal = 60
[11:36:00.413] <TB3> INFO: Test took 4252ms.
[11:36:00.473] <TB3> INFO: scanning low vcal = 70
[11:36:04.720] <TB3> INFO: Test took 4247ms.
[11:36:04.780] <TB3> INFO: scanning low vcal = 80
[11:36:08.998] <TB3> INFO: Test took 4218ms.
[11:36:09.058] <TB3> INFO: scanning low vcal = 90
[11:36:13.279] <TB3> INFO: Test took 4220ms.
[11:36:13.338] <TB3> INFO: scanning low vcal = 100
[11:36:17.566] <TB3> INFO: Test took 4228ms.
[11:36:17.624] <TB3> INFO: scanning low vcal = 110
[11:36:21.893] <TB3> INFO: Test took 4269ms.
[11:36:21.952] <TB3> INFO: scanning low vcal = 120
[11:36:26.187] <TB3> INFO: Test took 4235ms.
[11:36:26.258] <TB3> INFO: scanning low vcal = 130
[11:36:30.489] <TB3> INFO: Test took 4231ms.
[11:36:30.549] <TB3> INFO: scanning low vcal = 140
[11:36:34.867] <TB3> INFO: Test took 4318ms.
[11:36:34.930] <TB3> INFO: scanning low vcal = 150
[11:36:39.236] <TB3> INFO: Test took 4306ms.
[11:36:39.300] <TB3> INFO: scanning low vcal = 160
[11:36:43.684] <TB3> INFO: Test took 4384ms.
[11:36:43.762] <TB3> INFO: scanning low vcal = 170
[11:36:48.123] <TB3> INFO: Test took 4360ms.
[11:36:48.178] <TB3> INFO: scanning low vcal = 180
[11:36:52.566] <TB3> INFO: Test took 4388ms.
[11:36:52.636] <TB3> INFO: scanning low vcal = 190
[11:36:57.075] <TB3> INFO: Test took 4439ms.
[11:36:57.165] <TB3> INFO: scanning low vcal = 200
[11:37:01.531] <TB3> INFO: Test took 4366ms.
[11:37:01.586] <TB3> INFO: scanning low vcal = 210
[11:37:05.873] <TB3> INFO: Test took 4287ms.
[11:37:05.932] <TB3> INFO: scanning low vcal = 220
[11:37:10.271] <TB3> INFO: Test took 4339ms.
[11:37:10.332] <TB3> INFO: scanning low vcal = 230
[11:37:14.735] <TB3> INFO: Test took 4403ms.
[11:37:14.826] <TB3> INFO: scanning low vcal = 240
[11:37:19.298] <TB3> INFO: Test took 4472ms.
[11:37:19.353] <TB3> INFO: scanning low vcal = 250
[11:37:23.755] <TB3> INFO: Test took 4402ms.
[11:37:23.814] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[11:37:28.178] <TB3> INFO: Test took 4364ms.
[11:37:28.233] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[11:37:32.463] <TB3> INFO: Test took 4230ms.
[11:37:32.518] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[11:37:36.765] <TB3> INFO: Test took 4247ms.
[11:37:36.846] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[11:37:41.051] <TB3> INFO: Test took 4205ms.
[11:37:41.123] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:37:45.321] <TB3> INFO: Test took 4198ms.
[11:37:45.889] <TB3> INFO: PixTestGainPedestal::measure() done
[11:38:18.598] <TB3> INFO: PixTestGainPedestal::fit() done
[11:38:18.598] <TB3> INFO: non-linearity mean: 0.957 0.947 0.955 0.959 0.954 0.954 0.956 0.949 0.956 0.955 0.954 0.957 0.957 0.958 0.957 0.957
[11:38:18.598] <TB3> INFO: non-linearity RMS: 0.005 0.006 0.005 0.005 0.005 0.006 0.006 0.007 0.005 0.006 0.006 0.007 0.006 0.006 0.006 0.005
[11:38:18.598] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[11:38:18.616] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[11:38:18.635] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[11:38:18.653] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[11:38:18.671] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[11:38:18.689] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[11:38:18.707] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[11:38:18.725] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[11:38:18.743] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[11:38:18.762] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[11:38:18.780] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[11:38:18.798] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[11:38:18.816] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[11:38:18.834] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[11:38:18.852] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[11:38:18.870] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2073_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[11:38:18.888] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 162 seconds
[11:38:18.894] <TB3> INFO: enter test to run
[11:38:18.895] <TB3> INFO: test: exit no parameter change
[11:38:19.352] <TB3> QUIET: Connection to board 170 closed.
[11:38:19.431] <TB3> INFO: pXar: this is the end, my friend