[10:27:14.166] <TB2> INFO: *** Welcome to pxar ***
[10:27:14.166] <TB2> INFO: *** Today: 2015/08/13
[10:27:14.166] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C15.dat
[10:27:14.168] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//tbmParameters_C0b.dat
[10:27:14.168] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//defaultMaskFile.dat
[10:27:14.168] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters_C15.dat
[10:27:14.245] <TB2> INFO: clk: 4
[10:27:14.245] <TB2> INFO: ctr: 4
[10:27:14.245] <TB2> INFO: sda: 19
[10:27:14.245] <TB2> INFO: tin: 9
[10:27:14.245] <TB2> INFO: level: 15
[10:27:14.245] <TB2> INFO: triggerdelay: 0
[10:27:14.245] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[10:27:14.245] <TB2> INFO: Log level: INFO
[10:27:14.252] <TB2> INFO: Found DTB DTB_WXC55Z
[10:27:14.260] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[10:27:14.263] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[10:27:14.266] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[10:27:15.793] <TB2> INFO: DUT info:
[10:27:15.793] <TB2> INFO: The DUT currently contains the following objects:
[10:27:15.793] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:15.793] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:27:15.793] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:27:15.793] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:27:15.793] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.793] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.794] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:15.794] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:27:16.195] <TB2> INFO: enter 'restricted' command line mode
[10:27:16.195] <TB2> INFO: enter test to run
[10:27:16.195] <TB2> INFO: test: pretest no parameter change
[10:27:16.195] <TB2> INFO: running: pretest
[10:27:16.203] <TB2> INFO: ######################################################################
[10:27:16.203] <TB2> INFO: PixTestPretest::doTest()
[10:27:16.204] <TB2> INFO: ######################################################################
[10:27:16.206] <TB2> INFO: ----------------------------------------------------------------------
[10:27:16.206] <TB2> INFO: PixTestPretest::programROC()
[10:27:16.206] <TB2> INFO: ----------------------------------------------------------------------
[10:27:34.223] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:27:34.229] <TB2> INFO: IA differences per ROC: 20.1 20.9 18.5 17.7 18.5 19.3 17.7 18.5 20.9 18.5 18.5 20.1 18.5 16.9 16.9 17.7
[10:27:34.302] <TB2> INFO: ----------------------------------------------------------------------
[10:27:34.302] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:27:34.302] <TB2> INFO: ----------------------------------------------------------------------
[10:27:53.872] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 402.8 mA = 25.175 mA/ROC
[10:27:53.875] <TB2> INFO: ----------------------------------------------------------------------
[10:27:53.875] <TB2> INFO: PixTestPretest::findWorkingPixel()
[10:27:53.875] <TB2> INFO: ----------------------------------------------------------------------
[10:28:02.268] <TB2> INFO: Test took 8387ms.
[10:28:02.556] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:28:02.593] <TB2> INFO: ----------------------------------------------------------------------
[10:28:02.593] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[10:28:02.593] <TB2> INFO: ----------------------------------------------------------------------
[10:28:11.542] <TB2> INFO: Test took 8941ms.
[10:28:11.851] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[10:28:11.851] <TB2> INFO: CalDel: 142 130 148 127 138 133 144 134 132 127 138 123 137 129 141 142
[10:28:11.852] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:28:11.855] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C0.dat
[10:28:11.855] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C1.dat
[10:28:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C2.dat
[10:28:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C3.dat
[10:28:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C4.dat
[10:28:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C5.dat
[10:28:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C6.dat
[10:28:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C7.dat
[10:28:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C8.dat
[10:28:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C9.dat
[10:28:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C10.dat
[10:28:11.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C11.dat
[10:28:11.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C12.dat
[10:28:11.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C13.dat
[10:28:11.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C14.dat
[10:28:11.859] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters_C15.dat
[10:28:11.859] <TB2> INFO: PixTestPretest::doTest() done, duration: 55 seconds
[10:28:11.959] <TB2> INFO: enter test to run
[10:28:11.959] <TB2> INFO: test: fulltest no parameter change
[10:28:11.959] <TB2> INFO: running: fulltest
[10:28:11.959] <TB2> INFO: ######################################################################
[10:28:11.959] <TB2> INFO: PixTestFullTest::doTest()
[10:28:11.959] <TB2> INFO: ######################################################################
[10:28:11.960] <TB2> INFO: ######################################################################
[10:28:11.960] <TB2> INFO: PixTestAlive::doTest()
[10:28:11.960] <TB2> INFO: ######################################################################
[10:28:11.962] <TB2> INFO: ----------------------------------------------------------------------
[10:28:11.962] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:28:11.962] <TB2> INFO: ----------------------------------------------------------------------
[10:28:15.425] <TB2> INFO: Test took 3462ms.
[10:28:15.450] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:15.678] <TB2> INFO: PixTestAlive::aliveTest() done
[10:28:15.678] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:28:15.681] <TB2> INFO: ----------------------------------------------------------------------
[10:28:15.681] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:28:15.681] <TB2> INFO: ----------------------------------------------------------------------
[10:28:18.420] <TB2> INFO: Test took 2738ms.
[10:28:18.423] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:18.424] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:28:18.638] <TB2> INFO: PixTestAlive::maskTest() done
[10:28:18.638] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:28:18.639] <TB2> INFO: ----------------------------------------------------------------------
[10:28:18.639] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:28:18.639] <TB2> INFO: ----------------------------------------------------------------------
[10:28:22.066] <TB2> INFO: Test took 3426ms.
[10:28:22.092] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:22.324] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[10:28:22.324] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:28:22.324] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[10:28:22.338] <TB2> INFO: ######################################################################
[10:28:22.338] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:28:22.338] <TB2> INFO: ######################################################################
[10:28:22.341] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[10:28:22.356] <TB2> INFO: dacScan step from 0 .. 29
[10:28:43.906] <TB2> INFO: Test took 21550ms.
[10:28:43.940] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:43.940] <TB2> INFO: dacScan step from 30 .. 59
[10:29:07.543] <TB2> INFO: Test took 23603ms.
[10:29:07.634] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:07.647] <TB2> INFO: dacScan step from 60 .. 89
[10:29:39.518] <TB2> INFO: Test took 31872ms.
[10:29:39.883] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:39.998] <TB2> INFO: dacScan step from 90 .. 119
[10:30:11.174] <TB2> INFO: Test took 31176ms.
[10:30:11.502] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:11.588] <TB2> INFO: dacScan step from 120 .. 149
[10:30:38.075] <TB2> INFO: Test took 26487ms.
[10:30:38.298] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:02.336] <TB2> INFO: PixTestBBMap::doTest() done, duration: 159 seconds
[10:31:02.336] <TB2> INFO: number of dead bumps (per ROC): 3 0 3 0 0 0 0 0 0 0 0 2 0 2 2 14
[10:31:02.336] <TB2> INFO: separation cut (per ROC): 101 108 106 91 102 98 77 97 95 96 93 73 111 70 91 75
[10:31:02.414] <TB2> INFO: ######################################################################
[10:31:02.414] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[10:31:02.414] <TB2> INFO: ######################################################################
[10:31:02.414] <TB2> INFO: ----------------------------------------------------------------------
[10:31:02.414] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[10:31:02.414] <TB2> INFO: ----------------------------------------------------------------------
[10:31:02.414] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[10:31:02.423] <TB2> INFO: dacScan step from 0 .. 3
[10:31:22.927] <TB2> INFO: Test took 20504ms.
[10:31:22.955] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:22.955] <TB2> INFO: dacScan step from 4 .. 7
[10:31:43.581] <TB2> INFO: Test took 20626ms.
[10:31:43.613] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:43.613] <TB2> INFO: dacScan step from 8 .. 11
[10:32:04.077] <TB2> INFO: Test took 20464ms.
[10:32:04.104] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:04.104] <TB2> INFO: dacScan step from 12 .. 15
[10:32:24.577] <TB2> INFO: Test took 20473ms.
[10:32:24.608] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:24.609] <TB2> INFO: dacScan step from 16 .. 19
[10:32:45.144] <TB2> INFO: Test took 20535ms.
[10:32:45.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:45.177] <TB2> INFO: dacScan step from 20 .. 23
[10:33:05.536] <TB2> INFO: Test took 20359ms.
[10:33:05.569] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:05.569] <TB2> INFO: dacScan step from 24 .. 27
[10:33:25.660] <TB2> INFO: Test took 20091ms.
[10:33:25.689] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:25.689] <TB2> INFO: dacScan step from 28 .. 31
[10:33:45.869] <TB2> INFO: Test took 20180ms.
[10:33:45.902] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:45.902] <TB2> INFO: dacScan step from 32 .. 35
[10:34:06.174] <TB2> INFO: Test took 20272ms.
[10:34:06.202] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:06.202] <TB2> INFO: dacScan step from 36 .. 39
[10:34:26.500] <TB2> INFO: Test took 20298ms.
[10:34:26.530] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:26.530] <TB2> INFO: dacScan step from 40 .. 43
[10:34:46.768] <TB2> INFO: Test took 20238ms.
[10:34:46.800] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:46.800] <TB2> INFO: dacScan step from 44 .. 47
[10:35:06.904] <TB2> INFO: Test took 20104ms.
[10:35:06.938] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:06.938] <TB2> INFO: dacScan step from 48 .. 51
[10:35:26.191] <TB2> INFO: Test took 19252ms.
[10:35:26.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:26.226] <TB2> INFO: dacScan step from 52 .. 55
[10:35:45.609] <TB2> INFO: Test took 19383ms.
[10:35:45.643] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:45.643] <TB2> INFO: dacScan step from 56 .. 59
[10:36:04.746] <TB2> INFO: Test took 19102ms.
[10:36:04.775] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:04.775] <TB2> INFO: dacScan step from 60 .. 63
[10:36:23.805] <TB2> INFO: Test took 19030ms.
[10:36:23.834] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:23.834] <TB2> INFO: dacScan step from 64 .. 67
[10:36:43.582] <TB2> INFO: Test took 19748ms.
[10:36:43.613] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:43.613] <TB2> INFO: dacScan step from 68 .. 71
[10:37:03.996] <TB2> INFO: Test took 20383ms.
[10:37:04.042] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:04.043] <TB2> INFO: dacScan step from 72 .. 75
[10:37:23.982] <TB2> INFO: Test took 19939ms.
[10:37:24.036] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:24.038] <TB2> INFO: dacScan step from 76 .. 79
[10:37:45.668] <TB2> INFO: Test took 21629ms.
[10:37:45.738] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:45.741] <TB2> INFO: dacScan step from 80 .. 83
[10:38:10.116] <TB2> INFO: Test took 24375ms.
[10:38:10.216] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:10.220] <TB2> INFO: dacScan step from 84 .. 87
[10:38:36.959] <TB2> INFO: Test took 26739ms.
[10:38:37.092] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:37.101] <TB2> INFO: dacScan step from 88 .. 91
[10:39:05.341] <TB2> INFO: Test took 28240ms.
[10:39:05.490] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:05.500] <TB2> INFO: dacScan step from 92 .. 95
[10:39:35.719] <TB2> INFO: Test took 30219ms.
[10:39:35.897] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:35.907] <TB2> INFO: dacScan step from 96 .. 99
[10:40:06.596] <TB2> INFO: Test took 30689ms.
[10:40:06.803] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:06.814] <TB2> INFO: dacScan step from 100 .. 103
[10:40:37.931] <TB2> INFO: Test took 31116ms.
[10:40:38.152] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:38.164] <TB2> INFO: dacScan step from 104 .. 107





[10:41:09.888] <TB2> INFO: Test took 31724ms.
[10:41:10.118] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:10.129] <TB2> INFO: dacScan step from 108 .. 111





[10:41:42.557] <TB2> INFO: Test took 32428ms.
[10:41:42.799] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:42.810] <TB2> INFO: dacScan step from 112 .. 115


[10:42:14.754] <TB2> INFO: Test took 31943ms.
[10:42:14.981] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:14.995] <TB2> INFO: dacScan step from 116 .. 119


[10:42:47.317] <TB2> INFO: Test took 32322ms.
[10:42:47.544] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:47.556] <TB2> INFO: dacScan step from 120 .. 123





[10:43:19.935] <TB2> INFO: Test took 32379ms.
[10:43:20.160] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:20.173] <TB2> INFO: dacScan step from 124 .. 127





[10:43:51.957] <TB2> INFO: Test took 31784ms.
[10:43:52.205] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:52.221] <TB2> INFO: dacScan step from 128 .. 131



[10:44:25.005] <TB2> INFO: Test took 32783ms.
[10:44:25.245] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:25.259] <TB2> INFO: dacScan step from 132 .. 135



[10:44:57.817] <TB2> INFO: Test took 32558ms.
[10:44:58.045] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:58.057] <TB2> INFO: dacScan step from 136 .. 139


[10:45:29.668] <TB2> INFO: Test took 31611ms.
[10:45:29.908] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:29.921] <TB2> INFO: dacScan step from 140 .. 143


[10:45:59.633] <TB2> INFO: Test took 29712ms.
[10:45:59.854] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:59.865] <TB2> INFO: dacScan step from 144 .. 147


[10:46:31.605] <TB2> INFO: Test took 31739ms.
[10:46:31.843] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:31.855] <TB2> INFO: dacScan step from 148 .. 149
[10:46:46.642] <TB2> INFO: Test took 14787ms.
[10:46:46.753] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:46.760] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:48.200] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:49.622] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:51.064] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:52.453] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:53.817] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:55.201] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:56.577] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:57.933] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:46:59.262] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:47:00.602] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:47:01.954] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:47:03.351] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:47:04.665] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:47:06.064] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:47:07.395] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:47:08.776] <TB2> INFO: PixTestScurves::scurves() done
[10:47:08.776] <TB2> INFO: Vcal mean: 88.48 100.02 100.07 91.49 84.41 98.41 81.85 85.11 99.92 94.14 89.41 77.42 104.07 75.53 102.44 88.61
[10:47:08.776] <TB2> INFO: Vcal RMS: 6.03 5.76 6.17 4.96 5.54 5.25 4.78 5.31 5.91 5.84 5.33 4.86 5.67 4.16 6.30 5.18
[10:47:08.776] <TB2> INFO: PixTestScurves::fullTest() done, duration: 966 seconds
[10:47:08.850] <TB2> INFO: ######################################################################
[10:47:08.850] <TB2> INFO: PixTestTrim::doTest()
[10:47:08.850] <TB2> INFO: ######################################################################
[10:47:08.851] <TB2> INFO: ----------------------------------------------------------------------
[10:47:08.851] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[10:47:08.851] <TB2> INFO: ----------------------------------------------------------------------
[10:47:08.938] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:47:08.938] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:47:08.947] <TB2> INFO: dacScan step from 0 .. 19
[10:47:24.944] <TB2> INFO: Test took 15997ms.
[10:47:24.965] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:24.965] <TB2> INFO: dacScan step from 20 .. 39
[10:47:40.969] <TB2> INFO: Test took 16004ms.
[10:47:40.995] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:40.995] <TB2> INFO: dacScan step from 40 .. 59
[10:47:56.066] <TB2> INFO: Test took 15070ms.
[10:47:56.086] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:56.087] <TB2> INFO: dacScan step from 60 .. 79
[10:48:12.023] <TB2> INFO: Test took 15936ms.
[10:48:12.050] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:12.050] <TB2> INFO: dacScan step from 80 .. 99
[10:48:27.507] <TB2> INFO: Test took 15457ms.
[10:48:27.554] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:27.560] <TB2> INFO: dacScan step from 100 .. 119
[10:48:47.326] <TB2> INFO: Test took 19766ms.
[10:48:47.469] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:47.492] <TB2> INFO: dacScan step from 120 .. 139
[10:49:08.606] <TB2> INFO: Test took 21114ms.
[10:49:08.764] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:08.794] <TB2> INFO: dacScan step from 140 .. 159
[10:49:24.940] <TB2> INFO: Test took 16145ms.
[10:49:25.079] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:46.591] <TB2> INFO: ROC 0 VthrComp = 96
[10:49:46.592] <TB2> INFO: ROC 1 VthrComp = 104
[10:49:46.592] <TB2> INFO: ROC 2 VthrComp = 101
[10:49:46.592] <TB2> INFO: ROC 3 VthrComp = 99
[10:49:46.592] <TB2> INFO: ROC 4 VthrComp = 91
[10:49:46.592] <TB2> INFO: ROC 5 VthrComp = 104
[10:49:46.592] <TB2> INFO: ROC 6 VthrComp = 85
[10:49:46.592] <TB2> INFO: ROC 7 VthrComp = 92
[10:49:46.593] <TB2> INFO: ROC 8 VthrComp = 105
[10:49:46.593] <TB2> INFO: ROC 9 VthrComp = 101
[10:49:46.593] <TB2> INFO: ROC 10 VthrComp = 95
[10:49:46.593] <TB2> INFO: ROC 11 VthrComp = 79
[10:49:46.593] <TB2> INFO: ROC 12 VthrComp = 111
[10:49:46.593] <TB2> INFO: ROC 13 VthrComp = 82
[10:49:46.593] <TB2> INFO: ROC 14 VthrComp = 98
[10:49:46.594] <TB2> INFO: ROC 15 VthrComp = 93
[10:49:46.594] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:49:46.594] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:49:46.603] <TB2> INFO: dacScan step from 0 .. 19
[10:50:02.181] <TB2> INFO: Test took 15577ms.
[10:50:02.204] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:02.204] <TB2> INFO: dacScan step from 20 .. 39
[10:50:18.038] <TB2> INFO: Test took 15834ms.
[10:50:18.071] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:18.073] <TB2> INFO: dacScan step from 40 .. 59
[10:50:37.866] <TB2> INFO: Test took 19792ms.
[10:50:38.016] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:38.053] <TB2> INFO: dacScan step from 60 .. 79
[10:50:57.573] <TB2> INFO: Test took 19520ms.
[10:50:57.728] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:57.788] <TB2> INFO: dacScan step from 80 .. 99
[10:51:16.937] <TB2> INFO: Test took 19149ms.
[10:51:17.095] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:17.149] <TB2> INFO: dacScan step from 100 .. 119
[10:51:37.895] <TB2> INFO: Test took 20746ms.
[10:51:38.069] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:38.125] <TB2> INFO: dacScan step from 120 .. 139
[10:51:58.793] <TB2> INFO: Test took 20668ms.
[10:51:58.976] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:59.065] <TB2> INFO: dacScan step from 140 .. 159
[10:52:18.210] <TB2> INFO: Test took 19144ms.
[10:52:18.378] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:42.859] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.3419 for pixel 0/12 mean/min/max = 45.1991/31.0174/59.3808
[10:52:42.859] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.4635 for pixel 0/5 mean/min/max = 46.6652/32.8133/60.5172
[10:52:42.860] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 62.4822 for pixel 21/1 mean/min/max = 47.5122/32.4729/62.5514
[10:52:42.860] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 56.6859 for pixel 51/50 mean/min/max = 44.056/31.3917/56.7202
[10:52:42.860] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 59.5405 for pixel 6/58 mean/min/max = 45.8803/32.1799/59.5807
[10:52:42.860] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.0265 for pixel 1/27 mean/min/max = 46.5773/34.0644/59.0902
[10:52:42.861] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.7721 for pixel 0/12 mean/min/max = 46.4041/32.9745/59.8337
[10:52:42.861] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.9873 for pixel 0/74 mean/min/max = 45.3989/31.7496/59.0483
[10:52:42.861] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 60.7097 for pixel 51/79 mean/min/max = 46.961/33.2035/60.7185
[10:52:42.862] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.9384 for pixel 5/68 mean/min/max = 45.9735/32.0046/59.9423
[10:52:42.862] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.3835 for pixel 14/79 mean/min/max = 45.0759/31.725/58.4268
[10:52:42.862] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 62.0269 for pixel 15/1 mean/min/max = 48.0482/34.0545/62.0419
[10:52:42.862] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.1285 for pixel 24/76 mean/min/max = 47.5132/33.7723/61.2541
[10:52:42.863] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.0259 for pixel 17/1 mean/min/max = 44.1285/32.1108/56.1462
[10:52:42.863] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 64.8985 for pixel 1/6 mean/min/max = 48.1859/31.3225/65.0493
[10:52:42.863] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.105 for pixel 51/14 mean/min/max = 45.5848/33.0619/58.1077
[10:52:42.863] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:54:23.776] <TB2> INFO: Test took 100913ms.
[10:54:25.321] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:54:25.329] <TB2> INFO: dacScan step from 0 .. 19
[10:54:48.475] <TB2> INFO: Test took 23145ms.
[10:54:48.525] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:48.527] <TB2> INFO: dacScan step from 20 .. 39
[10:55:18.395] <TB2> INFO: Test took 29868ms.
[10:55:18.613] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:18.641] <TB2> INFO: dacScan step from 40 .. 59


[10:55:55.016] <TB2> INFO: Test took 36375ms.
[10:55:55.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:55.350] <TB2> INFO: dacScan step from 60 .. 79




[10:56:31.329] <TB2> INFO: Test took 35979ms.
[10:56:31.628] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:31.688] <TB2> INFO: dacScan step from 80 .. 99





[10:57:07.580] <TB2> INFO: Test took 35892ms.
[10:57:07.885] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:07.948] <TB2> INFO: dacScan step from 100 .. 119





[10:57:43.632] <TB2> INFO: Test took 35684ms.
[10:57:43.937] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:43.998] <TB2> INFO: dacScan step from 120 .. 139





[10:58:18.575] <TB2> INFO: Test took 34577ms.
[10:58:18.852] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:18.912] <TB2> INFO: dacScan step from 140 .. 159



[10:58:53.075] <TB2> INFO: Test took 34163ms.
[10:58:53.352] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:53.417] <TB2> INFO: dacScan step from 160 .. 179



[10:59:28.682] <TB2> INFO: Test took 35265ms.
[10:59:28.957] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:29.010] <TB2> INFO: dacScan step from 180 .. 199


[11:00:04.327] <TB2> INFO: Test took 35317ms.
[11:00:04.625] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:30.225] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.060903 .. 59.387032
[11:00:30.310] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 69 (20) hits flags = 16 (plus default)
[11:00:30.319] <TB2> INFO: dacScan step from 0 .. 19
[11:00:43.950] <TB2> INFO: Test took 13631ms.
[11:00:43.971] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:43.971] <TB2> INFO: dacScan step from 20 .. 39
[11:00:58.834] <TB2> INFO: Test took 14863ms.
[11:00:58.919] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:58.934] <TB2> INFO: dacScan step from 40 .. 59
[11:01:16.562] <TB2> INFO: Test took 17628ms.
[11:01:16.733] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:16.785] <TB2> INFO: dacScan step from 60 .. 69
[11:01:27.432] <TB2> INFO: Test took 10647ms.
[11:01:27.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:44.725] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 14.855709 .. 59.387032
[11:01:44.800] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 69 (20) hits flags = 16 (plus default)
[11:01:44.808] <TB2> INFO: dacScan step from 4 .. 23
[11:01:59.150] <TB2> INFO: Test took 14341ms.
[11:01:59.172] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:59.172] <TB2> INFO: dacScan step from 24 .. 43
[11:02:14.797] <TB2> INFO: Test took 15625ms.
[11:02:14.905] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:14.935] <TB2> INFO: dacScan step from 44 .. 63
[11:02:32.538] <TB2> INFO: Test took 17603ms.
[11:02:32.698] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:32.757] <TB2> INFO: dacScan step from 64 .. 69
[11:02:39.832] <TB2> INFO: Test took 7075ms.
[11:02:39.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:57.287] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 18.853003 .. 59.387032
[11:02:57.366] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 69 (20) hits flags = 16 (plus default)
[11:02:57.375] <TB2> INFO: dacScan step from 8 .. 27
[11:03:12.076] <TB2> INFO: Test took 14701ms.
[11:03:12.097] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:12.098] <TB2> INFO: dacScan step from 28 .. 47
[11:03:28.662] <TB2> INFO: Test took 16564ms.
[11:03:28.846] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:28.911] <TB2> INFO: dacScan step from 48 .. 67
[11:03:46.801] <TB2> INFO: Test took 17890ms.
[11:03:47.025] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:47.112] <TB2> INFO: dacScan step from 68 .. 69
[11:03:51.499] <TB2> INFO: Test took 4387ms.
[11:03:51.519] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:10.341] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 22.500012 .. 59.387032
[11:04:10.428] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 12 .. 69 (20) hits flags = 16 (plus default)
[11:04:10.437] <TB2> INFO: dacScan step from 12 .. 31
[11:04:23.569] <TB2> INFO: Test took 13132ms.
[11:04:23.601] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:23.604] <TB2> INFO: dacScan step from 32 .. 51
[11:04:40.214] <TB2> INFO: Test took 16610ms.
[11:04:40.360] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:40.402] <TB2> INFO: dacScan step from 52 .. 69
[11:04:57.074] <TB2> INFO: Test took 16672ms.
[11:04:57.239] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:15.303] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:05:15.303] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:05:15.312] <TB2> INFO: dacScan step from 15 .. 34
[11:05:37.331] <TB2> INFO: Test took 22018ms.
[11:05:37.400] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:37.412] <TB2> INFO: dacScan step from 35 .. 54





[11:06:09.591] <TB2> INFO: Test took 32179ms.
[11:06:09.888] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:09.952] <TB2> INFO: dacScan step from 55 .. 55
[11:06:14.206] <TB2> INFO: Test took 4254ms.
[11:06:14.221] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:29.686] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:06:29.687] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:06:29.687] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:06:29.687] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:06:29.687] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:06:29.687] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:06:29.687] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:06:29.687] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:06:29.688] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:06:29.688] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:06:29.688] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:06:29.688] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:06:29.688] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:06:29.688] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:06:29.688] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:06:29.689] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:06:29.689] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C0.dat
[11:06:29.699] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C1.dat
[11:06:29.709] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C2.dat
[11:06:29.719] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C3.dat
[11:06:29.729] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C4.dat
[11:06:29.739] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C5.dat
[11:06:29.749] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C6.dat
[11:06:29.759] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C7.dat
[11:06:29.769] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C8.dat
[11:06:29.779] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C9.dat
[11:06:29.789] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C10.dat
[11:06:29.799] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C11.dat
[11:06:29.809] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C12.dat
[11:06:29.819] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C13.dat
[11:06:29.829] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C14.dat
[11:06:29.839] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//trimParameters35_C15.dat
[11:06:29.848] <TB2> INFO: PixTestTrim::trimTest() done
[11:06:29.848] <TB2> INFO: vtrim: 113 114 125 94 111 119 107 106 122 117 101 112 126 97 123 97
[11:06:29.848] <TB2> INFO: vthrcomp: 96 104 101 99 91 104 85 92 105 101 95 79 111 82 98 93
[11:06:29.849] <TB2> INFO: vcal mean: 34.96 35.07 35.06 35.00 35.05 35.08 35.04 35.02 35.11 35.04 35.03 35.08 35.01 35.04 35.03 35.03
[11:06:29.849] <TB2> INFO: vcal RMS: 1.01 0.96 1.09 0.97 0.96 1.00 1.06 0.96 0.99 1.04 1.01 1.01 0.99 0.97 1.23 1.03
[11:06:29.849] <TB2> INFO: bits mean: 9.67 9.13 9.36 9.91 9.83 9.17 9.28 9.50 8.96 9.90 9.82 9.25 9.09 10.26 9.64 9.31
[11:06:29.849] <TB2> INFO: bits RMS: 2.75 2.66 2.55 2.67 2.51 2.50 2.70 2.74 2.64 2.47 2.55 2.35 2.47 2.38 2.53 2.66
[11:06:29.857] <TB2> INFO: ----------------------------------------------------------------------
[11:06:29.857] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[11:06:29.857] <TB2> INFO: ----------------------------------------------------------------------
[11:06:29.860] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:06:29.871] <TB2> INFO: dacScan step from 0 .. 19
[11:06:52.363] <TB2> INFO: Test took 22492ms.
[11:06:52.406] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:52.406] <TB2> INFO: dacScan step from 20 .. 39
[11:07:16.465] <TB2> INFO: Test took 24059ms.
[11:07:16.504] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:16.504] <TB2> INFO: dacScan step from 40 .. 59
[11:07:37.916] <TB2> INFO: Test took 21412ms.
[11:07:37.951] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:37.951] <TB2> INFO: dacScan step from 60 .. 79
[11:08:01.437] <TB2> INFO: Test took 23486ms.
[11:08:01.475] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:01.475] <TB2> INFO: dacScan step from 80 .. 99
[11:08:25.722] <TB2> INFO: Test took 24246ms.
[11:08:25.776] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:25.779] <TB2> INFO: dacScan step from 100 .. 119
[11:08:53.276] <TB2> INFO: Test took 27497ms.
[11:08:53.445] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:53.460] <TB2> INFO: dacScan step from 120 .. 139
[11:09:28.444] <TB2> INFO: Test took 34984ms.
[11:09:28.727] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:28.772] <TB2> INFO: dacScan step from 140 .. 159





[11:10:05.359] <TB2> INFO: Test took 36587ms.
[11:10:05.620] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:05.674] <TB2> INFO: dacScan step from 160 .. 179


[11:10:40.890] <TB2> INFO: Test took 35216ms.
[11:10:41.174] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:41.232] <TB2> INFO: dacScan step from 180 .. 199


[11:11:17.977] <TB2> INFO: Test took 36745ms.
[11:11:18.251] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:44.947] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 171 (20) hits flags = 16 (plus default)
[11:11:44.955] <TB2> INFO: dacScan step from 0 .. 19
[11:12:09.291] <TB2> INFO: Test took 24335ms.
[11:12:09.324] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:09.324] <TB2> INFO: dacScan step from 20 .. 39
[11:12:35.024] <TB2> INFO: Test took 25700ms.
[11:12:35.065] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:35.065] <TB2> INFO: dacScan step from 40 .. 59
[11:12:58.538] <TB2> INFO: Test took 23473ms.
[11:12:58.577] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:58.577] <TB2> INFO: dacScan step from 60 .. 79
[11:13:22.740] <TB2> INFO: Test took 24163ms.
[11:13:22.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:22.781] <TB2> INFO: dacScan step from 80 .. 99
[11:13:50.167] <TB2> INFO: Test took 27385ms.
[11:13:50.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:50.270] <TB2> INFO: dacScan step from 100 .. 119
[11:14:18.144] <TB2> INFO: Test took 27874ms.
[11:14:18.376] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:18.404] <TB2> INFO: dacScan step from 120 .. 139



[11:14:54.130] <TB2> INFO: Test took 35726ms.
[11:14:54.436] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:54.492] <TB2> INFO: dacScan step from 140 .. 159


[11:15:27.609] <TB2> INFO: Test took 33117ms.
[11:15:28.055] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:28.111] <TB2> INFO: dacScan step from 160 .. 171
[11:15:47.401] <TB2> INFO: Test took 19290ms.
[11:15:47.555] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:10.854] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:16:10.863] <TB2> INFO: dacScan step from 0 .. 19
[11:16:33.680] <TB2> INFO: Test took 22817ms.
[11:16:33.719] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:33.719] <TB2> INFO: dacScan step from 20 .. 39
[11:16:57.746] <TB2> INFO: Test took 24027ms.
[11:16:57.788] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:57.788] <TB2> INFO: dacScan step from 40 .. 59
[11:17:23.865] <TB2> INFO: Test took 26077ms.
[11:17:23.900] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:23.900] <TB2> INFO: dacScan step from 60 .. 79
[11:17:47.837] <TB2> INFO: Test took 23937ms.
[11:17:47.876] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:47.876] <TB2> INFO: dacScan step from 80 .. 99
[11:18:13.386] <TB2> INFO: Test took 25510ms.
[11:18:13.485] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:13.492] <TB2> INFO: dacScan step from 100 .. 119
[11:18:47.458] <TB2> INFO: Test took 33966ms.
[11:18:47.690] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:47.717] <TB2> INFO: dacScan step from 120 .. 139



[11:19:20.999] <TB2> INFO: Test took 33282ms.
[11:19:21.263] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:21.317] <TB2> INFO: dacScan step from 140 .. 159



[11:19:54.796] <TB2> INFO: Test took 33479ms.
[11:19:55.081] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:19.156] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 157 (20) hits flags = 16 (plus default)
[11:20:19.165] <TB2> INFO: dacScan step from 0 .. 19
[11:20:43.288] <TB2> INFO: Test took 24123ms.
[11:20:43.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:43.327] <TB2> INFO: dacScan step from 20 .. 39
[11:21:08.382] <TB2> INFO: Test took 25055ms.
[11:21:08.421] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:08.421] <TB2> INFO: dacScan step from 40 .. 59
[11:21:32.945] <TB2> INFO: Test took 24524ms.
[11:21:32.982] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:32.982] <TB2> INFO: dacScan step from 60 .. 79
[11:21:57.600] <TB2> INFO: Test took 24618ms.
[11:21:57.639] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:57.639] <TB2> INFO: dacScan step from 80 .. 99
[11:22:21.947] <TB2> INFO: Test took 24308ms.
[11:22:22.044] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:22.051] <TB2> INFO: dacScan step from 100 .. 119
[11:22:51.980] <TB2> INFO: Test took 29929ms.
[11:22:52.216] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:52.243] <TB2> INFO: dacScan step from 120 .. 139





[11:23:28.160] <TB2> INFO: Test took 35917ms.
[11:23:28.433] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:28.487] <TB2> INFO: dacScan step from 140 .. 157
[11:24:01.227] <TB2> INFO: Test took 32740ms.
[11:24:01.489] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:25.179] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 157 (20) hits flags = 16 (plus default)
[11:24:25.188] <TB2> INFO: dacScan step from 0 .. 19
[11:24:49.657] <TB2> INFO: Test took 24469ms.
[11:24:49.696] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:49.696] <TB2> INFO: dacScan step from 20 .. 39
[11:25:13.866] <TB2> INFO: Test took 24170ms.
[11:25:13.902] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:13.902] <TB2> INFO: dacScan step from 40 .. 59
[11:25:38.706] <TB2> INFO: Test took 24804ms.
[11:25:38.748] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:38.748] <TB2> INFO: dacScan step from 60 .. 79
[11:26:04.062] <TB2> INFO: Test took 25313ms.
[11:26:04.099] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:04.099] <TB2> INFO: dacScan step from 80 .. 99
[11:26:28.790] <TB2> INFO: Test took 24691ms.
[11:26:28.883] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:28.892] <TB2> INFO: dacScan step from 100 .. 119
[11:26:59.809] <TB2> INFO: Test took 30917ms.
[11:27:00.066] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:00.095] <TB2> INFO: dacScan step from 120 .. 139





[11:27:36.755] <TB2> INFO: Test took 36660ms.
[11:27:37.025] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:37.077] <TB2> INFO: dacScan step from 140 .. 157
[11:28:10.768] <TB2> INFO: Test took 33690ms.
[11:28:11.065] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:34.337] <TB2> INFO: PixTestTrim::trimBitTest() done
[11:28:34.339] <TB2> INFO: PixTestTrim::doTest() done, duration: 2485 seconds
[11:28:35.038] <TB2> INFO: ######################################################################
[11:28:35.038] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:28:35.038] <TB2> INFO: ######################################################################
[11:28:38.793] <TB2> INFO: Test took 3754ms.
[11:28:38.819] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:42.712] <TB2> INFO: Test took 3695ms.
[11:28:42.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:46.407] <TB2> INFO: Test took 3616ms.
[11:28:46.471] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:46.478] <TB2> INFO: The DUT currently contains the following objects:
[11:28:46.478] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:46.478] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:46.478] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:46.478] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:46.478] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:46.478] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.614] <TB2> INFO: Test took 1136ms.
[11:28:47.615] <TB2> INFO: The DUT currently contains the following objects:
[11:28:47.615] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:47.615] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:47.615] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:47.615] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:47.615] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.615] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.615] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.615] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.615] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.615] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.615] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:47.616] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.737] <TB2> INFO: Test took 1121ms.
[11:28:48.738] <TB2> INFO: The DUT currently contains the following objects:
[11:28:48.738] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:48.739] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:48.739] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:48.739] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:48.739] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:48.739] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.840] <TB2> INFO: Test took 1101ms.
[11:28:49.840] <TB2> INFO: The DUT currently contains the following objects:
[11:28:49.840] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:49.840] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:49.840] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:49.840] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:49.840] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.840] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.840] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.840] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.840] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.840] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:49.841] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.940] <TB2> INFO: Test took 1099ms.
[11:28:50.941] <TB2> INFO: The DUT currently contains the following objects:
[11:28:50.941] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:50.941] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:50.941] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:50.941] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:50.941] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:50.941] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.041] <TB2> INFO: Test took 1100ms.
[11:28:52.042] <TB2> INFO: The DUT currently contains the following objects:
[11:28:52.042] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:52.042] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:52.042] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:52.042] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:52.042] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:52.042] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.142] <TB2> INFO: Test took 1100ms.
[11:28:53.143] <TB2> INFO: The DUT currently contains the following objects:
[11:28:53.143] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:53.143] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:53.143] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:53.143] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:53.143] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:53.143] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: Test took 1100ms.
[11:28:54.243] <TB2> INFO: The DUT currently contains the following objects:
[11:28:54.243] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:54.243] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:54.243] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:54.243] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:54.243] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:54.243] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.343] <TB2> INFO: Test took 1100ms.
[11:28:55.343] <TB2> INFO: The DUT currently contains the following objects:
[11:28:55.343] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:55.343] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:55.343] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:55.343] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:55.343] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.343] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.343] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.343] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:55.344] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.444] <TB2> INFO: Test took 1100ms.
[11:28:56.445] <TB2> INFO: The DUT currently contains the following objects:
[11:28:56.445] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:56.445] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:56.445] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:56.445] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:56.445] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:56.445] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.544] <TB2> INFO: Test took 1099ms.
[11:28:57.545] <TB2> INFO: The DUT currently contains the following objects:
[11:28:57.545] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:57.545] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:57.545] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:57.545] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:57.545] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:57.545] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.644] <TB2> INFO: Test took 1099ms.
[11:28:58.645] <TB2> INFO: The DUT currently contains the following objects:
[11:28:58.645] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:58.645] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:58.645] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:58.645] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:58.645] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:58.645] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: Test took 1100ms.
[11:28:59.745] <TB2> INFO: The DUT currently contains the following objects:
[11:28:59.745] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:28:59.745] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:28:59.745] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:28:59.745] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:28:59.745] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.745] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.746] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.746] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.746] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:28:59.746] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.845] <TB2> INFO: Test took 1099ms.
[11:29:00.846] <TB2> INFO: The DUT currently contains the following objects:
[11:29:00.846] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:29:00.846] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:29:00.846] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:29:00.846] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:29:00.846] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:00.846] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.945] <TB2> INFO: Test took 1099ms.
[11:29:01.946] <TB2> INFO: The DUT currently contains the following objects:
[11:29:01.946] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:29:01.946] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:29:01.946] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:29:01.946] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:29:01.946] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:01.946] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.046] <TB2> INFO: Test took 1100ms.
[11:29:03.046] <TB2> INFO: The DUT currently contains the following objects:
[11:29:03.046] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:29:03.046] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:29:03.046] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:29:03.046] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:29:03.046] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.046] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.046] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.046] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:03.047] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:29:04.146] <TB2> INFO: Test took 1099ms.
[11:29:04.149] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:11.726] <TB2> INFO: Test took 247577ms.
[11:33:13.567] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:03.172] <TB2> INFO: Test took 229605ms.
[11:37:04.972] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:04.982] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:04.990] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:04.997] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.005] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.012] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[11:37:05.020] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.027] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.034] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.041] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.048] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.055] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.062] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.069] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.076] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.083] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.090] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:37:05.140] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:37:05.140] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:37:05.140] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:37:05.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:37:05.142] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:37:05.142] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:37:05.142] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:37:05.142] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:37:08.898] <TB2> INFO: Test took 3753ms.
[11:37:12.813] <TB2> INFO: Test took 3643ms.
[11:37:16.574] <TB2> INFO: Test took 3478ms.
[11:37:16.877] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:17.795] <TB2> INFO: Test took 918ms.
[11:37:17.799] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:18.924] <TB2> INFO: Test took 1126ms.
[11:37:18.927] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:20.065] <TB2> INFO: Test took 1138ms.
[11:37:20.069] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:21.220] <TB2> INFO: Test took 1152ms.
[11:37:21.223] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:22.347] <TB2> INFO: Test took 1125ms.
[11:37:22.351] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:23.502] <TB2> INFO: Test took 1151ms.
[11:37:23.506] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:24.642] <TB2> INFO: Test took 1136ms.
[11:37:24.646] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:25.769] <TB2> INFO: Test took 1123ms.
[11:37:25.773] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:26.881] <TB2> INFO: Test took 1108ms.
[11:37:26.888] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:27.992] <TB2> INFO: Test took 1104ms.
[11:37:27.997] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:29.095] <TB2> INFO: Test took 1098ms.
[11:37:29.097] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:30.198] <TB2> INFO: Test took 1101ms.
[11:37:30.200] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:31.315] <TB2> INFO: Test took 1115ms.
[11:37:31.317] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:32.417] <TB2> INFO: Test took 1100ms.
[11:37:32.420] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:33.534] <TB2> INFO: Test took 1114ms.
[11:37:33.536] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:34.650] <TB2> INFO: Test took 1114ms.
[11:37:34.652] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:35.751] <TB2> INFO: Test took 1099ms.
[11:37:35.754] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:36.855] <TB2> INFO: Test took 1102ms.
[11:37:36.857] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:37.957] <TB2> INFO: Test took 1100ms.
[11:37:37.959] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:39.102] <TB2> INFO: Test took 1143ms.
[11:37:39.104] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:40.205] <TB2> INFO: Test took 1101ms.
[11:37:40.208] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:41.309] <TB2> INFO: Test took 1101ms.
[11:37:41.311] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:42.411] <TB2> INFO: Test took 1100ms.
[11:37:42.413] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:43.513] <TB2> INFO: Test took 1100ms.
[11:37:43.515] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:44.616] <TB2> INFO: Test took 1101ms.
[11:37:44.618] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:45.717] <TB2> INFO: Test took 1099ms.
[11:37:45.719] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:46.819] <TB2> INFO: Test took 1100ms.
[11:37:46.821] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:47.939] <TB2> INFO: Test took 1118ms.
[11:37:47.942] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:49.059] <TB2> INFO: Test took 1117ms.
[11:37:49.063] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:50.178] <TB2> INFO: Test took 1116ms.
[11:37:50.180] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:51.283] <TB2> INFO: Test took 1103ms.
[11:37:51.286] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:52.402] <TB2> INFO: Test took 1116ms.
[11:37:52.918] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 557 seconds
[11:37:52.918] <TB2> INFO: PH scale (per ROC): 80 82 78 86 99 82 85 79 80 80 82 81 81 91 75 83
[11:37:52.918] <TB2> INFO: PH offset (per ROC): 157 176 170 162 144 139 170 147 168 144 145 147 159 148 174 144
[11:37:53.172] <TB2> INFO: ######################################################################
[11:37:53.172] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:37:53.172] <TB2> INFO: ######################################################################
[11:37:53.185] <TB2> INFO: scanning low vcal = 10
[11:37:57.101] <TB2> INFO: Test took 3916ms.
[11:37:57.104] <TB2> INFO: scanning low vcal = 20
[11:38:01.121] <TB2> INFO: Test took 4016ms.
[11:38:01.124] <TB2> INFO: scanning low vcal = 30
[11:38:04.994] <TB2> INFO: Test took 3870ms.
[11:38:05.000] <TB2> INFO: scanning low vcal = 40
[11:38:09.193] <TB2> INFO: Test took 4193ms.
[11:38:09.271] <TB2> INFO: scanning low vcal = 50
[11:38:13.606] <TB2> INFO: Test took 4335ms.
[11:38:13.681] <TB2> INFO: scanning low vcal = 60
[11:38:18.156] <TB2> INFO: Test took 4475ms.
[11:38:18.230] <TB2> INFO: scanning low vcal = 70
[11:38:22.675] <TB2> INFO: Test took 4445ms.
[11:38:22.748] <TB2> INFO: scanning low vcal = 80
[11:38:27.470] <TB2> INFO: Test took 4722ms.
[11:38:27.525] <TB2> INFO: scanning low vcal = 90
[11:38:32.212] <TB2> INFO: Test took 4687ms.
[11:38:32.280] <TB2> INFO: scanning low vcal = 100
[11:38:36.560] <TB2> INFO: Test took 4280ms.
[11:38:36.640] <TB2> INFO: scanning low vcal = 110
[11:38:41.050] <TB2> INFO: Test took 4410ms.
[11:38:41.137] <TB2> INFO: scanning low vcal = 120
[11:38:45.651] <TB2> INFO: Test took 4514ms.
[11:38:45.720] <TB2> INFO: scanning low vcal = 130
[11:38:50.360] <TB2> INFO: Test took 4640ms.
[11:38:50.456] <TB2> INFO: scanning low vcal = 140
[11:38:54.832] <TB2> INFO: Test took 4376ms.
[11:38:54.893] <TB2> INFO: scanning low vcal = 150
[11:38:59.590] <TB2> INFO: Test took 4697ms.
[11:38:59.673] <TB2> INFO: scanning low vcal = 160
[11:39:04.306] <TB2> INFO: Test took 4633ms.
[11:39:04.366] <TB2> INFO: scanning low vcal = 170
[11:39:08.812] <TB2> INFO: Test took 4446ms.
[11:39:08.875] <TB2> INFO: scanning low vcal = 180
[11:39:13.519] <TB2> INFO: Test took 4644ms.
[11:39:13.594] <TB2> INFO: scanning low vcal = 190
[11:39:18.356] <TB2> INFO: Test took 4762ms.
[11:39:18.421] <TB2> INFO: scanning low vcal = 200
[11:39:22.907] <TB2> INFO: Test took 4486ms.
[11:39:22.980] <TB2> INFO: scanning low vcal = 210
[11:39:27.376] <TB2> INFO: Test took 4396ms.
[11:39:27.437] <TB2> INFO: scanning low vcal = 220
[11:39:32.186] <TB2> INFO: Test took 4749ms.
[11:39:32.287] <TB2> INFO: scanning low vcal = 230
[11:39:36.827] <TB2> INFO: Test took 4540ms.
[11:39:36.886] <TB2> INFO: scanning low vcal = 240
[11:39:41.343] <TB2> INFO: Test took 4457ms.
[11:39:41.405] <TB2> INFO: scanning low vcal = 250
[11:39:46.073] <TB2> INFO: Test took 4668ms.
[11:39:46.136] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[11:39:50.741] <TB2> INFO: Test took 4605ms.
[11:39:50.798] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[11:39:55.123] <TB2> INFO: Test took 4325ms.
[11:39:55.198] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[11:39:59.837] <TB2> INFO: Test took 4639ms.
[11:39:59.897] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[11:40:04.606] <TB2> INFO: Test took 4709ms.
[11:40:04.666] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:40:08.999] <TB2> INFO: Test took 4333ms.
[11:40:09.483] <TB2> INFO: PixTestGainPedestal::measure() done
[11:40:40.871] <TB2> INFO: PixTestGainPedestal::fit() done
[11:40:40.871] <TB2> INFO: non-linearity mean: 0.955 0.959 0.957 0.959 0.953 0.961 0.962 0.955 0.961 0.956 0.947 0.958 0.951 0.951 0.953 0.956
[11:40:40.871] <TB2> INFO: non-linearity RMS: 0.006 0.005 0.006 0.005 0.006 0.005 0.005 0.006 0.005 0.004 0.006 0.005 0.005 0.005 0.006 0.005
[11:40:40.871] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[11:40:40.889] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[11:40:40.907] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[11:40:40.925] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[11:40:40.943] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[11:40:40.961] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[11:40:40.979] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[11:40:40.998] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[11:40:41.020] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[11:40:41.053] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[11:40:41.074] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[11:40:41.095] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[11:40:41.116] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[11:40:41.136] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[11:40:41.156] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[11:40:41.177] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[11:40:41.198] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[11:40:41.205] <TB2> INFO: enter test to run
[11:40:41.205] <TB2> INFO: test: exit no parameter change
[11:40:41.631] <TB2> QUIET: Connection to board 0 closed.
[11:40:41.711] <TB2> INFO: pXar: this is the end, my friend