[07:47:54.391] <TB2> INFO: *** Welcome to pxar ***
[07:47:54.391] <TB2> INFO: *** Today: 2015/08/13
[07:47:54.391] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C15.dat
[07:47:54.393] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//tbmParameters_C0b.dat
[07:47:54.393] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//defaultMaskFile.dat
[07:47:54.393] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters_C15.dat
[07:47:54.486] <TB2> INFO: clk: 4
[07:47:54.486] <TB2> INFO: ctr: 4
[07:47:54.486] <TB2> INFO: sda: 19
[07:47:54.486] <TB2> INFO: tin: 9
[07:47:54.486] <TB2> INFO: level: 15
[07:47:54.486] <TB2> INFO: triggerdelay: 0
[07:47:54.486] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[07:47:54.486] <TB2> INFO: Log level: INFO
[07:47:54.494] <TB2> INFO: Found DTB DTB_WXC55Z
[07:47:54.502] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[07:47:54.505] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[07:47:54.507] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[07:47:56.034] <TB2> INFO: DUT info:
[07:47:56.034] <TB2> INFO: The DUT currently contains the following objects:
[07:47:56.034] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[07:47:56.034] <TB2> INFO: TBM Core alpha (0): 7 registers set
[07:47:56.034] <TB2> INFO: TBM Core beta (1): 7 registers set
[07:47:56.034] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[07:47:56.034] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.034] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.034] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.034] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.034] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.034] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.034] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.034] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.034] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.035] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.035] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.035] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.035] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.035] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.035] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.035] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[07:47:56.436] <TB2> INFO: enter 'restricted' command line mode
[07:47:56.436] <TB2> INFO: enter test to run
[07:47:56.436] <TB2> INFO: test: pretest no parameter change
[07:47:56.436] <TB2> INFO: running: pretest
[07:47:56.442] <TB2> INFO: ######################################################################
[07:47:56.442] <TB2> INFO: PixTestPretest::doTest()
[07:47:56.442] <TB2> INFO: ######################################################################
[07:47:56.444] <TB2> INFO: ----------------------------------------------------------------------
[07:47:56.444] <TB2> INFO: PixTestPretest::programROC()
[07:47:56.444] <TB2> INFO: ----------------------------------------------------------------------
[07:48:14.461] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[07:48:14.461] <TB2> INFO: IA differences per ROC: 19.3 21.7 19.3 17.7 17.7 19.3 17.7 17.7 20.9 19.3 18.5 20.1 18.5 16.9 16.9 17.7
[07:48:14.539] <TB2> INFO: ----------------------------------------------------------------------
[07:48:14.539] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[07:48:14.539] <TB2> INFO: ----------------------------------------------------------------------
[07:48:34.111] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 379.4 mA = 23.7125 mA/ROC
[07:48:34.114] <TB2> INFO: ----------------------------------------------------------------------
[07:48:34.114] <TB2> INFO: PixTestPretest::findWorkingPixel()
[07:48:34.114] <TB2> INFO: ----------------------------------------------------------------------
[07:48:42.317] <TB2> INFO: Test took 8197ms.
[07:48:42.611] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[07:48:42.649] <TB2> INFO: ----------------------------------------------------------------------
[07:48:42.650] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[07:48:42.650] <TB2> INFO: ----------------------------------------------------------------------
[07:48:51.066] <TB2> INFO: Test took 8409ms.
[07:48:51.375] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[07:48:51.375] <TB2> INFO: CalDel: 142 130 149 127 139 135 145 134 131 128 139 123 137 130 141 142
[07:48:51.375] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[07:48:51.378] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C0.dat
[07:48:51.378] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C1.dat
[07:48:51.378] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C2.dat
[07:48:51.379] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C3.dat
[07:48:51.379] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C4.dat
[07:48:51.379] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C5.dat
[07:48:51.379] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C6.dat
[07:48:51.379] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C7.dat
[07:48:51.380] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C8.dat
[07:48:51.380] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C9.dat
[07:48:51.380] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C10.dat
[07:48:51.380] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C11.dat
[07:48:51.380] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C12.dat
[07:48:51.381] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C13.dat
[07:48:51.381] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C14.dat
[07:48:51.381] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters_C15.dat
[07:48:51.381] <TB2> INFO: PixTestPretest::doTest() done, duration: 54 seconds
[07:48:51.482] <TB2> INFO: enter test to run
[07:48:51.482] <TB2> INFO: test: fulltest no parameter change
[07:48:51.482] <TB2> INFO: running: fulltest
[07:48:51.482] <TB2> INFO: ######################################################################
[07:48:51.482] <TB2> INFO: PixTestFullTest::doTest()
[07:48:51.482] <TB2> INFO: ######################################################################
[07:48:51.485] <TB2> INFO: ######################################################################
[07:48:51.485] <TB2> INFO: PixTestAlive::doTest()
[07:48:51.485] <TB2> INFO: ######################################################################
[07:48:51.486] <TB2> INFO: ----------------------------------------------------------------------
[07:48:51.486] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:48:51.486] <TB2> INFO: ----------------------------------------------------------------------
[07:48:55.153] <TB2> INFO: Test took 3666ms.
[07:48:55.178] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:48:55.400] <TB2> INFO: PixTestAlive::aliveTest() done
[07:48:55.401] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:48:55.402] <TB2> INFO: ----------------------------------------------------------------------
[07:48:55.402] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:48:55.402] <TB2> INFO: ----------------------------------------------------------------------
[07:48:58.295] <TB2> INFO: Test took 2891ms.
[07:48:58.298] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:48:58.298] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[07:48:58.523] <TB2> INFO: PixTestAlive::maskTest() done
[07:48:58.523] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:48:58.524] <TB2> INFO: ----------------------------------------------------------------------
[07:48:58.525] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:48:58.525] <TB2> INFO: ----------------------------------------------------------------------
[07:49:01.904] <TB2> INFO: Test took 3378ms.
[07:49:01.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:02.162] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[07:49:02.162] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:49:02.163] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[07:49:02.176] <TB2> INFO: ######################################################################
[07:49:02.176] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[07:49:02.176] <TB2> INFO: ######################################################################
[07:49:02.179] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[07:49:02.212] <TB2> INFO: dacScan step from 0 .. 29
[07:49:24.897] <TB2> INFO: Test took 22685ms.
[07:49:24.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:24.934] <TB2> INFO: dacScan step from 30 .. 59
[07:49:50.789] <TB2> INFO: Test took 25855ms.
[07:49:50.905] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:50.921] <TB2> INFO: dacScan step from 60 .. 89
[07:50:22.640] <TB2> INFO: Test took 31719ms.
[07:50:22.923] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:50:23.000] <TB2> INFO: dacScan step from 90 .. 119
[07:50:54.704] <TB2> INFO: Test took 31704ms.
[07:50:54.986] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:50:55.059] <TB2> INFO: dacScan step from 120 .. 149
[07:51:19.080] <TB2> INFO: Test took 24021ms.
[07:51:19.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:51:42.932] <TB2> INFO: PixTestBBMap::doTest() done, duration: 160 seconds
[07:51:42.932] <TB2> INFO: number of dead bumps (per ROC): 5 0 3 0 0 0 0 0 0 0 0 2 1 2 2 18
[07:51:42.932] <TB2> INFO: separation cut (per ROC): 95 100 98 79 96 88 71 91 87 79 87 74 89 70 78 67
[07:51:43.009] <TB2> INFO: ######################################################################
[07:51:43.009] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[07:51:43.009] <TB2> INFO: ######################################################################
[07:51:43.010] <TB2> INFO: ----------------------------------------------------------------------
[07:51:43.010] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[07:51:43.010] <TB2> INFO: ----------------------------------------------------------------------
[07:51:43.010] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[07:51:43.019] <TB2> INFO: dacScan step from 0 .. 3
[07:52:03.096] <TB2> INFO: Test took 20077ms.
[07:52:03.123] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:52:03.123] <TB2> INFO: dacScan step from 4 .. 7
[07:52:23.308] <TB2> INFO: Test took 20185ms.
[07:52:23.337] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:52:23.337] <TB2> INFO: dacScan step from 8 .. 11
[07:52:43.280] <TB2> INFO: Test took 19943ms.
[07:52:43.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:52:43.308] <TB2> INFO: dacScan step from 12 .. 15
[07:53:03.573] <TB2> INFO: Test took 20265ms.
[07:53:03.609] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:53:03.609] <TB2> INFO: dacScan step from 16 .. 19
[07:53:23.513] <TB2> INFO: Test took 19904ms.
[07:53:23.541] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:53:23.541] <TB2> INFO: dacScan step from 20 .. 23
[07:53:43.535] <TB2> INFO: Test took 19994ms.
[07:53:43.564] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:53:43.564] <TB2> INFO: dacScan step from 24 .. 27
[07:54:03.895] <TB2> INFO: Test took 20331ms.
[07:54:03.927] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:54:03.927] <TB2> INFO: dacScan step from 28 .. 31
[07:54:24.011] <TB2> INFO: Test took 20084ms.
[07:54:24.042] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:54:24.042] <TB2> INFO: dacScan step from 32 .. 35
[07:54:43.686] <TB2> INFO: Test took 19644ms.
[07:54:43.712] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:54:43.713] <TB2> INFO: dacScan step from 36 .. 39
[07:55:03.906] <TB2> INFO: Test took 20193ms.
[07:55:03.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:55:03.936] <TB2> INFO: dacScan step from 40 .. 43
[07:55:23.700] <TB2> INFO: Test took 19763ms.
[07:55:23.727] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:55:23.727] <TB2> INFO: dacScan step from 44 .. 47
[07:55:43.689] <TB2> INFO: Test took 19962ms.
[07:55:43.717] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:55:43.717] <TB2> INFO: dacScan step from 48 .. 51
[07:56:04.256] <TB2> INFO: Test took 20539ms.
[07:56:04.286] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:56:04.286] <TB2> INFO: dacScan step from 52 .. 55
[07:56:24.524] <TB2> INFO: Test took 20238ms.
[07:56:24.558] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:56:24.558] <TB2> INFO: dacScan step from 56 .. 59
[07:56:44.670] <TB2> INFO: Test took 20112ms.
[07:56:44.701] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:56:44.701] <TB2> INFO: dacScan step from 60 .. 63
[07:57:05.165] <TB2> INFO: Test took 20464ms.
[07:57:05.196] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:57:05.196] <TB2> INFO: dacScan step from 64 .. 67
[07:57:25.776] <TB2> INFO: Test took 20580ms.
[07:57:25.814] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:57:25.815] <TB2> INFO: dacScan step from 68 .. 71
[07:57:47.166] <TB2> INFO: Test took 21351ms.
[07:57:47.214] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:57:47.215] <TB2> INFO: dacScan step from 72 .. 75
[07:58:09.807] <TB2> INFO: Test took 22592ms.
[07:58:09.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:58:09.867] <TB2> INFO: dacScan step from 76 .. 79
[07:58:34.359] <TB2> INFO: Test took 24492ms.
[07:58:34.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:58:34.456] <TB2> INFO: dacScan step from 80 .. 83
[07:59:01.584] <TB2> INFO: Test took 27128ms.
[07:59:01.754] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:59:01.762] <TB2> INFO: dacScan step from 84 .. 87
[07:59:30.875] <TB2> INFO: Test took 29113ms.
[07:59:31.063] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:59:31.070] <TB2> INFO: dacScan step from 88 .. 91
[08:00:01.369] <TB2> INFO: Test took 30298ms.
[08:00:01.616] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:00:01.628] <TB2> INFO: dacScan step from 92 .. 95





[08:00:33.480] <TB2> INFO: Test took 31852ms.
[08:00:33.702] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:00:33.713] <TB2> INFO: dacScan step from 96 .. 99



[08:01:05.741] <TB2> INFO: Test took 32028ms.
[08:01:05.995] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:06.008] <TB2> INFO: dacScan step from 100 .. 103


[08:01:38.955] <TB2> INFO: Test took 32947ms.
[08:01:39.185] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:39.197] <TB2> INFO: dacScan step from 104 .. 107





[08:02:11.718] <TB2> INFO: Test took 32521ms.
[08:02:11.973] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:02:11.986] <TB2> INFO: dacScan step from 108 .. 111


[08:02:44.156] <TB2> INFO: Test took 32170ms.
[08:02:44.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:02:44.424] <TB2> INFO: dacScan step from 112 .. 115



[08:03:16.999] <TB2> INFO: Test took 32575ms.
[08:03:17.261] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:03:17.277] <TB2> INFO: dacScan step from 116 .. 119





[08:03:49.789] <TB2> INFO: Test took 32512ms.
[08:03:50.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:03:50.052] <TB2> INFO: dacScan step from 120 .. 123




[08:04:22.620] <TB2> INFO: Test took 32568ms.
[08:04:22.847] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:22.860] <TB2> INFO: dacScan step from 124 .. 127


[08:04:56.099] <TB2> INFO: Test took 33239ms.
[08:04:56.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:56.338] <TB2> INFO: dacScan step from 128 .. 131


[08:05:26.564] <TB2> INFO: Test took 30226ms.
[08:05:26.929] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:05:26.944] <TB2> INFO: dacScan step from 132 .. 135


[08:05:56.451] <TB2> INFO: Test took 29507ms.
[08:05:56.710] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:05:56.723] <TB2> INFO: dacScan step from 136 .. 139


[08:06:27.646] <TB2> INFO: Test took 30923ms.
[08:06:28.032] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:06:28.056] <TB2> INFO: dacScan step from 140 .. 143


[08:06:59.528] <TB2> INFO: Test took 31471ms.
[08:06:59.751] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:06:59.766] <TB2> INFO: dacScan step from 144 .. 147


[08:07:30.865] <TB2> INFO: Test took 31099ms.
[08:07:31.249] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:07:31.270] <TB2> INFO: dacScan step from 148 .. 149
[08:07:46.153] <TB2> INFO: Test took 14883ms.
[08:07:46.259] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:07:46.266] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:47.745] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:49.185] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:50.622] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:52.089] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:53.558] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:55.003] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:56.531] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:58.094] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:07:59.466] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:08:00.908] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:08:02.296] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:08:03.742] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:08:05.109] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:08:06.523] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:08:07.911] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:08:09.353] <TB2> INFO: PixTestScurves::scurves() done
[08:08:09.353] <TB2> INFO: Vcal mean: 83.23 92.61 94.09 82.60 81.34 89.60 79.37 80.14 94.03 80.79 86.05 78.32 88.95 74.70 89.57 83.47
[08:08:09.353] <TB2> INFO: Vcal RMS: 5.57 5.70 6.18 4.41 5.33 5.18 4.56 4.73 5.86 4.81 5.21 4.83 5.52 4.27 6.12 4.67
[08:08:09.353] <TB2> INFO: PixTestScurves::fullTest() done, duration: 986 seconds
[08:08:09.443] <TB2> INFO: ######################################################################
[08:08:09.443] <TB2> INFO: PixTestTrim::doTest()
[08:08:09.443] <TB2> INFO: ######################################################################
[08:08:09.444] <TB2> INFO: ----------------------------------------------------------------------
[08:08:09.444] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:08:09.444] <TB2> INFO: ----------------------------------------------------------------------
[08:08:09.551] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:08:09.551] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:08:09.560] <TB2> INFO: dacScan step from 0 .. 19
[08:08:24.607] <TB2> INFO: Test took 15047ms.
[08:08:24.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:08:24.631] <TB2> INFO: dacScan step from 20 .. 39
[08:08:39.499] <TB2> INFO: Test took 14868ms.
[08:08:39.519] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:08:39.519] <TB2> INFO: dacScan step from 40 .. 59
[08:08:53.905] <TB2> INFO: Test took 14386ms.
[08:08:53.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:08:53.925] <TB2> INFO: dacScan step from 60 .. 79
[08:09:08.416] <TB2> INFO: Test took 14491ms.
[08:09:08.437] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:09:08.437] <TB2> INFO: dacScan step from 80 .. 99
[08:09:25.538] <TB2> INFO: Test took 17101ms.
[08:09:25.610] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:09:25.620] <TB2> INFO: dacScan step from 100 .. 119
[08:09:47.155] <TB2> INFO: Test took 21535ms.
[08:09:47.322] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:09:47.358] <TB2> INFO: dacScan step from 120 .. 139
[08:10:06.398] <TB2> INFO: Test took 19040ms.
[08:10:06.587] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:10:06.613] <TB2> INFO: dacScan step from 140 .. 159
[08:10:21.623] <TB2> INFO: Test took 15011ms.
[08:10:21.675] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:10:44.705] <TB2> INFO: ROC 0 VthrComp = 89
[08:10:44.705] <TB2> INFO: ROC 1 VthrComp = 97
[08:10:44.705] <TB2> INFO: ROC 2 VthrComp = 96
[08:10:44.706] <TB2> INFO: ROC 3 VthrComp = 88
[08:10:44.706] <TB2> INFO: ROC 4 VthrComp = 86
[08:10:44.706] <TB2> INFO: ROC 5 VthrComp = 95
[08:10:44.706] <TB2> INFO: ROC 6 VthrComp = 81
[08:10:44.706] <TB2> INFO: ROC 7 VthrComp = 85
[08:10:44.706] <TB2> INFO: ROC 8 VthrComp = 100
[08:10:44.706] <TB2> INFO: ROC 9 VthrComp = 84
[08:10:44.706] <TB2> INFO: ROC 10 VthrComp = 90
[08:10:44.707] <TB2> INFO: ROC 11 VthrComp = 80
[08:10:44.707] <TB2> INFO: ROC 12 VthrComp = 96
[08:10:44.707] <TB2> INFO: ROC 13 VthrComp = 80
[08:10:44.707] <TB2> INFO: ROC 14 VthrComp = 85
[08:10:44.707] <TB2> INFO: ROC 15 VthrComp = 87
[08:10:44.707] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:10:44.707] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:10:44.719] <TB2> INFO: dacScan step from 0 .. 19
[08:10:59.904] <TB2> INFO: Test took 15185ms.
[08:10:59.933] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:10:59.933] <TB2> INFO: dacScan step from 20 .. 39
[08:11:15.996] <TB2> INFO: Test took 16063ms.
[08:11:16.031] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:11:16.034] <TB2> INFO: dacScan step from 40 .. 59
[08:11:36.156] <TB2> INFO: Test took 20122ms.
[08:11:36.312] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:11:36.348] <TB2> INFO: dacScan step from 60 .. 79
[08:11:57.864] <TB2> INFO: Test took 21516ms.
[08:11:58.025] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:11:58.079] <TB2> INFO: dacScan step from 80 .. 99
[08:12:20.361] <TB2> INFO: Test took 22282ms.
[08:12:20.556] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:12:20.606] <TB2> INFO: dacScan step from 100 .. 119
[08:12:43.077] <TB2> INFO: Test took 22471ms.
[08:12:43.238] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:12:43.285] <TB2> INFO: dacScan step from 120 .. 139
[08:13:05.837] <TB2> INFO: Test took 22552ms.
[08:13:05.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:13:06.048] <TB2> INFO: dacScan step from 140 .. 159
[08:13:24.906] <TB2> INFO: Test took 18858ms.
[08:13:25.066] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:13:49.170] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.7504 for pixel 10/78 mean/min/max = 45.8258/31.7608/59.8908
[08:13:49.170] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 58.9681 for pixel 8/77 mean/min/max = 45.1538/31.3359/58.9717
[08:13:49.171] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 61.1681 for pixel 25/23 mean/min/max = 46.3352/31.4817/61.1887
[08:13:49.171] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 56.9234 for pixel 51/4 mean/min/max = 44.9811/32.682/57.2802
[08:13:49.171] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 59.1274 for pixel 14/77 mean/min/max = 45.6013/31.7793/59.4234
[08:13:49.172] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 57.1033 for pixel 0/59 mean/min/max = 44.3979/31.676/57.1198
[08:13:49.172] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.0289 for pixel 3/16 mean/min/max = 46.7097/33.3154/60.1041
[08:13:49.172] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.6798 for pixel 1/69 mean/min/max = 45.3278/31.8599/58.7957
[08:13:49.173] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 58.7112 for pixel 21/4 mean/min/max = 45.2081/31.5313/58.8849
[08:13:49.173] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.6743 for pixel 24/79 mean/min/max = 46.1789/32.6199/59.7379
[08:13:49.173] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.68 for pixel 10/54 mean/min/max = 45.721/32.5343/58.9077
[08:13:49.174] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 60.166 for pixel 14/0 mean/min/max = 46.4249/32.5811/60.2687
[08:13:49.174] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.3544 for pixel 20/65 mean/min/max = 44.8725/31.2848/58.4602
[08:13:49.174] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.4349 for pixel 2/1 mean/min/max = 44.7693/32.986/56.5526
[08:13:49.175] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 63.8877 for pixel 4/23 mean/min/max = 47.7246/31.4383/64.011
[08:13:49.175] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.4822 for pixel 20/2 mean/min/max = 44.9407/32.3088/57.5725
[08:13:49.175] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:15:36.946] <TB2> INFO: Test took 107771ms.
[08:15:38.460] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:15:38.469] <TB2> INFO: dacScan step from 0 .. 19
[08:16:02.754] <TB2> INFO: Test took 24285ms.
[08:16:02.812] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:02.815] <TB2> INFO: dacScan step from 20 .. 39
[08:16:34.285] <TB2> INFO: Test took 31470ms.
[08:16:34.525] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:34.557] <TB2> INFO: dacScan step from 40 .. 59


[08:17:09.930] <TB2> INFO: Test took 35373ms.
[08:17:10.216] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:10.273] <TB2> INFO: dacScan step from 60 .. 79





[08:17:45.104] <TB2> INFO: Test took 34831ms.
[08:17:45.388] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:45.441] <TB2> INFO: dacScan step from 80 .. 99





[08:18:20.569] <TB2> INFO: Test took 35128ms.
[08:18:20.862] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:18:20.911] <TB2> INFO: dacScan step from 100 .. 119





[08:18:55.939] <TB2> INFO: Test took 35028ms.
[08:18:56.218] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:18:56.271] <TB2> INFO: dacScan step from 120 .. 139





[08:19:28.965] <TB2> INFO: Test took 32694ms.
[08:19:29.261] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:29.313] <TB2> INFO: dacScan step from 140 .. 159


[08:20:04.156] <TB2> INFO: Test took 34843ms.
[08:20:04.458] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:04.512] <TB2> INFO: dacScan step from 160 .. 179





[08:20:39.333] <TB2> INFO: Test took 34820ms.
[08:20:39.645] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:39.695] <TB2> INFO: dacScan step from 180 .. 199



[08:21:12.641] <TB2> INFO: Test took 32946ms.
[08:21:12.919] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:37.115] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.023768 .. 255.000000
[08:21:37.189] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[08:21:37.198] <TB2> INFO: dacScan step from 0 .. 19
[08:21:51.471] <TB2> INFO: Test took 14273ms.
[08:21:51.493] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:51.493] <TB2> INFO: dacScan step from 20 .. 39
[08:22:07.422] <TB2> INFO: Test took 15929ms.
[08:22:07.508] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:07.527] <TB2> INFO: dacScan step from 40 .. 59
[08:22:26.488] <TB2> INFO: Test took 18961ms.
[08:22:26.638] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:26.689] <TB2> INFO: dacScan step from 60 .. 79
[08:22:45.635] <TB2> INFO: Test took 18946ms.
[08:22:45.776] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:45.825] <TB2> INFO: dacScan step from 80 .. 99
[08:23:03.854] <TB2> INFO: Test took 18029ms.
[08:23:03.992] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:04.047] <TB2> INFO: dacScan step from 100 .. 119
[08:23:22.137] <TB2> INFO: Test took 18090ms.
[08:23:22.287] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:22.346] <TB2> INFO: dacScan step from 120 .. 139
[08:23:40.537] <TB2> INFO: Test took 18191ms.
[08:23:40.683] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:40.735] <TB2> INFO: dacScan step from 140 .. 159
[08:23:59.468] <TB2> INFO: Test took 18733ms.
[08:23:59.613] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:59.673] <TB2> INFO: dacScan step from 160 .. 179
[08:24:18.631] <TB2> INFO: Test took 18958ms.
[08:24:18.858] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:18.935] <TB2> INFO: dacScan step from 180 .. 199
[08:24:37.832] <TB2> INFO: Test took 18896ms.
[08:24:37.979] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:38.034] <TB2> INFO: dacScan step from 200 .. 219
[08:24:57.224] <TB2> INFO: Test took 19190ms.
[08:24:57.370] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:57.421] <TB2> INFO: dacScan step from 220 .. 239
[08:25:16.520] <TB2> INFO: Test took 19099ms.
[08:25:16.679] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:16.731] <TB2> INFO: dacScan step from 240 .. 255
[08:25:30.888] <TB2> INFO: Test took 14157ms.
[08:25:30.998] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:07.140] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 12.377044 .. 47.499972
[08:26:07.236] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 57 (20) hits flags = 16 (plus default)
[08:26:07.245] <TB2> INFO: dacScan step from 2 .. 21
[08:26:20.353] <TB2> INFO: Test took 13108ms.
[08:26:20.372] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:20.372] <TB2> INFO: dacScan step from 22 .. 41
[08:26:34.938] <TB2> INFO: Test took 14566ms.
[08:26:35.029] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:35.051] <TB2> INFO: dacScan step from 42 .. 57
[08:26:49.000] <TB2> INFO: Test took 13949ms.
[08:26:49.119] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:04.858] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 18.418436 .. 45.298518
[08:27:04.933] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 55 (20) hits flags = 16 (plus default)
[08:27:04.941] <TB2> INFO: dacScan step from 8 .. 27
[08:27:19.000] <TB2> INFO: Test took 14059ms.
[08:27:19.022] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:19.023] <TB2> INFO: dacScan step from 28 .. 47
[08:27:34.855] <TB2> INFO: Test took 15832ms.
[08:27:35.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:35.090] <TB2> INFO: dacScan step from 48 .. 55
[08:27:43.817] <TB2> INFO: Test took 8727ms.
[08:27:43.872] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:59.832] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.909155 .. 44.932951
[08:27:59.911] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 54 (20) hits flags = 16 (plus default)
[08:27:59.920] <TB2> INFO: dacScan step from 1 .. 20
[08:28:14.088] <TB2> INFO: Test took 14168ms.
[08:28:14.111] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:14.111] <TB2> INFO: dacScan step from 21 .. 40
[08:28:28.391] <TB2> INFO: Test took 14279ms.
[08:28:28.504] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:28.535] <TB2> INFO: dacScan step from 41 .. 54
[08:28:41.844] <TB2> INFO: Test took 13309ms.
[08:28:41.943] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:57.740] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[08:28:57.740] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[08:28:57.749] <TB2> INFO: dacScan step from 15 .. 34
[08:29:23.798] <TB2> INFO: Test took 26049ms.
[08:29:23.870] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:23.881] <TB2> INFO: dacScan step from 35 .. 54







[08:29:54.304] <TB2> INFO: Test took 30423ms.
[08:29:54.580] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:54.636] <TB2> INFO: dacScan step from 55 .. 55
[08:29:59.032] <TB2> INFO: Test took 4396ms.
[08:29:59.058] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:13.502] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C0.dat
[08:30:13.502] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C1.dat
[08:30:13.503] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C2.dat
[08:30:13.503] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C3.dat
[08:30:13.503] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C4.dat
[08:30:13.503] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C5.dat
[08:30:13.504] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C6.dat
[08:30:13.504] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C7.dat
[08:30:13.504] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C8.dat
[08:30:13.504] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C9.dat
[08:30:13.505] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C10.dat
[08:30:13.505] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C11.dat
[08:30:13.505] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C12.dat
[08:30:13.505] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C13.dat
[08:30:13.506] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C14.dat
[08:30:13.506] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C15.dat
[08:30:13.506] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C0.dat
[08:30:13.519] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C1.dat
[08:30:13.526] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C2.dat
[08:30:13.535] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C3.dat
[08:30:13.544] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C4.dat
[08:30:13.551] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C5.dat
[08:30:13.559] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C6.dat
[08:30:13.568] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C7.dat
[08:30:13.577] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C8.dat
[08:30:13.585] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C9.dat
[08:30:13.593] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C10.dat
[08:30:13.602] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C11.dat
[08:30:13.610] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C12.dat
[08:30:13.619] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C13.dat
[08:30:13.627] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C14.dat
[08:30:13.635] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//trimParameters35_C15.dat
[08:30:13.644] <TB2> INFO: PixTestTrim::trimTest() done
[08:30:13.644] <TB2> INFO: vtrim: 177 184 117 95 105 102 111 95 126 104 102 111 110 90 111 101
[08:30:13.644] <TB2> INFO: vthrcomp: 89 97 96 88 86 95 81 85 100 84 90 80 96 80 85 87
[08:30:13.644] <TB2> INFO: vcal mean: 34.94 34.92 34.99 35.08 35.03 35.04 35.07 34.98 34.97 35.03 35.03 35.07 35.01 35.02 35.02 35.04
[08:30:13.644] <TB2> INFO: vcal RMS: 1.76 1.86 1.25 1.01 1.05 1.06 1.07 0.98 1.14 1.08 0.98 0.98 1.03 0.95 1.12 1.12
[08:30:13.644] <TB2> INFO: bits mean: 11.65 11.93 9.84 9.84 9.97 10.03 9.55 9.31 10.27 9.83 9.82 9.81 10.31 9.62 9.77 10.18
[08:30:13.644] <TB2> INFO: bits RMS: 1.69 1.60 2.55 2.44 2.50 2.61 2.49 2.83 2.41 2.45 2.44 2.42 2.42 2.53 2.49 2.40
[08:30:13.652] <TB2> INFO: ----------------------------------------------------------------------
[08:30:13.652] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[08:30:13.652] <TB2> INFO: ----------------------------------------------------------------------
[08:30:13.655] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:30:13.669] <TB2> INFO: dacScan step from 0 .. 19
[08:30:37.716] <TB2> INFO: Test took 24047ms.
[08:30:37.752] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:37.752] <TB2> INFO: dacScan step from 20 .. 39
[08:31:02.196] <TB2> INFO: Test took 24444ms.
[08:31:02.234] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:02.234] <TB2> INFO: dacScan step from 40 .. 59
[08:31:26.591] <TB2> INFO: Test took 24357ms.
[08:31:26.629] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:26.629] <TB2> INFO: dacScan step from 60 .. 79
[08:31:50.799] <TB2> INFO: Test took 24170ms.
[08:31:50.835] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:50.835] <TB2> INFO: dacScan step from 80 .. 99
[08:32:14.526] <TB2> INFO: Test took 23691ms.
[08:32:14.587] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:14.590] <TB2> INFO: dacScan step from 100 .. 119
[08:32:45.724] <TB2> INFO: Test took 31134ms.
[08:32:45.946] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:45.972] <TB2> INFO: dacScan step from 120 .. 139





[08:33:20.393] <TB2> INFO: Test took 34421ms.
[08:33:20.691] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:20.745] <TB2> INFO: dacScan step from 140 .. 159





[08:33:56.955] <TB2> INFO: Test took 36210ms.
[08:33:57.241] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:57.291] <TB2> INFO: dacScan step from 160 .. 179


[08:34:33.850] <TB2> INFO: Test took 36559ms.
[08:34:34.158] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:34.206] <TB2> INFO: dacScan step from 180 .. 199


[08:35:05.523] <TB2> INFO: Test took 31318ms.
[08:35:05.808] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:32.456] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 161 (20) hits flags = 16 (plus default)
[08:35:32.466] <TB2> INFO: dacScan step from 0 .. 19
[08:35:55.696] <TB2> INFO: Test took 23230ms.
[08:35:55.736] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:55.736] <TB2> INFO: dacScan step from 20 .. 39
[08:36:19.140] <TB2> INFO: Test took 23404ms.
[08:36:19.191] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:19.191] <TB2> INFO: dacScan step from 40 .. 59
[08:36:42.222] <TB2> INFO: Test took 23031ms.
[08:36:42.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:42.257] <TB2> INFO: dacScan step from 60 .. 79
[08:37:07.007] <TB2> INFO: Test took 24749ms.
[08:37:07.046] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:07.046] <TB2> INFO: dacScan step from 80 .. 99
[08:37:35.063] <TB2> INFO: Test took 28017ms.
[08:37:35.195] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:35.208] <TB2> INFO: dacScan step from 100 .. 119
[08:38:10.242] <TB2> INFO: Test took 35034ms.
[08:38:10.512] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:10.550] <TB2> INFO: dacScan step from 120 .. 139


[08:38:46.384] <TB2> INFO: Test took 35834ms.
[08:38:46.655] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:46.707] <TB2> INFO: dacScan step from 140 .. 159





[08:39:23.055] <TB2> INFO: Test took 36348ms.
[08:39:23.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:23.400] <TB2> INFO: dacScan step from 160 .. 161
[08:39:29.634] <TB2> INFO: Test took 6234ms.
[08:39:29.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:53.457] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[08:39:53.466] <TB2> INFO: dacScan step from 0 .. 19
[08:40:15.357] <TB2> INFO: Test took 21891ms.
[08:40:15.405] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:15.405] <TB2> INFO: dacScan step from 20 .. 39
[08:40:39.724] <TB2> INFO: Test took 24319ms.
[08:40:39.764] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:39.764] <TB2> INFO: dacScan step from 40 .. 59
[08:41:04.049] <TB2> INFO: Test took 24285ms.
[08:41:04.086] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:04.086] <TB2> INFO: dacScan step from 60 .. 79
[08:41:28.886] <TB2> INFO: Test took 24800ms.
[08:41:28.924] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:28.924] <TB2> INFO: dacScan step from 80 .. 99
[08:41:56.265] <TB2> INFO: Test took 27341ms.
[08:41:56.445] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:56.457] <TB2> INFO: dacScan step from 100 .. 119
[08:42:30.892] <TB2> INFO: Test took 34435ms.
[08:42:31.162] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:31.199] <TB2> INFO: dacScan step from 120 .. 139





[08:43:06.522] <TB2> INFO: Test took 35322ms.
[08:43:06.791] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:06.843] <TB2> INFO: dacScan step from 140 .. 151
[08:43:30.127] <TB2> INFO: Test took 23284ms.
[08:43:30.303] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:52.531] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[08:43:52.539] <TB2> INFO: dacScan step from 0 .. 19
[08:44:16.236] <TB2> INFO: Test took 23697ms.
[08:44:16.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:16.274] <TB2> INFO: dacScan step from 20 .. 39
[08:44:37.626] <TB2> INFO: Test took 21352ms.
[08:44:37.665] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:37.665] <TB2> INFO: dacScan step from 40 .. 59
[08:45:00.060] <TB2> INFO: Test took 22395ms.
[08:45:00.099] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:00.099] <TB2> INFO: dacScan step from 60 .. 79
[08:45:23.167] <TB2> INFO: Test took 23068ms.
[08:45:23.210] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:23.210] <TB2> INFO: dacScan step from 80 .. 99
[08:45:48.896] <TB2> INFO: Test took 25686ms.
[08:45:49.024] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:49.036] <TB2> INFO: dacScan step from 100 .. 119
[08:46:22.682] <TB2> INFO: Test took 33646ms.
[08:46:22.991] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:23.033] <TB2> INFO: dacScan step from 120 .. 139





[08:46:59.092] <TB2> INFO: Test took 36059ms.
[08:46:59.386] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:59.439] <TB2> INFO: dacScan step from 140 .. 151
[08:47:22.607] <TB2> INFO: Test took 23168ms.
[08:47:22.822] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:46.194] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[08:47:46.203] <TB2> INFO: dacScan step from 0 .. 19
[08:48:09.537] <TB2> INFO: Test took 23333ms.
[08:48:09.579] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:09.579] <TB2> INFO: dacScan step from 20 .. 39
[08:48:32.821] <TB2> INFO: Test took 23242ms.
[08:48:32.859] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:32.859] <TB2> INFO: dacScan step from 40 .. 59
[08:48:54.669] <TB2> INFO: Test took 21810ms.
[08:48:54.706] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:54.706] <TB2> INFO: dacScan step from 60 .. 79
[08:49:19.267] <TB2> INFO: Test took 24561ms.
[08:49:19.310] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:19.310] <TB2> INFO: dacScan step from 80 .. 99
[08:49:46.337] <TB2> INFO: Test took 27026ms.
[08:49:46.487] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:46.501] <TB2> INFO: dacScan step from 100 .. 119
[08:50:20.441] <TB2> INFO: Test took 33940ms.
[08:50:20.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:20.747] <TB2> INFO: dacScan step from 120 .. 139


[08:50:56.065] <TB2> INFO: Test took 35317ms.
[08:50:56.331] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:56.378] <TB2> INFO: dacScan step from 140 .. 151
[08:51:20.186] <TB2> INFO: Test took 23808ms.
[08:51:20.363] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:45.163] <TB2> INFO: PixTestTrim::trimBitTest() done
[08:51:45.164] <TB2> INFO: PixTestTrim::doTest() done, duration: 2615 seconds
[08:51:45.874] <TB2> INFO: ######################################################################
[08:51:45.874] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[08:51:45.874] <TB2> INFO: ######################################################################
[08:51:49.637] <TB2> INFO: Test took 3762ms.
[08:51:49.659] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:53.596] <TB2> INFO: Test took 3740ms.
[08:51:53.664] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:57.144] <TB2> INFO: Test took 3470ms.
[08:51:57.209] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:57.216] <TB2> INFO: The DUT currently contains the following objects:
[08:51:57.216] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:51:57.216] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:51:57.216] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:51:57.216] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:51:57.216] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:57.216] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.340] <TB2> INFO: Test took 1124ms.
[08:51:58.342] <TB2> INFO: The DUT currently contains the following objects:
[08:51:58.342] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:51:58.342] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:51:58.342] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:51:58.345] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:51:58.346] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:58.346] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.450] <TB2> INFO: Test took 1104ms.
[08:51:59.452] <TB2> INFO: The DUT currently contains the following objects:
[08:51:59.452] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:51:59.452] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:51:59.452] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:51:59.452] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:51:59.452] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.452] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.453] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.453] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.453] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:51:59.453] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.601] <TB2> INFO: Test took 1148ms.
[08:52:00.602] <TB2> INFO: The DUT currently contains the following objects:
[08:52:00.602] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:00.602] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:00.602] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:00.602] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:00.602] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:00.602] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.724] <TB2> INFO: Test took 1122ms.
[08:52:01.726] <TB2> INFO: The DUT currently contains the following objects:
[08:52:01.726] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:01.726] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:01.726] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:01.726] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:01.726] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.726] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.727] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:01.727] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.833] <TB2> INFO: Test took 1106ms.
[08:52:02.834] <TB2> INFO: The DUT currently contains the following objects:
[08:52:02.834] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:02.834] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:02.834] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:02.834] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:02.834] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.834] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.834] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:02.835] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.944] <TB2> INFO: Test took 1109ms.
[08:52:03.945] <TB2> INFO: The DUT currently contains the following objects:
[08:52:03.945] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:03.945] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:03.945] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:03.945] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:03.945] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.945] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.945] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.945] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:03.946] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.053] <TB2> INFO: Test took 1107ms.
[08:52:05.054] <TB2> INFO: The DUT currently contains the following objects:
[08:52:05.054] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:05.054] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:05.054] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:05.054] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:05.054] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.054] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.054] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.054] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.054] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.054] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:05.055] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.163] <TB2> INFO: Test took 1108ms.
[08:52:06.164] <TB2> INFO: The DUT currently contains the following objects:
[08:52:06.164] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:06.164] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:06.164] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:06.164] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:06.164] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.164] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.164] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.164] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.164] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.164] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.164] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:06.165] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.273] <TB2> INFO: Test took 1108ms.
[08:52:07.275] <TB2> INFO: The DUT currently contains the following objects:
[08:52:07.275] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:07.275] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:07.275] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:07.275] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:07.275] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.275] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.276] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.276] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.276] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.276] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:07.276] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.383] <TB2> INFO: Test took 1107ms.
[08:52:08.385] <TB2> INFO: The DUT currently contains the following objects:
[08:52:08.385] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:08.385] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:08.385] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:08.385] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:08.385] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.385] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.386] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.386] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.386] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.386] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:08.386] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.494] <TB2> INFO: Test took 1108ms.
[08:52:09.495] <TB2> INFO: The DUT currently contains the following objects:
[08:52:09.495] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:09.495] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:09.495] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:09.495] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:09.495] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.495] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.495] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:09.496] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.603] <TB2> INFO: Test took 1107ms.
[08:52:10.604] <TB2> INFO: The DUT currently contains the following objects:
[08:52:10.604] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:10.604] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:10.604] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:10.604] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:10.605] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:10.605] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.712] <TB2> INFO: Test took 1106ms.
[08:52:11.714] <TB2> INFO: The DUT currently contains the following objects:
[08:52:11.714] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:11.714] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:11.714] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:11.714] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:11.714] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.714] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.714] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.714] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.714] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.714] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.714] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.714] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.715] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.715] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.715] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.715] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.715] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.715] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.715] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:11.715] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.836] <TB2> INFO: Test took 1121ms.
[08:52:12.837] <TB2> INFO: The DUT currently contains the following objects:
[08:52:12.837] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:12.837] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:12.837] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:12.837] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:12.837] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.837] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.837] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.837] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.837] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.837] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:12.838] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.960] <TB2> INFO: Test took 1122ms.
[08:52:13.961] <TB2> INFO: The DUT currently contains the following objects:
[08:52:13.961] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:52:13.961] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:52:13.962] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:52:13.962] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:52:13.962] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:13.962] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:52:15.083] <TB2> INFO: Test took 1121ms.
[08:52:15.087] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:56:17.070] <TB2> INFO: Test took 241983ms.
[08:56:18.824] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:18.475] <TB2> INFO: Test took 239651ms.
[09:00:20.074] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.081] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.088] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.095] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.105] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.112] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.119] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.126] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.136] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.147] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.154] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[09:00:20.163] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[09:00:20.173] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[09:00:20.184] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[09:00:20.194] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.205] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.215] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.225] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.235] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.246] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:00:20.306] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:00:20.307] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:00:20.315] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:00:20.316] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:00:20.316] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:00:20.318] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:00:20.318] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:00:20.319] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:00:20.324] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:00:20.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:00:20.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:00:20.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:00:20.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:00:20.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:00:20.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:00:20.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:00:24.156] <TB2> INFO: Test took 3827ms.
[09:00:28.039] <TB2> INFO: Test took 3578ms.
[09:00:31.789] <TB2> INFO: Test took 3475ms.
[09:00:32.065] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:32.983] <TB2> INFO: Test took 918ms.
[09:00:32.986] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:34.093] <TB2> INFO: Test took 1107ms.
[09:00:34.096] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:35.232] <TB2> INFO: Test took 1136ms.
[09:00:35.236] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:36.358] <TB2> INFO: Test took 1122ms.
[09:00:36.360] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:37.481] <TB2> INFO: Test took 1121ms.
[09:00:37.484] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:38.607] <TB2> INFO: Test took 1123ms.
[09:00:38.611] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:39.717] <TB2> INFO: Test took 1106ms.
[09:00:39.720] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:40.845] <TB2> INFO: Test took 1125ms.
[09:00:40.849] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:41.959] <TB2> INFO: Test took 1111ms.
[09:00:41.963] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:43.068] <TB2> INFO: Test took 1105ms.
[09:00:43.072] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:44.178] <TB2> INFO: Test took 1106ms.
[09:00:44.181] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:45.287] <TB2> INFO: Test took 1106ms.
[09:00:45.291] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:46.397] <TB2> INFO: Test took 1106ms.
[09:00:46.401] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:47.507] <TB2> INFO: Test took 1107ms.
[09:00:47.511] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:48.617] <TB2> INFO: Test took 1107ms.
[09:00:48.621] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:49.728] <TB2> INFO: Test took 1107ms.
[09:00:49.732] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:50.857] <TB2> INFO: Test took 1126ms.
[09:00:50.861] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:51.998] <TB2> INFO: Test took 1137ms.
[09:00:52.002] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:53.123] <TB2> INFO: Test took 1121ms.
[09:00:53.127] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:54.233] <TB2> INFO: Test took 1107ms.
[09:00:54.236] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:55.358] <TB2> INFO: Test took 1122ms.
[09:00:55.362] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:56.483] <TB2> INFO: Test took 1121ms.
[09:00:56.487] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:57.594] <TB2> INFO: Test took 1107ms.
[09:00:57.597] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:58.747] <TB2> INFO: Test took 1150ms.
[09:00:58.751] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:00:59.857] <TB2> INFO: Test took 1107ms.
[09:00:59.860] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:01:00.967] <TB2> INFO: Test took 1107ms.
[09:01:00.970] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:01:02.076] <TB2> INFO: Test took 1106ms.
[09:01:02.080] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:01:03.186] <TB2> INFO: Test took 1107ms.
[09:01:03.189] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:01:04.310] <TB2> INFO: Test took 1121ms.
[09:01:04.314] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:01:05.435] <TB2> INFO: Test took 1122ms.
[09:01:05.438] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:01:06.559] <TB2> INFO: Test took 1121ms.
[09:01:06.562] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:01:07.712] <TB2> INFO: Test took 1150ms.
[09:01:08.243] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 562 seconds
[09:01:08.243] <TB2> INFO: PH scale (per ROC): 80 80 78 85 98 81 84 80 80 80 82 80 81 92 75 84
[09:01:08.243] <TB2> INFO: PH offset (per ROC): 158 178 170 162 144 139 171 145 167 145 145 147 159 147 174 144
[09:01:08.417] <TB2> INFO: ######################################################################
[09:01:08.417] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:01:08.417] <TB2> INFO: ######################################################################
[09:01:08.427] <TB2> INFO: scanning low vcal = 10
[09:01:12.413] <TB2> INFO: Test took 3986ms.
[09:01:12.418] <TB2> INFO: scanning low vcal = 20
[09:01:16.251] <TB2> INFO: Test took 3833ms.
[09:01:16.256] <TB2> INFO: scanning low vcal = 30
[09:01:20.262] <TB2> INFO: Test took 4006ms.
[09:01:20.275] <TB2> INFO: scanning low vcal = 40
[09:01:24.743] <TB2> INFO: Test took 4468ms.
[09:01:24.811] <TB2> INFO: scanning low vcal = 50
[09:01:29.481] <TB2> INFO: Test took 4670ms.
[09:01:29.568] <TB2> INFO: scanning low vcal = 60
[09:01:34.062] <TB2> INFO: Test took 4494ms.
[09:01:34.180] <TB2> INFO: scanning low vcal = 70
[09:01:38.983] <TB2> INFO: Test took 4803ms.
[09:01:39.044] <TB2> INFO: scanning low vcal = 80
[09:01:43.572] <TB2> INFO: Test took 4528ms.
[09:01:43.655] <TB2> INFO: scanning low vcal = 90
[09:01:48.136] <TB2> INFO: Test took 4481ms.
[09:01:48.229] <TB2> INFO: scanning low vcal = 100
[09:01:52.658] <TB2> INFO: Test took 4429ms.
[09:01:52.760] <TB2> INFO: scanning low vcal = 110
[09:01:57.134] <TB2> INFO: Test took 4374ms.
[09:01:57.198] <TB2> INFO: scanning low vcal = 120
[09:02:01.661] <TB2> INFO: Test took 4463ms.
[09:02:01.734] <TB2> INFO: scanning low vcal = 130
[09:02:06.126] <TB2> INFO: Test took 4392ms.
[09:02:06.219] <TB2> INFO: scanning low vcal = 140
[09:02:10.628] <TB2> INFO: Test took 4409ms.
[09:02:10.692] <TB2> INFO: scanning low vcal = 150
[09:02:15.031] <TB2> INFO: Test took 4339ms.
[09:02:15.109] <TB2> INFO: scanning low vcal = 160
[09:02:19.463] <TB2> INFO: Test took 4354ms.
[09:02:19.527] <TB2> INFO: scanning low vcal = 170
[09:02:23.966] <TB2> INFO: Test took 4439ms.
[09:02:24.040] <TB2> INFO: scanning low vcal = 180
[09:02:28.475] <TB2> INFO: Test took 4435ms.
[09:02:28.563] <TB2> INFO: scanning low vcal = 190
[09:02:33.130] <TB2> INFO: Test took 4567ms.
[09:02:33.235] <TB2> INFO: scanning low vcal = 200
[09:02:37.711] <TB2> INFO: Test took 4476ms.
[09:02:37.822] <TB2> INFO: scanning low vcal = 210
[09:02:42.164] <TB2> INFO: Test took 4342ms.
[09:02:42.229] <TB2> INFO: scanning low vcal = 220
[09:02:46.613] <TB2> INFO: Test took 4384ms.
[09:02:46.682] <TB2> INFO: scanning low vcal = 230
[09:02:51.027] <TB2> INFO: Test took 4345ms.
[09:02:51.113] <TB2> INFO: scanning low vcal = 240
[09:02:55.561] <TB2> INFO: Test took 4448ms.
[09:02:55.674] <TB2> INFO: scanning low vcal = 250
[09:03:00.134] <TB2> INFO: Test took 4460ms.
[09:03:00.222] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[09:03:04.630] <TB2> INFO: Test took 4408ms.
[09:03:04.697] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[09:03:09.088] <TB2> INFO: Test took 4391ms.
[09:03:09.159] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[09:03:13.600] <TB2> INFO: Test took 4441ms.
[09:03:13.691] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[09:03:18.133] <TB2> INFO: Test took 4442ms.
[09:03:18.201] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:03:22.612] <TB2> INFO: Test took 4411ms.
[09:03:23.245] <TB2> INFO: PixTestGainPedestal::measure() done
[09:03:55.341] <TB2> INFO: PixTestGainPedestal::fit() done
[09:03:55.341] <TB2> INFO: non-linearity mean: 0.956 0.958 0.957 0.957 0.951 0.960 0.961 0.958 0.961 0.957 0.948 0.956 0.951 0.952 0.953 0.957
[09:03:55.341] <TB2> INFO: non-linearity RMS: 0.005 0.005 0.006 0.005 0.006 0.005 0.005 0.006 0.005 0.004 0.006 0.006 0.005 0.005 0.006 0.005
[09:03:55.341] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[09:03:55.360] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[09:03:55.380] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[09:03:55.400] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[09:03:55.420] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[09:03:55.440] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[09:03:55.460] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[09:03:55.479] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[09:03:55.499] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[09:03:55.520] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[09:03:55.539] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[09:03:55.559] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[09:03:55.579] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[09:03:55.599] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[09:03:55.619] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[09:03:55.638] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2071_FullQualification_2015-08-13_09h40m_1439451613//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[09:03:55.658] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[09:03:55.664] <TB2> INFO: enter test to run
[09:03:55.664] <TB2> INFO: test: exit no parameter change
[09:03:56.096] <TB2> QUIET: Connection to board 0 closed.
[09:03:56.176] <TB2> INFO: pXar: this is the end, my friend