[11:38:15.914] <TB2> INFO: *** Welcome to pxar ***
[11:38:15.914] <TB2> INFO: *** Today: 2015/08/06
[11:38:15.914] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C15.dat
[11:38:15.915] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:38:15.915] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//defaultMaskFile.dat
[11:38:15.915] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters_C15.dat
[11:38:15.986] <TB2> INFO: clk: 4
[11:38:15.986] <TB2> INFO: ctr: 4
[11:38:15.986] <TB2> INFO: sda: 19
[11:38:15.986] <TB2> INFO: tin: 9
[11:38:15.986] <TB2> INFO: level: 15
[11:38:15.986] <TB2> INFO: triggerdelay: 0
[11:38:15.986] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[11:38:15.986] <TB2> INFO: Log level: INFO
[11:38:16.005] <TB2> INFO: Found DTB DTB_WXC55Z
[11:38:16.019] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[11:38:16.022] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[11:38:16.025] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[11:38:17.572] <TB2> INFO: DUT info:
[11:38:17.573] <TB2> INFO: The DUT currently contains the following objects:
[11:38:17.573] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:38:17.573] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:38:17.573] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:38:17.573] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:38:17.573] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.573] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:17.974] <TB2> INFO: enter 'restricted' command line mode
[11:38:17.974] <TB2> INFO: enter test to run
[11:38:17.974] <TB2> INFO: test: pretest no parameter change
[11:38:17.974] <TB2> INFO: running: pretest
[11:38:17.980] <TB2> INFO: ######################################################################
[11:38:17.980] <TB2> INFO: PixTestPretest::doTest()
[11:38:17.980] <TB2> INFO: ######################################################################
[11:38:17.982] <TB2> INFO: ----------------------------------------------------------------------
[11:38:17.982] <TB2> INFO: PixTestPretest::programROC()
[11:38:17.982] <TB2> INFO: ----------------------------------------------------------------------
[11:38:35.997] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:38:35.997] <TB2> INFO: IA differences per ROC: 20.9 23.3 18.5 17.7 18.5 18.5 19.3 15.3 19.3 20.1 17.7 17.7 18.5 18.5 18.5 20.1
[11:38:36.063] <TB2> INFO: ----------------------------------------------------------------------
[11:38:36.063] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:38:36.063] <TB2> INFO: ----------------------------------------------------------------------
[11:38:55.600] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 379.4 mA = 23.7125 mA/ROC
[11:38:55.603] <TB2> INFO: ----------------------------------------------------------------------
[11:38:55.603] <TB2> INFO: PixTestPretest::findWorkingPixel()
[11:38:55.603] <TB2> INFO: ----------------------------------------------------------------------
[11:39:07.254] <TB2> INFO: Test took 11645ms.
[11:39:07.565] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:39:07.585] <TB2> INFO: ----------------------------------------------------------------------
[11:39:07.585] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[11:39:07.585] <TB2> INFO: ----------------------------------------------------------------------
[11:39:19.269] <TB2> INFO: Test took 11679ms.
[11:39:19.565] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[11:39:19.565] <TB2> INFO: CalDel: 158 149 137 113 133 120 143 136 142 144 126 135 138 143 127 126
[11:39:19.565] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:39:19.572] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C0.dat
[11:39:19.572] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C1.dat
[11:39:19.572] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C2.dat
[11:39:19.572] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C3.dat
[11:39:19.573] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C4.dat
[11:39:19.573] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C5.dat
[11:39:19.573] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C6.dat
[11:39:19.574] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C7.dat
[11:39:19.574] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C8.dat
[11:39:19.574] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C9.dat
[11:39:19.575] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C10.dat
[11:39:19.575] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C11.dat
[11:39:19.575] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C12.dat
[11:39:19.575] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C13.dat
[11:39:19.576] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C14.dat
[11:39:19.576] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C15.dat
[11:39:19.576] <TB2> INFO: PixTestPretest::doTest() done, duration: 61 seconds
[11:39:19.673] <TB2> INFO: enter test to run
[11:39:19.673] <TB2> INFO: test: fulltest no parameter change
[11:39:19.673] <TB2> INFO: running: fulltest
[11:39:19.673] <TB2> INFO: ######################################################################
[11:39:19.673] <TB2> INFO: PixTestFullTest::doTest()
[11:39:19.673] <TB2> INFO: ######################################################################
[11:39:19.674] <TB2> INFO: ######################################################################
[11:39:19.674] <TB2> INFO: PixTestAlive::doTest()
[11:39:19.674] <TB2> INFO: ######################################################################
[11:39:19.676] <TB2> INFO: ----------------------------------------------------------------------
[11:39:19.676] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:39:19.676] <TB2> INFO: ----------------------------------------------------------------------
[11:39:23.944] <TB2> INFO: Test took 4267ms.
[11:39:23.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:24.201] <TB2> INFO: PixTestAlive::aliveTest() done
[11:39:24.201] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
[11:39:24.203] <TB2> INFO: ----------------------------------------------------------------------
[11:39:24.203] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:39:24.203] <TB2> INFO: ----------------------------------------------------------------------
[11:39:27.521] <TB2> INFO: Test took 3318ms.
[11:39:27.524] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:27.525] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:39:27.734] <TB2> INFO: PixTestAlive::maskTest() done
[11:39:27.734] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:39:27.736] <TB2> INFO: ----------------------------------------------------------------------
[11:39:27.736] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:39:27.736] <TB2> INFO: ----------------------------------------------------------------------
[11:39:31.960] <TB2> INFO: Test took 4223ms.
[11:39:31.987] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:32.198] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[11:39:32.198] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:39:32.198] <TB2> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[11:39:32.206] <TB2> INFO: ######################################################################
[11:39:32.206] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:39:32.206] <TB2> INFO: ######################################################################
[11:39:32.208] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[11:39:32.220] <TB2> INFO: dacScan step from 0 .. 29
[11:40:01.112] <TB2> INFO: Test took 28892ms.
[11:40:01.145] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:01.145] <TB2> INFO: dacScan step from 30 .. 59
[11:40:36.181] <TB2> INFO: Test took 35036ms.
[11:40:36.336] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:36.365] <TB2> INFO: dacScan step from 60 .. 89
[11:41:20.396] <TB2> INFO: Test took 44031ms.
[11:41:20.664] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:20.748] <TB2> INFO: dacScan step from 90 .. 119
[11:42:02.123] <TB2> INFO: Test took 41375ms.
[11:42:02.390] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:02.469] <TB2> INFO: dacScan step from 120 .. 149
[11:42:35.074] <TB2> INFO: Test took 32605ms.
[11:42:35.267] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:58.388] <TB2> INFO: PixTestBBMap::doTest() done, duration: 206 seconds
[11:42:58.388] <TB2> INFO: number of dead bumps (per ROC): 2 2 0 0 1 0 1 0 2 0 5 2 0 3 3 47
[11:42:58.388] <TB2> INFO: separation cut (per ROC): 79 84 92 75 72 79 78 73 68 70 74 73 80 96 72 59
[11:42:58.469] <TB2> INFO: ######################################################################
[11:42:58.469] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[11:42:58.469] <TB2> INFO: ######################################################################
[11:42:58.469] <TB2> INFO: ----------------------------------------------------------------------
[11:42:58.469] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[11:42:58.469] <TB2> INFO: ----------------------------------------------------------------------
[11:42:58.470] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[11:42:58.478] <TB2> INFO: dacScan step from 0 .. 3
[11:43:26.464] <TB2> INFO: Test took 27986ms.
[11:43:26.488] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:26.488] <TB2> INFO: dacScan step from 4 .. 7
[11:43:55.321] <TB2> INFO: Test took 28832ms.
[11:43:55.351] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:55.351] <TB2> INFO: dacScan step from 8 .. 11
[11:44:23.643] <TB2> INFO: Test took 28292ms.
[11:44:23.669] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:23.669] <TB2> INFO: dacScan step from 12 .. 15
[11:44:51.695] <TB2> INFO: Test took 28026ms.
[11:44:51.721] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:51.721] <TB2> INFO: dacScan step from 16 .. 19
[11:45:20.094] <TB2> INFO: Test took 28373ms.
[11:45:20.119] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:20.119] <TB2> INFO: dacScan step from 20 .. 23
[11:45:48.849] <TB2> INFO: Test took 28730ms.
[11:45:48.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:48.877] <TB2> INFO: dacScan step from 24 .. 27
[11:46:17.934] <TB2> INFO: Test took 29057ms.
[11:46:17.961] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:17.961] <TB2> INFO: dacScan step from 28 .. 31
[11:46:46.184] <TB2> INFO: Test took 28222ms.
[11:46:46.208] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:46.208] <TB2> INFO: dacScan step from 32 .. 35
[11:47:15.124] <TB2> INFO: Test took 28916ms.
[11:47:15.150] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:15.150] <TB2> INFO: dacScan step from 36 .. 39
[11:47:44.076] <TB2> INFO: Test took 28926ms.
[11:47:44.102] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:44.102] <TB2> INFO: dacScan step from 40 .. 43
[11:48:12.695] <TB2> INFO: Test took 28593ms.
[11:48:12.719] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:12.719] <TB2> INFO: dacScan step from 44 .. 47
[11:48:40.968] <TB2> INFO: Test took 28249ms.
[11:48:40.999] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:40.999] <TB2> INFO: dacScan step from 48 .. 51
[11:49:08.975] <TB2> INFO: Test took 27975ms.
[11:49:09.000] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:09.000] <TB2> INFO: dacScan step from 52 .. 55
[11:49:36.789] <TB2> INFO: Test took 27788ms.
[11:49:36.817] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:36.817] <TB2> INFO: dacScan step from 56 .. 59
[11:50:05.251] <TB2> INFO: Test took 28434ms.
[11:50:05.280] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:05.280] <TB2> INFO: dacScan step from 60 .. 63
[11:50:34.712] <TB2> INFO: Test took 29432ms.
[11:50:34.745] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:34.745] <TB2> INFO: dacScan step from 64 .. 67
[11:51:04.673] <TB2> INFO: Test took 29927ms.
[11:51:04.723] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:04.725] <TB2> INFO: dacScan step from 68 .. 71
[11:51:37.237] <TB2> INFO: Test took 32512ms.
[11:51:37.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:37.310] <TB2> INFO: dacScan step from 72 .. 75
[11:52:12.877] <TB2> INFO: Test took 35566ms.
[11:52:12.971] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:12.975] <TB2> INFO: dacScan step from 76 .. 79
[11:52:48.511] <TB2> INFO: Test took 35536ms.
[11:52:48.646] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:48.653] <TB2> INFO: dacScan step from 80 .. 83
[11:53:29.790] <TB2> INFO: Test took 41137ms.
[11:53:29.992] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:30.003] <TB2> INFO: dacScan step from 84 .. 87





[11:54:15.697] <TB2> INFO: Test took 45694ms.
[11:54:15.919] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:15.940] <TB2> INFO: dacScan step from 88 .. 91




[11:55:02.793] <TB2> INFO: Test took 46853ms.
[11:55:03.022] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:03.034] <TB2> INFO: dacScan step from 92 .. 95




[11:55:52.420] <TB2> INFO: Test took 49386ms.
[11:55:52.635] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:52.647] <TB2> INFO: dacScan step from 96 .. 99





[11:56:41.087] <TB2> INFO: Test took 48440ms.
[11:56:41.329] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:41.342] <TB2> INFO: dacScan step from 100 .. 103




[11:57:28.122] <TB2> INFO: Test took 46780ms.
[11:57:28.350] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:28.363] <TB2> INFO: dacScan step from 104 .. 107


[11:58:16.161] <TB2> INFO: Test took 47798ms.
[11:58:16.383] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:16.393] <TB2> INFO: dacScan step from 108 .. 111


[11:58:59.249] <TB2> INFO: Test took 42856ms.
[11:58:59.473] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:59.485] <TB2> INFO: dacScan step from 112 .. 115


[11:59:47.376] <TB2> INFO: Test took 47891ms.
[11:59:47.614] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:47.626] <TB2> INFO: dacScan step from 116 .. 119


[12:00:35.903] <TB2> INFO: Test took 48277ms.
[12:00:36.141] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:36.152] <TB2> INFO: dacScan step from 120 .. 123


[12:01:19.749] <TB2> INFO: Test took 43597ms.
[12:01:19.989] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:20.001] <TB2> INFO: dacScan step from 124 .. 127


[12:02:08.216] <TB2> INFO: Test took 48215ms.
[12:02:08.456] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:08.470] <TB2> INFO: dacScan step from 128 .. 131


[12:02:56.177] <TB2> INFO: Test took 47707ms.
[12:02:56.405] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:56.418] <TB2> INFO: dacScan step from 132 .. 135


[12:03:44.267] <TB2> INFO: Test took 47849ms.
[12:03:44.494] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:44.506] <TB2> INFO: dacScan step from 136 .. 139


[12:04:27.228] <TB2> INFO: Test took 42721ms.
[12:04:27.456] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:27.469] <TB2> INFO: dacScan step from 140 .. 143


[12:05:15.077] <TB2> INFO: Test took 47608ms.
[12:05:15.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:15.345] <TB2> INFO: dacScan step from 144 .. 147


[12:06:01.192] <TB2> INFO: Test took 45847ms.
[12:06:01.442] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:01.456] <TB2> INFO: dacScan step from 148 .. 149
[12:06:23.756] <TB2> INFO: Test took 22300ms.
[12:06:23.863] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:23.869] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:25.487] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:27.056] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:28.763] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:30.181] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:31.598] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:33.009] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:34.389] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:35.764] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:37.167] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:38.553] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:39.916] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:41.294] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:42.639] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:43.979] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:45.377] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:06:46.759] <TB2> INFO: PixTestScurves::scurves() done
[12:06:46.759] <TB2> INFO: Vcal mean: 85.91 79.66 83.55 84.76 75.08 76.51 81.09 80.46 68.77 71.20 81.91 78.23 86.95 90.60 77.69 89.53
[12:06:46.759] <TB2> INFO: Vcal RMS: 5.39 4.09 4.82 5.10 4.12 3.76 3.90 4.44 5.07 4.87 4.84 5.35 5.10 5.31 3.77 4.94
[12:06:46.759] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1428 seconds
[12:06:46.835] <TB2> INFO: ######################################################################
[12:06:46.835] <TB2> INFO: PixTestTrim::doTest()
[12:06:46.835] <TB2> INFO: ######################################################################
[12:06:46.836] <TB2> INFO: ----------------------------------------------------------------------
[12:06:46.836] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:06:46.836] <TB2> INFO: ----------------------------------------------------------------------
[12:06:46.920] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:06:46.920] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:06:46.928] <TB2> INFO: dacScan step from 0 .. 19
[12:07:06.917] <TB2> INFO: Test took 19989ms.
[12:07:06.943] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:06.943] <TB2> INFO: dacScan step from 20 .. 39
[12:07:26.403] <TB2> INFO: Test took 19460ms.
[12:07:26.425] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:26.425] <TB2> INFO: dacScan step from 40 .. 59
[12:07:45.879] <TB2> INFO: Test took 19454ms.
[12:07:45.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:45.901] <TB2> INFO: dacScan step from 60 .. 79
[12:08:05.708] <TB2> INFO: Test took 19807ms.
[12:08:05.733] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:05.734] <TB2> INFO: dacScan step from 80 .. 99
[12:08:29.534] <TB2> INFO: Test took 23801ms.
[12:08:29.630] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:29.646] <TB2> INFO: dacScan step from 100 .. 119
[12:08:55.258] <TB2> INFO: Test took 25612ms.
[12:08:55.433] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:55.471] <TB2> INFO: dacScan step from 120 .. 139
[12:09:22.623] <TB2> INFO: Test took 27152ms.
[12:09:22.768] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:22.796] <TB2> INFO: dacScan step from 140 .. 159
[12:09:41.937] <TB2> INFO: Test took 19141ms.
[12:09:41.991] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:02.742] <TB2> INFO: ROC 0 VthrComp = 90
[12:10:02.742] <TB2> INFO: ROC 1 VthrComp = 89
[12:10:02.742] <TB2> INFO: ROC 2 VthrComp = 93
[12:10:02.742] <TB2> INFO: ROC 3 VthrComp = 89
[12:10:02.742] <TB2> INFO: ROC 4 VthrComp = 82
[12:10:02.742] <TB2> INFO: ROC 5 VthrComp = 84
[12:10:02.742] <TB2> INFO: ROC 6 VthrComp = 89
[12:10:02.742] <TB2> INFO: ROC 7 VthrComp = 83
[12:10:02.742] <TB2> INFO: ROC 8 VthrComp = 74
[12:10:02.742] <TB2> INFO: ROC 9 VthrComp = 77
[12:10:02.742] <TB2> INFO: ROC 10 VthrComp = 85
[12:10:02.742] <TB2> INFO: ROC 11 VthrComp = 80
[12:10:02.742] <TB2> INFO: ROC 12 VthrComp = 89
[12:10:02.742] <TB2> INFO: ROC 13 VthrComp = 100
[12:10:02.742] <TB2> INFO: ROC 14 VthrComp = 86
[12:10:02.742] <TB2> INFO: ROC 15 VthrComp = 91
[12:10:02.742] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:10:02.742] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:10:02.750] <TB2> INFO: dacScan step from 0 .. 19
[12:10:22.324] <TB2> INFO: Test took 19574ms.
[12:10:22.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:22.344] <TB2> INFO: dacScan step from 20 .. 39
[12:10:42.531] <TB2> INFO: Test took 20187ms.
[12:10:42.561] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:42.564] <TB2> INFO: dacScan step from 40 .. 59
[12:11:09.602] <TB2> INFO: Test took 27038ms.
[12:11:09.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:09.818] <TB2> INFO: dacScan step from 60 .. 79
[12:11:39.101] <TB2> INFO: Test took 29283ms.
[12:11:39.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:39.318] <TB2> INFO: dacScan step from 80 .. 99
[12:12:05.269] <TB2> INFO: Test took 25951ms.
[12:12:05.429] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:05.476] <TB2> INFO: dacScan step from 100 .. 119
[12:12:32.557] <TB2> INFO: Test took 27081ms.
[12:12:32.783] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:32.829] <TB2> INFO: dacScan step from 120 .. 139
[12:13:02.238] <TB2> INFO: Test took 29408ms.
[12:13:02.413] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:02.453] <TB2> INFO: dacScan step from 140 .. 159
[12:13:31.957] <TB2> INFO: Test took 29505ms.
[12:13:32.117] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:57.448] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.8889 for pixel 20/15 mean/min/max = 46.0663/32.1267/60.0059
[12:13:57.448] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 56.7781 for pixel 0/75 mean/min/max = 44.8862/32.9739/56.7984
[12:13:57.450] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.6843 for pixel 9/9 mean/min/max = 45.0098/32.1599/57.8597
[12:13:57.450] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.6829 for pixel 9/12 mean/min/max = 45.9483/32.9639/58.9326
[12:13:57.451] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 55.194 for pixel 1/59 mean/min/max = 44.0376/32.5196/55.5556
[12:13:57.451] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 55.2484 for pixel 49/7 mean/min/max = 44.1127/32.8806/55.3448
[12:13:57.451] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 56.0046 for pixel 51/0 mean/min/max = 44.9625/33.4513/56.4738
[12:13:57.451] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.4822 for pixel 51/7 mean/min/max = 45.8173/32.8207/58.814
[12:13:57.452] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 57.9412 for pixel 0/47 mean/min/max = 45.9599/33.9239/57.9959
[12:13:57.452] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.5841 for pixel 0/71 mean/min/max = 46.7385/34.8845/58.5926
[12:13:57.452] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.8264 for pixel 0/5 mean/min/max = 45.3989/31.9301/58.8678
[12:13:57.452] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.9757 for pixel 0/78 mean/min/max = 47.0123/31.9349/62.0896
[12:13:57.452] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.6719 for pixel 19/78 mean/min/max = 45.7034/32.7078/58.6991
[12:13:57.453] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 57.4825 for pixel 17/19 mean/min/max = 44.412/31.3168/57.5072
[12:13:57.453] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 55.373 for pixel 23/5 mean/min/max = 44.0969/32.7218/55.4719
[12:13:57.453] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.7825 for pixel 8/76 mean/min/max = 45.6883/32.5003/58.8762
[12:13:57.453] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:16:22.895] <TB2> INFO: Test took 145442ms.
[12:16:24.313] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:16:24.322] <TB2> INFO: dacScan step from 0 .. 19
[12:16:54.767] <TB2> INFO: Test took 30445ms.
[12:16:54.820] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:54.822] <TB2> INFO: dacScan step from 20 .. 39
[12:17:39.636] <TB2> INFO: Test took 44814ms.
[12:17:39.878] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:39.907] <TB2> INFO: dacScan step from 40 .. 59




[12:18:25.563] <TB2> INFO: Test took 45656ms.
[12:18:25.896] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:25.941] <TB2> INFO: dacScan step from 60 .. 79


[12:19:17.085] <TB2> INFO: Test took 51144ms.
[12:19:17.365] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:17.407] <TB2> INFO: dacScan step from 80 .. 99


[12:20:05.994] <TB2> INFO: Test took 48587ms.
[12:20:06.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:06.319] <TB2> INFO: dacScan step from 100 .. 119


[12:20:54.357] <TB2> INFO: Test took 48038ms.
[12:20:54.634] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:54.680] <TB2> INFO: dacScan step from 120 .. 139





[12:21:44.764] <TB2> INFO: Test took 50084ms.
[12:21:45.059] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:45.101] <TB2> INFO: dacScan step from 140 .. 159


[12:22:32.064] <TB2> INFO: Test took 46963ms.
[12:22:32.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:32.405] <TB2> INFO: dacScan step from 160 .. 179


[12:23:18.573] <TB2> INFO: Test took 46168ms.
[12:23:18.840] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:18.894] <TB2> INFO: dacScan step from 180 .. 199


[12:24:06.142] <TB2> INFO: Test took 47248ms.
[12:24:06.411] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:31.778] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.017012 .. 255.000000
[12:24:31.857] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:24:31.866] <TB2> INFO: dacScan step from 0 .. 19
[12:24:48.734] <TB2> INFO: Test took 16868ms.
[12:24:48.759] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:48.759] <TB2> INFO: dacScan step from 20 .. 39
[12:25:08.723] <TB2> INFO: Test took 19964ms.
[12:25:08.809] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:08.825] <TB2> INFO: dacScan step from 40 .. 59
[12:25:32.459] <TB2> INFO: Test took 23634ms.
[12:25:32.605] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:32.652] <TB2> INFO: dacScan step from 60 .. 79
[12:25:54.527] <TB2> INFO: Test took 21875ms.
[12:25:54.666] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:54.705] <TB2> INFO: dacScan step from 80 .. 99
[12:26:19.864] <TB2> INFO: Test took 25159ms.
[12:26:20.006] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:20.043] <TB2> INFO: dacScan step from 100 .. 119
[12:26:44.935] <TB2> INFO: Test took 24892ms.
[12:26:45.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:45.126] <TB2> INFO: dacScan step from 120 .. 139
[12:27:08.783] <TB2> INFO: Test took 23656ms.
[12:27:08.932] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:08.977] <TB2> INFO: dacScan step from 140 .. 159
[12:27:30.965] <TB2> INFO: Test took 21988ms.
[12:27:31.113] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:31.156] <TB2> INFO: dacScan step from 160 .. 179
[12:27:56.052] <TB2> INFO: Test took 24896ms.
[12:27:56.188] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:56.228] <TB2> INFO: dacScan step from 180 .. 199
[12:28:22.284] <TB2> INFO: Test took 26056ms.
[12:28:22.429] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:22.472] <TB2> INFO: dacScan step from 200 .. 219
[12:28:45.504] <TB2> INFO: Test took 23032ms.
[12:28:45.705] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:45.767] <TB2> INFO: dacScan step from 220 .. 239
[12:29:09.986] <TB2> INFO: Test took 24219ms.
[12:29:10.128] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:10.168] <TB2> INFO: dacScan step from 240 .. 255
[12:29:31.049] <TB2> INFO: Test took 20881ms.
[12:29:31.175] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:03.254] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 1.970438 .. 69.675652
[12:30:03.345] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 1 .. 79 (20) hits flags = 16 (plus default)
[12:30:03.354] <TB2> INFO: dacScan step from 1 .. 20
[12:30:20.776] <TB2> INFO: Test took 17422ms.
[12:30:20.798] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:20.798] <TB2> INFO: dacScan step from 21 .. 40
[12:30:38.028] <TB2> INFO: Test took 17230ms.
[12:30:38.145] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:38.188] <TB2> INFO: dacScan step from 41 .. 60
[12:31:03.695] <TB2> INFO: Test took 25507ms.
[12:31:03.835] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:03.874] <TB2> INFO: dacScan step from 61 .. 79
[12:31:27.559] <TB2> INFO: Test took 23685ms.
[12:31:27.727] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:47.059] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 17.486680 .. 69.675652
[12:31:47.136] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 79 (20) hits flags = 16 (plus default)
[12:31:47.144] <TB2> INFO: dacScan step from 7 .. 26
[12:32:03.374] <TB2> INFO: Test took 16230ms.
[12:32:03.395] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:03.395] <TB2> INFO: dacScan step from 27 .. 46
[12:32:24.048] <TB2> INFO: Test took 20653ms.
[12:32:24.180] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:24.215] <TB2> INFO: dacScan step from 47 .. 66
[12:32:47.166] <TB2> INFO: Test took 22951ms.
[12:32:47.304] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:47.345] <TB2> INFO: dacScan step from 67 .. 79
[12:33:04.690] <TB2> INFO: Test took 17345ms.
[12:33:04.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:24.541] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.988987 .. 69.675652
[12:33:24.617] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 79 (20) hits flags = 16 (plus default)
[12:33:24.625] <TB2> INFO: dacScan step from 1 .. 20
[12:33:41.233] <TB2> INFO: Test took 16608ms.
[12:33:41.252] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:41.252] <TB2> INFO: dacScan step from 21 .. 40
[12:34:00.296] <TB2> INFO: Test took 19044ms.
[12:34:00.374] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:00.390] <TB2> INFO: dacScan step from 41 .. 60
[12:34:22.221] <TB2> INFO: Test took 21831ms.
[12:34:22.385] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:22.429] <TB2> INFO: dacScan step from 61 .. 79
[12:34:46.230] <TB2> INFO: Test took 23800ms.
[12:34:46.369] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:06.589] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:35:06.589] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[12:35:06.598] <TB2> INFO: dacScan step from 15 .. 34
[12:35:39.005] <TB2> INFO: Test took 32407ms.
[12:35:39.071] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:39.082] <TB2> INFO: dacScan step from 35 .. 54




[12:36:22.380] <TB2> INFO: Test took 43298ms.
[12:36:22.654] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:22.697] <TB2> INFO: dacScan step from 55 .. 55
[12:36:27.924] <TB2> INFO: Test took 5226ms.
[12:36:27.944] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:42.125] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:36:42.125] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:36:42.126] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:36:42.126] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:36:42.126] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:36:42.126] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:36:42.127] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:36:42.127] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:36:42.127] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:36:42.127] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:36:42.127] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:36:42.127] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:36:42.128] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:36:42.128] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:36:42.128] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:36:42.128] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:36:42.128] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:36:42.139] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:36:42.146] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:36:42.152] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:36:42.158] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:36:42.165] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:36:42.171] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:36:42.178] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:36:42.184] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:36:42.190] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:36:42.197] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:36:42.204] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:36:42.210] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:36:42.217] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:36:42.224] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:36:42.231] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:36:42.237] <TB2> INFO: PixTestTrim::trimTest() done
[12:36:42.237] <TB2> INFO: vtrim: 193 113 111 99 97 95 100 88 103 95 106 106 103 106 101 112
[12:36:42.237] <TB2> INFO: vthrcomp: 90 89 93 89 82 84 89 83 74 77 85 80 89 100 86 91
[12:36:42.237] <TB2> INFO: vcal mean: 34.83 35.00 34.98 35.03 35.01 35.01 35.02 35.06 35.06 35.03 35.03 35.03 34.91 35.00 35.06 35.08
[12:36:42.237] <TB2> INFO: vcal RMS: 2.52 0.95 0.97 1.04 0.95 0.95 0.98 0.99 0.94 0.91 1.00 1.15 1.05 1.01 1.02 1.14
[12:36:42.237] <TB2> INFO: bits mean: 11.82 9.98 9.67 9.68 10.10 10.12 9.71 9.07 9.19 8.67 9.62 9.27 9.72 10.15 10.56 10.30
[12:36:42.237] <TB2> INFO: bits RMS: 1.58 2.45 2.61 2.47 2.43 2.32 2.45 2.80 2.51 2.59 2.70 2.72 2.55 2.56 2.20 2.27
[12:36:42.244] <TB2> INFO: ----------------------------------------------------------------------
[12:36:42.244] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:36:42.244] <TB2> INFO: ----------------------------------------------------------------------
[12:36:42.245] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:36:42.256] <TB2> INFO: dacScan step from 0 .. 19
[12:37:13.496] <TB2> INFO: Test took 31240ms.
[12:37:13.528] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:13.528] <TB2> INFO: dacScan step from 20 .. 39
[12:37:45.193] <TB2> INFO: Test took 31664ms.
[12:37:45.230] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:45.230] <TB2> INFO: dacScan step from 40 .. 59
[12:38:16.206] <TB2> INFO: Test took 30976ms.
[12:38:16.243] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:16.243] <TB2> INFO: dacScan step from 60 .. 79
[12:38:47.981] <TB2> INFO: Test took 31738ms.
[12:38:48.018] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:48.018] <TB2> INFO: dacScan step from 80 .. 99
[12:39:23.779] <TB2> INFO: Test took 35761ms.
[12:39:23.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:23.872] <TB2> INFO: dacScan step from 100 .. 119
[12:40:11.857] <TB2> INFO: Test took 47985ms.
[12:40:12.115] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:12.150] <TB2> INFO: dacScan step from 120 .. 139





[12:41:00.655] <TB2> INFO: Test took 48505ms.
[12:41:01.038] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:01.086] <TB2> INFO: dacScan step from 140 .. 159


[12:41:50.410] <TB2> INFO: Test took 49324ms.
[12:41:50.673] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:50.715] <TB2> INFO: dacScan step from 160 .. 179


[12:42:42.993] <TB2> INFO: Test took 52278ms.
[12:42:43.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:43.316] <TB2> INFO: dacScan step from 180 .. 199


[12:43:35.189] <TB2> INFO: Test took 51873ms.
[12:43:35.467] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:02.092] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 150 (20) hits flags = 16 (plus default)
[12:44:02.101] <TB2> INFO: dacScan step from 0 .. 19
[12:44:33.184] <TB2> INFO: Test took 31083ms.
[12:44:33.217] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:33.217] <TB2> INFO: dacScan step from 20 .. 39
[12:45:04.083] <TB2> INFO: Test took 30866ms.
[12:45:04.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:04.122] <TB2> INFO: dacScan step from 40 .. 59
[12:45:34.185] <TB2> INFO: Test took 30063ms.
[12:45:34.221] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:34.221] <TB2> INFO: dacScan step from 60 .. 79
[12:46:06.490] <TB2> INFO: Test took 32269ms.
[12:46:06.534] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:06.535] <TB2> INFO: dacScan step from 80 .. 99
[12:46:46.221] <TB2> INFO: Test took 39686ms.
[12:46:46.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:46.427] <TB2> INFO: dacScan step from 100 .. 119





[12:47:36.955] <TB2> INFO: Test took 50528ms.
[12:47:37.220] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:37.256] <TB2> INFO: dacScan step from 120 .. 139





[12:48:27.756] <TB2> INFO: Test took 50500ms.
[12:48:28.019] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:28.059] <TB2> INFO: dacScan step from 140 .. 150
[12:48:57.534] <TB2> INFO: Test took 29475ms.
[12:48:57.686] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:21.532] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 138 (20) hits flags = 16 (plus default)
[12:49:21.541] <TB2> INFO: dacScan step from 0 .. 19
[12:49:53.477] <TB2> INFO: Test took 31936ms.
[12:49:53.513] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:53.513] <TB2> INFO: dacScan step from 20 .. 39
[12:50:25.754] <TB2> INFO: Test took 32241ms.
[12:50:25.787] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:25.787] <TB2> INFO: dacScan step from 40 .. 59
[12:50:57.533] <TB2> INFO: Test took 31745ms.
[12:50:57.567] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:57.567] <TB2> INFO: dacScan step from 60 .. 79
[12:51:29.361] <TB2> INFO: Test took 31794ms.
[12:51:29.399] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:29.399] <TB2> INFO: dacScan step from 80 .. 99
[12:52:06.294] <TB2> INFO: Test took 36895ms.
[12:52:06.521] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:06.543] <TB2> INFO: dacScan step from 100 .. 119





[12:52:52.186] <TB2> INFO: Test took 45643ms.
[12:52:52.469] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:52.521] <TB2> INFO: dacScan step from 120 .. 138




[12:53:35.958] <TB2> INFO: Test took 43437ms.
[12:53:36.221] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:57.985] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 137 (20) hits flags = 16 (plus default)
[12:53:57.994] <TB2> INFO: dacScan step from 0 .. 19
[12:54:29.391] <TB2> INFO: Test took 31397ms.
[12:54:29.428] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:29.428] <TB2> INFO: dacScan step from 20 .. 39
[12:55:01.072] <TB2> INFO: Test took 31644ms.
[12:55:01.106] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:01.106] <TB2> INFO: dacScan step from 40 .. 59
[12:55:33.302] <TB2> INFO: Test took 32196ms.
[12:55:33.338] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:33.338] <TB2> INFO: dacScan step from 60 .. 79
[12:56:04.664] <TB2> INFO: Test took 31326ms.
[12:56:04.708] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:04.709] <TB2> INFO: dacScan step from 80 .. 99
[12:56:43.529] <TB2> INFO: Test took 38820ms.
[12:56:43.703] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:43.722] <TB2> INFO: dacScan step from 100 .. 119

[12:57:30.288] <TB2> INFO: Test took 46566ms.
[12:57:30.563] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:30.599] <TB2> INFO: dacScan step from 120 .. 137
[12:58:10.978] <TB2> INFO: Test took 40379ms.
[12:58:11.239] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:32.402] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 137 (20) hits flags = 16 (plus default)
[12:58:32.411] <TB2> INFO: dacScan step from 0 .. 19
[12:59:04.441] <TB2> INFO: Test took 32030ms.
[12:59:04.475] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:04.475] <TB2> INFO: dacScan step from 20 .. 39
[12:59:35.796] <TB2> INFO: Test took 31321ms.
[12:59:35.828] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:35.828] <TB2> INFO: dacScan step from 40 .. 59
[13:00:07.845] <TB2> INFO: Test took 32017ms.
[13:00:07.884] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:07.884] <TB2> INFO: dacScan step from 60 .. 79
[13:00:39.952] <TB2> INFO: Test took 32068ms.
[13:00:39.995] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:39.996] <TB2> INFO: dacScan step from 80 .. 99
[13:01:22.826] <TB2> INFO: Test took 42830ms.
[13:01:22.999] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:23.017] <TB2> INFO: dacScan step from 100 .. 119






[13:02:14.523] <TB2> INFO: Test took 51506ms.
[13:02:14.808] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:14.846] <TB2> INFO: dacScan step from 120 .. 137
[13:02:55.816] <TB2> INFO: Test took 40970ms.
[13:02:56.069] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:17.441] <TB2> INFO: PixTestTrim::trimBitTest() done
[13:03:17.442] <TB2> INFO: PixTestTrim::doTest() done, duration: 3390 seconds
[13:03:18.124] <TB2> INFO: ######################################################################
[13:03:18.124] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:03:18.124] <TB2> INFO: ######################################################################
[13:03:22.503] <TB2> INFO: Test took 4378ms.
[13:03:22.533] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:27.069] <TB2> INFO: Test took 4340ms.
[13:03:27.136] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:31.547] <TB2> INFO: Test took 4402ms.
[13:03:31.614] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:31.621] <TB2> INFO: The DUT currently contains the following objects:
[13:03:31.621] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:31.621] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:31.621] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:31.621] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:31.621] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:31.621] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.735] <TB2> INFO: Test took 1114ms.
[13:03:32.737] <TB2> INFO: The DUT currently contains the following objects:
[13:03:32.737] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:32.737] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:32.737] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:32.737] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:32.737] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:32.737] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.865] <TB2> INFO: Test took 1128ms.
[13:03:33.866] <TB2> INFO: The DUT currently contains the following objects:
[13:03:33.866] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:33.866] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:33.866] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:33.866] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:33.866] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.866] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.866] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.866] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.866] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.866] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.866] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.866] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.866] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.867] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.867] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.867] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.867] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.867] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.867] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:33.867] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.011] <TB2> INFO: Test took 1144ms.
[13:03:35.012] <TB2> INFO: The DUT currently contains the following objects:
[13:03:35.013] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:35.013] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:35.013] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:35.013] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:35.013] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:35.013] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.155] <TB2> INFO: Test took 1142ms.
[13:03:36.156] <TB2> INFO: The DUT currently contains the following objects:
[13:03:36.156] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:36.156] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:36.156] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:36.156] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:36.156] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.156] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.156] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.156] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.156] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.156] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.156] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.156] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.156] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.157] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.157] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.157] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.157] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.157] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.157] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:36.157] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.331] <TB2> INFO: Test took 1174ms.
[13:03:37.332] <TB2> INFO: The DUT currently contains the following objects:
[13:03:37.332] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:37.332] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:37.332] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:37.332] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:37.332] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.332] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.332] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.332] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:37.333] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.445] <TB2> INFO: Test took 1112ms.
[13:03:38.446] <TB2> INFO: The DUT currently contains the following objects:
[13:03:38.446] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:38.446] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:38.446] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:38.446] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:38.446] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:38.446] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.591] <TB2> INFO: Test took 1145ms.
[13:03:39.592] <TB2> INFO: The DUT currently contains the following objects:
[13:03:39.592] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:39.592] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:39.592] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:39.592] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:39.592] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:39.593] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.739] <TB2> INFO: Test took 1146ms.
[13:03:40.740] <TB2> INFO: The DUT currently contains the following objects:
[13:03:40.740] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:40.740] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:40.740] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:40.740] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:40.740] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.740] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.740] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.740] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:40.741] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.885] <TB2> INFO: Test took 1144ms.
[13:03:41.887] <TB2> INFO: The DUT currently contains the following objects:
[13:03:41.887] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:41.887] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:41.887] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:41.887] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:41.887] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:41.887] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.031] <TB2> INFO: Test took 1144ms.
[13:03:43.032] <TB2> INFO: The DUT currently contains the following objects:
[13:03:43.032] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:43.032] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:43.032] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:43.032] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:43.032] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.032] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.033] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.033] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:43.033] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.175] <TB2> INFO: Test took 1142ms.
[13:03:44.176] <TB2> INFO: The DUT currently contains the following objects:
[13:03:44.176] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:44.176] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:44.177] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:44.177] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:44.177] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.177] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:44.178] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.304] <TB2> INFO: Test took 1126ms.
[13:03:45.305] <TB2> INFO: The DUT currently contains the following objects:
[13:03:45.305] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:45.305] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:45.305] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:45.305] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:45.305] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:45.305] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.417] <TB2> INFO: Test took 1112ms.
[13:03:46.419] <TB2> INFO: The DUT currently contains the following objects:
[13:03:46.419] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:46.419] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:46.419] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:46.419] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:46.419] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:46.419] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.548] <TB2> INFO: Test took 1129ms.
[13:03:47.549] <TB2> INFO: The DUT currently contains the following objects:
[13:03:47.549] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:47.549] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:47.549] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:47.549] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:47.549] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.549] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.549] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.549] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.549] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.549] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.549] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:47.550] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.725] <TB2> INFO: Test took 1175ms.
[13:03:48.727] <TB2> INFO: The DUT currently contains the following objects:
[13:03:48.727] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:48.727] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:03:48.727] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:03:48.727] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:48.727] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:48.727] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:49.868] <TB2> INFO: Test took 1141ms.
[13:03:49.870] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:09:53.934] <TB2> INFO: Test took 364064ms.
[13:09:55.577] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:03.601] <TB2> INFO: Test took 368024ms.
[13:16:05.313] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.320] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[13:16:05.330] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[13:16:05.336] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[13:16:05.344] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.350] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.358] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.365] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.374] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.384] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.392] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.402] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.411] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.420] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.430] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.439] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.449] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.457] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.463] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:16:05.486] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:16:05.486] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:16:05.486] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:16:05.486] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:16:05.486] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:16:05.486] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:16:05.486] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:16:05.486] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:16:05.487] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:16:05.499] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:16:05.499] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:16:05.499] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:16:05.499] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:16:05.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:16:05.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:16:05.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:16:09.832] <TB2> INFO: Test took 4330ms.
[13:16:14.440] <TB2> INFO: Test took 4338ms.
[13:16:19.326] <TB2> INFO: Test took 4626ms.
[13:16:19.595] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:20.568] <TB2> INFO: Test took 974ms.
[13:16:20.570] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:21.745] <TB2> INFO: Test took 1175ms.
[13:16:21.747] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:22.891] <TB2> INFO: Test took 1144ms.
[13:16:22.893] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:24.036] <TB2> INFO: Test took 1143ms.
[13:16:24.038] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:25.198] <TB2> INFO: Test took 1160ms.
[13:16:25.200] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:26.329] <TB2> INFO: Test took 1129ms.
[13:16:26.331] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:27.492] <TB2> INFO: Test took 1161ms.
[13:16:27.495] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:28.638] <TB2> INFO: Test took 1143ms.
[13:16:28.640] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:29.785] <TB2> INFO: Test took 1145ms.
[13:16:29.788] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:30.903] <TB2> INFO: Test took 1116ms.
[13:16:30.905] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:32.079] <TB2> INFO: Test took 1175ms.
[13:16:32.082] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:33.210] <TB2> INFO: Test took 1128ms.
[13:16:33.213] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:34.373] <TB2> INFO: Test took 1160ms.
[13:16:34.376] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:35.520] <TB2> INFO: Test took 1144ms.
[13:16:35.523] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:36.636] <TB2> INFO: Test took 1114ms.
[13:16:36.638] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:37.798] <TB2> INFO: Test took 1160ms.
[13:16:37.801] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:38.929] <TB2> INFO: Test took 1129ms.
[13:16:38.932] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:40.076] <TB2> INFO: Test took 1145ms.
[13:16:40.079] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:41.238] <TB2> INFO: Test took 1159ms.
[13:16:41.241] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:42.369] <TB2> INFO: Test took 1128ms.
[13:16:42.372] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:43.501] <TB2> INFO: Test took 1130ms.
[13:16:43.504] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:44.695] <TB2> INFO: Test took 1191ms.
[13:16:44.698] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:45.827] <TB2> INFO: Test took 1129ms.
[13:16:45.830] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:46.990] <TB2> INFO: Test took 1160ms.
[13:16:46.993] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:48.136] <TB2> INFO: Test took 1143ms.
[13:16:48.138] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:49.251] <TB2> INFO: Test took 1113ms.
[13:16:49.254] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:50.384] <TB2> INFO: Test took 1130ms.
[13:16:50.386] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:51.525] <TB2> INFO: Test took 1139ms.
[13:16:51.527] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:52.656] <TB2> INFO: Test took 1129ms.
[13:16:52.659] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:53.820] <TB2> INFO: Test took 1161ms.
[13:16:53.822] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:54.981] <TB2> INFO: Test took 1159ms.
[13:16:54.983] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:56.127] <TB2> INFO: Test took 1144ms.
[13:16:56.661] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 818 seconds
[13:16:56.661] <TB2> INFO: PH scale (per ROC): 80 85 92 86 98 85 89 79 84 94 82 84 81 87 87 80
[13:16:56.661] <TB2> INFO: PH offset (per ROC): 171 153 154 176 150 141 150 163 150 127 148 162 173 167 147 169
[13:16:56.835] <TB2> INFO: ######################################################################
[13:16:56.835] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:16:56.835] <TB2> INFO: ######################################################################
[13:16:56.844] <TB2> INFO: scanning low vcal = 10
[13:17:01.231] <TB2> INFO: Test took 4387ms.
[13:17:01.236] <TB2> INFO: scanning low vcal = 20
[13:17:05.586] <TB2> INFO: Test took 4350ms.
[13:17:05.591] <TB2> INFO: scanning low vcal = 30
[13:17:10.104] <TB2> INFO: Test took 4513ms.
[13:17:10.116] <TB2> INFO: scanning low vcal = 40
[13:17:15.482] <TB2> INFO: Test took 5366ms.
[13:17:15.558] <TB2> INFO: scanning low vcal = 50
[13:17:20.658] <TB2> INFO: Test took 5099ms.
[13:17:20.717] <TB2> INFO: scanning low vcal = 60
[13:17:25.944] <TB2> INFO: Test took 5227ms.
[13:17:26.005] <TB2> INFO: scanning low vcal = 70
[13:17:31.160] <TB2> INFO: Test took 5155ms.
[13:17:31.217] <TB2> INFO: scanning low vcal = 80
[13:17:36.443] <TB2> INFO: Test took 5226ms.
[13:17:36.509] <TB2> INFO: scanning low vcal = 90
[13:17:41.755] <TB2> INFO: Test took 5246ms.
[13:17:41.811] <TB2> INFO: scanning low vcal = 100
[13:17:47.115] <TB2> INFO: Test took 5304ms.
[13:17:47.175] <TB2> INFO: scanning low vcal = 110
[13:17:52.444] <TB2> INFO: Test took 5269ms.
[13:17:52.518] <TB2> INFO: scanning low vcal = 120
[13:17:57.812] <TB2> INFO: Test took 5294ms.
[13:17:57.877] <TB2> INFO: scanning low vcal = 130
[13:18:03.238] <TB2> INFO: Test took 5361ms.
[13:18:03.298] <TB2> INFO: scanning low vcal = 140
[13:18:08.338] <TB2> INFO: Test took 5040ms.
[13:18:08.395] <TB2> INFO: scanning low vcal = 150
[13:18:13.523] <TB2> INFO: Test took 5128ms.
[13:18:13.592] <TB2> INFO: scanning low vcal = 160
[13:18:18.834] <TB2> INFO: Test took 5242ms.
[13:18:18.895] <TB2> INFO: scanning low vcal = 170
[13:18:23.995] <TB2> INFO: Test took 5100ms.
[13:18:24.051] <TB2> INFO: scanning low vcal = 180
[13:18:29.134] <TB2> INFO: Test took 5083ms.
[13:18:29.210] <TB2> INFO: scanning low vcal = 190
[13:18:34.634] <TB2> INFO: Test took 5424ms.
[13:18:34.706] <TB2> INFO: scanning low vcal = 200
[13:18:40.139] <TB2> INFO: Test took 5433ms.
[13:18:40.202] <TB2> INFO: scanning low vcal = 210
[13:18:45.585] <TB2> INFO: Test took 5383ms.
[13:18:45.644] <TB2> INFO: scanning low vcal = 220
[13:18:51.039] <TB2> INFO: Test took 5395ms.
[13:18:51.106] <TB2> INFO: scanning low vcal = 230
[13:18:56.377] <TB2> INFO: Test took 5271ms.
[13:18:56.435] <TB2> INFO: scanning low vcal = 240
[13:19:01.719] <TB2> INFO: Test took 5284ms.
[13:19:01.789] <TB2> INFO: scanning low vcal = 250
[13:19:06.579] <TB2> INFO: Test took 4790ms.
[13:19:06.634] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[13:19:11.268] <TB2> INFO: Test took 4634ms.
[13:19:11.323] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[13:19:16.059] <TB2> INFO: Test took 4736ms.
[13:19:16.113] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[13:19:20.978] <TB2> INFO: Test took 4865ms.
[13:19:21.034] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[13:19:25.723] <TB2> INFO: Test took 4689ms.
[13:19:25.776] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:19:30.547] <TB2> INFO: Test took 4771ms.
[13:19:31.031] <TB2> INFO: PixTestGainPedestal::measure() done
[13:20:02.305] <TB2> INFO: PixTestGainPedestal::fit() done
[13:20:02.305] <TB2> INFO: non-linearity mean: 0.962 0.954 0.953 0.957 0.945 0.951 0.958 0.961 0.948 0.953 0.953 0.956 0.962 0.953 0.956 0.954
[13:20:02.305] <TB2> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.006 0.005 0.005 0.005 0.005 0.006 0.006 0.005 0.006 0.005 0.006 0.008
[13:20:02.305] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:20:02.323] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:20:02.341] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:20:02.359] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:20:02.377] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:20:02.396] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:20:02.414] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:20:02.448] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:20:02.466] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:20:02.484] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:20:02.502] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:20:02.521] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:20:02.539] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:20:02.558] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:20:02.576] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:20:02.594] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2066_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:20:02.612] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 185 seconds
[13:20:02.621] <TB2> INFO: enter test to run
[13:20:02.622] <TB2> INFO: test: exit no parameter change
[13:20:03.052] <TB2> QUIET: Connection to board 0 closed.
[13:20:03.068] <TB2> INFO: pXar: this is the end, my friend