[14:02:05.373] <TB0> INFO: *** Welcome to pxar ***
[14:02:05.373] <TB0> INFO: *** Today: 2015/08/06
[14:02:05.373] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C15.dat
[14:02:05.374] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:02:05.374] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//defaultMaskFile.dat
[14:02:05.374] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters_C15.dat
[14:02:05.435] <TB0> INFO: clk: 4
[14:02:05.435] <TB0> INFO: ctr: 4
[14:02:05.435] <TB0> INFO: sda: 19
[14:02:05.435] <TB0> INFO: tin: 9
[14:02:05.435] <TB0> INFO: level: 15
[14:02:05.435] <TB0> INFO: triggerdelay: 0
[14:02:05.435] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[14:02:05.435] <TB0> INFO: Log level: INFO
[14:02:05.450] <TB0> INFO: Found DTB DTB_WWVASW
[14:02:05.461] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[14:02:05.464] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[14:02:05.466] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[14:02:06.981] <TB0> INFO: DUT info:
[14:02:06.981] <TB0> INFO: The DUT currently contains the following objects:
[14:02:06.981] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:02:06.981] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:02:06.981] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:02:06.981] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:02:06.981] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:06.981] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:07.382] <TB0> INFO: enter 'restricted' command line mode
[14:02:07.382] <TB0> INFO: enter test to run
[14:02:07.382] <TB0> INFO: test: pretest no parameter change
[14:02:07.382] <TB0> INFO: running: pretest
[14:02:07.386] <TB0> INFO: ######################################################################
[14:02:07.386] <TB0> INFO: PixTestPretest::doTest()
[14:02:07.386] <TB0> INFO: ######################################################################
[14:02:07.388] <TB0> INFO: ----------------------------------------------------------------------
[14:02:07.388] <TB0> INFO: PixTestPretest::programROC()
[14:02:07.388] <TB0> INFO: ----------------------------------------------------------------------
[14:02:25.403] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:02:25.403] <TB0> INFO: IA differences per ROC: 18.5 18.5 17.7 18.5 20.1 19.3 18.5 18.5 20.1 19.3 19.3 19.3 18.5 18.5 20.1 19.3
[14:02:25.471] <TB0> INFO: ----------------------------------------------------------------------
[14:02:25.471] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:02:25.471] <TB0> INFO: ----------------------------------------------------------------------
[14:02:29.621] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 376.2 mA = 23.5125 mA/ROC
[14:02:29.624] <TB0> INFO: ----------------------------------------------------------------------
[14:02:29.624] <TB0> INFO: PixTestPretest::findWorkingPixel()
[14:02:29.624] <TB0> INFO: ----------------------------------------------------------------------
[14:02:41.900] <TB0> INFO: Test took 12269ms.
[14:02:42.197] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:02:42.217] <TB0> INFO: ----------------------------------------------------------------------
[14:02:42.217] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[14:02:42.217] <TB0> INFO: ----------------------------------------------------------------------
[14:02:56.352] <TB0> INFO: Test took 14130ms.
[14:02:56.647] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[14:02:56.647] <TB0> INFO: CalDel: 145 136 129 134 133 126 124 119 143 120 149 138 141 129 132 141
[14:02:56.647] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:02:56.651] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C0.dat
[14:02:56.651] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C1.dat
[14:02:56.652] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C2.dat
[14:02:56.652] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C3.dat
[14:02:56.652] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C4.dat
[14:02:56.652] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C5.dat
[14:02:56.653] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C6.dat
[14:02:56.653] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C7.dat
[14:02:56.653] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C8.dat
[14:02:56.653] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C9.dat
[14:02:56.654] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C10.dat
[14:02:56.654] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C11.dat
[14:02:56.654] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C12.dat
[14:02:56.654] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C13.dat
[14:02:56.655] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C14.dat
[14:02:56.655] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters_C15.dat
[14:02:56.655] <TB0> INFO: PixTestPretest::doTest() done, duration: 49 seconds
[14:02:56.746] <TB0> INFO: enter test to run
[14:02:56.746] <TB0> INFO: test: fulltest no parameter change
[14:02:56.746] <TB0> INFO: running: fulltest
[14:02:56.746] <TB0> INFO: ######################################################################
[14:02:56.746] <TB0> INFO: PixTestFullTest::doTest()
[14:02:56.746] <TB0> INFO: ######################################################################
[14:02:56.747] <TB0> INFO: ######################################################################
[14:02:56.747] <TB0> INFO: PixTestAlive::doTest()
[14:02:56.747] <TB0> INFO: ######################################################################
[14:02:56.749] <TB0> INFO: ----------------------------------------------------------------------
[14:02:56.749] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:02:56.749] <TB0> INFO: ----------------------------------------------------------------------
[14:03:01.893] <TB0> INFO: Test took 5143ms.
[14:03:01.918] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:02.129] <TB0> INFO: PixTestAlive::aliveTest() done
[14:03:02.129] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 3 0 0 0 2 0 0 0 1 0 0 0 0
[14:03:02.131] <TB0> INFO: ----------------------------------------------------------------------
[14:03:02.131] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:03:02.131] <TB0> INFO: ----------------------------------------------------------------------
[14:03:05.403] <TB0> INFO: Test took 3271ms.
[14:03:05.407] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:05.408] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:03:05.621] <TB0> INFO: PixTestAlive::maskTest() done
[14:03:05.621] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:03:05.623] <TB0> INFO: ----------------------------------------------------------------------
[14:03:05.623] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:03:05.623] <TB0> INFO: ----------------------------------------------------------------------
[14:03:10.142] <TB0> INFO: Test took 4518ms.
[14:03:10.167] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:10.379] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[14:03:10.379] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:03:10.379] <TB0> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[14:03:10.393] <TB0> INFO: ######################################################################
[14:03:10.393] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:03:10.393] <TB0> INFO: ######################################################################
[14:03:10.395] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:03:10.412] <TB0> INFO: dacScan step from 0 .. 29
[14:03:39.176] <TB0> INFO: Test took 28764ms.
[14:03:39.207] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:39.207] <TB0> INFO: dacScan step from 30 .. 59
[14:04:11.696] <TB0> INFO: Test took 32488ms.
[14:04:11.812] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:11.829] <TB0> INFO: dacScan step from 60 .. 89
[14:04:55.143] <TB0> INFO: Test took 43314ms.
[14:04:55.390] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:55.463] <TB0> INFO: dacScan step from 90 .. 119
[14:05:38.679] <TB0> INFO: Test took 43215ms.
[14:05:38.957] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:39.049] <TB0> INFO: dacScan step from 120 .. 149
[14:06:11.953] <TB0> INFO: Test took 32904ms.
[14:06:12.120] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:35.631] <TB0> INFO: PixTestBBMap::doTest() done, duration: 205 seconds
[14:06:35.631] <TB0> INFO: number of dead bumps (per ROC): 2 0 0 0 0 0 1 7 0 0 0 2 0 0 0 0
[14:06:35.631] <TB0> INFO: separation cut (per ROC): 72 88 84 90 91 73 87 96 83 88 76 85 102 91 83 85
[14:06:35.715] <TB0> INFO: ######################################################################
[14:06:35.715] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[14:06:35.715] <TB0> INFO: ######################################################################
[14:06:35.715] <TB0> INFO: ----------------------------------------------------------------------
[14:06:35.715] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:06:35.715] <TB0> INFO: ----------------------------------------------------------------------
[14:06:35.715] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:06:35.723] <TB0> INFO: dacScan step from 0 .. 3
[14:07:01.351] <TB0> INFO: Test took 25628ms.
[14:07:01.376] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:01.376] <TB0> INFO: dacScan step from 4 .. 7
[14:07:24.909] <TB0> INFO: Test took 23532ms.
[14:07:24.933] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:24.933] <TB0> INFO: dacScan step from 8 .. 11
[14:07:53.460] <TB0> INFO: Test took 28526ms.
[14:07:53.487] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:53.487] <TB0> INFO: dacScan step from 12 .. 15
[14:08:21.626] <TB0> INFO: Test took 28139ms.
[14:08:21.656] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:21.656] <TB0> INFO: dacScan step from 16 .. 19
[14:08:49.915] <TB0> INFO: Test took 28258ms.
[14:08:49.940] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:49.940] <TB0> INFO: dacScan step from 20 .. 23
[14:09:18.543] <TB0> INFO: Test took 28603ms.
[14:09:18.571] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:18.571] <TB0> INFO: dacScan step from 24 .. 27
[14:09:45.953] <TB0> INFO: Test took 27382ms.
[14:09:45.980] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:45.980] <TB0> INFO: dacScan step from 28 .. 31
[14:10:14.433] <TB0> INFO: Test took 28453ms.
[14:10:14.459] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:14.459] <TB0> INFO: dacScan step from 32 .. 35
[14:10:43.164] <TB0> INFO: Test took 28705ms.
[14:10:43.189] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:43.189] <TB0> INFO: dacScan step from 36 .. 39
[14:11:12.449] <TB0> INFO: Test took 29260ms.
[14:11:12.476] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:12.476] <TB0> INFO: dacScan step from 40 .. 43
[14:11:40.735] <TB0> INFO: Test took 28259ms.
[14:11:40.760] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:40.760] <TB0> INFO: dacScan step from 44 .. 47
[14:12:10.042] <TB0> INFO: Test took 29282ms.
[14:12:10.070] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:10.071] <TB0> INFO: dacScan step from 48 .. 51
[14:12:38.050] <TB0> INFO: Test took 27979ms.
[14:12:38.077] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:38.077] <TB0> INFO: dacScan step from 52 .. 55
[14:13:06.255] <TB0> INFO: Test took 28178ms.
[14:13:06.282] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:06.282] <TB0> INFO: dacScan step from 56 .. 59
[14:13:34.982] <TB0> INFO: Test took 28700ms.
[14:13:35.007] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:35.008] <TB0> INFO: dacScan step from 60 .. 63
[14:14:03.402] <TB0> INFO: Test took 28394ms.
[14:14:03.427] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:03.427] <TB0> INFO: dacScan step from 64 .. 67
[14:14:31.451] <TB0> INFO: Test took 28024ms.
[14:14:31.477] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:31.477] <TB0> INFO: dacScan step from 68 .. 71
[14:15:00.322] <TB0> INFO: Test took 28845ms.
[14:15:00.347] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:00.347] <TB0> INFO: dacScan step from 72 .. 75
[14:15:28.825] <TB0> INFO: Test took 28478ms.
[14:15:28.855] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:28.855] <TB0> INFO: dacScan step from 76 .. 79
[14:15:58.519] <TB0> INFO: Test took 29664ms.
[14:15:58.558] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:58.559] <TB0> INFO: dacScan step from 80 .. 83
[14:16:31.681] <TB0> INFO: Test took 33122ms.
[14:16:31.756] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:31.760] <TB0> INFO: dacScan step from 84 .. 87
[14:17:08.650] <TB0> INFO: Test took 36890ms.
[14:17:08.771] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:08.778] <TB0> INFO: dacScan step from 88 .. 91
[14:17:48.136] <TB0> INFO: Test took 39358ms.
[14:17:48.293] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:48.302] <TB0> INFO: dacScan step from 92 .. 95
[14:18:32.115] <TB0> INFO: Test took 43813ms.
[14:18:32.301] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:32.311] <TB0> INFO: dacScan step from 96 .. 99
[14:19:18.340] <TB0> INFO: Test took 46029ms.
[14:19:18.564] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:18.573] <TB0> INFO: dacScan step from 100 .. 103


[14:20:04.771] <TB0> INFO: Test took 46198ms.
[14:20:04.996] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:05.006] <TB0> INFO: dacScan step from 104 .. 107


[14:20:51.376] <TB0> INFO: Test took 46370ms.
[14:20:51.604] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:51.615] <TB0> INFO: dacScan step from 108 .. 111

[14:21:40.989] <TB0> INFO: Test took 49374ms.
[14:21:41.223] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:41.235] <TB0> INFO: dacScan step from 112 .. 115



[14:22:25.624] <TB0> INFO: Test took 44389ms.
[14:22:25.859] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:25.872] <TB0> INFO: dacScan step from 116 .. 119



[14:23:07.691] <TB0> INFO: Test took 41819ms.
[14:23:07.921] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:07.934] <TB0> INFO: dacScan step from 120 .. 123





[14:23:49.563] <TB0> INFO: Test took 41629ms.
[14:23:49.803] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:49.817] <TB0> INFO: dacScan step from 124 .. 127
[14:24:35.125] <TB0> INFO: Test took 45308ms.
[14:24:35.358] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:35.370] <TB0> INFO: dacScan step from 128 .. 131
[14:25:24.004] <TB0> INFO: Test took 48634ms.
[14:25:24.275] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:24.290] <TB0> INFO: dacScan step from 132 .. 135
[14:26:12.639] <TB0> INFO: Test took 48349ms.
[14:26:12.860] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:12.871] <TB0> INFO: dacScan step from 136 .. 139
[14:27:00.939] <TB0> INFO: Test took 48068ms.
[14:27:01.182] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:01.194] <TB0> INFO: dacScan step from 140 .. 143
[14:27:45.616] <TB0> INFO: Test took 44422ms.
[14:27:45.837] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:45.848] <TB0> INFO: dacScan step from 144 .. 147
[14:28:33.244] <TB0> INFO: Test took 47396ms.
[14:28:33.518] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:33.532] <TB0> INFO: dacScan step from 148 .. 149
[14:28:58.536] <TB0> INFO: Test took 25004ms.
[14:28:58.654] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:58.661] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:00.024] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:01.378] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:02.735] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:04.078] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:05.415] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:06.807] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:08.261] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:09.723] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:11.148] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:12.544] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:13.915] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:15.266] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:16.599] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:17.942] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:19.294] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:29:20.667] <TB0> INFO: PixTestScurves::scurves() done
[14:29:20.667] <TB0> INFO: Vcal mean: 88.78 94.13 92.08 96.50 99.99 84.21 91.73 87.23 88.12 94.12 83.53 94.38 101.75 98.15 90.61 92.10
[14:29:20.668] <TB0> INFO: Vcal RMS: 5.27 5.99 5.32 5.91 5.79 4.64 6.09 5.60 5.06 5.91 4.37 6.12 5.94 5.62 6.08 5.70
[14:29:20.668] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1364 seconds
[14:29:20.743] <TB0> INFO: ######################################################################
[14:29:20.743] <TB0> INFO: PixTestTrim::doTest()
[14:29:20.743] <TB0> INFO: ######################################################################
[14:29:20.744] <TB0> INFO: ----------------------------------------------------------------------
[14:29:20.744] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[14:29:20.744] <TB0> INFO: ----------------------------------------------------------------------
[14:29:20.822] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:29:20.822] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:29:20.831] <TB0> INFO: dacScan step from 0 .. 19
[14:29:40.888] <TB0> INFO: Test took 20057ms.
[14:29:40.917] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:40.917] <TB0> INFO: dacScan step from 20 .. 39
[14:30:00.687] <TB0> INFO: Test took 19770ms.
[14:30:00.712] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:00.712] <TB0> INFO: dacScan step from 40 .. 59
[14:30:18.936] <TB0> INFO: Test took 18224ms.
[14:30:18.963] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:18.963] <TB0> INFO: dacScan step from 60 .. 79
[14:30:37.677] <TB0> INFO: Test took 18714ms.
[14:30:37.698] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:37.698] <TB0> INFO: dacScan step from 80 .. 99
[14:30:55.945] <TB0> INFO: Test took 18247ms.
[14:30:56.001] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:56.008] <TB0> INFO: dacScan step from 100 .. 119
[14:31:24.209] <TB0> INFO: Test took 28201ms.
[14:31:24.381] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:24.410] <TB0> INFO: dacScan step from 120 .. 139
[14:31:52.418] <TB0> INFO: Test took 28007ms.
[14:31:52.577] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:52.601] <TB0> INFO: dacScan step from 140 .. 159
[14:32:13.957] <TB0> INFO: Test took 21356ms.
[14:32:14.003] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:34.040] <TB0> INFO: ROC 0 VthrComp = 88
[14:32:34.040] <TB0> INFO: ROC 1 VthrComp = 93
[14:32:34.040] <TB0> INFO: ROC 2 VthrComp = 93
[14:32:34.041] <TB0> INFO: ROC 3 VthrComp = 97
[14:32:34.041] <TB0> INFO: ROC 4 VthrComp = 98
[14:32:34.041] <TB0> INFO: ROC 5 VthrComp = 86
[14:32:34.041] <TB0> INFO: ROC 6 VthrComp = 91
[14:32:34.041] <TB0> INFO: ROC 7 VthrComp = 91
[14:32:34.041] <TB0> INFO: ROC 8 VthrComp = 90
[14:32:34.041] <TB0> INFO: ROC 9 VthrComp = 96
[14:32:34.041] <TB0> INFO: ROC 10 VthrComp = 84
[14:32:34.041] <TB0> INFO: ROC 11 VthrComp = 92
[14:32:34.041] <TB0> INFO: ROC 12 VthrComp = 100
[14:32:34.041] <TB0> INFO: ROC 13 VthrComp = 96
[14:32:34.041] <TB0> INFO: ROC 14 VthrComp = 92
[14:32:34.041] <TB0> INFO: ROC 15 VthrComp = 90
[14:32:34.041] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:32:34.041] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:32:34.049] <TB0> INFO: dacScan step from 0 .. 19
[14:32:53.461] <TB0> INFO: Test took 19412ms.
[14:32:53.484] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:53.484] <TB0> INFO: dacScan step from 20 .. 39
[14:33:13.703] <TB0> INFO: Test took 20219ms.
[14:33:13.732] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:13.735] <TB0> INFO: dacScan step from 40 .. 59
[14:33:39.778] <TB0> INFO: Test took 26043ms.
[14:33:39.937] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:39.978] <TB0> INFO: dacScan step from 60 .. 79
[14:34:04.212] <TB0> INFO: Test took 24234ms.
[14:34:04.377] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:04.420] <TB0> INFO: dacScan step from 80 .. 99
[14:34:34.539] <TB0> INFO: Test took 30119ms.
[14:34:34.695] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:34.736] <TB0> INFO: dacScan step from 100 .. 119
[14:35:04.303] <TB0> INFO: Test took 29566ms.
[14:35:04.464] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:04.505] <TB0> INFO: dacScan step from 120 .. 139
[14:35:29.504] <TB0> INFO: Test took 24999ms.
[14:35:29.674] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:29.720] <TB0> INFO: dacScan step from 140 .. 159
[14:35:59.405] <TB0> INFO: Test took 29685ms.
[14:35:59.570] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:24.597] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 58.5053 for pixel 2/0 mean/min/max = 46.3607/34.1586/58.5627
[14:36:24.597] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 61.235 for pixel 1/77 mean/min/max = 46.4979/31.6878/61.3079
[14:36:24.598] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 57.6869 for pixel 19/75 mean/min/max = 45.0793/32.4155/57.7431
[14:36:24.598] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 57.2375 for pixel 0/51 mean/min/max = 44.5458/31.804/57.2877
[14:36:24.598] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 59.8618 for pixel 10/1 mean/min/max = 45.9022/31.649/60.1554
[14:36:24.598] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 56.713 for pixel 51/59 mean/min/max = 44.6833/32.5493/56.8172
[14:36:24.599] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 60.0901 for pixel 50/79 mean/min/max = 46.6594/33.1997/60.119
[14:36:24.599] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.75 for pixel 18/66 mean/min/max = 45.7727/33.7834/57.7621
[14:36:24.599] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 58.3057 for pixel 4/77 mean/min/max = 46.1403/33.8243/58.4563
[14:36:24.599] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 60.4224 for pixel 27/79 mean/min/max = 46.1974/31.8429/60.5518
[14:36:24.600] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 55.8451 for pixel 35/3 mean/min/max = 44.1739/32.3161/56.0317
[14:36:24.600] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 63.8871 for pixel 4/1 mean/min/max = 48.4374/32.8155/64.0593
[14:36:24.600] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 61.9744 for pixel 2/8 mean/min/max = 47.1668/32.3436/61.9899
[14:36:24.600] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 59.1436 for pixel 3/55 mean/min/max = 45.6497/32.1474/59.152
[14:36:24.601] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 61.1277 for pixel 8/70 mean/min/max = 46.318/31.5078/61.1281
[14:36:24.601] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 60.102 for pixel 11/10 mean/min/max = 46.4767/32.7287/60.2248
[14:36:24.601] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:38:51.099] <TB0> INFO: Test took 146498ms.
[14:38:52.430] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:38:52.438] <TB0> INFO: dacScan step from 0 .. 19
[14:39:24.824] <TB0> INFO: Test took 32386ms.
[14:39:24.874] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:24.876] <TB0> INFO: dacScan step from 20 .. 39
[14:40:03.875] <TB0> INFO: Test took 39000ms.
[14:40:04.214] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:04.258] <TB0> INFO: dacScan step from 40 .. 59


[14:40:55.233] <TB0> INFO: Test took 50974ms.
[14:40:55.521] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:55.559] <TB0> INFO: dacScan step from 60 .. 79


[14:41:41.845] <TB0> INFO: Test took 46286ms.
[14:41:42.132] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:42.171] <TB0> INFO: dacScan step from 80 .. 99
[14:42:33.807] <TB0> INFO: Test took 51636ms.
[14:42:34.090] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:34.135] <TB0> INFO: dacScan step from 100 .. 119

[14:43:21.934] <TB0> INFO: Test took 47799ms.
[14:43:22.225] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:22.268] <TB0> INFO: dacScan step from 120 .. 139

[14:44:12.810] <TB0> INFO: Test took 50542ms.
[14:44:13.100] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:13.144] <TB0> INFO: dacScan step from 140 .. 159


[14:45:05.220] <TB0> INFO: Test took 52076ms.
[14:45:05.511] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:05.555] <TB0> INFO: dacScan step from 160 .. 179





[14:45:54.835] <TB0> INFO: Test took 49280ms.
[14:45:55.174] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:55.214] <TB0> INFO: dacScan step from 180 .. 199


[14:46:45.709] <TB0> INFO: Test took 50495ms.
[14:46:45.973] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:10.104] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.006373 .. 255.000000
[14:47:10.182] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:47:10.190] <TB0> INFO: dacScan step from 0 .. 19
[14:47:27.459] <TB0> INFO: Test took 17269ms.
[14:47:27.482] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:27.482] <TB0> INFO: dacScan step from 20 .. 39
[14:47:47.874] <TB0> INFO: Test took 20392ms.
[14:47:47.961] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:47.976] <TB0> INFO: dacScan step from 40 .. 59
[14:48:13.117] <TB0> INFO: Test took 25141ms.
[14:48:13.284] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:13.325] <TB0> INFO: dacScan step from 60 .. 79
[14:48:36.026] <TB0> INFO: Test took 22701ms.
[14:48:36.253] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:36.313] <TB0> INFO: dacScan step from 80 .. 99
[14:49:01.237] <TB0> INFO: Test took 24923ms.
[14:49:01.398] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:01.440] <TB0> INFO: dacScan step from 100 .. 119
[14:49:24.513] <TB0> INFO: Test took 23074ms.
[14:49:24.673] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:24.778] <TB0> INFO: dacScan step from 120 .. 139
[14:49:49.461] <TB0> INFO: Test took 24683ms.
[14:49:49.594] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:49.633] <TB0> INFO: dacScan step from 140 .. 159
[14:50:15.132] <TB0> INFO: Test took 25498ms.
[14:50:15.285] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:15.329] <TB0> INFO: dacScan step from 160 .. 179
[14:50:39.922] <TB0> INFO: Test took 24593ms.
[14:50:40.077] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:40.121] <TB0> INFO: dacScan step from 180 .. 199
[14:51:03.927] <TB0> INFO: Test took 23806ms.
[14:51:04.094] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:04.135] <TB0> INFO: dacScan step from 200 .. 219
[14:51:29.014] <TB0> INFO: Test took 24879ms.
[14:51:29.182] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:29.222] <TB0> INFO: dacScan step from 220 .. 239
[14:51:54.924] <TB0> INFO: Test took 25702ms.
[14:51:55.088] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:55.129] <TB0> INFO: dacScan step from 240 .. 255
[14:52:15.890] <TB0> INFO: Test took 20761ms.
[14:52:16.009] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:49.920] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 13.540861 .. 46.649160
[14:52:49.999] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 3 .. 56 (20) hits flags = 16 (plus default)
[14:52:50.008] <TB0> INFO: dacScan step from 3 .. 22
[14:53:06.408] <TB0> INFO: Test took 16400ms.
[14:53:06.433] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:06.433] <TB0> INFO: dacScan step from 23 .. 42
[14:53:26.150] <TB0> INFO: Test took 19717ms.
[14:53:26.264] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:26.303] <TB0> INFO: dacScan step from 43 .. 56
[14:53:43.109] <TB0> INFO: Test took 16806ms.
[14:53:43.213] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:58.859] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 3.391679 .. 40.856904
[14:53:58.993] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 3 .. 50 (20) hits flags = 16 (plus default)
[14:53:59.004] <TB0> INFO: dacScan step from 3 .. 22
[14:54:15.707] <TB0> INFO: Test took 16703ms.
[14:54:15.731] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:15.731] <TB0> INFO: dacScan step from 23 .. 42
[14:54:36.396] <TB0> INFO: Test took 20665ms.
[14:54:36.495] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:36.516] <TB0> INFO: dacScan step from 43 .. 50
[14:54:48.694] <TB0> INFO: Test took 12178ms.
[14:54:48.764] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:05.308] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 1.016032 .. 40.856904
[14:55:05.391] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 50 (20) hits flags = 16 (plus default)
[14:55:05.398] <TB0> INFO: dacScan step from 1 .. 20
[14:55:22.567] <TB0> INFO: Test took 17168ms.
[14:55:22.587] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:22.587] <TB0> INFO: dacScan step from 21 .. 40
[14:55:41.887] <TB0> INFO: Test took 19300ms.
[14:55:41.972] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:41.991] <TB0> INFO: dacScan step from 41 .. 50
[14:55:53.955] <TB0> INFO: Test took 11964ms.
[14:55:54.028] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:09.720] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:56:09.720] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:56:09.732] <TB0> INFO: dacScan step from 15 .. 34
[14:56:41.656] <TB0> INFO: Test took 31924ms.
[14:56:41.723] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:41.733] <TB0> INFO: dacScan step from 35 .. 54


[14:57:29.170] <TB0> INFO: Test took 47437ms.
[14:57:29.487] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:29.533] <TB0> INFO: dacScan step from 55 .. 55
[14:57:34.961] <TB0> INFO: Test took 5428ms.
[14:57:34.978] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:48.497] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:57:48.498] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:57:48.498] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:57:48.498] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:57:48.498] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:57:48.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:57:48.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:57:48.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:57:48.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:57:48.499] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:57:48.500] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:57:48.500] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:57:48.500] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:57:48.500] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:57:48.500] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:57:48.501] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:57:48.501] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C0.dat
[14:57:48.510] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C1.dat
[14:57:48.516] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C2.dat
[14:57:48.522] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C3.dat
[14:57:48.528] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C4.dat
[14:57:48.534] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C5.dat
[14:57:48.540] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C6.dat
[14:57:48.546] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C7.dat
[14:57:48.553] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C8.dat
[14:57:48.559] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C9.dat
[14:57:48.565] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C10.dat
[14:57:48.571] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C11.dat
[14:57:48.577] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C12.dat
[14:57:48.584] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C13.dat
[14:57:48.590] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C14.dat
[14:57:48.599] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//trimParameters35_C15.dat
[14:57:48.607] <TB0> INFO: PixTestTrim::trimTest() done
[14:57:48.607] <TB0> INFO: vtrim: 100 116 105 106 110 96 116 106 117 125 101 193 112 111 118 95
[14:57:48.607] <TB0> INFO: vthrcomp: 88 93 93 97 98 86 91 91 90 96 84 92 100 96 92 90
[14:57:48.607] <TB0> INFO: vcal mean: 35.12 35.12 35.08 34.99 35.11 35.11 35.11 35.06 35.10 35.15 35.07 35.04 35.08 35.10 35.07 35.11
[14:57:48.607] <TB0> INFO: vcal RMS: 1.06 1.10 1.07 1.30 1.17 1.00 1.08 1.25 0.98 1.08 1.04 4.01 1.16 1.10 1.06 1.07
[14:57:48.607] <TB0> INFO: bits mean: 9.86 9.88 10.28 10.22 9.93 9.74 9.43 9.75 9.58 10.09 10.55 11.31 9.69 10.02 9.91 9.45
[14:57:48.607] <TB0> INFO: bits RMS: 2.22 2.49 2.32 2.45 2.58 2.57 2.51 2.33 2.37 2.45 2.24 1.65 2.50 2.46 2.55 2.61
[14:57:48.613] <TB0> INFO: ----------------------------------------------------------------------
[14:57:48.613] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[14:57:48.613] <TB0> INFO: ----------------------------------------------------------------------
[14:57:48.615] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:57:48.627] <TB0> INFO: dacScan step from 0 .. 19
[14:58:20.822] <TB0> INFO: Test took 32195ms.
[14:58:20.857] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:20.857] <TB0> INFO: dacScan step from 20 .. 39
[14:58:49.897] <TB0> INFO: Test took 29040ms.
[14:58:49.935] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:49.935] <TB0> INFO: dacScan step from 40 .. 59
[14:59:22.483] <TB0> INFO: Test took 32548ms.
[14:59:22.521] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:22.521] <TB0> INFO: dacScan step from 60 .. 79
[14:59:52.760] <TB0> INFO: Test took 30239ms.
[14:59:52.794] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:52.794] <TB0> INFO: dacScan step from 80 .. 99
[15:00:22.605] <TB0> INFO: Test took 29811ms.
[15:00:22.641] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:22.641] <TB0> INFO: dacScan step from 100 .. 119
[15:01:01.520] <TB0> INFO: Test took 38879ms.
[15:01:01.648] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:01.661] <TB0> INFO: dacScan step from 120 .. 139
[15:01:47.136] <TB0> INFO: Test took 45476ms.
[15:01:47.412] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:47.448] <TB0> INFO: dacScan step from 140 .. 159


[15:02:38.564] <TB0> INFO: Test took 51116ms.
[15:02:38.837] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:38.876] <TB0> INFO: dacScan step from 160 .. 179
[15:03:32.005] <TB0> INFO: Test took 53129ms.
[15:03:32.262] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:32.307] <TB0> INFO: dacScan step from 180 .. 199
[15:04:23.883] <TB0> INFO: Test took 51576ms.
[15:04:24.152] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:49.427] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 191 (20) hits flags = 16 (plus default)
[15:04:49.435] <TB0> INFO: dacScan step from 0 .. 19
[15:05:21.915] <TB0> INFO: Test took 32480ms.
[15:05:21.952] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:21.952] <TB0> INFO: dacScan step from 20 .. 39
[15:05:53.976] <TB0> INFO: Test took 32024ms.
[15:05:54.010] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:54.010] <TB0> INFO: dacScan step from 40 .. 59
[15:06:25.786] <TB0> INFO: Test took 31776ms.
[15:06:25.824] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:25.824] <TB0> INFO: dacScan step from 60 .. 79
[15:06:56.530] <TB0> INFO: Test took 30706ms.
[15:06:56.575] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:56.575] <TB0> INFO: dacScan step from 80 .. 99
[15:07:27.970] <TB0> INFO: Test took 31395ms.
[15:07:28.021] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:28.024] <TB0> INFO: dacScan step from 100 .. 119
[15:08:13.039] <TB0> INFO: Test took 45015ms.
[15:08:13.260] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:13.286] <TB0> INFO: dacScan step from 120 .. 139
[15:08:57.261] <TB0> INFO: Test took 43975ms.
[15:08:57.546] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:57.594] <TB0> INFO: dacScan step from 140 .. 159


[15:09:48.901] <TB0> INFO: Test took 51306ms.
[15:09:49.193] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:49.234] <TB0> INFO: dacScan step from 160 .. 179
[15:10:42.016] <TB0> INFO: Test took 52781ms.
[15:10:42.284] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:42.326] <TB0> INFO: dacScan step from 180 .. 191
[15:11:15.745] <TB0> INFO: Test took 33419ms.
[15:11:15.901] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:41.690] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 176 (20) hits flags = 16 (plus default)
[15:11:41.698] <TB0> INFO: dacScan step from 0 .. 19
[15:12:14.715] <TB0> INFO: Test took 33017ms.
[15:12:14.747] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:14.747] <TB0> INFO: dacScan step from 20 .. 39
[15:12:46.932] <TB0> INFO: Test took 32185ms.
[15:12:46.968] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:46.968] <TB0> INFO: dacScan step from 40 .. 59
[15:13:18.662] <TB0> INFO: Test took 31694ms.
[15:13:18.707] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:18.707] <TB0> INFO: dacScan step from 60 .. 79
[15:13:49.467] <TB0> INFO: Test took 30760ms.
[15:13:49.504] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:49.504] <TB0> INFO: dacScan step from 80 .. 99
[15:14:23.319] <TB0> INFO: Test took 33815ms.
[15:14:23.375] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:23.377] <TB0> INFO: dacScan step from 100 .. 119
[15:15:03.030] <TB0> INFO: Test took 39653ms.
[15:15:03.258] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:03.288] <TB0> INFO: dacScan step from 120 .. 139


[15:15:53.817] <TB0> INFO: Test took 50529ms.
[15:15:54.081] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:54.120] <TB0> INFO: dacScan step from 140 .. 159


[15:16:46.065] <TB0> INFO: Test took 51945ms.
[15:16:46.344] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:46.387] <TB0> INFO: dacScan step from 160 .. 176
[15:17:30.825] <TB0> INFO: Test took 44438ms.
[15:17:31.052] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:53.934] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[15:17:53.942] <TB0> INFO: dacScan step from 0 .. 19
[15:18:25.662] <TB0> INFO: Test took 31720ms.
[15:18:25.696] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:25.697] <TB0> INFO: dacScan step from 20 .. 39
[15:18:57.921] <TB0> INFO: Test took 32224ms.
[15:18:57.953] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:57.953] <TB0> INFO: dacScan step from 40 .. 59
[15:19:26.550] <TB0> INFO: Test took 28597ms.
[15:19:26.583] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:26.583] <TB0> INFO: dacScan step from 60 .. 79
[15:19:58.817] <TB0> INFO: Test took 32234ms.
[15:19:58.857] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:58.857] <TB0> INFO: dacScan step from 80 .. 99
[15:20:28.306] <TB0> INFO: Test took 29448ms.
[15:20:28.359] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:28.362] <TB0> INFO: dacScan step from 100 .. 119
[15:21:07.575] <TB0> INFO: Test took 39213ms.
[15:21:07.790] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:07.817] <TB0> INFO: dacScan step from 120 .. 139


[15:21:59.079] <TB0> INFO: Test took 51262ms.
[15:21:59.367] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:59.405] <TB0> INFO: dacScan step from 140 .. 153
[15:22:34.485] <TB0> INFO: Test took 35080ms.
[15:22:34.679] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:55.815] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[15:22:55.823] <TB0> INFO: dacScan step from 0 .. 19
[15:23:25.600] <TB0> INFO: Test took 29776ms.
[15:23:25.634] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:25.634] <TB0> INFO: dacScan step from 20 .. 39
[15:23:54.696] <TB0> INFO: Test took 29062ms.
[15:23:54.731] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:54.731] <TB0> INFO: dacScan step from 40 .. 59
[15:24:26.550] <TB0> INFO: Test took 31819ms.
[15:24:26.590] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:26.590] <TB0> INFO: dacScan step from 60 .. 79
[15:24:57.261] <TB0> INFO: Test took 30671ms.
[15:24:57.295] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:57.295] <TB0> INFO: dacScan step from 80 .. 99
[15:25:28.790] <TB0> INFO: Test took 31495ms.
[15:25:28.846] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:28.849] <TB0> INFO: dacScan step from 100 .. 119
[15:26:14.234] <TB0> INFO: Test took 45385ms.
[15:26:14.463] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:14.494] <TB0> INFO: dacScan step from 120 .. 139





[15:27:04.307] <TB0> INFO: Test took 49814ms.
[15:27:04.594] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:04.638] <TB0> INFO: dacScan step from 140 .. 153
[15:27:41.096] <TB0> INFO: Test took 36458ms.
[15:27:41.287] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:02.483] <TB0> INFO: PixTestTrim::trimBitTest() done
[15:28:02.485] <TB0> INFO: PixTestTrim::doTest() done, duration: 3521 seconds
[15:28:03.153] <TB0> INFO: ######################################################################
[15:28:03.153] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:28:03.153] <TB0> INFO: ######################################################################
[15:28:07.553] <TB0> INFO: Test took 4399ms.
[15:28:07.576] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:12.061] <TB0> INFO: Test took 4288ms.
[15:28:12.128] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:16.425] <TB0> INFO: Test took 4288ms.
[15:28:16.491] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:16.498] <TB0> INFO: The DUT currently contains the following objects:
[15:28:16.498] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:16.498] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:16.498] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:16.498] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:16.498] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:16.498] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.703] <TB0> INFO: Test took 1205ms.
[15:28:17.704] <TB0> INFO: The DUT currently contains the following objects:
[15:28:17.704] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:17.704] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:17.705] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:17.705] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:17.705] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:17.705] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.863] <TB0> INFO: Test took 1158ms.
[15:28:18.864] <TB0> INFO: The DUT currently contains the following objects:
[15:28:18.864] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:18.864] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:18.864] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:18.864] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:18.864] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.864] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.864] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.864] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.864] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:18.865] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.992] <TB0> INFO: Test took 1127ms.
[15:28:19.993] <TB0> INFO: The DUT currently contains the following objects:
[15:28:19.994] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:19.994] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:19.994] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:19.994] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:19.994] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:19.994] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.152] <TB0> INFO: Test took 1158ms.
[15:28:21.154] <TB0> INFO: The DUT currently contains the following objects:
[15:28:21.154] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:21.154] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:21.154] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:21.154] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:21.154] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:21.154] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.343] <TB0> INFO: Test took 1189ms.
[15:28:22.344] <TB0> INFO: The DUT currently contains the following objects:
[15:28:22.344] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:22.344] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:22.344] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:22.344] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:22.344] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.344] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.345] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.345] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.345] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.345] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:22.345] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.503] <TB0> INFO: Test took 1158ms.
[15:28:23.504] <TB0> INFO: The DUT currently contains the following objects:
[15:28:23.504] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:23.504] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:23.504] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:23.504] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:23.504] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:23.504] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.677] <TB0> INFO: Test took 1173ms.
[15:28:24.678] <TB0> INFO: The DUT currently contains the following objects:
[15:28:24.678] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:24.678] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:24.678] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:24.678] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:24.678] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.678] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.679] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:24.679] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.791] <TB0> INFO: Test took 1112ms.
[15:28:25.793] <TB0> INFO: The DUT currently contains the following objects:
[15:28:25.793] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:25.793] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:25.793] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:25.793] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:25.793] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.793] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.794] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.794] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.794] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:25.794] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.921] <TB0> INFO: Test took 1127ms.
[15:28:26.922] <TB0> INFO: The DUT currently contains the following objects:
[15:28:26.922] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:26.922] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:26.922] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:26.922] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:26.922] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.922] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.923] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.923] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.923] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.923] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.923] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:26.923] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.050] <TB0> INFO: Test took 1127ms.
[15:28:28.051] <TB0> INFO: The DUT currently contains the following objects:
[15:28:28.051] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:28.052] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:28.052] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:28.052] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:28.052] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:28.052] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.240] <TB0> INFO: Test took 1188ms.
[15:28:29.240] <TB0> INFO: The DUT currently contains the following objects:
[15:28:29.240] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:29.241] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:29.241] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:29.241] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:29.241] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:29.241] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.368] <TB0> INFO: Test took 1127ms.
[15:28:30.369] <TB0> INFO: The DUT currently contains the following objects:
[15:28:30.369] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:30.369] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:30.370] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:30.370] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:30.370] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:30.370] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.506] <TB0> INFO: Test took 1136ms.
[15:28:31.507] <TB0> INFO: The DUT currently contains the following objects:
[15:28:31.507] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:31.507] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:31.507] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:31.507] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:31.507] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:31.507] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.635] <TB0> INFO: Test took 1128ms.
[15:28:32.636] <TB0> INFO: The DUT currently contains the following objects:
[15:28:32.636] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:32.636] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:32.636] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:32.636] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:32.636] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:32.637] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.794] <TB0> INFO: Test took 1157ms.
[15:28:33.795] <TB0> INFO: The DUT currently contains the following objects:
[15:28:33.795] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:28:33.795] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:28:33.795] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:28:33.795] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:28:33.795] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:33.795] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:28:34.908] <TB0> INFO: Test took 1113ms.
[15:28:34.911] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:41.241] <TB0> INFO: Test took 366330ms.
[15:34:42.797] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:55.100] <TB0> INFO: Test took 372303ms.
[15:40:56.814] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.820] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.827] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:40:56.833] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:40:56.840] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:40:56.846] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[15:40:56.853] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[15:40:56.860] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[15:40:56.866] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[15:40:56.873] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[15:40:56.879] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[15:40:56.886] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[15:40:56.892] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.899] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.905] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.912] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.918] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.925] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.931] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.938] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.945] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.951] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.958] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.964] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.971] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:56.977] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:57.001] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:40:57.001] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:40:57.001] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:40:57.002] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:40:57.002] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:40:57.002] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:40:57.002] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:40:57.003] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:40:57.003] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:40:57.003] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:40:57.003] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:40:57.004] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:40:57.004] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:40:57.004] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:40:57.005] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:40:57.005] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:41:01.338] <TB0> INFO: Test took 4331ms.
[15:41:05.913] <TB0> INFO: Test took 4305ms.
[15:41:10.698] <TB0> INFO: Test took 4486ms.
[15:41:10.970] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:11.958] <TB0> INFO: Test took 989ms.
[15:41:11.961] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:13.089] <TB0> INFO: Test took 1128ms.
[15:41:13.091] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:14.236] <TB0> INFO: Test took 1145ms.
[15:41:14.238] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:15.397] <TB0> INFO: Test took 1159ms.
[15:41:15.400] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:16.544] <TB0> INFO: Test took 1144ms.
[15:41:16.547] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:17.660] <TB0> INFO: Test took 1113ms.
[15:41:17.662] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:18.790] <TB0> INFO: Test took 1128ms.
[15:41:18.793] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:19.952] <TB0> INFO: Test took 1159ms.
[15:41:19.954] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:21.113] <TB0> INFO: Test took 1159ms.
[15:41:21.115] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:22.259] <TB0> INFO: Test took 1144ms.
[15:41:22.261] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:23.405] <TB0> INFO: Test took 1144ms.
[15:41:23.407] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:24.551] <TB0> INFO: Test took 1144ms.
[15:41:24.554] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:25.681] <TB0> INFO: Test took 1128ms.
[15:41:25.684] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:26.829] <TB0> INFO: Test took 1145ms.
[15:41:26.831] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:27.990] <TB0> INFO: Test took 1159ms.
[15:41:27.993] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:29.154] <TB0> INFO: Test took 1161ms.
[15:41:29.157] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:30.317] <TB0> INFO: Test took 1160ms.
[15:41:30.320] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:31.510] <TB0> INFO: Test took 1190ms.
[15:41:31.513] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:32.641] <TB0> INFO: Test took 1128ms.
[15:41:32.644] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:33.758] <TB0> INFO: Test took 1114ms.
[15:41:33.761] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:34.920] <TB0> INFO: Test took 1160ms.
[15:41:34.924] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:36.066] <TB0> INFO: Test took 1142ms.
[15:41:36.069] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:37.197] <TB0> INFO: Test took 1129ms.
[15:41:37.200] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:38.359] <TB0> INFO: Test took 1159ms.
[15:41:38.362] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:39.515] <TB0> INFO: Test took 1153ms.
[15:41:39.517] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:40.639] <TB0> INFO: Test took 1122ms.
[15:41:40.641] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:41.799] <TB0> INFO: Test took 1159ms.
[15:41:41.802] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:42.931] <TB0> INFO: Test took 1129ms.
[15:41:42.933] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:44.061] <TB0> INFO: Test took 1128ms.
[15:41:44.064] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:45.206] <TB0> INFO: Test took 1142ms.
[15:41:45.209] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:46.337] <TB0> INFO: Test took 1128ms.
[15:41:46.339] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:41:47.515] <TB0> INFO: Test took 1176ms.
[15:41:48.046] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 824 seconds
[15:41:48.046] <TB0> INFO: PH scale (per ROC): 78 70 72 76 74 73 70 81 71 70 76 76 78 72 78 74
[15:41:48.046] <TB0> INFO: PH offset (per ROC): 151 176 182 176 197 171 173 182 187 184 158 189 181 166 164 178
[15:41:48.242] <TB0> INFO: ######################################################################
[15:41:48.242] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:41:48.242] <TB0> INFO: ######################################################################
[15:41:48.252] <TB0> INFO: scanning low vcal = 10
[15:41:52.644] <TB0> INFO: Test took 4392ms.
[15:41:52.648] <TB0> INFO: scanning low vcal = 20
[15:41:57.043] <TB0> INFO: Test took 4395ms.
[15:41:57.046] <TB0> INFO: scanning low vcal = 30
[15:42:01.448] <TB0> INFO: Test took 4402ms.
[15:42:01.459] <TB0> INFO: scanning low vcal = 40
[15:42:07.019] <TB0> INFO: Test took 5560ms.
[15:42:07.077] <TB0> INFO: scanning low vcal = 50
[15:42:12.313] <TB0> INFO: Test took 5236ms.
[15:42:12.376] <TB0> INFO: scanning low vcal = 60
[15:42:17.856] <TB0> INFO: Test took 5480ms.
[15:42:17.927] <TB0> INFO: scanning low vcal = 70
[15:42:23.097] <TB0> INFO: Test took 5170ms.
[15:42:23.162] <TB0> INFO: scanning low vcal = 80
[15:42:28.407] <TB0> INFO: Test took 5245ms.
[15:42:28.469] <TB0> INFO: scanning low vcal = 90
[15:42:33.814] <TB0> INFO: Test took 5345ms.
[15:42:33.878] <TB0> INFO: scanning low vcal = 100
[15:42:39.375] <TB0> INFO: Test took 5497ms.
[15:42:39.439] <TB0> INFO: scanning low vcal = 110
[15:42:44.709] <TB0> INFO: Test took 5270ms.
[15:42:44.772] <TB0> INFO: scanning low vcal = 120
[15:42:49.939] <TB0> INFO: Test took 5167ms.
[15:42:49.997] <TB0> INFO: scanning low vcal = 130
[15:42:55.160] <TB0> INFO: Test took 5163ms.
[15:42:55.232] <TB0> INFO: scanning low vcal = 140
[15:43:00.559] <TB0> INFO: Test took 5327ms.
[15:43:00.621] <TB0> INFO: scanning low vcal = 150
[15:43:06.021] <TB0> INFO: Test took 5400ms.
[15:43:06.084] <TB0> INFO: scanning low vcal = 160
[15:43:11.692] <TB0> INFO: Test took 5608ms.
[15:43:11.754] <TB0> INFO: scanning low vcal = 170
[15:43:17.114] <TB0> INFO: Test took 5360ms.
[15:43:17.176] <TB0> INFO: scanning low vcal = 180
[15:43:22.652] <TB0> INFO: Test took 5476ms.
[15:43:22.718] <TB0> INFO: scanning low vcal = 190
[15:43:28.306] <TB0> INFO: Test took 5588ms.
[15:43:28.386] <TB0> INFO: scanning low vcal = 200
[15:43:33.677] <TB0> INFO: Test took 5291ms.
[15:43:33.743] <TB0> INFO: scanning low vcal = 210
[15:43:38.978] <TB0> INFO: Test took 5235ms.
[15:43:39.046] <TB0> INFO: scanning low vcal = 220
[15:43:44.304] <TB0> INFO: Test took 5258ms.
[15:43:44.394] <TB0> INFO: scanning low vcal = 230
[15:43:49.864] <TB0> INFO: Test took 5470ms.
[15:43:49.943] <TB0> INFO: scanning low vcal = 240
[15:43:55.273] <TB0> INFO: Test took 5330ms.
[15:43:55.338] <TB0> INFO: scanning low vcal = 250
[15:44:00.773] <TB0> INFO: Test took 5436ms.
[15:44:00.840] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[15:44:06.261] <TB0> INFO: Test took 5421ms.
[15:44:06.326] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[15:44:11.687] <TB0> INFO: Test took 5361ms.
[15:44:11.770] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[15:44:17.147] <TB0> INFO: Test took 5377ms.
[15:44:17.208] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[15:44:22.528] <TB0> INFO: Test took 5320ms.
[15:44:22.588] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:44:28.043] <TB0> INFO: Test took 5455ms.
[15:44:28.576] <TB0> INFO: PixTestGainPedestal::measure() done
[15:45:03.611] <TB0> INFO: PixTestGainPedestal::fit() done
[15:45:03.611] <TB0> INFO: non-linearity mean: 0.960 0.962 0.955 0.956 0.955 0.957 0.958 0.959 0.958 0.959 0.959 0.965 0.959 0.958 0.962 0.956
[15:45:03.611] <TB0> INFO: non-linearity RMS: 0.005 0.005 0.007 0.006 0.006 0.007 0.006 0.007 0.006 0.007 0.005 0.009 0.007 0.008 0.005 0.007
[15:45:03.611] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:45:03.629] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:45:03.647] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:45:03.665] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:45:03.683] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:45:03.701] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:45:03.720] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:45:03.738] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:45:03.756] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:45:03.774] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:45:03.792] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:45:03.810] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:45:03.828] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:45:03.845] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:45:03.863] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:45:03.881] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:45:03.898] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 195 seconds
[15:45:03.904] <TB0> INFO: enter test to run
[15:45:03.905] <TB0> INFO: test: exit no parameter change
[15:45:04.351] <TB0> QUIET: Connection to board 126 closed.
[15:45:04.367] <TB0> INFO: pXar: this is the end, my friend