[11:37:58.957] <TB0> INFO: *** Welcome to pxar ***
[11:37:58.957] <TB0> INFO: *** Today: 2015/08/06
[11:37:58.957] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C15.dat
[11:37:58.957] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:37:58.957] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//defaultMaskFile.dat
[11:37:58.957] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters_C15.dat
[11:37:59.018] <TB0> INFO: clk: 4
[11:37:59.018] <TB0> INFO: ctr: 4
[11:37:59.018] <TB0> INFO: sda: 19
[11:37:59.018] <TB0> INFO: tin: 9
[11:37:59.018] <TB0> INFO: level: 15
[11:37:59.018] <TB0> INFO: triggerdelay: 0
[11:37:59.018] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[11:37:59.018] <TB0> INFO: Log level: INFO
[11:37:59.033] <TB0> INFO: Found DTB DTB_WWVASW
[11:37:59.044] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[11:37:59.047] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[11:37:59.050] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[11:38:00.564] <TB0> INFO: DUT info:
[11:38:00.564] <TB0> INFO: The DUT currently contains the following objects:
[11:38:00.564] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:38:00.564] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:38:00.564] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:38:00.565] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:38:00.565] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.565] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:38:00.966] <TB0> INFO: enter 'restricted' command line mode
[11:38:00.966] <TB0> INFO: enter test to run
[11:38:00.966] <TB0> INFO: test: pretest no parameter change
[11:38:00.966] <TB0> INFO: running: pretest
[11:38:00.970] <TB0> INFO: ######################################################################
[11:38:00.970] <TB0> INFO: PixTestPretest::doTest()
[11:38:00.970] <TB0> INFO: ######################################################################
[11:38:00.972] <TB0> INFO: ----------------------------------------------------------------------
[11:38:00.972] <TB0> INFO: PixTestPretest::programROC()
[11:38:00.972] <TB0> INFO: ----------------------------------------------------------------------
[11:38:18.987] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:38:18.987] <TB0> INFO: IA differences per ROC: 17.7 17.7 17.7 18.5 19.3 18.5 18.5 18.5 19.3 18.5 18.5 19.3 18.5 17.7 20.1 18.5
[11:38:19.079] <TB0> INFO: ----------------------------------------------------------------------
[11:38:19.079] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:38:19.079] <TB0> INFO: ----------------------------------------------------------------------
[11:38:24.132] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[11:38:24.135] <TB0> INFO: ----------------------------------------------------------------------
[11:38:24.135] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:38:24.135] <TB0> INFO: ----------------------------------------------------------------------
[11:38:36.058] <TB0> INFO: Test took 11918ms.
[11:38:36.363] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:38:36.385] <TB0> INFO: ----------------------------------------------------------------------
[11:38:36.385] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:38:36.385] <TB0> INFO: ----------------------------------------------------------------------
[11:38:50.314] <TB0> INFO: Test took 13923ms.
[11:38:50.610] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:38:50.611] <TB0> INFO: CalDel: 153 143 137 142 138 134 129 125 151 126 157 144 147 138 141 149
[11:38:50.611] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:38:50.615] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C0.dat
[11:38:50.615] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C1.dat
[11:38:50.615] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C2.dat
[11:38:50.616] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C3.dat
[11:38:50.616] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C4.dat
[11:38:50.616] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C5.dat
[11:38:50.617] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C6.dat
[11:38:50.617] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C7.dat
[11:38:50.617] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C8.dat
[11:38:50.617] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C9.dat
[11:38:50.617] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C10.dat
[11:38:50.618] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C11.dat
[11:38:50.618] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C12.dat
[11:38:50.618] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C13.dat
[11:38:50.618] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C14.dat
[11:38:50.619] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters_C15.dat
[11:38:50.619] <TB0> INFO: PixTestPretest::doTest() done, duration: 49 seconds
[11:38:50.712] <TB0> INFO: enter test to run
[11:38:50.712] <TB0> INFO: test: fulltest no parameter change
[11:38:50.712] <TB0> INFO: running: fulltest
[11:38:50.712] <TB0> INFO: ######################################################################
[11:38:50.712] <TB0> INFO: PixTestFullTest::doTest()
[11:38:50.712] <TB0> INFO: ######################################################################
[11:38:50.714] <TB0> INFO: ######################################################################
[11:38:50.714] <TB0> INFO: PixTestAlive::doTest()
[11:38:50.714] <TB0> INFO: ######################################################################
[11:38:50.715] <TB0> INFO: ----------------------------------------------------------------------
[11:38:50.715] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:38:50.715] <TB0> INFO: ----------------------------------------------------------------------
[11:38:55.760] <TB0> INFO: Test took 5044ms.
[11:38:55.780] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:55.990] <TB0> INFO: PixTestAlive::aliveTest() done
[11:38:55.990] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 3 0 0 0 2 0 0 0 1 0 0 0 0
[11:38:55.991] <TB0> INFO: ----------------------------------------------------------------------
[11:38:55.991] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:38:55.991] <TB0> INFO: ----------------------------------------------------------------------
[11:38:59.260] <TB0> INFO: Test took 3268ms.
[11:38:59.263] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:59.272] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:38:59.484] <TB0> INFO: PixTestAlive::maskTest() done
[11:38:59.484] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:38:59.486] <TB0> INFO: ----------------------------------------------------------------------
[11:38:59.486] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:38:59.486] <TB0> INFO: ----------------------------------------------------------------------
[11:39:03.907] <TB0> INFO: Test took 4420ms.
[11:39:03.931] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:04.142] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:39:04.142] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:39:04.143] <TB0> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[11:39:04.157] <TB0> INFO: ######################################################################
[11:39:04.157] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:39:04.157] <TB0> INFO: ######################################################################
[11:39:04.158] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[11:39:04.170] <TB0> INFO: dacScan step from 0 .. 29
[11:39:32.091] <TB0> INFO: Test took 27921ms.
[11:39:32.124] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:32.124] <TB0> INFO: dacScan step from 30 .. 59
[11:40:06.123] <TB0> INFO: Test took 33999ms.
[11:40:06.287] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:06.318] <TB0> INFO: dacScan step from 60 .. 89
[11:40:49.375] <TB0> INFO: Test took 43057ms.
[11:40:49.646] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:49.728] <TB0> INFO: dacScan step from 90 .. 119
[11:41:33.683] <TB0> INFO: Test took 43955ms.
[11:41:33.947] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:34.037] <TB0> INFO: dacScan step from 120 .. 149
[11:42:08.202] <TB0> INFO: Test took 34165ms.
[11:42:08.389] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:30.067] <TB0> INFO: PixTestBBMap::doTest() done, duration: 205 seconds
[11:42:30.067] <TB0> INFO: number of dead bumps (per ROC): 2 0 0 1 0 0 1 7 0 0 0 2 0 0 0 0
[11:42:30.068] <TB0> INFO: separation cut (per ROC): 74 84 80 79 95 74 82 85 73 87 74 80 103 81 77 76
[11:42:30.146] <TB0> INFO: ######################################################################
[11:42:30.146] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[11:42:30.146] <TB0> INFO: ######################################################################
[11:42:30.146] <TB0> INFO: ----------------------------------------------------------------------
[11:42:30.146] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[11:42:30.146] <TB0> INFO: ----------------------------------------------------------------------
[11:42:30.146] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[11:42:30.160] <TB0> INFO: dacScan step from 0 .. 3
[11:42:54.987] <TB0> INFO: Test took 24827ms.
[11:42:55.012] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:55.012] <TB0> INFO: dacScan step from 4 .. 7
[11:43:22.557] <TB0> INFO: Test took 27545ms.
[11:43:22.587] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:22.588] <TB0> INFO: dacScan step from 8 .. 11
[11:43:51.022] <TB0> INFO: Test took 28434ms.
[11:43:51.055] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:51.055] <TB0> INFO: dacScan step from 12 .. 15
[11:44:19.899] <TB0> INFO: Test took 28844ms.
[11:44:19.927] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:19.928] <TB0> INFO: dacScan step from 16 .. 19
[11:44:48.025] <TB0> INFO: Test took 28097ms.
[11:44:48.049] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:48.049] <TB0> INFO: dacScan step from 20 .. 23
[11:45:16.719] <TB0> INFO: Test took 28670ms.
[11:45:16.748] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:16.749] <TB0> INFO: dacScan step from 24 .. 27
[11:45:45.467] <TB0> INFO: Test took 28718ms.
[11:45:45.498] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:45.498] <TB0> INFO: dacScan step from 28 .. 31
[11:46:14.261] <TB0> INFO: Test took 28763ms.
[11:46:14.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:14.289] <TB0> INFO: dacScan step from 32 .. 35
[11:46:42.805] <TB0> INFO: Test took 28516ms.
[11:46:42.837] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:42.837] <TB0> INFO: dacScan step from 36 .. 39
[11:47:11.519] <TB0> INFO: Test took 28681ms.
[11:47:11.548] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:11.548] <TB0> INFO: dacScan step from 40 .. 43
[11:47:39.902] <TB0> INFO: Test took 28354ms.
[11:47:39.929] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:39.929] <TB0> INFO: dacScan step from 44 .. 47
[11:48:08.781] <TB0> INFO: Test took 28852ms.
[11:48:08.809] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:08.809] <TB0> INFO: dacScan step from 48 .. 51
[11:48:37.530] <TB0> INFO: Test took 28721ms.
[11:48:37.558] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:37.558] <TB0> INFO: dacScan step from 52 .. 55
[11:49:05.957] <TB0> INFO: Test took 28399ms.
[11:49:05.985] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:05.985] <TB0> INFO: dacScan step from 56 .. 59
[11:49:33.765] <TB0> INFO: Test took 27780ms.
[11:49:33.792] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:33.792] <TB0> INFO: dacScan step from 60 .. 63
[11:50:02.261] <TB0> INFO: Test took 28469ms.
[11:50:02.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:02.289] <TB0> INFO: dacScan step from 64 .. 67
[11:50:30.634] <TB0> INFO: Test took 28344ms.
[11:50:30.667] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:30.668] <TB0> INFO: dacScan step from 68 .. 71
[11:50:59.424] <TB0> INFO: Test took 28756ms.
[11:50:59.459] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:59.460] <TB0> INFO: dacScan step from 72 .. 75
[11:51:28.992] <TB0> INFO: Test took 29532ms.
[11:51:29.042] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:29.044] <TB0> INFO: dacScan step from 76 .. 79
[11:52:02.073] <TB0> INFO: Test took 33029ms.
[11:52:02.154] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:02.159] <TB0> INFO: dacScan step from 80 .. 83
[11:52:39.342] <TB0> INFO: Test took 37183ms.
[11:52:39.491] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:39.501] <TB0> INFO: dacScan step from 84 .. 87
[11:53:16.665] <TB0> INFO: Test took 37164ms.
[11:53:16.864] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:16.877] <TB0> INFO: dacScan step from 88 .. 91
[11:53:56.443] <TB0> INFO: Test took 39566ms.
[11:53:56.657] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:56.668] <TB0> INFO: dacScan step from 92 .. 95





[11:54:43.348] <TB0> INFO: Test took 46680ms.
[11:54:43.573] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:43.585] <TB0> INFO: dacScan step from 96 .. 99


[11:55:30.748] <TB0> INFO: Test took 47163ms.
[11:55:30.982] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:30.998] <TB0> INFO: dacScan step from 100 .. 103


[11:56:18.420] <TB0> INFO: Test took 47421ms.
[11:56:18.644] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:18.655] <TB0> INFO: dacScan step from 104 .. 107





[11:57:06.787] <TB0> INFO: Test took 48132ms.
[11:57:07.027] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:07.040] <TB0> INFO: dacScan step from 108 .. 111


[11:57:54.534] <TB0> INFO: Test took 47494ms.
[11:57:54.759] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:54.770] <TB0> INFO: dacScan step from 112 .. 115





[11:58:38.672] <TB0> INFO: Test took 43902ms.
[11:58:38.911] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:38.926] <TB0> INFO: dacScan step from 116 .. 119



[11:59:24.218] <TB0> INFO: Test took 45292ms.
[11:59:24.461] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:24.474] <TB0> INFO: dacScan step from 120 .. 123
[12:00:11.106] <TB0> INFO: Test took 46632ms.
[12:00:11.336] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:11.349] <TB0> INFO: dacScan step from 124 .. 127
[12:00:59.583] <TB0> INFO: Test took 48234ms.
[12:00:59.812] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:59.823] <TB0> INFO: dacScan step from 128 .. 131
[12:01:43.739] <TB0> INFO: Test took 43916ms.
[12:01:43.974] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:43.987] <TB0> INFO: dacScan step from 132 .. 135
[12:02:31.375] <TB0> INFO: Test took 47388ms.
[12:02:31.609] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:31.622] <TB0> INFO: dacScan step from 136 .. 139
[12:03:18.569] <TB0> INFO: Test took 46947ms.
[12:03:18.807] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:18.819] <TB0> INFO: dacScan step from 140 .. 143
[12:04:06.035] <TB0> INFO: Test took 47216ms.
[12:04:06.256] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:06.268] <TB0> INFO: dacScan step from 144 .. 147
[12:04:49.380] <TB0> INFO: Test took 43112ms.
[12:04:49.622] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:49.634] <TB0> INFO: dacScan step from 148 .. 149
[12:05:14.580] <TB0> INFO: Test took 24946ms.
[12:05:14.690] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:14.696] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:16.078] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:17.439] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:18.799] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:20.156] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:21.535] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:22.990] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:24.482] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:25.935] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:27.360] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:28.712] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:30.115] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:31.475] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:32.855] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:34.236] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:35.649] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:05:37.051] <TB0> INFO: PixTestScurves::scurves() done
[12:05:37.051] <TB0> INFO: Vcal mean: 82.63 89.38 85.11 87.34 98.41 80.47 82.32 79.18 79.93 90.01 78.29 90.76 93.16 88.75 83.66 82.04
[12:05:37.051] <TB0> INFO: Vcal RMS: 4.57 6.10 5.09 5.69 6.05 4.21 5.12 4.90 4.40 5.86 3.91 6.16 5.94 5.39 5.46 4.79
[12:05:37.051] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1386 seconds
[12:05:37.127] <TB0> INFO: ######################################################################
[12:05:37.127] <TB0> INFO: PixTestTrim::doTest()
[12:05:37.127] <TB0> INFO: ######################################################################
[12:05:37.128] <TB0> INFO: ----------------------------------------------------------------------
[12:05:37.128] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:05:37.128] <TB0> INFO: ----------------------------------------------------------------------
[12:05:37.211] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:05:37.211] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:05:37.219] <TB0> INFO: dacScan step from 0 .. 19
[12:05:57.096] <TB0> INFO: Test took 19877ms.
[12:05:57.121] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:57.121] <TB0> INFO: dacScan step from 20 .. 39
[12:06:15.416] <TB0> INFO: Test took 18295ms.
[12:06:15.436] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:15.436] <TB0> INFO: dacScan step from 40 .. 59
[12:06:33.726] <TB0> INFO: Test took 18290ms.
[12:06:33.747] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:33.747] <TB0> INFO: dacScan step from 60 .. 79
[12:06:52.772] <TB0> INFO: Test took 19025ms.
[12:06:52.797] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:52.797] <TB0> INFO: dacScan step from 80 .. 99
[12:07:14.227] <TB0> INFO: Test took 21430ms.
[12:07:14.288] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:14.301] <TB0> INFO: dacScan step from 100 .. 119
[12:07:42.384] <TB0> INFO: Test took 28083ms.
[12:07:42.551] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:42.585] <TB0> INFO: dacScan step from 120 .. 139
[12:08:10.608] <TB0> INFO: Test took 28022ms.
[12:08:10.763] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:10.788] <TB0> INFO: dacScan step from 140 .. 159
[12:08:32.394] <TB0> INFO: Test took 21606ms.
[12:08:32.456] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:55.263] <TB0> INFO: ROC 0 VthrComp = 87
[12:08:55.263] <TB0> INFO: ROC 1 VthrComp = 92
[12:08:55.263] <TB0> INFO: ROC 2 VthrComp = 90
[12:08:55.263] <TB0> INFO: ROC 3 VthrComp = 92
[12:08:55.263] <TB0> INFO: ROC 4 VthrComp = 100
[12:08:55.263] <TB0> INFO: ROC 5 VthrComp = 86
[12:08:55.263] <TB0> INFO: ROC 6 VthrComp = 87
[12:08:55.263] <TB0> INFO: ROC 7 VthrComp = 86
[12:08:55.263] <TB0> INFO: ROC 8 VthrComp = 86
[12:08:55.263] <TB0> INFO: ROC 9 VthrComp = 96
[12:08:55.263] <TB0> INFO: ROC 10 VthrComp = 82
[12:08:55.263] <TB0> INFO: ROC 11 VthrComp = 93
[12:08:55.264] <TB0> INFO: ROC 12 VthrComp = 97
[12:08:55.264] <TB0> INFO: ROC 13 VthrComp = 92
[12:08:55.264] <TB0> INFO: ROC 14 VthrComp = 89
[12:08:55.264] <TB0> INFO: ROC 15 VthrComp = 84
[12:08:55.264] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:08:55.264] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:08:55.276] <TB0> INFO: dacScan step from 0 .. 19
[12:09:15.336] <TB0> INFO: Test took 20060ms.
[12:09:15.363] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:15.363] <TB0> INFO: dacScan step from 20 .. 39
[12:09:34.259] <TB0> INFO: Test took 18896ms.
[12:09:34.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:34.293] <TB0> INFO: dacScan step from 40 .. 59
[12:09:58.573] <TB0> INFO: Test took 24280ms.
[12:09:58.715] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:58.750] <TB0> INFO: dacScan step from 60 .. 79
[12:10:27.839] <TB0> INFO: Test took 29089ms.
[12:10:28.024] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:28.071] <TB0> INFO: dacScan step from 80 .. 99
[12:10:57.355] <TB0> INFO: Test took 29283ms.
[12:10:57.514] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:57.560] <TB0> INFO: dacScan step from 100 .. 119
[12:11:26.596] <TB0> INFO: Test took 29036ms.
[12:11:26.772] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:26.821] <TB0> INFO: dacScan step from 120 .. 139
[12:11:55.639] <TB0> INFO: Test took 28818ms.
[12:11:55.806] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:55.858] <TB0> INFO: dacScan step from 140 .. 159
[12:12:21.698] <TB0> INFO: Test took 25840ms.
[12:12:21.865] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:47.399] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 56.9486 for pixel 29/79 mean/min/max = 44.3458/31.7151/56.9765
[12:12:47.400] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 61.8424 for pixel 1/78 mean/min/max = 46.7284/31.5453/61.9115
[12:12:47.400] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 58.0997 for pixel 0/78 mean/min/max = 45.3755/32.6352/58.1159
[12:12:47.400] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 57.3384 for pixel 17/77 mean/min/max = 44.9113/32.4137/57.4089
[12:12:47.400] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.6141 for pixel 1/67 mean/min/max = 46.1299/31.5455/60.7144
[12:12:47.401] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 56.6908 for pixel 51/59 mean/min/max = 44.6082/32.3193/56.897
[12:12:47.401] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.3623 for pixel 27/78 mean/min/max = 44.9517/31.5403/58.3631
[12:12:47.401] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 56.9382 for pixel 15/3 mean/min/max = 44.6044/32.0704/57.1384
[12:12:47.401] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 56.6761 for pixel 22/72 mean/min/max = 44.4694/31.7694/57.1694
[12:12:47.402] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 60.8141 for pixel 27/79 mean/min/max = 46.4106/31.8623/60.9589
[12:12:47.402] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 56.1654 for pixel 51/1 mean/min/max = 44.4643/32.6727/56.2558
[12:12:47.402] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 62.9688 for pixel 7/1 mean/min/max = 47.4493/31.7139/63.1847
[12:12:47.402] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 60.9522 for pixel 2/75 mean/min/max = 46.1087/31.1087/61.1087
[12:12:47.402] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 58.6791 for pixel 0/3 mean/min/max = 45.4641/32.0237/58.9045
[12:12:47.403] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 60.239 for pixel 16/70 mean/min/max = 45.9501/31.4919/60.4083
[12:12:47.403] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 58.923 for pixel 5/3 mean/min/max = 45.6789/32.3973/58.9605
[12:12:47.403] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:15:11.368] <TB0> INFO: Test took 143965ms.
[12:15:12.922] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:15:12.931] <TB0> INFO: dacScan step from 0 .. 19
[12:15:45.264] <TB0> INFO: Test took 32333ms.
[12:15:45.313] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:45.315] <TB0> INFO: dacScan step from 20 .. 39
[12:16:27.042] <TB0> INFO: Test took 41727ms.
[12:16:27.259] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:27.288] <TB0> INFO: dacScan step from 40 .. 59





[12:17:16.473] <TB0> INFO: Test took 49185ms.
[12:17:16.767] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:16.826] <TB0> INFO: dacScan step from 60 .. 79


[12:18:07.892] <TB0> INFO: Test took 51066ms.
[12:18:08.175] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:08.227] <TB0> INFO: dacScan step from 80 .. 99
[12:18:57.762] <TB0> INFO: Test took 49535ms.
[12:18:58.073] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:58.130] <TB0> INFO: dacScan step from 100 .. 119



[12:19:44.240] <TB0> INFO: Test took 46110ms.
[12:19:44.526] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:44.576] <TB0> INFO: dacScan step from 120 .. 139



[12:20:36.382] <TB0> INFO: Test took 51806ms.
[12:20:36.655] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:36.703] <TB0> INFO: dacScan step from 140 .. 159

[12:21:26.188] <TB0> INFO: Test took 49485ms.
[12:21:26.470] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:26.521] <TB0> INFO: dacScan step from 160 .. 179
[12:22:14.081] <TB0> INFO: Test took 47560ms.
[12:22:14.362] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:14.413] <TB0> INFO: dacScan step from 180 .. 199
[12:23:00.386] <TB0> INFO: Test took 45972ms.
[12:23:00.752] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:25.019] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.131154 .. 255.000000
[12:23:25.094] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:23:25.103] <TB0> INFO: dacScan step from 0 .. 19
[12:23:41.452] <TB0> INFO: Test took 16345ms.
[12:23:41.472] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:41.472] <TB0> INFO: dacScan step from 20 .. 39
[12:24:01.539] <TB0> INFO: Test took 20067ms.
[12:24:01.624] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:01.642] <TB0> INFO: dacScan step from 40 .. 59
[12:24:25.380] <TB0> INFO: Test took 23738ms.
[12:24:25.549] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:25.603] <TB0> INFO: dacScan step from 60 .. 79
[12:24:50.151] <TB0> INFO: Test took 24548ms.
[12:24:50.291] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:50.345] <TB0> INFO: dacScan step from 80 .. 99
[12:25:15.401] <TB0> INFO: Test took 25056ms.
[12:25:15.548] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:15.607] <TB0> INFO: dacScan step from 100 .. 119
[12:25:38.173] <TB0> INFO: Test took 22565ms.
[12:25:38.310] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:38.361] <TB0> INFO: dacScan step from 120 .. 139
[12:26:01.955] <TB0> INFO: Test took 23594ms.
[12:26:02.106] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:02.163] <TB0> INFO: dacScan step from 140 .. 159
[12:26:27.317] <TB0> INFO: Test took 25154ms.
[12:26:27.474] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:27.525] <TB0> INFO: dacScan step from 160 .. 179
[12:26:52.853] <TB0> INFO: Test took 25328ms.
[12:26:52.989] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:53.038] <TB0> INFO: dacScan step from 180 .. 199
[12:27:16.218] <TB0> INFO: Test took 23180ms.
[12:27:16.365] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:16.419] <TB0> INFO: dacScan step from 200 .. 219
[12:27:39.973] <TB0> INFO: Test took 23554ms.
[12:27:40.109] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:40.157] <TB0> INFO: dacScan step from 220 .. 239
[12:28:04.438] <TB0> INFO: Test took 24281ms.
[12:28:04.575] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:04.621] <TB0> INFO: dacScan step from 240 .. 255
[12:28:25.130] <TB0> INFO: Test took 20508ms.
[12:28:25.241] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:57.911] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 12.651983 .. 70.393923
[12:28:57.992] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 80 (20) hits flags = 16 (plus default)
[12:28:58.001] <TB0> INFO: dacScan step from 2 .. 21
[12:29:14.437] <TB0> INFO: Test took 16436ms.
[12:29:14.461] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:14.462] <TB0> INFO: dacScan step from 22 .. 41
[12:29:34.761] <TB0> INFO: Test took 20299ms.
[12:29:34.874] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:34.900] <TB0> INFO: dacScan step from 42 .. 61
[12:29:58.373] <TB0> INFO: Test took 23473ms.
[12:29:58.531] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:58.597] <TB0> INFO: dacScan step from 62 .. 80
[12:30:21.761] <TB0> INFO: Test took 23164ms.
[12:30:21.904] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:44.877] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 19.799642 .. 39.343226
[12:30:44.970] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 9 .. 49 (20) hits flags = 16 (plus default)
[12:30:44.979] <TB0> INFO: dacScan step from 9 .. 28
[12:31:02.499] <TB0> INFO: Test took 17520ms.
[12:31:02.521] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:02.521] <TB0> INFO: dacScan step from 29 .. 48
[12:31:25.331] <TB0> INFO: Test took 22810ms.
[12:31:25.463] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:25.496] <TB0> INFO: dacScan step from 49 .. 49
[12:31:29.223] <TB0> INFO: Test took 3727ms.
[12:31:29.236] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:45.297] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 5.500000 .. 38.680628
[12:31:45.383] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 5 .. 48 (20) hits flags = 16 (plus default)
[12:31:45.392] <TB0> INFO: dacScan step from 5 .. 24
[12:32:01.359] <TB0> INFO: Test took 15967ms.
[12:32:01.378] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:01.378] <TB0> INFO: dacScan step from 25 .. 44
[12:32:21.453] <TB0> INFO: Test took 20076ms.
[12:32:21.570] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:21.601] <TB0> INFO: dacScan step from 45 .. 48
[12:32:28.297] <TB0> INFO: Test took 6695ms.
[12:32:28.331] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:42.729] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:32:42.729] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[12:32:42.741] <TB0> INFO: dacScan step from 15 .. 34
[12:33:13.346] <TB0> INFO: Test took 30605ms.
[12:33:13.436] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:13.452] <TB0> INFO: dacScan step from 35 .. 54


[12:34:00.778] <TB0> INFO: Test took 47326ms.
[12:34:01.065] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:01.111] <TB0> INFO: dacScan step from 55 .. 55
[12:34:06.339] <TB0> INFO: Test took 5228ms.
[12:34:06.353] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:20.534] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:34:20.534] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:34:20.535] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:34:20.535] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:34:20.535] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:34:20.535] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:34:20.536] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:34:20.536] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:34:20.536] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:34:20.536] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:34:20.537] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:34:20.537] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:34:20.537] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:34:20.537] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:34:20.537] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:34:20.538] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:34:20.538] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:34:20.549] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:34:20.556] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:34:20.563] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:34:20.570] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:34:20.576] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:34:20.582] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:34:20.589] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:34:20.595] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:34:20.602] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:34:20.609] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:34:20.616] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:34:20.623] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:34:20.629] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:34:20.635] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:34:20.641] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:34:20.648] <TB0> INFO: PixTestTrim::trimTest() done
[12:34:20.648] <TB0> INFO: vtrim: 90 117 107 112 112 100 124 107 116 127 91 125 113 113 122 97
[12:34:20.648] <TB0> INFO: vthrcomp: 87 92 90 92 100 86 87 86 86 96 82 93 97 92 89 84
[12:34:20.648] <TB0> INFO: vcal mean: 35.03 35.09 35.01 35.00 35.04 34.99 34.93 34.92 35.03 35.05 35.01 35.07 35.01 35.03 35.01 35.02
[12:34:20.648] <TB0> INFO: vcal RMS: 1.02 1.02 1.00 1.36 1.06 0.97 1.08 1.22 0.98 1.03 0.96 1.18 1.10 1.08 1.01 1.13
[12:34:20.648] <TB0> INFO: bits mean: 10.04 9.45 9.92 10.21 9.71 9.67 10.32 10.25 10.12 9.64 9.42 9.43 10.15 10.10 9.95 9.82
[12:34:20.648] <TB0> INFO: bits RMS: 2.55 2.64 2.42 2.34 2.64 2.64 2.40 2.34 2.46 2.60 2.69 2.67 2.49 2.42 2.53 2.52
[12:34:20.655] <TB0> INFO: ----------------------------------------------------------------------
[12:34:20.655] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:34:20.656] <TB0> INFO: ----------------------------------------------------------------------
[12:34:20.657] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:34:20.667] <TB0> INFO: dacScan step from 0 .. 19
[12:34:51.343] <TB0> INFO: Test took 30676ms.
[12:34:51.380] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:51.380] <TB0> INFO: dacScan step from 20 .. 39
[12:35:20.131] <TB0> INFO: Test took 28751ms.
[12:35:20.165] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:20.165] <TB0> INFO: dacScan step from 40 .. 59
[12:35:51.614] <TB0> INFO: Test took 31449ms.
[12:35:51.649] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:51.649] <TB0> INFO: dacScan step from 60 .. 79
[12:36:21.497] <TB0> INFO: Test took 29848ms.
[12:36:21.530] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:21.530] <TB0> INFO: dacScan step from 80 .. 99
[12:36:51.555] <TB0> INFO: Test took 30025ms.
[12:36:51.605] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:51.607] <TB0> INFO: dacScan step from 100 .. 119
[12:37:36.385] <TB0> INFO: Test took 44778ms.
[12:37:36.630] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:36.652] <TB0> INFO: dacScan step from 120 .. 139
[12:38:25.344] <TB0> INFO: Test took 48692ms.
[12:38:25.614] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:25.657] <TB0> INFO: dacScan step from 140 .. 159


[12:39:16.580] <TB0> INFO: Test took 50923ms.
[12:39:16.850] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:16.897] <TB0> INFO: dacScan step from 160 .. 179
[12:40:08.168] <TB0> INFO: Test took 51271ms.
[12:40:08.425] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:08.471] <TB0> INFO: dacScan step from 180 .. 199
[12:40:59.152] <TB0> INFO: Test took 50681ms.
[12:40:59.434] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:26.690] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 162 (20) hits flags = 16 (plus default)
[12:41:26.698] <TB0> INFO: dacScan step from 0 .. 19
[12:41:57.911] <TB0> INFO: Test took 31213ms.
[12:41:57.951] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:57.951] <TB0> INFO: dacScan step from 20 .. 39
[12:42:29.740] <TB0> INFO: Test took 31789ms.
[12:42:29.776] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:29.776] <TB0> INFO: dacScan step from 40 .. 59
[12:43:01.337] <TB0> INFO: Test took 31561ms.
[12:43:01.374] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:01.374] <TB0> INFO: dacScan step from 60 .. 79
[12:43:33.102] <TB0> INFO: Test took 31727ms.
[12:43:33.137] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:33.137] <TB0> INFO: dacScan step from 80 .. 99
[12:44:05.591] <TB0> INFO: Test took 32454ms.
[12:44:05.715] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:05.731] <TB0> INFO: dacScan step from 100 .. 119
[12:44:49.476] <TB0> INFO: Test took 43745ms.
[12:44:49.752] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:49.793] <TB0> INFO: dacScan step from 120 .. 139

[12:45:36.762] <TB0> INFO: Test took 46969ms.
[12:45:37.053] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:37.107] <TB0> INFO: dacScan step from 140 .. 159
[12:46:27.218] <TB0> INFO: Test took 50111ms.
[12:46:27.500] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:27.544] <TB0> INFO: dacScan step from 160 .. 162
[12:46:37.402] <TB0> INFO: Test took 9858ms.
[12:46:37.447] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:01.606] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[12:47:01.613] <TB0> INFO: dacScan step from 0 .. 19
[12:47:33.908] <TB0> INFO: Test took 32295ms.
[12:47:33.946] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:33.946] <TB0> INFO: dacScan step from 20 .. 39
[12:48:05.521] <TB0> INFO: Test took 31574ms.
[12:48:05.557] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:05.557] <TB0> INFO: dacScan step from 40 .. 59
[12:48:37.865] <TB0> INFO: Test took 32308ms.
[12:48:37.900] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:37.900] <TB0> INFO: dacScan step from 60 .. 79
[12:49:08.068] <TB0> INFO: Test took 30168ms.
[12:49:08.108] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:08.108] <TB0> INFO: dacScan step from 80 .. 99
[12:49:44.698] <TB0> INFO: Test took 36590ms.
[12:49:44.814] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:44.828] <TB0> INFO: dacScan step from 100 .. 119
[12:50:33.639] <TB0> INFO: Test took 48810ms.
[12:50:33.907] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:33.945] <TB0> INFO: dacScan step from 120 .. 139
[12:51:24.984] <TB0> INFO: Test took 51038ms.
[12:51:25.273] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:25.320] <TB0> INFO: dacScan step from 140 .. 153
[12:51:58.339] <TB0> INFO: Test took 33019ms.
[12:51:58.532] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:19.951] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[12:52:19.959] <TB0> INFO: dacScan step from 0 .. 19
[12:52:49.803] <TB0> INFO: Test took 29844ms.
[12:52:49.843] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:49.843] <TB0> INFO: dacScan step from 20 .. 39
[12:53:19.602] <TB0> INFO: Test took 29759ms.
[12:53:19.637] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:19.637] <TB0> INFO: dacScan step from 40 .. 59
[12:53:49.087] <TB0> INFO: Test took 29450ms.
[12:53:49.134] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:49.134] <TB0> INFO: dacScan step from 60 .. 79
[12:54:20.381] <TB0> INFO: Test took 31247ms.
[12:54:20.418] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:20.418] <TB0> INFO: dacScan step from 80 .. 99
[12:54:56.686] <TB0> INFO: Test took 36268ms.
[12:54:56.802] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:56.813] <TB0> INFO: dacScan step from 100 .. 119
[12:55:45.285] <TB0> INFO: Test took 48472ms.
[12:55:45.593] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:45.627] <TB0> INFO: dacScan step from 120 .. 139



[12:56:35.691] <TB0> INFO: Test took 50064ms.
[12:56:35.971] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:36.025] <TB0> INFO: dacScan step from 140 .. 152
[12:57:07.577] <TB0> INFO: Test took 31552ms.
[12:57:07.759] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:28.683] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[12:57:28.691] <TB0> INFO: dacScan step from 0 .. 19
[12:57:57.194] <TB0> INFO: Test took 28503ms.
[12:57:57.228] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:57.228] <TB0> INFO: dacScan step from 20 .. 39
[12:58:26.081] <TB0> INFO: Test took 28853ms.
[12:58:26.122] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:26.122] <TB0> INFO: dacScan step from 40 .. 59
[12:58:57.787] <TB0> INFO: Test took 31665ms.
[12:58:57.825] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:57.825] <TB0> INFO: dacScan step from 60 .. 79
[12:59:29.016] <TB0> INFO: Test took 31191ms.
[12:59:29.054] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:29.054] <TB0> INFO: dacScan step from 80 .. 99
[13:00:05.552] <TB0> INFO: Test took 36498ms.
[13:00:05.685] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:05.698] <TB0> INFO: dacScan step from 100 .. 119
[13:00:54.501] <TB0> INFO: Test took 48803ms.
[13:00:54.755] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:54.790] <TB0> INFO: dacScan step from 120 .. 139
[13:01:46.039] <TB0> INFO: Test took 51249ms.
[13:01:46.346] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:46.394] <TB0> INFO: dacScan step from 140 .. 152
[13:02:21.259] <TB0> INFO: Test took 34865ms.
[13:02:21.456] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:43.031] <TB0> INFO: PixTestTrim::trimBitTest() done
[13:02:43.033] <TB0> INFO: PixTestTrim::doTest() done, duration: 3425 seconds
[13:02:43.695] <TB0> INFO: ######################################################################
[13:02:43.695] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:02:43.695] <TB0> INFO: ######################################################################
[13:02:47.788] <TB0> INFO: Test took 4092ms.
[13:02:47.806] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:52.288] <TB0> INFO: Test took 4286ms.
[13:02:52.356] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:56.491] <TB0> INFO: Test took 4126ms.
[13:02:56.579] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:56.585] <TB0> INFO: The DUT currently contains the following objects:
[13:02:56.585] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:02:56.585] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:02:56.585] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:02:56.585] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:02:56.585] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:56.585] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.740] <TB0> INFO: Test took 1155ms.
[13:02:57.740] <TB0> INFO: The DUT currently contains the following objects:
[13:02:57.740] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:02:57.740] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:02:57.740] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:02:57.740] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:02:57.740] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.740] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.740] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.740] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.740] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.740] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.740] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.740] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.741] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.741] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.741] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.741] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.741] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.741] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.741] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:57.741] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.848] <TB0> INFO: Test took 1107ms.
[13:02:58.849] <TB0> INFO: The DUT currently contains the following objects:
[13:02:58.849] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:02:58.849] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:02:58.849] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:02:58.849] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:02:58.849] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:58.849] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.971] <TB0> INFO: Test took 1122ms.
[13:02:59.972] <TB0> INFO: The DUT currently contains the following objects:
[13:02:59.972] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:02:59.972] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:02:59.972] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:02:59.972] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:02:59.972] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:02:59.972] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.080] <TB0> INFO: Test took 1107ms.
[13:03:01.080] <TB0> INFO: The DUT currently contains the following objects:
[13:03:01.080] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:01.080] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:01.080] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:01.080] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:01.080] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.080] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.080] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.080] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:01.081] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.219] <TB0> INFO: Test took 1138ms.
[13:03:02.220] <TB0> INFO: The DUT currently contains the following objects:
[13:03:02.220] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:02.220] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:02.220] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:02.220] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:02.220] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:02.220] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.358] <TB0> INFO: Test took 1138ms.
[13:03:03.359] <TB0> INFO: The DUT currently contains the following objects:
[13:03:03.359] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:03.359] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:03.359] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:03.359] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:03.359] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:03.359] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: Test took 1122ms.
[13:03:04.481] <TB0> INFO: The DUT currently contains the following objects:
[13:03:04.481] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:04.481] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:04.481] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:04.481] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:04.481] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:04.481] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.620] <TB0> INFO: Test took 1139ms.
[13:03:05.621] <TB0> INFO: The DUT currently contains the following objects:
[13:03:05.621] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:05.621] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:05.621] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:05.621] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:05.621] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:05.621] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.744] <TB0> INFO: Test took 1123ms.
[13:03:06.745] <TB0> INFO: The DUT currently contains the following objects:
[13:03:06.745] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:06.745] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:06.745] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:06.745] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:06.745] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:06.745] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.898] <TB0> INFO: Test took 1153ms.
[13:03:07.899] <TB0> INFO: The DUT currently contains the following objects:
[13:03:07.899] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:07.899] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:07.899] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:07.899] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:07.899] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:07.899] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.052] <TB0> INFO: Test took 1153ms.
[13:03:09.053] <TB0> INFO: The DUT currently contains the following objects:
[13:03:09.053] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:09.053] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:09.053] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:09.053] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:09.053] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:09.053] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.206] <TB0> INFO: Test took 1153ms.
[13:03:10.206] <TB0> INFO: The DUT currently contains the following objects:
[13:03:10.206] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:10.206] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:10.206] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:10.206] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:10.206] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.206] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.206] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:10.207] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: Test took 1152ms.
[13:03:11.359] <TB0> INFO: The DUT currently contains the following objects:
[13:03:11.359] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:11.359] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:11.359] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:11.359] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:11.359] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.359] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.360] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.360] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.360] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.360] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:11.360] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.481] <TB0> INFO: Test took 1121ms.
[13:03:12.481] <TB0> INFO: The DUT currently contains the following objects:
[13:03:12.481] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:12.481] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:12.481] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:12.481] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:12.481] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.481] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.481] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.481] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.481] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.481] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.481] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.481] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.482] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.482] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.482] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.482] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.482] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.482] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.482] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:12.482] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.634] <TB0> INFO: Test took 1152ms.
[13:03:13.635] <TB0> INFO: The DUT currently contains the following objects:
[13:03:13.645] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:03:13.645] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:03:13.645] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:03:13.645] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:03:13.645] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:13.645] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:03:14.771] <TB0> INFO: Test took 1126ms.
[13:03:14.773] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:09:23.168] <TB0> INFO: Test took 368395ms.
[13:09:24.705] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:34.154] <TB0> INFO: Test took 369449ms.
[13:15:35.933] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:35.940] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:35.946] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:35.953] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:35.959] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:35.966] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:35.972] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:35.979] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.006] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.013] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.020] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.026] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.033] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.040] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.048] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.055] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:15:36.080] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:15:36.080] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:15:36.080] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:15:36.080] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:15:36.080] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:15:36.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:15:36.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:15:36.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:15:36.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:15:36.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:15:36.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:15:36.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:15:36.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:15:36.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:15:36.087] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:15:36.087] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:15:40.572] <TB0> INFO: Test took 4484ms.
[13:15:45.351] <TB0> INFO: Test took 4507ms.
[13:15:50.029] <TB0> INFO: Test took 4395ms.
[13:15:50.299] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:51.288] <TB0> INFO: Test took 990ms.
[13:15:51.291] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:52.498] <TB0> INFO: Test took 1207ms.
[13:15:52.500] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:53.644] <TB0> INFO: Test took 1144ms.
[13:15:53.646] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:54.776] <TB0> INFO: Test took 1130ms.
[13:15:54.778] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:55.922] <TB0> INFO: Test took 1144ms.
[13:15:55.924] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:57.068] <TB0> INFO: Test took 1144ms.
[13:15:57.070] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:58.230] <TB0> INFO: Test took 1160ms.
[13:15:58.233] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:59.346] <TB0> INFO: Test took 1113ms.
[13:15:59.349] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:00.494] <TB0> INFO: Test took 1146ms.
[13:16:00.496] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:01.671] <TB0> INFO: Test took 1175ms.
[13:16:01.674] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:02.787] <TB0> INFO: Test took 1113ms.
[13:16:02.790] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:03.929] <TB0> INFO: Test took 1139ms.
[13:16:03.931] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:05.054] <TB0> INFO: Test took 1124ms.
[13:16:05.056] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:06.170] <TB0> INFO: Test took 1115ms.
[13:16:06.173] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:07.365] <TB0> INFO: Test took 1192ms.
[13:16:07.367] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:08.496] <TB0> INFO: Test took 1129ms.
[13:16:08.499] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:09.659] <TB0> INFO: Test took 1160ms.
[13:16:09.661] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:10.836] <TB0> INFO: Test took 1175ms.
[13:16:10.838] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:11.997] <TB0> INFO: Test took 1159ms.
[13:16:12.000] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:13.128] <TB0> INFO: Test took 1129ms.
[13:16:13.131] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:14.261] <TB0> INFO: Test took 1130ms.
[13:16:14.263] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:15.423] <TB0> INFO: Test took 1160ms.
[13:16:15.425] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:16.569] <TB0> INFO: Test took 1144ms.
[13:16:16.571] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:17.716] <TB0> INFO: Test took 1145ms.
[13:16:17.719] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:18.879] <TB0> INFO: Test took 1160ms.
[13:16:18.881] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:20.010] <TB0> INFO: Test took 1129ms.
[13:16:20.012] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:21.156] <TB0> INFO: Test took 1144ms.
[13:16:21.158] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:22.333] <TB0> INFO: Test took 1175ms.
[13:16:22.335] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:23.478] <TB0> INFO: Test took 1143ms.
[13:16:23.481] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:24.655] <TB0> INFO: Test took 1174ms.
[13:16:24.658] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:25.818] <TB0> INFO: Test took 1161ms.
[13:16:25.820] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:26.963] <TB0> INFO: Test took 1143ms.
[13:16:27.490] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 823 seconds
[13:16:27.490] <TB0> INFO: PH scale (per ROC): 86 79 82 87 84 81 80 91 80 80 85 84 87 81 87 83
[13:16:27.490] <TB0> INFO: PH offset (per ROC): 130 154 163 155 176 147 149 165 166 165 138 170 161 145 143 158
[13:16:27.685] <TB0> INFO: ######################################################################
[13:16:27.685] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:16:27.685] <TB0> INFO: ######################################################################
[13:16:27.693] <TB0> INFO: scanning low vcal = 10
[13:16:32.083] <TB0> INFO: Test took 4390ms.
[13:16:32.088] <TB0> INFO: scanning low vcal = 20
[13:16:36.373] <TB0> INFO: Test took 4285ms.
[13:16:36.377] <TB0> INFO: scanning low vcal = 30
[13:16:40.714] <TB0> INFO: Test took 4337ms.
[13:16:40.726] <TB0> INFO: scanning low vcal = 40
[13:16:45.982] <TB0> INFO: Test took 5256ms.
[13:16:46.059] <TB0> INFO: scanning low vcal = 50
[13:16:51.407] <TB0> INFO: Test took 5348ms.
[13:16:51.471] <TB0> INFO: scanning low vcal = 60
[13:16:56.878] <TB0> INFO: Test took 5407ms.
[13:16:56.935] <TB0> INFO: scanning low vcal = 70
[13:17:02.401] <TB0> INFO: Test took 5467ms.
[13:17:02.479] <TB0> INFO: scanning low vcal = 80
[13:17:07.784] <TB0> INFO: Test took 5305ms.
[13:17:07.846] <TB0> INFO: scanning low vcal = 90
[13:17:13.063] <TB0> INFO: Test took 5217ms.
[13:17:13.143] <TB0> INFO: scanning low vcal = 100
[13:17:18.131] <TB0> INFO: Test took 4988ms.
[13:17:18.189] <TB0> INFO: scanning low vcal = 110
[13:17:23.333] <TB0> INFO: Test took 5144ms.
[13:17:23.396] <TB0> INFO: scanning low vcal = 120
[13:17:28.664] <TB0> INFO: Test took 5268ms.
[13:17:28.733] <TB0> INFO: scanning low vcal = 130
[13:17:33.684] <TB0> INFO: Test took 4951ms.
[13:17:33.762] <TB0> INFO: scanning low vcal = 140
[13:17:38.937] <TB0> INFO: Test took 5113ms.
[13:17:39.000] <TB0> INFO: scanning low vcal = 150
[13:17:44.159] <TB0> INFO: Test took 5159ms.
[13:17:44.223] <TB0> INFO: scanning low vcal = 160
[13:17:49.400] <TB0> INFO: Test took 5177ms.
[13:17:49.460] <TB0> INFO: scanning low vcal = 170
[13:17:54.645] <TB0> INFO: Test took 5185ms.
[13:17:54.706] <TB0> INFO: scanning low vcal = 180
[13:17:59.865] <TB0> INFO: Test took 5159ms.
[13:17:59.928] <TB0> INFO: scanning low vcal = 190
[13:18:05.387] <TB0> INFO: Test took 5459ms.
[13:18:05.447] <TB0> INFO: scanning low vcal = 200
[13:18:10.629] <TB0> INFO: Test took 5182ms.
[13:18:10.689] <TB0> INFO: scanning low vcal = 210
[13:18:15.930] <TB0> INFO: Test took 5241ms.
[13:18:15.990] <TB0> INFO: scanning low vcal = 220
[13:18:21.045] <TB0> INFO: Test took 5055ms.
[13:18:21.108] <TB0> INFO: scanning low vcal = 230
[13:18:26.363] <TB0> INFO: Test took 5255ms.
[13:18:26.427] <TB0> INFO: scanning low vcal = 240
[13:18:31.508] <TB0> INFO: Test took 5081ms.
[13:18:31.586] <TB0> INFO: scanning low vcal = 250
[13:18:36.756] <TB0> INFO: Test took 5170ms.
[13:18:36.819] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[13:18:41.955] <TB0> INFO: Test took 5136ms.
[13:18:42.016] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[13:18:47.034] <TB0> INFO: Test took 5018ms.
[13:18:47.100] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[13:18:52.261] <TB0> INFO: Test took 5161ms.
[13:18:52.322] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[13:18:57.611] <TB0> INFO: Test took 5289ms.
[13:18:57.693] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:19:02.903] <TB0> INFO: Test took 5210ms.
[13:19:03.410] <TB0> INFO: PixTestGainPedestal::measure() done
[13:19:34.681] <TB0> INFO: PixTestGainPedestal::fit() done
[13:19:34.681] <TB0> INFO: non-linearity mean: 0.953 0.952 0.955 0.954 0.951 0.953 0.953 0.956 0.952 0.960 0.955 0.961 0.956 0.959 0.958 0.952
[13:19:34.681] <TB0> INFO: non-linearity RMS: 0.005 0.007 0.005 0.005 0.006 0.007 0.007 0.006 0.006 0.006 0.005 0.005 0.007 0.007 0.005 0.006
[13:19:34.681] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:19:34.702] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:19:34.722] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:19:34.741] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:19:34.761] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:19:34.780] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:19:34.799] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:19:34.819] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:19:34.838] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:19:34.858] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:19:34.878] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:19:34.898] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:19:34.919] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:19:34.938] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:19:34.958] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:19:34.978] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:19:34.999] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 187 seconds
[13:19:35.006] <TB0> INFO: enter test to run
[13:19:35.007] <TB0> INFO: test: exit no parameter change
[13:19:35.495] <TB0> QUIET: Connection to board 126 closed.
[13:19:35.510] <TB0> INFO: pXar: this is the end, my friend