Test Date: 2015-08-06 10:09
Analysis date: 2016-05-26 00:44
Logfile
LogfileView
[08:16:46.840] <TB0> INFO: *** Welcome to pxar ***
[08:16:46.840] <TB0> INFO: *** Today: 2015/08/06
[08:16:46.840] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C15.dat
[08:16:46.841] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:16:46.841] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//defaultMaskFile.dat
[08:16:46.841] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters_C15.dat
[08:16:47.130] <TB0> INFO: clk: 4
[08:16:47.130] <TB0> INFO: ctr: 4
[08:16:47.130] <TB0> INFO: sda: 19
[08:16:47.130] <TB0> INFO: tin: 9
[08:16:47.130] <TB0> INFO: level: 15
[08:16:47.131] <TB0> INFO: triggerdelay: 0
[08:16:47.131] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[08:16:47.131] <TB0> INFO: Log level: INFO
[08:16:47.181] <TB0> INFO: Found DTB DTB_WWVASW
[08:16:47.215] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[08:16:47.220] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
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[08:16:47.223] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[08:16:49.089] <TB0> INFO: DUT info:
[08:16:49.089] <TB0> INFO: The DUT currently contains the following objects:
[08:16:49.089] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:16:49.089] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:16:49.089] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:16:49.089] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:16:49.089] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.089] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:16:49.490] <TB0> INFO: enter 'restricted' command line mode
[08:16:49.490] <TB0> INFO: enter test to run
[08:16:49.490] <TB0> INFO: test: pretest no parameter change
[08:16:49.490] <TB0> INFO: running: pretest
[08:16:49.495] <TB0> INFO: ######################################################################
[08:16:49.495] <TB0> INFO: PixTestPretest::doTest()
[08:16:49.495] <TB0> INFO: ######################################################################
[08:16:49.497] <TB0> INFO: ----------------------------------------------------------------------
[08:16:49.497] <TB0> INFO: PixTestPretest::programROC()
[08:16:49.497] <TB0> INFO: ----------------------------------------------------------------------
[08:17:07.512] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:17:07.512] <TB0> INFO: IA differences per ROC: 18.5 18.5 17.7 19.3 20.1 19.3 18.5 19.3 20.1 19.3 19.3 19.3 19.3 18.5 20.9 19.3
[08:17:07.575] <TB0> INFO: ----------------------------------------------------------------------
[08:17:07.575] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:17:07.575] <TB0> INFO: ----------------------------------------------------------------------
[08:17:12.227] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[08:17:12.231] <TB0> INFO: ----------------------------------------------------------------------
[08:17:12.231] <TB0> INFO: PixTestPretest::findWorkingPixel()
[08:17:12.231] <TB0> INFO: ----------------------------------------------------------------------
[08:17:23.535] <TB0> INFO: Test took 11299ms.
[08:17:23.816] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:17:23.835] <TB0> INFO: ----------------------------------------------------------------------
[08:17:23.835] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[08:17:23.835] <TB0> INFO: ----------------------------------------------------------------------
[08:17:37.929] <TB0> INFO: Test took 14091ms.
[08:17:38.321] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[08:17:38.321] <TB0> INFO: CalDel: 152 142 137 142 139 134 129 124 151 126 156 144 146 138 141 149
[08:17:38.321] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:17:38.324] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C0.dat
[08:17:38.324] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C1.dat
[08:17:38.325] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C2.dat
[08:17:38.325] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C3.dat
[08:17:38.325] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C4.dat
[08:17:38.325] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C5.dat
[08:17:38.325] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C6.dat
[08:17:38.325] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C7.dat
[08:17:38.325] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C8.dat
[08:17:38.325] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C9.dat
[08:17:38.326] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C10.dat
[08:17:38.326] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C11.dat
[08:17:38.326] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C12.dat
[08:17:38.326] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C13.dat
[08:17:38.326] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C14.dat
[08:17:38.326] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters_C15.dat
[08:17:38.326] <TB0> INFO: PixTestPretest::doTest() done, duration: 48 seconds
[08:17:38.708] <TB0> INFO: enter test to run
[08:17:38.708] <TB0> INFO: test: fulltest no parameter change
[08:17:38.708] <TB0> INFO: running: fulltest
[08:17:38.708] <TB0> INFO: ######################################################################
[08:17:38.709] <TB0> INFO: PixTestFullTest::doTest()
[08:17:38.709] <TB0> INFO: ######################################################################
[08:17:38.715] <TB0> INFO: ######################################################################
[08:17:38.715] <TB0> INFO: PixTestAlive::doTest()
[08:17:38.715] <TB0> INFO: ######################################################################
[08:17:38.718] <TB0> INFO: ----------------------------------------------------------------------
[08:17:38.718] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:17:38.718] <TB0> INFO: ----------------------------------------------------------------------
[08:17:44.757] <TB0> INFO: Test took 6038ms.
[08:17:44.813] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:45.037] <TB0> INFO: PixTestAlive::aliveTest() done
[08:17:45.037] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 3 0 0 0 2 0 0 0 1 0 0 0 0
[08:17:45.039] <TB0> INFO: ----------------------------------------------------------------------
[08:17:45.039] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:17:45.039] <TB0> INFO: ----------------------------------------------------------------------
[08:17:48.469] <TB0> INFO: Test took 3429ms.
[08:17:48.471] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:48.471] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:17:48.681] <TB0> INFO: PixTestAlive::maskTest() done
[08:17:48.681] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:17:48.683] <TB0> INFO: ----------------------------------------------------------------------
[08:17:48.683] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:17:48.683] <TB0> INFO: ----------------------------------------------------------------------
[08:17:53.715] <TB0> INFO: Test took 5031ms.
[08:17:53.784] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:54.020] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[08:17:54.020] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:17:54.020] <TB0> INFO: PixTestAlive::doTest() done, duration: 15 seconds
[08:17:54.042] <TB0> INFO: ######################################################################
[08:17:54.042] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:17:54.042] <TB0> INFO: ######################################################################
[08:17:54.044] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[08:17:54.071] <TB0> INFO: dacScan step from 0 .. 29
[08:18:21.589] <TB0> INFO: Test took 27518ms.
[08:18:21.729] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:18:21.729] <TB0> INFO: dacScan step from 30 .. 59
[08:18:53.303] <TB0> INFO: Test took 31574ms.
[08:18:53.878] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:18:54.025] <TB0> INFO: dacScan step from 60 .. 89
[08:19:35.764] <TB0> INFO: Test took 41739ms.
[08:19:37.055] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:37.622] <TB0> INFO: dacScan step from 90 .. 119
[08:20:18.303] <TB0> INFO: Test took 40681ms.
[08:20:19.398] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:19.747] <TB0> INFO: dacScan step from 120 .. 149
[08:20:54.047] <TB0> INFO: Test took 34300ms.
[08:20:54.679] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:21.592] <TB0> INFO: PixTestBBMap::doTest() done, duration: 207 seconds
[08:21:21.592] <TB0> INFO: number of dead bumps (per ROC): 2 0 0 0 0 0 1 7 0 0 0 2 0 0 0 0
[08:21:21.592] <TB0> INFO: separation cut (per ROC): 74 88 80 80 93 74 82 91 74 87 76 82 108 84 76 79
[08:21:21.682] <TB0> INFO: ######################################################################
[08:21:21.682] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[08:21:21.682] <TB0> INFO: ######################################################################
[08:21:21.682] <TB0> INFO: ----------------------------------------------------------------------
[08:21:21.682] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[08:21:21.682] <TB0> INFO: ----------------------------------------------------------------------
[08:21:21.682] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[08:21:21.691] <TB0> INFO: dacScan step from 0 .. 3
[08:21:46.840] <TB0> INFO: Test took 25149ms.
[08:21:46.869] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:46.869] <TB0> INFO: dacScan step from 4 .. 7
[08:22:15.087] <TB0> INFO: Test took 28218ms.
[08:22:15.117] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:15.117] <TB0> INFO: dacScan step from 8 .. 11
[08:22:41.192] <TB0> INFO: Test took 26075ms.
[08:22:41.221] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:41.221] <TB0> INFO: dacScan step from 12 .. 15
[08:23:06.406] <TB0> INFO: Test took 25185ms.
[08:23:06.525] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:06.526] <TB0> INFO: dacScan step from 16 .. 19
[08:23:31.021] <TB0> INFO: Test took 24495ms.
[08:23:31.131] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:31.131] <TB0> INFO: dacScan step from 20 .. 23
[08:23:55.730] <TB0> INFO: Test took 24599ms.
[08:23:55.855] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:55.855] <TB0> INFO: dacScan step from 24 .. 27
[08:24:20.822] <TB0> INFO: Test took 24967ms.
[08:24:20.906] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:20.906] <TB0> INFO: dacScan step from 28 .. 31
[08:24:46.692] <TB0> INFO: Test took 25785ms.
[08:24:46.720] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:46.720] <TB0> INFO: dacScan step from 32 .. 35
[08:25:11.366] <TB0> INFO: Test took 24646ms.
[08:25:11.400] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:11.400] <TB0> INFO: dacScan step from 36 .. 39
[08:25:37.716] <TB0> INFO: Test took 26316ms.
[08:25:37.752] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:37.752] <TB0> INFO: dacScan step from 40 .. 43
[08:26:02.241] <TB0> INFO: Test took 24489ms.
[08:26:02.352] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:02.352] <TB0> INFO: dacScan step from 44 .. 47
[08:26:28.040] <TB0> INFO: Test took 25687ms.
[08:26:28.064] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:28.064] <TB0> INFO: dacScan step from 48 .. 51
[08:26:54.992] <TB0> INFO: Test took 26928ms.
[08:26:55.093] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:55.093] <TB0> INFO: dacScan step from 52 .. 55
[08:27:21.074] <TB0> INFO: Test took 25981ms.
[08:27:21.166] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:21.166] <TB0> INFO: dacScan step from 56 .. 59
[08:27:47.130] <TB0> INFO: Test took 25964ms.
[08:27:47.218] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:47.218] <TB0> INFO: dacScan step from 60 .. 63
[08:28:12.077] <TB0> INFO: Test took 24859ms.
[08:28:12.171] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:12.171] <TB0> INFO: dacScan step from 64 .. 67
[08:28:38.723] <TB0> INFO: Test took 26552ms.
[08:28:38.749] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:38.749] <TB0> INFO: dacScan step from 68 .. 71
[08:29:06.452] <TB0> INFO: Test took 27703ms.
[08:29:06.485] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:06.485] <TB0> INFO: dacScan step from 72 .. 75
[08:29:35.074] <TB0> INFO: Test took 28589ms.
[08:29:35.119] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:35.120] <TB0> INFO: dacScan step from 76 .. 79
[08:30:06.364] <TB0> INFO: Test took 31244ms.
[08:30:06.438] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:06.441] <TB0> INFO: dacScan step from 80 .. 83
[08:30:38.270] <TB0> INFO: Test took 31829ms.
[08:30:38.827] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:38.859] <TB0> INFO: dacScan step from 84 .. 87
[08:31:18.624] <TB0> INFO: Test took 39765ms.
[08:31:19.213] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:19.257] <TB0> INFO: dacScan step from 88 .. 91
[08:31:59.700] <TB0> INFO: Test took 40443ms.
[08:31:59.893] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:59.904] <TB0> INFO: dacScan step from 92 .. 95
[08:32:40.987] <TB0> INFO: Test took 41083ms.
[08:32:41.917] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:41.952] <TB0> INFO: dacScan step from 96 .. 99
[08:33:32.537] <TB0> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (31) != TBM ID (8)

[08:33:32.537] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[08:33:32.537] <TB0> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (9) != TBM ID (32)

[08:33:33.400] <TB0> INFO: Test took 51448ms.
[08:33:33.782] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:33.802] <TB0> INFO: dacScan step from 100 .. 103
[08:34:15.810] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:34:15.810] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[08:34:17.165] <TB0> INFO: Test took 43363ms.
[08:34:18.354] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:18.417] <TB0> INFO: dacScan step from 104 .. 107
[08:35:00.550] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:35:00.550] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[08:35:02.828] <TB0> INFO: Test took 44411ms.
[08:35:03.945] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:04.009] <TB0> INFO: dacScan step from 108 .. 111
[08:35:45.833] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:35:45.833] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[08:35:47.880] <TB0> INFO: Test took 43870ms.
[08:35:48.107] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:48.119] <TB0> INFO: dacScan step from 112 .. 115
[08:36:31.741] <TB0> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (211) != TBM ID (8)

[08:36:31.741] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[08:36:31.741] <TB0> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (9) != TBM ID (212)

[08:36:33.673] <TB0> INFO: Test took 45554ms.
[08:36:33.896] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:33.908] <TB0> INFO: dacScan step from 116 .. 119
[08:37:16.531] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:37:16.532] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[08:37:18.155] <TB0> INFO: Test took 44247ms.
[08:37:18.372] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:18.384] <TB0> INFO: dacScan step from 120 .. 123
[08:38:04.918] <TB0> INFO: Test took 46534ms.
[08:38:05.152] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:05.166] <TB0> INFO: dacScan step from 124 .. 127
[08:38:53.473] <TB0> INFO: Test took 48307ms.
[08:38:53.698] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:53.708] <TB0> INFO: dacScan step from 128 .. 131
[08:39:41.191] <TB0> INFO: Test took 47483ms.
[08:39:41.407] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:41.417] <TB0> INFO: dacScan step from 132 .. 135
[08:40:24.876] <TB0> INFO: Test took 43459ms.
[08:40:25.121] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:25.132] <TB0> INFO: dacScan step from 136 .. 139
[08:41:12.057] <TB0> INFO: Test took 46925ms.
[08:41:12.269] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:12.279] <TB0> INFO: dacScan step from 140 .. 143
[08:42:00.516] <TB0> INFO: Test took 48237ms.
[08:42:00.730] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:00.741] <TB0> INFO: dacScan step from 144 .. 147
[08:42:48.525] <TB0> INFO: Test took 47784ms.
[08:42:48.747] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:48.757] <TB0> INFO: dacScan step from 148 .. 149
[08:43:11.917] <TB0> INFO: Test took 23160ms.
[08:43:12.036] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:12.044] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:13.453] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:14.839] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:16.225] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:17.610] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:18.986] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:20.404] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:21.834] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:23.247] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:24.632] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:25.993] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:27.420] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:28.987] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:30.633] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:32.248] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:33.817] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:43:35.485] <TB0> INFO: PixTestScurves::scurves() done
[08:43:35.485] <TB0> INFO: Vcal mean: 83.94 91.27 85.21 87.20 98.64 80.52 83.07 80.59 80.66 90.07 80.08 90.69 95.74 90.59 83.67 85.23
[08:43:35.485] <TB0> INFO: Vcal RMS: 4.67 6.19 5.11 5.70 6.04 4.28 5.25 5.01 4.43 5.84 3.90 6.13 5.94 5.47 5.44 5.16
[08:43:35.485] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1333 seconds
[08:43:35.572] <TB0> INFO: ######################################################################
[08:43:35.572] <TB0> INFO: PixTestTrim::doTest()
[08:43:35.572] <TB0> INFO: ######################################################################
[08:43:35.573] <TB0> INFO: ----------------------------------------------------------------------
[08:43:35.573] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:43:35.573] <TB0> INFO: ----------------------------------------------------------------------
[08:43:35.651] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:43:35.651] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:43:35.659] <TB0> INFO: dacScan step from 0 .. 19
[08:43:54.629] <TB0> INFO: Test took 18970ms.
[08:43:54.649] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:54.649] <TB0> INFO: dacScan step from 20 .. 39
[08:44:12.067] <TB0> INFO: Test took 17418ms.
[08:44:12.086] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:12.086] <TB0> INFO: dacScan step from 40 .. 59
[08:44:32.019] <TB0> INFO: Test took 19933ms.
[08:44:32.042] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:32.042] <TB0> INFO: dacScan step from 60 .. 79
[08:44:51.426] <TB0> INFO: Test took 19384ms.
[08:44:51.452] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:51.452] <TB0> INFO: dacScan step from 80 .. 99
[08:45:12.176] <TB0> INFO: Test took 20724ms.
[08:45:12.232] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:12.246] <TB0> INFO: dacScan step from 100 .. 119
[08:45:40.647] <TB0> INFO: Test took 28401ms.
[08:45:40.805] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:40.841] <TB0> INFO: dacScan step from 120 .. 139
[08:46:08.766] <TB0> INFO: Test took 27925ms.
[08:46:08.923] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:08.950] <TB0> INFO: dacScan step from 140 .. 159
[08:46:31.419] <TB0> INFO: Test took 22469ms.
[08:46:31.483] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:52.915] <TB0> INFO: ROC 0 VthrComp = 89
[08:46:52.915] <TB0> INFO: ROC 1 VthrComp = 95
[08:46:52.915] <TB0> INFO: ROC 2 VthrComp = 90
[08:46:52.915] <TB0> INFO: ROC 3 VthrComp = 92
[08:46:52.915] <TB0> INFO: ROC 4 VthrComp = 100
[08:46:52.915] <TB0> INFO: ROC 5 VthrComp = 86
[08:46:52.915] <TB0> INFO: ROC 6 VthrComp = 88
[08:46:52.915] <TB0> INFO: ROC 7 VthrComp = 88
[08:46:52.915] <TB0> INFO: ROC 8 VthrComp = 87
[08:46:52.915] <TB0> INFO: ROC 9 VthrComp = 96
[08:46:52.915] <TB0> INFO: ROC 10 VthrComp = 85
[08:46:52.915] <TB0> INFO: ROC 11 VthrComp = 93
[08:46:52.915] <TB0> INFO: ROC 12 VthrComp = 100
[08:46:52.915] <TB0> INFO: ROC 13 VthrComp = 94
[08:46:52.915] <TB0> INFO: ROC 14 VthrComp = 89
[08:46:52.915] <TB0> INFO: ROC 15 VthrComp = 88
[08:46:52.915] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:46:52.915] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:46:52.926] <TB0> INFO: dacScan step from 0 .. 19
[08:47:12.586] <TB0> INFO: Test took 19660ms.
[08:47:12.605] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:12.605] <TB0> INFO: dacScan step from 20 .. 39
[08:47:31.234] <TB0> INFO: Test took 18629ms.
[08:47:31.274] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:31.278] <TB0> INFO: dacScan step from 40 .. 59
[08:47:59.387] <TB0> INFO: Test took 28109ms.
[08:47:59.532] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:59.570] <TB0> INFO: dacScan step from 60 .. 79
[08:48:29.765] <TB0> INFO: Test took 30195ms.
[08:48:29.933] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:29.982] <TB0> INFO: dacScan step from 80 .. 99
[08:48:59.340] <TB0> INFO: Test took 29358ms.
[08:48:59.536] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:59.583] <TB0> INFO: dacScan step from 100 .. 119
[08:49:28.819] <TB0> INFO: Test took 29236ms.
[08:49:28.994] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:29.044] <TB0> INFO: dacScan step from 120 .. 139
[08:49:59.159] <TB0> INFO: Test took 30115ms.
[08:49:59.327] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:59.372] <TB0> INFO: dacScan step from 140 .. 159
[08:50:28.634] <TB0> INFO: Test took 29262ms.
[08:50:28.801] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:53.436] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 57.4611 for pixel 29/79 mean/min/max = 45.1252/32.7778/57.4727
[08:50:53.436] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 61.0509 for pixel 23/76 mean/min/max = 45.9324/30.5898/61.2751
[08:50:53.436] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 58.1285 for pixel 30/29 mean/min/max = 45.3903/32.6388/58.1417
[08:50:53.437] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 57.483 for pixel 0/51 mean/min/max = 44.9268/32.3259/57.5278
[08:50:53.437] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.7041 for pixel 6/79 mean/min/max = 46.2317/31.7293/60.7342
[08:50:53.437] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 56.6393 for pixel 51/23 mean/min/max = 44.4444/32.2344/56.6544
[08:50:53.437] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.9701 for pixel 18/42 mean/min/max = 45.7393/32.4929/58.9857
[08:50:53.438] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.7133 for pixel 37/79 mean/min/max = 45.4099/32.927/57.8928
[08:50:53.438] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 57.1081 for pixel 2/79 mean/min/max = 44.4618/31.7375/57.186
[08:50:53.438] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 60.992 for pixel 10/17 mean/min/max = 46.542/31.9589/61.125
[08:50:53.438] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 56.013 for pixel 32/2 mean/min/max = 44.265/32.4087/56.1213
[08:50:53.439] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 62.7239 for pixel 17/0 mean/min/max = 47.408/31.7846/63.0315
[08:50:53.439] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 61.0764 for pixel 3/3 mean/min/max = 46.3561/31.2567/61.4555
[08:50:53.439] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 58.7556 for pixel 14/39 mean/min/max = 45.4919/32.1333/58.8505
[08:50:53.439] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 60.5255 for pixel 0/0 mean/min/max = 46.0115/31.4659/60.557
[08:50:53.439] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 59.3334 for pixel 16/4 mean/min/max = 46.272/33.0914/59.4527
[08:50:53.440] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:09.459] <TB0> INFO: Test took 136019ms.
[08:53:10.967] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:53:10.975] <TB0> INFO: dacScan step from 0 .. 19
[08:53:40.873] <TB0> INFO: Test took 29898ms.
[08:53:40.917] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:40.918] <TB0> INFO: dacScan step from 20 .. 39
[08:54:25.296] <TB0> INFO: Test took 44377ms.
[08:54:25.514] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:25.543] <TB0> INFO: dacScan step from 40 .. 59
[08:55:10.873] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:55:10.873] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[08:55:12.589] <TB0> INFO: Test took 47046ms.
[08:55:12.862] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:12.915] <TB0> INFO: dacScan step from 60 .. 79
[08:55:59.805] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:55:59.805] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[08:56:01.898] <TB0> INFO: Test took 48982ms.
[08:56:02.178] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:02.224] <TB0> INFO: dacScan step from 80 .. 99
[08:56:45.888] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:56:45.888] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 31 readouts!

[08:56:47.847] <TB0> INFO: Test took 45623ms.
[08:56:48.156] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:48.203] <TB0> INFO: dacScan step from 100 .. 119
[08:57:33.710] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:57:33.710] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[08:57:35.393] <TB0> INFO: Test took 47190ms.
[08:57:35.668] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:35.715] <TB0> INFO: dacScan step from 120 .. 139
[08:58:21.669] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[08:58:23.643] <TB0> INFO: Test took 47928ms.
[08:58:23.923] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:23.976] <TB0> INFO: dacScan step from 140 .. 159
[08:59:12.684] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[08:59:12.684] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[08:59:14.735] <TB0> INFO: Test took 50759ms.
[08:59:14.995] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:15.043] <TB0> INFO: dacScan step from 160 .. 179
[09:00:01.927] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[09:00:01.927] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[09:00:03.917] <TB0> INFO: Test took 48874ms.
[09:00:04.204] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:04.252] <TB0> INFO: dacScan step from 180 .. 199
[09:00:49.312] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[09:00:51.032] <TB0> INFO: Test took 46779ms.
[09:00:51.317] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:16.847] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.022130 .. 255.000000
[09:01:16.928] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:01:16.936] <TB0> INFO: dacScan step from 0 .. 19
[09:01:32.901] <TB0> INFO: Test took 15964ms.
[09:01:32.921] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:32.921] <TB0> INFO: dacScan step from 20 .. 39
[09:01:51.882] <TB0> INFO: Test took 18961ms.
[09:01:51.958] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:51.975] <TB0> INFO: dacScan step from 40 .. 59
[09:02:18.141] <TB0> INFO: Test took 26166ms.
[09:02:18.282] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:18.327] <TB0> INFO: dacScan step from 60 .. 79
[09:02:43.341] <TB0> INFO: Test took 25014ms.
[09:02:43.510] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:43.557] <TB0> INFO: dacScan step from 80 .. 99
[09:03:09.050] <TB0> INFO: Test took 25493ms.
[09:03:09.201] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:09.247] <TB0> INFO: dacScan step from 100 .. 119
[09:03:34.057] <TB0> INFO: Test took 24810ms.
[09:03:34.204] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:34.249] <TB0> INFO: dacScan step from 120 .. 139
[09:03:59.702] <TB0> INFO: Test took 25453ms.
[09:03:59.845] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:59.890] <TB0> INFO: dacScan step from 140 .. 159
[09:04:25.500] <TB0> INFO: Test took 25610ms.
[09:04:25.643] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:25.692] <TB0> INFO: dacScan step from 160 .. 179
[09:04:50.873] <TB0> INFO: Test took 25181ms.
[09:04:51.023] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:51.069] <TB0> INFO: dacScan step from 180 .. 199
[09:05:17.185] <TB0> INFO: Test took 26115ms.
[09:05:17.332] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:17.378] <TB0> INFO: dacScan step from 200 .. 219
[09:05:42.183] <TB0> INFO: Test took 24805ms.
[09:05:42.328] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:42.374] <TB0> INFO: dacScan step from 220 .. 239
[09:06:05.260] <TB0> INFO: Test took 22886ms.
[09:06:05.400] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:05.452] <TB0> INFO: dacScan step from 240 .. 255
[09:06:23.307] <TB0> INFO: Test took 17855ms.
[09:06:23.424] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:52.474] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 14.747882 .. 48.170153
[09:06:52.590] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 58 (20) hits flags = 16 (plus default)
[09:06:52.597] <TB0> INFO: dacScan step from 4 .. 23
[09:07:08.392] <TB0> INFO: Test took 15794ms.
[09:07:08.412] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:08.412] <TB0> INFO: dacScan step from 24 .. 43
[09:07:28.437] <TB0> INFO: Test took 20025ms.
[09:07:28.549] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:28.574] <TB0> INFO: dacScan step from 44 .. 58
[09:07:47.626] <TB0> INFO: Test took 19052ms.
[09:07:47.759] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:04.594] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 3.842404 .. 48.170153
[09:08:04.673] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 3 .. 58 (20) hits flags = 16 (plus default)
[09:08:04.682] <TB0> INFO: dacScan step from 3 .. 22
[09:08:20.338] <TB0> INFO: Test took 15656ms.
[09:08:20.362] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:20.362] <TB0> INFO: dacScan step from 23 .. 42
[09:08:42.182] <TB0> INFO: Test took 21820ms.
[09:08:42.278] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:42.302] <TB0> INFO: dacScan step from 43 .. 58
[09:09:03.398] <TB0> INFO: Test took 21096ms.
[09:09:03.538] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:20.458] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 3.842404 .. 48.170153
[09:09:20.578] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 3 .. 58 (20) hits flags = 16 (plus default)
[09:09:20.589] <TB0> INFO: dacScan step from 3 .. 22
[09:09:37.640] <TB0> INFO: Test took 17051ms.
[09:09:37.660] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:37.660] <TB0> INFO: dacScan step from 23 .. 42
[09:09:58.404] <TB0> INFO: Test took 20744ms.
[09:09:58.504] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:58.527] <TB0> INFO: dacScan step from 43 .. 58
[09:10:19.806] <TB0> INFO: Test took 21279ms.
[09:10:19.926] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:36.738] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:10:36.738] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:10:36.746] <TB0> INFO: dacScan step from 15 .. 34
[09:11:10.120] <TB0> INFO: Test took 33375ms.
[09:11:10.190] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:10.200] <TB0> INFO: dacScan step from 35 .. 54
[09:12:01.511] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[09:12:01.511] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[09:12:02.832] <TB0> INFO: Test took 52632ms.
[09:12:03.140] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:03.189] <TB0> INFO: dacScan step from 55 .. 55
[09:12:08.047] <TB0> INFO: Test took 4858ms.
[09:12:08.060] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:20.877] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:12:20.877] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:12:20.877] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:12:20.878] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:12:20.878] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:12:20.878] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:12:20.878] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:12:20.878] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:12:20.879] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:12:20.879] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:12:20.879] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:12:20.879] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:12:20.879] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:12:20.880] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:12:20.880] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:12:20.880] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:12:20.880] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:12:20.889] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:12:20.896] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:12:20.905] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:12:20.913] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:12:20.922] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:12:20.929] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:12:20.935] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:12:20.941] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:12:20.948] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:12:20.954] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:12:20.961] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:12:20.967] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:12:20.974] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:12:20.982] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:12:20.991] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:12:21.000] <TB0> INFO: PixTestTrim::trimTest() done
[09:12:21.000] <TB0> INFO: vtrim: 96 122 108 110 106 102 124 96 112 134 110 130 112 116 115 102
[09:12:21.000] <TB0> INFO: vthrcomp: 89 95 90 92 100 86 88 88 87 96 85 93 100 94 89 88
[09:12:21.000] <TB0> INFO: vcal mean: 35.08 35.04 35.05 35.04 35.10 35.02 35.05 35.05 35.01 35.05 35.03 35.06 35.06 35.01 35.01 35.06
[09:12:21.000] <TB0> INFO: vcal RMS: 0.99 1.02 1.00 1.35 1.06 0.95 0.99 1.19 0.97 1.09 0.95 1.31 1.04 1.11 0.98 1.02
[09:12:21.000] <TB0> INFO: bits mean: 9.81 9.92 9.98 10.04 9.27 9.67 9.88 9.23 9.90 9.87 10.31 9.62 9.85 10.11 9.66 9.60
[09:12:21.000] <TB0> INFO: bits RMS: 2.46 2.59 2.39 2.43 2.81 2.59 2.42 2.64 2.55 2.48 2.30 2.57 2.59 2.41 2.66 2.50
[09:12:21.007] <TB0> INFO: ----------------------------------------------------------------------
[09:12:21.007] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:12:21.007] <TB0> INFO: ----------------------------------------------------------------------
[09:12:21.008] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:12:21.017] <TB0> INFO: dacScan step from 0 .. 19
[09:12:52.576] <TB0> INFO: Test took 31559ms.
[09:12:52.608] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:52.608] <TB0> INFO: dacScan step from 20 .. 39
[09:13:22.927] <TB0> INFO: Test took 30318ms.
[09:13:22.967] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:22.968] <TB0> INFO: dacScan step from 40 .. 59
[09:13:55.991] <TB0> INFO: Test took 33023ms.
[09:13:56.025] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:56.025] <TB0> INFO: dacScan step from 60 .. 79
[09:14:28.866] <TB0> INFO: Test took 32841ms.
[09:14:28.907] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:28.907] <TB0> INFO: dacScan step from 80 .. 99
[09:14:58.609] <TB0> INFO: Test took 29702ms.
[09:14:58.662] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:58.663] <TB0> INFO: dacScan step from 100 .. 119
[09:15:42.347] <TB0> INFO: Test took 43683ms.
[09:15:42.551] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:42.572] <TB0> INFO: dacScan step from 120 .. 139
[09:16:33.002] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[09:16:33.002] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[09:16:34.990] <TB0> INFO: Test took 52418ms.
[09:16:35.267] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:35.306] <TB0> INFO: dacScan step from 140 .. 159
[09:17:24.448] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[09:17:24.448] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[09:17:26.726] <TB0> INFO: Test took 51420ms.
[09:17:27.053] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:27.098] <TB0> INFO: dacScan step from 160 .. 179
[09:18:18.832] <TB0> INFO: Test took 51734ms.
[09:18:19.163] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:19.208] <TB0> INFO: dacScan step from 180 .. 199
[09:19:07.189] <TB0> INFO: Test took 47981ms.
[09:19:07.617] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:35.670] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 163 (20) hits flags = 16 (plus default)
[09:19:35.678] <TB0> INFO: dacScan step from 0 .. 19
[09:20:06.194] <TB0> INFO: Test took 30516ms.
[09:20:06.227] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:06.227] <TB0> INFO: dacScan step from 20 .. 39
[09:20:38.021] <TB0> INFO: Test took 31794ms.
[09:20:38.057] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:38.057] <TB0> INFO: dacScan step from 40 .. 59
[09:21:09.735] <TB0> INFO: Test took 31678ms.
[09:21:09.773] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:09.773] <TB0> INFO: dacScan step from 60 .. 79
[09:21:41.680] <TB0> INFO: Test took 31907ms.
[09:21:41.714] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:41.715] <TB0> INFO: dacScan step from 80 .. 99
[09:22:18.019] <TB0> INFO: Test took 36304ms.
[09:22:18.134] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:18.147] <TB0> INFO: dacScan step from 100 .. 119
[09:23:03.533] <TB0> INFO: Test took 45386ms.
[09:23:03.809] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:03.843] <TB0> INFO: dacScan step from 120 .. 139
[09:23:47.746] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)

[09:23:47.746] <TB0> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (233) != TBM ID (234)

[09:23:47.746] <TB0> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!

[09:23:47.746] <TB0> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!

[09:23:47.746] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[09:23:48.994] <TB0> INFO: Test took 45151ms.
[09:23:49.297] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:49.373] <TB0> INFO: dacScan step from 140 .. 159
[09:24:37.620] <TB0> INFO: Test took 48247ms.
[09:24:38.018] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:38.068] <TB0> INFO: dacScan step from 160 .. 163
[09:24:48.831] <TB0> INFO: Test took 10762ms.
[09:24:48.897] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:10.752] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[09:25:10.761] <TB0> INFO: dacScan step from 0 .. 19
[09:25:43.618] <TB0> INFO: Test took 32857ms.
[09:25:43.655] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:43.655] <TB0> INFO: dacScan step from 20 .. 39
[09:26:15.816] <TB0> INFO: Test took 32161ms.
[09:26:15.853] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:15.853] <TB0> INFO: dacScan step from 40 .. 59
[09:26:48.275] <TB0> INFO: Test took 32422ms.
[09:26:48.315] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:48.315] <TB0> INFO: dacScan step from 60 .. 79
[09:27:20.180] <TB0> INFO: Test took 31865ms.
[09:27:20.217] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:20.217] <TB0> INFO: dacScan step from 80 .. 99
[09:27:56.968] <TB0> INFO: Test took 36751ms.
[09:27:57.071] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:57.079] <TB0> INFO: dacScan step from 100 .. 119
[09:28:45.063] <TB0> INFO: Test took 47984ms.
[09:28:45.352] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:45.384] <TB0> INFO: dacScan step from 120 .. 139
[09:29:35.048] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[09:29:37.133] <TB0> INFO: Test took 51749ms.
[09:29:37.416] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:37.457] <TB0> INFO: dacScan step from 140 .. 152
[09:30:08.660] <TB0> INFO: Test took 31203ms.
[09:30:08.847] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:34.153] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[09:30:34.162] <TB0> INFO: dacScan step from 0 .. 19
[09:31:06.118] <TB0> INFO: Test took 31957ms.
[09:31:06.160] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:06.160] <TB0> INFO: dacScan step from 20 .. 39
[09:31:38.441] <TB0> INFO: Test took 32281ms.
[09:31:38.477] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:38.477] <TB0> INFO: dacScan step from 40 .. 59
[09:32:07.285] <TB0> INFO: Test took 28808ms.
[09:32:07.320] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:07.320] <TB0> INFO: dacScan step from 60 .. 79
[09:32:39.779] <TB0> INFO: Test took 32459ms.
[09:32:39.815] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:39.816] <TB0> INFO: dacScan step from 80 .. 99
[09:33:15.344] <TB0> INFO: Test took 35528ms.
[09:33:15.444] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:15.454] <TB0> INFO: dacScan step from 100 .. 119
[09:34:05.625] <TB0> INFO: Test took 50171ms.
[09:34:05.889] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:05.921] <TB0> INFO: dacScan step from 120 .. 139
[09:34:53.043] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[09:34:53.043] <TB0> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[09:34:54.564] <TB0> INFO: Test took 48643ms.
[09:34:54.863] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:54.911] <TB0> INFO: dacScan step from 140 .. 153
[09:35:29.635] <TB0> INFO: Test took 34724ms.
[09:35:29.838] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:51.982] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[09:35:51.991] <TB0> INFO: dacScan step from 0 .. 19
[09:36:23.184] <TB0> INFO: Test took 31193ms.
[09:36:23.225] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:23.225] <TB0> INFO: dacScan step from 20 .. 39
[09:36:54.839] <TB0> INFO: Test took 31614ms.
[09:36:54.876] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:54.876] <TB0> INFO: dacScan step from 40 .. 59
[09:37:27.136] <TB0> INFO: Test took 32260ms.
[09:37:27.171] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:27.171] <TB0> INFO: dacScan step from 60 .. 79
[09:37:55.487] <TB0> INFO: Test took 28316ms.
[09:37:55.526] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:55.526] <TB0> INFO: dacScan step from 80 .. 99
[09:38:31.772] <TB0> INFO: Test took 36246ms.
[09:38:31.874] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:31.883] <TB0> INFO: dacScan step from 100 .. 119
[09:39:19.871] <TB0> INFO: Test took 47988ms.
[09:39:20.178] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:20.208] <TB0> INFO: dacScan step from 120 .. 139
[09:40:05.265] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[09:40:07.321] <TB0> INFO: Test took 47113ms.
[09:40:07.652] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:07.697] <TB0> INFO: dacScan step from 140 .. 152
[09:40:42.652] <TB0> INFO: Test took 34955ms.
[09:40:42.836] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:06.221] <TB0> INFO: PixTestTrim::trimBitTest() done
[09:41:06.223] <TB0> INFO: PixTestTrim::doTest() done, duration: 3450 seconds
[09:41:06.929] <TB0> INFO: ######################################################################
[09:41:06.929] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[09:41:06.929] <TB0> INFO: ######################################################################
[09:41:11.205] <TB0> INFO: Test took 4274ms.
[09:41:11.227] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:15.897] <TB0> INFO: Test took 4473ms.
[09:41:15.966] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:20.487] <TB0> INFO: Test took 4513ms.
[09:41:20.559] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:20.565] <TB0> INFO: The DUT currently contains the following objects:
[09:41:20.565] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:20.565] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:20.565] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:20.565] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:20.565] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:20.565] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.678] <TB0> INFO: Test took 1113ms.
[09:41:21.679] <TB0> INFO: The DUT currently contains the following objects:
[09:41:21.679] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:21.679] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:21.679] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:21.679] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:21.679] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:21.679] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.837] <TB0> INFO: Test took 1158ms.
[09:41:22.838] <TB0> INFO: The DUT currently contains the following objects:
[09:41:22.839] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:22.839] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:22.839] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:22.839] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:22.839] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:22.839] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.982] <TB0> INFO: Test took 1143ms.
[09:41:23.984] <TB0> INFO: The DUT currently contains the following objects:
[09:41:23.984] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:23.984] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:23.984] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:23.984] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:23.984] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.984] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:23.985] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.144] <TB0> INFO: Test took 1159ms.
[09:41:25.146] <TB0> INFO: The DUT currently contains the following objects:
[09:41:25.146] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:25.146] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:25.146] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:25.146] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:25.146] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.146] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.147] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.147] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.147] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.147] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:25.147] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.320] <TB0> INFO: Test took 1173ms.
[09:41:26.321] <TB0> INFO: The DUT currently contains the following objects:
[09:41:26.321] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:26.321] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:26.321] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:26.321] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:26.321] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.321] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.321] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.321] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.321] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.321] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:26.322] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.498] <TB0> INFO: Test took 1176ms.
[09:41:27.499] <TB0> INFO: The DUT currently contains the following objects:
[09:41:27.499] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:27.499] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:27.499] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:27.500] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:27.500] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:27.500] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.675] <TB0> INFO: Test took 1175ms.
[09:41:28.676] <TB0> INFO: The DUT currently contains the following objects:
[09:41:28.676] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:28.676] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:28.676] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:28.676] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:28.677] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:28.677] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.806] <TB0> INFO: Test took 1129ms.
[09:41:29.808] <TB0> INFO: The DUT currently contains the following objects:
[09:41:29.808] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:29.808] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:29.808] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:29.808] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:29.808] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:29.808] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.950] <TB0> INFO: Test took 1142ms.
[09:41:30.952] <TB0> INFO: The DUT currently contains the following objects:
[09:41:30.952] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:30.952] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:30.952] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:30.952] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:30.952] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.952] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.953] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.953] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:30.953] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.095] <TB0> INFO: Test took 1142ms.
[09:41:32.096] <TB0> INFO: The DUT currently contains the following objects:
[09:41:32.096] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:32.096] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:32.096] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:32.097] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:32.097] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:32.097] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.224] <TB0> INFO: Test took 1127ms.
[09:41:33.226] <TB0> INFO: The DUT currently contains the following objects:
[09:41:33.226] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:33.226] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:33.226] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:33.226] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:33.226] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:33.226] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.369] <TB0> INFO: Test took 1143ms.
[09:41:34.371] <TB0> INFO: The DUT currently contains the following objects:
[09:41:34.371] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:34.371] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:34.371] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:34.371] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:34.371] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:34.371] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.530] <TB0> INFO: Test took 1159ms.
[09:41:35.531] <TB0> INFO: The DUT currently contains the following objects:
[09:41:35.531] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:35.531] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:35.531] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:35.531] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:35.531] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:35.531] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.675] <TB0> INFO: Test took 1144ms.
[09:41:36.676] <TB0> INFO: The DUT currently contains the following objects:
[09:41:36.676] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:36.676] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:36.676] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:36.676] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:36.676] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.676] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.677] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.677] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:36.677] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.804] <TB0> INFO: Test took 1127ms.
[09:41:37.805] <TB0> INFO: The DUT currently contains the following objects:
[09:41:37.805] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:41:37.805] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:41:37.805] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:41:37.805] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:41:37.806] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:37.806] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:41:38.950] <TB0> INFO: Test took 1144ms.
[09:41:38.952] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:45.382] <TB0> INFO: Test took 366430ms.
[09:47:47.181] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:53:40.264] <TB0> INFO: Test took 353083ms.
[09:53:42.076] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.084] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.094] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.103] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.110] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.116] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.123] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.130] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.137] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.143] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.150] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[09:53:42.157] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.163] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.170] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.177] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.184] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.191] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:53:42.215] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:53:42.216] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:53:42.216] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:53:42.216] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:53:42.216] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:53:42.216] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:53:42.216] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:53:46.413] <TB0> INFO: Test took 4196ms.
[09:53:51.186] <TB0> INFO: Test took 4509ms.
[09:53:55.683] <TB0> INFO: Test took 4229ms.
[09:53:55.959] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:53:56.929] <TB0> INFO: Test took 970ms.
[09:53:56.932] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:53:58.094] <TB0> INFO: Test took 1162ms.
[09:53:58.097] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:53:59.242] <TB0> INFO: Test took 1145ms.
[09:53:59.245] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:00.404] <TB0> INFO: Test took 1159ms.
[09:54:00.406] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:01.519] <TB0> INFO: Test took 1113ms.
[09:54:01.523] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:02.637] <TB0> INFO: Test took 1114ms.
[09:54:02.640] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:03.817] <TB0> INFO: Test took 1177ms.
[09:54:03.819] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:04.964] <TB0> INFO: Test took 1145ms.
[09:54:04.967] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:06.096] <TB0> INFO: Test took 1129ms.
[09:54:06.098] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:07.302] <TB0> INFO: Test took 1204ms.
[09:54:07.305] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:08.448] <TB0> INFO: Test took 1143ms.
[09:54:08.451] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:09.612] <TB0> INFO: Test took 1161ms.
[09:54:09.614] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:10.774] <TB0> INFO: Test took 1160ms.
[09:54:10.776] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:11.934] <TB0> INFO: Test took 1158ms.
[09:54:11.939] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:13.079] <TB0> INFO: Test took 1140ms.
[09:54:13.080] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:14.195] <TB0> INFO: Test took 1115ms.
[09:54:14.198] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:15.357] <TB0> INFO: Test took 1159ms.
[09:54:15.360] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:16.506] <TB0> INFO: Test took 1146ms.
[09:54:16.508] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:17.683] <TB0> INFO: Test took 1175ms.
[09:54:17.686] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:18.845] <TB0> INFO: Test took 1160ms.
[09:54:18.848] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:19.993] <TB0> INFO: Test took 1145ms.
[09:54:19.996] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:21.126] <TB0> INFO: Test took 1130ms.
[09:54:21.128] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:22.288] <TB0> INFO: Test took 1160ms.
[09:54:22.291] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:23.468] <TB0> INFO: Test took 1177ms.
[09:54:23.471] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:24.630] <TB0> INFO: Test took 1159ms.
[09:54:24.633] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:25.777] <TB0> INFO: Test took 1144ms.
[09:54:25.779] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:26.984] <TB0> INFO: Test took 1205ms.
[09:54:26.987] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:28.163] <TB0> INFO: Test took 1177ms.
[09:54:28.166] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:29.342] <TB0> INFO: Test took 1176ms.
[09:54:29.345] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:30.489] <TB0> INFO: Test took 1145ms.
[09:54:30.491] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:31.654] <TB0> INFO: Test took 1163ms.
[09:54:31.657] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:32.802] <TB0> INFO: Test took 1145ms.
[09:54:33.336] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 806 seconds
[09:54:33.336] <TB0> INFO: PH scale (per ROC): 86 79 81 86 83 82 80 91 80 80 84 83 90 82 87 82
[09:54:33.337] <TB0> INFO: PH offset (per ROC): 130 154 163 156 176 147 149 165 166 165 139 170 161 144 143 159
[09:54:33.533] <TB0> INFO: ######################################################################
[09:54:33.533] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:54:33.533] <TB0> INFO: ######################################################################
[09:54:33.542] <TB0> INFO: scanning low vcal = 10
[09:54:37.862] <TB0> INFO: Test took 4320ms.
[09:54:37.866] <TB0> INFO: scanning low vcal = 20
[09:54:42.344] <TB0> INFO: Test took 4478ms.
[09:54:42.349] <TB0> INFO: scanning low vcal = 30
[09:54:46.772] <TB0> INFO: Test took 4423ms.
[09:54:46.784] <TB0> INFO: scanning low vcal = 40
[09:54:52.187] <TB0> INFO: Test took 5403ms.
[09:54:52.275] <TB0> INFO: scanning low vcal = 50
[09:54:57.499] <TB0> INFO: Test took 5224ms.
[09:54:57.560] <TB0> INFO: scanning low vcal = 60
[09:55:02.674] <TB0> INFO: Test took 5114ms.
[09:55:02.738] <TB0> INFO: scanning low vcal = 70
[09:55:07.989] <TB0> INFO: Test took 5251ms.
[09:55:08.054] <TB0> INFO: scanning low vcal = 80
[09:55:13.463] <TB0> INFO: Test took 5409ms.
[09:55:13.526] <TB0> INFO: scanning low vcal = 90
[09:55:18.865] <TB0> INFO: Test took 5339ms.
[09:55:18.931] <TB0> INFO: scanning low vcal = 100
[09:55:24.262] <TB0> INFO: Test took 5331ms.
[09:55:24.347] <TB0> INFO: scanning low vcal = 110
[09:55:29.751] <TB0> INFO: Test took 5404ms.
[09:55:29.832] <TB0> INFO: scanning low vcal = 120
[09:55:35.013] <TB0> INFO: Test took 5181ms.
[09:55:35.106] <TB0> INFO: scanning low vcal = 130
[09:55:40.504] <TB0> INFO: Test took 5398ms.
[09:55:40.568] <TB0> INFO: scanning low vcal = 140
[09:55:45.824] <TB0> INFO: Test took 5256ms.
[09:55:45.916] <TB0> INFO: scanning low vcal = 150
[09:55:50.984] <TB0> INFO: Test took 5068ms.
[09:55:51.052] <TB0> INFO: scanning low vcal = 160
[09:55:56.388] <TB0> INFO: Test took 5336ms.
[09:55:56.450] <TB0> INFO: scanning low vcal = 170
[09:56:01.707] <TB0> INFO: Test took 5257ms.
[09:56:01.771] <TB0> INFO: scanning low vcal = 180
[09:56:06.930] <TB0> INFO: Test took 5159ms.
[09:56:07.030] <TB0> INFO: scanning low vcal = 190
[09:56:12.347] <TB0> INFO: Test took 5317ms.
[09:56:12.446] <TB0> INFO: scanning low vcal = 200
[09:56:17.378] <TB0> INFO: Test took 4932ms.
[09:56:17.441] <TB0> INFO: scanning low vcal = 210
[09:56:22.293] <TB0> INFO: Test took 4852ms.
[09:56:22.365] <TB0> INFO: scanning low vcal = 220
[09:56:27.161] <TB0> INFO: Test took 4796ms.
[09:56:27.220] <TB0> INFO: scanning low vcal = 230
[09:56:32.087] <TB0> INFO: Test took 4867ms.
[09:56:32.145] <TB0> INFO: scanning low vcal = 240
[09:56:36.810] <TB0> INFO: Test took 4665ms.
[09:56:36.880] <TB0> INFO: scanning low vcal = 250
[09:56:41.417] <TB0> INFO: Test took 4537ms.
[09:56:41.492] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[09:56:45.972] <TB0> INFO: Test took 4480ms.
[09:56:46.061] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[09:56:50.527] <TB0> INFO: Test took 4467ms.
[09:56:50.596] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[09:56:55.044] <TB0> INFO: Test took 4448ms.
[09:56:55.116] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[09:56:59.568] <TB0> INFO: Test took 4452ms.
[09:56:59.643] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:57:04.115] <TB0> INFO: Test took 4472ms.
[09:57:04.721] <TB0> INFO: PixTestGainPedestal::measure() done
[09:57:36.011] <TB0> INFO: PixTestGainPedestal::fit() done
[09:57:36.011] <TB0> INFO: non-linearity mean: 0.954 0.952 0.954 0.953 0.951 0.955 0.953 0.956 0.952 0.960 0.955 0.960 0.959 0.959 0.959 0.953
[09:57:36.011] <TB0> INFO: non-linearity RMS: 0.005 0.007 0.006 0.005 0.006 0.006 0.006 0.006 0.006 0.006 0.005 0.007 0.006 0.006 0.005 0.006
[09:57:36.011] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[09:57:36.031] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[09:57:36.050] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[09:57:36.068] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[09:57:36.088] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[09:57:36.107] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[09:57:36.126] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[09:57:36.145] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[09:57:36.164] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[09:57:36.183] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[09:57:36.202] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[09:57:36.221] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[09:57:36.240] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[09:57:36.259] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[09:57:36.278] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[09:57:36.297] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2064_FullQualification_2015-08-06_10h09m_1438848555//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[09:57:36.315] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 182 seconds
[09:57:36.321] <TB0> INFO: enter test to run
[09:57:36.321] <TB0> INFO: test: exit no parameter change
[09:57:36.689] <TB0> QUIET: Connection to board 126 closed.
[09:57:36.705] <TB0> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master