[12:24:38.013] <TB3> INFO: *** Welcome to pxar ***
[12:24:38.013] <TB3> INFO: *** Today: 2015/08/05
[12:24:38.013] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C15.dat
[12:24:38.015] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:24:38.015] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//defaultMaskFile.dat
[12:24:38.015] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters_C15.dat
[12:24:38.090] <TB3> INFO: clk: 4
[12:24:38.090] <TB3> INFO: ctr: 4
[12:24:38.090] <TB3> INFO: sda: 19
[12:24:38.090] <TB3> INFO: tin: 9
[12:24:38.090] <TB3> INFO: level: 15
[12:24:38.090] <TB3> INFO: triggerdelay: 0
[12:24:38.090] <TB3> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[12:24:38.090] <TB3> INFO: Log level: INFO
[12:24:38.111] <TB3> INFO: Found DTB DTB_WZ4I6J
[12:24:38.127] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[12:24:38.130] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[12:24:38.134] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[12:24:39.670] <TB3> INFO: DUT info:
[12:24:39.670] <TB3> INFO: The DUT currently contains the following objects:
[12:24:39.670] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:24:39.670] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:24:39.671] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:24:39.671] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:24:39.671] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:39.671] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:40.072] <TB3> INFO: enter 'restricted' command line mode
[12:24:40.072] <TB3> INFO: enter test to run
[12:24:40.072] <TB3> INFO: test: pretest no parameter change
[12:24:40.072] <TB3> INFO: running: pretest
[12:24:40.079] <TB3> INFO: ######################################################################
[12:24:40.079] <TB3> INFO: PixTestPretest::doTest()
[12:24:40.079] <TB3> INFO: ######################################################################
[12:24:40.081] <TB3> INFO: ----------------------------------------------------------------------
[12:24:40.081] <TB3> INFO: PixTestPretest::programROC()
[12:24:40.081] <TB3> INFO: ----------------------------------------------------------------------
[12:24:58.111] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:24:58.111] <TB3> INFO: IA differences per ROC: 19.3 16.9 19.3 19.3 20.1 20.9 20.1 19.3 19.3 19.3 18.5 19.3 20.1 19.3 20.1 20.1
[12:24:58.182] <TB3> INFO: ----------------------------------------------------------------------
[12:24:58.182] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:24:58.182] <TB3> INFO: ----------------------------------------------------------------------
[12:25:03.845] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[12:25:03.849] <TB3> INFO: ----------------------------------------------------------------------
[12:25:03.849] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:25:03.849] <TB3> INFO: ----------------------------------------------------------------------
[12:25:12.611] <TB3> INFO: Test took 8756ms.
[12:25:12.916] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:25:12.937] <TB3> INFO: ----------------------------------------------------------------------
[12:25:12.937] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:25:12.937] <TB3> INFO: ----------------------------------------------------------------------
[12:25:21.661] <TB3> INFO: Test took 8717ms.
[12:25:21.952] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:25:21.952] <TB3> INFO: CalDel: 136 127 141 173 144 131 183 157 169 146 158 130 146 159 155 156
[12:25:21.952] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:25:21.957] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C0.dat
[12:25:21.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C1.dat
[12:25:21.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C2.dat
[12:25:21.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C3.dat
[12:25:21.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C4.dat
[12:25:21.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C5.dat
[12:25:21.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C6.dat
[12:25:21.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C7.dat
[12:25:21.958] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C8.dat
[12:25:21.959] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C9.dat
[12:25:21.959] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C10.dat
[12:25:21.959] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C11.dat
[12:25:21.959] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C12.dat
[12:25:21.959] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C13.dat
[12:25:21.959] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C14.dat
[12:25:21.959] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C15.dat
[12:25:21.959] <TB3> INFO: PixTestPretest::doTest() done, duration: 41 seconds
[12:25:22.052] <TB3> INFO: enter test to run
[12:25:22.052] <TB3> INFO: test: fulltest no parameter change
[12:25:22.052] <TB3> INFO: running: fulltest
[12:25:22.052] <TB3> INFO: ######################################################################
[12:25:22.052] <TB3> INFO: PixTestFullTest::doTest()
[12:25:22.052] <TB3> INFO: ######################################################################
[12:25:22.053] <TB3> INFO: ######################################################################
[12:25:22.053] <TB3> INFO: PixTestAlive::doTest()
[12:25:22.053] <TB3> INFO: ######################################################################
[12:25:22.055] <TB3> INFO: ----------------------------------------------------------------------
[12:25:22.055] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:22.055] <TB3> INFO: ----------------------------------------------------------------------
[12:25:25.644] <TB3> INFO: Test took 3588ms.
[12:25:25.668] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:25.879] <TB3> INFO: PixTestAlive::aliveTest() done
[12:25:25.879] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:25.882] <TB3> INFO: ----------------------------------------------------------------------
[12:25:25.882] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:25.882] <TB3> INFO: ----------------------------------------------------------------------
[12:25:28.750] <TB3> INFO: Test took 2867ms.
[12:25:28.754] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:28.754] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:25:28.964] <TB3> INFO: PixTestAlive::maskTest() done
[12:25:28.964] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:28.966] <TB3> INFO: ----------------------------------------------------------------------
[12:25:28.966] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:28.966] <TB3> INFO: ----------------------------------------------------------------------
[12:25:32.482] <TB3> INFO: Test took 3515ms.
[12:25:32.511] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:32.728] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:25:32.728] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:32.728] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[12:25:32.739] <TB3> INFO: ######################################################################
[12:25:32.739] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:25:32.739] <TB3> INFO: ######################################################################
[12:25:32.741] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:25:32.755] <TB3> INFO: dacScan step from 0 .. 29
[12:25:55.404] <TB3> INFO: Test took 22649ms.
[12:25:55.438] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:55.438] <TB3> INFO: dacScan step from 30 .. 59
[12:26:20.969] <TB3> INFO: Test took 25531ms.
[12:26:21.130] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:21.152] <TB3> INFO: dacScan step from 60 .. 89
[12:26:52.173] <TB3> INFO: Test took 31021ms.
[12:26:52.426] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:52.520] <TB3> INFO: dacScan step from 90 .. 119
[12:27:23.303] <TB3> INFO: Test took 30783ms.
[12:27:23.552] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:23.642] <TB3> INFO: dacScan step from 120 .. 149
[12:27:50.929] <TB3> INFO: Test took 27287ms.
[12:27:51.129] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:13.764] <TB3> INFO: PixTestBBMap::doTest() done, duration: 161 seconds
[12:28:13.764] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
[12:28:13.764] <TB3> INFO: separation cut (per ROC): 75 79 97 74 94 90 83 73 73 88 83 72 81 77 69 73
[12:28:13.841] <TB3> INFO: ######################################################################
[12:28:13.841] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[12:28:13.841] <TB3> INFO: ######################################################################
[12:28:13.841] <TB3> INFO: ----------------------------------------------------------------------
[12:28:13.841] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:28:13.841] <TB3> INFO: ----------------------------------------------------------------------
[12:28:13.841] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:28:13.850] <TB3> INFO: dacScan step from 0 .. 3
[12:28:34.252] <TB3> INFO: Test took 20402ms.
[12:28:34.278] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:34.278] <TB3> INFO: dacScan step from 4 .. 7
[12:28:52.897] <TB3> INFO: Test took 18619ms.
[12:28:52.922] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:52.922] <TB3> INFO: dacScan step from 8 .. 11
[12:29:13.275] <TB3> INFO: Test took 20353ms.
[12:29:13.302] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:13.302] <TB3> INFO: dacScan step from 12 .. 15
[12:29:33.639] <TB3> INFO: Test took 20337ms.
[12:29:33.670] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:33.670] <TB3> INFO: dacScan step from 16 .. 19
[12:29:54.077] <TB3> INFO: Test took 20407ms.
[12:29:54.106] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:54.106] <TB3> INFO: dacScan step from 20 .. 23
[12:30:14.691] <TB3> INFO: Test took 20585ms.
[12:30:14.718] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:14.718] <TB3> INFO: dacScan step from 24 .. 27
[12:30:35.032] <TB3> INFO: Test took 20314ms.
[12:30:35.057] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:35.057] <TB3> INFO: dacScan step from 28 .. 31
[12:30:55.202] <TB3> INFO: Test took 20145ms.
[12:30:55.229] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:55.229] <TB3> INFO: dacScan step from 32 .. 35
[12:31:15.604] <TB3> INFO: Test took 20375ms.
[12:31:15.637] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:15.638] <TB3> INFO: dacScan step from 36 .. 39
[12:31:36.155] <TB3> INFO: Test took 20517ms.
[12:31:36.182] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:36.182] <TB3> INFO: dacScan step from 40 .. 43
[12:31:56.720] <TB3> INFO: Test took 20538ms.
[12:31:56.749] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:56.749] <TB3> INFO: dacScan step from 44 .. 47
[12:32:16.964] <TB3> INFO: Test took 20215ms.
[12:32:16.996] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:16.996] <TB3> INFO: dacScan step from 48 .. 51
[12:32:37.154] <TB3> INFO: Test took 20158ms.
[12:32:37.181] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:37.181] <TB3> INFO: dacScan step from 52 .. 55
[12:32:57.675] <TB3> INFO: Test took 20494ms.
[12:32:57.705] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:57.705] <TB3> INFO: dacScan step from 56 .. 59
[12:33:18.345] <TB3> INFO: Test took 20640ms.
[12:33:18.370] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:18.370] <TB3> INFO: dacScan step from 60 .. 63
[12:33:38.866] <TB3> INFO: Test took 20496ms.
[12:33:38.892] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:38.892] <TB3> INFO: dacScan step from 64 .. 67
[12:33:59.075] <TB3> INFO: Test took 20183ms.
[12:33:59.103] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:59.103] <TB3> INFO: dacScan step from 68 .. 71
[12:34:19.675] <TB3> INFO: Test took 20572ms.
[12:34:19.716] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:19.717] <TB3> INFO: dacScan step from 72 .. 75
[12:34:41.014] <TB3> INFO: Test took 21297ms.
[12:34:41.067] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:41.069] <TB3> INFO: dacScan step from 76 .. 79
[12:35:03.630] <TB3> INFO: Test took 22561ms.
[12:35:03.710] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:03.713] <TB3> INFO: dacScan step from 80 .. 83
[12:35:28.999] <TB3> INFO: Test took 25285ms.
[12:35:29.145] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:29.154] <TB3> INFO: dacScan step from 84 .. 87
[12:35:57.302] <TB3> INFO: Test took 28148ms.
[12:35:57.493] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:57.501] <TB3> INFO: dacScan step from 88 .. 91
[12:36:27.183] <TB3> INFO: Test took 29682ms.
[12:36:27.391] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:27.400] <TB3> INFO: dacScan step from 92 .. 95



[12:36:58.267] <TB3> INFO: Test took 30867ms.
[12:36:58.477] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:58.487] <TB3> INFO: dacScan step from 96 .. 99


[12:37:30.326] <TB3> INFO: Test took 31839ms.
[12:37:30.551] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:30.563] <TB3> INFO: dacScan step from 100 .. 103





[12:38:02.789] <TB3> INFO: Test took 32226ms.
[12:38:03.015] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:03.026] <TB3> INFO: dacScan step from 104 .. 107



[12:38:35.425] <TB3> INFO: Test took 32398ms.
[12:38:35.661] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:35.675] <TB3> INFO: dacScan step from 108 .. 111


[12:39:08.147] <TB3> INFO: Test took 32471ms.
[12:39:08.362] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:08.373] <TB3> INFO: dacScan step from 112 .. 115
[12:39:40.626] <TB3> INFO: Test took 32252ms.
[12:39:40.866] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:40.879] <TB3> INFO: dacScan step from 116 .. 119
[12:40:13.022] <TB3> INFO: Test took 32143ms.
[12:40:13.259] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:13.273] <TB3> INFO: dacScan step from 120 .. 123
[12:40:45.346] <TB3> INFO: Test took 32073ms.
[12:40:45.583] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:45.595] <TB3> INFO: dacScan step from 124 .. 127
[12:41:18.241] <TB3> INFO: Test took 32646ms.
[12:41:18.483] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:18.495] <TB3> INFO: dacScan step from 128 .. 131
[12:41:50.885] <TB3> INFO: Test took 32389ms.
[12:41:51.118] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:51.130] <TB3> INFO: dacScan step from 132 .. 135
[12:42:23.011] <TB3> INFO: Test took 31881ms.
[12:42:23.241] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:23.252] <TB3> INFO: dacScan step from 136 .. 139
[12:42:55.607] <TB3> INFO: Test took 32355ms.
[12:42:55.845] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:55.859] <TB3> INFO: dacScan step from 140 .. 143
[12:44:28.174] <TB3> INFO: Test took 92315ms.
[12:44:28.411] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:28.425] <TB3> INFO: dacScan step from 144 .. 147
[12:44:57.339] <TB3> INFO: Test took 28913ms.
[12:44:57.563] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:57.575] <TB3> INFO: dacScan step from 148 .. 149
[12:45:15.080] <TB3> INFO: Test took 17505ms.
[12:45:15.198] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:15.206] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:16.779] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:18.312] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:19.763] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:21.342] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:22.877] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:24.392] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:25.909] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:27.489] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:28.979] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:30.467] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:31.949] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:33.522] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:35.141] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:36.710] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:38.376] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:45:40.009] <TB3> INFO: PixTestScurves::scurves() done
[12:45:40.009] <TB3> INFO: Vcal mean: 80.03 83.84 99.29 86.70 100.82 96.94 93.79 79.82 85.09 85.19 83.65 78.52 87.94 86.21 78.30 85.77
[12:45:40.009] <TB3> INFO: Vcal RMS: 4.82 4.78 6.40 5.17 5.91 6.10 6.76 5.21 6.08 5.21 5.51 4.28 5.12 5.50 4.05 5.65
[12:45:40.009] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1046 seconds
[12:45:40.093] <TB3> INFO: ######################################################################
[12:45:40.093] <TB3> INFO: PixTestTrim::doTest()
[12:45:40.093] <TB3> INFO: ######################################################################
[12:45:40.095] <TB3> INFO: ----------------------------------------------------------------------
[12:45:40.095] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:45:40.095] <TB3> INFO: ----------------------------------------------------------------------
[12:45:40.174] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:45:40.174] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:45:40.183] <TB3> INFO: dacScan step from 0 .. 19
[12:45:56.002] <TB3> INFO: Test took 15819ms.
[12:45:56.023] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:56.023] <TB3> INFO: dacScan step from 20 .. 39
[12:46:11.876] <TB3> INFO: Test took 15853ms.
[12:46:11.903] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:11.903] <TB3> INFO: dacScan step from 40 .. 59
[12:46:27.836] <TB3> INFO: Test took 15933ms.
[12:46:27.862] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:27.862] <TB3> INFO: dacScan step from 60 .. 79
[12:46:43.772] <TB3> INFO: Test took 15910ms.
[12:46:43.793] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:43.793] <TB3> INFO: dacScan step from 80 .. 99
[12:47:00.370] <TB3> INFO: Test took 16576ms.
[12:47:00.434] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:00.442] <TB3> INFO: dacScan step from 100 .. 119
[12:47:19.675] <TB3> INFO: Test took 19232ms.
[12:47:19.831] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:19.863] <TB3> INFO: dacScan step from 120 .. 139
[12:47:39.352] <TB3> INFO: Test took 19489ms.
[12:47:39.495] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:39.524] <TB3> INFO: dacScan step from 140 .. 159
[12:47:56.377] <TB3> INFO: Test took 16853ms.
[12:47:56.442] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:18.746] <TB3> INFO: ROC 0 VthrComp = 87
[12:48:18.746] <TB3> INFO: ROC 1 VthrComp = 86
[12:48:18.832] <TB3> INFO: ROC 2 VthrComp = 101
[12:48:18.832] <TB3> INFO: ROC 3 VthrComp = 92
[12:48:18.832] <TB3> INFO: ROC 4 VthrComp = 103
[12:48:18.832] <TB3> INFO: ROC 5 VthrComp = 98
[12:48:18.832] <TB3> INFO: ROC 6 VthrComp = 90
[12:48:18.832] <TB3> INFO: ROC 7 VthrComp = 83
[12:48:18.832] <TB3> INFO: ROC 8 VthrComp = 86
[12:48:18.832] <TB3> INFO: ROC 9 VthrComp = 91
[12:48:18.832] <TB3> INFO: ROC 10 VthrComp = 88
[12:48:18.832] <TB3> INFO: ROC 11 VthrComp = 83
[12:48:18.832] <TB3> INFO: ROC 12 VthrComp = 92
[12:48:18.832] <TB3> INFO: ROC 13 VthrComp = 87
[12:48:18.833] <TB3> INFO: ROC 14 VthrComp = 85
[12:48:18.833] <TB3> INFO: ROC 15 VthrComp = 89
[12:48:18.835] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:48:18.835] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:48:18.845] <TB3> INFO: dacScan step from 0 .. 19
[12:48:34.123] <TB3> INFO: Test took 15278ms.
[12:48:34.144] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:34.144] <TB3> INFO: dacScan step from 20 .. 39
[12:48:49.155] <TB3> INFO: Test took 15011ms.
[12:48:49.186] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:49.189] <TB3> INFO: dacScan step from 40 .. 59
[12:49:09.100] <TB3> INFO: Test took 19911ms.
[12:49:09.247] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:09.281] <TB3> INFO: dacScan step from 60 .. 79
[12:49:30.988] <TB3> INFO: Test took 21707ms.
[12:49:31.161] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:31.211] <TB3> INFO: dacScan step from 80 .. 99
[12:49:52.842] <TB3> INFO: Test took 21631ms.
[12:49:53.003] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:53.055] <TB3> INFO: dacScan step from 100 .. 119
[12:50:13.838] <TB3> INFO: Test took 20783ms.
[12:50:14.002] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:14.059] <TB3> INFO: dacScan step from 120 .. 139
[12:50:33.992] <TB3> INFO: Test took 19933ms.
[12:50:34.153] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:34.204] <TB3> INFO: dacScan step from 140 .. 159
[12:50:55.902] <TB3> INFO: Test took 21698ms.
[12:50:56.080] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:21.006] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 58.5036 for pixel 0/45 mean/min/max = 44.9798/31.329/58.6305
[12:51:21.006] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 58.1277 for pixel 23/1 mean/min/max = 45.2524/32.271/58.2337
[12:51:21.007] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.8392 for pixel 0/4 mean/min/max = 46.9658/32.0575/61.874
[12:51:21.008] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 57.5165 for pixel 32/76 mean/min/max = 45.2728/32.9591/57.5866
[12:51:21.008] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 61.1535 for pixel 8/41 mean/min/max = 46.9853/32.5699/61.4007
[12:51:21.009] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 61.059 for pixel 20/62 mean/min/max = 46.2772/31.4816/61.0728
[12:51:21.009] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 61.7485 for pixel 22/74 mean/min/max = 47.1751/32.5361/61.8141
[12:51:21.010] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.5832 for pixel 24/44 mean/min/max = 44.6889/31.4499/57.928
[12:51:21.011] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 61.6854 for pixel 21/74 mean/min/max = 46.7265/31.6179/61.835
[12:51:21.011] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.3198 for pixel 51/79 mean/min/max = 45.515/32.5871/58.4429
[12:51:21.012] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.5611 for pixel 2/16 mean/min/max = 46.4364/32.2898/60.5829
[12:51:21.012] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 58.3592 for pixel 46/74 mean/min/max = 45.5372/32.7076/58.3668
[12:51:21.013] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 58.6966 for pixel 0/6 mean/min/max = 45.3789/31.8165/58.9413
[12:51:21.014] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 61.191 for pixel 0/29 mean/min/max = 46.5829/31.6429/61.523
[12:51:21.014] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 55.88 for pixel 17/79 mean/min/max = 44.1199/32.0499/56.19
[12:51:21.015] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 61.202 for pixel 10/23 mean/min/max = 46.9252/32.5996/61.2509
[12:51:21.015] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:57.760] <TB3> INFO: Test took 96745ms.
[12:52:59.499] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:52:59.509] <TB3> INFO: dacScan step from 0 .. 19
[12:53:22.244] <TB3> INFO: Test took 22735ms.
[12:53:22.288] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:22.289] <TB3> INFO: dacScan step from 20 .. 39
[12:53:50.672] <TB3> INFO: Test took 28382ms.
[12:53:50.901] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:50.933] <TB3> INFO: dacScan step from 40 .. 59

[12:54:26.784] <TB3> INFO: Test took 35851ms.
[12:54:27.075] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:27.129] <TB3> INFO: dacScan step from 60 .. 79


[12:55:02.682] <TB3> INFO: Test took 35553ms.
[12:55:02.939] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:02.993] <TB3> INFO: dacScan step from 80 .. 99

[12:55:36.843] <TB3> INFO: Test took 33850ms.
[12:55:37.130] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:37.189] <TB3> INFO: dacScan step from 100 .. 119

[12:56:11.777] <TB3> INFO: Test took 34588ms.
[12:56:12.224] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:12.295] <TB3> INFO: dacScan step from 120 .. 139

[12:56:48.501] <TB3> INFO: Test took 36206ms.
[12:56:48.776] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:48.827] <TB3> INFO: dacScan step from 140 .. 159



[12:57:25.037] <TB3> INFO: Test took 36210ms.
[12:57:25.312] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:25.363] <TB3> INFO: dacScan step from 160 .. 179
[12:57:59.021] <TB3> INFO: Test took 33658ms.
[12:57:59.305] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:59.370] <TB3> INFO: dacScan step from 180 .. 199


[12:58:36.547] <TB3> INFO: Test took 37177ms.
[12:58:36.830] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:03.521] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.176396 .. 255.000000
[12:59:03.596] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:59:03.605] <TB3> INFO: dacScan step from 0 .. 19
[12:59:17.623] <TB3> INFO: Test took 14018ms.
[12:59:17.647] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:17.648] <TB3> INFO: dacScan step from 20 .. 39
[12:59:33.316] <TB3> INFO: Test took 15668ms.
[12:59:33.401] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:33.416] <TB3> INFO: dacScan step from 40 .. 59
[12:59:52.303] <TB3> INFO: Test took 18887ms.
[12:59:52.447] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:52.499] <TB3> INFO: dacScan step from 60 .. 79
[13:00:10.492] <TB3> INFO: Test took 17993ms.
[13:00:10.641] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:10.695] <TB3> INFO: dacScan step from 80 .. 99
[13:00:28.053] <TB3> INFO: Test took 17358ms.
[13:00:28.190] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:28.243] <TB3> INFO: dacScan step from 100 .. 119
[13:00:47.003] <TB3> INFO: Test took 18760ms.
[13:00:47.138] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:47.195] <TB3> INFO: dacScan step from 120 .. 139
[13:01:06.060] <TB3> INFO: Test took 18865ms.
[13:01:06.208] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:06.261] <TB3> INFO: dacScan step from 140 .. 159
[13:01:25.105] <TB3> INFO: Test took 18843ms.
[13:01:25.252] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:25.303] <TB3> INFO: dacScan step from 160 .. 179
[13:01:44.280] <TB3> INFO: Test took 18977ms.
[13:01:44.436] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:44.491] <TB3> INFO: dacScan step from 180 .. 199
[13:02:03.258] <TB3> INFO: Test took 18767ms.
[13:02:03.397] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:03.452] <TB3> INFO: dacScan step from 200 .. 219
[13:02:20.836] <TB3> INFO: Test took 17384ms.
[13:02:20.982] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:21.040] <TB3> INFO: dacScan step from 220 .. 239
[13:02:39.958] <TB3> INFO: Test took 18918ms.
[13:02:40.110] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:40.162] <TB3> INFO: dacScan step from 240 .. 255
[13:02:55.873] <TB3> INFO: Test took 15711ms.
[13:02:55.991] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:29.042] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 13.657391 .. 45.646759
[13:03:29.128] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 3 .. 55 (20) hits flags = 16 (plus default)
[13:03:29.136] <TB3> INFO: dacScan step from 3 .. 22
[13:03:42.554] <TB3> INFO: Test took 13418ms.
[13:03:42.574] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:42.574] <TB3> INFO: dacScan step from 23 .. 42
[13:03:58.640] <TB3> INFO: Test took 16066ms.
[13:03:58.744] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:58.768] <TB3> INFO: dacScan step from 43 .. 55
[13:04:12.156] <TB3> INFO: Test took 13388ms.
[13:04:12.251] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:28.462] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 20.110047 .. 40.995714
[13:04:28.541] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 50 (20) hits flags = 16 (plus default)
[13:04:28.549] <TB3> INFO: dacScan step from 10 .. 29
[13:04:42.111] <TB3> INFO: Test took 13562ms.
[13:04:42.130] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:42.130] <TB3> INFO: dacScan step from 30 .. 49
[13:04:59.317] <TB3> INFO: Test took 17187ms.
[13:04:59.471] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:59.516] <TB3> INFO: dacScan step from 50 .. 50
[13:05:03.174] <TB3> INFO: Test took 3657ms.
[13:05:03.188] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:18.501] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 4.523262 .. 40.851787
[13:05:18.580] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 4 .. 50 (20) hits flags = 16 (plus default)
[13:05:18.589] <TB3> INFO: dacScan step from 4 .. 23
[13:05:32.797] <TB3> INFO: Test took 14208ms.
[13:05:32.819] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:32.819] <TB3> INFO: dacScan step from 24 .. 43
[13:05:49.019] <TB3> INFO: Test took 16200ms.
[13:05:49.133] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:49.163] <TB3> INFO: dacScan step from 44 .. 50
[13:05:57.100] <TB3> INFO: Test took 7937ms.
[13:05:57.147] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:12.076] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:06:12.076] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:06:12.084] <TB3> INFO: dacScan step from 15 .. 34
[13:06:36.756] <TB3> INFO: Test took 24672ms.
[13:06:36.825] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:36.834] <TB3> INFO: dacScan step from 35 .. 54


[13:07:12.556] <TB3> INFO: Test took 35722ms.
[13:07:12.839] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:12.890] <TB3> INFO: dacScan step from 55 .. 55
[13:07:17.208] <TB3> INFO: Test took 4318ms.
[13:07:17.222] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:30.817] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:07:30.827] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:07:30.827] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:07:30.828] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:07:30.828] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:07:30.828] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:07:30.829] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:07:30.829] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:07:30.829] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:07:30.829] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:07:30.830] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:07:30.830] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:07:30.830] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:07:30.831] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:07:30.831] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:07:30.831] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:07:30.832] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:07:30.841] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:07:30.847] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:07:30.854] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:07:30.861] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:07:30.867] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:07:30.874] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:07:30.880] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:07:30.887] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:07:30.893] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:07:30.900] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:07:30.907] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:07:30.913] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:07:30.920] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:07:30.929] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:07:30.936] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:07:30.943] <TB3> INFO: PixTestTrim::trimTest() done
[13:07:30.943] <TB3> INFO: vtrim: 111 108 115 115 111 111 115 100 117 97 103 107 101 106 90 102
[13:07:30.943] <TB3> INFO: vthrcomp: 87 86 101 92 103 98 90 83 86 91 88 83 92 87 85 89
[13:07:30.943] <TB3> INFO: vcal mean: 34.98 35.04 35.02 35.10 35.03 35.05 35.04 35.00 35.03 35.05 35.06 35.03 35.00 35.05 35.06 34.95
[13:07:30.943] <TB3> INFO: vcal RMS: 0.99 1.01 1.04 1.03 1.07 1.07 1.09 1.09 1.24 0.92 1.01 1.00 1.00 1.02 0.99 1.04
[13:07:30.943] <TB3> INFO: bits mean: 9.83 9.86 9.31 9.84 9.43 9.82 9.60 10.39 9.99 9.20 9.35 9.75 9.80 9.46 10.06 9.59
[13:07:30.943] <TB3> INFO: bits RMS: 2.70 2.52 2.67 2.47 2.57 2.55 2.38 2.31 2.45 2.75 2.74 2.49 2.58 2.67 2.53 2.48
[13:07:30.950] <TB3> INFO: ----------------------------------------------------------------------
[13:07:30.950] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:07:30.950] <TB3> INFO: ----------------------------------------------------------------------
[13:07:30.951] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:07:30.963] <TB3> INFO: dacScan step from 0 .. 19
[13:07:55.078] <TB3> INFO: Test took 24115ms.
[13:07:55.123] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:55.123] <TB3> INFO: dacScan step from 20 .. 39
[13:08:19.335] <TB3> INFO: Test took 24212ms.
[13:08:19.374] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:19.374] <TB3> INFO: dacScan step from 40 .. 59
[13:08:43.420] <TB3> INFO: Test took 24045ms.
[13:08:43.461] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:43.461] <TB3> INFO: dacScan step from 60 .. 79
[13:09:07.563] <TB3> INFO: Test took 24102ms.
[13:09:07.605] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:07.605] <TB3> INFO: dacScan step from 80 .. 99
[13:09:30.973] <TB3> INFO: Test took 23368ms.
[13:09:31.032] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:31.034] <TB3> INFO: dacScan step from 100 .. 119
[13:09:59.042] <TB3> INFO: Test took 28008ms.
[13:09:59.246] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:59.268] <TB3> INFO: dacScan step from 120 .. 139


[13:10:34.602] <TB3> INFO: Test took 35334ms.
[13:10:34.892] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:34.935] <TB3> INFO: dacScan step from 140 .. 159
[13:11:07.993] <TB3> INFO: Test took 33058ms.
[13:11:08.304] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:08.353] <TB3> INFO: dacScan step from 160 .. 179
[13:11:44.364] <TB3> INFO: Test took 36011ms.
[13:11:44.637] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:44.687] <TB3> INFO: dacScan step from 180 .. 199
[13:12:18.350] <TB3> INFO: Test took 33663ms.
[13:12:18.664] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:45.568] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 170 (20) hits flags = 16 (plus default)
[13:12:45.576] <TB3> INFO: dacScan step from 0 .. 19
[13:13:07.809] <TB3> INFO: Test took 22233ms.
[13:13:07.848] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:07.848] <TB3> INFO: dacScan step from 20 .. 39
[13:13:31.903] <TB3> INFO: Test took 24055ms.
[13:13:31.945] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:31.945] <TB3> INFO: dacScan step from 40 .. 59
[13:13:56.029] <TB3> INFO: Test took 24084ms.
[13:13:56.071] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:56.071] <TB3> INFO: dacScan step from 60 .. 79
[13:14:20.323] <TB3> INFO: Test took 24252ms.
[13:14:20.365] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:20.365] <TB3> INFO: dacScan step from 80 .. 99
[13:14:44.284] <TB3> INFO: Test took 23919ms.
[13:14:44.398] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:44.409] <TB3> INFO: dacScan step from 100 .. 119


[13:15:18.456] <TB3> INFO: Test took 34047ms.
[13:15:18.750] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:18.781] <TB3> INFO: dacScan step from 120 .. 139


[13:15:55.055] <TB3> INFO: Test took 36274ms.
[13:15:55.349] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:55.400] <TB3> INFO: dacScan step from 140 .. 159
[13:16:31.268] <TB3> INFO: Test took 35868ms.
[13:16:31.554] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:31.604] <TB3> INFO: dacScan step from 160 .. 170
[13:16:52.603] <TB3> INFO: Test took 20999ms.
[13:16:52.770] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:16.798] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 156 (20) hits flags = 16 (plus default)
[13:17:16.807] <TB3> INFO: dacScan step from 0 .. 19
[13:17:39.143] <TB3> INFO: Test took 22336ms.
[13:17:39.184] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:39.184] <TB3> INFO: dacScan step from 20 .. 39
[13:18:03.084] <TB3> INFO: Test took 23900ms.
[13:18:03.126] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:03.126] <TB3> INFO: dacScan step from 40 .. 59
[13:18:26.179] <TB3> INFO: Test took 23052ms.
[13:18:26.228] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:26.228] <TB3> INFO: dacScan step from 60 .. 79
[13:18:50.568] <TB3> INFO: Test took 24340ms.
[13:18:50.615] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:50.615] <TB3> INFO: dacScan step from 80 .. 99
[13:19:16.432] <TB3> INFO: Test took 25817ms.
[13:19:16.549] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:16.562] <TB3> INFO: dacScan step from 100 .. 119


[13:19:50.306] <TB3> INFO: Test took 33744ms.
[13:19:50.576] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:50.610] <TB3> INFO: dacScan step from 120 .. 139


[13:20:25.388] <TB3> INFO: Test took 34778ms.
[13:20:25.676] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:25.727] <TB3> INFO: dacScan step from 140 .. 156
[13:20:54.434] <TB3> INFO: Test took 28707ms.
[13:20:54.812] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:18.364] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[13:21:18.375] <TB3> INFO: dacScan step from 0 .. 19
[13:21:41.125] <TB3> INFO: Test took 22748ms.
[13:21:41.164] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:41.164] <TB3> INFO: dacScan step from 20 .. 39
[13:22:04.389] <TB3> INFO: Test took 23225ms.
[13:22:04.433] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:04.433] <TB3> INFO: dacScan step from 40 .. 59
[13:22:27.932] <TB3> INFO: Test took 23499ms.
[13:22:27.972] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:27.973] <TB3> INFO: dacScan step from 60 .. 79
[13:22:50.420] <TB3> INFO: Test took 22447ms.
[13:22:50.463] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:50.463] <TB3> INFO: dacScan step from 80 .. 99
[13:23:14.808] <TB3> INFO: Test took 24345ms.
[13:23:14.920] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:14.930] <TB3> INFO: dacScan step from 100 .. 119

[13:23:46.339] <TB3> INFO: Test took 31409ms.
[13:23:46.739] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:46.805] <TB3> INFO: dacScan step from 120 .. 139



[13:24:22.782] <TB3> INFO: Test took 35977ms.
[13:24:23.101] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:23.152] <TB3> INFO: dacScan step from 140 .. 155
[13:24:52.921] <TB3> INFO: Test took 29769ms.
[13:24:53.174] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:15.823] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[13:25:15.831] <TB3> INFO: dacScan step from 0 .. 19
[13:25:38.884] <TB3> INFO: Test took 23053ms.
[13:25:38.923] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:38.923] <TB3> INFO: dacScan step from 20 .. 39
[13:26:01.322] <TB3> INFO: Test took 22398ms.
[13:26:01.361] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:01.361] <TB3> INFO: dacScan step from 40 .. 59
[13:26:25.568] <TB3> INFO: Test took 24207ms.
[13:26:25.611] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:25.611] <TB3> INFO: dacScan step from 60 .. 79
[13:26:49.921] <TB3> INFO: Test took 24310ms.
[13:26:49.965] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:49.965] <TB3> INFO: dacScan step from 80 .. 99
[13:27:16.171] <TB3> INFO: Test took 26206ms.
[13:27:16.295] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:16.306] <TB3> INFO: dacScan step from 100 .. 119



[13:27:50.278] <TB3> INFO: Test took 33972ms.
[13:27:50.547] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:50.580] <TB3> INFO: dacScan step from 120 .. 139


[13:28:26.659] <TB3> INFO: Test took 36079ms.
[13:28:26.958] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:27.006] <TB3> INFO: dacScan step from 140 .. 155
[13:28:56.496] <TB3> INFO: Test took 29490ms.
[13:28:56.738] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:19.779] <TB3> INFO: PixTestTrim::trimBitTest() done
[13:29:19.780] <TB3> INFO: PixTestTrim::doTest() done, duration: 2619 seconds
[13:29:20.503] <TB3> INFO: ######################################################################
[13:29:20.503] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:29:20.503] <TB3> INFO: ######################################################################
[13:29:24.083] <TB3> INFO: Test took 3579ms.
[13:29:24.107] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:27.786] <TB3> INFO: Test took 3483ms.
[13:29:27.851] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:31.425] <TB3> INFO: Test took 3566ms.
[13:29:31.489] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:31.495] <TB3> INFO: The DUT currently contains the following objects:
[13:29:31.495] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:31.495] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:31.495] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:31.495] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:31.495] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.495] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.495] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.495] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:31.496] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.609] <TB3> INFO: Test took 1113ms.
[13:29:32.611] <TB3> INFO: The DUT currently contains the following objects:
[13:29:32.611] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:32.611] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:32.611] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:32.611] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:32.611] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.611] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.612] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:32.612] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.723] <TB3> INFO: Test took 1111ms.
[13:29:33.724] <TB3> INFO: The DUT currently contains the following objects:
[13:29:33.724] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:33.724] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:33.724] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:33.724] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:33.724] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.724] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.725] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.725] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.725] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.725] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:33.725] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.838] <TB3> INFO: Test took 1113ms.
[13:29:34.840] <TB3> INFO: The DUT currently contains the following objects:
[13:29:34.840] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:34.840] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:34.840] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:34.840] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:34.840] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.840] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.841] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:34.841] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.953] <TB3> INFO: Test took 1112ms.
[13:29:35.954] <TB3> INFO: The DUT currently contains the following objects:
[13:29:35.955] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:35.955] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:35.955] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:35.955] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:35.955] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:35.955] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.068] <TB3> INFO: Test took 1113ms.
[13:29:37.069] <TB3> INFO: The DUT currently contains the following objects:
[13:29:37.069] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:37.069] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:37.069] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:37.069] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:37.069] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:37.069] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.182] <TB3> INFO: Test took 1113ms.
[13:29:38.183] <TB3> INFO: The DUT currently contains the following objects:
[13:29:38.183] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:38.183] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:38.183] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:38.183] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:38.183] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.183] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.184] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.184] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.184] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:38.184] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.297] <TB3> INFO: Test took 1113ms.
[13:29:39.298] <TB3> INFO: The DUT currently contains the following objects:
[13:29:39.298] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:39.298] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:39.298] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:39.298] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:39.298] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:39.298] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.412] <TB3> INFO: Test took 1114ms.
[13:29:40.413] <TB3> INFO: The DUT currently contains the following objects:
[13:29:40.413] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:40.413] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:40.413] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:40.413] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:40.413] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.413] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.413] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.413] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.413] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.413] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.413] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.413] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.414] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.414] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.414] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.414] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.414] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.414] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.414] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:40.414] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.527] <TB3> INFO: Test took 1113ms.
[13:29:41.528] <TB3> INFO: The DUT currently contains the following objects:
[13:29:41.528] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:41.528] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:41.528] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:41.528] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:41.528] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.528] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:41.529] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.639] <TB3> INFO: Test took 1110ms.
[13:29:42.641] <TB3> INFO: The DUT currently contains the following objects:
[13:29:42.641] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:42.641] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:42.641] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:42.641] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:42.641] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:42.641] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.754] <TB3> INFO: Test took 1113ms.
[13:29:43.756] <TB3> INFO: The DUT currently contains the following objects:
[13:29:43.756] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:43.756] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:43.756] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:43.756] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:43.756] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.756] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.757] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:43.757] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.869] <TB3> INFO: Test took 1112ms.
[13:29:44.871] <TB3> INFO: The DUT currently contains the following objects:
[13:29:44.882] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:44.882] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:44.882] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:44.882] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:44.882] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.882] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.882] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.882] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.882] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.882] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.882] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:44.883] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.983] <TB3> INFO: Test took 1100ms.
[13:29:45.984] <TB3> INFO: The DUT currently contains the following objects:
[13:29:45.984] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:45.984] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:45.984] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:45.985] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:45.985] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:45.985] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.095] <TB3> INFO: Test took 1110ms.
[13:29:47.096] <TB3> INFO: The DUT currently contains the following objects:
[13:29:47.096] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:47.097] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:47.097] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:47.097] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:47.097] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:47.097] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.210] <TB3> INFO: Test took 1113ms.
[13:29:48.212] <TB3> INFO: The DUT currently contains the following objects:
[13:29:48.212] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:29:48.212] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:29:48.212] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:29:48.212] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:29:48.212] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.212] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.213] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.213] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.213] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.213] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:48.213] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:29:49.324] <TB3> INFO: Test took 1111ms.
[13:29:49.327] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:33:51.463] <TB3> INFO: Test took 242136ms.
[13:33:53.377] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:37:58.887] <TB3> INFO: Test took 245510ms.
[13:38:00.737] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.744] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.751] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.758] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:38:00.765] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:38:00.771] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:38:00.778] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.785] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.792] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.798] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.805] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.812] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.819] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.826] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.833] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.840] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.847] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:38:00.855] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.864] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.872] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:38:00.899] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:38:00.899] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:38:00.900] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:38:00.900] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:38:00.900] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:38:00.901] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:38:00.901] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:38:00.901] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:38:00.901] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:38:00.902] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:38:00.902] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:38:00.902] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:38:00.902] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:38:00.903] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:38:00.903] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:38:00.903] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:38:04.517] <TB3> INFO: Test took 3612ms.
[13:38:08.414] <TB3> INFO: Test took 3634ms.
[13:38:12.276] <TB3> INFO: Test took 3583ms.
[13:38:12.551] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:13.478] <TB3> INFO: Test took 927ms.
[13:38:13.481] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:14.595] <TB3> INFO: Test took 1114ms.
[13:38:14.597] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:15.710] <TB3> INFO: Test took 1113ms.
[13:38:15.713] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:16.828] <TB3> INFO: Test took 1115ms.
[13:38:16.831] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:17.944] <TB3> INFO: Test took 1113ms.
[13:38:17.946] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:19.055] <TB3> INFO: Test took 1109ms.
[13:38:19.057] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:20.171] <TB3> INFO: Test took 1114ms.
[13:38:20.173] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:21.288] <TB3> INFO: Test took 1115ms.
[13:38:21.290] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:22.407] <TB3> INFO: Test took 1117ms.
[13:38:22.410] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:23.524] <TB3> INFO: Test took 1115ms.
[13:38:23.527] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:24.639] <TB3> INFO: Test took 1113ms.
[13:38:24.641] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:25.755] <TB3> INFO: Test took 1114ms.
[13:38:25.757] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:26.872] <TB3> INFO: Test took 1115ms.
[13:38:26.874] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:27.987] <TB3> INFO: Test took 1113ms.
[13:38:27.990] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:29.104] <TB3> INFO: Test took 1114ms.
[13:38:29.107] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:30.220] <TB3> INFO: Test took 1114ms.
[13:38:30.223] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:31.338] <TB3> INFO: Test took 1115ms.
[13:38:31.341] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:32.453] <TB3> INFO: Test took 1112ms.
[13:38:32.456] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:33.570] <TB3> INFO: Test took 1114ms.
[13:38:33.573] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:34.688] <TB3> INFO: Test took 1115ms.
[13:38:34.691] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:35.803] <TB3> INFO: Test took 1113ms.
[13:38:35.806] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:36.920] <TB3> INFO: Test took 1114ms.
[13:38:36.922] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:38.031] <TB3> INFO: Test took 1109ms.
[13:38:38.034] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:39.141] <TB3> INFO: Test took 1107ms.
[13:38:39.143] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:40.251] <TB3> INFO: Test took 1108ms.
[13:38:40.253] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:41.362] <TB3> INFO: Test took 1109ms.
[13:38:41.364] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:42.474] <TB3> INFO: Test took 1110ms.
[13:38:42.476] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:43.584] <TB3> INFO: Test took 1108ms.
[13:38:43.586] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:44.694] <TB3> INFO: Test took 1108ms.
[13:38:44.696] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:45.805] <TB3> INFO: Test took 1109ms.
[13:38:45.806] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:46.915] <TB3> INFO: Test took 1109ms.
[13:38:46.923] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:38:48.030] <TB3> INFO: Test took 1107ms.
[13:38:48.552] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 568 seconds
[13:38:48.552] <TB3> INFO: PH scale (per ROC): 89 86 80 86 77 81 75 76 79 81 96 92 80 73 87 79
[13:38:48.552] <TB3> INFO: PH offset (per ROC): 151 155 157 149 174 170 175 166 163 160 159 142 164 174 161 160
[13:38:48.762] <TB3> INFO: ######################################################################
[13:38:48.762] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:38:48.762] <TB3> INFO: ######################################################################
[13:38:48.773] <TB3> INFO: scanning low vcal = 10
[13:38:52.699] <TB3> INFO: Test took 3926ms.
[13:38:52.702] <TB3> INFO: scanning low vcal = 20
[13:38:56.632] <TB3> INFO: Test took 3920ms.
[13:38:56.635] <TB3> INFO: scanning low vcal = 30
[13:39:00.576] <TB3> INFO: Test took 3941ms.
[13:39:00.581] <TB3> INFO: scanning low vcal = 40
[13:39:05.050] <TB3> INFO: Test took 4468ms.
[13:39:05.117] <TB3> INFO: scanning low vcal = 50
[13:39:09.601] <TB3> INFO: Test took 4484ms.
[13:39:09.679] <TB3> INFO: scanning low vcal = 60
[13:39:14.157] <TB3> INFO: Test took 4478ms.
[13:39:14.225] <TB3> INFO: scanning low vcal = 70
[13:39:18.741] <TB3> INFO: Test took 4516ms.
[13:39:18.812] <TB3> INFO: scanning low vcal = 80
[13:39:23.315] <TB3> INFO: Test took 4503ms.
[13:39:23.381] <TB3> INFO: scanning low vcal = 90
[13:39:27.715] <TB3> INFO: Test took 4334ms.
[13:39:27.779] <TB3> INFO: scanning low vcal = 100
[13:39:32.098] <TB3> INFO: Test took 4319ms.
[13:39:32.156] <TB3> INFO: scanning low vcal = 110
[13:39:36.473] <TB3> INFO: Test took 4317ms.
[13:39:36.534] <TB3> INFO: scanning low vcal = 120
[13:39:40.855] <TB3> INFO: Test took 4321ms.
[13:39:40.944] <TB3> INFO: scanning low vcal = 130
[13:39:45.260] <TB3> INFO: Test took 4316ms.
[13:39:45.321] <TB3> INFO: scanning low vcal = 140
[13:39:49.792] <TB3> INFO: Test took 4471ms.
[13:39:49.866] <TB3> INFO: scanning low vcal = 150
[13:39:54.372] <TB3> INFO: Test took 4506ms.
[13:39:54.441] <TB3> INFO: scanning low vcal = 160
[13:39:58.959] <TB3> INFO: Test took 4518ms.
[13:39:59.020] <TB3> INFO: scanning low vcal = 170
[13:40:03.508] <TB3> INFO: Test took 4488ms.
[13:40:03.569] <TB3> INFO: scanning low vcal = 180
[13:40:08.024] <TB3> INFO: Test took 4455ms.
[13:40:08.089] <TB3> INFO: scanning low vcal = 190
[13:40:12.669] <TB3> INFO: Test took 4580ms.
[13:40:12.730] <TB3> INFO: scanning low vcal = 200
[13:40:17.206] <TB3> INFO: Test took 4476ms.
[13:40:17.282] <TB3> INFO: scanning low vcal = 210
[13:40:21.760] <TB3> INFO: Test took 4478ms.
[13:40:21.819] <TB3> INFO: scanning low vcal = 220
[13:40:26.337] <TB3> INFO: Test took 4518ms.
[13:40:26.397] <TB3> INFO: scanning low vcal = 230
[13:40:30.917] <TB3> INFO: Test took 4520ms.
[13:40:30.991] <TB3> INFO: scanning low vcal = 240
[13:40:35.517] <TB3> INFO: Test took 4525ms.
[13:40:35.583] <TB3> INFO: scanning low vcal = 250
[13:40:40.061] <TB3> INFO: Test took 4478ms.
[13:40:40.131] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:40:44.614] <TB3> INFO: Test took 4483ms.
[13:40:44.682] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:40:49.154] <TB3> INFO: Test took 4472ms.
[13:40:49.229] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:40:53.752] <TB3> INFO: Test took 4523ms.
[13:40:53.816] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:40:58.308] <TB3> INFO: Test took 4492ms.
[13:40:58.373] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:41:02.917] <TB3> INFO: Test took 4544ms.
[13:41:03.439] <TB3> INFO: PixTestGainPedestal::measure() done
[13:41:34.934] <TB3> INFO: PixTestGainPedestal::fit() done
[13:41:34.934] <TB3> INFO: non-linearity mean: 0.955 0.960 0.960 0.954 0.954 0.959 0.957 0.952 0.958 0.952 0.956 0.963 0.961 0.957 0.958 0.958
[13:41:34.934] <TB3> INFO: non-linearity RMS: 0.006 0.005 0.005 0.006 0.006 0.005 0.006 0.006 0.006 0.006 0.006 0.005 0.005 0.006 0.005 0.005
[13:41:34.934] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:41:34.955] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:41:34.978] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:41:34.999] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:41:35.023] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:41:35.044] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:41:35.065] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:41:35.085] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:41:35.105] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:41:35.125] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:41:35.146] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:41:35.168] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:41:35.188] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:41:35.208] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:41:35.231] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:41:35.251] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:41:35.270] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 166 seconds
[13:41:35.277] <TB3> INFO: enter test to run
[13:41:35.278] <TB3> INFO: test: exit no parameter change
[13:41:35.726] <TB3> QUIET: Connection to board 170 closed.
[13:41:35.742] <TB3> INFO: pXar: this is the end, my friend