[08:55:35.627] <TB3> INFO: *** Welcome to pxar ***
[08:55:35.627] <TB3> INFO: *** Today: 2015/08/05
[08:55:35.628] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C15.dat
[08:55:35.629] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:55:35.629] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//defaultMaskFile.dat
[08:55:35.629] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters_C15.dat
[08:55:35.711] <TB3> INFO: clk: 4
[08:55:35.711] <TB3> INFO: ctr: 4
[08:55:35.711] <TB3> INFO: sda: 19
[08:55:35.711] <TB3> INFO: tin: 9
[08:55:35.711] <TB3> INFO: level: 15
[08:55:35.711] <TB3> INFO: triggerdelay: 0
[08:55:35.711] <TB3> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[08:55:35.711] <TB3> INFO: Log level: INFO
[08:55:35.727] <TB3> INFO: Found DTB DTB_WZ4I6J
[08:55:35.740] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[08:55:35.743] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[08:55:35.746] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[08:55:37.298] <TB3> INFO: DUT info:
[08:55:37.298] <TB3> INFO: The DUT currently contains the following objects:
[08:55:37.298] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[08:55:37.298] <TB3> INFO: TBM Core alpha (0): 7 registers set
[08:55:37.298] <TB3> INFO: TBM Core beta (1): 7 registers set
[08:55:37.298] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:55:37.298] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.298] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:37.699] <TB3> INFO: enter 'restricted' command line mode
[08:55:37.699] <TB3> INFO: enter test to run
[08:55:37.699] <TB3> INFO: test: pretest no parameter change
[08:55:37.699] <TB3> INFO: running: pretest
[08:55:37.705] <TB3> INFO: ######################################################################
[08:55:37.705] <TB3> INFO: PixTestPretest::doTest()
[08:55:37.705] <TB3> INFO: ######################################################################
[08:55:37.707] <TB3> INFO: ----------------------------------------------------------------------
[08:55:37.707] <TB3> INFO: PixTestPretest::programROC()
[08:55:37.707] <TB3> INFO: ----------------------------------------------------------------------
[08:55:55.721] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:55:55.722] <TB3> INFO: IA differences per ROC: 19.3 16.9 19.3 19.3 20.1 20.1 20.1 20.1 19.3 19.3 18.5 19.3 20.1 19.3 20.1 20.1
[08:55:55.788] <TB3> INFO: ----------------------------------------------------------------------
[08:55:55.788] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:55:55.788] <TB3> INFO: ----------------------------------------------------------------------
[08:56:11.046] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[08:56:11.051] <TB3> INFO: ----------------------------------------------------------------------
[08:56:11.051] <TB3> INFO: PixTestPretest::findWorkingPixel()
[08:56:11.052] <TB3> INFO: ----------------------------------------------------------------------
[08:56:19.686] <TB3> INFO: Test took 8631ms.
[08:56:19.978] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:56:19.997] <TB3> INFO: ----------------------------------------------------------------------
[08:56:19.997] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[08:56:19.997] <TB3> INFO: ----------------------------------------------------------------------
[08:56:28.732] <TB3> INFO: Test took 8732ms.
[08:56:29.017] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[08:56:29.017] <TB3> INFO: CalDel: 136 127 142 173 144 131 182 158 169 146 157 130 147 159 156 156
[08:56:29.017] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:56:29.022] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C0.dat
[08:56:29.022] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C1.dat
[08:56:29.023] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C2.dat
[08:56:29.023] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C3.dat
[08:56:29.023] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C4.dat
[08:56:29.023] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C5.dat
[08:56:29.024] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C6.dat
[08:56:29.024] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C7.dat
[08:56:29.024] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C8.dat
[08:56:29.024] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C9.dat
[08:56:29.024] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C10.dat
[08:56:29.025] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C11.dat
[08:56:29.025] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C12.dat
[08:56:29.025] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C13.dat
[08:56:29.025] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C14.dat
[08:56:29.025] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C15.dat
[08:56:29.026] <TB3> INFO: PixTestPretest::doTest() done, duration: 51 seconds
[08:56:29.129] <TB3> INFO: enter test to run
[08:56:29.129] <TB3> INFO: test: fulltest no parameter change
[08:56:29.129] <TB3> INFO: running: fulltest
[08:56:29.129] <TB3> INFO: ######################################################################
[08:56:29.129] <TB3> INFO: PixTestFullTest::doTest()
[08:56:29.129] <TB3> INFO: ######################################################################
[08:56:29.131] <TB3> INFO: ######################################################################
[08:56:29.131] <TB3> INFO: PixTestAlive::doTest()
[08:56:29.131] <TB3> INFO: ######################################################################
[08:56:29.132] <TB3> INFO: ----------------------------------------------------------------------
[08:56:29.132] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:29.132] <TB3> INFO: ----------------------------------------------------------------------
[08:56:32.718] <TB3> INFO: Test took 3585ms.
[08:56:32.743] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:32.954] <TB3> INFO: PixTestAlive::aliveTest() done
[08:56:32.954] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:32.956] <TB3> INFO: ----------------------------------------------------------------------
[08:56:32.956] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:32.956] <TB3> INFO: ----------------------------------------------------------------------
[08:56:35.816] <TB3> INFO: Test took 2859ms.
[08:56:35.819] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:35.819] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:56:36.033] <TB3> INFO: PixTestAlive::maskTest() done
[08:56:36.033] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:36.035] <TB3> INFO: ----------------------------------------------------------------------
[08:56:36.035] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:36.035] <TB3> INFO: ----------------------------------------------------------------------
[08:56:39.618] <TB3> INFO: Test took 3582ms.
[08:56:39.639] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:39.852] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[08:56:39.852] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:39.852] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[08:56:39.866] <TB3> INFO: ######################################################################
[08:56:39.866] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:56:39.866] <TB3> INFO: ######################################################################
[08:56:39.868] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[08:56:39.884] <TB3> INFO: dacScan step from 0 .. 29
[08:57:02.646] <TB3> INFO: Test took 22762ms.
[08:57:02.716] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:02.716] <TB3> INFO: dacScan step from 30 .. 59
[08:57:27.483] <TB3> INFO: Test took 24767ms.
[08:57:27.978] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:28.091] <TB3> INFO: dacScan step from 60 .. 89
[08:57:58.148] <TB3> INFO: Test took 30056ms.
[08:57:59.242] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:59.630] <TB3> INFO: dacScan step from 90 .. 119
[08:58:29.374] <TB3> INFO: Test took 29744ms.
[08:58:29.664] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:29.740] <TB3> INFO: dacScan step from 120 .. 149
[08:58:55.454] <TB3> INFO: Test took 25714ms.
[08:58:56.285] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:22.905] <TB3> INFO: PixTestBBMap::doTest() done, duration: 223 seconds
[09:00:22.905] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
[09:00:22.905] <TB3> INFO: separation cut (per ROC): 71 75 96 74 96 90 82 73 71 92 80 74 81 78 69 73
[09:00:23.215] <TB3> INFO: ######################################################################
[09:00:23.215] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[09:00:23.215] <TB3> INFO: ######################################################################
[09:00:23.215] <TB3> INFO: ----------------------------------------------------------------------
[09:00:23.215] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[09:00:23.215] <TB3> INFO: ----------------------------------------------------------------------
[09:00:23.215] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[09:00:23.242] <TB3> INFO: dacScan step from 0 .. 3
[09:00:43.182] <TB3> INFO: Test took 19939ms.
[09:00:43.207] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:43.207] <TB3> INFO: dacScan step from 4 .. 7
[09:01:02.928] <TB3> INFO: Test took 19721ms.
[09:01:03.026] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:03.026] <TB3> INFO: dacScan step from 8 .. 11
[09:01:22.897] <TB3> INFO: Test took 19871ms.
[09:01:22.980] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:22.980] <TB3> INFO: dacScan step from 12 .. 15
[09:01:42.573] <TB3> INFO: Test took 19593ms.
[09:01:42.663] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:42.663] <TB3> INFO: dacScan step from 16 .. 19
[09:02:02.247] <TB3> INFO: Test took 19584ms.
[09:02:02.336] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:02.336] <TB3> INFO: dacScan step from 20 .. 23
[09:02:21.888] <TB3> INFO: Test took 19552ms.
[09:02:21.976] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:21.976] <TB3> INFO: dacScan step from 24 .. 27
[09:02:41.935] <TB3> INFO: Test took 19959ms.
[09:02:41.960] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:41.960] <TB3> INFO: dacScan step from 28 .. 31
[09:03:01.844] <TB3> INFO: Test took 19884ms.
[09:03:01.879] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:01.879] <TB3> INFO: dacScan step from 32 .. 35
[09:03:21.868] <TB3> INFO: Test took 19989ms.
[09:03:21.897] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:21.897] <TB3> INFO: dacScan step from 36 .. 39
[09:03:46.986] <TB3> INFO: Test took 25089ms.
[09:03:47.016] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:47.016] <TB3> INFO: dacScan step from 40 .. 43
[09:04:07.295] <TB3> INFO: Test took 20279ms.
[09:04:07.392] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:07.392] <TB3> INFO: dacScan step from 44 .. 47
[09:04:27.247] <TB3> INFO: Test took 19855ms.
[09:04:27.338] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:27.338] <TB3> INFO: dacScan step from 48 .. 51
[09:04:47.238] <TB3> INFO: Test took 19900ms.
[09:04:47.332] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:47.333] <TB3> INFO: dacScan step from 52 .. 55
[09:05:07.252] <TB3> INFO: Test took 19919ms.
[09:05:07.342] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:07.342] <TB3> INFO: dacScan step from 56 .. 59
[09:05:27.006] <TB3> INFO: Test took 19664ms.
[09:05:27.108] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:27.108] <TB3> INFO: dacScan step from 60 .. 63
[09:05:47.319] <TB3> INFO: Test took 20211ms.
[09:05:47.345] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:47.345] <TB3> INFO: dacScan step from 64 .. 67
[09:06:07.249] <TB3> INFO: Test took 19904ms.
[09:06:07.366] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:07.367] <TB3> INFO: dacScan step from 68 .. 71
[09:06:27.748] <TB3> INFO: Test took 20381ms.
[09:06:27.906] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:27.908] <TB3> INFO: dacScan step from 72 .. 75
[09:06:48.384] <TB3> INFO: Test took 20476ms.
[09:06:48.605] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:48.608] <TB3> INFO: dacScan step from 76 .. 79
[09:07:10.334] <TB3> INFO: Test took 21726ms.
[09:07:10.706] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:10.713] <TB3> INFO: dacScan step from 80 .. 83
[09:07:34.863] <TB3> INFO: Test took 24150ms.
[09:07:35.003] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:35.011] <TB3> INFO: dacScan step from 84 .. 87
[09:08:02.334] <TB3> INFO: Test took 27323ms.
[09:08:02.540] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:02.550] <TB3> INFO: dacScan step from 88 .. 91
[09:08:30.380] <TB3> INFO: Test took 27830ms.
[09:08:31.222] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:31.273] <TB3> INFO: dacScan step from 92 .. 95


[09:09:01.389] <TB3> INFO: Test took 30116ms.
[09:09:02.199] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:02.262] <TB3> INFO: dacScan step from 96 .. 99



[09:09:32.207] <TB3> INFO: Test took 29945ms.
[09:09:32.970] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:33.031] <TB3> INFO: dacScan step from 100 .. 103


[09:10:04.136] <TB3> INFO: Test took 31105ms.
[09:10:04.357] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:04.370] <TB3> INFO: dacScan step from 104 .. 107





[09:10:35.555] <TB3> INFO: Test took 31185ms.
[09:10:35.770] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:35.781] <TB3> INFO: dacScan step from 108 .. 111





[09:11:07.348] <TB3> INFO: Test took 31567ms.
[09:11:07.601] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:07.614] <TB3> INFO: dacScan step from 112 .. 115
[09:11:39.727] <TB3> INFO: Test took 32113ms.
[09:11:39.970] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:39.981] <TB3> INFO: dacScan step from 116 .. 119
[09:12:12.419] <TB3> INFO: Test took 32438ms.
[09:12:12.661] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:12.671] <TB3> INFO: dacScan step from 120 .. 123
[09:12:44.878] <TB3> INFO: Test took 32207ms.
[09:12:45.134] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:45.148] <TB3> INFO: dacScan step from 124 .. 127
[09:13:17.426] <TB3> INFO: Test took 32278ms.
[09:13:17.666] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:17.677] <TB3> INFO: dacScan step from 128 .. 131
[09:13:54.807] <TB3> INFO: Test took 37130ms.
[09:13:55.030] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:55.041] <TB3> INFO: dacScan step from 132 .. 135
[09:14:26.933] <TB3> INFO: Test took 31892ms.
[09:14:27.168] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:27.184] <TB3> INFO: dacScan step from 136 .. 139
[09:14:59.200] <TB3> INFO: Test took 32016ms.
[09:14:59.425] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:59.437] <TB3> INFO: dacScan step from 140 .. 143
[09:15:31.578] <TB3> INFO: Test took 32142ms.
[09:15:31.863] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:31.875] <TB3> INFO: dacScan step from 144 .. 147
[09:16:04.057] <TB3> INFO: Test took 32182ms.
[09:16:04.290] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:04.300] <TB3> INFO: dacScan step from 148 .. 149
[09:16:19.860] <TB3> INFO: Test took 15560ms.
[09:16:19.977] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:19.984] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:21.493] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:22.946] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:24.369] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:25.878] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:27.284] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:28.829] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:30.290] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:31.759] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:33.206] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:34.634] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:36.093] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:37.558] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:38.986] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:40.448] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:41.870] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:16:43.365] <TB3> INFO: PixTestScurves::scurves() done
[09:16:43.365] <TB3> INFO: Vcal mean: 76.88 80.11 97.73 86.66 100.84 96.85 93.73 78.34 84.10 87.95 82.35 78.61 88.29 86.01 78.53 85.89
[09:16:43.365] <TB3> INFO: Vcal RMS: 4.83 4.43 6.43 5.18 5.91 6.09 6.64 5.19 5.96 5.46 5.26 4.29 5.14 5.45 4.09 5.68
[09:16:43.365] <TB3> INFO: PixTestScurves::fullTest() done, duration: 980 seconds
[09:16:43.439] <TB3> INFO: ######################################################################
[09:16:43.439] <TB3> INFO: PixTestTrim::doTest()
[09:16:43.439] <TB3> INFO: ######################################################################
[09:16:43.440] <TB3> INFO: ----------------------------------------------------------------------
[09:16:43.440] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:16:43.440] <TB3> INFO: ----------------------------------------------------------------------
[09:16:43.520] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:16:43.520] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:16:43.528] <TB3> INFO: dacScan step from 0 .. 19
[09:17:04.323] <TB3> INFO: Test took 20795ms.
[09:17:04.352] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:04.352] <TB3> INFO: dacScan step from 20 .. 39
[09:17:20.252] <TB3> INFO: Test took 15900ms.
[09:17:20.274] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:20.274] <TB3> INFO: dacScan step from 40 .. 59
[09:17:35.937] <TB3> INFO: Test took 15663ms.
[09:17:35.961] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:35.961] <TB3> INFO: dacScan step from 60 .. 79
[09:17:51.875] <TB3> INFO: Test took 15914ms.
[09:17:51.896] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:51.896] <TB3> INFO: dacScan step from 80 .. 99
[09:18:08.826] <TB3> INFO: Test took 16929ms.
[09:18:08.894] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:08.903] <TB3> INFO: dacScan step from 100 .. 119
[09:18:29.523] <TB3> INFO: Test took 20620ms.
[09:18:29.686] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:29.716] <TB3> INFO: dacScan step from 120 .. 139
[09:18:49.126] <TB3> INFO: Test took 19410ms.
[09:18:49.260] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:49.285] <TB3> INFO: dacScan step from 140 .. 159
[09:19:04.996] <TB3> INFO: Test took 15711ms.
[09:19:05.059] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:25.787] <TB3> INFO: ROC 0 VthrComp = 82
[09:19:25.787] <TB3> INFO: ROC 1 VthrComp = 81
[09:19:25.788] <TB3> INFO: ROC 2 VthrComp = 100
[09:19:25.788] <TB3> INFO: ROC 3 VthrComp = 92
[09:19:25.788] <TB3> INFO: ROC 4 VthrComp = 103
[09:19:25.788] <TB3> INFO: ROC 5 VthrComp = 98
[09:19:25.788] <TB3> INFO: ROC 6 VthrComp = 91
[09:19:25.788] <TB3> INFO: ROC 7 VthrComp = 81
[09:19:25.788] <TB3> INFO: ROC 8 VthrComp = 85
[09:19:25.788] <TB3> INFO: ROC 9 VthrComp = 95
[09:19:25.788] <TB3> INFO: ROC 10 VthrComp = 86
[09:19:25.788] <TB3> INFO: ROC 11 VthrComp = 83
[09:19:25.788] <TB3> INFO: ROC 12 VthrComp = 92
[09:19:25.788] <TB3> INFO: ROC 13 VthrComp = 87
[09:19:25.788] <TB3> INFO: ROC 14 VthrComp = 85
[09:19:25.788] <TB3> INFO: ROC 15 VthrComp = 90
[09:19:25.788] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:19:25.788] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:19:25.799] <TB3> INFO: dacScan step from 0 .. 19
[09:19:41.636] <TB3> INFO: Test took 15837ms.
[09:19:41.660] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:41.660] <TB3> INFO: dacScan step from 20 .. 39
[09:19:57.624] <TB3> INFO: Test took 15963ms.
[09:19:57.658] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:57.662] <TB3> INFO: dacScan step from 40 .. 59
[09:20:16.179] <TB3> INFO: Test took 18517ms.
[09:20:16.334] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:16.372] <TB3> INFO: dacScan step from 60 .. 79
[09:20:38.159] <TB3> INFO: Test took 21787ms.
[09:20:38.339] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:38.392] <TB3> INFO: dacScan step from 80 .. 99
[09:21:00.039] <TB3> INFO: Test took 21647ms.
[09:21:00.209] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:00.260] <TB3> INFO: dacScan step from 100 .. 119
[09:21:22.012] <TB3> INFO: Test took 21752ms.
[09:21:22.174] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:22.220] <TB3> INFO: dacScan step from 120 .. 139
[09:21:43.635] <TB3> INFO: Test took 21415ms.
[09:21:43.824] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:43.874] <TB3> INFO: dacScan step from 140 .. 159
[09:22:04.103] <TB3> INFO: Test took 20228ms.
[09:22:04.327] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:28.656] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 58.9147 for pixel 7/6 mean/min/max = 45.4621/31.9861/58.9382
[09:22:28.656] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 58.3997 for pixel 9/1 mean/min/max = 45.6089/32.7695/58.4484
[09:22:28.656] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.1497 for pixel 0/63 mean/min/max = 46.1825/31.1869/61.1782
[09:22:28.657] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 57.4829 for pixel 19/59 mean/min/max = 45.265/32.9721/57.5579
[09:22:28.657] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 61.415 for pixel 17/76 mean/min/max = 46.981/32.5291/61.4329
[09:22:28.657] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.8068 for pixel 5/6 mean/min/max = 46.3445/31.5574/61.1316
[09:22:28.657] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 61.2314 for pixel 23/4 mean/min/max = 46.7678/32.2049/61.3306
[09:22:28.658] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.8155 for pixel 0/24 mean/min/max = 44.8415/31.6067/58.0762
[09:22:28.658] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 61.5861 for pixel 25/75 mean/min/max = 46.5741/31.556/61.5922
[09:22:28.658] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.1274 for pixel 7/2 mean/min/max = 44.9751/31.8056/58.1446
[09:22:28.658] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.3134 for pixel 9/77 mean/min/max = 46.3239/32.2065/60.4413
[09:22:28.659] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 58.2522 for pixel 0/13 mean/min/max = 45.5455/32.7119/58.3791
[09:22:28.659] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.0589 for pixel 7/7 mean/min/max = 45.6006/32.0846/59.1167
[09:22:28.659] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 61.1656 for pixel 3/28 mean/min/max = 46.4695/31.6423/61.2968
[09:22:28.659] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 56.1274 for pixel 1/68 mean/min/max = 44.1259/32.0528/56.199
[09:22:28.660] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.1989 for pixel 0/79 mean/min/max = 46.1109/31.866/60.3557
[09:22:28.660] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:24:09.769] <TB3> INFO: Test took 101109ms.
[09:24:11.190] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:24:11.199] <TB3> INFO: dacScan step from 0 .. 19
[09:24:35.682] <TB3> INFO: Test took 24483ms.
[09:24:35.726] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:35.727] <TB3> INFO: dacScan step from 20 .. 39
[09:25:06.623] <TB3> INFO: Test took 30897ms.
[09:25:06.840] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:06.868] <TB3> INFO: dacScan step from 40 .. 59
[09:25:43.123] <TB3> INFO: Test took 36255ms.
[09:25:43.405] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:43.454] <TB3> INFO: dacScan step from 60 .. 79



[09:26:19.591] <TB3> INFO: Test took 36136ms.
[09:26:19.910] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:19.954] <TB3> INFO: dacScan step from 80 .. 99

[09:26:52.319] <TB3> INFO: Test took 32365ms.
[09:26:52.592] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:52.644] <TB3> INFO: dacScan step from 100 .. 119


[09:27:28.755] <TB3> INFO: Test took 36111ms.
[09:27:29.027] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:29.075] <TB3> INFO: dacScan step from 120 .. 139


[09:28:05.418] <TB3> INFO: Test took 36343ms.
[09:28:05.703] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:05.748] <TB3> INFO: dacScan step from 140 .. 159



[09:28:42.184] <TB3> INFO: Test took 36435ms.
[09:28:42.462] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:42.505] <TB3> INFO: dacScan step from 160 .. 179


[09:29:17.773] <TB3> INFO: Test took 35268ms.
[09:29:18.059] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:18.114] <TB3> INFO: dacScan step from 180 .. 199

[09:29:52.130] <TB3> INFO: Test took 34016ms.
[09:29:52.454] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:22.355] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.079188 .. 255.000000
[09:30:22.439] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:30:22.448] <TB3> INFO: dacScan step from 0 .. 19
[09:30:36.557] <TB3> INFO: Test took 14109ms.
[09:30:36.580] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:36.580] <TB3> INFO: dacScan step from 20 .. 39
[09:30:52.025] <TB3> INFO: Test took 15445ms.
[09:30:52.109] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:52.126] <TB3> INFO: dacScan step from 40 .. 59
[09:31:11.024] <TB3> INFO: Test took 18898ms.
[09:31:11.180] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:11.226] <TB3> INFO: dacScan step from 60 .. 79
[09:31:29.990] <TB3> INFO: Test took 18764ms.
[09:31:30.132] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:30.179] <TB3> INFO: dacScan step from 80 .. 99
[09:31:49.017] <TB3> INFO: Test took 18838ms.
[09:31:49.167] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:49.220] <TB3> INFO: dacScan step from 100 .. 119
[09:32:08.175] <TB3> INFO: Test took 18955ms.
[09:32:08.320] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:08.370] <TB3> INFO: dacScan step from 120 .. 139
[09:32:27.197] <TB3> INFO: Test took 18827ms.
[09:32:27.343] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:27.392] <TB3> INFO: dacScan step from 140 .. 159
[09:32:44.746] <TB3> INFO: Test took 17353ms.
[09:32:44.879] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:44.928] <TB3> INFO: dacScan step from 160 .. 179
[09:33:03.737] <TB3> INFO: Test took 18809ms.
[09:33:03.882] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:03.926] <TB3> INFO: dacScan step from 180 .. 199
[09:33:23.736] <TB3> INFO: Test took 19810ms.
[09:33:23.895] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:23.949] <TB3> INFO: dacScan step from 200 .. 219
[09:33:42.365] <TB3> INFO: Test took 18416ms.
[09:33:42.504] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:42.555] <TB3> INFO: dacScan step from 220 .. 239
[09:33:59.940] <TB3> INFO: Test took 17385ms.
[09:34:00.080] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:00.131] <TB3> INFO: dacScan step from 240 .. 255
[09:34:15.135] <TB3> INFO: Test took 15004ms.
[09:34:15.250] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:47.991] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 14.646678 .. 45.123201
[09:34:48.079] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 55 (20) hits flags = 16 (plus default)
[09:34:48.087] <TB3> INFO: dacScan step from 4 .. 23
[09:35:01.785] <TB3> INFO: Test took 13698ms.
[09:35:01.810] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:01.810] <TB3> INFO: dacScan step from 24 .. 43
[09:35:18.261] <TB3> INFO: Test took 16451ms.
[09:35:18.365] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:18.393] <TB3> INFO: dacScan step from 44 .. 55
[09:35:30.646] <TB3> INFO: Test took 12252ms.
[09:35:30.735] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:46.768] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 17.970169 .. 45.123201
[09:35:46.848] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 55 (20) hits flags = 16 (plus default)
[09:35:46.858] <TB3> INFO: dacScan step from 7 .. 26
[09:36:00.376] <TB3> INFO: Test took 13518ms.
[09:36:00.402] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:00.402] <TB3> INFO: dacScan step from 27 .. 46
[09:36:17.068] <TB3> INFO: Test took 16666ms.
[09:36:17.187] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:17.214] <TB3> INFO: dacScan step from 47 .. 55
[09:36:27.311] <TB3> INFO: Test took 10096ms.
[09:36:27.382] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:43.386] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.877437 .. 45.123201
[09:36:43.478] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 55 (20) hits flags = 16 (plus default)
[09:36:43.487] <TB3> INFO: dacScan step from 1 .. 20
[09:36:57.208] <TB3> INFO: Test took 13721ms.
[09:36:57.225] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:57.226] <TB3> INFO: dacScan step from 21 .. 40
[09:37:11.914] <TB3> INFO: Test took 14688ms.
[09:37:12.000] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:12.018] <TB3> INFO: dacScan step from 41 .. 55
[09:37:26.339] <TB3> INFO: Test took 14321ms.
[09:37:26.482] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:41.299] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:37:41.299] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:37:41.308] <TB3> INFO: dacScan step from 15 .. 34
[09:38:06.217] <TB3> INFO: Test took 24909ms.
[09:38:06.290] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:06.299] <TB3> INFO: dacScan step from 35 .. 54


[09:38:39.944] <TB3> INFO: Test took 33645ms.
[09:38:40.247] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:40.296] <TB3> INFO: dacScan step from 55 .. 55
[09:38:44.822] <TB3> INFO: Test took 4526ms.
[09:38:44.844] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:58.655] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:38:58.663] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:38:58.663] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:38:58.663] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:38:58.663] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:38:58.664] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:38:58.664] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:38:58.664] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:38:58.665] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:38:58.665] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:38:58.665] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:38:58.665] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:38:58.666] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:38:58.666] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:38:58.666] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:38:58.666] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:38:58.667] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:38:58.677] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:38:58.683] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:38:58.689] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:38:58.698] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:38:58.705] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:38:58.711] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:38:58.717] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:38:58.723] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:38:58.730] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:38:58.736] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:38:58.742] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:38:58.748] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:38:58.754] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:38:58.760] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:38:58.767] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:38:58.773] <TB3> INFO: PixTestTrim::trimTest() done
[09:38:58.773] <TB3> INFO: vtrim: 106 101 112 115 116 108 118 76 110 108 104 103 109 115 92 88
[09:38:58.773] <TB3> INFO: vthrcomp: 82 81 100 92 103 98 91 81 85 95 86 83 92 87 85 90
[09:38:58.773] <TB3> INFO: vcal mean: 35.00 35.07 35.00 35.04 35.09 35.06 35.09 34.98 35.06 35.00 35.04 35.04 35.04 35.03 35.02 35.02
[09:38:58.773] <TB3> INFO: vcal RMS: 0.97 1.02 1.08 1.02 1.23 1.06 3.64 1.04 1.06 0.95 1.02 0.96 1.02 1.06 0.99 1.11
[09:38:58.773] <TB3> INFO: bits mean: 9.52 9.64 9.63 9.84 9.74 9.67 9.85 8.90 9.67 9.90 9.48 9.58 10.07 10.03 10.15 9.24
[09:38:58.773] <TB3> INFO: bits RMS: 2.72 2.54 2.68 2.45 2.43 2.61 2.34 2.98 2.61 2.56 2.70 2.55 2.40 2.41 2.48 2.83
[09:38:58.780] <TB3> INFO: ----------------------------------------------------------------------
[09:38:58.780] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:38:58.780] <TB3> INFO: ----------------------------------------------------------------------
[09:38:58.781] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:38:58.790] <TB3> INFO: dacScan step from 0 .. 19
[09:39:22.906] <TB3> INFO: Test took 24116ms.
[09:39:22.951] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:22.951] <TB3> INFO: dacScan step from 20 .. 39
[09:39:46.992] <TB3> INFO: Test took 24040ms.
[09:39:47.030] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:47.030] <TB3> INFO: dacScan step from 40 .. 59
[09:40:11.038] <TB3> INFO: Test took 24008ms.
[09:40:11.077] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:11.077] <TB3> INFO: dacScan step from 60 .. 79
[09:40:35.065] <TB3> INFO: Test took 23988ms.
[09:40:35.104] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:35.104] <TB3> INFO: dacScan step from 80 .. 99
[09:40:57.700] <TB3> INFO: Test took 22596ms.
[09:40:57.756] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:57.759] <TB3> INFO: dacScan step from 100 .. 119
[09:41:27.550] <TB3> INFO: Test took 29790ms.
[09:41:27.760] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:27.783] <TB3> INFO: dacScan step from 120 .. 139
[09:42:03.493] <TB3> INFO: Test took 35710ms.
[09:42:03.793] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:03.832] <TB3> INFO: dacScan step from 140 .. 159
[09:42:37.297] <TB3> INFO: Test took 33465ms.
[09:42:37.580] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:37.628] <TB3> INFO: dacScan step from 160 .. 179
[09:43:13.998] <TB3> INFO: Test took 36370ms.
[09:43:14.259] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:14.306] <TB3> INFO: dacScan step from 180 .. 199
[09:43:47.491] <TB3> INFO: Test took 33184ms.
[09:43:47.776] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:12.915] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 169 (20) hits flags = 16 (plus default)
[09:44:12.927] <TB3> INFO: dacScan step from 0 .. 19
[09:44:36.336] <TB3> INFO: Test took 23409ms.
[09:44:36.374] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:36.374] <TB3> INFO: dacScan step from 20 .. 39
[09:45:00.487] <TB3> INFO: Test took 24113ms.
[09:45:00.529] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:00.529] <TB3> INFO: dacScan step from 40 .. 59
[09:45:24.837] <TB3> INFO: Test took 24308ms.
[09:45:24.875] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:24.875] <TB3> INFO: dacScan step from 60 .. 79
[09:45:48.913] <TB3> INFO: Test took 24038ms.
[09:45:48.950] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:48.950] <TB3> INFO: dacScan step from 80 .. 99
[09:46:15.408] <TB3> INFO: Test took 26458ms.
[09:46:15.529] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:15.539] <TB3> INFO: dacScan step from 100 .. 119
[09:46:49.487] <TB3> INFO: Test took 33948ms.
[09:46:49.771] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:49.802] <TB3> INFO: dacScan step from 120 .. 139
[09:47:25.600] <TB3> INFO: Test took 35798ms.
[09:47:25.926] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:25.976] <TB3> INFO: dacScan step from 140 .. 159
[09:48:02.288] <TB3> INFO: Test took 36312ms.
[09:48:02.585] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:02.630] <TB3> INFO: dacScan step from 160 .. 169
[09:48:21.306] <TB3> INFO: Test took 18676ms.
[09:48:21.527] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:44.388] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 156 (20) hits flags = 16 (plus default)
[09:48:44.397] <TB3> INFO: dacScan step from 0 .. 19
[09:49:08.588] <TB3> INFO: Test took 24191ms.
[09:49:08.624] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:08.624] <TB3> INFO: dacScan step from 20 .. 39
[09:49:30.982] <TB3> INFO: Test took 22358ms.
[09:49:31.016] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:31.016] <TB3> INFO: dacScan step from 40 .. 59
[09:49:54.959] <TB3> INFO: Test took 23943ms.
[09:49:54.994] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:54.994] <TB3> INFO: dacScan step from 60 .. 79
[09:50:19.232] <TB3> INFO: Test took 24237ms.
[09:50:19.269] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:19.269] <TB3> INFO: dacScan step from 80 .. 99
[09:50:45.436] <TB3> INFO: Test took 26167ms.
[09:50:45.555] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:45.567] <TB3> INFO: dacScan step from 100 .. 119




[09:51:19.771] <TB3> INFO: Test took 34204ms.
[09:51:20.047] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:20.081] <TB3> INFO: dacScan step from 120 .. 139


[09:51:56.310] <TB3> INFO: Test took 36229ms.
[09:51:56.616] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:56.665] <TB3> INFO: dacScan step from 140 .. 156
[09:52:24.938] <TB3> INFO: Test took 28273ms.
[09:52:25.329] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:49.192] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 156 (20) hits flags = 16 (plus default)
[09:52:49.200] <TB3> INFO: dacScan step from 0 .. 19
[09:53:11.943] <TB3> INFO: Test took 22743ms.
[09:53:11.979] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:11.979] <TB3> INFO: dacScan step from 20 .. 39
[09:53:34.397] <TB3> INFO: Test took 22418ms.
[09:53:34.433] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:34.433] <TB3> INFO: dacScan step from 40 .. 59
[09:53:57.691] <TB3> INFO: Test took 23258ms.
[09:53:57.725] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:57.726] <TB3> INFO: dacScan step from 60 .. 79
[09:54:22.005] <TB3> INFO: Test took 24279ms.
[09:54:22.041] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:22.041] <TB3> INFO: dacScan step from 80 .. 99
[09:54:48.644] <TB3> INFO: Test took 26603ms.
[09:54:48.759] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:48.769] <TB3> INFO: dacScan step from 100 .. 119


[09:55:21.855] <TB3> INFO: Test took 33086ms.
[09:55:22.153] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:22.190] <TB3> INFO: dacScan step from 120 .. 139


[09:55:55.350] <TB3> INFO: Test took 33160ms.
[09:55:55.630] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:55.682] <TB3> INFO: dacScan step from 140 .. 156
[09:56:26.495] <TB3> INFO: Test took 30813ms.
[09:56:26.778] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:50.751] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 156 (20) hits flags = 16 (plus default)
[09:56:50.759] <TB3> INFO: dacScan step from 0 .. 19
[09:57:13.269] <TB3> INFO: Test took 22510ms.
[09:57:13.305] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:13.305] <TB3> INFO: dacScan step from 20 .. 39
[09:57:35.987] <TB3> INFO: Test took 22682ms.
[09:57:36.024] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:36.024] <TB3> INFO: dacScan step from 40 .. 59
[09:57:59.882] <TB3> INFO: Test took 23857ms.
[09:57:59.917] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:59.917] <TB3> INFO: dacScan step from 60 .. 79
[09:58:23.983] <TB3> INFO: Test took 24066ms.
[09:58:24.020] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:24.020] <TB3> INFO: dacScan step from 80 .. 99
[09:58:49.001] <TB3> INFO: Test took 24981ms.
[09:58:49.162] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:49.174] <TB3> INFO: dacScan step from 100 .. 119





[09:59:23.229] <TB3> INFO: Test took 34055ms.
[09:59:23.482] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:23.518] <TB3> INFO: dacScan step from 120 .. 139


[09:59:59.597] <TB3> INFO: Test took 36079ms.
[09:59:59.868] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:59.916] <TB3> INFO: dacScan step from 140 .. 156
[10:00:29.398] <TB3> INFO: Test took 29482ms.
[10:00:29.666] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:51.948] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:00:51.950] <TB3> INFO: PixTestTrim::doTest() done, duration: 2648 seconds
[10:00:52.675] <TB3> INFO: ######################################################################
[10:00:52.675] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:00:52.675] <TB3> INFO: ######################################################################
[10:00:56.273] <TB3> INFO: Test took 3596ms.
[10:00:56.299] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:00.170] <TB3> INFO: Test took 3645ms.
[10:01:00.233] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:03.756] <TB3> INFO: Test took 3515ms.
[10:01:03.819] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:03.826] <TB3> INFO: The DUT currently contains the following objects:
[10:01:03.826] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:03.826] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:03.826] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:03.826] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:03.826] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:03.826] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.939] <TB3> INFO: Test took 1113ms.
[10:01:04.940] <TB3> INFO: The DUT currently contains the following objects:
[10:01:04.940] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:04.940] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:04.941] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:04.941] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:04.941] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:04.941] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.053] <TB3> INFO: Test took 1112ms.
[10:01:06.054] <TB3> INFO: The DUT currently contains the following objects:
[10:01:06.054] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:06.054] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:06.054] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:06.054] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:06.054] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.054] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.054] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.054] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.054] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.054] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.054] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.054] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.055] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.055] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.055] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.055] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.055] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.055] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.055] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:06.055] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.166] <TB3> INFO: Test took 1112ms.
[10:01:07.168] <TB3> INFO: The DUT currently contains the following objects:
[10:01:07.168] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:07.168] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:07.168] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:07.168] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:07.168] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:07.168] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: Test took 1109ms.
[10:01:08.277] <TB3> INFO: The DUT currently contains the following objects:
[10:01:08.277] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:08.277] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:08.277] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:08.277] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:08.277] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.277] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.278] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.278] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.278] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.278] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.278] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:08.278] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.389] <TB3> INFO: Test took 1111ms.
[10:01:09.390] <TB3> INFO: The DUT currently contains the following objects:
[10:01:09.390] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:09.390] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:09.390] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:09.390] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:09.390] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.390] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:09.391] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.503] <TB3> INFO: Test took 1112ms.
[10:01:10.504] <TB3> INFO: The DUT currently contains the following objects:
[10:01:10.504] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:10.504] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:10.504] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:10.504] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:10.504] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.504] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.505] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.505] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.505] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.505] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.505] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:10.505] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.616] <TB3> INFO: Test took 1111ms.
[10:01:11.617] <TB3> INFO: The DUT currently contains the following objects:
[10:01:11.618] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:11.618] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:11.618] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:11.618] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:11.618] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.618] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.619] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.619] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:11.619] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.732] <TB3> INFO: Test took 1113ms.
[10:01:12.733] <TB3> INFO: The DUT currently contains the following objects:
[10:01:12.733] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:12.733] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:12.733] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:12.733] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:12.733] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.733] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.733] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.733] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:12.734] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.846] <TB3> INFO: Test took 1112ms.
[10:01:13.847] <TB3> INFO: The DUT currently contains the following objects:
[10:01:13.859] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:13.859] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:13.859] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:13.859] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:13.859] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:13.859] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.959] <TB3> INFO: Test took 1099ms.
[10:01:14.961] <TB3> INFO: The DUT currently contains the following objects:
[10:01:14.961] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:14.961] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:14.961] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:14.961] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:14.961] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:14.961] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.074] <TB3> INFO: Test took 1113ms.
[10:01:16.075] <TB3> INFO: The DUT currently contains the following objects:
[10:01:16.076] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:16.076] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:16.076] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:16.076] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:16.076] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:16.076] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.188] <TB3> INFO: Test took 1112ms.
[10:01:17.190] <TB3> INFO: The DUT currently contains the following objects:
[10:01:17.190] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:17.190] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:17.190] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:17.190] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:17.190] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.190] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.191] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.191] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:17.191] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.295] <TB3> INFO: Test took 1104ms.
[10:01:18.296] <TB3> INFO: The DUT currently contains the following objects:
[10:01:18.296] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:18.296] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:18.296] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:18.296] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:18.296] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.296] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:18.297] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.403] <TB3> INFO: Test took 1106ms.
[10:01:19.404] <TB3> INFO: The DUT currently contains the following objects:
[10:01:19.404] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:19.404] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:19.404] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:19.404] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:19.404] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:19.404] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.510] <TB3> INFO: Test took 1106ms.
[10:01:20.511] <TB3> INFO: The DUT currently contains the following objects:
[10:01:20.511] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:20.511] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:01:20.511] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:01:20.511] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:20.511] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.511] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.512] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:20.512] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:21.617] <TB3> INFO: Test took 1105ms.
[10:01:21.619] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:05:26.061] <TB3> INFO: Test took 244443ms.
[10:05:27.875] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:29.800] <TB3> INFO: Test took 241925ms.
[10:09:31.517] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.524] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.531] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.538] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:09:31.544] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.551] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.558] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.565] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.572] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:09:31.579] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[10:09:31.586] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[10:09:31.593] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[10:09:31.600] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[10:09:31.607] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[10:09:31.613] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[10:09:31.620] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[10:09:31.627] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.634] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.641] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.648] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.655] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.662] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.669] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.676] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.683] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:09:31.707] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:09:31.707] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:09:31.707] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:09:31.707] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:09:31.707] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:09:31.707] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:09:31.707] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:09:31.707] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:09:31.708] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:09:31.708] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:09:31.708] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:09:31.708] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:09:31.708] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:09:31.708] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:09:31.708] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:09:31.708] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:09:35.279] <TB3> INFO: Test took 3569ms.
[10:09:39.115] <TB3> INFO: Test took 3567ms.
[10:09:42.957] <TB3> INFO: Test took 3566ms.
[10:09:43.240] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:44.167] <TB3> INFO: Test took 927ms.
[10:09:44.170] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:45.284] <TB3> INFO: Test took 1114ms.
[10:09:45.286] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:46.399] <TB3> INFO: Test took 1113ms.
[10:09:46.401] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:47.514] <TB3> INFO: Test took 1113ms.
[10:09:47.517] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:48.630] <TB3> INFO: Test took 1113ms.
[10:09:48.633] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:49.746] <TB3> INFO: Test took 1113ms.
[10:09:49.749] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:50.863] <TB3> INFO: Test took 1114ms.
[10:09:50.866] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:51.980] <TB3> INFO: Test took 1114ms.
[10:09:51.983] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:53.098] <TB3> INFO: Test took 1115ms.
[10:09:53.102] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:54.216] <TB3> INFO: Test took 1114ms.
[10:09:54.219] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:55.332] <TB3> INFO: Test took 1113ms.
[10:09:55.334] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:56.447] <TB3> INFO: Test took 1113ms.
[10:09:56.450] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:57.564] <TB3> INFO: Test took 1114ms.
[10:09:57.569] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:58.683] <TB3> INFO: Test took 1114ms.
[10:09:58.686] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:09:59.798] <TB3> INFO: Test took 1112ms.
[10:09:59.803] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:00.909] <TB3> INFO: Test took 1106ms.
[10:10:00.912] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:02.026] <TB3> INFO: Test took 1114ms.
[10:10:02.031] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:03.145] <TB3> INFO: Test took 1115ms.
[10:10:03.148] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:04.261] <TB3> INFO: Test took 1113ms.
[10:10:04.265] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:05.378] <TB3> INFO: Test took 1114ms.
[10:10:05.382] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:06.495] <TB3> INFO: Test took 1113ms.
[10:10:06.498] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:07.611] <TB3> INFO: Test took 1113ms.
[10:10:07.614] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:08.728] <TB3> INFO: Test took 1114ms.
[10:10:08.731] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:09.845] <TB3> INFO: Test took 1114ms.
[10:10:09.849] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:10.963] <TB3> INFO: Test took 1115ms.
[10:10:10.966] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:12.080] <TB3> INFO: Test took 1114ms.
[10:10:12.083] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:13.197] <TB3> INFO: Test took 1114ms.
[10:10:13.200] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:14.315] <TB3> INFO: Test took 1115ms.
[10:10:14.318] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:15.424] <TB3> INFO: Test took 1107ms.
[10:10:15.426] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:16.532] <TB3> INFO: Test took 1106ms.
[10:10:16.534] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:17.646] <TB3> INFO: Test took 1112ms.
[10:10:17.650] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:18.763] <TB3> INFO: Test took 1113ms.
[10:10:19.302] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 566 seconds
[10:10:19.302] <TB3> INFO: PH scale (per ROC): 87 86 80 87 78 80 76 77 79 82 97 93 79 71 86 78
[10:10:19.302] <TB3> INFO: PH offset (per ROC): 150 155 156 149 174 170 176 166 163 160 160 141 164 175 162 161
[10:10:19.487] <TB3> INFO: ######################################################################
[10:10:19.487] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:10:19.487] <TB3> INFO: ######################################################################
[10:10:19.497] <TB3> INFO: scanning low vcal = 10
[10:10:23.474] <TB3> INFO: Test took 3977ms.
[10:10:23.479] <TB3> INFO: scanning low vcal = 20
[10:10:27.460] <TB3> INFO: Test took 3981ms.
[10:10:27.465] <TB3> INFO: scanning low vcal = 30
[10:10:31.477] <TB3> INFO: Test took 4012ms.
[10:10:31.488] <TB3> INFO: scanning low vcal = 40
[10:10:36.025] <TB3> INFO: Test took 4537ms.
[10:10:36.088] <TB3> INFO: scanning low vcal = 50
[10:10:40.504] <TB3> INFO: Test took 4416ms.
[10:10:40.571] <TB3> INFO: scanning low vcal = 60
[10:10:44.890] <TB3> INFO: Test took 4319ms.
[10:10:44.960] <TB3> INFO: scanning low vcal = 70
[10:10:49.279] <TB3> INFO: Test took 4319ms.
[10:10:49.342] <TB3> INFO: scanning low vcal = 80
[10:10:53.660] <TB3> INFO: Test took 4318ms.
[10:10:53.719] <TB3> INFO: scanning low vcal = 90
[10:10:58.033] <TB3> INFO: Test took 4314ms.
[10:10:58.095] <TB3> INFO: scanning low vcal = 100
[10:11:02.601] <TB3> INFO: Test took 4506ms.
[10:11:02.670] <TB3> INFO: scanning low vcal = 110
[10:11:07.162] <TB3> INFO: Test took 4492ms.
[10:11:07.235] <TB3> INFO: scanning low vcal = 120
[10:11:11.708] <TB3> INFO: Test took 4473ms.
[10:11:11.774] <TB3> INFO: scanning low vcal = 130
[10:11:16.254] <TB3> INFO: Test took 4480ms.
[10:11:16.337] <TB3> INFO: scanning low vcal = 140
[10:11:20.879] <TB3> INFO: Test took 4542ms.
[10:11:20.939] <TB3> INFO: scanning low vcal = 150
[10:11:25.481] <TB3> INFO: Test took 4542ms.
[10:11:25.540] <TB3> INFO: scanning low vcal = 160
[10:11:30.087] <TB3> INFO: Test took 4547ms.
[10:11:30.151] <TB3> INFO: scanning low vcal = 170
[10:11:34.669] <TB3> INFO: Test took 4518ms.
[10:11:34.728] <TB3> INFO: scanning low vcal = 180
[10:11:39.209] <TB3> INFO: Test took 4481ms.
[10:11:39.265] <TB3> INFO: scanning low vcal = 190
[10:11:43.858] <TB3> INFO: Test took 4593ms.
[10:11:43.923] <TB3> INFO: scanning low vcal = 200
[10:11:48.414] <TB3> INFO: Test took 4491ms.
[10:11:48.492] <TB3> INFO: scanning low vcal = 210
[10:11:52.971] <TB3> INFO: Test took 4479ms.
[10:11:53.026] <TB3> INFO: scanning low vcal = 220
[10:11:57.527] <TB3> INFO: Test took 4501ms.
[10:11:57.585] <TB3> INFO: scanning low vcal = 230
[10:12:02.092] <TB3> INFO: Test took 4507ms.
[10:12:02.155] <TB3> INFO: scanning low vcal = 240
[10:12:06.652] <TB3> INFO: Test took 4497ms.
[10:12:06.720] <TB3> INFO: scanning low vcal = 250
[10:12:11.202] <TB3> INFO: Test took 4482ms.
[10:12:11.260] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[10:12:15.705] <TB3> INFO: Test took 4445ms.
[10:12:15.762] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[10:12:20.246] <TB3> INFO: Test took 4484ms.
[10:12:20.311] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[10:12:24.828] <TB3> INFO: Test took 4517ms.
[10:12:24.885] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[10:12:29.409] <TB3> INFO: Test took 4524ms.
[10:12:29.496] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:12:34.003] <TB3> INFO: Test took 4507ms.
[10:12:34.520] <TB3> INFO: PixTestGainPedestal::measure() done
[10:13:08.975] <TB3> INFO: PixTestGainPedestal::fit() done
[10:13:08.975] <TB3> INFO: non-linearity mean: 0.950 0.960 0.959 0.956 0.956 0.957 0.962 0.954 0.958 0.955 0.959 0.963 0.956 0.957 0.957 0.957
[10:13:08.975] <TB3> INFO: non-linearity RMS: 0.008 0.005 0.005 0.006 0.006 0.006 0.007 0.005 0.006 0.006 0.005 0.005 0.006 0.006 0.005 0.005
[10:13:09.009] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:13:09.028] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:13:09.046] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:13:09.063] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:13:09.081] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:13:09.099] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:13:09.116] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:13:09.134] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:13:09.152] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:13:09.170] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:13:09.187] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:13:09.205] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:13:09.223] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:13:09.241] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:13:09.258] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:13:09.276] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2063_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:13:09.301] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 169 seconds
[10:13:09.307] <TB3> INFO: enter test to run
[10:13:09.307] <TB3> INFO: test: exit no parameter change
[10:13:09.775] <TB3> QUIET: Connection to board 170 closed.
[10:13:09.791] <TB3> INFO: pXar: this is the end, my friend