[15:07:04.485] <TB2> INFO: *** Welcome to pxar ***
[15:07:04.485] <TB2> INFO: *** Today: 2015/08/05
[15:07:04.485] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C15.dat
[15:07:04.487] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:07:04.487] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//defaultMaskFile.dat
[15:07:04.487] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters_C15.dat
[15:07:04.571] <TB2> INFO: clk: 4
[15:07:04.571] <TB2> INFO: ctr: 4
[15:07:04.571] <TB2> INFO: sda: 19
[15:07:04.571] <TB2> INFO: tin: 9
[15:07:04.571] <TB2> INFO: level: 15
[15:07:04.571] <TB2> INFO: triggerdelay: 0
[15:07:04.571] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[15:07:04.571] <TB2> INFO: Log level: INFO
[15:07:04.590] <TB2> INFO: Found DTB DTB_WXC55Z
[15:07:04.606] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[15:07:04.609] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[15:07:04.612] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[15:07:06.146] <TB2> INFO: DUT info:
[15:07:06.146] <TB2> INFO: The DUT currently contains the following objects:
[15:07:06.146] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:07:06.146] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:07:06.146] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:07:06.146] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:07:06.146] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.146] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.147] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.147] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.147] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.147] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:07:06.548] <TB2> INFO: enter 'restricted' command line mode
[15:07:06.548] <TB2> INFO: enter test to run
[15:07:06.548] <TB2> INFO: test: pretest no parameter change
[15:07:06.548] <TB2> INFO: running: pretest
[15:07:06.554] <TB2> INFO: ######################################################################
[15:07:06.554] <TB2> INFO: PixTestPretest::doTest()
[15:07:06.554] <TB2> INFO: ######################################################################
[15:07:06.556] <TB2> INFO: ----------------------------------------------------------------------
[15:07:06.556] <TB2> INFO: PixTestPretest::programROC()
[15:07:06.556] <TB2> INFO: ----------------------------------------------------------------------
[15:07:24.572] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:07:24.572] <TB2> INFO: IA differences per ROC: 20.1 18.5 18.5 17.7 19.3 17.7 16.9 17.7 16.9 17.7 18.5 20.1 17.7 20.1 19.3 19.3
[15:07:24.626] <TB2> INFO: ----------------------------------------------------------------------
[15:07:24.626] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:07:24.626] <TB2> INFO: ----------------------------------------------------------------------
[15:07:49.120] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 381.9 mA = 23.8688 mA/ROC
[15:07:49.123] <TB2> INFO: ----------------------------------------------------------------------
[15:07:49.123] <TB2> INFO: PixTestPretest::findWorkingPixel()
[15:07:49.123] <TB2> INFO: ----------------------------------------------------------------------
[15:07:57.870] <TB2> INFO: Test took 8742ms.
[15:07:58.188] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:07:58.206] <TB2> INFO: ----------------------------------------------------------------------
[15:07:58.206] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[15:07:58.206] <TB2> INFO: ----------------------------------------------------------------------
[15:08:06.998] <TB2> INFO: Test took 8788ms.
[15:08:07.290] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[15:08:07.290] <TB2> INFO: CalDel: 143 141 151 126 128 127 134 126 135 133 139 154 135 150 150 141
[15:08:07.290] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:08:07.294] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C0.dat
[15:08:07.294] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C1.dat
[15:08:07.294] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C2.dat
[15:08:07.295] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C3.dat
[15:08:07.295] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C4.dat
[15:08:07.295] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C5.dat
[15:08:07.295] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C6.dat
[15:08:07.295] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C7.dat
[15:08:07.296] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C8.dat
[15:08:07.296] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C9.dat
[15:08:07.296] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C10.dat
[15:08:07.296] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C11.dat
[15:08:07.296] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C12.dat
[15:08:07.297] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C13.dat
[15:08:07.297] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C14.dat
[15:08:07.297] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters_C15.dat
[15:08:07.297] <TB2> INFO: PixTestPretest::doTest() done, duration: 60 seconds
[15:08:07.393] <TB2> INFO: enter test to run
[15:08:07.393] <TB2> INFO: test: fulltest no parameter change
[15:08:07.393] <TB2> INFO: running: fulltest
[15:08:07.393] <TB2> INFO: ######################################################################
[15:08:07.393] <TB2> INFO: PixTestFullTest::doTest()
[15:08:07.393] <TB2> INFO: ######################################################################
[15:08:07.394] <TB2> INFO: ######################################################################
[15:08:07.394] <TB2> INFO: PixTestAlive::doTest()
[15:08:07.395] <TB2> INFO: ######################################################################
[15:08:07.396] <TB2> INFO: ----------------------------------------------------------------------
[15:08:07.396] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:08:07.396] <TB2> INFO: ----------------------------------------------------------------------
[15:08:10.925] <TB2> INFO: Test took 3528ms.
[15:08:10.949] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:11.159] <TB2> INFO: PixTestAlive::aliveTest() done
[15:08:11.159] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:08:11.160] <TB2> INFO: ----------------------------------------------------------------------
[15:08:11.160] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:08:11.160] <TB2> INFO: ----------------------------------------------------------------------
[15:08:13.996] <TB2> INFO: Test took 2835ms.
[15:08:13.999] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:14.000] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:08:14.212] <TB2> INFO: PixTestAlive::maskTest() done
[15:08:14.212] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:08:14.214] <TB2> INFO: ----------------------------------------------------------------------
[15:08:14.214] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:08:14.214] <TB2> INFO: ----------------------------------------------------------------------
[15:08:17.749] <TB2> INFO: Test took 3534ms.
[15:08:17.769] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:17.981] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[15:08:17.981] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:08:17.981] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[15:08:17.990] <TB2> INFO: ######################################################################
[15:08:17.990] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:08:17.990] <TB2> INFO: ######################################################################
[15:08:17.991] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[15:08:18.004] <TB2> INFO: dacScan step from 0 .. 29
[15:08:40.335] <TB2> INFO: Test took 22331ms.
[15:08:40.367] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:40.367] <TB2> INFO: dacScan step from 30 .. 59
[15:09:03.283] <TB2> INFO: Test took 22916ms.
[15:09:03.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:03.350] <TB2> INFO: dacScan step from 60 .. 89
[15:09:33.397] <TB2> INFO: Test took 30047ms.
[15:09:33.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:33.712] <TB2> INFO: dacScan step from 90 .. 119
[15:10:04.766] <TB2> INFO: Test took 31054ms.
[15:10:05.013] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:05.090] <TB2> INFO: dacScan step from 120 .. 149
[15:10:31.990] <TB2> INFO: Test took 26900ms.
[15:10:32.184] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:56.129] <TB2> INFO: PixTestBBMap::doTest() done, duration: 158 seconds
[15:10:56.130] <TB2> INFO: number of dead bumps (per ROC): 8 13 5 6 0 0 0 0 1 0 0 2 5 0 1 3
[15:10:56.130] <TB2> INFO: separation cut (per ROC): 84 101 104 93 101 104 93 91 91 93 84 91 108 98 102 94
[15:10:56.214] <TB2> INFO: ######################################################################
[15:10:56.214] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[15:10:56.214] <TB2> INFO: ######################################################################
[15:10:56.214] <TB2> INFO: ----------------------------------------------------------------------
[15:10:56.214] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[15:10:56.214] <TB2> INFO: ----------------------------------------------------------------------
[15:10:56.214] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[15:10:56.222] <TB2> INFO: dacScan step from 0 .. 3
[15:11:16.150] <TB2> INFO: Test took 19928ms.
[15:11:16.175] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:16.175] <TB2> INFO: dacScan step from 4 .. 7
[15:11:34.637] <TB2> INFO: Test took 18462ms.
[15:11:34.661] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:34.661] <TB2> INFO: dacScan step from 8 .. 11
[15:11:54.776] <TB2> INFO: Test took 20115ms.
[15:11:54.800] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:54.800] <TB2> INFO: dacScan step from 12 .. 15
[15:12:14.749] <TB2> INFO: Test took 19949ms.
[15:12:14.776] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:14.776] <TB2> INFO: dacScan step from 16 .. 19
[15:12:34.867] <TB2> INFO: Test took 20090ms.
[15:12:34.895] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:34.895] <TB2> INFO: dacScan step from 20 .. 23
[15:12:55.081] <TB2> INFO: Test took 20186ms.
[15:12:55.111] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:55.111] <TB2> INFO: dacScan step from 24 .. 27
[15:13:15.272] <TB2> INFO: Test took 20161ms.
[15:13:15.303] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:15.303] <TB2> INFO: dacScan step from 28 .. 31
[15:13:35.372] <TB2> INFO: Test took 20069ms.
[15:13:35.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:35.397] <TB2> INFO: dacScan step from 32 .. 35
[15:13:55.441] <TB2> INFO: Test took 20044ms.
[15:13:55.467] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:55.467] <TB2> INFO: dacScan step from 36 .. 39
[15:14:15.936] <TB2> INFO: Test took 20469ms.
[15:14:15.967] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:15.967] <TB2> INFO: dacScan step from 40 .. 43
[15:14:36.605] <TB2> INFO: Test took 20638ms.
[15:14:36.629] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:36.629] <TB2> INFO: dacScan step from 44 .. 47
[15:14:56.821] <TB2> INFO: Test took 20192ms.
[15:14:56.848] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:56.848] <TB2> INFO: dacScan step from 48 .. 51
[15:15:16.983] <TB2> INFO: Test took 20135ms.
[15:15:17.011] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:17.011] <TB2> INFO: dacScan step from 52 .. 55
[15:15:37.176] <TB2> INFO: Test took 20165ms.
[15:15:37.201] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:37.201] <TB2> INFO: dacScan step from 56 .. 59
[15:15:57.262] <TB2> INFO: Test took 20061ms.
[15:15:57.287] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:57.287] <TB2> INFO: dacScan step from 60 .. 63
[15:16:17.408] <TB2> INFO: Test took 20121ms.
[15:16:17.437] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:17.437] <TB2> INFO: dacScan step from 64 .. 67
[15:16:37.446] <TB2> INFO: Test took 20009ms.
[15:16:37.475] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:37.475] <TB2> INFO: dacScan step from 68 .. 71
[15:16:57.590] <TB2> INFO: Test took 20115ms.
[15:16:57.620] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:57.620] <TB2> INFO: dacScan step from 72 .. 75
[15:17:17.897] <TB2> INFO: Test took 20277ms.
[15:17:17.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:17.931] <TB2> INFO: dacScan step from 76 .. 79
[15:17:38.502] <TB2> INFO: Test took 20571ms.
[15:17:38.541] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:38.542] <TB2> INFO: dacScan step from 80 .. 83
[15:18:00.732] <TB2> INFO: Test took 22190ms.
[15:18:00.825] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:00.830] <TB2> INFO: dacScan step from 84 .. 87
[15:18:25.180] <TB2> INFO: Test took 24350ms.
[15:18:25.318] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:25.323] <TB2> INFO: dacScan step from 88 .. 91
[15:18:51.454] <TB2> INFO: Test took 26131ms.
[15:18:51.627] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:51.636] <TB2> INFO: dacScan step from 92 .. 95
[15:19:20.442] <TB2> INFO: Test took 28806ms.
[15:19:20.646] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:20.654] <TB2> INFO: dacScan step from 96 .. 99


[15:19:51.150] <TB2> INFO: Test took 30496ms.
[15:19:51.406] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:51.416] <TB2> INFO: dacScan step from 100 .. 103


[15:20:22.562] <TB2> INFO: Test took 31146ms.
[15:20:22.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:22.812] <TB2> INFO: dacScan step from 104 .. 107





[15:20:54.357] <TB2> INFO: Test took 31545ms.
[15:20:54.594] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:54.608] <TB2> INFO: dacScan step from 108 .. 111
[15:21:26.458] <TB2> INFO: Test took 31850ms.
[15:21:26.679] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:26.691] <TB2> INFO: dacScan step from 112 .. 115



[15:21:58.599] <TB2> INFO: Test took 31908ms.
[15:21:58.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:58.838] <TB2> INFO: dacScan step from 116 .. 119


[15:22:30.148] <TB2> INFO: Test took 31310ms.
[15:22:30.430] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:30.443] <TB2> INFO: dacScan step from 120 .. 123





[15:22:59.478] <TB2> INFO: Test took 29035ms.
[15:22:59.717] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:59.732] <TB2> INFO: dacScan step from 124 .. 127
[15:23:28.552] <TB2> INFO: Test took 28820ms.
[15:23:28.769] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:28.782] <TB2> INFO: dacScan step from 128 .. 131
[15:23:57.840] <TB2> INFO: Test took 29058ms.
[15:23:58.095] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:58.105] <TB2> INFO: dacScan step from 132 .. 135
[15:24:30.034] <TB2> INFO: Test took 31929ms.
[15:24:30.287] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:30.301] <TB2> INFO: dacScan step from 136 .. 139
[15:25:01.852] <TB2> INFO: Test took 31551ms.
[15:25:02.097] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:02.110] <TB2> INFO: dacScan step from 140 .. 143
[15:25:33.766] <TB2> INFO: Test took 31656ms.
[15:25:34.014] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:34.026] <TB2> INFO: dacScan step from 144 .. 147
[15:26:05.728] <TB2> INFO: Test took 31701ms.
[15:26:05.974] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:05.988] <TB2> INFO: dacScan step from 148 .. 149
[15:26:21.887] <TB2> INFO: Test took 15899ms.
[15:26:22.013] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:22.020] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:23.564] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:24.966] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:26.366] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:27.796] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:29.202] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:30.601] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:31.978] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:33.396] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:34.793] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:36.199] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:37.643] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:39.095] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:40.515] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:41.898] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:43.243] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:26:44.618] <TB2> INFO: PixTestScurves::scurves() done
[15:26:44.618] <TB2> INFO: Vcal mean: 83.29 97.27 87.97 90.75 105.54 101.73 92.37 93.15 92.09 87.04 84.93 88.34 102.26 84.94 96.09 89.97
[15:26:44.618] <TB2> INFO: Vcal RMS: 4.48 6.34 5.37 6.01 6.18 5.65 5.88 5.30 4.92 5.39 5.01 5.89 6.86 5.17 5.26 5.12
[15:26:44.618] <TB2> INFO: PixTestScurves::fullTest() done, duration: 948 seconds
[15:26:44.704] <TB2> INFO: ######################################################################
[15:26:44.704] <TB2> INFO: PixTestTrim::doTest()
[15:26:44.704] <TB2> INFO: ######################################################################
[15:26:44.705] <TB2> INFO: ----------------------------------------------------------------------
[15:26:44.705] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[15:26:44.705] <TB2> INFO: ----------------------------------------------------------------------
[15:26:44.801] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:26:44.801] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:26:44.810] <TB2> INFO: dacScan step from 0 .. 19
[15:27:00.349] <TB2> INFO: Test took 15539ms.
[15:27:00.372] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:00.372] <TB2> INFO: dacScan step from 20 .. 39
[15:27:16.042] <TB2> INFO: Test took 15670ms.
[15:27:16.063] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:16.063] <TB2> INFO: dacScan step from 40 .. 59
[15:27:31.701] <TB2> INFO: Test took 15638ms.
[15:27:31.722] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:31.722] <TB2> INFO: dacScan step from 60 .. 79
[15:27:47.356] <TB2> INFO: Test took 15634ms.
[15:27:47.383] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:47.383] <TB2> INFO: dacScan step from 80 .. 99
[15:28:03.628] <TB2> INFO: Test took 16245ms.
[15:28:03.677] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:03.683] <TB2> INFO: dacScan step from 100 .. 119
[15:28:23.665] <TB2> INFO: Test took 19982ms.
[15:28:23.839] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:23.872] <TB2> INFO: dacScan step from 120 .. 139
[15:28:44.173] <TB2> INFO: Test took 20301ms.
[15:28:44.335] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:44.369] <TB2> INFO: dacScan step from 140 .. 159
[15:29:00.593] <TB2> INFO: Test took 16224ms.
[15:29:00.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:22.337] <TB2> INFO: ROC 0 VthrComp = 86
[15:29:22.337] <TB2> INFO: ROC 1 VthrComp = 97
[15:29:22.338] <TB2> INFO: ROC 2 VthrComp = 92
[15:29:22.338] <TB2> INFO: ROC 3 VthrComp = 90
[15:29:22.338] <TB2> INFO: ROC 4 VthrComp = 101
[15:29:22.338] <TB2> INFO: ROC 5 VthrComp = 102
[15:29:22.338] <TB2> INFO: ROC 6 VthrComp = 92
[15:29:22.338] <TB2> INFO: ROC 7 VthrComp = 93
[15:29:22.338] <TB2> INFO: ROC 8 VthrComp = 95
[15:29:22.339] <TB2> INFO: ROC 9 VthrComp = 92
[15:29:22.339] <TB2> INFO: ROC 10 VthrComp = 84
[15:29:22.339] <TB2> INFO: ROC 11 VthrComp = 89
[15:29:22.339] <TB2> INFO: ROC 12 VthrComp = 99
[15:29:22.339] <TB2> INFO: ROC 13 VthrComp = 89
[15:29:22.339] <TB2> INFO: ROC 14 VthrComp = 100
[15:29:22.339] <TB2> INFO: ROC 15 VthrComp = 95
[15:29:22.339] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:29:22.339] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:29:22.350] <TB2> INFO: dacScan step from 0 .. 19
[15:29:38.058] <TB2> INFO: Test took 15708ms.
[15:29:38.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:38.082] <TB2> INFO: dacScan step from 20 .. 39
[15:29:54.078] <TB2> INFO: Test took 15996ms.
[15:29:54.113] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:54.115] <TB2> INFO: dacScan step from 40 .. 59
[15:30:13.687] <TB2> INFO: Test took 19572ms.
[15:30:13.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:13.895] <TB2> INFO: dacScan step from 60 .. 79
[15:30:35.523] <TB2> INFO: Test took 21628ms.
[15:30:35.675] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:35.723] <TB2> INFO: dacScan step from 80 .. 99
[15:30:56.896] <TB2> INFO: Test took 21173ms.
[15:30:57.077] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:57.127] <TB2> INFO: dacScan step from 100 .. 119
[15:31:17.447] <TB2> INFO: Test took 20319ms.
[15:31:17.628] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:17.687] <TB2> INFO: dacScan step from 120 .. 139
[15:31:37.743] <TB2> INFO: Test took 20055ms.
[15:31:37.923] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:37.973] <TB2> INFO: dacScan step from 140 .. 159
[15:31:59.888] <TB2> INFO: Test took 21915ms.
[15:32:00.063] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:25.820] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 55.8079 for pixel 1/13 mean/min/max = 44.1877/32.5177/55.8577
[15:32:25.821] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.7452 for pixel 23/79 mean/min/max = 46.2215/31.6701/60.7729
[15:32:25.821] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 58.6931 for pixel 23/28 mean/min/max = 46.0228/33.3473/58.6983
[15:32:25.821] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 62.1208 for pixel 4/74 mean/min/max = 47.481/32.8078/62.1541
[15:32:25.821] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 62.5345 for pixel 4/28 mean/min/max = 47.5552/32.4078/62.7027
[15:32:25.822] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.6744 for pixel 1/76 mean/min/max = 45.9423/32.1384/59.7462
[15:32:25.822] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 61.5972 for pixel 3/63 mean/min/max = 47.2935/32.9779/61.6092
[15:32:25.822] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.9684 for pixel 24/79 mean/min/max = 45.9169/32.7254/59.1084
[15:32:25.822] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 56.6857 for pixel 7/69 mean/min/max = 44.8481/32.9745/56.7216
[15:32:25.823] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.3517 for pixel 18/3 mean/min/max = 46.3076/33.2209/59.3944
[15:32:25.823] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.3809 for pixel 3/7 mean/min/max = 46.0779/33.5716/58.5842
[15:32:25.823] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 60.5148 for pixel 21/76 mean/min/max = 46.805/33.095/60.5149
[15:32:25.823] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 62.825 for pixel 24/74 mean/min/max = 47.1154/31.2476/62.9833
[15:32:25.823] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 57.8054 for pixel 20/75 mean/min/max = 45.7699/33.6427/57.8972
[15:32:25.824] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 58.682 for pixel 0/78 mean/min/max = 45.4119/32.1355/58.6883
[15:32:25.824] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.3091 for pixel 51/1 mean/min/max = 44.8477/32.3134/57.3819
[15:32:25.824] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:06.598] <TB2> INFO: Test took 100774ms.
[15:34:07.975] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:34:07.984] <TB2> INFO: dacScan step from 0 .. 19
[15:34:30.343] <TB2> INFO: Test took 22359ms.
[15:34:30.391] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:30.393] <TB2> INFO: dacScan step from 20 .. 39
[15:35:00.926] <TB2> INFO: Test took 30533ms.
[15:35:01.150] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:01.183] <TB2> INFO: dacScan step from 40 .. 59





[15:35:36.812] <TB2> INFO: Test took 35629ms.
[15:35:37.170] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:37.222] <TB2> INFO: dacScan step from 60 .. 79





[15:36:13.822] <TB2> INFO: Test took 36600ms.
[15:36:14.115] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:14.169] <TB2> INFO: dacScan step from 80 .. 99





[15:36:49.818] <TB2> INFO: Test took 35649ms.
[15:36:50.095] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:50.149] <TB2> INFO: dacScan step from 100 .. 119





[15:37:23.332] <TB2> INFO: Test took 33183ms.
[15:37:23.656] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:23.719] <TB2> INFO: dacScan step from 120 .. 139



[15:37:56.989] <TB2> INFO: Test took 33269ms.
[15:37:57.273] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:57.329] <TB2> INFO: dacScan step from 140 .. 159


[15:38:32.813] <TB2> INFO: Test took 35484ms.
[15:38:33.127] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:33.187] <TB2> INFO: dacScan step from 160 .. 179



[15:39:09.015] <TB2> INFO: Test took 35828ms.
[15:39:09.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:09.352] <TB2> INFO: dacScan step from 180 .. 199





[15:39:45.990] <TB2> INFO: Test took 36638ms.
[15:39:46.260] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:10.861] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.021583 .. 255.000000
[15:40:10.938] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[15:40:10.946] <TB2> INFO: dacScan step from 0 .. 19
[15:40:24.882] <TB2> INFO: Test took 13936ms.
[15:40:24.910] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:24.910] <TB2> INFO: dacScan step from 20 .. 39
[15:40:40.428] <TB2> INFO: Test took 15518ms.
[15:40:40.507] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:40.523] <TB2> INFO: dacScan step from 40 .. 59
[15:40:59.121] <TB2> INFO: Test took 18598ms.
[15:40:59.265] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:59.313] <TB2> INFO: dacScan step from 60 .. 79
[15:41:18.217] <TB2> INFO: Test took 18904ms.
[15:41:18.350] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:18.402] <TB2> INFO: dacScan step from 80 .. 99
[15:41:35.680] <TB2> INFO: Test took 17278ms.
[15:41:35.825] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:35.880] <TB2> INFO: dacScan step from 100 .. 119
[15:41:54.474] <TB2> INFO: Test took 18594ms.
[15:41:54.628] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:54.677] <TB2> INFO: dacScan step from 120 .. 139
[15:42:13.262] <TB2> INFO: Test took 18585ms.
[15:42:13.420] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:13.473] <TB2> INFO: dacScan step from 140 .. 159
[15:42:32.144] <TB2> INFO: Test took 18671ms.
[15:42:32.290] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:32.335] <TB2> INFO: dacScan step from 160 .. 179
[15:42:51.086] <TB2> INFO: Test took 18751ms.
[15:42:51.245] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:51.289] <TB2> INFO: dacScan step from 180 .. 199
[15:43:10.855] <TB2> INFO: Test took 19566ms.
[15:43:10.998] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:43:11.052] <TB2> INFO: dacScan step from 200 .. 219
[15:43:29.827] <TB2> INFO: Test took 18775ms.
[15:43:29.964] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:43:30.013] <TB2> INFO: dacScan step from 220 .. 239
[15:43:48.880] <TB2> INFO: Test took 18867ms.
[15:43:49.046] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:43:49.101] <TB2> INFO: dacScan step from 240 .. 255
[15:44:04.341] <TB2> INFO: Test took 15240ms.
[15:44:04.473] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:40.617] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 12.007607 .. 44.831070
[15:44:40.712] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 54 (20) hits flags = 16 (plus default)
[15:44:40.721] <TB2> INFO: dacScan step from 2 .. 21
[15:44:54.825] <TB2> INFO: Test took 14104ms.
[15:44:54.850] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:54.879] <TB2> INFO: dacScan step from 22 .. 41
[15:45:10.721] <TB2> INFO: Test took 15842ms.
[15:45:10.826] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:45:10.846] <TB2> INFO: dacScan step from 42 .. 54
[15:45:23.925] <TB2> INFO: Test took 13079ms.
[15:45:24.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:45:41.388] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 17.707760 .. 42.376869
[15:45:41.477] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 52 (20) hits flags = 16 (plus default)
[15:45:41.485] <TB2> INFO: dacScan step from 7 .. 26
[15:45:55.525] <TB2> INFO: Test took 14039ms.
[15:45:55.543] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:45:55.543] <TB2> INFO: dacScan step from 27 .. 46
[15:46:12.568] <TB2> INFO: Test took 17025ms.
[15:46:12.697] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:46:12.729] <TB2> INFO: dacScan step from 47 .. 52
[15:46:20.276] <TB2> INFO: Test took 7547ms.
[15:46:20.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:46:35.147] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.988692 .. 41.705034
[15:46:35.222] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 51 (20) hits flags = 16 (plus default)
[15:46:35.230] <TB2> INFO: dacScan step from 1 .. 20
[15:46:49.275] <TB2> INFO: Test took 14045ms.
[15:46:49.300] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:46:49.300] <TB2> INFO: dacScan step from 21 .. 40
[15:47:04.921] <TB2> INFO: Test took 15621ms.
[15:47:05.005] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:47:05.023] <TB2> INFO: dacScan step from 41 .. 51
[15:47:15.853] <TB2> INFO: Test took 10830ms.
[15:47:15.944] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:47:30.565] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:47:30.565] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[15:47:30.576] <TB2> INFO: dacScan step from 15 .. 34
[15:47:55.096] <TB2> INFO: Test took 24520ms.
[15:47:55.172] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:47:55.182] <TB2> INFO: dacScan step from 35 .. 54
[15:48:30.326] <TB2> INFO: Test took 35144ms.
[15:48:30.632] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:48:30.679] <TB2> INFO: dacScan step from 55 .. 55
[15:48:35.132] <TB2> INFO: Test took 4454ms.
[15:48:35.155] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:48:49.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:48:49.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:48:49.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:48:49.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:48:49.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:48:49.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:48:49.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:48:49.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:48:49.365] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C0.dat
[15:48:49.373] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C1.dat
[15:48:49.382] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C2.dat
[15:48:49.391] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C3.dat
[15:48:49.400] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C4.dat
[15:48:49.408] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C5.dat
[15:48:49.416] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C6.dat
[15:48:49.425] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C7.dat
[15:48:49.433] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C8.dat
[15:48:49.441] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C9.dat
[15:48:49.450] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C10.dat
[15:48:49.458] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C11.dat
[15:48:49.466] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C12.dat
[15:48:49.475] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C13.dat
[15:48:49.483] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C14.dat
[15:48:49.491] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//trimParameters35_C15.dat
[15:48:49.499] <TB2> INFO: PixTestTrim::trimTest() done
[15:48:49.499] <TB2> INFO: vtrim: 108 96 101 123 113 118 110 102 104 204 106 121 125 118 113 96
[15:48:49.499] <TB2> INFO: vthrcomp: 86 97 92 90 101 102 92 93 95 92 84 89 99 89 100 95
[15:48:49.499] <TB2> INFO: vcal mean: 35.07 35.05 35.09 35.06 35.02 35.05 35.15 35.06 35.09 34.97 35.10 35.11 35.08 35.04 35.05 35.09
[15:48:49.499] <TB2> INFO: vcal RMS: 1.07 1.06 1.03 1.05 1.30 1.20 1.07 1.15 0.99 2.21 1.03 3.57 1.23 0.98 0.96 0.95
[15:48:49.499] <TB2> INFO: bits mean: 10.37 9.10 9.51 9.56 9.67 10.04 9.25 9.96 9.75 11.82 9.72 9.51 9.60 9.91 9.64 9.24
[15:48:49.499] <TB2> INFO: bits RMS: 2.32 2.99 2.50 2.46 2.45 2.47 2.61 2.44 2.49 1.48 2.42 2.50 2.64 2.30 2.64 2.92
[15:48:49.506] <TB2> INFO: ----------------------------------------------------------------------
[15:48:49.506] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[15:48:49.506] <TB2> INFO: ----------------------------------------------------------------------
[15:48:49.507] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:48:49.515] <TB2> INFO: dacScan step from 0 .. 19
[15:49:13.320] <TB2> INFO: Test took 23805ms.
[15:49:13.358] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:49:13.358] <TB2> INFO: dacScan step from 20 .. 39
[15:49:37.245] <TB2> INFO: Test took 23887ms.
[15:49:37.288] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:49:37.288] <TB2> INFO: dacScan step from 40 .. 59
[15:50:01.131] <TB2> INFO: Test took 23843ms.
[15:50:01.166] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:01.167] <TB2> INFO: dacScan step from 60 .. 79
[15:50:24.927] <TB2> INFO: Test took 23760ms.
[15:50:24.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:24.968] <TB2> INFO: dacScan step from 80 .. 99
[15:50:49.089] <TB2> INFO: Test took 24121ms.
[15:50:49.133] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:49.133] <TB2> INFO: dacScan step from 100 .. 119
[15:51:16.154] <TB2> INFO: Test took 27021ms.
[15:51:16.295] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:51:16.314] <TB2> INFO: dacScan step from 120 .. 139
[15:51:50.827] <TB2> INFO: Test took 34513ms.
[15:51:51.107] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:51:51.142] <TB2> INFO: dacScan step from 140 .. 159


[15:52:25.721] <TB2> INFO: Test took 34579ms.
[15:52:25.995] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:52:26.067] <TB2> INFO: dacScan step from 160 .. 179
[15:52:58.905] <TB2> INFO: Test took 32838ms.
[15:52:59.190] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:52:59.254] <TB2> INFO: dacScan step from 180 .. 199
[15:53:32.587] <TB2> INFO: Test took 33333ms.
[15:53:32.878] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:53:58.625] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 178 (20) hits flags = 16 (plus default)
[15:53:58.633] <TB2> INFO: dacScan step from 0 .. 19
[15:54:22.436] <TB2> INFO: Test took 23802ms.
[15:54:22.478] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:54:22.478] <TB2> INFO: dacScan step from 20 .. 39
[15:54:44.579] <TB2> INFO: Test took 22101ms.
[15:54:44.616] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:54:44.616] <TB2> INFO: dacScan step from 40 .. 59
[15:55:08.268] <TB2> INFO: Test took 23651ms.
[15:55:08.303] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:55:08.303] <TB2> INFO: dacScan step from 60 .. 79
[15:55:31.945] <TB2> INFO: Test took 23641ms.
[15:55:31.981] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:55:31.981] <TB2> INFO: dacScan step from 80 .. 99
[15:55:56.041] <TB2> INFO: Test took 24060ms.
[15:55:56.106] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:55:56.109] <TB2> INFO: dacScan step from 100 .. 119
[15:56:27.422] <TB2> INFO: Test took 31313ms.
[15:56:27.686] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:56:27.711] <TB2> INFO: dacScan step from 120 .. 139





[15:57:02.337] <TB2> INFO: Test took 34626ms.
[15:57:02.658] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:57:02.711] <TB2> INFO: dacScan step from 140 .. 159
[15:57:37.691] <TB2> INFO: Test took 34980ms.
[15:57:37.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:57:38.028] <TB2> INFO: dacScan step from 160 .. 178
[15:58:11.980] <TB2> INFO: Test took 33952ms.
[15:58:12.250] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:39.403] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 162 (20) hits flags = 16 (plus default)
[15:58:39.411] <TB2> INFO: dacScan step from 0 .. 19
[15:59:01.519] <TB2> INFO: Test took 22108ms.
[15:59:01.557] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:59:01.557] <TB2> INFO: dacScan step from 20 .. 39
[15:59:24.558] <TB2> INFO: Test took 23001ms.
[15:59:24.598] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:59:24.598] <TB2> INFO: dacScan step from 40 .. 59
[15:59:47.541] <TB2> INFO: Test took 22943ms.
[15:59:47.578] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:59:47.578] <TB2> INFO: dacScan step from 60 .. 79
[16:00:09.709] <TB2> INFO: Test took 22131ms.
[16:00:09.742] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:09.742] <TB2> INFO: dacScan step from 80 .. 99
[16:00:34.017] <TB2> INFO: Test took 24275ms.
[16:00:34.076] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:34.080] <TB2> INFO: dacScan step from 100 .. 119
[16:01:05.484] <TB2> INFO: Test took 31404ms.
[16:01:05.746] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:01:05.771] <TB2> INFO: dacScan step from 120 .. 139





[16:01:38.802] <TB2> INFO: Test took 33031ms.
[16:01:39.123] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:01:39.170] <TB2> INFO: dacScan step from 140 .. 159
[16:02:14.619] <TB2> INFO: Test took 35449ms.
[16:02:14.904] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:14.949] <TB2> INFO: dacScan step from 160 .. 162
[16:02:22.704] <TB2> INFO: Test took 7755ms.
[16:02:22.745] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:45.891] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 162 (20) hits flags = 16 (plus default)
[16:02:45.899] <TB2> INFO: dacScan step from 0 .. 19
[16:03:09.697] <TB2> INFO: Test took 23798ms.
[16:03:09.733] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:09.733] <TB2> INFO: dacScan step from 20 .. 39
[16:03:33.202] <TB2> INFO: Test took 23469ms.
[16:03:33.238] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:33.238] <TB2> INFO: dacScan step from 40 .. 59
[16:03:55.744] <TB2> INFO: Test took 22506ms.
[16:03:55.788] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:55.788] <TB2> INFO: dacScan step from 60 .. 79
[16:04:19.586] <TB2> INFO: Test took 23797ms.
[16:04:19.622] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:04:19.622] <TB2> INFO: dacScan step from 80 .. 99
[16:04:44.211] <TB2> INFO: Test took 24589ms.
[16:04:44.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:04:44.278] <TB2> INFO: dacScan step from 100 .. 119
[16:05:13.203] <TB2> INFO: Test took 28925ms.
[16:05:13.428] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:05:13.455] <TB2> INFO: dacScan step from 120 .. 139


[16:05:48.371] <TB2> INFO: Test took 34916ms.
[16:05:48.684] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:05:48.735] <TB2> INFO: dacScan step from 140 .. 159





[16:06:24.570] <TB2> INFO: Test took 35835ms.
[16:06:24.907] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:24.956] <TB2> INFO: dacScan step from 160 .. 162
[16:06:32.684] <TB2> INFO: Test took 7728ms.
[16:06:32.736] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:55.703] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 162 (20) hits flags = 16 (plus default)
[16:06:55.712] <TB2> INFO: dacScan step from 0 .. 19
[16:07:19.633] <TB2> INFO: Test took 23921ms.
[16:07:19.669] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:07:19.669] <TB2> INFO: dacScan step from 20 .. 39
[16:07:43.257] <TB2> INFO: Test took 23588ms.
[16:07:43.294] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:07:43.294] <TB2> INFO: dacScan step from 40 .. 59
[16:08:06.067] <TB2> INFO: Test took 22773ms.
[16:08:06.101] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:08:06.102] <TB2> INFO: dacScan step from 60 .. 79
[16:08:29.923] <TB2> INFO: Test took 23821ms.
[16:08:29.956] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:08:29.956] <TB2> INFO: dacScan step from 80 .. 99
[16:08:54.253] <TB2> INFO: Test took 24297ms.
[16:08:54.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:08:54.310] <TB2> INFO: dacScan step from 100 .. 119
[16:09:25.791] <TB2> INFO: Test took 31481ms.
[16:09:26.037] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:26.061] <TB2> INFO: dacScan step from 120 .. 139


[16:10:01.405] <TB2> INFO: Test took 35344ms.
[16:10:01.714] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:10:01.763] <TB2> INFO: dacScan step from 140 .. 159





[16:10:36.700] <TB2> INFO: Test took 34937ms.
[16:10:37.030] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:10:37.084] <TB2> INFO: dacScan step from 160 .. 162
[16:10:44.283] <TB2> INFO: Test took 7199ms.
[16:10:44.331] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:05.905] <TB2> INFO: PixTestTrim::trimBitTest() done
[16:11:05.906] <TB2> INFO: PixTestTrim::doTest() done, duration: 2661 seconds
[16:11:06.672] <TB2> INFO: ######################################################################
[16:11:06.672] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:11:06.672] <TB2> INFO: ######################################################################
[16:11:10.268] <TB2> INFO: Test took 3595ms.
[16:11:10.291] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:13.970] <TB2> INFO: Test took 3482ms.
[16:11:14.045] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:17.624] <TB2> INFO: Test took 3572ms.
[16:11:17.710] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:17.717] <TB2> INFO: The DUT currently contains the following objects:
[16:11:17.717] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:17.717] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:17.717] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:17.717] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:17.717] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:17.717] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.830] <TB2> INFO: Test took 1113ms.
[16:11:18.831] <TB2> INFO: The DUT currently contains the following objects:
[16:11:18.831] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:18.831] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:18.831] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:18.831] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:18.831] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:18.831] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.943] <TB2> INFO: Test took 1111ms.
[16:11:19.945] <TB2> INFO: The DUT currently contains the following objects:
[16:11:19.945] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:19.945] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:19.945] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:19.945] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:19.945] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:19.945] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.059] <TB2> INFO: Test took 1114ms.
[16:11:21.060] <TB2> INFO: The DUT currently contains the following objects:
[16:11:21.060] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:21.060] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:21.060] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:21.060] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:21.060] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:21.060] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.173] <TB2> INFO: Test took 1113ms.
[16:11:22.174] <TB2> INFO: The DUT currently contains the following objects:
[16:11:22.174] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:22.174] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:22.174] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:22.174] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:22.175] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:22.175] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.286] <TB2> INFO: Test took 1111ms.
[16:11:23.287] <TB2> INFO: The DUT currently contains the following objects:
[16:11:23.287] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:23.287] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:23.287] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:23.287] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:23.287] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.287] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.287] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.287] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.287] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:23.288] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.393] <TB2> INFO: Test took 1105ms.
[16:11:24.394] <TB2> INFO: The DUT currently contains the following objects:
[16:11:24.394] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:24.394] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:24.394] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:24.394] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:24.394] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.394] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.395] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:24.395] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.507] <TB2> INFO: Test took 1112ms.
[16:11:25.508] <TB2> INFO: The DUT currently contains the following objects:
[16:11:25.508] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:25.508] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:25.508] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:25.508] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:25.508] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.508] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.508] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.508] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.508] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.508] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:25.509] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.621] <TB2> INFO: Test took 1112ms.
[16:11:26.622] <TB2> INFO: The DUT currently contains the following objects:
[16:11:26.622] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:26.622] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:26.622] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:26.622] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:26.622] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.622] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.623] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:26.623] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.734] <TB2> INFO: Test took 1111ms.
[16:11:27.735] <TB2> INFO: The DUT currently contains the following objects:
[16:11:27.745] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:27.745] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:27.745] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:27.745] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:27.745] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.745] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.746] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.747] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.747] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.747] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:27.747] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.847] <TB2> INFO: Test took 1100ms.
[16:11:28.848] <TB2> INFO: The DUT currently contains the following objects:
[16:11:28.848] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:28.848] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:28.848] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:28.848] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:28.848] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:28.848] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.961] <TB2> INFO: Test took 1113ms.
[16:11:29.963] <TB2> INFO: The DUT currently contains the following objects:
[16:11:29.963] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:29.963] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:29.963] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:29.963] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:29.963] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:29.963] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.077] <TB2> INFO: Test took 1114ms.
[16:11:31.078] <TB2> INFO: The DUT currently contains the following objects:
[16:11:31.078] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:31.078] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:31.078] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:31.078] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:31.078] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:31.078] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.191] <TB2> INFO: Test took 1113ms.
[16:11:32.192] <TB2> INFO: The DUT currently contains the following objects:
[16:11:32.192] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:32.192] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:32.192] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:32.192] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:32.192] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.192] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.192] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.192] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.192] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.192] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:32.193] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.305] <TB2> INFO: Test took 1112ms.
[16:11:33.306] <TB2> INFO: The DUT currently contains the following objects:
[16:11:33.306] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:33.306] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:33.306] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:33.306] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:33.306] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:33.306] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.418] <TB2> INFO: Test took 1112ms.
[16:11:34.419] <TB2> INFO: The DUT currently contains the following objects:
[16:11:34.419] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:11:34.419] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:11:34.419] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:11:34.419] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:11:34.419] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:34.419] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:11:35.531] <TB2> INFO: Test took 1112ms.
[16:11:35.534] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:15:33.669] <TB2> INFO: Test took 238135ms.
[16:15:35.250] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:34.782] <TB2> INFO: Test took 239532ms.
[16:19:36.629] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.637] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.646] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.654] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:19:36.663] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.671] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.679] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.688] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.696] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.703] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.710] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.718] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.727] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.735] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.744] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.752] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.761] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:19:36.785] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:19:36.785] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:19:36.785] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:19:36.785] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:19:36.785] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:19:36.785] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:19:36.786] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:19:36.787] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:19:40.338] <TB2> INFO: Test took 3550ms.
[16:19:44.174] <TB2> INFO: Test took 3574ms.
[16:19:48.010] <TB2> INFO: Test took 3552ms.
[16:19:48.296] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:49.222] <TB2> INFO: Test took 927ms.
[16:19:49.224] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:50.335] <TB2> INFO: Test took 1111ms.
[16:19:50.337] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:51.453] <TB2> INFO: Test took 1116ms.
[16:19:51.455] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:52.568] <TB2> INFO: Test took 1113ms.
[16:19:52.570] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:53.683] <TB2> INFO: Test took 1113ms.
[16:19:53.685] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:54.799] <TB2> INFO: Test took 1114ms.
[16:19:54.801] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:55.914] <TB2> INFO: Test took 1113ms.
[16:19:55.916] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:57.029] <TB2> INFO: Test took 1113ms.
[16:19:57.032] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:58.146] <TB2> INFO: Test took 1114ms.
[16:19:58.148] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:59.260] <TB2> INFO: Test took 1112ms.
[16:19:59.263] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:00.377] <TB2> INFO: Test took 1114ms.
[16:20:00.379] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:01.489] <TB2> INFO: Test took 1110ms.
[16:20:01.491] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:02.604] <TB2> INFO: Test took 1113ms.
[16:20:02.607] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:03.719] <TB2> INFO: Test took 1112ms.
[16:20:03.722] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:04.835] <TB2> INFO: Test took 1113ms.
[16:20:04.837] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:05.950] <TB2> INFO: Test took 1113ms.
[16:20:05.952] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:07.065] <TB2> INFO: Test took 1113ms.
[16:20:07.068] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:08.180] <TB2> INFO: Test took 1112ms.
[16:20:08.183] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:09.296] <TB2> INFO: Test took 1114ms.
[16:20:09.299] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:10.412] <TB2> INFO: Test took 1113ms.
[16:20:10.414] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:11.528] <TB2> INFO: Test took 1114ms.
[16:20:11.530] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:12.643] <TB2> INFO: Test took 1113ms.
[16:20:12.646] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:13.758] <TB2> INFO: Test took 1113ms.
[16:20:13.761] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:14.874] <TB2> INFO: Test took 1113ms.
[16:20:14.876] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:15.989] <TB2> INFO: Test took 1113ms.
[16:20:15.992] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:17.105] <TB2> INFO: Test took 1113ms.
[16:20:17.107] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:18.220] <TB2> INFO: Test took 1113ms.
[16:20:18.223] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:19.336] <TB2> INFO: Test took 1113ms.
[16:20:19.339] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:20.452] <TB2> INFO: Test took 1113ms.
[16:20:20.454] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:21.561] <TB2> INFO: Test took 1107ms.
[16:20:21.562] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:22.675] <TB2> INFO: Test took 1113ms.
[16:20:22.678] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:20:23.791] <TB2> INFO: Test took 1113ms.
[16:20:24.317] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 557 seconds
[16:20:24.317] <TB2> INFO: PH scale (per ROC): 80 74 79 71 66 74 75 79 77 81 67 74 69 82 75 74
[16:20:24.317] <TB2> INFO: PH offset (per ROC): 156 171 174 177 176 178 175 173 167 160 178 190 181 175 178 163
[16:20:24.527] <TB2> INFO: ######################################################################
[16:20:24.527] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:20:24.527] <TB2> INFO: ######################################################################
[16:20:24.536] <TB2> INFO: scanning low vcal = 10
[16:20:28.530] <TB2> INFO: Test took 3994ms.
[16:20:28.535] <TB2> INFO: scanning low vcal = 20
[16:20:32.493] <TB2> INFO: Test took 3958ms.
[16:20:32.497] <TB2> INFO: scanning low vcal = 30
[16:20:36.486] <TB2> INFO: Test took 3989ms.
[16:20:36.497] <TB2> INFO: scanning low vcal = 40
[16:20:40.804] <TB2> INFO: Test took 4307ms.
[16:20:40.869] <TB2> INFO: scanning low vcal = 50
[16:20:45.174] <TB2> INFO: Test took 4305ms.
[16:20:45.230] <TB2> INFO: scanning low vcal = 60
[16:20:49.529] <TB2> INFO: Test took 4299ms.
[16:20:49.591] <TB2> INFO: scanning low vcal = 70
[16:20:53.900] <TB2> INFO: Test took 4309ms.
[16:20:53.963] <TB2> INFO: scanning low vcal = 80
[16:20:58.338] <TB2> INFO: Test took 4375ms.
[16:20:58.407] <TB2> INFO: scanning low vcal = 90
[16:21:02.881] <TB2> INFO: Test took 4474ms.
[16:21:02.951] <TB2> INFO: scanning low vcal = 100
[16:21:07.435] <TB2> INFO: Test took 4484ms.
[16:21:07.519] <TB2> INFO: scanning low vcal = 110
[16:21:11.955] <TB2> INFO: Test took 4436ms.
[16:21:12.039] <TB2> INFO: scanning low vcal = 120
[16:21:16.499] <TB2> INFO: Test took 4460ms.
[16:21:16.563] <TB2> INFO: scanning low vcal = 130
[16:21:21.058] <TB2> INFO: Test took 4495ms.
[16:21:21.140] <TB2> INFO: scanning low vcal = 140
[16:21:25.618] <TB2> INFO: Test took 4478ms.
[16:21:25.681] <TB2> INFO: scanning low vcal = 150
[16:21:30.168] <TB2> INFO: Test took 4487ms.
[16:21:30.234] <TB2> INFO: scanning low vcal = 160
[16:21:34.697] <TB2> INFO: Test took 4463ms.
[16:21:34.756] <TB2> INFO: scanning low vcal = 170
[16:21:39.189] <TB2> INFO: Test took 4433ms.
[16:21:39.271] <TB2> INFO: scanning low vcal = 180
[16:21:43.730] <TB2> INFO: Test took 4459ms.
[16:21:43.788] <TB2> INFO: scanning low vcal = 190
[16:21:48.358] <TB2> INFO: Test took 4570ms.
[16:21:48.436] <TB2> INFO: scanning low vcal = 200
[16:21:52.905] <TB2> INFO: Test took 4469ms.
[16:21:52.972] <TB2> INFO: scanning low vcal = 210
[16:21:57.427] <TB2> INFO: Test took 4455ms.
[16:21:57.487] <TB2> INFO: scanning low vcal = 220
[16:22:01.919] <TB2> INFO: Test took 4432ms.
[16:22:01.989] <TB2> INFO: scanning low vcal = 230
[16:22:06.437] <TB2> INFO: Test took 4448ms.
[16:22:06.499] <TB2> INFO: scanning low vcal = 240
[16:22:10.922] <TB2> INFO: Test took 4423ms.
[16:22:10.997] <TB2> INFO: scanning low vcal = 250
[16:22:15.411] <TB2> INFO: Test took 4414ms.
[16:22:15.483] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[16:22:19.905] <TB2> INFO: Test took 4422ms.
[16:22:19.972] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[16:22:24.373] <TB2> INFO: Test took 4401ms.
[16:22:24.439] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[16:22:28.772] <TB2> INFO: Test took 4333ms.
[16:22:28.842] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[16:22:33.144] <TB2> INFO: Test took 4302ms.
[16:22:33.212] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:22:37.515] <TB2> INFO: Test took 4303ms.
[16:22:38.108] <TB2> INFO: PixTestGainPedestal::measure() done
[16:23:12.688] <TB2> INFO: PixTestGainPedestal::fit() done
[16:23:12.688] <TB2> INFO: non-linearity mean: 0.956 0.959 0.961 0.962 0.959 0.956 0.957 0.961 0.951 0.960 0.956 0.961 0.963 0.959 0.958 0.958
[16:23:12.688] <TB2> INFO: non-linearity RMS: 0.006 0.007 0.006 0.006 0.007 0.008 0.007 0.007 0.006 0.010 0.007 0.007 0.006 0.005 0.006 0.006
[16:23:12.688] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:23:12.709] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:23:12.729] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:23:12.749] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:23:12.767] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:23:12.787] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:23:12.808] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:23:12.828] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:23:12.847] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:23:12.867] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:23:12.888] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:23:12.910] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:23:12.931] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:23:12.953] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:23:12.971] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:23:12.993] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:23:13.013] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[16:23:13.019] <TB2> INFO: enter test to run
[16:23:13.021] <TB2> INFO: test: exit no parameter change
[16:23:13.496] <TB2> QUIET: Connection to board 156 closed.
[16:23:13.512] <TB2> INFO: pXar: this is the end, my friend