[12:24:28.012] <TB2> INFO: *** Welcome to pxar ***
[12:24:28.012] <TB2> INFO: *** Today: 2015/08/05
[12:24:28.012] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C15.dat
[12:24:28.013] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:24:28.013] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//defaultMaskFile.dat
[12:24:28.013] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters_C15.dat
[12:24:28.082] <TB2> INFO: clk: 4
[12:24:28.082] <TB2> INFO: ctr: 4
[12:24:28.082] <TB2> INFO: sda: 19
[12:24:28.082] <TB2> INFO: tin: 9
[12:24:28.082] <TB2> INFO: level: 15
[12:24:28.082] <TB2> INFO: triggerdelay: 0
[12:24:28.082] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[12:24:28.082] <TB2> INFO: Log level: INFO
[12:24:28.099] <TB2> INFO: Found DTB DTB_WXC55Z
[12:24:28.113] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[12:24:28.116] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[12:24:28.119] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[12:24:29.658] <TB2> INFO: DUT info:
[12:24:29.658] <TB2> INFO: The DUT currently contains the following objects:
[12:24:29.658] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:24:29.658] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:24:29.658] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:24:29.658] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:24:29.658] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:29.658] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:30.059] <TB2> INFO: enter 'restricted' command line mode
[12:24:30.059] <TB2> INFO: enter test to run
[12:24:30.059] <TB2> INFO: test: pretest no parameter change
[12:24:30.060] <TB2> INFO: running: pretest
[12:24:30.065] <TB2> INFO: ######################################################################
[12:24:30.065] <TB2> INFO: PixTestPretest::doTest()
[12:24:30.065] <TB2> INFO: ######################################################################
[12:24:30.067] <TB2> INFO: ----------------------------------------------------------------------
[12:24:30.067] <TB2> INFO: PixTestPretest::programROC()
[12:24:30.067] <TB2> INFO: ----------------------------------------------------------------------
[12:24:48.082] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:24:48.082] <TB2> INFO: IA differences per ROC: 20.1 17.7 17.7 16.9 19.3 17.7 16.1 16.9 16.1 16.9 18.5 20.1 17.7 20.1 18.5 18.5
[12:24:48.139] <TB2> INFO: ----------------------------------------------------------------------
[12:24:48.139] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:24:48.139] <TB2> INFO: ----------------------------------------------------------------------
[12:25:17.548] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 377 mA = 23.5625 mA/ROC
[12:25:17.551] <TB2> INFO: ----------------------------------------------------------------------
[12:25:17.560] <TB2> INFO: PixTestPretest::findWorkingPixel()
[12:25:17.560] <TB2> INFO: ----------------------------------------------------------------------
[12:25:26.333] <TB2> INFO: Test took 8768ms.
[12:25:26.630] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:25:26.650] <TB2> INFO: ----------------------------------------------------------------------
[12:25:26.650] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[12:25:26.650] <TB2> INFO: ----------------------------------------------------------------------
[12:25:35.190] <TB2> INFO: Test took 8535ms.
[12:25:35.477] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[12:25:35.477] <TB2> INFO: CalDel: 149 147 162 132 134 134 142 132 142 140 144 162 142 159 159 146
[12:25:35.477] <TB2> INFO: VthrComp: 51 51 51 51 52 51 51 51 51 51 51 51 51 51 51 51
[12:25:35.481] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C0.dat
[12:25:35.482] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C1.dat
[12:25:35.482] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C2.dat
[12:25:35.482] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C3.dat
[12:25:35.482] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C4.dat
[12:25:35.482] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C5.dat
[12:25:35.482] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C6.dat
[12:25:35.483] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C7.dat
[12:25:35.483] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C8.dat
[12:25:35.483] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C9.dat
[12:25:35.483] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C10.dat
[12:25:35.483] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C11.dat
[12:25:35.484] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C12.dat
[12:25:35.484] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C13.dat
[12:25:35.484] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C14.dat
[12:25:35.484] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C15.dat
[12:25:35.484] <TB2> INFO: PixTestPretest::doTest() done, duration: 65 seconds
[12:25:35.575] <TB2> INFO: enter test to run
[12:25:35.576] <TB2> INFO: test: fulltest no parameter change
[12:25:35.576] <TB2> INFO: running: fulltest
[12:25:35.576] <TB2> INFO: ######################################################################
[12:25:35.576] <TB2> INFO: PixTestFullTest::doTest()
[12:25:35.576] <TB2> INFO: ######################################################################
[12:25:35.577] <TB2> INFO: ######################################################################
[12:25:35.577] <TB2> INFO: PixTestAlive::doTest()
[12:25:35.577] <TB2> INFO: ######################################################################
[12:25:35.579] <TB2> INFO: ----------------------------------------------------------------------
[12:25:35.579] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:35.579] <TB2> INFO: ----------------------------------------------------------------------
[12:25:39.107] <TB2> INFO: Test took 3528ms.
[12:25:39.129] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:39.338] <TB2> INFO: PixTestAlive::aliveTest() done
[12:25:39.338] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:39.340] <TB2> INFO: ----------------------------------------------------------------------
[12:25:39.340] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:39.340] <TB2> INFO: ----------------------------------------------------------------------
[12:25:42.176] <TB2> INFO: Test took 2835ms.
[12:25:42.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:42.179] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:25:42.391] <TB2> INFO: PixTestAlive::maskTest() done
[12:25:42.391] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:42.393] <TB2> INFO: ----------------------------------------------------------------------
[12:25:42.393] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:42.393] <TB2> INFO: ----------------------------------------------------------------------
[12:25:45.948] <TB2> INFO: Test took 3554ms.
[12:25:45.969] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:46.180] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[12:25:46.180] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:46.181] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[12:25:46.194] <TB2> INFO: ######################################################################
[12:25:46.194] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:25:46.194] <TB2> INFO: ######################################################################
[12:25:46.195] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:25:46.211] <TB2> INFO: dacScan step from 0 .. 29
[12:26:08.485] <TB2> INFO: Test took 22274ms.
[12:26:08.516] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:08.516] <TB2> INFO: dacScan step from 30 .. 59
[12:26:32.834] <TB2> INFO: Test took 24318ms.
[12:26:32.946] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:32.961] <TB2> INFO: dacScan step from 60 .. 89
[12:27:03.605] <TB2> INFO: Test took 30644ms.
[12:27:03.866] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:03.935] <TB2> INFO: dacScan step from 90 .. 119
[12:27:34.445] <TB2> INFO: Test took 30510ms.
[12:27:34.690] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:34.763] <TB2> INFO: dacScan step from 120 .. 149
[12:28:00.219] <TB2> INFO: Test took 25456ms.
[12:28:00.386] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:23.113] <TB2> INFO: PixTestBBMap::doTest() done, duration: 156 seconds
[12:28:23.113] <TB2> INFO: number of dead bumps (per ROC): 8 13 4 5 0 0 0 0 1 0 0 2 7 1 1 3
[12:28:23.113] <TB2> INFO: separation cut (per ROC): 77 83 90 77 110 104 85 85 83 70 76 101 93 88 77 87
[12:28:23.186] <TB2> INFO: ######################################################################
[12:28:23.186] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[12:28:23.187] <TB2> INFO: ######################################################################
[12:28:23.187] <TB2> INFO: ----------------------------------------------------------------------
[12:28:23.187] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:28:23.187] <TB2> INFO: ----------------------------------------------------------------------
[12:28:23.187] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:28:23.196] <TB2> INFO: dacScan step from 0 .. 3
[12:28:42.338] <TB2> INFO: Test took 19142ms.
[12:28:42.364] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:42.364] <TB2> INFO: dacScan step from 4 .. 7
[12:29:00.922] <TB2> INFO: Test took 18558ms.
[12:29:00.948] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:00.948] <TB2> INFO: dacScan step from 8 .. 11
[12:29:21.072] <TB2> INFO: Test took 20124ms.
[12:29:21.099] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:21.099] <TB2> INFO: dacScan step from 12 .. 15
[12:29:41.137] <TB2> INFO: Test took 20038ms.
[12:29:41.169] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:41.169] <TB2> INFO: dacScan step from 16 .. 19
[12:30:01.278] <TB2> INFO: Test took 20109ms.
[12:30:01.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:01.307] <TB2> INFO: dacScan step from 20 .. 23
[12:30:21.491] <TB2> INFO: Test took 20184ms.
[12:30:21.519] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:21.519] <TB2> INFO: dacScan step from 24 .. 27
[12:30:41.743] <TB2> INFO: Test took 20224ms.
[12:30:41.769] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:41.769] <TB2> INFO: dacScan step from 28 .. 31
[12:31:01.861] <TB2> INFO: Test took 20092ms.
[12:31:01.887] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:01.888] <TB2> INFO: dacScan step from 32 .. 35
[12:31:21.994] <TB2> INFO: Test took 20106ms.
[12:31:22.020] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:22.020] <TB2> INFO: dacScan step from 36 .. 39
[12:31:42.238] <TB2> INFO: Test took 20218ms.
[12:31:42.270] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:42.270] <TB2> INFO: dacScan step from 40 .. 43
[12:32:02.622] <TB2> INFO: Test took 20352ms.
[12:32:02.649] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:02.649] <TB2> INFO: dacScan step from 44 .. 47
[12:32:22.842] <TB2> INFO: Test took 20193ms.
[12:32:22.868] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:22.868] <TB2> INFO: dacScan step from 48 .. 51
[12:32:42.883] <TB2> INFO: Test took 20015ms.
[12:32:42.914] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:42.914] <TB2> INFO: dacScan step from 52 .. 55
[12:33:02.985] <TB2> INFO: Test took 20070ms.
[12:33:03.009] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:03.010] <TB2> INFO: dacScan step from 56 .. 59
[12:33:23.337] <TB2> INFO: Test took 20327ms.
[12:33:23.363] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:23.363] <TB2> INFO: dacScan step from 60 .. 63
[12:33:43.826] <TB2> INFO: Test took 20463ms.
[12:33:43.859] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:43.860] <TB2> INFO: dacScan step from 64 .. 67
[12:34:04.499] <TB2> INFO: Test took 20639ms.
[12:34:04.544] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:04.545] <TB2> INFO: dacScan step from 68 .. 71
[12:34:25.929] <TB2> INFO: Test took 21383ms.
[12:34:25.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:25.996] <TB2> INFO: dacScan step from 72 .. 75
[12:34:48.610] <TB2> INFO: Test took 22614ms.
[12:34:48.702] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:48.707] <TB2> INFO: dacScan step from 76 .. 79
[12:35:13.713] <TB2> INFO: Test took 25006ms.
[12:35:13.840] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:13.848] <TB2> INFO: dacScan step from 80 .. 83
[12:35:42.469] <TB2> INFO: Test took 28618ms.
[12:35:42.651] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:42.659] <TB2> INFO: dacScan step from 84 .. 87
[12:36:12.636] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:36:12.636] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:36:12.800] <TB2> INFO: Test took 30141ms.
[12:36:13.009] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:13.019] <TB2> INFO: dacScan step from 88 .. 91
[12:36:43.162] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:36:43.162] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:36:44.021] <TB2> INFO: Test took 31002ms.
[12:36:44.220] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:44.229] <TB2> INFO: dacScan step from 92 .. 95
[12:37:14.621] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:37:14.621] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:37:15.920] <TB2> INFO: Test took 31691ms.
[12:37:16.147] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:16.159] <TB2> INFO: dacScan step from 96 .. 99
[12:37:47.840] <TB2> INFO: Test took 31681ms.
[12:37:48.066] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:48.076] <TB2> INFO: dacScan step from 100 .. 103
[12:38:18.466] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:38:18.466] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:38:19.876] <TB2> INFO: Test took 31800ms.
[12:38:20.095] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:20.109] <TB2> INFO: dacScan step from 104 .. 107
[12:38:50.599] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (50) != TBM ID (0)
[12:38:50.599] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[12:38:50.599] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (51)
[12:38:52.043] <TB2> INFO: Test took 31934ms.
[12:38:52.272] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:52.283] <TB2> INFO: dacScan step from 108 .. 111
[12:39:22.719] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:39:22.719] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:39:24.110] <TB2> INFO: Test took 31827ms.
[12:39:24.338] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:24.349] <TB2> INFO: dacScan step from 112 .. 115
[12:39:56.316] <TB2> INFO: Test took 31967ms.
[12:39:56.534] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:56.547] <TB2> INFO: dacScan step from 116 .. 119
[12:40:28.483] <TB2> INFO: Test took 31936ms.
[12:40:28.705] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:28.717] <TB2> INFO: dacScan step from 120 .. 123
[12:41:00.296] <TB2> INFO: Test took 31579ms.
[12:41:00.519] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:00.532] <TB2> INFO: dacScan step from 124 .. 127
[12:41:32.341] <TB2> INFO: Test took 31809ms.
[12:41:32.585] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:32.596] <TB2> INFO: dacScan step from 128 .. 131
[12:42:04.409] <TB2> INFO: Test took 31813ms.
[12:42:04.643] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:04.655] <TB2> INFO: dacScan step from 132 .. 135
[12:42:36.582] <TB2> INFO: Test took 31927ms.
[12:42:36.822] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:36.833] <TB2> INFO: dacScan step from 136 .. 139
[12:43:08.382] <TB2> INFO: Test took 31549ms.
[12:43:08.603] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:08.616] <TB2> INFO: dacScan step from 140 .. 143
[12:43:40.364] <TB2> INFO: Test took 31747ms.
[12:43:40.592] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:40.603] <TB2> INFO: dacScan step from 144 .. 147
[12:44:12.571] <TB2> INFO: Test took 31967ms.
[12:44:12.797] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:12.809] <TB2> INFO: dacScan step from 148 .. 149
[12:44:29.897] <TB2> INFO: Test took 17087ms.
[12:44:30.012] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:30.018] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:31.531] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:32.986] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:34.479] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:35.971] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:37.395] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:38.853] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:40.352] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:41.786] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:43.243] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:44.722] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:46.202] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:47.754] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:49.235] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:50.738] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:52.186] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:44:53.615] <TB2> INFO: PixTestScurves::scurves() done
[12:44:53.615] <TB2> INFO: Vcal mean: 77.63 87.73 76.97 77.93 106.91 95.44 81.92 86.16 80.33 70.16 77.49 88.74 84.92 75.57 75.95 76.61
[12:44:53.616] <TB2> INFO: Vcal RMS: 4.04 6.01 4.52 4.98 6.30 5.68 4.97 5.11 4.19 5.15 4.41 5.76 6.46 4.66 4.58 4.31
[12:44:53.616] <TB2> INFO: PixTestScurves::fullTest() done, duration: 990 seconds
[12:44:53.691] <TB2> INFO: ######################################################################
[12:44:53.691] <TB2> INFO: PixTestTrim::doTest()
[12:44:53.691] <TB2> INFO: ######################################################################
[12:44:53.693] <TB2> INFO: ----------------------------------------------------------------------
[12:44:53.693] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:44:53.693] <TB2> INFO: ----------------------------------------------------------------------
[12:44:53.779] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:44:53.779] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:44:53.788] <TB2> INFO: dacScan step from 0 .. 19
[12:45:09.588] <TB2> INFO: Test took 15800ms.
[12:45:09.611] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:09.611] <TB2> INFO: dacScan step from 20 .. 39
[12:45:24.478] <TB2> INFO: Test took 14867ms.
[12:45:24.498] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:24.498] <TB2> INFO: dacScan step from 40 .. 59
[12:45:39.323] <TB2> INFO: Test took 14825ms.
[12:45:39.345] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:39.345] <TB2> INFO: dacScan step from 60 .. 79
[12:45:55.133] <TB2> INFO: Test took 15788ms.
[12:45:55.163] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:55.163] <TB2> INFO: dacScan step from 80 .. 99
[12:46:12.611] <TB2> INFO: Test took 17448ms.
[12:46:12.704] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:12.718] <TB2> INFO: dacScan step from 100 .. 119
[12:46:33.542] <TB2> INFO: Test took 20824ms.
[12:46:33.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:33.739] <TB2> INFO: dacScan step from 120 .. 139
[12:46:53.190] <TB2> INFO: Test took 19452ms.
[12:46:53.320] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:53.342] <TB2> INFO: dacScan step from 140 .. 159
[12:47:10.177] <TB2> INFO: Test took 16835ms.
[12:47:10.237] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:32.608] <TB2> INFO: ROC 0 VthrComp = 83
[12:47:32.609] <TB2> INFO: ROC 1 VthrComp = 91
[12:47:32.609] <TB2> INFO: ROC 2 VthrComp = 83
[12:47:32.609] <TB2> INFO: ROC 3 VthrComp = 80
[12:47:32.609] <TB2> INFO: ROC 4 VthrComp = 104
[12:47:32.609] <TB2> INFO: ROC 5 VthrComp = 100
[12:47:32.609] <TB2> INFO: ROC 6 VthrComp = 86
[12:47:32.609] <TB2> INFO: ROC 7 VthrComp = 90
[12:47:32.609] <TB2> INFO: ROC 8 VthrComp = 86
[12:47:32.609] <TB2> INFO: ROC 9 VthrComp = 75
[12:47:32.609] <TB2> INFO: ROC 10 VthrComp = 80
[12:47:32.609] <TB2> INFO: ROC 11 VthrComp = 96
[12:47:32.609] <TB2> INFO: ROC 12 VthrComp = 84
[12:47:32.609] <TB2> INFO: ROC 13 VthrComp = 82
[12:47:32.609] <TB2> INFO: ROC 14 VthrComp = 80
[12:47:32.609] <TB2> INFO: ROC 15 VthrComp = 82
[12:47:32.609] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:47:32.609] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:47:32.618] <TB2> INFO: dacScan step from 0 .. 19
[12:47:48.342] <TB2> INFO: Test took 15724ms.
[12:47:48.363] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:48.363] <TB2> INFO: dacScan step from 20 .. 39
[12:48:03.402] <TB2> INFO: Test took 15039ms.
[12:48:03.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:03.434] <TB2> INFO: dacScan step from 40 .. 59
[12:48:22.406] <TB2> INFO: Test took 18972ms.
[12:48:22.567] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:22.597] <TB2> INFO: dacScan step from 60 .. 79
[12:48:43.141] <TB2> INFO: Test took 20544ms.
[12:48:43.361] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:43.407] <TB2> INFO: dacScan step from 80 .. 99
[12:49:04.362] <TB2> INFO: Test took 20955ms.
[12:49:04.521] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:04.564] <TB2> INFO: dacScan step from 100 .. 119
[12:49:25.866] <TB2> INFO: Test took 21301ms.
[12:49:26.043] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:26.093] <TB2> INFO: dacScan step from 120 .. 139
[12:49:47.405] <TB2> INFO: Test took 21312ms.
[12:49:47.568] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:47.613] <TB2> INFO: dacScan step from 140 .. 159
[12:50:09.061] <TB2> INFO: Test took 21448ms.
[12:50:09.263] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:33.484] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 55.9288 for pixel 21/0 mean/min/max = 44.3451/32.7185/55.9717
[12:50:33.485] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.9147 for pixel 23/75 mean/min/max = 46.3845/31.8453/60.9236
[12:50:33.485] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.9971 for pixel 0/68 mean/min/max = 45.1368/32.1682/58.1054
[12:50:33.485] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 60.4891 for pixel 18/56 mean/min/max = 46.4037/32.196/60.6114
[12:50:33.485] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 65.953 for pixel 18/72 mean/min/max = 49.7382/33.4558/66.0206
[12:50:33.486] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.9509 for pixel 16/9 mean/min/max = 46.1427/32.325/59.9603
[12:50:33.486] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.4341 for pixel 16/77 mean/min/max = 45.8446/32.1955/59.4936
[12:50:33.486] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.8692 for pixel 10/68 mean/min/max = 45.6393/32.3526/58.9259
[12:50:33.487] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 56.3797 for pixel 10/79 mean/min/max = 44.2975/32.0489/56.5462
[12:50:33.487] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.9225 for pixel 0/37 mean/min/max = 47.0513/34.0038/60.0989
[12:50:33.487] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.4343 for pixel 3/1 mean/min/max = 45.6788/32.8704/58.4872
[12:50:33.488] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 59.166 for pixel 21/76 mean/min/max = 45.3423/31.4272/59.2575
[12:50:33.488] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 63.1121 for pixel 0/79 mean/min/max = 47.1381/31.1124/63.1637
[12:50:33.488] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.6146 for pixel 3/77 mean/min/max = 44.3455/31.6939/56.9971
[12:50:33.488] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 58.6844 for pixel 20/4 mean/min/max = 45.5452/32.4039/58.6866
[12:50:33.489] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.1274 for pixel 18/5 mean/min/max = 44.5757/32.0228/57.1286
[12:50:33.489] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:52:11.116] <TB2> INFO: Test took 97627ms.
[12:52:12.650] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:52:12.659] <TB2> INFO: dacScan step from 0 .. 19
[12:52:34.960] <TB2> INFO: Test took 22301ms.
[12:52:35.009] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:35.010] <TB2> INFO: dacScan step from 20 .. 39
[12:53:03.116] <TB2> INFO: Test took 28106ms.
[12:53:03.343] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:03.374] <TB2> INFO: dacScan step from 40 .. 59
[12:53:34.580] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (232) != TBM ID (0)
[12:53:34.580] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[12:53:34.580] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (233)
[12:53:35.845] <TB2> INFO: Test took 32470ms.
[12:53:36.130] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:36.185] <TB2> INFO: dacScan step from 60 .. 79
[12:54:09.153] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[12:54:09.153] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (199) != TBM ID (200)
[12:54:09.153] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[12:54:09.153] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[12:54:09.153] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:54:10.567] <TB2> INFO: Test took 34382ms.
[12:54:10.841] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:10.896] <TB2> INFO: dacScan step from 80 .. 99
[12:54:44.792] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:54:44.792] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:54:46.197] <TB2> INFO: Test took 35301ms.
[12:54:46.506] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:46.555] <TB2> INFO: dacScan step from 100 .. 119
[12:55:17.761] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:55:17.761] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:55:18.957] <TB2> INFO: Test took 32402ms.
[12:55:19.255] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:19.304] <TB2> INFO: dacScan step from 120 .. 139
[12:55:53.442] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[12:55:53.442] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (201) != TBM ID (202)
[12:55:53.442] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[12:55:53.442] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[12:55:53.442] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:55:54.895] <TB2> INFO: Test took 35591ms.
[12:55:55.196] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:55.240] <TB2> INFO: dacScan step from 140 .. 159
[12:56:28.276] <TB2> INFO: Test took 33037ms.
[12:56:28.542] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:28.589] <TB2> INFO: dacScan step from 160 .. 179
[12:57:03.093] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:57:03.093] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:57:04.486] <TB2> INFO: Test took 35897ms.
[12:57:04.790] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:04.842] <TB2> INFO: dacScan step from 180 .. 199
[12:57:39.743] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[12:57:39.743] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[12:57:41.188] <TB2> INFO: Test took 36346ms.
[12:57:41.474] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:06.173] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.064452 .. 255.000000
[12:58:06.247] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:58:06.255] <TB2> INFO: dacScan step from 0 .. 19
[12:58:20.371] <TB2> INFO: Test took 14116ms.
[12:58:20.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:20.397] <TB2> INFO: dacScan step from 20 .. 39
[12:58:35.951] <TB2> INFO: Test took 15554ms.
[12:58:36.042] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:36.059] <TB2> INFO: dacScan step from 40 .. 59
[12:58:53.334] <TB2> INFO: Test took 17275ms.
[12:58:53.489] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:53.538] <TB2> INFO: dacScan step from 60 .. 79
[12:59:12.103] <TB2> INFO: Test took 18566ms.
[12:59:12.239] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:12.278] <TB2> INFO: dacScan step from 80 .. 99
[12:59:30.861] <TB2> INFO: Test took 18583ms.
[12:59:30.996] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:31.042] <TB2> INFO: dacScan step from 100 .. 119
[12:59:49.752] <TB2> INFO: Test took 18710ms.
[12:59:49.892] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:49.936] <TB2> INFO: dacScan step from 120 .. 139
[13:00:08.171] <TB2> INFO: Test took 18235ms.
[13:00:08.305] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:08.354] <TB2> INFO: dacScan step from 140 .. 159
[13:00:25.672] <TB2> INFO: Test took 17318ms.
[13:00:25.811] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:25.857] <TB2> INFO: dacScan step from 160 .. 179
[13:00:44.687] <TB2> INFO: Test took 18830ms.
[13:00:44.822] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:44.869] <TB2> INFO: dacScan step from 180 .. 199
[13:01:04.467] <TB2> INFO: Test took 19598ms.
[13:01:04.607] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:04.646] <TB2> INFO: dacScan step from 200 .. 219
[13:01:23.362] <TB2> INFO: Test took 18716ms.
[13:01:23.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:23.545] <TB2> INFO: dacScan step from 220 .. 239
[13:01:42.134] <TB2> INFO: Test took 18589ms.
[13:01:42.277] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:42.316] <TB2> INFO: dacScan step from 240 .. 255
[13:01:57.857] <TB2> INFO: Test took 15541ms.
[13:01:57.974] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:28.730] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 0.217914 .. 58.408460
[13:02:28.807] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 68 (20) hits flags = 16 (plus default)
[13:02:28.815] <TB2> INFO: dacScan step from 0 .. 19
[13:02:42.818] <TB2> INFO: Test took 14003ms.
[13:02:42.839] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:42.839] <TB2> INFO: dacScan step from 20 .. 39
[13:02:57.882] <TB2> INFO: Test took 15042ms.
[13:02:57.955] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:57.971] <TB2> INFO: dacScan step from 40 .. 59
[13:03:15.335] <TB2> INFO: Test took 17364ms.
[13:03:15.486] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:15.537] <TB2> INFO: dacScan step from 60 .. 68
[13:03:24.854] <TB2> INFO: Test took 9316ms.
[13:03:24.916] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:42.594] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 6.480420 .. 58.408460
[13:03:42.672] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 6 .. 68 (20) hits flags = 16 (plus default)
[13:03:42.680] <TB2> INFO: dacScan step from 6 .. 25
[13:03:56.769] <TB2> INFO: Test took 14089ms.
[13:03:56.790] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:56.790] <TB2> INFO: dacScan step from 26 .. 45
[13:04:13.289] <TB2> INFO: Test took 16499ms.
[13:04:13.408] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:13.435] <TB2> INFO: dacScan step from 46 .. 65
[13:04:30.921] <TB2> INFO: Test took 17486ms.
[13:04:31.054] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:31.098] <TB2> INFO: dacScan step from 66 .. 68
[13:04:36.094] <TB2> INFO: Test took 4996ms.
[13:04:36.119] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:53.794] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.029570 .. 58.408460
[13:04:53.869] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 68 (20) hits flags = 16 (plus default)
[13:04:53.877] <TB2> INFO: dacScan step from 1 .. 20
[13:05:07.195] <TB2> INFO: Test took 13318ms.
[13:05:07.213] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:07.213] <TB2> INFO: dacScan step from 21 .. 40
[13:05:22.315] <TB2> INFO: Test took 15102ms.
[13:05:22.394] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:22.410] <TB2> INFO: dacScan step from 41 .. 60
[13:05:41.245] <TB2> INFO: Test took 18835ms.
[13:05:41.385] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:41.424] <TB2> INFO: dacScan step from 61 .. 68
[13:05:50.417] <TB2> INFO: Test took 8993ms.
[13:05:50.470] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:07.382] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:06:07.382] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:06:07.390] <TB2> INFO: dacScan step from 15 .. 34
[13:06:31.986] <TB2> INFO: Test took 24596ms.
[13:06:32.047] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:32.057] <TB2> INFO: dacScan step from 35 .. 54
[13:07:07.192] <TB2> INFO: Test took 35135ms.
[13:07:07.478] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:07.519] <TB2> INFO: dacScan step from 55 .. 55
[13:07:11.996] <TB2> INFO: Test took 4477ms.
[13:07:12.014] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:25.321] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:07:25.321] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:07:25.321] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:07:25.321] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:07:25.321] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:07:25.322] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:07:25.323] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:07:25.329] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:07:25.335] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:07:25.342] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:07:25.347] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:07:25.353] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:07:25.359] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:07:25.366] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:07:25.372] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:07:25.378] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:07:25.384] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:07:25.390] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:07:25.396] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:07:25.402] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:07:25.408] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:07:25.415] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:07:25.421] <TB2> INFO: PixTestTrim::trimTest() done
[13:07:25.421] <TB2> INFO: vtrim: 117 108 90 120 114 122 101 110 106 103 105 132 106 115 111 108
[13:07:25.421] <TB2> INFO: vthrcomp: 83 91 83 80 104 100 86 90 86 75 80 96 84 82 80 82
[13:07:25.421] <TB2> INFO: vcal mean: 35.02 35.02 34.98 34.98 35.06 35.06 35.06 35.04 35.04 35.06 35.09 34.99 35.05 35.04 35.01 35.03
[13:07:25.421] <TB2> INFO: vcal RMS: 0.98 1.20 0.98 1.20 1.06 1.03 1.00 1.30 1.03 0.96 0.99 1.03 1.06 0.96 1.00 0.94
[13:07:25.421] <TB2> INFO: bits mean: 10.41 9.58 9.40 10.03 8.60 9.89 9.47 10.26 10.26 9.08 9.70 9.97 9.00 10.39 9.94 10.11
[13:07:25.421] <TB2> INFO: bits RMS: 2.23 2.68 2.75 2.40 2.58 2.48 2.72 2.34 2.41 2.50 2.50 2.57 2.91 2.34 2.43 2.48
[13:07:25.427] <TB2> INFO: ----------------------------------------------------------------------
[13:07:25.427] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:07:25.427] <TB2> INFO: ----------------------------------------------------------------------
[13:07:25.429] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:07:25.437] <TB2> INFO: dacScan step from 0 .. 19
[13:07:49.177] <TB2> INFO: Test took 23740ms.
[13:07:49.214] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:49.214] <TB2> INFO: dacScan step from 20 .. 39
[13:08:13.144] <TB2> INFO: Test took 23931ms.
[13:08:13.178] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:13.178] <TB2> INFO: dacScan step from 40 .. 59
[13:08:36.979] <TB2> INFO: Test took 23801ms.
[13:08:37.015] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:37.015] <TB2> INFO: dacScan step from 60 .. 79
[13:09:01.085] <TB2> INFO: Test took 24070ms.
[13:09:01.118] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:01.118] <TB2> INFO: dacScan step from 80 .. 99
[13:09:26.221] <TB2> INFO: Test took 25103ms.
[13:09:26.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:26.344] <TB2> INFO: dacScan step from 100 .. 119
[13:09:56.589] <TB2> INFO: Test took 30244ms.
[13:09:56.857] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:56.882] <TB2> INFO: dacScan step from 120 .. 139
[13:10:31.052] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:10:31.052] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:10:32.443] <TB2> INFO: Test took 35561ms.
[13:10:32.720] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:32.756] <TB2> INFO: dacScan step from 140 .. 159
[13:11:06.819] <TB2> INFO: Test took 34062ms.
[13:11:07.092] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:07.132] <TB2> INFO: dacScan step from 160 .. 179
[13:11:42.673] <TB2> INFO: Test took 35541ms.
[13:11:43.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:43.052] <TB2> INFO: dacScan step from 180 .. 199
[13:12:16.752] <TB2> INFO: Test took 33700ms.
[13:12:17.018] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:44.669] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 181 (20) hits flags = 16 (plus default)
[13:12:44.677] <TB2> INFO: dacScan step from 0 .. 19
[13:13:07.003] <TB2> INFO: Test took 22326ms.
[13:13:07.037] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:07.037] <TB2> INFO: dacScan step from 20 .. 39
[13:13:30.906] <TB2> INFO: Test took 23869ms.
[13:13:30.940] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:30.941] <TB2> INFO: dacScan step from 40 .. 59
[13:13:54.804] <TB2> INFO: Test took 23863ms.
[13:13:54.838] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:54.838] <TB2> INFO: dacScan step from 60 .. 79
[13:14:19.007] <TB2> INFO: Test took 24169ms.
[13:14:19.049] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:19.049] <TB2> INFO: dacScan step from 80 .. 99
[13:14:45.653] <TB2> INFO: Test took 26604ms.
[13:14:45.820] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:45.836] <TB2> INFO: dacScan step from 100 .. 119
[13:15:20.098] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (239) != TBM ID (0)
[13:15:20.098] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[13:15:20.098] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (240)
[13:15:20.965] <TB2> INFO: Test took 35129ms.
[13:15:21.229] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:21.258] <TB2> INFO: dacScan step from 120 .. 139
[13:15:55.689] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:15:55.689] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:15:57.142] <TB2> INFO: Test took 35884ms.
[13:15:57.415] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:57.457] <TB2> INFO: dacScan step from 140 .. 159
[13:16:32.735] <TB2> INFO: Test took 35278ms.
[13:16:33.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:33.042] <TB2> INFO: dacScan step from 160 .. 179
[13:17:07.348] <TB2> INFO: Test took 34306ms.
[13:17:07.624] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:07.670] <TB2> INFO: dacScan step from 180 .. 181
[13:17:13.405] <TB2> INFO: Test took 5735ms.
[13:17:13.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:38.414] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[13:17:38.422] <TB2> INFO: dacScan step from 0 .. 19
[13:18:01.969] <TB2> INFO: Test took 23547ms.
[13:18:02.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:02.003] <TB2> INFO: dacScan step from 20 .. 39
[13:18:24.184] <TB2> INFO: Test took 22181ms.
[13:18:24.217] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:24.217] <TB2> INFO: dacScan step from 40 .. 59
[13:18:48.336] <TB2> INFO: Test took 24118ms.
[13:18:48.369] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:48.369] <TB2> INFO: dacScan step from 60 .. 79
[13:19:12.210] <TB2> INFO: Test took 23841ms.
[13:19:12.249] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:12.249] <TB2> INFO: dacScan step from 80 .. 99
[13:19:40.645] <TB2> INFO: Test took 28396ms.
[13:19:40.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:40.817] <TB2> INFO: dacScan step from 100 .. 119
[13:20:13.439] <TB2> INFO: Test took 32622ms.
[13:20:13.707] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:13.741] <TB2> INFO: dacScan step from 120 .. 139
[13:20:48.499] <TB2> INFO: Test took 34757ms.
[13:20:48.779] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:48.822] <TB2> INFO: dacScan step from 140 .. 159
[13:21:21.870] <TB2> INFO: Test took 33048ms.
[13:21:22.141] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:22.185] <TB2> INFO: dacScan step from 160 .. 165
[13:21:34.504] <TB2> INFO: Test took 12319ms.
[13:21:34.588] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:57.631] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[13:21:57.639] <TB2> INFO: dacScan step from 0 .. 19
[13:22:21.597] <TB2> INFO: Test took 23958ms.
[13:22:21.636] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:21.636] <TB2> INFO: dacScan step from 20 .. 39
[13:22:43.790] <TB2> INFO: Test took 22154ms.
[13:22:43.825] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:43.825] <TB2> INFO: dacScan step from 40 .. 59
[13:23:06.177] <TB2> INFO: Test took 22352ms.
[13:23:06.211] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:06.211] <TB2> INFO: dacScan step from 60 .. 79
[13:23:28.741] <TB2> INFO: Test took 22530ms.
[13:23:28.780] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:28.780] <TB2> INFO: dacScan step from 80 .. 99
[13:23:55.463] <TB2> INFO: Test took 26683ms.
[13:23:55.624] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:55.641] <TB2> INFO: dacScan step from 100 .. 119
[13:24:29.588] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[13:24:29.588] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (76) != TBM ID (77)
[13:24:29.588] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[13:24:29.588] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[13:24:29.588] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:24:30.419] <TB2> INFO: Test took 34778ms.
[13:24:30.690] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:30.720] <TB2> INFO: dacScan step from 120 .. 139
[13:25:04.382] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:25:04.383] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:25:05.674] <TB2> INFO: Test took 34954ms.
[13:25:05.982] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:06.028] <TB2> INFO: dacScan step from 140 .. 159
[13:25:40.238] <TB2> INFO: Test took 34210ms.
[13:25:40.495] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:40.538] <TB2> INFO: dacScan step from 160 .. 165
[13:25:52.110] <TB2> INFO: Test took 11572ms.
[13:25:52.197] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:14.429] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[13:26:14.437] <TB2> INFO: dacScan step from 0 .. 19
[13:26:38.232] <TB2> INFO: Test took 23795ms.
[13:26:38.268] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:38.268] <TB2> INFO: dacScan step from 20 .. 39
[13:27:01.967] <TB2> INFO: Test took 23699ms.
[13:27:02.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:02.008] <TB2> INFO: dacScan step from 40 .. 59
[13:27:25.830] <TB2> INFO: Test took 23822ms.
[13:27:25.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:25.865] <TB2> INFO: dacScan step from 60 .. 79
[13:27:50.006] <TB2> INFO: Test took 24141ms.
[13:27:50.048] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:50.049] <TB2> INFO: dacScan step from 80 .. 99
[13:28:18.495] <TB2> INFO: Test took 28446ms.
[13:28:18.660] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:18.677] <TB2> INFO: dacScan step from 100 .. 119
[13:28:52.911] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:28:52.911] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:28:53.786] <TB2> INFO: Test took 35110ms.
[13:28:54.071] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:54.103] <TB2> INFO: dacScan step from 120 .. 139
[13:29:25.541] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:29:25.541] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:29:26.976] <TB2> INFO: Test took 32873ms.
[13:29:27.249] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:27.287] <TB2> INFO: dacScan step from 140 .. 159
[13:30:02.650] <TB2> INFO: Test took 35362ms.
[13:30:02.921] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:02.963] <TB2> INFO: dacScan step from 160 .. 165
[13:30:14.798] <TB2> INFO: Test took 11835ms.
[13:30:14.874] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:38.283] <TB2> INFO: PixTestTrim::trimBitTest() done
[13:30:38.285] <TB2> INFO: PixTestTrim::doTest() done, duration: 2744 seconds
[13:30:38.951] <TB2> INFO: ######################################################################
[13:30:38.951] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:30:38.951] <TB2> INFO: ######################################################################
[13:30:42.488] <TB2> INFO: Test took 3535ms.
[13:30:42.513] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:46.284] <TB2> INFO: Test took 3574ms.
[13:30:46.351] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:49.938] <TB2> INFO: Test took 3579ms.
[13:30:50.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:50.014] <TB2> INFO: The DUT currently contains the following objects:
[13:30:50.014] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:50.014] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:50.014] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:50.014] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:50.014] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:50.014] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.127] <TB2> INFO: Test took 1113ms.
[13:30:51.128] <TB2> INFO: The DUT currently contains the following objects:
[13:30:51.128] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:51.128] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:51.128] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:51.128] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:51.128] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.128] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:51.129] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.255] <TB2> INFO: Test took 1126ms.
[13:30:52.256] <TB2> INFO: The DUT currently contains the following objects:
[13:30:52.256] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:52.256] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:52.256] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:52.256] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:52.256] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.256] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:52.257] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.368] <TB2> INFO: Test took 1111ms.
[13:30:53.369] <TB2> INFO: The DUT currently contains the following objects:
[13:30:53.369] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:53.370] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:53.370] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:53.370] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:53.370] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:53.370] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.482] <TB2> INFO: Test took 1112ms.
[13:30:54.483] <TB2> INFO: The DUT currently contains the following objects:
[13:30:54.483] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:54.483] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:54.483] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:54.483] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:54.483] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.483] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:54.484] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.595] <TB2> INFO: Test took 1111ms.
[13:30:55.597] <TB2> INFO: The DUT currently contains the following objects:
[13:30:55.597] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:55.597] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:55.597] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:55.597] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:55.597] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:55.597] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.709] <TB2> INFO: Test took 1112ms.
[13:30:56.710] <TB2> INFO: The DUT currently contains the following objects:
[13:30:56.710] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:56.710] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:56.710] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:56.710] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:56.710] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:56.710] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.822] <TB2> INFO: Test took 1112ms.
[13:30:57.823] <TB2> INFO: The DUT currently contains the following objects:
[13:30:57.823] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:57.823] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:57.823] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:57.823] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:57.823] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:57.823] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.936] <TB2> INFO: Test took 1112ms.
[13:30:58.937] <TB2> INFO: The DUT currently contains the following objects:
[13:30:58.937] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:30:58.937] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:30:58.938] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:30:58.938] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:30:58.938] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.938] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.939] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.939] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.939] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.939] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:30:58.939] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.050] <TB2> INFO: Test took 1111ms.
[13:31:00.051] <TB2> INFO: The DUT currently contains the following objects:
[13:31:00.051] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:31:00.051] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:31:00.051] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:31:00.051] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:31:00.051] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.051] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.052] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.052] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.052] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.052] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.052] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:00.052] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.163] <TB2> INFO: Test took 1111ms.
[13:31:01.165] <TB2> INFO: The DUT currently contains the following objects:
[13:31:01.165] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:31:01.165] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:31:01.165] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:31:01.165] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:31:01.165] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.165] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.165] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:01.166] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.278] <TB2> INFO: Test took 1112ms.
[13:31:02.279] <TB2> INFO: The DUT currently contains the following objects:
[13:31:02.279] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:31:02.279] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:31:02.279] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:31:02.279] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:31:02.279] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.279] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.279] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.279] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.279] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.279] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.279] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.279] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.279] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.280] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.280] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.280] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.280] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.280] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.280] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:02.280] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.406] <TB2> INFO: Test took 1126ms.
[13:31:03.408] <TB2> INFO: The DUT currently contains the following objects:
[13:31:03.408] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:31:03.408] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:31:03.408] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:31:03.408] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:31:03.408] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.408] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.409] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.409] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:03.409] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.520] <TB2> INFO: Test took 1111ms.
[13:31:04.521] <TB2> INFO: The DUT currently contains the following objects:
[13:31:04.521] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:31:04.521] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:31:04.521] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:31:04.521] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:31:04.521] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:04.522] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.634] <TB2> INFO: Test took 1112ms.
[13:31:05.635] <TB2> INFO: The DUT currently contains the following objects:
[13:31:05.635] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:31:05.635] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:31:05.635] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:31:05.635] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:31:05.635] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.635] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.635] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.635] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.635] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:05.636] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.747] <TB2> INFO: Test took 1111ms.
[13:31:06.749] <TB2> INFO: The DUT currently contains the following objects:
[13:31:06.749] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:31:06.749] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:31:06.749] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:31:06.749] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:31:06.749] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:06.749] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:31:07.860] <TB2> INFO: Test took 1111ms.
[13:31:07.863] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:35:07.459] <TB2> INFO: Test took 239596ms.
[13:35:09.252] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:10.100] <TB2> INFO: Test took 240848ms.
[13:39:11.671] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.679] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.686] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.693] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.701] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.708] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.716] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.724] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.732] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.739] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.746] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.753] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.760] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.766] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.773] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.780] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:39:11.803] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:39:11.804] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:39:11.804] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:39:11.804] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:39:11.804] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:39:11.805] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:39:11.805] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:39:11.805] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:39:11.805] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:39:11.805] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:39:11.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:39:11.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:39:11.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:39:11.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:39:11.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:39:11.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:39:15.351] <TB2> INFO: Test took 3542ms.
[13:39:19.161] <TB2> INFO: Test took 3543ms.
[13:39:23.017] <TB2> INFO: Test took 3573ms.
[13:39:23.289] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:24.214] <TB2> INFO: Test took 925ms.
[13:39:24.217] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:25.325] <TB2> INFO: Test took 1108ms.
[13:39:25.327] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:26.435] <TB2> INFO: Test took 1108ms.
[13:39:26.437] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:27.545] <TB2> INFO: Test took 1108ms.
[13:39:27.547] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:28.655] <TB2> INFO: Test took 1108ms.
[13:39:28.656] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:29.764] <TB2> INFO: Test took 1108ms.
[13:39:29.766] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:30.873] <TB2> INFO: Test took 1107ms.
[13:39:30.874] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:31.982] <TB2> INFO: Test took 1109ms.
[13:39:31.984] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:33.092] <TB2> INFO: Test took 1108ms.
[13:39:33.094] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:34.200] <TB2> INFO: Test took 1106ms.
[13:39:34.202] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:35.310] <TB2> INFO: Test took 1108ms.
[13:39:35.311] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:36.420] <TB2> INFO: Test took 1109ms.
[13:39:36.421] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:37.529] <TB2> INFO: Test took 1108ms.
[13:39:37.531] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:38.639] <TB2> INFO: Test took 1108ms.
[13:39:38.641] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:39.749] <TB2> INFO: Test took 1108ms.
[13:39:39.751] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:40.859] <TB2> INFO: Test took 1108ms.
[13:39:40.861] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:41.969] <TB2> INFO: Test took 1108ms.
[13:39:41.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:43.080] <TB2> INFO: Test took 1109ms.
[13:39:43.081] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:44.189] <TB2> INFO: Test took 1108ms.
[13:39:44.191] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:45.300] <TB2> INFO: Test took 1109ms.
[13:39:45.302] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:46.414] <TB2> INFO: Test took 1112ms.
[13:39:46.416] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:47.528] <TB2> INFO: Test took 1112ms.
[13:39:47.530] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:48.644] <TB2> INFO: Test took 1114ms.
[13:39:48.646] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:49.761] <TB2> INFO: Test took 1115ms.
[13:39:49.764] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:50.876] <TB2> INFO: Test took 1113ms.
[13:39:50.878] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:51.991] <TB2> INFO: Test took 1113ms.
[13:39:51.994] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:53.105] <TB2> INFO: Test took 1112ms.
[13:39:53.108] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:54.222] <TB2> INFO: Test took 1114ms.
[13:39:54.224] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:55.336] <TB2> INFO: Test took 1112ms.
[13:39:55.338] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:56.451] <TB2> INFO: Test took 1113ms.
[13:39:56.454] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:57.569] <TB2> INFO: Test took 1116ms.
[13:39:57.572] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:39:58.684] <TB2> INFO: Test took 1112ms.
[13:39:59.199] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 560 seconds
[13:39:59.199] <TB2> INFO: PH scale (per ROC): 91 82 86 80 75 81 82 84 83 93 79 81 77 94 84 83
[13:39:59.199] <TB2> INFO: PH offset (per ROC): 140 150 154 157 159 159 157 155 145 141 161 170 164 153 159 143
[13:39:59.371] <TB2> INFO: ######################################################################
[13:39:59.371] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:39:59.371] <TB2> INFO: ######################################################################
[13:39:59.380] <TB2> INFO: scanning low vcal = 10
[13:40:03.339] <TB2> INFO: Test took 3959ms.
[13:40:03.343] <TB2> INFO: scanning low vcal = 20
[13:40:07.312] <TB2> INFO: Test took 3969ms.
[13:40:07.316] <TB2> INFO: scanning low vcal = 30
[13:40:11.283] <TB2> INFO: Test took 3967ms.
[13:40:11.294] <TB2> INFO: scanning low vcal = 40
[13:40:15.756] <TB2> INFO: Test took 4462ms.
[13:40:15.817] <TB2> INFO: scanning low vcal = 50
[13:40:20.278] <TB2> INFO: Test took 4461ms.
[13:40:20.338] <TB2> INFO: scanning low vcal = 60
[13:40:24.814] <TB2> INFO: Test took 4476ms.
[13:40:24.880] <TB2> INFO: scanning low vcal = 70
[13:40:29.376] <TB2> INFO: Test took 4496ms.
[13:40:29.446] <TB2> INFO: scanning low vcal = 80
[13:40:33.940] <TB2> INFO: Test took 4494ms.
[13:40:34.003] <TB2> INFO: scanning low vcal = 90
[13:40:38.486] <TB2> INFO: Test took 4483ms.
[13:40:38.581] <TB2> INFO: scanning low vcal = 100
[13:40:43.105] <TB2> INFO: Test took 4524ms.
[13:40:43.167] <TB2> INFO: scanning low vcal = 110
[13:40:47.633] <TB2> INFO: Test took 4466ms.
[13:40:47.706] <TB2> INFO: scanning low vcal = 120
[13:40:52.240] <TB2> INFO: Test took 4534ms.
[13:40:52.306] <TB2> INFO: scanning low vcal = 130
[13:40:56.817] <TB2> INFO: Test took 4512ms.
[13:40:56.884] <TB2> INFO: scanning low vcal = 140
[13:41:01.386] <TB2> INFO: Test took 4502ms.
[13:41:01.450] <TB2> INFO: scanning low vcal = 150
[13:41:05.765] <TB2> INFO: Test took 4315ms.
[13:41:05.822] <TB2> INFO: scanning low vcal = 160
[13:41:10.122] <TB2> INFO: Test took 4300ms.
[13:41:10.181] <TB2> INFO: scanning low vcal = 170
[13:41:14.489] <TB2> INFO: Test took 4308ms.
[13:41:14.557] <TB2> INFO: scanning low vcal = 180
[13:41:18.869] <TB2> INFO: Test took 4312ms.
[13:41:18.931] <TB2> INFO: scanning low vcal = 190
[13:41:23.352] <TB2> INFO: Test took 4421ms.
[13:41:23.408] <TB2> INFO: scanning low vcal = 200
[13:41:27.721] <TB2> INFO: Test took 4313ms.
[13:41:27.779] <TB2> INFO: scanning low vcal = 210
[13:41:32.080] <TB2> INFO: Test took 4301ms.
[13:41:32.136] <TB2> INFO: scanning low vcal = 220
[13:41:36.632] <TB2> INFO: Test took 4496ms.
[13:41:36.701] <TB2> INFO: scanning low vcal = 230
[13:41:41.167] <TB2> INFO: Test took 4466ms.
[13:41:41.229] <TB2> INFO: scanning low vcal = 240
[13:41:45.701] <TB2> INFO: Test took 4472ms.
[13:41:45.761] <TB2> INFO: scanning low vcal = 250
[13:41:50.177] <TB2> INFO: Test took 4416ms.
[13:41:50.266] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[13:41:54.730] <TB2> INFO: Test took 4464ms.
[13:41:54.797] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[13:41:59.275] <TB2> INFO: Test took 4478ms.
[13:41:59.336] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[13:42:03.873] <TB2> INFO: Test took 4537ms.
[13:42:03.945] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[13:42:08.425] <TB2> INFO: Test took 4480ms.
[13:42:08.488] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:42:12.966] <TB2> INFO: Test took 4478ms.
[13:42:13.515] <TB2> INFO: PixTestGainPedestal::measure() done
[13:42:46.923] <TB2> INFO: PixTestGainPedestal::fit() done
[13:42:46.923] <TB2> INFO: non-linearity mean: 0.956 0.957 0.955 0.959 0.956 0.956 0.956 0.956 0.944 0.957 0.957 0.955 0.961 0.953 0.957 0.957
[13:42:46.923] <TB2> INFO: non-linearity RMS: 0.004 0.005 0.006 0.006 0.007 0.006 0.006 0.007 0.007 0.005 0.005 0.007 0.005 0.006 0.005 0.006
[13:42:46.923] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:42:46.951] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:42:46.970] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:42:46.989] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:42:47.012] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:42:47.031] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:42:47.050] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:42:47.081] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:42:47.103] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:42:47.122] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:42:47.155] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:42:47.186] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:42:47.214] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:42:47.236] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:42:47.254] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:42:47.273] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:42:47.291] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[13:42:47.297] <TB2> INFO: enter test to run
[13:42:47.297] <TB2> INFO: test: exit no parameter change
[13:42:47.781] <TB2> QUIET: Connection to board 156 closed.
[13:42:47.796] <TB2> INFO: pXar: this is the end, my friend