[08:55:25.704] <TB2> INFO: *** Welcome to pxar ***
[08:55:25.704] <TB2> INFO: *** Today: 2015/08/05
[08:55:25.704] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C15.dat
[08:55:25.705] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:55:25.705] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//defaultMaskFile.dat
[08:55:25.705] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters_C15.dat
[08:55:25.809] <TB2> INFO: clk: 4
[08:55:25.809] <TB2> INFO: ctr: 4
[08:55:25.809] <TB2> INFO: sda: 19
[08:55:25.809] <TB2> INFO: tin: 9
[08:55:25.809] <TB2> INFO: level: 15
[08:55:25.809] <TB2> INFO: triggerdelay: 0
[08:55:25.809] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[08:55:25.809] <TB2> INFO: Log level: INFO
[08:55:25.827] <TB2> INFO: Found DTB DTB_WXC55Z
[08:55:25.842] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[08:55:25.845] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[08:55:25.848] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[08:55:27.381] <TB2> INFO: DUT info:
[08:55:27.381] <TB2> INFO: The DUT currently contains the following objects:
[08:55:27.381] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:55:27.381] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:55:27.381] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:55:27.381] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:55:27.381] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.381] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:55:27.782] <TB2> INFO: enter 'restricted' command line mode
[08:55:27.782] <TB2> INFO: enter test to run
[08:55:27.782] <TB2> INFO: test: pretest no parameter change
[08:55:27.782] <TB2> INFO: running: pretest
[08:55:27.787] <TB2> INFO: ######################################################################
[08:55:27.787] <TB2> INFO: PixTestPretest::doTest()
[08:55:27.787] <TB2> INFO: ######################################################################
[08:55:27.789] <TB2> INFO: ----------------------------------------------------------------------
[08:55:27.789] <TB2> INFO: PixTestPretest::programROC()
[08:55:27.789] <TB2> INFO: ----------------------------------------------------------------------
[08:55:45.803] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:55:45.803] <TB2> INFO: IA differences per ROC: 20.1 18.5 18.5 17.7 19.3 18.5 16.9 17.7 16.9 18.5 19.3 20.9 17.7 20.9 19.3 19.3
[08:55:45.859] <TB2> INFO: ----------------------------------------------------------------------
[08:55:45.859] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:55:45.859] <TB2> INFO: ----------------------------------------------------------------------
[08:56:05.383] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[08:56:05.387] <TB2> INFO: ----------------------------------------------------------------------
[08:56:05.387] <TB2> INFO: PixTestPretest::findWorkingPixel()
[08:56:05.387] <TB2> INFO: ----------------------------------------------------------------------
[08:56:13.908] <TB2> INFO: Test took 8518ms.
[08:56:14.195] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:56:14.218] <TB2> INFO: ----------------------------------------------------------------------
[08:56:14.218] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[08:56:14.218] <TB2> INFO: ----------------------------------------------------------------------
[08:56:22.739] <TB2> INFO: Test took 8517ms.
[08:56:23.016] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[08:56:23.017] <TB2> INFO: CalDel: 149 147 162 132 134 134 141 132 141 140 144 163 142 159 159 146
[08:56:23.017] <TB2> INFO: VthrComp: 51 51 51 51 52 51 51 51 51 51 51 51 51 51 51 51
[08:56:23.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C0.dat
[08:56:23.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C1.dat
[08:56:23.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C2.dat
[08:56:23.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C3.dat
[08:56:23.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C4.dat
[08:56:23.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C5.dat
[08:56:23.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C6.dat
[08:56:23.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C7.dat
[08:56:23.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C8.dat
[08:56:23.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C9.dat
[08:56:23.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C10.dat
[08:56:23.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C11.dat
[08:56:23.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C12.dat
[08:56:23.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C13.dat
[08:56:23.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C14.dat
[08:56:23.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters_C15.dat
[08:56:23.021] <TB2> INFO: PixTestPretest::doTest() done, duration: 55 seconds
[08:56:23.120] <TB2> INFO: enter test to run
[08:56:23.120] <TB2> INFO: test: fulltest no parameter change
[08:56:23.120] <TB2> INFO: running: fulltest
[08:56:23.120] <TB2> INFO: ######################################################################
[08:56:23.120] <TB2> INFO: PixTestFullTest::doTest()
[08:56:23.120] <TB2> INFO: ######################################################################
[08:56:23.121] <TB2> INFO: ######################################################################
[08:56:23.121] <TB2> INFO: PixTestAlive::doTest()
[08:56:23.121] <TB2> INFO: ######################################################################
[08:56:23.123] <TB2> INFO: ----------------------------------------------------------------------
[08:56:23.123] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:23.123] <TB2> INFO: ----------------------------------------------------------------------
[08:56:26.655] <TB2> INFO: Test took 3531ms.
[08:56:26.676] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:26.885] <TB2> INFO: PixTestAlive::aliveTest() done
[08:56:26.886] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:26.887] <TB2> INFO: ----------------------------------------------------------------------
[08:56:26.887] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:26.888] <TB2> INFO: ----------------------------------------------------------------------
[08:56:29.701] <TB2> INFO: Test took 2813ms.
[08:56:29.704] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:29.704] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:56:29.913] <TB2> INFO: PixTestAlive::maskTest() done
[08:56:29.913] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:29.915] <TB2> INFO: ----------------------------------------------------------------------
[08:56:29.915] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:56:29.915] <TB2> INFO: ----------------------------------------------------------------------
[08:56:33.443] <TB2> INFO: Test took 3527ms.
[08:56:33.467] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:33.679] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[08:56:33.679] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:56:33.679] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[08:56:33.690] <TB2> INFO: ######################################################################
[08:56:33.690] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:56:33.690] <TB2> INFO: ######################################################################
[08:56:33.691] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[08:56:33.703] <TB2> INFO: dacScan step from 0 .. 29
[08:56:55.794] <TB2> INFO: Test took 22090ms.
[08:56:55.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:55.827] <TB2> INFO: dacScan step from 30 .. 59
[08:57:18.763] <TB2> INFO: Test took 22935ms.
[08:57:19.137] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:19.199] <TB2> INFO: dacScan step from 60 .. 89
[08:57:50.300] <TB2> INFO: Test took 31101ms.
[08:57:51.672] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:52.160] <TB2> INFO: dacScan step from 90 .. 119
[08:58:23.028] <TB2> INFO: Test took 30867ms.
[08:58:24.341] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:24.673] <TB2> INFO: dacScan step from 120 .. 149
[08:58:51.667] <TB2> INFO: Test took 26994ms.
[08:58:51.894] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:22.626] <TB2> INFO: PixTestBBMap::doTest() done, duration: 228 seconds
[09:00:22.626] <TB2> INFO: number of dead bumps (per ROC): 8 13 5 6 0 0 0 0 1 0 0 2 7 1 1 3
[09:00:22.626] <TB2> INFO: separation cut (per ROC): 80 99 95 84 110 105 88 91 90 77 92 95 105 93 78 90
[09:00:22.870] <TB2> INFO: ######################################################################
[09:00:22.870] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[09:00:22.870] <TB2> INFO: ######################################################################
[09:00:22.870] <TB2> INFO: ----------------------------------------------------------------------
[09:00:22.870] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[09:00:22.870] <TB2> INFO: ----------------------------------------------------------------------
[09:00:22.870] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[09:00:22.883] <TB2> INFO: dacScan step from 0 .. 3
[09:00:42.425] <TB2> INFO: Test took 19542ms.
[09:00:42.454] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:42.454] <TB2> INFO: dacScan step from 4 .. 7
[09:01:01.667] <TB2> INFO: Test took 19213ms.
[09:01:01.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:01.761] <TB2> INFO: dacScan step from 8 .. 11
[09:01:21.269] <TB2> INFO: Test took 19508ms.
[09:01:21.362] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:21.362] <TB2> INFO: dacScan step from 12 .. 15
[09:01:40.912] <TB2> INFO: Test took 19550ms.
[09:01:40.999] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:40.999] <TB2> INFO: dacScan step from 16 .. 19
[09:02:00.518] <TB2> INFO: Test took 19519ms.
[09:02:00.641] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:00.641] <TB2> INFO: dacScan step from 20 .. 23
[09:02:20.323] <TB2> INFO: Test took 19681ms.
[09:02:20.427] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:20.427] <TB2> INFO: dacScan step from 24 .. 27
[09:02:39.948] <TB2> INFO: Test took 19521ms.
[09:02:39.974] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:39.974] <TB2> INFO: dacScan step from 28 .. 31
[09:02:59.297] <TB2> INFO: Test took 19323ms.
[09:02:59.323] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:59.323] <TB2> INFO: dacScan step from 32 .. 35
[09:03:18.658] <TB2> INFO: Test took 19335ms.
[09:03:18.684] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:18.684] <TB2> INFO: dacScan step from 36 .. 39
[09:03:38.240] <TB2> INFO: Test took 19555ms.
[09:03:38.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:38.266] <TB2> INFO: dacScan step from 40 .. 43
[09:03:57.900] <TB2> INFO: Test took 19634ms.
[09:03:57.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:57.928] <TB2> INFO: dacScan step from 44 .. 47
[09:04:17.187] <TB2> INFO: Test took 19259ms.
[09:04:17.282] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:17.282] <TB2> INFO: dacScan step from 48 .. 51
[09:04:37.165] <TB2> INFO: Test took 19883ms.
[09:04:37.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:37.264] <TB2> INFO: dacScan step from 52 .. 55
[09:04:57.356] <TB2> INFO: Test took 20092ms.
[09:04:57.456] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:57.456] <TB2> INFO: dacScan step from 56 .. 59
[09:05:17.540] <TB2> INFO: Test took 20084ms.
[09:05:17.641] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:17.641] <TB2> INFO: dacScan step from 60 .. 63
[09:05:37.536] <TB2> INFO: Test took 19895ms.
[09:05:37.562] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:37.562] <TB2> INFO: dacScan step from 64 .. 67
[09:05:57.410] <TB2> INFO: Test took 19848ms.
[09:05:57.449] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:57.451] <TB2> INFO: dacScan step from 68 .. 71
[09:06:17.416] <TB2> INFO: Test took 19965ms.
[09:06:17.561] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:17.563] <TB2> INFO: dacScan step from 72 .. 75
[09:06:38.487] <TB2> INFO: Test took 20915ms.
[09:06:38.786] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:38.790] <TB2> INFO: dacScan step from 76 .. 79
[09:07:01.627] <TB2> INFO: Test took 22837ms.
[09:07:01.895] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:01.902] <TB2> INFO: dacScan step from 80 .. 83
[09:07:28.111] <TB2> INFO: Test took 26209ms.
[09:07:28.866] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:28.890] <TB2> INFO: dacScan step from 84 .. 87
[09:07:57.270] <TB2> INFO: Test took 28379ms.
[09:07:57.457] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:57.468] <TB2> INFO: dacScan step from 88 .. 91
[09:08:26.647] <TB2> INFO: Test took 29179ms.
[09:08:27.317] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:27.349] <TB2> INFO: dacScan step from 92 .. 95
[09:08:57.142] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:08:57.142] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:08:57.986] <TB2> INFO: Test took 30637ms.
[09:08:59.020] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:59.093] <TB2> INFO: dacScan step from 96 .. 99
[09:09:27.858] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[09:09:27.858] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (179) != TBM ID (180)
[09:09:27.858] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:09:27.858] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:09:27.858] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:09:29.150] <TB2> INFO: Test took 30057ms.
[09:09:30.056] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:30.108] <TB2> INFO: dacScan step from 100 .. 103
[09:09:58.901] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:09:58.901] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:10:00.275] <TB2> INFO: Test took 30167ms.
[09:10:00.502] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:00.514] <TB2> INFO: dacScan step from 104 .. 107
[09:10:29.395] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[09:10:29.395] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (170) != TBM ID (171)
[09:10:29.395] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:10:29.395] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:10:29.395] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:10:30.748] <TB2> INFO: Test took 30234ms.
[09:10:30.974] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:30.985] <TB2> INFO: dacScan step from 108 .. 111
[09:11:00.151] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:11:00.152] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:11:01.498] <TB2> INFO: Test took 30513ms.
[09:11:01.729] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:01.741] <TB2> INFO: dacScan step from 112 .. 115
[09:11:31.849] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[09:11:31.849] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (197) != TBM ID (198)
[09:11:31.849] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:11:31.849] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:11:31.849] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:11:33.312] <TB2> INFO: Test took 31571ms.
[09:11:33.543] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:33.555] <TB2> INFO: dacScan step from 116 .. 119
[09:12:05.566] <TB2> INFO: Test took 32011ms.
[09:12:05.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:05.813] <TB2> INFO: dacScan step from 120 .. 123
[09:12:37.435] <TB2> INFO: Test took 31621ms.
[09:12:37.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:37.681] <TB2> INFO: dacScan step from 124 .. 127
[09:13:09.368] <TB2> INFO: Test took 31687ms.
[09:13:09.602] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:09.614] <TB2> INFO: dacScan step from 128 .. 131
[09:13:41.202] <TB2> INFO: Test took 31588ms.
[09:13:41.425] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:41.436] <TB2> INFO: dacScan step from 132 .. 135
[09:14:12.903] <TB2> INFO: Test took 31467ms.
[09:14:13.141] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:13.153] <TB2> INFO: dacScan step from 136 .. 139
[09:14:44.544] <TB2> INFO: Test took 31391ms.
[09:14:44.784] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:44.796] <TB2> INFO: dacScan step from 140 .. 143
[09:15:16.378] <TB2> INFO: Test took 31582ms.
[09:15:16.607] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:16.620] <TB2> INFO: dacScan step from 144 .. 147
[09:15:48.297] <TB2> INFO: Test took 31678ms.
[09:15:48.561] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:48.573] <TB2> INFO: dacScan step from 148 .. 149
[09:16:05.749] <TB2> INFO: Test took 17176ms.
[09:16:05.871] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:05.878] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:07.305] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:08.668] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:10.246] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:11.715] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:13.088] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:14.430] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:15.809] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:17.240] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:18.684] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:20.200] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:21.713] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:23.100] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:24.469] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:25.925] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:27.369] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:16:28.794] <TB2> INFO: PixTestScurves::scurves() done
[09:16:28.794] <TB2> INFO: Vcal mean: 78.98 89.76 79.37 80.11 106.98 96.54 83.21 91.06 83.67 75.85 86.03 84.88 93.84 78.98 75.94 80.19
[09:16:28.794] <TB2> INFO: Vcal RMS: 4.02 6.15 4.48 5.03 6.30 5.68 5.06 5.32 4.57 4.76 5.14 5.59 6.97 4.56 4.58 4.34
[09:16:28.794] <TB2> INFO: PixTestScurves::fullTest() done, duration: 965 seconds
[09:16:28.897] <TB2> INFO: ######################################################################
[09:16:28.897] <TB2> INFO: PixTestTrim::doTest()
[09:16:28.897] <TB2> INFO: ######################################################################
[09:16:28.899] <TB2> INFO: ----------------------------------------------------------------------
[09:16:28.899] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:16:28.899] <TB2> INFO: ----------------------------------------------------------------------
[09:16:28.978] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:16:28.978] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:16:28.986] <TB2> INFO: dacScan step from 0 .. 19
[09:16:43.966] <TB2> INFO: Test took 14980ms.
[09:16:43.990] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:43.990] <TB2> INFO: dacScan step from 20 .. 39
[09:16:59.568] <TB2> INFO: Test took 15578ms.
[09:16:59.593] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:59.593] <TB2> INFO: dacScan step from 40 .. 59
[09:17:15.311] <TB2> INFO: Test took 15718ms.
[09:17:15.332] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:15.332] <TB2> INFO: dacScan step from 60 .. 79
[09:17:31.017] <TB2> INFO: Test took 15684ms.
[09:17:31.043] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:31.044] <TB2> INFO: dacScan step from 80 .. 99
[09:17:47.730] <TB2> INFO: Test took 16686ms.
[09:17:47.791] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:47.800] <TB2> INFO: dacScan step from 100 .. 119
[09:18:08.363] <TB2> INFO: Test took 20563ms.
[09:18:08.532] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:08.563] <TB2> INFO: dacScan step from 120 .. 139
[09:18:28.793] <TB2> INFO: Test took 20230ms.
[09:18:28.945] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:28.977] <TB2> INFO: dacScan step from 140 .. 159
[09:18:46.256] <TB2> INFO: Test took 17279ms.
[09:18:46.328] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:07.221] <TB2> INFO: ROC 0 VthrComp = 85
[09:19:07.221] <TB2> INFO: ROC 1 VthrComp = 93
[09:19:07.221] <TB2> INFO: ROC 2 VthrComp = 86
[09:19:07.221] <TB2> INFO: ROC 3 VthrComp = 83
[09:19:07.221] <TB2> INFO: ROC 4 VthrComp = 105
[09:19:07.221] <TB2> INFO: ROC 5 VthrComp = 101
[09:19:07.221] <TB2> INFO: ROC 6 VthrComp = 89
[09:19:07.222] <TB2> INFO: ROC 7 VthrComp = 96
[09:19:07.222] <TB2> INFO: ROC 8 VthrComp = 91
[09:19:07.222] <TB2> INFO: ROC 9 VthrComp = 82
[09:19:07.222] <TB2> INFO: ROC 10 VthrComp = 92
[09:19:07.222] <TB2> INFO: ROC 11 VthrComp = 90
[09:19:07.222] <TB2> INFO: ROC 12 VthrComp = 95
[09:19:07.222] <TB2> INFO: ROC 13 VthrComp = 86
[09:19:07.222] <TB2> INFO: ROC 14 VthrComp = 81
[09:19:07.222] <TB2> INFO: ROC 15 VthrComp = 87
[09:19:07.222] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:19:07.222] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:19:07.233] <TB2> INFO: dacScan step from 0 .. 19
[09:19:22.057] <TB2> INFO: Test took 14824ms.
[09:19:22.078] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:22.078] <TB2> INFO: dacScan step from 20 .. 39
[09:19:37.919] <TB2> INFO: Test took 15841ms.
[09:19:37.955] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:37.959] <TB2> INFO: dacScan step from 40 .. 59
[09:19:57.859] <TB2> INFO: Test took 19900ms.
[09:19:58.009] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:58.041] <TB2> INFO: dacScan step from 60 .. 79
[09:20:17.891] <TB2> INFO: Test took 19850ms.
[09:20:18.055] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:18.101] <TB2> INFO: dacScan step from 80 .. 99
[09:20:39.477] <TB2> INFO: Test took 21376ms.
[09:20:39.640] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:39.685] <TB2> INFO: dacScan step from 100 .. 119
[09:21:01.043] <TB2> INFO: Test took 21358ms.
[09:21:01.212] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:01.255] <TB2> INFO: dacScan step from 120 .. 139
[09:21:22.590] <TB2> INFO: Test took 21335ms.
[09:21:22.750] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:22.790] <TB2> INFO: dacScan step from 140 .. 159
[09:21:43.941] <TB2> INFO: Test took 21151ms.
[09:21:44.126] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:09.528] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 55.9744 for pixel 14/12 mean/min/max = 44.3785/32.7602/55.9968
[09:22:09.529] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.9668 for pixel 15/8 mean/min/max = 46.4967/32.0255/60.9679
[09:22:09.529] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 58.3548 for pixel 0/31 mean/min/max = 45.4759/32.5958/58.3561
[09:22:09.529] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 60.3896 for pixel 0/25 mean/min/max = 46.2017/31.9455/60.4579
[09:22:09.530] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 64.964 for pixel 2/75 mean/min/max = 48.9409/32.872/65.0098
[09:22:09.530] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 60.2417 for pixel 2/22 mean/min/max = 46.3556/32.4364/60.2748
[09:22:09.530] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.0361 for pixel 0/23 mean/min/max = 46.0252/32.4529/59.5974
[09:22:09.531] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.7208 for pixel 15/30 mean/min/max = 45.5115/32.1361/58.887
[09:22:09.531] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 56.9016 for pixel 3/1 mean/min/max = 44.686/32.4642/56.9078
[09:22:09.531] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.5832 for pixel 15/59 mean/min/max = 45.3063/32.0291/58.5834
[09:22:09.532] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.1274 for pixel 2/76 mean/min/max = 45.2959/32.2156/58.3762
[09:22:09.532] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 59.9174 for pixel 3/18 mean/min/max = 46.1272/32.3153/59.939
[09:22:09.533] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 63.0323 for pixel 12/72 mean/min/max = 47.0128/30.9163/63.1094
[09:22:09.533] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 57.1655 for pixel 41/76 mean/min/max = 44.6563/32.1235/57.1891
[09:22:09.533] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.5748 for pixel 0/25 mean/min/max = 44.6942/31.409/57.9795
[09:22:09.534] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.2352 for pixel 36/1 mean/min/max = 44.6248/32.0051/57.2446
[09:22:09.534] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:23:43.224] <TB2> INFO: Test took 93690ms.
[09:23:44.761] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:23:44.771] <TB2> INFO: dacScan step from 0 .. 19
[09:24:08.764] <TB2> INFO: Test took 23993ms.
[09:24:08.809] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:08.812] <TB2> INFO: dacScan step from 20 .. 39
[09:24:39.148] <TB2> INFO: Test took 30336ms.
[09:24:39.366] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:39.397] <TB2> INFO: dacScan step from 40 .. 59
[09:25:13.578] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:25:13.578] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:25:14.919] <TB2> INFO: Test took 35522ms.
[09:25:15.201] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:15.249] <TB2> INFO: dacScan step from 60 .. 79
[09:25:49.312] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:25:49.312] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:25:50.745] <TB2> INFO: Test took 35496ms.
[09:25:51.033] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:51.084] <TB2> INFO: dacScan step from 80 .. 99
[09:26:25.031] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (204) != TBM ID (0)
[09:26:25.031] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:26:25.031] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (205)
[09:26:26.448] <TB2> INFO: Test took 35364ms.
[09:26:26.742] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:26.786] <TB2> INFO: dacScan step from 100 .. 119
[09:26:59.559] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:26:59.559] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:27:00.987] <TB2> INFO: Test took 34200ms.
[09:27:01.295] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:01.346] <TB2> INFO: dacScan step from 120 .. 139
[09:27:35.439] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:27:35.439] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:27:36.853] <TB2> INFO: Test took 35507ms.
[09:27:37.127] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:37.178] <TB2> INFO: dacScan step from 140 .. 159
[09:28:11.276] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:28:11.276] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:28:12.695] <TB2> INFO: Test took 35517ms.
[09:28:12.972] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:13.021] <TB2> INFO: dacScan step from 160 .. 179
[09:28:47.411] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:28:47.412] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:28:48.824] <TB2> INFO: Test took 35803ms.
[09:28:49.110] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:49.158] <TB2> INFO: dacScan step from 180 .. 199
[09:29:22.431] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (205) != TBM ID (0)
[09:29:22.431] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:29:22.432] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (206)
[09:29:23.645] <TB2> INFO: Test took 34487ms.
[09:29:23.978] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:48.614] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.093615 .. 255.000000
[09:29:48.707] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:29:48.716] <TB2> INFO: dacScan step from 0 .. 19
[09:30:02.060] <TB2> INFO: Test took 13343ms.
[09:30:02.079] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:02.080] <TB2> INFO: dacScan step from 20 .. 39
[09:30:16.617] <TB2> INFO: Test took 14537ms.
[09:30:16.693] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:16.709] <TB2> INFO: dacScan step from 40 .. 59
[09:30:35.495] <TB2> INFO: Test took 18786ms.
[09:30:35.679] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:35.734] <TB2> INFO: dacScan step from 60 .. 79
[09:30:54.228] <TB2> INFO: Test took 18494ms.
[09:30:54.366] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:54.415] <TB2> INFO: dacScan step from 80 .. 99
[09:31:13.234] <TB2> INFO: Test took 18819ms.
[09:31:13.386] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:13.429] <TB2> INFO: dacScan step from 100 .. 119
[09:31:32.025] <TB2> INFO: Test took 18595ms.
[09:31:32.172] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:32.222] <TB2> INFO: dacScan step from 120 .. 139
[09:31:50.811] <TB2> INFO: Test took 18589ms.
[09:31:50.958] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:51.002] <TB2> INFO: dacScan step from 140 .. 159
[09:32:09.713] <TB2> INFO: Test took 18711ms.
[09:32:09.858] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:09.904] <TB2> INFO: dacScan step from 160 .. 179
[09:32:28.574] <TB2> INFO: Test took 18670ms.
[09:32:28.720] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:28.767] <TB2> INFO: dacScan step from 180 .. 199
[09:32:46.992] <TB2> INFO: Test took 18225ms.
[09:32:47.137] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:47.186] <TB2> INFO: dacScan step from 200 .. 219
[09:33:05.625] <TB2> INFO: Test took 18439ms.
[09:33:05.771] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:05.808] <TB2> INFO: dacScan step from 220 .. 239
[09:33:24.515] <TB2> INFO: Test took 18707ms.
[09:33:24.663] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:24.705] <TB2> INFO: dacScan step from 240 .. 255
[09:33:40.184] <TB2> INFO: Test took 15479ms.
[09:33:40.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:10.980] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 17.214651 .. 50.523052
[09:34:11.059] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 7 .. 60 (20) hits flags = 16 (plus default)
[09:34:11.068] <TB2> INFO: dacScan step from 7 .. 26
[09:34:24.469] <TB2> INFO: Test took 13401ms.
[09:34:24.489] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:24.489] <TB2> INFO: dacScan step from 27 .. 46
[09:34:40.285] <TB2> INFO: Test took 15795ms.
[09:34:40.412] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:40.445] <TB2> INFO: dacScan step from 47 .. 60
[09:34:54.262] <TB2> INFO: Test took 13817ms.
[09:34:54.388] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:11.531] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.948726 .. 50.523052
[09:35:11.610] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 60 (20) hits flags = 16 (plus default)
[09:35:11.619] <TB2> INFO: dacScan step from 10 .. 29
[09:35:25.676] <TB2> INFO: Test took 14057ms.
[09:35:25.697] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:25.697] <TB2> INFO: dacScan step from 30 .. 49
[09:35:42.026] <TB2> INFO: Test took 16329ms.
[09:35:42.164] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:42.202] <TB2> INFO: dacScan step from 50 .. 60
[09:35:52.990] <TB2> INFO: Test took 10788ms.
[09:35:53.069] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:08.969] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 3.638855 .. 50.523052
[09:36:09.046] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 3 .. 60 (20) hits flags = 16 (plus default)
[09:36:09.054] <TB2> INFO: dacScan step from 3 .. 22
[09:36:23.020] <TB2> INFO: Test took 13966ms.
[09:36:23.043] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:23.043] <TB2> INFO: dacScan step from 23 .. 42
[09:36:37.987] <TB2> INFO: Test took 14944ms.
[09:36:38.118] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:38.141] <TB2> INFO: dacScan step from 43 .. 60
[09:36:55.042] <TB2> INFO: Test took 16901ms.
[09:36:55.174] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:11.334] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:37:11.334] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:37:11.342] <TB2> INFO: dacScan step from 15 .. 34
[09:37:34.254] <TB2> INFO: Test took 22911ms.
[09:37:34.319] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:34.328] <TB2> INFO: dacScan step from 35 .. 54
[09:38:08.113] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:38:08.963] <TB2> INFO: Test took 34635ms.
[09:38:09.260] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:09.301] <TB2> INFO: dacScan step from 55 .. 55
[09:38:13.736] <TB2> INFO: Test took 4435ms.
[09:38:13.755] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:27.050] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:38:27.050] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:38:27.050] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:38:27.051] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:38:27.051] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:38:27.051] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:38:27.051] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:38:27.052] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:38:27.052] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:38:27.052] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:38:27.053] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:38:27.053] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:38:27.053] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:38:27.053] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:38:27.054] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:38:27.054] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:38:27.054] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:38:27.062] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:38:27.069] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:38:27.076] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:38:27.082] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:38:27.089] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:38:27.095] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:38:27.102] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:38:27.109] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:38:27.115] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:38:27.121] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:38:27.127] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:38:27.134] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:38:27.141] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:38:27.147] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:38:27.154] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:38:27.160] <TB2> INFO: PixTestTrim::trimTest() done
[09:38:27.160] <TB2> INFO: vtrim: 108 116 101 114 119 127 105 108 111 109 113 118 136 112 96 115
[09:38:27.160] <TB2> INFO: vthrcomp: 85 93 86 83 105 101 89 96 91 82 92 90 95 86 81 87
[09:38:27.160] <TB2> INFO: vcal mean: 35.05 35.02 35.02 35.08 35.07 35.03 35.06 35.00 35.02 35.02 35.03 35.05 34.99 34.99 35.02 35.02
[09:38:27.160] <TB2> INFO: vcal RMS: 0.96 1.12 0.98 1.03 1.06 1.03 1.00 1.04 0.98 1.02 0.98 0.98 1.27 0.93 0.99 0.94
[09:38:27.160] <TB2> INFO: bits mean: 9.82 9.89 9.69 9.77 9.22 9.93 9.32 10.00 10.04 9.86 9.90 9.25 9.86 9.87 9.65 10.22
[09:38:27.160] <TB2> INFO: bits RMS: 2.49 2.50 2.54 2.55 2.48 2.42 2.73 2.49 2.45 2.54 2.56 2.70 2.51 2.51 2.75 2.42
[09:38:27.166] <TB2> INFO: ----------------------------------------------------------------------
[09:38:27.166] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:38:27.166] <TB2> INFO: ----------------------------------------------------------------------
[09:38:27.168] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:38:27.177] <TB2> INFO: dacScan step from 0 .. 19
[09:38:50.041] <TB2> INFO: Test took 22864ms.
[09:38:50.077] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:50.077] <TB2> INFO: dacScan step from 20 .. 39
[09:39:13.995] <TB2> INFO: Test took 23918ms.
[09:39:14.038] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:14.038] <TB2> INFO: dacScan step from 40 .. 59
[09:39:37.991] <TB2> INFO: Test took 23953ms.
[09:39:38.028] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:38.028] <TB2> INFO: dacScan step from 60 .. 79
[09:40:01.996] <TB2> INFO: Test took 23968ms.
[09:40:02.035] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:02.035] <TB2> INFO: dacScan step from 80 .. 99
[09:40:26.541] <TB2> INFO: Test took 24506ms.
[09:40:26.614] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:26.619] <TB2> INFO: dacScan step from 100 .. 119
[09:40:57.632] <TB2> INFO: Test took 31013ms.
[09:40:57.887] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:57.913] <TB2> INFO: dacScan step from 120 .. 139
[09:41:30.338] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[09:41:30.338] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (56) != TBM ID (57)
[09:41:30.338] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:41:30.338] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:41:30.338] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:41:31.669] <TB2> INFO: Test took 33756ms.
[09:41:31.949] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:31.984] <TB2> INFO: dacScan step from 140 .. 159
[09:42:06.034] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (68) != TBM ID (0)
[09:42:06.034] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:42:06.034] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (69)
[09:42:07.435] <TB2> INFO: Test took 35451ms.
[09:42:07.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:07.745] <TB2> INFO: dacScan step from 160 .. 179
[09:42:42.700] <TB2> INFO: Test took 34955ms.
[09:42:43.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:43.041] <TB2> INFO: dacScan step from 180 .. 199
[09:43:18.801] <TB2> INFO: Test took 35760ms.
[09:43:19.080] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:48.552] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 181 (20) hits flags = 16 (plus default)
[09:43:48.561] <TB2> INFO: dacScan step from 0 .. 19
[09:44:10.811] <TB2> INFO: Test took 22249ms.
[09:44:10.858] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:10.858] <TB2> INFO: dacScan step from 20 .. 39
[09:44:33.691] <TB2> INFO: Test took 22833ms.
[09:44:33.727] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:33.727] <TB2> INFO: dacScan step from 40 .. 59
[09:44:57.645] <TB2> INFO: Test took 23917ms.
[09:44:57.680] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:57.680] <TB2> INFO: dacScan step from 60 .. 79
[09:45:21.786] <TB2> INFO: Test took 24106ms.
[09:45:21.829] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:21.829] <TB2> INFO: dacScan step from 80 .. 99
[09:45:48.771] <TB2> INFO: Test took 26942ms.
[09:45:48.906] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:48.926] <TB2> INFO: dacScan step from 100 .. 119
[09:46:22.761] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:46:22.761] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:46:23.181] <TB2> INFO: Test took 34255ms.
[09:46:23.453] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:23.485] <TB2> INFO: dacScan step from 120 .. 139
[09:46:57.623] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (135) != TBM ID (0)
[09:46:57.623] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:46:57.623] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (136)
[09:46:59.117] <TB2> INFO: Test took 35632ms.
[09:46:59.412] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:59.447] <TB2> INFO: dacScan step from 140 .. 159
[09:47:34.757] <TB2> INFO: Test took 35310ms.
[09:47:35.029] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:35.065] <TB2> INFO: dacScan step from 160 .. 179
[09:48:10.591] <TB2> INFO: Test took 35526ms.
[09:48:10.872] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:10.920] <TB2> INFO: dacScan step from 180 .. 181
[09:48:17.050] <TB2> INFO: Test took 6130ms.
[09:48:17.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:43.092] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[09:48:43.100] <TB2> INFO: dacScan step from 0 .. 19
[09:49:06.964] <TB2> INFO: Test took 23863ms.
[09:49:06.999] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:06.999] <TB2> INFO: dacScan step from 20 .. 39
[09:49:29.933] <TB2> INFO: Test took 22934ms.
[09:49:29.987] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:29.987] <TB2> INFO: dacScan step from 40 .. 59
[09:49:53.861] <TB2> INFO: Test took 23874ms.
[09:49:53.899] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:53.899] <TB2> INFO: dacScan step from 60 .. 79
[09:50:17.951] <TB2> INFO: Test took 24052ms.
[09:50:17.994] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:17.994] <TB2> INFO: dacScan step from 80 .. 99
[09:50:44.827] <TB2> INFO: Test took 26833ms.
[09:50:44.963] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:44.975] <TB2> INFO: dacScan step from 100 .. 119
[09:51:19.280] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (0) != Token Chain Length (4)
[09:51:19.280] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:51:19.280] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:51:19.280] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:51:19.674] <TB2> INFO: Test took 34698ms.
[09:51:19.959] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:20.005] <TB2> INFO: dacScan step from 120 .. 139
[09:51:54.513] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[09:51:54.513] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (136) != TBM ID (137)
[09:51:54.513] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:51:54.513] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:51:54.513] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:51:56.044] <TB2> INFO: Test took 36039ms.
[09:51:56.345] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:56.410] <TB2> INFO: dacScan step from 140 .. 159
[09:52:29.205] <TB2> INFO: Test took 32794ms.
[09:52:29.672] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:29.786] <TB2> INFO: dacScan step from 160 .. 165
[09:52:41.596] <TB2> INFO: Test took 11810ms.
[09:52:41.690] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:04.867] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[09:53:04.876] <TB2> INFO: dacScan step from 0 .. 19
[09:53:27.260] <TB2> INFO: Test took 22383ms.
[09:53:27.309] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:27.309] <TB2> INFO: dacScan step from 20 .. 39
[09:53:49.603] <TB2> INFO: Test took 22293ms.
[09:53:49.640] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:49.640] <TB2> INFO: dacScan step from 40 .. 59
[09:54:13.651] <TB2> INFO: Test took 24011ms.
[09:54:13.691] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:13.691] <TB2> INFO: dacScan step from 60 .. 79
[09:54:37.654] <TB2> INFO: Test took 23963ms.
[09:54:37.697] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:37.698] <TB2> INFO: dacScan step from 80 .. 99
[09:55:04.547] <TB2> INFO: Test took 26850ms.
[09:55:04.699] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:04.719] <TB2> INFO: dacScan step from 100 .. 119
[09:55:35.547] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:55:35.860] <TB2> INFO: Test took 31141ms.
[09:55:36.124] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:36.155] <TB2> INFO: dacScan step from 120 .. 139
[09:56:09.808] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (132) != TBM ID (0)
[09:56:09.808] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:56:09.809] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (133)
[09:56:11.271] <TB2> INFO: Test took 35116ms.
[09:56:11.565] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:11.602] <TB2> INFO: dacScan step from 140 .. 159
[09:56:44.383] <TB2> INFO: Test took 32781ms.
[09:56:44.666] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:44.708] <TB2> INFO: dacScan step from 160 .. 165
[09:56:57.053] <TB2> INFO: Test took 12344ms.
[09:56:57.142] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:20.873] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 166 (20) hits flags = 16 (plus default)
[09:57:20.882] <TB2> INFO: dacScan step from 0 .. 19
[09:57:44.858] <TB2> INFO: Test took 23976ms.
[09:57:44.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:44.901] <TB2> INFO: dacScan step from 20 .. 39
[09:58:08.765] <TB2> INFO: Test took 23864ms.
[09:58:08.801] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:08.801] <TB2> INFO: dacScan step from 40 .. 59
[09:58:32.620] <TB2> INFO: Test took 23819ms.
[09:58:32.659] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:32.659] <TB2> INFO: dacScan step from 60 .. 79
[09:58:55.003] <TB2> INFO: Test took 22344ms.
[09:58:55.045] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:55.046] <TB2> INFO: dacScan step from 80 .. 99
[09:59:21.975] <TB2> INFO: Test took 26929ms.
[09:59:22.114] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:22.126] <TB2> INFO: dacScan step from 100 .. 119
[09:59:56.170] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:59:56.171] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:59:56.561] <TB2> INFO: Test took 34435ms.
[09:59:56.838] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:56.873] <TB2> INFO: dacScan step from 120 .. 139
[10:00:28.471] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[10:00:28.471] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (135) != TBM ID (136)
[10:00:28.471] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[10:00:28.471] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[10:00:28.471] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[10:00:29.901] <TB2> INFO: Test took 33028ms.
[10:00:30.175] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:30.216] <TB2> INFO: dacScan step from 140 .. 159
[10:01:03.591] <TB2> INFO: Test took 33375ms.
[10:01:03.870] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:03.905] <TB2> INFO: dacScan step from 160 .. 166
[10:01:18.023] <TB2> INFO: Test took 14118ms.
[10:01:18.118] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:42.363] <TB2> INFO: PixTestTrim::trimBitTest() done
[10:01:42.365] <TB2> INFO: PixTestTrim::doTest() done, duration: 2713 seconds
[10:01:43.108] <TB2> INFO: ######################################################################
[10:01:43.108] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:01:43.108] <TB2> INFO: ######################################################################
[10:01:46.595] <TB2> INFO: Test took 3485ms.
[10:01:46.619] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:50.365] <TB2> INFO: Test took 3549ms.
[10:01:50.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:54.003] <TB2> INFO: Test took 3565ms.
[10:01:54.068] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:54.074] <TB2> INFO: The DUT currently contains the following objects:
[10:01:54.074] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:54.074] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:01:54.074] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:01:54.074] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:54.074] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:54.074] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.187] <TB2> INFO: Test took 1113ms.
[10:01:55.188] <TB2> INFO: The DUT currently contains the following objects:
[10:01:55.188] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:55.188] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:01:55.188] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:01:55.188] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:55.188] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:55.188] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.300] <TB2> INFO: Test took 1111ms.
[10:01:56.301] <TB2> INFO: The DUT currently contains the following objects:
[10:01:56.301] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:56.301] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:01:56.301] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:01:56.301] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:56.301] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:56.301] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.413] <TB2> INFO: Test took 1112ms.
[10:01:57.414] <TB2> INFO: The DUT currently contains the following objects:
[10:01:57.414] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:57.414] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:01:57.414] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:01:57.414] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:57.414] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:57.414] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.526] <TB2> INFO: Test took 1112ms.
[10:01:58.527] <TB2> INFO: The DUT currently contains the following objects:
[10:01:58.527] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:58.527] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:01:58.527] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:01:58.527] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:58.527] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:58.527] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.639] <TB2> INFO: Test took 1112ms.
[10:01:59.640] <TB2> INFO: The DUT currently contains the following objects:
[10:01:59.640] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:01:59.640] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:01:59.640] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:01:59.640] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:01:59.640] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.640] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.641] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.641] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.641] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:01:59.641] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.752] <TB2> INFO: Test took 1111ms.
[10:02:00.753] <TB2> INFO: The DUT currently contains the following objects:
[10:02:00.753] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:00.753] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:00.753] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:00.753] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:00.753] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.753] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.753] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.753] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.753] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.753] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.753] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.753] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.754] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.754] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.754] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.754] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.754] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.754] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.754] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:00.754] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.865] <TB2> INFO: Test took 1111ms.
[10:02:01.866] <TB2> INFO: The DUT currently contains the following objects:
[10:02:01.866] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:01.866] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:01.866] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:01.866] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:01.866] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.866] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:01.867] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.978] <TB2> INFO: Test took 1111ms.
[10:02:02.979] <TB2> INFO: The DUT currently contains the following objects:
[10:02:02.979] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:02.979] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:02.979] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:02.980] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:02.980] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:02.980] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.091] <TB2> INFO: Test took 1111ms.
[10:02:04.093] <TB2> INFO: The DUT currently contains the following objects:
[10:02:04.093] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:04.093] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:04.093] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:04.093] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:04.093] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:04.093] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.204] <TB2> INFO: Test took 1111ms.
[10:02:05.205] <TB2> INFO: The DUT currently contains the following objects:
[10:02:05.205] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:05.205] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:05.205] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:05.205] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:05.205] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.205] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.205] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.205] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:05.206] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.317] <TB2> INFO: Test took 1111ms.
[10:02:06.318] <TB2> INFO: The DUT currently contains the following objects:
[10:02:06.318] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:06.318] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:06.318] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:06.319] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:06.319] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:06.319] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.430] <TB2> INFO: Test took 1111ms.
[10:02:07.432] <TB2> INFO: The DUT currently contains the following objects:
[10:02:07.432] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:07.432] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:07.432] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:07.432] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:07.432] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:07.432] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.544] <TB2> INFO: Test took 1111ms.
[10:02:08.545] <TB2> INFO: The DUT currently contains the following objects:
[10:02:08.545] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:08.545] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:08.545] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:08.545] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:08.545] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:08.545] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.657] <TB2> INFO: Test took 1112ms.
[10:02:09.658] <TB2> INFO: The DUT currently contains the following objects:
[10:02:09.658] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:09.658] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:09.658] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:09.659] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:09.659] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:09.659] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.770] <TB2> INFO: Test took 1111ms.
[10:02:10.772] <TB2> INFO: The DUT currently contains the following objects:
[10:02:10.772] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:02:10.772] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:02:10.772] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:02:10.772] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:02:10.772] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:10.772] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:02:11.883] <TB2> INFO: Test took 1111ms.
[10:02:11.886] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:06:13.723] <TB2> INFO: Test took 241837ms.
[10:06:15.490] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:15.168] <TB2> INFO: Test took 239678ms.
[10:10:16.825] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.832] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.840] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.847] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.854] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.861] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.868] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.876] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.883] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.890] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.897] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.904] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.911] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.918] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.925] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.932] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:10:16.962] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:10:16.962] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:10:16.962] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:10:16.963] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:10:16.963] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:10:16.963] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:10:16.963] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:10:16.964] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:10:16.964] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:10:16.964] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:10:16.964] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:10:16.965] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:10:16.965] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:10:16.973] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:10:16.973] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:10:16.973] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:10:20.500] <TB2> INFO: Test took 3525ms.
[10:10:24.309] <TB2> INFO: Test took 3531ms.
[10:10:28.094] <TB2> INFO: Test took 3502ms.
[10:10:28.364] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:29.291] <TB2> INFO: Test took 927ms.
[10:10:29.294] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:30.400] <TB2> INFO: Test took 1107ms.
[10:10:30.401] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:31.509] <TB2> INFO: Test took 1108ms.
[10:10:31.510] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:32.623] <TB2> INFO: Test took 1113ms.
[10:10:32.625] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:33.738] <TB2> INFO: Test took 1113ms.
[10:10:33.740] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:34.854] <TB2> INFO: Test took 1114ms.
[10:10:34.856] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:35.969] <TB2> INFO: Test took 1113ms.
[10:10:35.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:37.083] <TB2> INFO: Test took 1112ms.
[10:10:37.086] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:38.199] <TB2> INFO: Test took 1113ms.
[10:10:38.201] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:39.314] <TB2> INFO: Test took 1113ms.
[10:10:39.317] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:40.425] <TB2> INFO: Test took 1108ms.
[10:10:40.427] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:41.536] <TB2> INFO: Test took 1109ms.
[10:10:41.537] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:42.645] <TB2> INFO: Test took 1108ms.
[10:10:42.647] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:43.755] <TB2> INFO: Test took 1108ms.
[10:10:43.757] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:44.866] <TB2> INFO: Test took 1109ms.
[10:10:44.867] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:45.976] <TB2> INFO: Test took 1109ms.
[10:10:45.978] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:47.086] <TB2> INFO: Test took 1108ms.
[10:10:47.088] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:48.196] <TB2> INFO: Test took 1108ms.
[10:10:48.198] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:49.306] <TB2> INFO: Test took 1108ms.
[10:10:49.308] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:50.416] <TB2> INFO: Test took 1108ms.
[10:10:50.418] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:51.526] <TB2> INFO: Test took 1108ms.
[10:10:51.528] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:52.636] <TB2> INFO: Test took 1108ms.
[10:10:52.637] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:53.747] <TB2> INFO: Test took 1110ms.
[10:10:53.749] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:54.856] <TB2> INFO: Test took 1108ms.
[10:10:54.858] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:55.966] <TB2> INFO: Test took 1108ms.
[10:10:55.968] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:57.077] <TB2> INFO: Test took 1109ms.
[10:10:57.079] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:58.187] <TB2> INFO: Test took 1109ms.
[10:10:58.190] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:10:59.297] <TB2> INFO: Test took 1108ms.
[10:10:59.299] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:00.406] <TB2> INFO: Test took 1107ms.
[10:11:00.408] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:01.520] <TB2> INFO: Test took 1113ms.
[10:11:01.522] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:02.630] <TB2> INFO: Test took 1108ms.
[10:11:02.632] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:11:03.744] <TB2> INFO: Test took 1113ms.
[10:11:04.270] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 561 seconds
[10:11:04.270] <TB2> INFO: PH scale (per ROC): 89 81 86 80 77 81 80 89 85 94 79 81 77 95 86 83
[10:11:04.270] <TB2> INFO: PH offset (per ROC): 139 150 154 157 158 158 157 153 145 140 161 169 164 154 158 143
[10:11:04.448] <TB2> INFO: ######################################################################
[10:11:04.448] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:11:04.448] <TB2> INFO: ######################################################################
[10:11:04.458] <TB2> INFO: scanning low vcal = 10
[10:11:08.432] <TB2> INFO: Test took 3974ms.
[10:11:08.437] <TB2> INFO: scanning low vcal = 20
[10:11:12.405] <TB2> INFO: Test took 3968ms.
[10:11:12.410] <TB2> INFO: scanning low vcal = 30
[10:11:16.393] <TB2> INFO: Test took 3983ms.
[10:11:16.400] <TB2> INFO: scanning low vcal = 40
[10:11:20.910] <TB2> INFO: Test took 4510ms.
[10:11:20.977] <TB2> INFO: scanning low vcal = 50
[10:11:25.464] <TB2> INFO: Test took 4487ms.
[10:11:25.528] <TB2> INFO: scanning low vcal = 60
[10:11:30.043] <TB2> INFO: Test took 4515ms.
[10:11:30.117] <TB2> INFO: scanning low vcal = 70
[10:11:34.606] <TB2> INFO: Test took 4489ms.
[10:11:34.669] <TB2> INFO: scanning low vcal = 80
[10:11:39.128] <TB2> INFO: Test took 4459ms.
[10:11:39.194] <TB2> INFO: scanning low vcal = 90
[10:11:43.728] <TB2> INFO: Test took 4534ms.
[10:11:43.790] <TB2> INFO: scanning low vcal = 100
[10:11:48.278] <TB2> INFO: Test took 4488ms.
[10:11:48.341] <TB2> INFO: scanning low vcal = 110
[10:11:52.813] <TB2> INFO: Test took 4472ms.
[10:11:52.876] <TB2> INFO: scanning low vcal = 120
[10:11:57.338] <TB2> INFO: Test took 4462ms.
[10:11:57.398] <TB2> INFO: scanning low vcal = 130
[10:12:01.905] <TB2> INFO: Test took 4507ms.
[10:12:01.968] <TB2> INFO: scanning low vcal = 140
[10:12:06.459] <TB2> INFO: Test took 4491ms.
[10:12:06.520] <TB2> INFO: scanning low vcal = 150
[10:12:11.007] <TB2> INFO: Test took 4487ms.
[10:12:11.074] <TB2> INFO: scanning low vcal = 160
[10:12:15.524] <TB2> INFO: Test took 4450ms.
[10:12:15.586] <TB2> INFO: scanning low vcal = 170
[10:12:20.092] <TB2> INFO: Test took 4506ms.
[10:12:20.160] <TB2> INFO: scanning low vcal = 180
[10:12:24.667] <TB2> INFO: Test took 4506ms.
[10:12:24.736] <TB2> INFO: scanning low vcal = 190
[10:12:29.354] <TB2> INFO: Test took 4618ms.
[10:12:29.416] <TB2> INFO: scanning low vcal = 200
[10:12:33.917] <TB2> INFO: Test took 4501ms.
[10:12:34.017] <TB2> INFO: scanning low vcal = 210
[10:12:38.335] <TB2> INFO: Test took 4318ms.
[10:12:38.392] <TB2> INFO: scanning low vcal = 220
[10:12:42.703] <TB2> INFO: Test took 4310ms.
[10:12:42.762] <TB2> INFO: scanning low vcal = 230
[10:12:47.061] <TB2> INFO: Test took 4299ms.
[10:12:47.123] <TB2> INFO: scanning low vcal = 240
[10:12:51.422] <TB2> INFO: Test took 4299ms.
[10:12:51.481] <TB2> INFO: scanning low vcal = 250
[10:12:55.814] <TB2> INFO: Test took 4333ms.
[10:12:55.873] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[10:13:00.182] <TB2> INFO: Test took 4309ms.
[10:13:00.241] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[10:13:04.550] <TB2> INFO: Test took 4309ms.
[10:13:04.609] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[10:13:08.909] <TB2> INFO: Test took 4300ms.
[10:13:08.968] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[10:13:13.483] <TB2> INFO: Test took 4515ms.
[10:13:13.570] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:13:18.110] <TB2> INFO: Test took 4540ms.
[10:13:18.744] <TB2> INFO: PixTestGainPedestal::measure() done
[10:13:53.025] <TB2> INFO: PixTestGainPedestal::fit() done
[10:13:53.025] <TB2> INFO: non-linearity mean: 0.951 0.956 0.955 0.959 0.958 0.954 0.952 0.960 0.948 0.957 0.957 0.954 0.960 0.956 0.958 0.957
[10:13:53.025] <TB2> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.006 0.006 0.007 0.006 0.006 0.005 0.005 0.007 0.007 0.005 0.005 0.006
[10:13:53.026] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:13:53.044] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:13:53.063] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:13:53.081] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:13:53.100] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:13:53.119] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:13:53.137] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:13:53.156] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:13:53.175] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:13:53.193] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:13:53.212] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:13:53.231] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:13:53.249] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:13:53.268] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:13:53.287] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:13:53.305] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2062_FullQualification_2015-08-05_10h47m_1438764466//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:13:53.324] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[10:13:53.330] <TB2> INFO: enter test to run
[10:13:53.330] <TB2> INFO: test: exit no parameter change
[10:13:53.768] <TB2> QUIET: Connection to board 156 closed.
[10:13:53.784] <TB2> INFO: pXar: this is the end, my friend