[12:24:17.967] <TB1> INFO: *** Welcome to pxar ***
[12:24:17.967] <TB1> INFO: *** Today: 2015/08/05
[12:24:17.967] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C15.dat
[12:24:17.968] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:24:17.968] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//defaultMaskFile.dat
[12:24:17.968] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters_C15.dat
[12:24:18.042] <TB1> INFO: clk: 4
[12:24:18.042] <TB1> INFO: ctr: 4
[12:24:18.042] <TB1> INFO: sda: 19
[12:24:18.042] <TB1> INFO: tin: 9
[12:24:18.042] <TB1> INFO: level: 15
[12:24:18.042] <TB1> INFO: triggerdelay: 0
[12:24:18.042] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[12:24:18.042] <TB1> INFO: Log level: INFO
[12:24:18.056] <TB1> INFO: Found DTB DTB_WXBYFL
[12:24:18.069] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[12:24:18.073] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[12:24:18.076] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[12:24:19.607] <TB1> INFO: DUT info:
[12:24:19.607] <TB1> INFO: The DUT currently contains the following objects:
[12:24:19.607] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:24:19.607] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:24:19.607] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:24:19.607] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:24:19.607] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:19.607] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:20.009] <TB1> INFO: enter 'restricted' command line mode
[12:24:20.009] <TB1> INFO: enter test to run
[12:24:20.009] <TB1> INFO: test: pretest no parameter change
[12:24:20.009] <TB1> INFO: running: pretest
[12:24:20.016] <TB1> INFO: ######################################################################
[12:24:20.016] <TB1> INFO: PixTestPretest::doTest()
[12:24:20.016] <TB1> INFO: ######################################################################
[12:24:20.018] <TB1> INFO: ----------------------------------------------------------------------
[12:24:20.018] <TB1> INFO: PixTestPretest::programROC()
[12:24:20.018] <TB1> INFO: ----------------------------------------------------------------------
[12:24:38.038] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:24:38.038] <TB1> INFO: IA differences per ROC: 17.7 17.7 19.3 20.1 20.1 18.5 19.3 18.5 19.3 19.3 17.7 20.1 18.5 17.7 21.7 19.3
[12:24:38.117] <TB1> INFO: ----------------------------------------------------------------------
[12:24:38.117] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:24:38.117] <TB1> INFO: ----------------------------------------------------------------------
[12:24:57.718] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[12:24:57.724] <TB1> INFO: ----------------------------------------------------------------------
[12:24:57.724] <TB1> INFO: PixTestPretest::findWorkingPixel()
[12:24:57.724] <TB1> INFO: ----------------------------------------------------------------------
[12:25:07.611] <TB1> INFO: Test took 9881ms.
[12:25:07.925] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:25:07.976] <TB1> INFO: ----------------------------------------------------------------------
[12:25:07.976] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[12:25:07.976] <TB1> INFO: ----------------------------------------------------------------------
[12:25:17.478] <TB1> INFO: Test took 9496ms.
[12:25:17.806] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[12:25:17.806] <TB1> INFO: CalDel: 155 123 154 153 138 141 129 108 146 135 132 143 132 148 143 131
[12:25:17.806] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:25:17.812] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C0.dat
[12:25:17.812] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C1.dat
[12:25:17.812] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C2.dat
[12:25:17.812] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C3.dat
[12:25:17.813] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C4.dat
[12:25:17.813] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C5.dat
[12:25:17.813] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C6.dat
[12:25:17.814] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C7.dat
[12:25:17.814] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C8.dat
[12:25:17.814] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C9.dat
[12:25:17.815] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C10.dat
[12:25:17.815] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C11.dat
[12:25:17.815] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C12.dat
[12:25:17.816] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C13.dat
[12:25:17.816] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C14.dat
[12:25:17.816] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C15.dat
[12:25:17.817] <TB1> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[12:25:17.920] <TB1> INFO: enter test to run
[12:25:17.920] <TB1> INFO: test: fulltest no parameter change
[12:25:17.920] <TB1> INFO: running: fulltest
[12:25:17.920] <TB1> INFO: ######################################################################
[12:25:17.920] <TB1> INFO: PixTestFullTest::doTest()
[12:25:17.920] <TB1> INFO: ######################################################################
[12:25:17.922] <TB1> INFO: ######################################################################
[12:25:17.922] <TB1> INFO: PixTestAlive::doTest()
[12:25:17.922] <TB1> INFO: ######################################################################
[12:25:17.924] <TB1> INFO: ----------------------------------------------------------------------
[12:25:17.924] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:17.924] <TB1> INFO: ----------------------------------------------------------------------
[12:25:22.521] <TB1> INFO: Test took 4595ms.
[12:25:22.542] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:22.782] <TB1> INFO: PixTestAlive::aliveTest() done
[12:25:22.782] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
[12:25:22.784] <TB1> INFO: ----------------------------------------------------------------------
[12:25:22.784] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:22.784] <TB1> INFO: ----------------------------------------------------------------------
[12:25:26.081] <TB1> INFO: Test took 3294ms.
[12:25:26.085] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:26.086] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:25:26.329] <TB1> INFO: PixTestAlive::maskTest() done
[12:25:26.329] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:26.331] <TB1> INFO: ----------------------------------------------------------------------
[12:25:26.332] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:26.332] <TB1> INFO: ----------------------------------------------------------------------
[12:25:30.639] <TB1> INFO: Test took 4306ms.
[12:25:30.674] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:30.920] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[12:25:30.920] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:30.920] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:25:30.930] <TB1> INFO: ######################################################################
[12:25:30.930] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:25:30.930] <TB1> INFO: ######################################################################
[12:25:30.935] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:25:30.950] <TB1> INFO: dacScan step from 0 .. 29
[12:25:58.380] <TB1> INFO: Test took 27430ms.
[12:25:58.418] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:58.418] <TB1> INFO: dacScan step from 30 .. 59
[12:26:28.471] <TB1> INFO: Test took 30052ms.
[12:26:28.594] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:28.610] <TB1> INFO: dacScan step from 60 .. 89
[12:27:08.184] <TB1> INFO: Test took 39574ms.
[12:27:08.467] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:08.545] <TB1> INFO: dacScan step from 90 .. 119
[12:27:47.295] <TB1> INFO: Test took 38750ms.
[12:27:47.571] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:47.656] <TB1> INFO: dacScan step from 120 .. 149
[12:28:36.347] <TB1> INFO: Test took 48691ms.
[12:28:36.557] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:59.815] <TB1> INFO: PixTestBBMap::doTest() done, duration: 208 seconds
[12:28:59.815] <TB1> INFO: number of dead bumps (per ROC): 5 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0
[12:28:59.815] <TB1> INFO: separation cut (per ROC): 89 94 99 85 84 100 96 99 89 86 82 81 86 85 83 78
[12:28:59.886] <TB1> INFO: ######################################################################
[12:28:59.886] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[12:28:59.886] <TB1> INFO: ######################################################################
[12:28:59.886] <TB1> INFO: ----------------------------------------------------------------------
[12:28:59.886] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:28:59.886] <TB1> INFO: ----------------------------------------------------------------------
[12:28:59.886] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:28:59.895] <TB1> INFO: dacScan step from 0 .. 3
[12:29:26.062] <TB1> INFO: Test took 26167ms.
[12:29:26.098] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:26.098] <TB1> INFO: dacScan step from 4 .. 7
[12:29:51.377] <TB1> INFO: Test took 25279ms.
[12:29:51.408] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:51.408] <TB1> INFO: dacScan step from 8 .. 11
[12:30:18.393] <TB1> INFO: Test took 26985ms.
[12:30:18.425] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:18.426] <TB1> INFO: dacScan step from 12 .. 15
[12:30:44.469] <TB1> INFO: Test took 26043ms.
[12:30:44.505] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:44.505] <TB1> INFO: dacScan step from 16 .. 19
[12:31:10.347] <TB1> INFO: Test took 25842ms.
[12:31:10.378] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:10.378] <TB1> INFO: dacScan step from 20 .. 23
[12:31:36.929] <TB1> INFO: Test took 26551ms.
[12:31:36.958] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:36.958] <TB1> INFO: dacScan step from 24 .. 27
[12:32:03.809] <TB1> INFO: Test took 26851ms.
[12:32:03.841] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:03.841] <TB1> INFO: dacScan step from 28 .. 31
[12:32:30.227] <TB1> INFO: Test took 26386ms.
[12:32:30.262] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:30.262] <TB1> INFO: dacScan step from 32 .. 35
[12:32:56.320] <TB1> INFO: Test took 26058ms.
[12:32:56.356] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:56.356] <TB1> INFO: dacScan step from 36 .. 39
[12:33:23.142] <TB1> INFO: Test took 26786ms.
[12:33:23.177] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:23.177] <TB1> INFO: dacScan step from 40 .. 43
[12:33:49.234] <TB1> INFO: Test took 26056ms.
[12:33:49.267] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:49.267] <TB1> INFO: dacScan step from 44 .. 47
[12:34:15.926] <TB1> INFO: Test took 26659ms.
[12:34:15.953] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:15.953] <TB1> INFO: dacScan step from 48 .. 51
[12:34:43.192] <TB1> INFO: Test took 27238ms.
[12:34:43.228] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:43.228] <TB1> INFO: dacScan step from 52 .. 55
[12:35:09.648] <TB1> INFO: Test took 26420ms.
[12:35:09.680] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:09.680] <TB1> INFO: dacScan step from 56 .. 59
[12:35:36.338] <TB1> INFO: Test took 26658ms.
[12:35:36.370] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:36.370] <TB1> INFO: dacScan step from 60 .. 63
[12:36:02.711] <TB1> INFO: Test took 26341ms.
[12:36:02.739] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:02.739] <TB1> INFO: dacScan step from 64 .. 67
[12:36:30.350] <TB1> INFO: Test took 27611ms.
[12:36:30.382] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:30.383] <TB1> INFO: dacScan step from 68 .. 71
[12:36:59.396] <TB1> INFO: Test took 29013ms.
[12:36:59.437] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:59.437] <TB1> INFO: dacScan step from 72 .. 75
[12:37:29.095] <TB1> INFO: Test took 29658ms.
[12:37:29.143] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:29.144] <TB1> INFO: dacScan step from 76 .. 79
[12:38:00.056] <TB1> INFO: Test took 30912ms.
[12:38:00.120] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:00.122] <TB1> INFO: dacScan step from 80 .. 83
[12:38:34.591] <TB1> INFO: Test took 34468ms.
[12:38:34.701] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:34.706] <TB1> INFO: dacScan step from 84 .. 87
[12:39:12.696] <TB1> INFO: Test took 37990ms.
[12:39:12.836] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:12.844] <TB1> INFO: dacScan step from 88 .. 91
[12:39:53.147] <TB1> INFO: Test took 40303ms.
[12:39:53.323] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:53.331] <TB1> INFO: dacScan step from 92 .. 95

[12:40:37.711] <TB1> INFO: Test took 44379ms.
[12:40:37.906] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:37.914] <TB1> INFO: dacScan step from 96 .. 99
[12:41:22.770] <TB1> INFO: Test took 44855ms.
[12:41:22.992] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:23.004] <TB1> INFO: dacScan step from 100 .. 103

[12:42:11.002] <TB1> INFO: Test took 47998ms.
[12:42:11.231] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:11.242] <TB1> INFO: dacScan step from 104 .. 107
[12:42:59.162] <TB1> INFO: Test took 47920ms.
[12:42:59.438] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:59.451] <TB1> INFO: dacScan step from 108 .. 111





[12:43:43.423] <TB1> INFO: Test took 43972ms.
[12:43:43.668] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:43.681] <TB1> INFO: dacScan step from 112 .. 115



[12:44:22.720] <TB1> INFO: Test took 39038ms.
[12:44:23.007] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:23.019] <TB1> INFO: dacScan step from 116 .. 119





[12:45:32.308] <TB1> INFO: Test took 69289ms.
[12:45:32.556] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:32.567] <TB1> INFO: dacScan step from 120 .. 123
[12:46:14.450] <TB1> INFO: Test took 41883ms.
[12:46:14.668] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:14.680] <TB1> INFO: dacScan step from 124 .. 127
[12:46:58.601] <TB1> INFO: Test took 43921ms.
[12:46:58.842] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:58.854] <TB1> INFO: dacScan step from 128 .. 131
[12:47:54.140] <TB1> INFO: Test took 55286ms.
[12:47:54.395] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:54.408] <TB1> INFO: dacScan step from 132 .. 135
[12:48:57.580] <TB1> INFO: Test took 63172ms.
[12:48:57.821] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:57.834] <TB1> INFO: dacScan step from 136 .. 139
[12:49:40.205] <TB1> INFO: Test took 42371ms.
[12:49:40.457] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:40.470] <TB1> INFO: dacScan step from 140 .. 143
[12:50:35.477] <TB1> INFO: Test took 55007ms.
[12:50:35.719] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:35.730] <TB1> INFO: dacScan step from 144 .. 147
[12:51:34.701] <TB1> INFO: Test took 58971ms.
[12:51:34.934] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:34.947] <TB1> INFO: dacScan step from 148 .. 149
[12:52:05.604] <TB1> INFO: Test took 30657ms.
[12:52:05.739] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:05.747] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:07.285] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:08.827] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:10.346] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:11.985] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:13.577] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:15.080] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:16.621] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:18.244] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:19.800] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:21.331] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:22.913] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:24.540] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:26.158] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:27.703] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:29.288] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:52:30.777] <TB1> INFO: PixTestScurves::scurves() done
[12:52:30.777] <TB1> INFO: Vcal mean: 93.88 90.07 98.95 95.73 84.25 97.48 97.79 89.78 95.61 86.49 82.92 85.40 90.25 81.01 79.47 80.56
[12:52:30.777] <TB1> INFO: Vcal RMS: 5.98 5.49 6.08 6.10 4.63 6.08 5.61 6.07 5.55 5.27 5.35 5.69 5.98 4.59 4.85 5.12
[12:52:30.777] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1410 seconds
[12:52:30.848] <TB1> INFO: ######################################################################
[12:52:30.848] <TB1> INFO: PixTestTrim::doTest()
[12:52:30.848] <TB1> INFO: ######################################################################
[12:52:30.849] <TB1> INFO: ----------------------------------------------------------------------
[12:52:30.849] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:52:30.849] <TB1> INFO: ----------------------------------------------------------------------
[12:52:30.930] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:52:30.930] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:52:30.939] <TB1> INFO: dacScan step from 0 .. 19
[12:52:57.887] <TB1> INFO: Test took 26948ms.
[12:52:57.911] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:57.911] <TB1> INFO: dacScan step from 20 .. 39
[12:53:25.446] <TB1> INFO: Test took 27535ms.
[12:53:25.468] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:25.468] <TB1> INFO: dacScan step from 40 .. 59
[12:53:52.017] <TB1> INFO: Test took 26549ms.
[12:53:52.045] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:52.045] <TB1> INFO: dacScan step from 60 .. 79
[12:54:12.752] <TB1> INFO: Test took 20707ms.
[12:54:12.781] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:12.781] <TB1> INFO: dacScan step from 80 .. 99
[12:54:32.837] <TB1> INFO: Test took 20056ms.
[12:54:32.888] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:32.895] <TB1> INFO: dacScan step from 100 .. 119
[12:54:59.774] <TB1> INFO: Test took 26879ms.
[12:54:59.931] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:59.963] <TB1> INFO: dacScan step from 120 .. 139
[12:55:33.881] <TB1> INFO: Test took 33918ms.
[12:55:34.051] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:34.078] <TB1> INFO: dacScan step from 140 .. 159
[12:55:55.497] <TB1> INFO: Test took 21418ms.
[12:55:55.571] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:19.121] <TB1> INFO: ROC 0 VthrComp = 96
[12:56:19.121] <TB1> INFO: ROC 1 VthrComp = 96
[12:56:19.122] <TB1> INFO: ROC 2 VthrComp = 101
[12:56:19.122] <TB1> INFO: ROC 3 VthrComp = 98
[12:56:19.122] <TB1> INFO: ROC 4 VthrComp = 92
[12:56:19.122] <TB1> INFO: ROC 5 VthrComp = 100
[12:56:19.122] <TB1> INFO: ROC 6 VthrComp = 99
[12:56:19.122] <TB1> INFO: ROC 7 VthrComp = 93
[12:56:19.122] <TB1> INFO: ROC 8 VthrComp = 98
[12:56:19.122] <TB1> INFO: ROC 9 VthrComp = 92
[12:56:19.123] <TB1> INFO: ROC 10 VthrComp = 86
[12:56:19.123] <TB1> INFO: ROC 11 VthrComp = 87
[12:56:19.123] <TB1> INFO: ROC 12 VthrComp = 90
[12:56:19.123] <TB1> INFO: ROC 13 VthrComp = 86
[12:56:19.123] <TB1> INFO: ROC 14 VthrComp = 85
[12:56:19.123] <TB1> INFO: ROC 15 VthrComp = 83
[12:56:19.123] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:56:19.123] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:56:19.135] <TB1> INFO: dacScan step from 0 .. 19
[12:56:39.266] <TB1> INFO: Test took 20131ms.
[12:56:39.293] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:39.293] <TB1> INFO: dacScan step from 20 .. 39
[12:56:59.615] <TB1> INFO: Test took 20322ms.
[12:56:59.651] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:59.655] <TB1> INFO: dacScan step from 40 .. 59
[12:57:26.550] <TB1> INFO: Test took 26896ms.
[12:57:26.737] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:26.776] <TB1> INFO: dacScan step from 60 .. 79
[12:58:07.888] <TB1> INFO: Test took 41111ms.
[12:58:08.077] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:08.125] <TB1> INFO: dacScan step from 80 .. 99
[12:58:38.311] <TB1> INFO: Test took 30186ms.
[12:58:38.482] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:38.535] <TB1> INFO: dacScan step from 100 .. 119
[12:59:13.044] <TB1> INFO: Test took 34509ms.
[12:59:13.220] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:13.266] <TB1> INFO: dacScan step from 120 .. 139
[12:59:39.389] <TB1> INFO: Test took 26123ms.
[12:59:39.548] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:39.589] <TB1> INFO: dacScan step from 140 .. 159
[13:00:06.156] <TB1> INFO: Test took 26567ms.
[13:00:06.342] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:29.915] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.9225 for pixel 8/52 mean/min/max = 46.3174/31.4689/61.1659
[13:00:29.915] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 58.6812 for pixel 22/77 mean/min/max = 45.2237/31.6153/58.8321
[13:00:29.915] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 62.0462 for pixel 51/7 mean/min/max = 46.6901/31.2444/62.1358
[13:00:29.916] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 60.4583 for pixel 16/77 mean/min/max = 46.0529/31.6045/60.5012
[13:00:29.916] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 56.5833 for pixel 23/69 mean/min/max = 44.5428/32.2876/56.798
[13:00:29.916] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 60.3845 for pixel 25/77 mean/min/max = 45.9099/31.3907/60.4291
[13:00:29.916] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.5832 for pixel 14/65 mean/min/max = 45.0559/31.5003/58.6115
[13:00:29.917] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.7895 for pixel 14/74 mean/min/max = 46.2283/31.6423/60.8143
[13:00:29.917] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 59.3894 for pixel 0/69 mean/min/max = 45.6033/31.6743/59.5322
[13:00:29.917] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.3137 for pixel 7/79 mean/min/max = 45.606/31.897/59.3149
[13:00:29.918] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.9864 for pixel 11/67 mean/min/max = 46.5176/32.0447/60.9905
[13:00:29.918] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 61.1616 for pixel 51/74 mean/min/max = 46.4281/31.5178/61.3384
[13:00:29.918] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.9235 for pixel 30/5 mean/min/max = 47.2645/32.5808/61.9481
[13:00:29.918] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 58.1866 for pixel 1/79 mean/min/max = 45.0658/31.9051/58.2266
[13:00:29.919] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 59.2451 for pixel 35/79 mean/min/max = 45.6615/31.6712/59.6519
[13:00:29.919] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 60.0635 for pixel 0/73 mean/min/max = 46.0516/31.8509/60.2524
[13:00:29.919] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:03:03.269] <TB1> INFO: Test took 153350ms.
[13:03:04.787] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:03:04.799] <TB1> INFO: dacScan step from 0 .. 19
[13:03:48.016] <TB1> INFO: Test took 43217ms.
[13:03:48.072] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:48.074] <TB1> INFO: dacScan step from 20 .. 39
[13:04:51.460] <TB1> INFO: Test took 63386ms.
[13:04:51.728] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:51.763] <TB1> INFO: dacScan step from 40 .. 59


[13:05:46.670] <TB1> INFO: Test took 54907ms.
[13:05:46.966] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:47.014] <TB1> INFO: dacScan step from 60 .. 79

[13:06:40.425] <TB1> INFO: Test took 53411ms.
[13:06:40.717] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:40.765] <TB1> INFO: dacScan step from 80 .. 99
[13:07:40.634] <TB1> INFO: Test took 59869ms.
[13:07:40.969] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:41.019] <TB1> INFO: dacScan step from 100 .. 119



[13:08:26.335] <TB1> INFO: Test took 45316ms.
[13:08:26.614] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:26.664] <TB1> INFO: dacScan step from 120 .. 139
[13:09:13.463] <TB1> INFO: Test took 46799ms.
[13:09:13.738] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:13.784] <TB1> INFO: dacScan step from 140 .. 159
[13:10:19.261] <TB1> INFO: Test took 65477ms.
[13:10:19.528] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:19.574] <TB1> INFO: dacScan step from 160 .. 179



[13:11:13.982] <TB1> INFO: Test took 54407ms.
[13:11:14.265] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:14.310] <TB1> INFO: dacScan step from 180 .. 199


[13:12:08.488] <TB1> INFO: Test took 54177ms.
[13:12:08.782] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:35.795] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.011431 .. 255.000000
[13:12:35.871] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:12:35.879] <TB1> INFO: dacScan step from 0 .. 19
[13:12:51.206] <TB1> INFO: Test took 15327ms.
[13:12:51.230] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:51.230] <TB1> INFO: dacScan step from 20 .. 39
[13:13:14.569] <TB1> INFO: Test took 23340ms.
[13:13:14.663] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:14.679] <TB1> INFO: dacScan step from 40 .. 59
[13:13:38.124] <TB1> INFO: Test took 23445ms.
[13:13:38.278] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:38.330] <TB1> INFO: dacScan step from 60 .. 79
[13:14:02.064] <TB1> INFO: Test took 23734ms.
[13:14:02.226] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:02.279] <TB1> INFO: dacScan step from 80 .. 99
[13:14:25.806] <TB1> INFO: Test took 23527ms.
[13:14:25.964] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:26.015] <TB1> INFO: dacScan step from 100 .. 119
[13:14:52.736] <TB1> INFO: Test took 26721ms.
[13:14:52.882] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:52.925] <TB1> INFO: dacScan step from 120 .. 139
[13:15:17.666] <TB1> INFO: Test took 24741ms.
[13:15:17.806] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:17.849] <TB1> INFO: dacScan step from 140 .. 159
[13:15:42.727] <TB1> INFO: Test took 24878ms.
[13:15:42.881] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:42.930] <TB1> INFO: dacScan step from 160 .. 179
[13:16:04.951] <TB1> INFO: Test took 22021ms.
[13:16:05.108] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:05.157] <TB1> INFO: dacScan step from 180 .. 199
[13:16:31.039] <TB1> INFO: Test took 25882ms.
[13:16:31.197] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:31.248] <TB1> INFO: dacScan step from 200 .. 219
[13:17:01.563] <TB1> INFO: Test took 30315ms.
[13:17:01.707] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:01.759] <TB1> INFO: dacScan step from 220 .. 239
[13:17:40.045] <TB1> INFO: Test took 38286ms.
[13:17:40.192] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:40.242] <TB1> INFO: dacScan step from 240 .. 255
[13:18:00.162] <TB1> INFO: Test took 19920ms.
[13:18:00.290] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:33.668] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 0.220719 .. 60.060928
[13:18:33.743] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 70 (20) hits flags = 16 (plus default)
[13:18:33.751] <TB1> INFO: dacScan step from 0 .. 19
[13:18:51.200] <TB1> INFO: Test took 17449ms.
[13:18:51.221] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:51.221] <TB1> INFO: dacScan step from 20 .. 39
[13:19:10.410] <TB1> INFO: Test took 19189ms.
[13:19:10.490] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:10.507] <TB1> INFO: dacScan step from 40 .. 59
[13:19:33.640] <TB1> INFO: Test took 23133ms.
[13:19:33.789] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:33.836] <TB1> INFO: dacScan step from 60 .. 70
[13:19:48.620] <TB1> INFO: Test took 14784ms.
[13:19:48.704] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:06.780] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 2.214590 .. 60.060928
[13:20:06.860] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 2 .. 70 (20) hits flags = 16 (plus default)
[13:20:06.869] <TB1> INFO: dacScan step from 2 .. 21
[13:20:23.325] <TB1> INFO: Test took 16456ms.
[13:20:23.344] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:23.344] <TB1> INFO: dacScan step from 22 .. 41
[13:20:45.192] <TB1> INFO: Test took 21847ms.
[13:20:45.280] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:45.301] <TB1> INFO: dacScan step from 42 .. 61
[13:21:20.967] <TB1> INFO: Test took 35666ms.
[13:21:21.132] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:21.186] <TB1> INFO: dacScan step from 62 .. 70
[13:21:32.761] <TB1> INFO: Test took 11575ms.
[13:21:32.837] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:50.613] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 1.990076 .. 60.060928
[13:21:50.689] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 70 (20) hits flags = 16 (plus default)
[13:21:50.697] <TB1> INFO: dacScan step from 1 .. 20
[13:22:07.191] <TB1> INFO: Test took 16494ms.
[13:22:07.220] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:07.220] <TB1> INFO: dacScan step from 21 .. 40
[13:22:31.311] <TB1> INFO: Test took 24090ms.
[13:22:31.393] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:31.416] <TB1> INFO: dacScan step from 41 .. 60
[13:23:09.600] <TB1> INFO: Test took 38184ms.
[13:23:09.749] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:09.801] <TB1> INFO: dacScan step from 61 .. 70
[13:23:29.990] <TB1> INFO: Test took 20189ms.
[13:23:30.071] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:49.033] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:23:49.033] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:23:49.041] <TB1> INFO: dacScan step from 15 .. 34
[13:24:22.355] <TB1> INFO: Test took 33314ms.
[13:24:22.429] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:22.440] <TB1> INFO: dacScan step from 35 .. 54



[13:25:25.401] <TB1> INFO: Test took 62961ms.
[13:25:25.725] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:25.777] <TB1> INFO: dacScan step from 55 .. 55
[13:25:31.043] <TB1> INFO: Test took 5266ms.
[13:25:31.067] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:25:44.071] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:25:44.072] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:25:44.072] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:25:44.072] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:25:44.072] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:25:44.072] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:25:44.072] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:25:44.072] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:25:44.081] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:25:44.089] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:25:44.097] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:25:44.104] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:25:44.112] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:25:44.120] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:25:44.128] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:25:44.136] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:25:44.143] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:25:44.151] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:25:44.159] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:25:44.167] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:25:44.175] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:25:44.183] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:25:44.190] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:25:44.198] <TB1> INFO: PixTestTrim::trimTest() done
[13:25:44.198] <TB1> INFO: vtrim: 112 108 114 113 97 136 112 123 106 113 206 104 118 109 116 107
[13:25:44.198] <TB1> INFO: vthrcomp: 96 96 101 98 92 100 99 93 98 92 86 87 90 86 85 83
[13:25:44.198] <TB1> INFO: vcal mean: 35.04 35.04 35.08 35.14 35.06 34.98 35.03 35.07 35.02 35.06 35.00 35.11 35.06 35.02 35.04 34.99
[13:25:44.198] <TB1> INFO: vcal RMS: 1.18 1.05 1.08 1.14 1.02 1.10 1.34 1.03 1.06 1.05 2.45 1.02 1.07 1.01 0.96 1.08
[13:25:44.198] <TB1> INFO: bits mean: 9.77 10.12 9.27 9.90 9.78 10.21 10.02 9.94 9.64 9.68 11.78 9.54 9.47 9.90 9.73 9.90
[13:25:44.198] <TB1> INFO: bits RMS: 2.59 2.45 2.82 2.49 2.59 2.37 2.56 2.47 2.67 2.62 1.58 2.68 2.53 2.59 2.63 2.51
[13:25:44.208] <TB1> INFO: ----------------------------------------------------------------------
[13:25:44.208] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:25:44.208] <TB1> INFO: ----------------------------------------------------------------------
[13:25:44.212] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:25:44.221] <TB1> INFO: dacScan step from 0 .. 19
[13:26:25.837] <TB1> INFO: Test took 41616ms.
[13:26:25.875] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:25.875] <TB1> INFO: dacScan step from 20 .. 39
[13:26:56.490] <TB1> INFO: Test took 30616ms.
[13:26:56.531] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:56.531] <TB1> INFO: dacScan step from 40 .. 59
[13:27:26.269] <TB1> INFO: Test took 29738ms.
[13:27:26.306] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:26.306] <TB1> INFO: dacScan step from 60 .. 79
[13:27:56.369] <TB1> INFO: Test took 30063ms.
[13:27:56.410] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:56.410] <TB1> INFO: dacScan step from 80 .. 99
[13:28:28.624] <TB1> INFO: Test took 32214ms.
[13:28:28.677] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:28.678] <TB1> INFO: dacScan step from 100 .. 119
[13:29:22.430] <TB1> INFO: Test took 53752ms.
[13:29:22.630] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:22.654] <TB1> INFO: dacScan step from 120 .. 139


[13:30:07.608] <TB1> INFO: Test took 44954ms.
[13:30:07.929] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:07.973] <TB1> INFO: dacScan step from 140 .. 159


[13:31:08.993] <TB1> INFO: Test took 61020ms.
[13:31:09.285] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:09.325] <TB1> INFO: dacScan step from 160 .. 179
[13:31:57.146] <TB1> INFO: Test took 47821ms.
[13:31:57.443] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:57.490] <TB1> INFO: dacScan step from 180 .. 199
[13:32:48.300] <TB1> INFO: Test took 50809ms.
[13:32:48.595] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:15.101] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 167 (20) hits flags = 16 (plus default)
[13:33:15.110] <TB1> INFO: dacScan step from 0 .. 19
[13:33:46.028] <TB1> INFO: Test took 30918ms.
[13:33:46.065] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:46.065] <TB1> INFO: dacScan step from 20 .. 39
[13:34:17.087] <TB1> INFO: Test took 31023ms.
[13:34:17.123] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:17.123] <TB1> INFO: dacScan step from 40 .. 59
[13:34:47.952] <TB1> INFO: Test took 30829ms.
[13:34:47.987] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:47.987] <TB1> INFO: dacScan step from 60 .. 79
[13:35:24.864] <TB1> INFO: Test took 36877ms.
[13:35:24.904] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:24.904] <TB1> INFO: dacScan step from 80 .. 99
[13:35:57.213] <TB1> INFO: Test took 32309ms.
[13:35:57.312] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:57.320] <TB1> INFO: dacScan step from 100 .. 119
[13:36:42.070] <TB1> INFO: Test took 44750ms.
[13:36:42.359] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:42.387] <TB1> INFO: dacScan step from 120 .. 139
[13:37:30.200] <TB1> INFO: Test took 47813ms.
[13:37:30.529] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:30.573] <TB1> INFO: dacScan step from 140 .. 159
[13:38:18.949] <TB1> INFO: Test took 48376ms.
[13:38:19.260] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:19.307] <TB1> INFO: dacScan step from 160 .. 167
[13:38:37.427] <TB1> INFO: Test took 18120ms.
[13:38:37.538] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:03.036] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[13:39:03.045] <TB1> INFO: dacScan step from 0 .. 19
[13:39:40.814] <TB1> INFO: Test took 37769ms.
[13:39:40.850] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:40.850] <TB1> INFO: dacScan step from 20 .. 39
[13:40:09.344] <TB1> INFO: Test took 28494ms.
[13:40:09.384] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:09.384] <TB1> INFO: dacScan step from 40 .. 59
[13:40:38.407] <TB1> INFO: Test took 29023ms.
[13:40:38.447] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:38.447] <TB1> INFO: dacScan step from 60 .. 79
[13:41:16.000] <TB1> INFO: Test took 37553ms.
[13:41:16.039] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:16.039] <TB1> INFO: dacScan step from 80 .. 99
[13:41:49.491] <TB1> INFO: Test took 33452ms.
[13:41:49.575] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:49.584] <TB1> INFO: dacScan step from 100 .. 119
[13:42:48.809] <TB1> INFO: Test took 59225ms.
[13:42:49.066] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:49.105] <TB1> INFO: dacScan step from 120 .. 139


[13:43:30.186] <TB1> INFO: Test took 41081ms.
[13:43:30.495] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:30.538] <TB1> INFO: dacScan step from 140 .. 155
[13:44:03.528] <TB1> INFO: Test took 32990ms.
[13:44:03.820] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:24.769] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[13:44:24.777] <TB1> INFO: dacScan step from 0 .. 19
[13:44:51.331] <TB1> INFO: Test took 26554ms.
[13:44:51.367] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:51.367] <TB1> INFO: dacScan step from 20 .. 39
[13:45:17.470] <TB1> INFO: Test took 26103ms.
[13:45:17.507] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:17.507] <TB1> INFO: dacScan step from 40 .. 59
[13:45:44.159] <TB1> INFO: Test took 26651ms.
[13:45:44.196] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:44.196] <TB1> INFO: dacScan step from 60 .. 79
[13:46:11.193] <TB1> INFO: Test took 26997ms.
[13:46:11.232] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:11.232] <TB1> INFO: dacScan step from 80 .. 99
[13:46:40.326] <TB1> INFO: Test took 29094ms.
[13:46:40.417] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:40.426] <TB1> INFO: dacScan step from 100 .. 119
[13:47:17.348] <TB1> INFO: Test took 36922ms.
[13:47:17.610] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:17.639] <TB1> INFO: dacScan step from 120 .. 139



[13:47:58.961] <TB1> INFO: Test took 41322ms.
[13:47:59.284] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:59.323] <TB1> INFO: dacScan step from 140 .. 155
[13:48:32.478] <TB1> INFO: Test took 33154ms.
[13:48:32.736] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:53.824] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[13:48:53.832] <TB1> INFO: dacScan step from 0 .. 19
[13:49:20.295] <TB1> INFO: Test took 26463ms.
[13:49:20.343] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:20.343] <TB1> INFO: dacScan step from 20 .. 39
[13:49:47.366] <TB1> INFO: Test took 27023ms.
[13:49:47.404] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:47.404] <TB1> INFO: dacScan step from 40 .. 59
[13:50:14.077] <TB1> INFO: Test took 26673ms.
[13:50:14.120] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:14.120] <TB1> INFO: dacScan step from 60 .. 79
[13:50:42.188] <TB1> INFO: Test took 28067ms.
[13:50:42.227] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:42.227] <TB1> INFO: dacScan step from 80 .. 99
[13:51:10.424] <TB1> INFO: Test took 28197ms.
[13:51:10.507] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:10.516] <TB1> INFO: dacScan step from 100 .. 119
[13:51:48.506] <TB1> INFO: Test took 37990ms.
[13:51:48.741] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:48.768] <TB1> INFO: dacScan step from 120 .. 139





[13:52:38.663] <TB1> INFO: Test took 49895ms.
[13:52:38.975] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:39.035] <TB1> INFO: dacScan step from 140 .. 155
[13:53:49.721] <TB1> INFO: Test took 70686ms.
[13:53:49.924] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:11.239] <TB1> INFO: PixTestTrim::trimBitTest() done
[13:54:11.240] <TB1> INFO: PixTestTrim::doTest() done, duration: 3700 seconds
[13:54:11.902] <TB1> INFO: ######################################################################
[13:54:11.902] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:54:11.902] <TB1> INFO: ######################################################################
[13:54:18.245] <TB1> INFO: Test took 6341ms.
[13:54:18.264] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:25.181] <TB1> INFO: Test took 6718ms.
[13:54:25.287] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:31.731] <TB1> INFO: Test took 6427ms.
[13:54:31.792] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:31.799] <TB1> INFO: The DUT currently contains the following objects:
[13:54:31.799] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:31.799] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:31.799] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:31.799] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:31.799] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.799] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.799] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.799] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:31.800] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.010] <TB1> INFO: Test took 1210ms.
[13:54:33.010] <TB1> INFO: The DUT currently contains the following objects:
[13:54:33.010] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:33.010] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:33.010] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:33.010] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:33.010] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.010] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.010] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:33.011] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: Test took 1208ms.
[13:54:34.219] <TB1> INFO: The DUT currently contains the following objects:
[13:54:34.219] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:34.219] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:34.219] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:34.219] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:34.219] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:34.219] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: Test took 1211ms.
[13:54:35.430] <TB1> INFO: The DUT currently contains the following objects:
[13:54:35.430] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:35.430] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:35.430] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:35.430] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:35.430] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.430] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.431] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.431] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.431] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:35.431] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: Test took 1208ms.
[13:54:36.639] <TB1> INFO: The DUT currently contains the following objects:
[13:54:36.639] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:36.639] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:36.639] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:36.639] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:36.639] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:36.639] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.881] <TB1> INFO: Test took 1242ms.
[13:54:37.882] <TB1> INFO: The DUT currently contains the following objects:
[13:54:37.882] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:37.882] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:37.882] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:37.882] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:37.882] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:37.882] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.091] <TB1> INFO: Test took 1209ms.
[13:54:39.092] <TB1> INFO: The DUT currently contains the following objects:
[13:54:39.092] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:39.092] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:39.092] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:39.092] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:39.092] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:39.092] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.318] <TB1> INFO: Test took 1226ms.
[13:54:40.319] <TB1> INFO: The DUT currently contains the following objects:
[13:54:40.319] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:40.319] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:40.319] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:40.319] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:40.319] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:40.319] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: Test took 1225ms.
[13:54:41.544] <TB1> INFO: The DUT currently contains the following objects:
[13:54:41.544] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:41.544] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:41.544] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:41.544] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:41.544] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:41.544] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.739] <TB1> INFO: Test took 1195ms.
[13:54:42.740] <TB1> INFO: The DUT currently contains the following objects:
[13:54:42.740] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:42.740] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:42.740] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:42.740] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:42.740] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:42.740] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.933] <TB1> INFO: Test took 1193ms.
[13:54:43.934] <TB1> INFO: The DUT currently contains the following objects:
[13:54:43.934] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:43.934] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:43.934] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:43.934] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:43.934] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:43.934] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: Test took 1226ms.
[13:54:45.160] <TB1> INFO: The DUT currently contains the following objects:
[13:54:45.160] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:45.160] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:45.160] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:45.160] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:45.160] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:45.160] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.369] <TB1> INFO: Test took 1209ms.
[13:54:46.370] <TB1> INFO: The DUT currently contains the following objects:
[13:54:46.370] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:46.370] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:46.370] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:46.370] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:46.370] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:46.370] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.580] <TB1> INFO: Test took 1210ms.
[13:54:47.581] <TB1> INFO: The DUT currently contains the following objects:
[13:54:47.581] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:47.581] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:47.581] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:47.581] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:47.581] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:47.581] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: Test took 1209ms.
[13:54:48.790] <TB1> INFO: The DUT currently contains the following objects:
[13:54:48.790] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:48.790] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:48.790] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:48.790] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:48.790] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:48.790] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.003] <TB1> INFO: Test took 1213ms.
[13:54:50.004] <TB1> INFO: The DUT currently contains the following objects:
[13:54:50.004] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:54:50.004] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:54:50.004] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:54:50.004] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:54:50.004] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:50.004] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:54:51.229] <TB1> INFO: Test took 1225ms.
[13:54:51.233] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:58.638] <TB1> INFO: Test took 727405ms.
[14:07:00.075] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:33.346] <TB1> INFO: Test took 753271ms.
[14:19:34.866] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.872] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.879] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[14:19:34.885] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[14:19:34.892] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[14:19:34.898] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.905] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.911] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.918] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.924] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.930] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.937] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.943] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.950] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.956] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.963] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.969] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.976] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:34.982] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[14:19:35.037] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:19:35.038] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:19:35.039] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:19:35.039] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:19:35.039] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:19:35.039] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:19:41.316] <TB1> INFO: Test took 6273ms.
[14:19:48.421] <TB1> INFO: Test took 6832ms.
[14:19:55.053] <TB1> INFO: Test took 6358ms.
[14:19:55.331] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:56.384] <TB1> INFO: Test took 1053ms.
[14:19:56.386] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:57.627] <TB1> INFO: Test took 1241ms.
[14:19:57.629] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:19:58.917] <TB1> INFO: Test took 1288ms.
[14:19:58.919] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:00.176] <TB1> INFO: Test took 1257ms.
[14:20:00.178] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:01.419] <TB1> INFO: Test took 1241ms.
[14:20:01.422] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:02.679] <TB1> INFO: Test took 1257ms.
[14:20:02.682] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:03.967] <TB1> INFO: Test took 1286ms.
[14:20:03.970] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:05.211] <TB1> INFO: Test took 1241ms.
[14:20:05.213] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:06.468] <TB1> INFO: Test took 1255ms.
[14:20:06.471] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:07.695] <TB1> INFO: Test took 1224ms.
[14:20:07.698] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:08.937] <TB1> INFO: Test took 1239ms.
[14:20:08.940] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:10.210] <TB1> INFO: Test took 1270ms.
[14:20:10.213] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:11.468] <TB1> INFO: Test took 1255ms.
[14:20:11.471] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:12.742] <TB1> INFO: Test took 1271ms.
[14:20:12.745] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:14.000] <TB1> INFO: Test took 1255ms.
[14:20:14.003] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:15.273] <TB1> INFO: Test took 1270ms.
[14:20:15.276] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:16.500] <TB1> INFO: Test took 1224ms.
[14:20:16.503] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:17.789] <TB1> INFO: Test took 1286ms.
[14:20:17.792] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:19.063] <TB1> INFO: Test took 1271ms.
[14:20:19.066] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:20.306] <TB1> INFO: Test took 1241ms.
[14:20:20.309] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:21.549] <TB1> INFO: Test took 1241ms.
[14:20:21.552] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:22.807] <TB1> INFO: Test took 1256ms.
[14:20:22.810] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:24.051] <TB1> INFO: Test took 1242ms.
[14:20:24.054] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:25.295] <TB1> INFO: Test took 1242ms.
[14:20:25.298] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:26.553] <TB1> INFO: Test took 1256ms.
[14:20:26.556] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:27.796] <TB1> INFO: Test took 1240ms.
[14:20:27.799] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:29.069] <TB1> INFO: Test took 1270ms.
[14:20:29.072] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:30.312] <TB1> INFO: Test took 1240ms.
[14:20:30.315] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:31.585] <TB1> INFO: Test took 1270ms.
[14:20:31.588] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:32.874] <TB1> INFO: Test took 1286ms.
[14:20:32.877] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:34.148] <TB1> INFO: Test took 1271ms.
[14:20:34.151] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:35.392] <TB1> INFO: Test took 1241ms.
[14:20:35.984] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 1584 seconds
[14:20:35.984] <TB1> INFO: PH scale (per ROC): 80 80 80 81 83 76 77 86 89 82 81 78 80 84 86 79
[14:20:35.984] <TB1> INFO: PH offset (per ROC): 167 156 165 156 151 156 170 172 149 151 160 146 155 175 146 160
[14:20:36.152] <TB1> INFO: ######################################################################
[14:20:36.152] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:20:36.152] <TB1> INFO: ######################################################################
[14:20:36.162] <TB1> INFO: scanning low vcal = 10
[14:20:41.825] <TB1> INFO: Test took 5663ms.
[14:20:41.829] <TB1> INFO: scanning low vcal = 20
[14:20:47.260] <TB1> INFO: Test took 5431ms.
[14:20:47.265] <TB1> INFO: scanning low vcal = 30
[14:20:53.441] <TB1> INFO: Test took 6176ms.
[14:20:53.449] <TB1> INFO: scanning low vcal = 40
[14:21:00.784] <TB1> INFO: Test took 7335ms.
[14:21:00.840] <TB1> INFO: scanning low vcal = 50
[14:21:08.784] <TB1> INFO: Test took 7944ms.
[14:21:08.838] <TB1> INFO: scanning low vcal = 60
[14:21:16.600] <TB1> INFO: Test took 7762ms.
[14:21:16.655] <TB1> INFO: scanning low vcal = 70
[14:21:24.737] <TB1> INFO: Test took 8082ms.
[14:21:24.792] <TB1> INFO: scanning low vcal = 80
[14:21:31.822] <TB1> INFO: Test took 7030ms.
[14:21:31.878] <TB1> INFO: scanning low vcal = 90
[14:21:38.967] <TB1> INFO: Test took 7089ms.
[14:21:39.024] <TB1> INFO: scanning low vcal = 100
[14:21:46.084] <TB1> INFO: Test took 7060ms.
[14:21:46.140] <TB1> INFO: scanning low vcal = 110
[14:21:53.227] <TB1> INFO: Test took 7087ms.
[14:21:53.283] <TB1> INFO: scanning low vcal = 120
[14:22:00.583] <TB1> INFO: Test took 7300ms.
[14:22:00.638] <TB1> INFO: scanning low vcal = 130
[14:22:08.234] <TB1> INFO: Test took 7596ms.
[14:22:08.292] <TB1> INFO: scanning low vcal = 140
[14:22:15.790] <TB1> INFO: Test took 7498ms.
[14:22:15.846] <TB1> INFO: scanning low vcal = 150
[14:22:23.450] <TB1> INFO: Test took 7604ms.
[14:22:23.505] <TB1> INFO: scanning low vcal = 160
[14:22:30.614] <TB1> INFO: Test took 7109ms.
[14:22:30.671] <TB1> INFO: scanning low vcal = 170
[14:22:37.438] <TB1> INFO: Test took 6767ms.
[14:22:37.535] <TB1> INFO: scanning low vcal = 180
[14:22:44.393] <TB1> INFO: Test took 6858ms.
[14:22:44.449] <TB1> INFO: scanning low vcal = 190
[14:22:51.887] <TB1> INFO: Test took 7438ms.
[14:22:51.954] <TB1> INFO: scanning low vcal = 200
[14:22:59.254] <TB1> INFO: Test took 7300ms.
[14:22:59.311] <TB1> INFO: scanning low vcal = 210
[14:23:06.437] <TB1> INFO: Test took 7126ms.
[14:23:06.493] <TB1> INFO: scanning low vcal = 220
[14:23:13.700] <TB1> INFO: Test took 7207ms.
[14:23:13.756] <TB1> INFO: scanning low vcal = 230
[14:23:21.004] <TB1> INFO: Test took 7248ms.
[14:23:21.061] <TB1> INFO: scanning low vcal = 240
[14:23:27.964] <TB1> INFO: Test took 6903ms.
[14:23:28.023] <TB1> INFO: scanning low vcal = 250
[14:23:35.193] <TB1> INFO: Test took 7170ms.
[14:23:35.252] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[14:23:42.554] <TB1> INFO: Test took 7302ms.
[14:23:42.609] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[14:23:50.026] <TB1> INFO: Test took 7417ms.
[14:23:50.080] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[14:23:57.830] <TB1> INFO: Test took 7750ms.
[14:23:57.887] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[14:24:05.606] <TB1> INFO: Test took 7719ms.
[14:24:05.660] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:24:13.275] <TB1> INFO: Test took 7615ms.
[14:24:13.755] <TB1> INFO: PixTestGainPedestal::measure() done
[14:24:44.026] <TB1> INFO: PixTestGainPedestal::fit() done
[14:24:44.026] <TB1> INFO: non-linearity mean: 0.956 0.958 0.961 0.961 0.955 0.962 0.957 0.953 0.956 0.954 0.957 0.960 0.959 0.960 0.951 0.953
[14:24:44.026] <TB1> INFO: non-linearity RMS: 0.006 0.005 0.005 0.005 0.007 0.006 0.006 0.006 0.006 0.005 0.011 0.005 0.006 0.005 0.005 0.006
[14:24:44.026] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:24:44.044] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:24:44.061] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:24:44.079] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:24:44.097] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:24:44.114] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:24:44.132] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:24:44.149] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:24:44.167] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:24:44.184] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:24:44.201] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:24:44.218] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:24:44.236] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:24:44.253] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:24:44.271] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:24:44.288] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2061_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:24:44.306] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 248 seconds
[14:24:44.312] <TB1> INFO: enter test to run
[14:24:44.313] <TB1> INFO: test: exit no parameter change
[14:24:44.734] <TB1> QUIET: Connection to board 153 closed.
[14:24:44.734] <TB1> INFO: pXar: this is the end, my friend