[14:10:10.547] <TB3> INFO: *** Welcome to pxar ***
[14:10:10.547] <TB3> INFO: *** Today: 2015/08/18
[14:10:10.547] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C15.dat
[14:10:10.548] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:10:10.548] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//defaultMaskFile.dat
[14:10:10.549] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters_C15.dat
[14:10:10.632] <TB3> INFO: clk: 4
[14:10:10.632] <TB3> INFO: ctr: 4
[14:10:10.632] <TB3> INFO: sda: 19
[14:10:10.632] <TB3> INFO: tin: 9
[14:10:10.632] <TB3> INFO: level: 15
[14:10:10.632] <TB3> INFO: triggerdelay: 0
[14:10:10.632] <TB3> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[14:10:10.633] <TB3> INFO: Log level: INFO
[14:10:10.640] <TB3> INFO: Found DTB DTB_WZ4I6J
[14:10:10.650] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[14:10:10.654] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[14:10:10.657] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[14:10:12.182] <TB3> INFO: DUT info:
[14:10:12.182] <TB3> INFO: The DUT currently contains the following objects:
[14:10:12.182] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:10:12.182] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:10:12.182] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:10:12.182] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:10:12.182] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.182] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.182] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.182] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.182] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.182] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.183] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:10:12.584] <TB3> INFO: enter 'restricted' command line mode
[14:10:12.584] <TB3> INFO: enter test to run
[14:10:12.584] <TB3> INFO: test: pretest no parameter change
[14:10:12.584] <TB3> INFO: running: pretest
[14:10:12.591] <TB3> INFO: ######################################################################
[14:10:12.591] <TB3> INFO: PixTestPretest::doTest()
[14:10:12.591] <TB3> INFO: ######################################################################
[14:10:12.592] <TB3> INFO: ----------------------------------------------------------------------
[14:10:12.592] <TB3> INFO: PixTestPretest::programROC()
[14:10:12.592] <TB3> INFO: ----------------------------------------------------------------------
[14:10:30.610] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:10:30.610] <TB3> INFO: IA differences per ROC: 17.7 17.7 17.7 19.3 18.5 17.7 19.3 19.3 19.3 18.5 20.1 17.7 20.1 20.1 18.5 19.3
[14:10:30.682] <TB3> INFO: ----------------------------------------------------------------------
[14:10:30.682] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:10:30.682] <TB3> INFO: ----------------------------------------------------------------------
[14:10:34.568] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[14:10:34.571] <TB3> INFO: ----------------------------------------------------------------------
[14:10:34.571] <TB3> INFO: PixTestPretest::findWorkingPixel()
[14:10:34.571] <TB3> INFO: ----------------------------------------------------------------------
[14:10:43.022] <TB3> INFO: Test took 8446ms.
[14:10:43.306] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:10:43.338] <TB3> INFO: ----------------------------------------------------------------------
[14:10:43.338] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[14:10:43.338] <TB3> INFO: ----------------------------------------------------------------------
[14:10:51.592] <TB3> INFO: Test took 8250ms.
[14:10:51.903] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[14:10:51.903] <TB3> INFO: CalDel: 116 135 131 158 166 143 129 152 166 149 145 152 148 156 158 146
[14:10:51.903] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:10:51.909] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C0.dat
[14:10:51.909] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C1.dat
[14:10:51.910] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C2.dat
[14:10:51.910] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C3.dat
[14:10:51.910] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C4.dat
[14:10:51.910] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C5.dat
[14:10:51.911] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C6.dat
[14:10:51.911] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C7.dat
[14:10:51.911] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C8.dat
[14:10:51.911] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C9.dat
[14:10:51.912] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C10.dat
[14:10:51.912] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C11.dat
[14:10:51.912] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C12.dat
[14:10:51.912] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C13.dat
[14:10:51.913] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C14.dat
[14:10:51.913] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C15.dat
[14:10:51.913] <TB3> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[14:10:52.007] <TB3> INFO: enter test to run
[14:10:52.007] <TB3> INFO: test: fulltest no parameter change
[14:10:52.007] <TB3> INFO: running: fulltest
[14:10:52.007] <TB3> INFO: ######################################################################
[14:10:52.007] <TB3> INFO: PixTestFullTest::doTest()
[14:10:52.007] <TB3> INFO: ######################################################################
[14:10:52.009] <TB3> INFO: ######################################################################
[14:10:52.009] <TB3> INFO: PixTestAlive::doTest()
[14:10:52.009] <TB3> INFO: ######################################################################
[14:10:52.010] <TB3> INFO: ----------------------------------------------------------------------
[14:10:52.010] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:10:52.010] <TB3> INFO: ----------------------------------------------------------------------
[14:10:55.468] <TB3> INFO: Test took 3456ms.
[14:10:55.496] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:55.731] <TB3> INFO: PixTestAlive::aliveTest() done
[14:10:55.731] <TB3> INFO: number of dead pixels (per ROC): 1 0 1 0 1 0 0 3 0 1 0 0 0 0 0 1
[14:10:55.733] <TB3> INFO: ----------------------------------------------------------------------
[14:10:55.733] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:10:55.733] <TB3> INFO: ----------------------------------------------------------------------
[14:10:58.470] <TB3> INFO: Test took 2735ms.
[14:10:58.473] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:58.474] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:10:58.706] <TB3> INFO: PixTestAlive::maskTest() done
[14:10:58.707] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:10:58.708] <TB3> INFO: ----------------------------------------------------------------------
[14:10:58.708] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:10:58.708] <TB3> INFO: ----------------------------------------------------------------------
[14:11:02.099] <TB3> INFO: Test took 3389ms.
[14:11:02.121] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:02.357] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[14:11:02.357] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:11:02.357] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[14:11:02.368] <TB3> INFO: ######################################################################
[14:11:02.368] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:11:02.368] <TB3> INFO: ######################################################################
[14:11:02.374] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:11:02.386] <TB3> INFO: dacScan step from 0 .. 29
[14:11:23.665] <TB3> INFO: Test took 21279ms.
[14:11:23.693] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:23.693] <TB3> INFO: dacScan step from 30 .. 59
[14:11:46.580] <TB3> INFO: Test took 22887ms.
[14:11:46.674] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:46.693] <TB3> INFO: dacScan step from 60 .. 89
[14:12:15.323] <TB3> INFO: Test took 28630ms.
[14:12:15.592] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:15.694] <TB3> INFO: dacScan step from 90 .. 119
[14:12:44.465] <TB3> INFO: Test took 28768ms.
[14:12:44.722] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:44.800] <TB3> INFO: dacScan step from 120 .. 149
[14:13:08.694] <TB3> INFO: Test took 23894ms.
[14:13:08.866] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:31.824] <TB3> INFO: PixTestBBMap::doTest() done, duration: 149 seconds
[14:13:31.824] <TB3> INFO: number of dead bumps (per ROC): 3 0 0 0 0 0 0 0 0 0 0 0 8 0 1 1
[14:13:31.824] <TB3> INFO: separation cut (per ROC): 87 91 93 81 79 94 87 90 78 85 92 72 105 82 83 88
[14:13:31.899] <TB3> INFO: ######################################################################
[14:13:31.899] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[14:13:31.899] <TB3> INFO: ######################################################################
[14:13:31.900] <TB3> INFO: ----------------------------------------------------------------------
[14:13:31.900] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:13:31.900] <TB3> INFO: ----------------------------------------------------------------------
[14:13:31.900] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:13:31.909] <TB3> INFO: dacScan step from 0 .. 3
[14:13:50.737] <TB3> INFO: Test took 18828ms.
[14:13:50.770] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:50.770] <TB3> INFO: dacScan step from 4 .. 7
[14:14:09.666] <TB3> INFO: Test took 18896ms.
[14:14:09.693] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:09.693] <TB3> INFO: dacScan step from 8 .. 11
[14:14:27.215] <TB3> INFO: Test took 17522ms.
[14:14:27.241] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:27.241] <TB3> INFO: dacScan step from 12 .. 15
[14:14:44.989] <TB3> INFO: Test took 17748ms.
[14:14:45.018] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:45.018] <TB3> INFO: dacScan step from 16 .. 19
[14:15:03.993] <TB3> INFO: Test took 18975ms.
[14:15:04.021] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:04.021] <TB3> INFO: dacScan step from 20 .. 23
[14:15:22.965] <TB3> INFO: Test took 18944ms.
[14:15:22.991] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:22.991] <TB3> INFO: dacScan step from 24 .. 27
[14:15:41.850] <TB3> INFO: Test took 18859ms.
[14:15:41.878] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:41.878] <TB3> INFO: dacScan step from 28 .. 31
[14:16:00.784] <TB3> INFO: Test took 18906ms.
[14:16:00.811] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:00.811] <TB3> INFO: dacScan step from 32 .. 35
[14:16:19.681] <TB3> INFO: Test took 18870ms.
[14:16:19.708] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:19.708] <TB3> INFO: dacScan step from 36 .. 39
[14:16:38.721] <TB3> INFO: Test took 19014ms.
[14:16:38.747] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:38.747] <TB3> INFO: dacScan step from 40 .. 43
[14:16:57.737] <TB3> INFO: Test took 18990ms.
[14:16:57.766] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:57.767] <TB3> INFO: dacScan step from 44 .. 47
[14:17:16.846] <TB3> INFO: Test took 19079ms.
[14:17:16.875] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:16.875] <TB3> INFO: dacScan step from 48 .. 51
[14:17:35.984] <TB3> INFO: Test took 19109ms.
[14:17:36.017] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:36.017] <TB3> INFO: dacScan step from 52 .. 55
[14:17:55.089] <TB3> INFO: Test took 19072ms.
[14:17:55.118] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:55.118] <TB3> INFO: dacScan step from 56 .. 59
[14:18:12.946] <TB3> INFO: Test took 17828ms.
[14:18:12.972] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:12.972] <TB3> INFO: dacScan step from 60 .. 63
[14:18:30.781] <TB3> INFO: Test took 17809ms.
[14:18:30.808] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:30.808] <TB3> INFO: dacScan step from 64 .. 67
[14:18:48.644] <TB3> INFO: Test took 17836ms.
[14:18:48.679] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:48.679] <TB3> INFO: dacScan step from 68 .. 71
[14:19:06.321] <TB3> INFO: Test took 17642ms.
[14:19:06.347] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:06.347] <TB3> INFO: dacScan step from 72 .. 75
[14:19:24.044] <TB3> INFO: Test took 17697ms.
[14:19:24.076] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:24.076] <TB3> INFO: dacScan step from 76 .. 79
[14:19:42.572] <TB3> INFO: Test took 18495ms.
[14:19:42.608] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:42.609] <TB3> INFO: dacScan step from 80 .. 83
[14:20:03.107] <TB3> INFO: Test took 20498ms.
[14:20:03.188] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:03.192] <TB3> INFO: dacScan step from 84 .. 87
[14:20:25.302] <TB3> INFO: Test took 22110ms.
[14:20:25.412] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:25.418] <TB3> INFO: dacScan step from 88 .. 91
[14:20:48.854] <TB3> INFO: Test took 23436ms.
[14:20:49.008] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:49.019] <TB3> INFO: dacScan step from 92 .. 95
[14:21:15.140] <TB3> INFO: Test took 26121ms.
[14:21:15.346] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:15.357] <TB3> INFO: dacScan step from 96 .. 99
[14:21:43.217] <TB3> INFO: Test took 27860ms.
[14:21:43.439] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:43.449] <TB3> INFO: dacScan step from 100 .. 103



[14:22:12.253] <TB3> INFO: Test took 28804ms.
[14:22:12.483] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:12.496] <TB3> INFO: dacScan step from 104 .. 107


[14:22:41.776] <TB3> INFO: Test took 29280ms.
[14:22:42.021] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:42.034] <TB3> INFO: dacScan step from 108 .. 111
[14:23:11.138] <TB3> INFO: Test took 29104ms.
[14:23:11.381] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:11.394] <TB3> INFO: dacScan step from 112 .. 115


[14:23:40.707] <TB3> INFO: Test took 29313ms.
[14:23:40.936] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:40.949] <TB3> INFO: dacScan step from 116 .. 119


[14:24:10.168] <TB3> INFO: Test took 29219ms.
[14:24:10.396] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:10.409] <TB3> INFO: dacScan step from 120 .. 123

[14:24:39.686] <TB3> INFO: Test took 29277ms.
[14:24:39.917] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:39.929] <TB3> INFO: dacScan step from 124 .. 127





[14:25:09.200] <TB3> INFO: Test took 29271ms.
[14:25:09.435] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:09.450] <TB3> INFO: dacScan step from 128 .. 131
[14:25:38.631] <TB3> INFO: Test took 29181ms.
[14:25:38.856] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:38.868] <TB3> INFO: dacScan step from 132 .. 135
[14:26:08.025] <TB3> INFO: Test took 29157ms.
[14:26:08.256] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:08.269] <TB3> INFO: dacScan step from 136 .. 139
[14:26:37.523] <TB3> INFO: Test took 29254ms.
[14:26:37.749] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:37.761] <TB3> INFO: dacScan step from 140 .. 143
[14:27:06.939] <TB3> INFO: Test took 29178ms.
[14:27:07.184] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:07.199] <TB3> INFO: dacScan step from 144 .. 147
[14:27:36.464] <TB3> INFO: Test took 29265ms.
[14:27:36.695] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:36.708] <TB3> INFO: dacScan step from 148 .. 149
[14:27:52.815] <TB3> INFO: Test took 16107ms.
[14:27:52.942] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:52.950] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:54.395] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:55.912] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:57.442] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:59.025] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:00.707] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:02.160] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:03.673] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:05.249] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:06.839] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:08.430] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:10.015] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:11.546] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:13.039] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:14.551] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:16.093] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:28:17.609] <TB3> INFO: PixTestScurves::scurves() done
[14:28:17.609] <TB3> INFO: Vcal mean: 94.55 96.80 92.37 87.00 85.59 101.00 86.12 90.15 89.77 90.02 95.03 89.23 101.46 89.63 92.32 99.51
[14:28:17.609] <TB3> INFO: Vcal RMS: 5.39 5.08 5.61 6.03 5.32 5.10 5.52 6.19 5.74 5.64 6.38 4.74 6.13 4.84 5.43 5.56
[14:28:17.609] <TB3> INFO: PixTestScurves::fullTest() done, duration: 885 seconds
[14:28:17.686] <TB3> INFO: ######################################################################
[14:28:17.686] <TB3> INFO: PixTestTrim::doTest()
[14:28:17.686] <TB3> INFO: ######################################################################
[14:28:17.688] <TB3> INFO: ----------------------------------------------------------------------
[14:28:17.688] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[14:28:17.688] <TB3> INFO: ----------------------------------------------------------------------
[14:28:17.774] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:28:17.774] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:28:17.783] <TB3> INFO: dacScan step from 0 .. 19
[14:28:33.040] <TB3> INFO: Test took 15257ms.
[14:28:33.061] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:33.061] <TB3> INFO: dacScan step from 20 .. 39
[14:28:48.182] <TB3> INFO: Test took 15121ms.
[14:28:48.205] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:48.205] <TB3> INFO: dacScan step from 40 .. 59
[14:29:03.384] <TB3> INFO: Test took 15179ms.
[14:29:03.405] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:03.405] <TB3> INFO: dacScan step from 60 .. 79
[14:29:17.856] <TB3> INFO: Test took 14451ms.
[14:29:17.880] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:17.880] <TB3> INFO: dacScan step from 80 .. 99
[14:29:33.023] <TB3> INFO: Test took 15143ms.
[14:29:33.077] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:33.086] <TB3> INFO: dacScan step from 100 .. 119
[14:29:52.243] <TB3> INFO: Test took 19157ms.
[14:29:52.399] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:52.433] <TB3> INFO: dacScan step from 120 .. 139
[14:30:10.993] <TB3> INFO: Test took 18560ms.
[14:30:11.140] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:11.165] <TB3> INFO: dacScan step from 140 .. 159
[14:30:26.827] <TB3> INFO: Test took 15661ms.
[14:30:26.877] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:50.686] <TB3> INFO: ROC 0 VthrComp = 95
[14:30:50.686] <TB3> INFO: ROC 1 VthrComp = 98
[14:30:50.686] <TB3> INFO: ROC 2 VthrComp = 93
[14:30:50.686] <TB3> INFO: ROC 3 VthrComp = 85
[14:30:50.687] <TB3> INFO: ROC 4 VthrComp = 84
[14:30:50.687] <TB3> INFO: ROC 5 VthrComp = 101
[14:30:50.687] <TB3> INFO: ROC 6 VthrComp = 87
[14:30:50.687] <TB3> INFO: ROC 7 VthrComp = 89
[14:30:50.687] <TB3> INFO: ROC 8 VthrComp = 89
[14:30:50.687] <TB3> INFO: ROC 9 VthrComp = 88
[14:30:50.687] <TB3> INFO: ROC 10 VthrComp = 93
[14:30:50.687] <TB3> INFO: ROC 11 VthrComp = 88
[14:30:50.687] <TB3> INFO: ROC 12 VthrComp = 101
[14:30:50.688] <TB3> INFO: ROC 13 VthrComp = 91
[14:30:50.688] <TB3> INFO: ROC 14 VthrComp = 88
[14:30:50.688] <TB3> INFO: ROC 15 VthrComp = 97
[14:30:50.688] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:30:50.688] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:30:50.697] <TB3> INFO: dacScan step from 0 .. 19
[14:31:05.774] <TB3> INFO: Test took 15076ms.
[14:31:05.802] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:05.802] <TB3> INFO: dacScan step from 20 .. 39
[14:31:21.152] <TB3> INFO: Test took 15350ms.
[14:31:21.191] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:21.194] <TB3> INFO: dacScan step from 40 .. 59
[14:31:40.159] <TB3> INFO: Test took 18965ms.
[14:31:40.314] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:40.352] <TB3> INFO: dacScan step from 60 .. 79
[14:31:59.139] <TB3> INFO: Test took 18787ms.
[14:31:59.297] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:59.349] <TB3> INFO: dacScan step from 80 .. 99
[14:32:19.596] <TB3> INFO: Test took 20247ms.
[14:32:19.768] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:19.826] <TB3> INFO: dacScan step from 100 .. 119
[14:32:39.904] <TB3> INFO: Test took 20078ms.
[14:32:40.083] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:40.140] <TB3> INFO: dacScan step from 120 .. 139
[14:33:00.213] <TB3> INFO: Test took 20073ms.
[14:33:00.380] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:00.433] <TB3> INFO: dacScan step from 140 .. 159
[14:33:20.513] <TB3> INFO: Test took 20079ms.
[14:33:20.688] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:47.478] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.8936 for pixel 10/3 mean/min/max = 45.4424/32.8648/58.0201
[14:33:47.479] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 56.5767 for pixel 7/71 mean/min/max = 44.172/31.739/56.605
[14:33:47.479] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.589 for pixel 15/67 mean/min/max = 46.2586/32.8582/59.6591
[14:33:47.479] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.5966 for pixel 1/20 mean/min/max = 46.2869/31.8633/60.7106
[14:33:47.480] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 58.1238 for pixel 3/3 mean/min/max = 45.6668/33.1919/58.1416
[14:33:47.480] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.3056 for pixel 16/57 mean/min/max = 44.6978/32.0781/57.3174
[14:33:47.480] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 58.5594 for pixel 0/77 mean/min/max = 45.4864/32.3346/58.6382
[14:33:47.481] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 61.4428 for pixel 10/66 mean/min/max = 47.0464/32.626/61.4669
[14:33:47.481] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 61.3108 for pixel 9/0 mean/min/max = 47.2559/33.1918/61.3199
[14:33:47.481] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 60.9656 for pixel 17/1 mean/min/max = 47.4605/33.896/61.025
[14:33:47.481] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 61.792 for pixel 0/58 mean/min/max = 46.9703/32.1443/61.7964
[14:33:47.482] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.4052 for pixel 21/8 mean/min/max = 46.6933/33.9061/59.4805
[14:33:47.482] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.9105 for pixel 2/3 mean/min/max = 45.5845/31.198/59.971
[14:33:47.482] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.1284 for pixel 11/75 mean/min/max = 45.7349/33.3067/58.1631
[14:33:47.483] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 61.7567 for pixel 3/1 mean/min/max = 47.6703/33.391/61.9495
[14:33:47.483] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.6844 for pixel 20/78 mean/min/max = 45.7315/32.7746/58.6884
[14:33:47.483] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:20.181] <TB3> INFO: Test took 92698ms.
[14:35:21.542] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:35:21.551] <TB3> INFO: dacScan step from 0 .. 19
[14:35:44.360] <TB3> INFO: Test took 22809ms.
[14:35:44.410] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:44.412] <TB3> INFO: dacScan step from 20 .. 39
[14:36:12.073] <TB3> INFO: Test took 27661ms.
[14:36:12.315] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:12.346] <TB3> INFO: dacScan step from 40 .. 59





[14:36:45.099] <TB3> INFO: Test took 32752ms.
[14:36:45.456] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:45.518] <TB3> INFO: dacScan step from 60 .. 79
[14:37:18.764] <TB3> INFO: Test took 33245ms.
[14:37:19.063] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:19.119] <TB3> INFO: dacScan step from 80 .. 99


[14:37:52.437] <TB3> INFO: Test took 33318ms.
[14:37:52.722] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:52.777] <TB3> INFO: dacScan step from 100 .. 119





[14:38:26.005] <TB3> INFO: Test took 33228ms.
[14:38:26.303] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:26.362] <TB3> INFO: dacScan step from 120 .. 139
[14:38:59.996] <TB3> INFO: Test took 33634ms.
[14:39:00.270] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:00.329] <TB3> INFO: dacScan step from 140 .. 159
[14:39:33.492] <TB3> INFO: Test took 33163ms.
[14:39:33.798] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:33.854] <TB3> INFO: dacScan step from 160 .. 179

[14:40:07.141] <TB3> INFO: Test took 33287ms.
[14:40:07.431] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:07.484] <TB3> INFO: dacScan step from 180 .. 199



[14:40:41.411] <TB3> INFO: Test took 33926ms.
[14:40:41.706] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:09.509] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.067348 .. 255.000000
[14:41:09.591] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:41:09.601] <TB3> INFO: dacScan step from 0 .. 19
[14:41:22.944] <TB3> INFO: Test took 13343ms.
[14:41:22.971] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:22.971] <TB3> INFO: dacScan step from 20 .. 39
[14:41:37.832] <TB3> INFO: Test took 14861ms.
[14:41:37.922] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:37.938] <TB3> INFO: dacScan step from 40 .. 59
[14:41:55.607] <TB3> INFO: Test took 17668ms.
[14:41:55.768] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:55.830] <TB3> INFO: dacScan step from 60 .. 79
[14:42:12.224] <TB3> INFO: Test took 16394ms.
[14:42:12.368] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:12.426] <TB3> INFO: dacScan step from 80 .. 99
[14:42:29.983] <TB3> INFO: Test took 17557ms.
[14:42:30.141] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:30.198] <TB3> INFO: dacScan step from 100 .. 119
[14:42:48.008] <TB3> INFO: Test took 17810ms.
[14:42:48.165] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:48.219] <TB3> INFO: dacScan step from 120 .. 139
[14:43:05.942] <TB3> INFO: Test took 17723ms.
[14:43:06.086] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:06.138] <TB3> INFO: dacScan step from 140 .. 159
[14:43:23.830] <TB3> INFO: Test took 17692ms.
[14:43:23.997] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:24.056] <TB3> INFO: dacScan step from 160 .. 179
[14:43:41.996] <TB3> INFO: Test took 17940ms.
[14:43:42.143] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:42.195] <TB3> INFO: dacScan step from 180 .. 199
[14:44:00.730] <TB3> INFO: Test took 18535ms.
[14:44:00.905] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:00.961] <TB3> INFO: dacScan step from 200 .. 219
[14:44:18.742] <TB3> INFO: Test took 17781ms.
[14:44:18.893] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:18.942] <TB3> INFO: dacScan step from 220 .. 239
[14:44:36.696] <TB3> INFO: Test took 17754ms.
[14:44:36.847] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:36.896] <TB3> INFO: dacScan step from 240 .. 255
[14:44:51.800] <TB3> INFO: Test took 14904ms.
[14:44:51.926] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:24.398] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 13.599017 .. 43.099337
[14:45:24.480] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 3 .. 53 (20) hits flags = 16 (plus default)
[14:45:24.489] <TB3> INFO: dacScan step from 3 .. 22
[14:45:37.538] <TB3> INFO: Test took 13049ms.
[14:45:37.559] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:37.559] <TB3> INFO: dacScan step from 23 .. 42
[14:45:52.843] <TB3> INFO: Test took 15284ms.
[14:45:52.954] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:52.980] <TB3> INFO: dacScan step from 43 .. 53
[14:46:03.936] <TB3> INFO: Test took 10955ms.
[14:46:04.020] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:20.609] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 4.318439 .. 39.816231
[14:46:20.684] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 4 .. 49 (20) hits flags = 16 (plus default)
[14:46:20.694] <TB3> INFO: dacScan step from 4 .. 23
[14:46:33.890] <TB3> INFO: Test took 13196ms.
[14:46:33.910] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:33.910] <TB3> INFO: dacScan step from 24 .. 43
[14:46:49.504] <TB3> INFO: Test took 15594ms.
[14:46:49.611] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:49.636] <TB3> INFO: dacScan step from 44 .. 49
[14:46:57.002] <TB3> INFO: Test took 7366ms.
[14:46:57.060] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:13.383] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 0.217293 .. 38.585994
[14:47:13.473] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 0 .. 48 (20) hits flags = 16 (plus default)
[14:47:13.482] <TB3> INFO: dacScan step from 0 .. 19
[14:47:26.570] <TB3> INFO: Test took 13088ms.
[14:47:26.590] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:26.590] <TB3> INFO: dacScan step from 20 .. 39
[14:47:41.182] <TB3> INFO: Test took 14592ms.
[14:47:41.258] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:41.274] <TB3> INFO: dacScan step from 40 .. 48
[14:47:50.720] <TB3> INFO: Test took 9446ms.
[14:47:50.804] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:06.566] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:48:06.566] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:48:06.575] <TB3> INFO: dacScan step from 15 .. 34
[14:48:28.853] <TB3> INFO: Test took 22278ms.
[14:48:28.926] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:28.939] <TB3> INFO: dacScan step from 35 .. 54
[14:48:59.256] <TB3> INFO: Test took 30318ms.
[14:48:59.721] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:59.813] <TB3> INFO: dacScan step from 55 .. 55
[14:49:04.106] <TB3> INFO: Test took 4293ms.
[14:49:04.122] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:18.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:49:18.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:49:18.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:49:18.570] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:49:18.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:49:18.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:49:18.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:49:18.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:49:18.571] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:49:18.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:49:18.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:49:18.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:49:18.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:49:18.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:49:18.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:49:18.572] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:49:18.572] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C0.dat
[14:49:18.583] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C1.dat
[14:49:18.593] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C2.dat
[14:49:18.603] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C3.dat
[14:49:18.613] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C4.dat
[14:49:18.623] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C5.dat
[14:49:18.633] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C6.dat
[14:49:18.643] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C7.dat
[14:49:18.653] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C8.dat
[14:49:18.664] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C9.dat
[14:49:18.674] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C10.dat
[14:49:18.684] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C11.dat
[14:49:18.694] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C12.dat
[14:49:18.704] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C13.dat
[14:49:18.714] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C14.dat
[14:49:18.724] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C15.dat
[14:49:18.734] <TB3> INFO: PixTestTrim::trimTest() done
[14:49:18.734] <TB3> INFO: vtrim: 122 104 114 114 95 106 106 122 104 119 116 103 106 100 113 109
[14:49:18.734] <TB3> INFO: vthrcomp: 95 98 93 85 84 101 87 89 89 88 93 88 101 91 88 97
[14:49:18.734] <TB3> INFO: vcal mean: 35.07 35.05 35.07 35.10 35.08 35.05 35.04 35.04 35.09 35.13 35.12 35.09 35.09 35.10 35.12 35.07
[14:49:18.734] <TB3> INFO: vcal RMS: 1.19 1.14 1.22 1.56 1.19 1.08 1.00 1.44 1.12 1.33 1.10 1.10 1.09 1.02 1.08 1.21
[14:49:18.734] <TB3> INFO: bits mean: 10.16 10.63 9.85 10.38 9.57 10.38 9.59 9.81 9.93 9.62 9.84 9.92 9.93 9.69 9.44 9.85
[14:49:18.734] <TB3> INFO: bits RMS: 2.30 2.29 2.41 2.27 2.49 2.33 2.66 2.37 2.28 2.34 2.46 2.23 2.63 2.47 2.43 2.47
[14:49:18.743] <TB3> INFO: ----------------------------------------------------------------------
[14:49:18.743] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[14:49:18.743] <TB3> INFO: ----------------------------------------------------------------------
[14:49:18.746] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:49:18.756] <TB3> INFO: dacScan step from 0 .. 19
[14:49:40.059] <TB3> INFO: Test took 21303ms.
[14:49:40.097] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:40.097] <TB3> INFO: dacScan step from 20 .. 39
[14:50:02.984] <TB3> INFO: Test took 22886ms.
[14:50:03.019] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:03.019] <TB3> INFO: dacScan step from 40 .. 59
[14:50:25.585] <TB3> INFO: Test took 22566ms.
[14:50:25.626] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:25.626] <TB3> INFO: dacScan step from 60 .. 79
[14:50:47.213] <TB3> INFO: Test took 21586ms.
[14:50:47.250] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:47.250] <TB3> INFO: dacScan step from 80 .. 99
[14:51:10.042] <TB3> INFO: Test took 22792ms.
[14:51:10.082] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:10.082] <TB3> INFO: dacScan step from 100 .. 119
[14:51:34.961] <TB3> INFO: Test took 24879ms.
[14:51:35.090] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:35.103] <TB3> INFO: dacScan step from 120 .. 139
[14:52:07.146] <TB3> INFO: Test took 32043ms.
[14:52:07.433] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:07.480] <TB3> INFO: dacScan step from 140 .. 159


[14:52:40.721] <TB3> INFO: Test took 33241ms.
[14:52:41.021] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:41.075] <TB3> INFO: dacScan step from 160 .. 179
[14:53:14.375] <TB3> INFO: Test took 33300ms.
[14:53:14.639] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:14.691] <TB3> INFO: dacScan step from 180 .. 199
[14:53:48.721] <TB3> INFO: Test took 34029ms.
[14:53:48.987] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:15.657] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 166 (20) hits flags = 16 (plus default)
[14:54:15.666] <TB3> INFO: dacScan step from 0 .. 19
[14:54:36.873] <TB3> INFO: Test took 21206ms.
[14:54:36.910] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:36.910] <TB3> INFO: dacScan step from 20 .. 39
[14:54:59.774] <TB3> INFO: Test took 22864ms.
[14:54:59.812] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:59.812] <TB3> INFO: dacScan step from 40 .. 59
[14:55:20.986] <TB3> INFO: Test took 21174ms.
[14:55:21.021] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:21.021] <TB3> INFO: dacScan step from 60 .. 79
[14:55:42.563] <TB3> INFO: Test took 21542ms.
[14:55:42.599] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:42.599] <TB3> INFO: dacScan step from 80 .. 99
[14:56:05.616] <TB3> INFO: Test took 23017ms.
[14:56:05.674] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:05.679] <TB3> INFO: dacScan step from 100 .. 119
[14:56:34.345] <TB3> INFO: Test took 28666ms.
[14:56:34.578] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:34.606] <TB3> INFO: dacScan step from 120 .. 139





[14:57:07.674] <TB3> INFO: Test took 33068ms.
[14:57:07.964] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:08.018] <TB3> INFO: dacScan step from 140 .. 159


[14:57:40.785] <TB3> INFO: Test took 32767ms.
[14:57:41.069] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:41.128] <TB3> INFO: dacScan step from 160 .. 166
[14:57:54.336] <TB3> INFO: Test took 13208ms.
[14:57:54.433] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:19.977] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 154 (20) hits flags = 16 (plus default)
[14:58:19.986] <TB3> INFO: dacScan step from 0 .. 19
[14:58:42.527] <TB3> INFO: Test took 22541ms.
[14:58:42.564] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:42.564] <TB3> INFO: dacScan step from 20 .. 39
[14:59:05.373] <TB3> INFO: Test took 22809ms.
[14:59:05.411] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:05.411] <TB3> INFO: dacScan step from 40 .. 59
[14:59:28.210] <TB3> INFO: Test took 22799ms.
[14:59:28.247] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:28.247] <TB3> INFO: dacScan step from 60 .. 79
[14:59:49.314] <TB3> INFO: Test took 21067ms.
[14:59:49.351] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:49.351] <TB3> INFO: dacScan step from 80 .. 99
[15:00:10.732] <TB3> INFO: Test took 21381ms.
[15:00:10.781] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:10.785] <TB3> INFO: dacScan step from 100 .. 119
[15:00:39.782] <TB3> INFO: Test took 28997ms.
[15:00:40.017] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:40.046] <TB3> INFO: dacScan step from 120 .. 139


[15:01:13.237] <TB3> INFO: Test took 33191ms.
[15:01:13.513] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:13.564] <TB3> INFO: dacScan step from 140 .. 154
[15:01:38.862] <TB3> INFO: Test took 25298ms.
[15:01:39.080] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:02.572] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 154 (20) hits flags = 16 (plus default)
[15:02:02.581] <TB3> INFO: dacScan step from 0 .. 19
[15:02:25.099] <TB3> INFO: Test took 22518ms.
[15:02:25.137] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:25.137] <TB3> INFO: dacScan step from 20 .. 39
[15:02:47.899] <TB3> INFO: Test took 22762ms.
[15:02:47.936] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:47.936] <TB3> INFO: dacScan step from 40 .. 59
[15:03:10.431] <TB3> INFO: Test took 22495ms.
[15:03:10.465] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:10.465] <TB3> INFO: dacScan step from 60 .. 79
[15:03:33.050] <TB3> INFO: Test took 22584ms.
[15:03:33.087] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:33.087] <TB3> INFO: dacScan step from 80 .. 99
[15:03:55.987] <TB3> INFO: Test took 22900ms.
[15:03:56.047] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:56.050] <TB3> INFO: dacScan step from 100 .. 119
[15:04:24.689] <TB3> INFO: Test took 28638ms.
[15:04:24.945] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:24.974] <TB3> INFO: dacScan step from 120 .. 139


[15:04:56.330] <TB3> INFO: Test took 31356ms.
[15:04:56.670] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:56.731] <TB3> INFO: dacScan step from 140 .. 154
[15:05:21.433] <TB3> INFO: Test took 24701ms.
[15:05:21.694] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:47.385] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 154 (20) hits flags = 16 (plus default)
[15:05:47.395] <TB3> INFO: dacScan step from 0 .. 19
[15:06:10.367] <TB3> INFO: Test took 22972ms.
[15:06:10.407] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:10.407] <TB3> INFO: dacScan step from 20 .. 39
[15:06:33.228] <TB3> INFO: Test took 22821ms.
[15:06:33.265] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:33.265] <TB3> INFO: dacScan step from 40 .. 59
[15:06:56.125] <TB3> INFO: Test took 22860ms.
[15:06:56.165] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:56.165] <TB3> INFO: dacScan step from 60 .. 79
[15:07:18.727] <TB3> INFO: Test took 22562ms.
[15:07:18.767] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:18.767] <TB3> INFO: dacScan step from 80 .. 99
[15:07:41.923] <TB3> INFO: Test took 23156ms.
[15:07:41.978] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:41.982] <TB3> INFO: dacScan step from 100 .. 119
[15:08:10.967] <TB3> INFO: Test took 28985ms.
[15:08:11.201] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:11.232] <TB3> INFO: dacScan step from 120 .. 139


[15:08:42.796] <TB3> INFO: Test took 31564ms.
[15:08:43.087] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:43.138] <TB3> INFO: dacScan step from 140 .. 154
[15:09:06.225] <TB3> INFO: Test took 23087ms.
[15:09:06.534] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:27.876] <TB3> INFO: PixTestTrim::trimBitTest() done
[15:09:27.877] <TB3> INFO: PixTestTrim::doTest() done, duration: 2470 seconds
[15:09:28.547] <TB3> INFO: ######################################################################
[15:09:28.547] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:09:28.547] <TB3> INFO: ######################################################################
[15:09:31.988] <TB3> INFO: Test took 3438ms.
[15:09:32.011] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:35.623] <TB3> INFO: Test took 3414ms.
[15:09:35.696] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:39.151] <TB3> INFO: Test took 3442ms.
[15:09:39.211] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:39.218] <TB3> INFO: The DUT currently contains the following objects:
[15:09:39.218] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:39.218] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:39.218] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:39.218] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:39.218] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:39.218] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.327] <TB3> INFO: Test took 1109ms.
[15:09:40.328] <TB3> INFO: The DUT currently contains the following objects:
[15:09:40.328] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:40.328] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:40.328] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:40.328] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:40.328] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.328] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.328] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.328] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.328] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.328] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.328] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:40.329] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.437] <TB3> INFO: Test took 1108ms.
[15:09:41.438] <TB3> INFO: The DUT currently contains the following objects:
[15:09:41.438] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:41.438] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:41.438] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:41.438] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:41.438] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.438] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.438] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.438] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.438] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:41.439] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.547] <TB3> INFO: Test took 1108ms.
[15:09:42.549] <TB3> INFO: The DUT currently contains the following objects:
[15:09:42.549] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:42.549] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:42.549] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:42.549] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:42.549] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.549] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.550] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.550] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.550] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.550] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:42.550] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.655] <TB3> INFO: Test took 1105ms.
[15:09:43.656] <TB3> INFO: The DUT currently contains the following objects:
[15:09:43.660] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:43.660] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:43.660] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:43.660] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:43.660] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.660] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.661] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.661] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.661] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:43.661] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.764] <TB3> INFO: Test took 1103ms.
[15:09:44.766] <TB3> INFO: The DUT currently contains the following objects:
[15:09:44.766] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:44.766] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:44.766] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:44.766] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:44.766] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.766] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.766] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.766] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.766] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.766] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.766] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:44.767] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.875] <TB3> INFO: Test took 1108ms.
[15:09:45.876] <TB3> INFO: The DUT currently contains the following objects:
[15:09:45.877] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:45.877] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:45.877] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:45.877] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:45.877] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.877] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.878] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.878] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:45.878] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.986] <TB3> INFO: Test took 1108ms.
[15:09:46.988] <TB3> INFO: The DUT currently contains the following objects:
[15:09:46.988] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:46.988] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:46.988] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:46.988] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:46.988] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:46.988] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.097] <TB3> INFO: Test took 1109ms.
[15:09:48.099] <TB3> INFO: The DUT currently contains the following objects:
[15:09:48.099] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:48.099] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:48.099] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:48.099] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:48.099] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:48.099] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.208] <TB3> INFO: Test took 1108ms.
[15:09:49.209] <TB3> INFO: The DUT currently contains the following objects:
[15:09:49.209] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:49.209] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:49.209] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:49.209] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:49.209] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.209] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.209] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.209] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.209] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.209] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.209] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.209] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.210] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.210] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.210] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.210] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.210] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.210] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.210] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:49.210] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.332] <TB3> INFO: Test took 1122ms.
[15:09:50.333] <TB3> INFO: The DUT currently contains the following objects:
[15:09:50.333] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:50.333] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:50.333] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:50.333] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:50.334] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:50.334] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.441] <TB3> INFO: Test took 1107ms.
[15:09:51.443] <TB3> INFO: The DUT currently contains the following objects:
[15:09:51.443] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:51.443] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:51.443] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:51.443] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:51.443] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.443] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.444] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.444] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:51.444] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.551] <TB3> INFO: Test took 1107ms.
[15:09:52.553] <TB3> INFO: The DUT currently contains the following objects:
[15:09:52.553] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:52.553] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:52.553] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:52.553] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:52.553] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:52.553] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.661] <TB3> INFO: Test took 1108ms.
[15:09:53.663] <TB3> INFO: The DUT currently contains the following objects:
[15:09:53.663] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:53.663] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:53.663] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:53.663] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:53.663] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:53.663] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.775] <TB3> INFO: Test took 1112ms.
[15:09:54.776] <TB3> INFO: The DUT currently contains the following objects:
[15:09:54.776] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:54.776] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:54.777] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:54.777] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:54.777] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:54.777] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.884] <TB3> INFO: Test took 1107ms.
[15:09:55.886] <TB3> INFO: The DUT currently contains the following objects:
[15:09:55.886] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:09:55.886] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:09:55.886] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:09:55.886] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:09:55.886] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:55.886] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:09:56.995] <TB3> INFO: Test took 1109ms.
[15:09:57.000] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:39.447] <TB3> INFO: Test took 222447ms.
[15:13:41.231] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:28.660] <TB3> INFO: Test took 227429ms.
[15:17:30.333] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.340] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:17:30.348] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.355] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.363] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.370] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.378] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.385] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.393] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.400] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.407] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.415] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:17:30.422] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:17:30.430] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:17:30.437] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:17:30.444] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:17:30.451] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[15:17:30.458] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[15:17:30.465] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[15:17:30.472] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.479] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.486] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.494] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.501] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.508] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:17:30.549] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:17:30.549] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:17:30.549] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:17:30.550] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:17:30.550] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:17:30.550] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:17:30.550] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:17:30.550] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:17:30.550] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:17:30.551] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:17:30.551] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:17:30.551] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:17:30.551] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:17:30.551] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:17:30.551] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:17:30.552] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:17:34.000] <TB3> INFO: Test took 3444ms.
[15:17:37.754] <TB3> INFO: Test took 3477ms.
[15:17:41.499] <TB3> INFO: Test took 3463ms.
[15:17:41.785] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:42.705] <TB3> INFO: Test took 921ms.
[15:17:42.711] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:43.821] <TB3> INFO: Test took 1110ms.
[15:17:43.826] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:44.934] <TB3> INFO: Test took 1108ms.
[15:17:44.937] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:46.046] <TB3> INFO: Test took 1109ms.
[15:17:46.050] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:47.158] <TB3> INFO: Test took 1108ms.
[15:17:47.162] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:48.269] <TB3> INFO: Test took 1107ms.
[15:17:48.275] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:49.380] <TB3> INFO: Test took 1105ms.
[15:17:49.384] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:50.491] <TB3> INFO: Test took 1108ms.
[15:17:50.495] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:51.603] <TB3> INFO: Test took 1108ms.
[15:17:51.607] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:52.714] <TB3> INFO: Test took 1107ms.
[15:17:52.718] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:53.827] <TB3> INFO: Test took 1109ms.
[15:17:53.831] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:54.939] <TB3> INFO: Test took 1108ms.
[15:17:54.943] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:56.051] <TB3> INFO: Test took 1108ms.
[15:17:56.055] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:57.163] <TB3> INFO: Test took 1109ms.
[15:17:57.166] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:58.275] <TB3> INFO: Test took 1109ms.
[15:17:58.279] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:17:59.387] <TB3> INFO: Test took 1109ms.
[15:17:59.391] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:00.494] <TB3> INFO: Test took 1103ms.
[15:18:00.498] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:01.598] <TB3> INFO: Test took 1101ms.
[15:18:01.603] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:02.709] <TB3> INFO: Test took 1106ms.
[15:18:02.712] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:03.816] <TB3> INFO: Test took 1104ms.
[15:18:03.818] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:04.926] <TB3> INFO: Test took 1108ms.
[15:18:04.930] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:06.032] <TB3> INFO: Test took 1103ms.
[15:18:06.036] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:07.141] <TB3> INFO: Test took 1105ms.
[15:18:07.143] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:08.244] <TB3> INFO: Test took 1101ms.
[15:18:08.246] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:09.354] <TB3> INFO: Test took 1108ms.
[15:18:09.358] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:10.461] <TB3> INFO: Test took 1103ms.
[15:18:10.464] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:11.564] <TB3> INFO: Test took 1100ms.
[15:18:11.566] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:12.667] <TB3> INFO: Test took 1101ms.
[15:18:12.669] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:13.785] <TB3> INFO: Test took 1116ms.
[15:18:13.787] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:14.888] <TB3> INFO: Test took 1101ms.
[15:18:14.890] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:15.991] <TB3> INFO: Test took 1101ms.
[15:18:15.994] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:17.095] <TB3> INFO: Test took 1102ms.
[15:18:17.608] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 529 seconds
[15:18:17.608] <TB3> INFO: PH scale (per ROC): 68 77 71 76 77 74 75 74 73 75 78 76 75 76 73 70
[15:18:17.608] <TB3> INFO: PH offset (per ROC): 176 171 176 169 171 175 166 189 172 176 175 193 191 171 183 177
[15:18:17.792] <TB3> INFO: ######################################################################
[15:18:17.792] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:18:17.792] <TB3> INFO: ######################################################################
[15:18:17.806] <TB3> INFO: scanning low vcal = 10
[15:18:21.576] <TB3> INFO: Test took 3770ms.
[15:18:21.579] <TB3> INFO: scanning low vcal = 20
[15:18:25.356] <TB3> INFO: Test took 3777ms.
[15:18:25.360] <TB3> INFO: scanning low vcal = 30
[15:18:29.183] <TB3> INFO: Test took 3823ms.
[15:18:29.194] <TB3> INFO: scanning low vcal = 40
[15:18:33.457] <TB3> INFO: Test took 4263ms.
[15:18:33.521] <TB3> INFO: scanning low vcal = 50
[15:18:37.732] <TB3> INFO: Test took 4211ms.
[15:18:37.797] <TB3> INFO: scanning low vcal = 60
[15:18:42.048] <TB3> INFO: Test took 4251ms.
[15:18:42.109] <TB3> INFO: scanning low vcal = 70
[15:18:46.348] <TB3> INFO: Test took 4239ms.
[15:18:46.405] <TB3> INFO: scanning low vcal = 80
[15:18:50.662] <TB3> INFO: Test took 4256ms.
[15:18:50.762] <TB3> INFO: scanning low vcal = 90
[15:18:55.032] <TB3> INFO: Test took 4270ms.
[15:18:55.095] <TB3> INFO: scanning low vcal = 100
[15:18:59.335] <TB3> INFO: Test took 4240ms.
[15:18:59.398] <TB3> INFO: scanning low vcal = 110
[15:19:03.611] <TB3> INFO: Test took 4213ms.
[15:19:03.677] <TB3> INFO: scanning low vcal = 120
[15:19:07.944] <TB3> INFO: Test took 4267ms.
[15:19:08.003] <TB3> INFO: scanning low vcal = 130
[15:19:12.224] <TB3> INFO: Test took 4221ms.
[15:19:12.284] <TB3> INFO: scanning low vcal = 140
[15:19:16.484] <TB3> INFO: Test took 4200ms.
[15:19:16.543] <TB3> INFO: scanning low vcal = 150
[15:19:20.761] <TB3> INFO: Test took 4218ms.
[15:19:20.823] <TB3> INFO: scanning low vcal = 160
[15:19:25.051] <TB3> INFO: Test took 4228ms.
[15:19:25.115] <TB3> INFO: scanning low vcal = 170
[15:19:29.333] <TB3> INFO: Test took 4218ms.
[15:19:29.400] <TB3> INFO: scanning low vcal = 180
[15:19:33.749] <TB3> INFO: Test took 4349ms.
[15:19:33.814] <TB3> INFO: scanning low vcal = 190
[15:19:38.178] <TB3> INFO: Test took 4364ms.
[15:19:38.273] <TB3> INFO: scanning low vcal = 200
[15:19:42.724] <TB3> INFO: Test took 4451ms.
[15:19:42.796] <TB3> INFO: scanning low vcal = 210
[15:19:47.176] <TB3> INFO: Test took 4380ms.
[15:19:47.246] <TB3> INFO: scanning low vcal = 220
[15:19:51.614] <TB3> INFO: Test took 4368ms.
[15:19:51.684] <TB3> INFO: scanning low vcal = 230
[15:19:56.049] <TB3> INFO: Test took 4365ms.
[15:19:56.111] <TB3> INFO: scanning low vcal = 240
[15:20:00.471] <TB3> INFO: Test took 4360ms.
[15:20:00.536] <TB3> INFO: scanning low vcal = 250
[15:20:04.905] <TB3> INFO: Test took 4369ms.
[15:20:04.970] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[15:20:09.337] <TB3> INFO: Test took 4367ms.
[15:20:09.399] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[15:20:13.749] <TB3> INFO: Test took 4350ms.
[15:20:13.811] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[15:20:18.166] <TB3> INFO: Test took 4355ms.
[15:20:18.230] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[15:20:22.594] <TB3> INFO: Test took 4364ms.
[15:20:22.661] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:20:27.026] <TB3> INFO: Test took 4365ms.
[15:20:27.595] <TB3> INFO: PixTestGainPedestal::measure() done
[15:21:02.989] <TB3> INFO: PixTestGainPedestal::fit() done
[15:21:02.989] <TB3> INFO: non-linearity mean: 0.962 0.959 0.955 0.959 0.960 0.964 0.958 0.957 0.956 0.968 0.961 0.956 0.958 0.957 0.955 0.961
[15:21:02.989] <TB3> INFO: non-linearity RMS: 0.006 0.007 0.007 0.008 0.006 0.006 0.005 0.006 0.006 0.004 0.006 0.009 0.007 0.006 0.006 0.007
[15:21:02.989] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:21:03.013] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:21:03.037] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:21:03.061] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:21:03.084] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:21:03.108] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:21:03.132] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:21:03.154] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:21:03.178] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:21:03.201] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:21:03.225] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:21:03.249] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:21:03.272] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:21:03.297] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:21:03.321] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:21:03.345] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:21:03.366] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 165 seconds
[15:21:03.373] <TB3> INFO: enter test to run
[15:21:03.373] <TB3> INFO: test: exit no parameter change
[15:21:03.859] <TB3> QUIET: Connection to board 170 closed.
[15:21:03.939] <TB3> INFO: pXar: this is the end, my friend