[09:28:32.193] <TB3> INFO: *** Welcome to pxar ***
[09:28:32.193] <TB3> INFO: *** Today: 2015/08/18
[09:28:32.193] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C15.dat
[09:28:32.195] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:28:32.195] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//defaultMaskFile.dat
[09:28:32.196] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters_C15.dat
[09:28:32.271] <TB3> INFO: clk: 4
[09:28:32.272] <TB3> INFO: ctr: 4
[09:28:32.272] <TB3> INFO: sda: 19
[09:28:32.272] <TB3> INFO: tin: 9
[09:28:32.272] <TB3> INFO: level: 15
[09:28:32.272] <TB3> INFO: triggerdelay: 0
[09:28:32.272] <TB3> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[09:28:32.272] <TB3> INFO: Log level: INFO
[09:28:32.279] <TB3> INFO: Found DTB DTB_WZ4I6J
[09:28:32.289] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[09:28:32.292] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[09:28:32.295] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[09:28:33.825] <TB3> INFO: DUT info:
[09:28:33.825] <TB3> INFO: The DUT currently contains the following objects:
[09:28:33.825] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[09:28:33.825] <TB3> INFO: TBM Core alpha (0): 7 registers set
[09:28:33.825] <TB3> INFO: TBM Core beta (1): 7 registers set
[09:28:33.825] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:28:33.825] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.825] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.825] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.825] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.825] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.825] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:33.826] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:34.227] <TB3> INFO: enter 'restricted' command line mode
[09:28:34.227] <TB3> INFO: enter test to run
[09:28:34.227] <TB3> INFO: test: pretest no parameter change
[09:28:34.227] <TB3> INFO: running: pretest
[09:28:34.234] <TB3> INFO: ######################################################################
[09:28:34.234] <TB3> INFO: PixTestPretest::doTest()
[09:28:34.234] <TB3> INFO: ######################################################################
[09:28:34.236] <TB3> INFO: ----------------------------------------------------------------------
[09:28:34.236] <TB3> INFO: PixTestPretest::programROC()
[09:28:34.236] <TB3> INFO: ----------------------------------------------------------------------
[09:28:52.254] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:28:52.254] <TB3> INFO: IA differences per ROC: 17.7 17.7 17.7 18.5 19.3 18.5 19.3 19.3 19.3 18.5 20.9 17.7 20.9 20.1 18.5 19.3
[09:28:52.347] <TB3> INFO: ----------------------------------------------------------------------
[09:28:52.347] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:28:52.347] <TB3> INFO: ----------------------------------------------------------------------
[09:28:56.526] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 394.7 mA = 24.6687 mA/ROC
[09:28:56.529] <TB3> INFO: ----------------------------------------------------------------------
[09:28:56.529] <TB3> INFO: PixTestPretest::findWorkingPixel()
[09:28:56.529] <TB3> INFO: ----------------------------------------------------------------------
[09:29:04.759] <TB3> INFO: Test took 8224ms.
[09:29:05.058] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:29:05.091] <TB3> INFO: ----------------------------------------------------------------------
[09:29:05.091] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[09:29:05.091] <TB3> INFO: ----------------------------------------------------------------------
[09:29:13.343] <TB3> INFO: Test took 8247ms.
[09:29:13.657] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[09:29:13.657] <TB3> INFO: CalDel: 122 143 140 167 175 151 137 162 173 157 154 157 157 163 164 153
[09:29:13.658] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:29:13.662] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C0.dat
[09:29:13.662] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C1.dat
[09:29:13.662] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C2.dat
[09:29:13.663] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C3.dat
[09:29:13.663] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C4.dat
[09:29:13.663] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C5.dat
[09:29:13.663] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C6.dat
[09:29:13.664] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C7.dat
[09:29:13.664] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C8.dat
[09:29:13.664] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C9.dat
[09:29:13.664] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C10.dat
[09:29:13.668] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C11.dat
[09:29:13.668] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C12.dat
[09:29:13.668] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C13.dat
[09:29:13.669] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C14.dat
[09:29:13.669] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C15.dat
[09:29:13.669] <TB3> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[09:29:13.781] <TB3> INFO: enter test to run
[09:29:13.781] <TB3> INFO: test: fulltest no parameter change
[09:29:13.781] <TB3> INFO: running: fulltest
[09:29:13.781] <TB3> INFO: ######################################################################
[09:29:13.781] <TB3> INFO: PixTestFullTest::doTest()
[09:29:13.781] <TB3> INFO: ######################################################################
[09:29:13.783] <TB3> INFO: ######################################################################
[09:29:13.783] <TB3> INFO: PixTestAlive::doTest()
[09:29:13.783] <TB3> INFO: ######################################################################
[09:29:13.784] <TB3> INFO: ----------------------------------------------------------------------
[09:29:13.784] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:29:13.784] <TB3> INFO: ----------------------------------------------------------------------
[09:29:17.264] <TB3> INFO: Test took 3478ms.
[09:29:17.292] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:17.526] <TB3> INFO: PixTestAlive::aliveTest() done
[09:29:17.526] <TB3> INFO: number of dead pixels (per ROC): 1 0 1 0 1 0 0 3 0 1 0 0 0 0 0 1
[09:29:17.529] <TB3> INFO: ----------------------------------------------------------------------
[09:29:17.529] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:29:17.529] <TB3> INFO: ----------------------------------------------------------------------
[09:29:20.314] <TB3> INFO: Test took 2781ms.
[09:29:20.319] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:20.320] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:29:20.552] <TB3> INFO: PixTestAlive::maskTest() done
[09:29:20.552] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:29:20.555] <TB3> INFO: ----------------------------------------------------------------------
[09:29:20.555] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:29:20.555] <TB3> INFO: ----------------------------------------------------------------------
[09:29:24.004] <TB3> INFO: Test took 3445ms.
[09:29:24.023] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:24.256] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[09:29:24.257] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:29:24.257] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[09:29:24.269] <TB3> INFO: ######################################################################
[09:29:24.269] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:29:24.269] <TB3> INFO: ######################################################################
[09:29:24.272] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[09:29:24.369] <TB3> INFO: dacScan step from 0 .. 29
[09:29:45.859] <TB3> INFO: Test took 21490ms.
[09:29:45.894] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:45.896] <TB3> INFO: dacScan step from 30 .. 59
[09:30:09.429] <TB3> INFO: Test took 23533ms.
[09:30:09.571] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:09.589] <TB3> INFO: dacScan step from 60 .. 89
[09:30:38.644] <TB3> INFO: Test took 29054ms.
[09:30:38.906] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:38.986] <TB3> INFO: dacScan step from 90 .. 119
[09:31:07.922] <TB3> INFO: Test took 28936ms.
[09:31:08.198] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:08.280] <TB3> INFO: dacScan step from 120 .. 149
[09:31:32.486] <TB3> INFO: Test took 24206ms.
[09:31:32.686] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:56.657] <TB3> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[09:31:56.657] <TB3> INFO: number of dead bumps (per ROC): 3 0 0 0 0 0 0 0 0 0 0 0 8 0 1 1
[09:31:56.657] <TB3> INFO: separation cut (per ROC): 87 91 84 77 73 97 75 89 77 73 92 68 105 76 75 86
[09:31:56.727] <TB3> INFO: ######################################################################
[09:31:56.727] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[09:31:56.727] <TB3> INFO: ######################################################################
[09:31:56.727] <TB3> INFO: ----------------------------------------------------------------------
[09:31:56.727] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[09:31:56.727] <TB3> INFO: ----------------------------------------------------------------------
[09:31:56.727] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[09:31:56.735] <TB3> INFO: dacScan step from 0 .. 3
[09:32:15.875] <TB3> INFO: Test took 19140ms.
[09:32:15.909] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:15.909] <TB3> INFO: dacScan step from 4 .. 7
[09:32:34.944] <TB3> INFO: Test took 19035ms.
[09:32:34.969] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:34.969] <TB3> INFO: dacScan step from 8 .. 11
[09:32:53.947] <TB3> INFO: Test took 18978ms.
[09:32:53.978] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:53.978] <TB3> INFO: dacScan step from 12 .. 15
[09:33:12.942] <TB3> INFO: Test took 18964ms.
[09:33:12.970] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:12.970] <TB3> INFO: dacScan step from 16 .. 19
[09:33:32.048] <TB3> INFO: Test took 19078ms.
[09:33:32.081] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:32.081] <TB3> INFO: dacScan step from 20 .. 23
[09:33:51.183] <TB3> INFO: Test took 19102ms.
[09:33:51.211] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:51.211] <TB3> INFO: dacScan step from 24 .. 27
[09:34:10.342] <TB3> INFO: Test took 19131ms.
[09:34:10.369] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:10.369] <TB3> INFO: dacScan step from 28 .. 31
[09:34:29.440] <TB3> INFO: Test took 19071ms.
[09:34:29.468] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:29.468] <TB3> INFO: dacScan step from 32 .. 35
[09:34:48.597] <TB3> INFO: Test took 19129ms.
[09:34:48.628] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:48.628] <TB3> INFO: dacScan step from 36 .. 39
[09:35:07.880] <TB3> INFO: Test took 19252ms.
[09:35:07.915] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:07.915] <TB3> INFO: dacScan step from 40 .. 43
[09:35:26.929] <TB3> INFO: Test took 19014ms.
[09:35:26.959] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:26.959] <TB3> INFO: dacScan step from 44 .. 47
[09:35:46.052] <TB3> INFO: Test took 19093ms.
[09:35:46.080] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:46.080] <TB3> INFO: dacScan step from 48 .. 51
[09:36:05.122] <TB3> INFO: Test took 19042ms.
[09:36:05.154] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:05.154] <TB3> INFO: dacScan step from 52 .. 55
[09:36:24.112] <TB3> INFO: Test took 18958ms.
[09:36:24.140] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:24.140] <TB3> INFO: dacScan step from 56 .. 59
[09:36:43.110] <TB3> INFO: Test took 18969ms.
[09:36:43.138] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:43.138] <TB3> INFO: dacScan step from 60 .. 63
[09:37:02.185] <TB3> INFO: Test took 19047ms.
[09:37:02.217] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:02.217] <TB3> INFO: dacScan step from 64 .. 67
[09:37:21.277] <TB3> INFO: Test took 19060ms.
[09:37:21.311] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:21.311] <TB3> INFO: dacScan step from 68 .. 71
[09:37:40.576] <TB3> INFO: Test took 19265ms.
[09:37:40.616] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:40.616] <TB3> INFO: dacScan step from 72 .. 75
[09:38:00.252] <TB3> INFO: Test took 19636ms.
[09:38:00.302] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:00.305] <TB3> INFO: dacScan step from 76 .. 79
[09:38:20.978] <TB3> INFO: Test took 20673ms.
[09:38:21.061] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:21.064] <TB3> INFO: dacScan step from 80 .. 83
[09:38:44.385] <TB3> INFO: Test took 23321ms.
[09:38:44.515] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:44.520] <TB3> INFO: dacScan step from 84 .. 87
[09:39:10.008] <TB3> INFO: Test took 25488ms.
[09:39:10.205] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:10.215] <TB3> INFO: dacScan step from 88 .. 91
[09:39:37.120] <TB3> INFO: Test took 26905ms.
[09:39:37.352] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:37.362] <TB3> INFO: dacScan step from 92 .. 95
[09:40:05.710] <TB3> INFO: Test took 28348ms.
[09:40:05.978] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:05.990] <TB3> INFO: dacScan step from 96 .. 99


[09:40:35.148] <TB3> INFO: Test took 29158ms.
[09:40:35.378] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:35.389] <TB3> INFO: dacScan step from 100 .. 103


[09:41:04.787] <TB3> INFO: Test took 29397ms.
[09:41:05.047] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:05.061] <TB3> INFO: dacScan step from 104 .. 107


[09:41:34.472] <TB3> INFO: Test took 29410ms.
[09:41:34.721] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:34.735] <TB3> INFO: dacScan step from 108 .. 111

[09:42:04.042] <TB3> INFO: Test took 29307ms.
[09:42:04.292] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:04.306] <TB3> INFO: dacScan step from 112 .. 115


[09:42:33.767] <TB3> INFO: Test took 29461ms.
[09:42:33.996] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:34.011] <TB3> INFO: dacScan step from 116 .. 119


[09:43:03.398] <TB3> INFO: Test took 29387ms.
[09:43:03.616] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:03.627] <TB3> INFO: dacScan step from 120 .. 123
[09:43:32.935] <TB3> INFO: Test took 29307ms.
[09:43:33.172] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:33.185] <TB3> INFO: dacScan step from 124 .. 127
[09:44:02.519] <TB3> INFO: Test took 29334ms.
[09:44:02.800] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:02.815] <TB3> INFO: dacScan step from 128 .. 131
[09:44:32.203] <TB3> INFO: Test took 29387ms.
[09:44:32.428] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:32.445] <TB3> INFO: dacScan step from 132 .. 135
[09:45:01.745] <TB3> INFO: Test took 29300ms.
[09:45:02.009] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:02.024] <TB3> INFO: dacScan step from 136 .. 139
[09:45:31.209] <TB3> INFO: Test took 29185ms.
[09:45:31.465] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:31.480] <TB3> INFO: dacScan step from 140 .. 143
[09:46:00.835] <TB3> INFO: Test took 29355ms.
[09:46:01.071] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:01.085] <TB3> INFO: dacScan step from 144 .. 147
[09:46:30.604] <TB3> INFO: Test took 29519ms.
[09:46:30.859] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:30.870] <TB3> INFO: dacScan step from 148 .. 149
[09:46:45.649] <TB3> INFO: Test took 14779ms.
[09:46:45.758] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:45.764] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:47.251] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:48.778] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:50.313] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:51.860] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:53.412] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:54.854] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:56.304] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:57.742] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:46:59.237] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:47:00.862] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:47:02.319] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:47:03.741] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:47:05.160] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:47:06.663] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:47:08.076] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:47:09.634] <TB3> INFO: PixTestScurves::scurves() done
[09:47:09.634] <TB3> INFO: Vcal mean: 89.71 89.89 82.86 80.73 80.08 96.38 77.56 86.49 85.89 81.47 91.48 82.03 94.84 84.89 85.93 95.14
[09:47:09.634] <TB3> INFO: Vcal RMS: 5.50 5.06 5.09 4.95 4.33 5.12 4.57 6.01 5.30 5.02 6.29 4.52 5.96 4.60 5.34 5.36
[09:47:09.634] <TB3> INFO: PixTestScurves::fullTest() done, duration: 912 seconds
[09:47:09.710] <TB3> INFO: ######################################################################
[09:47:09.710] <TB3> INFO: PixTestTrim::doTest()
[09:47:09.710] <TB3> INFO: ######################################################################
[09:47:09.711] <TB3> INFO: ----------------------------------------------------------------------
[09:47:09.711] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:47:09.711] <TB3> INFO: ----------------------------------------------------------------------
[09:47:09.791] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:47:09.791] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:47:09.799] <TB3> INFO: dacScan step from 0 .. 19
[09:47:24.948] <TB3> INFO: Test took 15149ms.
[09:47:24.972] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:24.972] <TB3> INFO: dacScan step from 20 .. 39
[09:47:40.002] <TB3> INFO: Test took 15030ms.
[09:47:40.025] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:40.025] <TB3> INFO: dacScan step from 40 .. 59
[09:47:55.198] <TB3> INFO: Test took 15173ms.
[09:47:55.225] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:55.225] <TB3> INFO: dacScan step from 60 .. 79
[09:48:09.727] <TB3> INFO: Test took 14502ms.
[09:48:09.754] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:09.754] <TB3> INFO: dacScan step from 80 .. 99
[09:48:24.902] <TB3> INFO: Test took 15148ms.
[09:48:24.965] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:24.976] <TB3> INFO: dacScan step from 100 .. 119
[09:48:43.234] <TB3> INFO: Test took 18258ms.
[09:48:43.403] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:43.494] <TB3> INFO: dacScan step from 120 .. 139
[09:49:01.181] <TB3> INFO: Test took 17687ms.
[09:49:01.350] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:01.377] <TB3> INFO: dacScan step from 140 .. 159
[09:49:16.624] <TB3> INFO: Test took 15247ms.
[09:49:16.711] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:38.888] <TB3> INFO: ROC 0 VthrComp = 94
[09:49:38.888] <TB3> INFO: ROC 1 VthrComp = 96
[09:49:38.888] <TB3> INFO: ROC 2 VthrComp = 87
[09:49:38.889] <TB3> INFO: ROC 3 VthrComp = 85
[09:49:38.889] <TB3> INFO: ROC 4 VthrComp = 85
[09:49:38.889] <TB3> INFO: ROC 5 VthrComp = 101
[09:49:38.889] <TB3> INFO: ROC 6 VthrComp = 82
[09:49:38.889] <TB3> INFO: ROC 7 VthrComp = 89
[09:49:38.889] <TB3> INFO: ROC 8 VthrComp = 91
[09:49:38.889] <TB3> INFO: ROC 9 VthrComp = 83
[09:49:38.889] <TB3> INFO: ROC 10 VthrComp = 94
[09:49:38.889] <TB3> INFO: ROC 11 VthrComp = 84
[09:49:38.889] <TB3> INFO: ROC 12 VthrComp = 99
[09:49:38.889] <TB3> INFO: ROC 13 VthrComp = 91
[09:49:38.890] <TB3> INFO: ROC 14 VthrComp = 85
[09:49:38.890] <TB3> INFO: ROC 15 VthrComp = 98
[09:49:38.890] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:49:38.890] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:49:38.899] <TB3> INFO: dacScan step from 0 .. 19
[09:49:54.000] <TB3> INFO: Test took 15101ms.
[09:49:54.024] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:54.024] <TB3> INFO: dacScan step from 20 .. 39
[09:50:09.403] <TB3> INFO: Test took 15379ms.
[09:50:09.434] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:09.437] <TB3> INFO: dacScan step from 40 .. 59
[09:50:28.342] <TB3> INFO: Test took 18905ms.
[09:50:28.500] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:28.539] <TB3> INFO: dacScan step from 60 .. 79
[09:50:48.735] <TB3> INFO: Test took 20196ms.
[09:50:48.909] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:48.962] <TB3> INFO: dacScan step from 80 .. 99
[09:51:07.691] <TB3> INFO: Test took 18729ms.
[09:51:07.848] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:07.903] <TB3> INFO: dacScan step from 100 .. 119
[09:51:26.721] <TB3> INFO: Test took 18818ms.
[09:51:26.918] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:26.979] <TB3> INFO: dacScan step from 120 .. 139
[09:51:47.073] <TB3> INFO: Test took 20094ms.
[09:51:47.271] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:47.333] <TB3> INFO: dacScan step from 140 .. 159
[09:52:06.779] <TB3> INFO: Test took 19446ms.
[09:52:06.940] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:32.080] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.9304 for pixel 11/3 mean/min/max = 44.8803/31.6712/58.0895
[09:52:32.080] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 56.7037 for pixel 12/0 mean/min/max = 44.1471/31.5278/56.7664
[09:52:32.080] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.9058 for pixel 12/74 mean/min/max = 45.6078/32.301/58.9146
[09:52:32.080] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 58.5864 for pixel 2/0 mean/min/max = 45.2592/31.7742/58.7442
[09:52:32.081] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 56.3809 for pixel 13/1 mean/min/max = 44.5242/32.4138/56.6347
[09:52:32.081] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.5014 for pixel 0/61 mean/min/max = 44.7215/31.9383/57.5047
[09:52:32.081] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.5878 for pixel 9/16 mean/min/max = 45.0821/32.3006/57.8636
[09:52:32.081] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 60.8208 for pixel 22/79 mean/min/max = 46.4478/31.9804/60.9152
[09:52:32.082] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.1275 for pixel 5/0 mean/min/max = 46.2885/32.421/60.1561
[09:52:32.082] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.4074 for pixel 23/78 mean/min/max = 45.9151/32.3376/59.4926
[09:52:32.082] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 61.6305 for pixel 0/58 mean/min/max = 46.7718/31.7654/61.7783
[09:52:32.082] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 58.6928 for pixel 1/20 mean/min/max = 45.5139/32.0873/58.9406
[09:52:32.083] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.9509 for pixel 0/6 mean/min/max = 45.6924/31.3556/60.0292
[09:52:32.083] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.8048 for pixel 12/13 mean/min/max = 45.3028/32.7496/57.8559
[09:52:32.083] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 60.633 for pixel 12/0 mean/min/max = 46.3197/32.0055/60.6339
[09:52:32.083] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.6407 for pixel 14/1 mean/min/max = 45.3953/32.1104/58.6801
[09:52:32.083] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:06.530] <TB3> INFO: Test took 94447ms.
[09:54:08.061] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:54:08.069] <TB3> INFO: dacScan step from 0 .. 19
[09:54:29.564] <TB3> INFO: Test took 21494ms.
[09:54:29.608] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:29.609] <TB3> INFO: dacScan step from 20 .. 39
[09:54:58.522] <TB3> INFO: Test took 28913ms.
[09:54:58.789] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:58.822] <TB3> INFO: dacScan step from 40 .. 59





[09:55:32.201] <TB3> INFO: Test took 33379ms.
[09:55:32.542] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:32.593] <TB3> INFO: dacScan step from 60 .. 79





[09:56:05.736] <TB3> INFO: Test took 33143ms.
[09:56:06.066] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:06.123] <TB3> INFO: dacScan step from 80 .. 99


[09:56:39.536] <TB3> INFO: Test took 33413ms.
[09:56:39.895] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:39.952] <TB3> INFO: dacScan step from 100 .. 119


[09:57:13.263] <TB3> INFO: Test took 33311ms.
[09:57:13.563] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:13.616] <TB3> INFO: dacScan step from 120 .. 139


[09:57:46.908] <TB3> INFO: Test took 33292ms.
[09:57:47.224] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:47.282] <TB3> INFO: dacScan step from 140 .. 159


[09:58:20.519] <TB3> INFO: Test took 33237ms.
[09:58:20.864] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:20.926] <TB3> INFO: dacScan step from 160 .. 179


[09:58:54.297] <TB3> INFO: Test took 33371ms.
[09:58:54.624] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:54.687] <TB3> INFO: dacScan step from 180 .. 199


[09:59:28.646] <TB3> INFO: Test took 33959ms.
[09:59:28.922] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:54.543] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.031080 .. 255.000000
[09:59:54.628] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:59:54.636] <TB3> INFO: dacScan step from 0 .. 19
[10:00:08.151] <TB3> INFO: Test took 13515ms.
[10:00:08.170] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:08.170] <TB3> INFO: dacScan step from 20 .. 39
[10:00:23.004] <TB3> INFO: Test took 14834ms.
[10:00:23.094] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:23.114] <TB3> INFO: dacScan step from 40 .. 59
[10:00:40.764] <TB3> INFO: Test took 17650ms.
[10:00:40.941] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:40.996] <TB3> INFO: dacScan step from 60 .. 79
[10:00:58.754] <TB3> INFO: Test took 17758ms.
[10:00:58.899] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:58.954] <TB3> INFO: dacScan step from 80 .. 99
[10:01:16.791] <TB3> INFO: Test took 17837ms.
[10:01:16.957] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:17.019] <TB3> INFO: dacScan step from 100 .. 119
[10:01:34.843] <TB3> INFO: Test took 17824ms.
[10:01:34.987] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:35.041] <TB3> INFO: dacScan step from 120 .. 139
[10:01:51.770] <TB3> INFO: Test took 16729ms.
[10:01:51.974] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:52.024] <TB3> INFO: dacScan step from 140 .. 159
[10:02:08.697] <TB3> INFO: Test took 16673ms.
[10:02:08.842] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:08.890] <TB3> INFO: dacScan step from 160 .. 179
[10:02:26.542] <TB3> INFO: Test took 17652ms.
[10:02:26.687] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:26.737] <TB3> INFO: dacScan step from 180 .. 199
[10:02:45.392] <TB3> INFO: Test took 18655ms.
[10:02:45.537] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:45.589] <TB3> INFO: dacScan step from 200 .. 219
[10:03:03.352] <TB3> INFO: Test took 17763ms.
[10:03:03.545] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:03.611] <TB3> INFO: dacScan step from 220 .. 239
[10:03:21.271] <TB3> INFO: Test took 17660ms.
[10:03:21.416] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:21.467] <TB3> INFO: dacScan step from 240 .. 255
[10:03:36.010] <TB3> INFO: Test took 14543ms.
[10:03:36.127] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:08.316] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 15.500023 .. 45.527935
[10:04:08.396] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 55 (20) hits flags = 16 (plus default)
[10:04:08.404] <TB3> INFO: dacScan step from 5 .. 24
[10:04:21.991] <TB3> INFO: Test took 13587ms.
[10:04:22.017] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:22.017] <TB3> INFO: dacScan step from 25 .. 44
[10:04:37.979] <TB3> INFO: Test took 15962ms.
[10:04:38.094] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:38.127] <TB3> INFO: dacScan step from 45 .. 55
[10:04:49.130] <TB3> INFO: Test took 11003ms.
[10:04:49.220] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:06.782] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 20.494966 .. 42.066742
[10:05:06.859] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 52 (20) hits flags = 16 (plus default)
[10:05:06.868] <TB3> INFO: dacScan step from 10 .. 29
[10:05:19.929] <TB3> INFO: Test took 13061ms.
[10:05:19.955] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:19.956] <TB3> INFO: dacScan step from 30 .. 49
[10:05:36.703] <TB3> INFO: Test took 16747ms.
[10:05:36.864] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:36.911] <TB3> INFO: dacScan step from 50 .. 52
[10:05:42.081] <TB3> INFO: Test took 5170ms.
[10:05:42.104] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:56.551] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 2.799275 .. 42.066742
[10:05:56.626] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 52 (20) hits flags = 16 (plus default)
[10:05:56.634] <TB3> INFO: dacScan step from 2 .. 21
[10:06:09.674] <TB3> INFO: Test took 13040ms.
[10:06:09.692] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:09.692] <TB3> INFO: dacScan step from 22 .. 41
[10:06:24.282] <TB3> INFO: Test took 14590ms.
[10:06:24.369] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:24.391] <TB3> INFO: dacScan step from 42 .. 52
[10:06:34.814] <TB3> INFO: Test took 10423ms.
[10:06:34.893] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:49.654] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:06:49.654] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[10:06:49.663] <TB3> INFO: dacScan step from 15 .. 34
[10:07:12.089] <TB3> INFO: Test took 22426ms.
[10:07:12.156] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:12.166] <TB3> INFO: dacScan step from 35 .. 54


[10:07:42.585] <TB3> INFO: Test took 30419ms.
[10:07:42.925] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:42.989] <TB3> INFO: dacScan step from 55 .. 55
[10:07:47.250] <TB3> INFO: Test took 4260ms.
[10:07:47.272] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:00.721] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:08:00.721] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:08:00.721] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:08:00.721] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:08:00.721] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:08:00.721] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:08:00.721] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:08:00.722] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:08:00.722] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C0.dat
[10:08:00.728] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C1.dat
[10:08:00.735] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C2.dat
[10:08:00.741] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C3.dat
[10:08:00.747] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C4.dat
[10:08:00.753] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C5.dat
[10:08:00.759] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C6.dat
[10:08:00.765] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C7.dat
[10:08:00.771] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C8.dat
[10:08:00.777] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C9.dat
[10:08:00.784] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C10.dat
[10:08:00.790] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C11.dat
[10:08:00.796] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C12.dat
[10:08:00.802] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C13.dat
[10:08:00.808] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C14.dat
[10:08:00.814] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C15.dat
[10:08:00.821] <TB3> INFO: PixTestTrim::trimTest() done
[10:08:00.821] <TB3> INFO: vtrim: 121 107 114 101 111 100 111 115 97 116 117 97 103 102 117 120
[10:08:00.821] <TB3> INFO: vthrcomp: 94 96 87 85 85 101 82 89 91 83 94 84 99 91 85 98
[10:08:00.821] <TB3> INFO: vcal mean: 35.00 35.04 34.97 34.99 35.06 35.02 34.95 35.08 35.02 35.00 35.04 35.02 35.04 35.02 35.02 35.00
[10:08:00.821] <TB3> INFO: vcal RMS: 1.15 1.00 1.11 1.03 1.16 1.04 0.94 1.30 1.05 1.26 1.14 1.07 1.04 0.98 1.17 1.26
[10:08:00.821] <TB3> INFO: bits mean: 10.16 10.54 10.03 9.79 10.39 9.87 9.89 9.51 9.64 9.93 9.53 10.05 9.53 9.69 10.11 10.15
[10:08:00.821] <TB3> INFO: bits RMS: 2.44 2.34 2.39 2.64 2.27 2.57 2.50 2.60 2.55 2.44 2.65 2.42 2.78 2.54 2.38 2.38
[10:08:00.829] <TB3> INFO: ----------------------------------------------------------------------
[10:08:00.829] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:08:00.829] <TB3> INFO: ----------------------------------------------------------------------
[10:08:00.832] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:08:00.839] <TB3> INFO: dacScan step from 0 .. 19
[10:08:22.421] <TB3> INFO: Test took 21582ms.
[10:08:22.466] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:22.466] <TB3> INFO: dacScan step from 20 .. 39
[10:08:45.348] <TB3> INFO: Test took 22882ms.
[10:08:45.390] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:45.390] <TB3> INFO: dacScan step from 40 .. 59
[10:09:06.927] <TB3> INFO: Test took 21537ms.
[10:09:06.965] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:06.965] <TB3> INFO: dacScan step from 60 .. 79
[10:09:29.693] <TB3> INFO: Test took 22728ms.
[10:09:29.730] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:29.730] <TB3> INFO: dacScan step from 80 .. 99
[10:09:52.032] <TB3> INFO: Test took 22301ms.
[10:09:52.081] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:52.083] <TB3> INFO: dacScan step from 100 .. 119
[10:10:19.356] <TB3> INFO: Test took 27273ms.
[10:10:19.560] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:19.584] <TB3> INFO: dacScan step from 120 .. 139

[10:10:52.876] <TB3> INFO: Test took 33292ms.
[10:10:53.233] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:53.288] <TB3> INFO: dacScan step from 140 .. 159

[10:11:24.476] <TB3> INFO: Test took 31188ms.
[10:11:24.756] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:24.806] <TB3> INFO: dacScan step from 160 .. 179
[10:11:58.288] <TB3> INFO: Test took 33482ms.
[10:11:58.636] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:58.698] <TB3> INFO: dacScan step from 180 .. 199
[10:12:32.838] <TB3> INFO: Test took 34139ms.
[10:12:33.146] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:03.845] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[10:13:03.854] <TB3> INFO: dacScan step from 0 .. 19
[10:13:26.607] <TB3> INFO: Test took 22753ms.
[10:13:26.641] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:26.641] <TB3> INFO: dacScan step from 20 .. 39
[10:13:47.998] <TB3> INFO: Test took 21357ms.
[10:13:48.043] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:48.043] <TB3> INFO: dacScan step from 40 .. 59
[10:14:09.921] <TB3> INFO: Test took 21878ms.
[10:14:09.962] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:09.962] <TB3> INFO: dacScan step from 60 .. 79
[10:14:32.678] <TB3> INFO: Test took 22716ms.
[10:14:32.721] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:32.721] <TB3> INFO: dacScan step from 80 .. 99
[10:14:57.168] <TB3> INFO: Test took 24447ms.
[10:14:57.294] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:57.306] <TB3> INFO: dacScan step from 100 .. 119
[10:15:27.718] <TB3> INFO: Test took 30412ms.
[10:15:28.033] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:28.079] <TB3> INFO: dacScan step from 120 .. 139


[10:15:59.466] <TB3> INFO: Test took 31387ms.
[10:15:59.751] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:59.806] <TB3> INFO: dacScan step from 140 .. 155
[10:16:24.485] <TB3> INFO: Test took 24679ms.
[10:16:24.729] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:49.165] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 147 (20) hits flags = 16 (plus default)
[10:16:49.173] <TB3> INFO: dacScan step from 0 .. 19
[10:17:11.838] <TB3> INFO: Test took 22665ms.
[10:17:11.880] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:11.880] <TB3> INFO: dacScan step from 20 .. 39
[10:17:34.637] <TB3> INFO: Test took 22757ms.
[10:17:34.681] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:34.681] <TB3> INFO: dacScan step from 40 .. 59
[10:17:57.467] <TB3> INFO: Test took 22786ms.
[10:17:57.507] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:57.507] <TB3> INFO: dacScan step from 60 .. 79
[10:18:18.893] <TB3> INFO: Test took 21386ms.
[10:18:18.931] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:18.931] <TB3> INFO: dacScan step from 80 .. 99
[10:18:41.784] <TB3> INFO: Test took 22853ms.
[10:18:41.928] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:41.943] <TB3> INFO: dacScan step from 100 .. 119
[10:19:11.194] <TB3> INFO: Test took 29251ms.
[10:19:11.481] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:11.534] <TB3> INFO: dacScan step from 120 .. 139


[10:19:42.835] <TB3> INFO: Test took 31301ms.
[10:19:43.131] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:43.188] <TB3> INFO: dacScan step from 140 .. 147
[10:19:58.120] <TB3> INFO: Test took 14932ms.
[10:19:58.228] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:19.778] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 146 (20) hits flags = 16 (plus default)
[10:20:19.786] <TB3> INFO: dacScan step from 0 .. 19
[10:20:41.230] <TB3> INFO: Test took 21444ms.
[10:20:41.265] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:41.265] <TB3> INFO: dacScan step from 20 .. 39
[10:21:04.146] <TB3> INFO: Test took 22880ms.
[10:21:04.185] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:04.185] <TB3> INFO: dacScan step from 40 .. 59
[10:21:27.058] <TB3> INFO: Test took 22873ms.
[10:21:27.095] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:27.095] <TB3> INFO: dacScan step from 60 .. 79
[10:21:49.910] <TB3> INFO: Test took 22815ms.
[10:21:49.953] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:49.953] <TB3> INFO: dacScan step from 80 .. 99
[10:22:14.639] <TB3> INFO: Test took 24686ms.
[10:22:14.750] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:14.762] <TB3> INFO: dacScan step from 100 .. 119
[10:22:45.591] <TB3> INFO: Test took 30828ms.
[10:22:45.855] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:45.897] <TB3> INFO: dacScan step from 120 .. 139

[10:23:17.758] <TB3> INFO: Test took 31860ms.
[10:23:18.038] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:18.094] <TB3> INFO: dacScan step from 140 .. 146
[10:23:31.505] <TB3> INFO: Test took 13411ms.
[10:23:31.604] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:55.895] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 146 (20) hits flags = 16 (plus default)
[10:23:55.904] <TB3> INFO: dacScan step from 0 .. 19
[10:24:17.115] <TB3> INFO: Test took 21211ms.
[10:24:17.162] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:17.162] <TB3> INFO: dacScan step from 20 .. 39
[10:24:39.312] <TB3> INFO: Test took 22150ms.
[10:24:39.355] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:39.355] <TB3> INFO: dacScan step from 40 .. 59
[10:25:00.520] <TB3> INFO: Test took 21165ms.
[10:25:00.557] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:00.557] <TB3> INFO: dacScan step from 60 .. 79
[10:25:23.346] <TB3> INFO: Test took 22788ms.
[10:25:23.384] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:23.384] <TB3> INFO: dacScan step from 80 .. 99
[10:25:47.876] <TB3> INFO: Test took 24492ms.
[10:25:47.990] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:48.003] <TB3> INFO: dacScan step from 100 .. 119
[10:26:19.881] <TB3> INFO: Test took 31878ms.
[10:26:20.196] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:20.235] <TB3> INFO: dacScan step from 120 .. 139



[10:26:53.593] <TB3> INFO: Test took 33358ms.
[10:26:53.873] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:53.923] <TB3> INFO: dacScan step from 140 .. 146
[10:27:06.311] <TB3> INFO: Test took 12388ms.
[10:27:06.459] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:28.818] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:27:28.819] <TB3> INFO: PixTestTrim::doTest() done, duration: 2419 seconds
[10:27:29.523] <TB3> INFO: ######################################################################
[10:27:29.523] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:27:29.523] <TB3> INFO: ######################################################################
[10:27:32.961] <TB3> INFO: Test took 3436ms.
[10:27:32.981] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:36.633] <TB3> INFO: Test took 3454ms.
[10:27:36.710] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:40.190] <TB3> INFO: Test took 3469ms.
[10:27:40.263] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:40.270] <TB3> INFO: The DUT currently contains the following objects:
[10:27:40.270] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:40.270] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:40.270] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:40.270] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:40.270] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:40.270] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.379] <TB3> INFO: Test took 1109ms.
[10:27:41.381] <TB3> INFO: The DUT currently contains the following objects:
[10:27:41.381] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:41.381] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:41.381] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:41.381] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:41.381] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:41.381] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.489] <TB3> INFO: Test took 1108ms.
[10:27:42.490] <TB3> INFO: The DUT currently contains the following objects:
[10:27:42.501] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:42.501] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:42.501] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:42.501] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:42.501] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.501] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.501] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.501] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.501] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:42.502] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.598] <TB3> INFO: Test took 1096ms.
[10:27:43.600] <TB3> INFO: The DUT currently contains the following objects:
[10:27:43.600] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:43.600] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:43.600] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:43.600] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:43.600] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:43.600] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.709] <TB3> INFO: Test took 1108ms.
[10:27:44.711] <TB3> INFO: The DUT currently contains the following objects:
[10:27:44.711] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:44.711] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:44.711] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:44.711] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:44.711] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:44.711] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.813] <TB3> INFO: Test took 1102ms.
[10:27:45.813] <TB3> INFO: The DUT currently contains the following objects:
[10:27:45.813] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:45.813] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:45.814] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:45.814] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:45.814] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:45.814] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.920] <TB3> INFO: Test took 1106ms.
[10:27:46.921] <TB3> INFO: The DUT currently contains the following objects:
[10:27:46.921] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:46.921] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:46.921] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:46.921] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:46.921] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:46.921] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.028] <TB3> INFO: Test took 1107ms.
[10:27:48.029] <TB3> INFO: The DUT currently contains the following objects:
[10:27:48.029] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:48.029] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:48.029] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:48.029] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:48.029] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.029] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:48.030] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.137] <TB3> INFO: Test took 1107ms.
[10:27:49.138] <TB3> INFO: The DUT currently contains the following objects:
[10:27:49.139] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:49.139] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:49.139] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:49.139] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:49.139] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.139] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:49.140] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.250] <TB3> INFO: Test took 1110ms.
[10:27:50.252] <TB3> INFO: The DUT currently contains the following objects:
[10:27:50.252] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:50.252] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:50.252] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:50.252] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:50.252] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.252] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.252] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.252] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.252] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.252] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.252] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.252] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.252] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.253] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.253] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.253] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.253] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.253] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.253] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:50.253] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.360] <TB3> INFO: Test took 1107ms.
[10:27:51.361] <TB3> INFO: The DUT currently contains the following objects:
[10:27:51.361] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:51.361] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:51.361] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:51.361] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:51.361] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:51.361] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.468] <TB3> INFO: Test took 1107ms.
[10:27:52.469] <TB3> INFO: The DUT currently contains the following objects:
[10:27:52.469] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:52.469] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:52.469] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:52.469] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:52.469] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.469] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.469] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.469] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.469] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.469] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:52.470] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.578] <TB3> INFO: Test took 1108ms.
[10:27:53.579] <TB3> INFO: The DUT currently contains the following objects:
[10:27:53.579] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:53.579] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:53.579] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:53.579] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:53.579] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.579] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.579] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.579] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.579] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.579] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.579] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.579] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.580] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.580] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.580] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.580] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.580] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.580] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.580] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:53.580] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.683] <TB3> INFO: Test took 1103ms.
[10:27:54.684] <TB3> INFO: The DUT currently contains the following objects:
[10:27:54.684] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:54.684] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:54.684] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:54.684] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:54.684] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:54.684] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.785] <TB3> INFO: Test took 1101ms.
[10:27:55.786] <TB3> INFO: The DUT currently contains the following objects:
[10:27:55.786] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:55.786] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:55.786] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:55.786] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:55.786] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:55.786] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.887] <TB3> INFO: Test took 1101ms.
[10:27:56.887] <TB3> INFO: The DUT currently contains the following objects:
[10:27:56.887] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:27:56.887] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:27:56.887] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:27:56.888] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:27:56.888] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:56.888] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:27:57.991] <TB3> INFO: Test took 1103ms.
[10:27:57.994] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:31:38.789] <TB3> INFO: Test took 220795ms.
[10:31:40.563] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:22.509] <TB3> INFO: Test took 221946ms.
[10:35:24.393] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.400] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.407] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.413] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:35:24.420] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[10:35:24.426] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.433] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.440] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.446] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.453] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.459] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.466] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.473] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.479] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.486] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:35:24.492] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[10:35:24.499] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[10:35:24.505] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[10:35:24.512] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[10:35:24.519] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.525] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.532] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.538] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:24.594] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:35:24.595] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:35:24.600] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:35:24.600] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:35:24.602] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:35:24.602] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:35:24.603] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:35:24.603] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:35:24.603] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:35:24.608] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:35:24.608] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:35:24.611] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:35:24.611] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:35:24.612] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:35:24.612] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:35:24.630] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:35:28.091] <TB3> INFO: Test took 3458ms.
[10:35:31.812] <TB3> INFO: Test took 3444ms.
[10:35:35.562] <TB3> INFO: Test took 3473ms.
[10:35:35.851] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:36.770] <TB3> INFO: Test took 919ms.
[10:35:36.774] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:37.882] <TB3> INFO: Test took 1108ms.
[10:35:37.885] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:38.993] <TB3> INFO: Test took 1109ms.
[10:35:38.997] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:40.105] <TB3> INFO: Test took 1108ms.
[10:35:40.109] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:41.218] <TB3> INFO: Test took 1109ms.
[10:35:41.222] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:42.331] <TB3> INFO: Test took 1109ms.
[10:35:42.334] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:43.441] <TB3> INFO: Test took 1107ms.
[10:35:43.444] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:44.552] <TB3> INFO: Test took 1108ms.
[10:35:44.556] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:45.664] <TB3> INFO: Test took 1108ms.
[10:35:45.667] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:46.775] <TB3> INFO: Test took 1108ms.
[10:35:46.779] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:47.887] <TB3> INFO: Test took 1108ms.
[10:35:47.890] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:48.997] <TB3> INFO: Test took 1107ms.
[10:35:49.000] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:50.108] <TB3> INFO: Test took 1108ms.
[10:35:50.111] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:51.218] <TB3> INFO: Test took 1107ms.
[10:35:51.222] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:52.330] <TB3> INFO: Test took 1108ms.
[10:35:52.333] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:53.442] <TB3> INFO: Test took 1109ms.
[10:35:53.446] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:54.553] <TB3> INFO: Test took 1107ms.
[10:35:54.555] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:55.663] <TB3> INFO: Test took 1108ms.
[10:35:55.666] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:56.769] <TB3> INFO: Test took 1103ms.
[10:35:56.771] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:57.872] <TB3> INFO: Test took 1101ms.
[10:35:57.875] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:58.983] <TB3> INFO: Test took 1109ms.
[10:35:58.986] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:00.095] <TB3> INFO: Test took 1109ms.
[10:36:00.099] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:01.206] <TB3> INFO: Test took 1108ms.
[10:36:01.210] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:02.320] <TB3> INFO: Test took 1110ms.
[10:36:02.323] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:03.431] <TB3> INFO: Test took 1108ms.
[10:36:03.434] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:04.543] <TB3> INFO: Test took 1109ms.
[10:36:04.547] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:05.657] <TB3> INFO: Test took 1110ms.
[10:36:05.661] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:06.770] <TB3> INFO: Test took 1109ms.
[10:36:06.774] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:07.882] <TB3> INFO: Test took 1109ms.
[10:36:07.886] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:08.995] <TB3> INFO: Test took 1110ms.
[10:36:08.999] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:10.106] <TB3> INFO: Test took 1108ms.
[10:36:10.108] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:11.217] <TB3> INFO: Test took 1109ms.
[10:36:11.770] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 522 seconds
[10:36:11.770] <TB3> INFO: PH scale (per ROC): 77 89 80 85 88 82 84 80 80 80 89 86 82 84 80 80
[10:36:11.770] <TB3> INFO: PH offset (per ROC): 158 148 159 145 147 156 145 170 153 156 155 176 174 150 164 159
[10:36:11.960] <TB3> INFO: ######################################################################
[10:36:11.960] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:36:11.960] <TB3> INFO: ######################################################################
[10:36:11.970] <TB3> INFO: scanning low vcal = 10
[10:36:15.823] <TB3> INFO: Test took 3853ms.
[10:36:15.829] <TB3> INFO: scanning low vcal = 20
[10:36:19.676] <TB3> INFO: Test took 3847ms.
[10:36:19.681] <TB3> INFO: scanning low vcal = 30
[10:36:23.559] <TB3> INFO: Test took 3878ms.
[10:36:23.569] <TB3> INFO: scanning low vcal = 40
[10:36:27.916] <TB3> INFO: Test took 4347ms.
[10:36:27.982] <TB3> INFO: scanning low vcal = 50
[10:36:32.369] <TB3> INFO: Test took 4387ms.
[10:36:32.437] <TB3> INFO: scanning low vcal = 60
[10:36:36.816] <TB3> INFO: Test took 4379ms.
[10:36:36.886] <TB3> INFO: scanning low vcal = 70
[10:36:41.253] <TB3> INFO: Test took 4367ms.
[10:36:41.334] <TB3> INFO: scanning low vcal = 80
[10:36:45.686] <TB3> INFO: Test took 4352ms.
[10:36:45.748] <TB3> INFO: scanning low vcal = 90
[10:36:50.137] <TB3> INFO: Test took 4389ms.
[10:36:50.199] <TB3> INFO: scanning low vcal = 100
[10:36:54.586] <TB3> INFO: Test took 4387ms.
[10:36:54.654] <TB3> INFO: scanning low vcal = 110
[10:36:59.016] <TB3> INFO: Test took 4362ms.
[10:36:59.083] <TB3> INFO: scanning low vcal = 120
[10:37:03.438] <TB3> INFO: Test took 4355ms.
[10:37:03.504] <TB3> INFO: scanning low vcal = 130
[10:37:07.871] <TB3> INFO: Test took 4367ms.
[10:37:07.930] <TB3> INFO: scanning low vcal = 140
[10:37:12.276] <TB3> INFO: Test took 4346ms.
[10:37:12.347] <TB3> INFO: scanning low vcal = 150
[10:37:16.750] <TB3> INFO: Test took 4403ms.
[10:37:16.815] <TB3> INFO: scanning low vcal = 160
[10:37:21.211] <TB3> INFO: Test took 4396ms.
[10:37:21.279] <TB3> INFO: scanning low vcal = 170
[10:37:25.632] <TB3> INFO: Test took 4353ms.
[10:37:25.708] <TB3> INFO: scanning low vcal = 180
[10:37:30.090] <TB3> INFO: Test took 4382ms.
[10:37:30.157] <TB3> INFO: scanning low vcal = 190
[10:37:34.607] <TB3> INFO: Test took 4450ms.
[10:37:34.674] <TB3> INFO: scanning low vcal = 200
[10:37:39.004] <TB3> INFO: Test took 4330ms.
[10:37:39.071] <TB3> INFO: scanning low vcal = 210
[10:37:43.427] <TB3> INFO: Test took 4356ms.
[10:37:43.487] <TB3> INFO: scanning low vcal = 220
[10:37:47.860] <TB3> INFO: Test took 4373ms.
[10:37:47.921] <TB3> INFO: scanning low vcal = 230
[10:37:52.288] <TB3> INFO: Test took 4367ms.
[10:37:52.363] <TB3> INFO: scanning low vcal = 240
[10:37:56.739] <TB3> INFO: Test took 4376ms.
[10:37:56.800] <TB3> INFO: scanning low vcal = 250
[10:38:01.184] <TB3> INFO: Test took 4384ms.
[10:38:01.253] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[10:38:05.648] <TB3> INFO: Test took 4395ms.
[10:38:05.709] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[10:38:10.055] <TB3> INFO: Test took 4346ms.
[10:38:10.133] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[10:38:14.492] <TB3> INFO: Test took 4359ms.
[10:38:14.558] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[10:38:18.945] <TB3> INFO: Test took 4387ms.
[10:38:19.013] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:38:23.387] <TB3> INFO: Test took 4374ms.
[10:38:23.946] <TB3> INFO: PixTestGainPedestal::measure() done
[10:38:56.968] <TB3> INFO: PixTestGainPedestal::fit() done
[10:38:56.968] <TB3> INFO: non-linearity mean: 0.959 0.959 0.954 0.957 0.958 0.962 0.956 0.949 0.954 0.959 0.959 0.963 0.957 0.954 0.951 0.964
[10:38:56.968] <TB3> INFO: non-linearity RMS: 0.006 0.006 0.005 0.006 0.005 0.005 0.005 0.007 0.005 0.006 0.007 0.005 0.006 0.006 0.006 0.005
[10:38:56.968] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:38:57.000] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:38:57.025] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:38:57.049] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:38:57.073] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:38:57.098] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:38:57.122] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:38:57.146] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:38:57.170] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:38:57.194] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:38:57.219] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:38:57.243] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:38:57.267] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:38:57.291] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:38:57.316] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:38:57.340] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2059_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:38:57.364] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 165 seconds
[10:38:57.389] <TB3> INFO: enter test to run
[10:38:57.391] <TB3> INFO: test: exit no parameter change
[10:38:58.189] <TB3> QUIET: Connection to board 170 closed.
[10:38:58.269] <TB3> INFO: pXar: this is the end, my friend