[14:24:25.761] <TB2> INFO: *** Welcome to pxar ***
[14:24:25.761] <TB2> INFO: *** Today: 2015/08/04
[14:24:25.761] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C15.dat
[14:24:25.763] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//tbmParameters_C0b.dat
[14:24:25.763] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//defaultMaskFile.dat
[14:24:25.763] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters_C15.dat
[14:24:25.831] <TB2> INFO: clk: 4
[14:24:25.831] <TB2> INFO: ctr: 4
[14:24:25.831] <TB2> INFO: sda: 19
[14:24:25.831] <TB2> INFO: tin: 9
[14:24:25.831] <TB2> INFO: level: 15
[14:24:25.831] <TB2> INFO: triggerdelay: 0
[14:24:25.831] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[14:24:25.831] <TB2> INFO: Log level: INFO
[14:24:25.846] <TB2> INFO: Found DTB DTB_WXC55Z
[14:24:25.860] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[14:24:25.863] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[14:24:25.866] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[14:24:27.410] <TB2> INFO: DUT info:
[14:24:27.410] <TB2> INFO: The DUT currently contains the following objects:
[14:24:27.410] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:24:27.410] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:24:27.410] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:24:27.410] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:24:27.410] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.410] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.411] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.411] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.411] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.411] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.411] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.411] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:27.812] <TB2> INFO: enter 'restricted' command line mode
[14:24:27.812] <TB2> INFO: enter test to run
[14:24:27.812] <TB2> INFO: test: pretest no parameter change
[14:24:27.812] <TB2> INFO: running: pretest
[14:24:27.819] <TB2> INFO: ######################################################################
[14:24:27.819] <TB2> INFO: PixTestPretest::doTest()
[14:24:27.819] <TB2> INFO: ######################################################################
[14:24:27.820] <TB2> INFO: ----------------------------------------------------------------------
[14:24:27.820] <TB2> INFO: PixTestPretest::programROC()
[14:24:27.820] <TB2> INFO: ----------------------------------------------------------------------
[14:24:45.835] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:24:45.835] <TB2> INFO: IA differences per ROC: 18.5 18.5 19.3 18.5 17.7 20.9 20.1 20.1 23.3 19.3 16.9 16.9 19.3 20.1 20.9 19.3
[14:24:45.890] <TB2> INFO: ----------------------------------------------------------------------
[14:24:45.890] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:24:45.890] <TB2> INFO: ----------------------------------------------------------------------
[14:24:51.653] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[14:24:51.656] <TB2> INFO: ----------------------------------------------------------------------
[14:24:51.656] <TB2> INFO: PixTestPretest::findWorkingPixel()
[14:24:51.656] <TB2> INFO: ----------------------------------------------------------------------
[14:25:00.369] <TB2> INFO: Test took 8708ms.
[14:25:00.672] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:25:00.690] <TB2> INFO: ----------------------------------------------------------------------
[14:25:00.690] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[14:25:00.690] <TB2> INFO: ----------------------------------------------------------------------
[14:25:09.318] <TB2> INFO: Test took 8625ms.
[14:25:09.601] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[14:25:09.601] <TB2> INFO: CalDel: 145 131 141 145 136 131 145 161 155 156 123 133 146 146 137 143
[14:25:09.601] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:25:09.604] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C0.dat
[14:25:09.605] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C1.dat
[14:25:09.605] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C2.dat
[14:25:09.605] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C3.dat
[14:25:09.605] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C4.dat
[14:25:09.606] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C5.dat
[14:25:09.606] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C6.dat
[14:25:09.606] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C7.dat
[14:25:09.606] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C8.dat
[14:25:09.607] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C9.dat
[14:25:09.607] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C10.dat
[14:25:09.607] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C11.dat
[14:25:09.607] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C12.dat
[14:25:09.608] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C13.dat
[14:25:09.608] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C14.dat
[14:25:09.608] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C15.dat
[14:25:09.608] <TB2> INFO: PixTestPretest::doTest() done, duration: 41 seconds
[14:25:09.703] <TB2> INFO: enter test to run
[14:25:09.703] <TB2> INFO: test: fulltest no parameter change
[14:25:09.703] <TB2> INFO: running: fulltest
[14:25:09.703] <TB2> INFO: ######################################################################
[14:25:09.703] <TB2> INFO: PixTestFullTest::doTest()
[14:25:09.703] <TB2> INFO: ######################################################################
[14:25:09.705] <TB2> INFO: ######################################################################
[14:25:09.705] <TB2> INFO: PixTestAlive::doTest()
[14:25:09.705] <TB2> INFO: ######################################################################
[14:25:09.706] <TB2> INFO: ----------------------------------------------------------------------
[14:25:09.706] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:25:09.706] <TB2> INFO: ----------------------------------------------------------------------
[14:25:13.255] <TB2> INFO: Test took 3548ms.
[14:25:13.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:13.487] <TB2> INFO: PixTestAlive::aliveTest() done
[14:25:13.487] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 3 0 0 0 0 0 0 0 0 0
[14:25:13.489] <TB2> INFO: ----------------------------------------------------------------------
[14:25:13.489] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:25:13.489] <TB2> INFO: ----------------------------------------------------------------------
[14:25:16.335] <TB2> INFO: Test took 2845ms.
[14:25:16.337] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:16.346] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:25:16.556] <TB2> INFO: PixTestAlive::maskTest() done
[14:25:16.556] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:25:16.558] <TB2> INFO: ----------------------------------------------------------------------
[14:25:16.558] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:25:16.558] <TB2> INFO: ----------------------------------------------------------------------
[14:25:20.095] <TB2> INFO: Test took 3536ms.
[14:25:20.118] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:20.329] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[14:25:20.329] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:25:20.329] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[14:25:20.336] <TB2> INFO: ######################################################################
[14:25:20.336] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:25:20.336] <TB2> INFO: ######################################################################
[14:25:20.337] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:25:20.349] <TB2> INFO: dacScan step from 0 .. 29
[14:25:42.306] <TB2> INFO: Test took 21957ms.
[14:25:42.341] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:42.341] <TB2> INFO: dacScan step from 30 .. 59
[14:26:06.779] <TB2> INFO: Test took 24438ms.
[14:26:06.905] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:06.923] <TB2> INFO: dacScan step from 60 .. 89
[14:26:37.469] <TB2> INFO: Test took 30546ms.
[14:26:37.736] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:37.833] <TB2> INFO: dacScan step from 90 .. 119
[14:27:08.235] <TB2> INFO: Test took 30402ms.
[14:27:08.528] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:08.619] <TB2> INFO: dacScan step from 120 .. 149
[14:27:35.418] <TB2> INFO: Test took 26799ms.
[14:27:35.614] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:00.640] <TB2> INFO: PixTestBBMap::doTest() done, duration: 160 seconds
[14:28:00.640] <TB2> INFO: number of dead bumps (per ROC): 3 0 0 0 0 0 1 0 0 0 0 0 0 0 0 4
[14:28:00.640] <TB2> INFO: separation cut (per ROC): 77 69 77 76 77 91 87 82 83 81 87 90 78 72 86 76
[14:28:00.718] <TB2> INFO: ######################################################################
[14:28:00.718] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[14:28:00.718] <TB2> INFO: ######################################################################
[14:28:00.718] <TB2> INFO: ----------------------------------------------------------------------
[14:28:00.718] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:28:00.718] <TB2> INFO: ----------------------------------------------------------------------
[14:28:00.718] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:28:00.728] <TB2> INFO: dacScan step from 0 .. 3
[14:28:19.069] <TB2> INFO: Test took 18341ms.
[14:28:19.096] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:19.096] <TB2> INFO: dacScan step from 4 .. 7
[14:28:38.714] <TB2> INFO: Test took 19618ms.
[14:28:38.741] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:38.741] <TB2> INFO: dacScan step from 8 .. 11
[14:28:57.333] <TB2> INFO: Test took 18592ms.
[14:28:57.359] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:57.359] <TB2> INFO: dacScan step from 12 .. 15
[14:29:17.563] <TB2> INFO: Test took 20204ms.
[14:29:17.589] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:17.589] <TB2> INFO: dacScan step from 16 .. 19
[14:29:37.425] <TB2> INFO: Test took 19836ms.
[14:29:37.449] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:37.449] <TB2> INFO: dacScan step from 20 .. 23
[14:29:57.265] <TB2> INFO: Test took 19816ms.
[14:29:57.290] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:57.290] <TB2> INFO: dacScan step from 24 .. 27
[14:30:17.273] <TB2> INFO: Test took 19983ms.
[14:30:17.301] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:17.301] <TB2> INFO: dacScan step from 28 .. 31
[14:30:37.529] <TB2> INFO: Test took 20228ms.
[14:30:37.559] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:37.559] <TB2> INFO: dacScan step from 32 .. 35
[14:30:57.552] <TB2> INFO: Test took 19992ms.
[14:30:57.583] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:57.583] <TB2> INFO: dacScan step from 36 .. 39
[14:31:17.602] <TB2> INFO: Test took 20019ms.
[14:31:17.629] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:17.629] <TB2> INFO: dacScan step from 40 .. 43
[14:31:37.541] <TB2> INFO: Test took 19911ms.
[14:31:37.567] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:37.567] <TB2> INFO: dacScan step from 44 .. 47
[14:31:57.567] <TB2> INFO: Test took 20000ms.
[14:31:57.597] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:57.597] <TB2> INFO: dacScan step from 48 .. 51
[14:32:17.672] <TB2> INFO: Test took 20075ms.
[14:32:17.700] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:17.700] <TB2> INFO: dacScan step from 52 .. 55
[14:32:37.804] <TB2> INFO: Test took 20104ms.
[14:32:37.830] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:37.830] <TB2> INFO: dacScan step from 56 .. 59
[14:32:57.863] <TB2> INFO: Test took 20033ms.
[14:32:57.891] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:57.891] <TB2> INFO: dacScan step from 60 .. 63
[14:33:17.945] <TB2> INFO: Test took 20054ms.
[14:33:17.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:17.975] <TB2> INFO: dacScan step from 64 .. 67
[14:33:38.159] <TB2> INFO: Test took 20184ms.
[14:33:38.192] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:38.192] <TB2> INFO: dacScan step from 68 .. 71
[14:33:58.792] <TB2> INFO: Test took 20600ms.
[14:33:58.832] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:58.833] <TB2> INFO: dacScan step from 72 .. 75
[14:34:19.928] <TB2> INFO: Test took 21095ms.
[14:34:19.990] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:19.992] <TB2> INFO: dacScan step from 76 .. 79
[14:34:42.312] <TB2> INFO: Test took 22320ms.
[14:34:42.392] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:42.396] <TB2> INFO: dacScan step from 80 .. 83
[14:35:07.415] <TB2> INFO: Test took 25019ms.
[14:35:07.553] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:07.564] <TB2> INFO: dacScan step from 84 .. 87
[14:35:34.781] <TB2> INFO: Test took 27217ms.
[14:35:34.971] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:34.982] <TB2> INFO: dacScan step from 88 .. 91
[14:36:03.992] <TB2> INFO: Test took 29010ms.
[14:36:04.207] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:04.219] <TB2> INFO: dacScan step from 92 .. 95





[14:36:34.943] <TB2> INFO: Test took 30724ms.
[14:36:35.170] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:35.180] <TB2> INFO: dacScan step from 96 .. 99


[14:37:06.738] <TB2> INFO: Test took 31558ms.
[14:37:06.964] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:06.976] <TB2> INFO: dacScan step from 100 .. 103


[14:37:38.408] <TB2> INFO: Test took 31432ms.
[14:37:38.627] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:38.639] <TB2> INFO: dacScan step from 104 .. 107


[14:38:10.410] <TB2> INFO: Test took 31771ms.
[14:38:10.642] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:10.654] <TB2> INFO: dacScan step from 108 .. 111

[14:38:42.321] <TB2> INFO: Test took 31667ms.
[14:38:42.547] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:42.558] <TB2> INFO: dacScan step from 112 .. 115





[14:39:14.444] <TB2> INFO: Test took 31886ms.
[14:39:14.714] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:14.728] <TB2> INFO: dacScan step from 116 .. 119
[14:39:51.196] <TB2> INFO: Test took 36468ms.
[14:39:51.433] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:51.446] <TB2> INFO: dacScan step from 120 .. 123
[14:40:22.861] <TB2> INFO: Test took 31415ms.
[14:40:23.093] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:23.106] <TB2> INFO: dacScan step from 124 .. 127
[14:40:54.280] <TB2> INFO: Test took 31173ms.
[14:40:54.512] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:54.524] <TB2> INFO: dacScan step from 128 .. 131
[14:41:25.716] <TB2> INFO: Test took 31192ms.
[14:41:25.942] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:25.955] <TB2> INFO: dacScan step from 132 .. 135
[14:41:57.530] <TB2> INFO: Test took 31575ms.
[14:41:57.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:57.812] <TB2> INFO: dacScan step from 136 .. 139
[14:42:29.097] <TB2> INFO: Test took 31285ms.
[14:42:29.341] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:29.353] <TB2> INFO: dacScan step from 140 .. 143
[14:43:00.396] <TB2> INFO: Test took 31043ms.
[14:43:00.655] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:00.667] <TB2> INFO: dacScan step from 144 .. 147
[14:43:32.097] <TB2> INFO: Test took 31430ms.
[14:43:32.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:32.342] <TB2> INFO: dacScan step from 148 .. 149
[14:43:49.342] <TB2> INFO: Test took 17000ms.
[14:43:49.454] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:49.461] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:43:50.907] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:43:52.426] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:43:53.956] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:43:55.488] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:43:57.015] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:43:58.500] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:43:59.949] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:01.358] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:02.850] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:04.375] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:05.802] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:07.285] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:08.768] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:10.242] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:11.714] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:44:13.235] <TB2> INFO: PixTestScurves::scurves() done
[14:44:13.235] <TB2> INFO: Vcal mean: 93.43 73.56 86.30 80.19 79.30 86.84 89.89 93.80 87.88 92.26 83.83 91.58 81.47 82.55 89.77 84.79
[14:44:13.235] <TB2> INFO: Vcal RMS: 6.86 4.24 4.98 5.10 4.24 4.91 7.24 5.68 5.00 5.81 5.51 5.18 4.23 5.07 5.07 4.71
[14:44:13.235] <TB2> INFO: PixTestScurves::fullTest() done, duration: 972 seconds
[14:44:13.310] <TB2> INFO: ######################################################################
[14:44:13.310] <TB2> INFO: PixTestTrim::doTest()
[14:44:13.310] <TB2> INFO: ######################################################################
[14:44:13.311] <TB2> INFO: ----------------------------------------------------------------------
[14:44:13.311] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[14:44:13.311] <TB2> INFO: ----------------------------------------------------------------------
[14:44:13.391] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:44:13.391] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:44:13.400] <TB2> INFO: dacScan step from 0 .. 19
[14:44:28.932] <TB2> INFO: Test took 15532ms.
[14:44:28.954] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:28.954] <TB2> INFO: dacScan step from 20 .. 39
[14:44:44.394] <TB2> INFO: Test took 15440ms.
[14:44:44.419] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:44.419] <TB2> INFO: dacScan step from 40 .. 59
[14:45:00.130] <TB2> INFO: Test took 15710ms.
[14:45:00.154] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:00.154] <TB2> INFO: dacScan step from 60 .. 79
[14:45:15.704] <TB2> INFO: Test took 15550ms.
[14:45:15.730] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:15.730] <TB2> INFO: dacScan step from 80 .. 99
[14:45:32.318] <TB2> INFO: Test took 16588ms.
[14:45:32.381] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:32.390] <TB2> INFO: dacScan step from 100 .. 119
[14:45:52.015] <TB2> INFO: Test took 19625ms.
[14:45:52.256] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:52.294] <TB2> INFO: dacScan step from 120 .. 139
[14:46:10.719] <TB2> INFO: Test took 18425ms.
[14:46:10.859] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:10.885] <TB2> INFO: dacScan step from 140 .. 159
[14:46:27.229] <TB2> INFO: Test took 16344ms.
[14:46:27.288] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:47.638] <TB2> INFO: ROC 0 VthrComp = 92
[14:46:47.639] <TB2> INFO: ROC 1 VthrComp = 78
[14:46:47.639] <TB2> INFO: ROC 2 VthrComp = 88
[14:46:47.639] <TB2> INFO: ROC 3 VthrComp = 84
[14:46:47.639] <TB2> INFO: ROC 4 VthrComp = 86
[14:46:47.639] <TB2> INFO: ROC 5 VthrComp = 96
[14:46:47.639] <TB2> INFO: ROC 6 VthrComp = 91
[14:46:47.639] <TB2> INFO: ROC 7 VthrComp = 98
[14:46:47.639] <TB2> INFO: ROC 8 VthrComp = 94
[14:46:47.639] <TB2> INFO: ROC 9 VthrComp = 94
[14:46:47.639] <TB2> INFO: ROC 10 VthrComp = 89
[14:46:47.639] <TB2> INFO: ROC 11 VthrComp = 96
[14:46:47.639] <TB2> INFO: ROC 12 VthrComp = 89
[14:46:47.639] <TB2> INFO: ROC 13 VthrComp = 85
[14:46:47.639] <TB2> INFO: ROC 14 VthrComp = 95
[14:46:47.639] <TB2> INFO: ROC 15 VthrComp = 88
[14:46:47.639] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:46:47.639] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:46:47.649] <TB2> INFO: dacScan step from 0 .. 19
[14:47:03.348] <TB2> INFO: Test took 15699ms.
[14:47:03.373] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:03.373] <TB2> INFO: dacScan step from 20 .. 39
[14:47:19.324] <TB2> INFO: Test took 15951ms.
[14:47:19.353] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:19.357] <TB2> INFO: dacScan step from 40 .. 59
[14:47:39.238] <TB2> INFO: Test took 19881ms.
[14:47:39.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:39.435] <TB2> INFO: dacScan step from 60 .. 79
[14:48:00.752] <TB2> INFO: Test took 21316ms.
[14:48:00.914] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:00.971] <TB2> INFO: dacScan step from 80 .. 99
[14:48:22.286] <TB2> INFO: Test took 21315ms.
[14:48:22.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:22.502] <TB2> INFO: dacScan step from 100 .. 119
[14:48:42.911] <TB2> INFO: Test took 20409ms.
[14:48:43.174] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:43.245] <TB2> INFO: dacScan step from 120 .. 139
[14:49:04.496] <TB2> INFO: Test took 21251ms.
[14:49:04.675] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:04.736] <TB2> INFO: dacScan step from 140 .. 159
[14:49:25.765] <TB2> INFO: Test took 21029ms.
[14:49:25.927] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:50.410] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 63.126 for pixel 18/78 mean/min/max = 47.1936/31.0588/63.3285
[14:49:50.410] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 57.8921 for pixel 12/69 mean/min/max = 46.6279/35.3424/57.9135
[14:49:50.410] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 58.7315 for pixel 16/72 mean/min/max = 45.8098/32.703/58.9166
[14:49:50.410] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.7768 for pixel 15/79 mean/min/max = 45.9268/31.9843/59.8693
[14:49:50.411] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 56.9606 for pixel 17/78 mean/min/max = 44.478/31.8898/57.0662
[14:49:50.411] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.5506 for pixel 0/12 mean/min/max = 44.0997/31.5954/56.604
[14:49:50.411] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 61.2986 for pixel 2/79 mean/min/max = 46.3317/31.2002/61.4632
[14:49:50.411] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.4157 for pixel 29/75 mean/min/max = 44.8439/31.1718/58.5159
[14:49:50.412] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 58.3005 for pixel 39/2 mean/min/max = 45.4132/32.4592/58.3672
[14:49:50.412] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 60.5831 for pixel 0/3 mean/min/max = 46.4541/32.2795/60.6286
[14:49:50.412] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.0265 for pixel 4/68 mean/min/max = 46.1082/32.1104/60.1061
[14:49:50.412] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 57.1237 for pixel 39/76 mean/min/max = 44.4043/31.391/57.4176
[14:49:50.413] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 56.9953 for pixel 1/72 mean/min/max = 44.8947/32.5998/57.1895
[14:49:50.413] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.691 for pixel 0/70 mean/min/max = 45.3979/31.9606/58.8351
[14:49:50.413] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 56.9408 for pixel 4/0 mean/min/max = 44.5564/32.1645/56.9483
[14:49:50.413] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.8747 for pixel 39/1 mean/min/max = 45.4997/33.0209/57.9784
[14:49:50.414] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:51:30.753] <TB2> INFO: Test took 100339ms.
[14:51:32.157] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:51:32.166] <TB2> INFO: dacScan step from 0 .. 19
[14:51:54.805] <TB2> INFO: Test took 22639ms.
[14:51:54.857] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:54.858] <TB2> INFO: dacScan step from 20 .. 39
[14:52:24.957] <TB2> INFO: Test took 30099ms.
[14:52:25.199] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:25.231] <TB2> INFO: dacScan step from 40 .. 59
[14:52:57.922] <TB2> INFO: Test took 32691ms.
[14:52:58.214] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:58.275] <TB2> INFO: dacScan step from 60 .. 79


[14:53:30.795] <TB2> INFO: Test took 32520ms.
[14:53:31.076] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:31.139] <TB2> INFO: dacScan step from 80 .. 99


[14:54:05.383] <TB2> INFO: Test took 34244ms.
[14:54:05.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:05.709] <TB2> INFO: dacScan step from 100 .. 119



[14:54:39.741] <TB2> INFO: Test took 34032ms.
[14:54:40.019] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:40.081] <TB2> INFO: dacScan step from 120 .. 139

[14:55:12.275] <TB2> INFO: Test took 32194ms.
[14:55:12.547] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:12.604] <TB2> INFO: dacScan step from 140 .. 159



[14:55:47.929] <TB2> INFO: Test took 35325ms.
[14:55:48.211] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:48.269] <TB2> INFO: dacScan step from 160 .. 179


[14:56:23.560] <TB2> INFO: Test took 35291ms.
[14:56:23.840] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:23.896] <TB2> INFO: dacScan step from 180 .. 199


[14:56:59.786] <TB2> INFO: Test took 35890ms.
[14:57:00.104] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:25.835] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.112187 .. 255.000000
[14:57:25.913] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:57:25.921] <TB2> INFO: dacScan step from 0 .. 19
[14:57:39.769] <TB2> INFO: Test took 13848ms.
[14:57:39.792] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:39.792] <TB2> INFO: dacScan step from 20 .. 39
[14:57:55.093] <TB2> INFO: Test took 15301ms.
[14:57:55.175] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:55.199] <TB2> INFO: dacScan step from 40 .. 59
[14:58:13.483] <TB2> INFO: Test took 18284ms.
[14:58:13.634] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:13.684] <TB2> INFO: dacScan step from 60 .. 79
[14:58:31.094] <TB2> INFO: Test took 17410ms.
[14:58:31.245] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:31.312] <TB2> INFO: dacScan step from 80 .. 99
[14:58:49.905] <TB2> INFO: Test took 18593ms.
[14:58:50.051] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:50.098] <TB2> INFO: dacScan step from 100 .. 119
[14:59:08.303] <TB2> INFO: Test took 18205ms.
[14:59:08.472] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:08.535] <TB2> INFO: dacScan step from 120 .. 139
[14:59:26.500] <TB2> INFO: Test took 17965ms.
[14:59:26.649] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:26.702] <TB2> INFO: dacScan step from 140 .. 159
[14:59:44.001] <TB2> INFO: Test took 17299ms.
[14:59:44.148] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:44.200] <TB2> INFO: dacScan step from 160 .. 179
[15:00:02.702] <TB2> INFO: Test took 18502ms.
[15:00:02.839] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:02.885] <TB2> INFO: dacScan step from 180 .. 199
[15:00:22.241] <TB2> INFO: Test took 19356ms.
[15:00:22.382] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:22.431] <TB2> INFO: dacScan step from 200 .. 219
[15:00:40.943] <TB2> INFO: Test took 18512ms.
[15:00:41.083] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:41.129] <TB2> INFO: dacScan step from 220 .. 239
[15:00:59.647] <TB2> INFO: Test took 18518ms.
[15:00:59.788] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:59.839] <TB2> INFO: dacScan step from 240 .. 255
[15:01:15.191] <TB2> INFO: Test took 15352ms.
[15:01:15.318] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:47.096] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.500001 .. 51.650056
[15:01:47.178] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 61 (20) hits flags = 16 (plus default)
[15:01:47.189] <TB2> INFO: dacScan step from 5 .. 24
[15:02:01.156] <TB2> INFO: Test took 13967ms.
[15:02:01.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:01.179] <TB2> INFO: dacScan step from 25 .. 44
[15:02:17.529] <TB2> INFO: Test took 16350ms.
[15:02:17.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:17.675] <TB2> INFO: dacScan step from 45 .. 61
[15:02:32.857] <TB2> INFO: Test took 15182ms.
[15:02:32.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:49.316] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 19.218254 .. 47.648752
[15:02:49.391] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 9 .. 57 (20) hits flags = 16 (plus default)
[15:02:49.400] <TB2> INFO: dacScan step from 9 .. 28
[15:03:03.501] <TB2> INFO: Test took 14101ms.
[15:03:03.523] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:03.523] <TB2> INFO: dacScan step from 29 .. 48
[15:03:20.862] <TB2> INFO: Test took 17339ms.
[15:03:20.988] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:21.022] <TB2> INFO: dacScan step from 49 .. 57
[15:03:30.878] <TB2> INFO: Test took 9856ms.
[15:03:30.948] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:46.394] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 2.800871 .. 47.648752
[15:03:46.473] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 57 (20) hits flags = 16 (plus default)
[15:03:46.483] <TB2> INFO: dacScan step from 2 .. 21
[15:03:59.852] <TB2> INFO: Test took 13369ms.
[15:03:59.870] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:59.870] <TB2> INFO: dacScan step from 22 .. 41
[15:04:14.779] <TB2> INFO: Test took 14909ms.
[15:04:14.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:14.930] <TB2> INFO: dacScan step from 42 .. 57
[15:04:29.453] <TB2> INFO: Test took 14523ms.
[15:04:29.571] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:45.549] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:04:45.549] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[15:04:45.558] <TB2> INFO: dacScan step from 15 .. 34
[15:05:10.050] <TB2> INFO: Test took 24492ms.
[15:05:10.120] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:10.132] <TB2> INFO: dacScan step from 35 .. 54


[15:05:44.863] <TB2> INFO: Test took 34731ms.
[15:05:45.165] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:45.222] <TB2> INFO: dacScan step from 55 .. 55
[15:05:49.650] <TB2> INFO: Test took 4428ms.
[15:05:49.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:02.387] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C0.dat
[15:06:02.387] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C1.dat
[15:06:02.387] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C2.dat
[15:06:02.387] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C3.dat
[15:06:02.387] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C4.dat
[15:06:02.388] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C5.dat
[15:06:02.388] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C6.dat
[15:06:02.388] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C7.dat
[15:06:02.388] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C8.dat
[15:06:02.388] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C9.dat
[15:06:02.389] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C10.dat
[15:06:02.389] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C11.dat
[15:06:02.389] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C12.dat
[15:06:02.389] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C13.dat
[15:06:02.389] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C14.dat
[15:06:02.390] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C15.dat
[15:06:02.390] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C0.dat
[15:06:02.399] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C1.dat
[15:06:02.405] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C2.dat
[15:06:02.411] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C3.dat
[15:06:02.417] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C4.dat
[15:06:02.423] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C5.dat
[15:06:02.430] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C6.dat
[15:06:02.436] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C7.dat
[15:06:02.442] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C8.dat
[15:06:02.448] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C9.dat
[15:06:02.454] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C10.dat
[15:06:02.460] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C11.dat
[15:06:02.466] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C12.dat
[15:06:02.472] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C13.dat
[15:06:02.478] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C14.dat
[15:06:02.484] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C15.dat
[15:06:02.490] <TB2> INFO: PixTestTrim::trimTest() done
[15:06:02.490] <TB2> INFO: vtrim: 118 105 108 116 100 112 112 98 115 109 102 112 103 95 102 99
[15:06:02.490] <TB2> INFO: vthrcomp: 92 78 88 84 86 96 91 98 94 94 89 96 89 85 95 88
[15:06:02.490] <TB2> INFO: vcal mean: 35.02 35.08 35.08 35.07 35.05 35.01 35.06 35.04 35.02 35.09 35.04 34.98 35.04 35.05 35.02 35.02
[15:06:02.490] <TB2> INFO: vcal RMS: 1.24 0.95 1.08 1.06 1.00 1.02 1.45 1.19 1.05 1.04 1.03 1.06 0.98 1.00 1.05 0.99
[15:06:02.490] <TB2> INFO: bits mean: 9.67 9.43 9.72 9.68 10.18 10.14 9.90 9.88 10.13 9.33 9.60 10.43 9.85 9.53 10.25 9.81
[15:06:02.490] <TB2> INFO: bits RMS: 2.59 2.18 2.49 2.59 2.44 2.48 2.54 2.64 2.32 2.71 2.58 2.40 2.50 2.67 2.37 2.44
[15:06:02.497] <TB2> INFO: ----------------------------------------------------------------------
[15:06:02.497] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[15:06:02.497] <TB2> INFO: ----------------------------------------------------------------------
[15:06:02.498] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:06:02.508] <TB2> INFO: dacScan step from 0 .. 19
[15:06:26.174] <TB2> INFO: Test took 23666ms.
[15:06:26.209] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:26.209] <TB2> INFO: dacScan step from 20 .. 39
[15:06:49.668] <TB2> INFO: Test took 23459ms.
[15:06:49.706] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:49.706] <TB2> INFO: dacScan step from 40 .. 59
[15:07:13.294] <TB2> INFO: Test took 23588ms.
[15:07:13.332] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:13.332] <TB2> INFO: dacScan step from 60 .. 79
[15:07:36.919] <TB2> INFO: Test took 23587ms.
[15:07:36.956] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:36.956] <TB2> INFO: dacScan step from 80 .. 99
[15:08:00.969] <TB2> INFO: Test took 24013ms.
[15:08:01.026] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:01.028] <TB2> INFO: dacScan step from 100 .. 119
[15:08:30.201] <TB2> INFO: Test took 29173ms.
[15:08:30.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:30.433] <TB2> INFO: dacScan step from 120 .. 139

[15:09:02.994] <TB2> INFO: Test took 32561ms.
[15:09:03.329] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:03.379] <TB2> INFO: dacScan step from 140 .. 159



[15:09:35.808] <TB2> INFO: Test took 32429ms.
[15:09:36.075] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:36.127] <TB2> INFO: dacScan step from 160 .. 179
[15:10:11.347] <TB2> INFO: Test took 35220ms.
[15:10:11.642] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:11.691] <TB2> INFO: dacScan step from 180 .. 199
[15:10:46.561] <TB2> INFO: Test took 34870ms.
[15:10:46.832] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:11.868] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[15:11:11.878] <TB2> INFO: dacScan step from 0 .. 19
[15:11:35.459] <TB2> INFO: Test took 23581ms.
[15:11:35.496] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:35.496] <TB2> INFO: dacScan step from 20 .. 39
[15:11:59.269] <TB2> INFO: Test took 23773ms.
[15:11:59.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:59.308] <TB2> INFO: dacScan step from 40 .. 59
[15:12:23.215] <TB2> INFO: Test took 23907ms.
[15:12:23.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:23.257] <TB2> INFO: dacScan step from 60 .. 79
[15:12:45.886] <TB2> INFO: Test took 22629ms.
[15:12:45.926] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:45.926] <TB2> INFO: dacScan step from 80 .. 99
[15:13:09.788] <TB2> INFO: Test took 23861ms.
[15:13:09.907] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:09.917] <TB2> INFO: dacScan step from 100 .. 119
[15:13:42.006] <TB2> INFO: Test took 32089ms.
[15:13:42.313] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:42.358] <TB2> INFO: dacScan step from 120 .. 139


[15:14:16.678] <TB2> INFO: Test took 34320ms.
[15:14:16.972] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:17.024] <TB2> INFO: dacScan step from 140 .. 159
[15:14:57.345] <TB2> INFO: Test took 40321ms.
[15:14:57.671] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:57.721] <TB2> INFO: dacScan step from 160 .. 165
[15:15:10.289] <TB2> INFO: Test took 12568ms.
[15:15:10.372] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:32.888] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 154 (20) hits flags = 16 (plus default)
[15:15:32.898] <TB2> INFO: dacScan step from 0 .. 19
[15:15:55.234] <TB2> INFO: Test took 22336ms.
[15:15:55.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:55.274] <TB2> INFO: dacScan step from 20 .. 39
[15:16:18.927] <TB2> INFO: Test took 23653ms.
[15:16:18.971] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:18.971] <TB2> INFO: dacScan step from 40 .. 59
[15:16:43.019] <TB2> INFO: Test took 24048ms.
[15:16:43.058] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:43.058] <TB2> INFO: dacScan step from 60 .. 79
[15:17:06.858] <TB2> INFO: Test took 23800ms.
[15:17:06.897] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:06.897] <TB2> INFO: dacScan step from 80 .. 99
[15:17:32.122] <TB2> INFO: Test took 25225ms.
[15:17:32.230] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:32.240] <TB2> INFO: dacScan step from 100 .. 119
[15:18:02.928] <TB2> INFO: Test took 30688ms.
[15:18:03.227] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:03.264] <TB2> INFO: dacScan step from 120 .. 139
[15:18:38.303] <TB2> INFO: Test took 35038ms.
[15:18:38.609] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:38.681] <TB2> INFO: dacScan step from 140 .. 154
[15:19:05.794] <TB2> INFO: Test took 27113ms.
[15:19:06.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:31.121] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 154 (20) hits flags = 16 (plus default)
[15:19:31.130] <TB2> INFO: dacScan step from 0 .. 19
[15:19:54.952] <TB2> INFO: Test took 23821ms.
[15:19:54.988] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:54.988] <TB2> INFO: dacScan step from 20 .. 39
[15:20:17.482] <TB2> INFO: Test took 22494ms.
[15:20:17.516] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:17.516] <TB2> INFO: dacScan step from 40 .. 59
[15:20:40.032] <TB2> INFO: Test took 22516ms.
[15:20:40.068] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:40.068] <TB2> INFO: dacScan step from 60 .. 79
[15:21:03.888] <TB2> INFO: Test took 23820ms.
[15:21:03.926] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:03.927] <TB2> INFO: dacScan step from 80 .. 99
[15:21:29.788] <TB2> INFO: Test took 25861ms.
[15:21:29.921] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:29.932] <TB2> INFO: dacScan step from 100 .. 119
[15:22:02.416] <TB2> INFO: Test took 32484ms.
[15:22:02.722] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:02.764] <TB2> INFO: dacScan step from 120 .. 139

[15:22:35.647] <TB2> INFO: Test took 32883ms.
[15:22:35.927] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:35.998] <TB2> INFO: dacScan step from 140 .. 154
[15:23:01.603] <TB2> INFO: Test took 25605ms.
[15:23:01.809] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:23.626] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 154 (20) hits flags = 16 (plus default)
[15:23:23.636] <TB2> INFO: dacScan step from 0 .. 19
[15:23:46.462] <TB2> INFO: Test took 22826ms.
[15:23:46.507] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:46.507] <TB2> INFO: dacScan step from 20 .. 39
[15:24:09.302] <TB2> INFO: Test took 22795ms.
[15:24:09.339] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:09.339] <TB2> INFO: dacScan step from 40 .. 59
[15:24:31.929] <TB2> INFO: Test took 22590ms.
[15:24:31.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:31.968] <TB2> INFO: dacScan step from 60 .. 79
[15:24:54.191] <TB2> INFO: Test took 22222ms.
[15:24:54.237] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:54.237] <TB2> INFO: dacScan step from 80 .. 99
[15:25:19.013] <TB2> INFO: Test took 24776ms.
[15:25:19.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:19.131] <TB2> INFO: dacScan step from 100 .. 119
[15:25:52.087] <TB2> INFO: Test took 32956ms.
[15:25:52.405] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:52.446] <TB2> INFO: dacScan step from 120 .. 139


[15:26:26.637] <TB2> INFO: Test took 34191ms.
[15:26:26.926] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:26.993] <TB2> INFO: dacScan step from 140 .. 154
[15:26:53.705] <TB2> INFO: Test took 26712ms.
[15:26:53.913] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:16.127] <TB2> INFO: PixTestTrim::trimBitTest() done
[15:27:16.128] <TB2> INFO: PixTestTrim::doTest() done, duration: 2582 seconds
[15:27:16.817] <TB2> INFO: ######################################################################
[15:27:16.817] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:27:16.817] <TB2> INFO: ######################################################################
[15:27:20.393] <TB2> INFO: Test took 3575ms.
[15:27:20.418] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:24.161] <TB2> INFO: Test took 3548ms.
[15:27:24.222] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:27.794] <TB2> INFO: Test took 3565ms.
[15:27:27.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:27.885] <TB2> INFO: The DUT currently contains the following objects:
[15:27:27.885] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:27.885] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:27.885] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:27.885] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:27.885] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:27.885] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: Test took 1113ms.
[15:27:28.998] <TB2> INFO: The DUT currently contains the following objects:
[15:27:28.998] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:28.998] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:28.998] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:28.998] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:28.998] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.998] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.999] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:28.999] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.107] <TB2> INFO: Test took 1108ms.
[15:27:30.108] <TB2> INFO: The DUT currently contains the following objects:
[15:27:30.108] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:30.108] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:30.108] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:30.108] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:30.108] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:30.108] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.215] <TB2> INFO: Test took 1107ms.
[15:27:31.215] <TB2> INFO: The DUT currently contains the following objects:
[15:27:31.215] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:31.215] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:31.215] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:31.215] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:31.216] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:31.216] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.328] <TB2> INFO: Test took 1112ms.
[15:27:32.329] <TB2> INFO: The DUT currently contains the following objects:
[15:27:32.329] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:32.329] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:32.329] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:32.329] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:32.329] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:32.329] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.440] <TB2> INFO: Test took 1111ms.
[15:27:33.441] <TB2> INFO: The DUT currently contains the following objects:
[15:27:33.441] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:33.441] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:33.442] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:33.442] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:33.442] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:33.442] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.555] <TB2> INFO: Test took 1113ms.
[15:27:34.556] <TB2> INFO: The DUT currently contains the following objects:
[15:27:34.556] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:34.556] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:34.556] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:34.556] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:34.556] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.556] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.557] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:34.557] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.668] <TB2> INFO: Test took 1111ms.
[15:27:35.669] <TB2> INFO: The DUT currently contains the following objects:
[15:27:35.669] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:35.669] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:35.669] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:35.669] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:35.669] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:35.669] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.783] <TB2> INFO: Test took 1114ms.
[15:27:36.785] <TB2> INFO: The DUT currently contains the following objects:
[15:27:36.785] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:36.785] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:36.785] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:36.785] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:36.785] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.785] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.785] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.785] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.785] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.785] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.785] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.785] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.786] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.786] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.786] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.786] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.786] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.786] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.786] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:36.786] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.896] <TB2> INFO: Test took 1110ms.
[15:27:37.897] <TB2> INFO: The DUT currently contains the following objects:
[15:27:37.897] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:37.897] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:37.897] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:37.897] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:37.897] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.897] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.897] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.897] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.897] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.897] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:37.898] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.010] <TB2> INFO: Test took 1112ms.
[15:27:39.013] <TB2> INFO: The DUT currently contains the following objects:
[15:27:39.013] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:39.013] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:39.013] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:39.013] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:39.013] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.013] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.014] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.014] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:39.014] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.123] <TB2> INFO: Test took 1109ms.
[15:27:40.124] <TB2> INFO: The DUT currently contains the following objects:
[15:27:40.124] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:40.124] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:40.124] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:40.124] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:40.124] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.124] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.124] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:40.125] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.236] <TB2> INFO: Test took 1111ms.
[15:27:41.238] <TB2> INFO: The DUT currently contains the following objects:
[15:27:41.238] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:41.238] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:41.238] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:41.238] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:41.238] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.238] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.239] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.239] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:41.239] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.352] <TB2> INFO: Test took 1113ms.
[15:27:42.353] <TB2> INFO: The DUT currently contains the following objects:
[15:27:42.353] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:42.353] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:42.353] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:42.353] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:42.353] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.353] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:42.354] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.463] <TB2> INFO: Test took 1109ms.
[15:27:43.464] <TB2> INFO: The DUT currently contains the following objects:
[15:27:43.464] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:43.464] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:43.464] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:43.464] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:43.464] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.464] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.464] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.464] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.464] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:43.465] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.578] <TB2> INFO: Test took 1113ms.
[15:27:44.579] <TB2> INFO: The DUT currently contains the following objects:
[15:27:44.579] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:27:44.579] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:27:44.579] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:27:44.579] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:27:44.579] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:44.579] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:27:45.690] <TB2> INFO: Test took 1111ms.
[15:27:45.691] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:31:43.937] <TB2> INFO: Test took 238246ms.
[15:31:45.627] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:35:42.465] <TB2> INFO: Test took 236838ms.
[15:35:44.299] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.308] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[15:35:44.316] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[15:35:44.324] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.332] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.340] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.347] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.355] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.362] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.371] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.379] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.387] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.395] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.402] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.409] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.416] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.423] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.430] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:35:44.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C0.dat
[15:35:44.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C1.dat
[15:35:44.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C2.dat
[15:35:44.454] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C3.dat
[15:35:44.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C4.dat
[15:35:44.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C5.dat
[15:35:44.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C6.dat
[15:35:44.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C7.dat
[15:35:44.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C8.dat
[15:35:44.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C9.dat
[15:35:44.455] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C10.dat
[15:35:44.456] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C11.dat
[15:35:44.456] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C12.dat
[15:35:44.456] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C13.dat
[15:35:44.456] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C14.dat
[15:35:44.456] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C15.dat
[15:35:48.092] <TB2> INFO: Test took 3634ms.
[15:35:51.981] <TB2> INFO: Test took 3614ms.
[15:35:55.817] <TB2> INFO: Test took 3556ms.
[15:35:56.096] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:35:57.017] <TB2> INFO: Test took 921ms.
[15:35:57.019] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:35:58.131] <TB2> INFO: Test took 1112ms.
[15:35:58.133] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:35:59.245] <TB2> INFO: Test took 1112ms.
[15:35:59.248] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:00.357] <TB2> INFO: Test took 1109ms.
[15:36:00.359] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:01.473] <TB2> INFO: Test took 1114ms.
[15:36:01.475] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:02.588] <TB2> INFO: Test took 1113ms.
[15:36:02.590] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:03.703] <TB2> INFO: Test took 1113ms.
[15:36:03.705] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:04.818] <TB2> INFO: Test took 1113ms.
[15:36:04.820] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:05.934] <TB2> INFO: Test took 1114ms.
[15:36:05.938] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:07.050] <TB2> INFO: Test took 1113ms.
[15:36:07.052] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:08.163] <TB2> INFO: Test took 1111ms.
[15:36:08.165] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:09.278] <TB2> INFO: Test took 1113ms.
[15:36:09.281] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:10.411] <TB2> INFO: Test took 1130ms.
[15:36:10.413] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:11.522] <TB2> INFO: Test took 1109ms.
[15:36:11.525] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:12.634] <TB2> INFO: Test took 1109ms.
[15:36:12.637] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:13.767] <TB2> INFO: Test took 1130ms.
[15:36:13.770] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:14.880] <TB2> INFO: Test took 1110ms.
[15:36:14.882] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:15.995] <TB2> INFO: Test took 1113ms.
[15:36:15.998] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:17.107] <TB2> INFO: Test took 1109ms.
[15:36:17.110] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:18.217] <TB2> INFO: Test took 1108ms.
[15:36:18.219] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:19.332] <TB2> INFO: Test took 1113ms.
[15:36:19.335] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:20.450] <TB2> INFO: Test took 1115ms.
[15:36:20.452] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:21.564] <TB2> INFO: Test took 1112ms.
[15:36:21.566] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:22.672] <TB2> INFO: Test took 1106ms.
[15:36:22.674] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:23.779] <TB2> INFO: Test took 1105ms.
[15:36:23.781] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:24.887] <TB2> INFO: Test took 1106ms.
[15:36:24.889] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:25.995] <TB2> INFO: Test took 1106ms.
[15:36:25.996] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:27.103] <TB2> INFO: Test took 1107ms.
[15:36:27.104] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:28.210] <TB2> INFO: Test took 1106ms.
[15:36:28.213] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:29.318] <TB2> INFO: Test took 1105ms.
[15:36:29.319] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:30.424] <TB2> INFO: Test took 1105ms.
[15:36:30.426] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:31.532] <TB2> INFO: Test took 1106ms.
[15:36:32.054] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 555 seconds
[15:36:32.054] <TB2> INFO: PH scale (per ROC): 80 93 80 86 92 88 78 80 79 79 80 88 83 76 84 85
[15:36:32.054] <TB2> INFO: PH offset (per ROC): 171 145 161 161 155 156 172 157 156 155 161 151 156 150 166 159
[15:36:32.249] <TB2> INFO: ######################################################################
[15:36:32.249] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:36:32.249] <TB2> INFO: ######################################################################
[15:36:32.260] <TB2> INFO: scanning low vcal = 10
[15:36:36.192] <TB2> INFO: Test took 3932ms.
[15:36:36.194] <TB2> INFO: scanning low vcal = 20
[15:36:40.079] <TB2> INFO: Test took 3885ms.
[15:36:40.081] <TB2> INFO: scanning low vcal = 30
[15:36:43.926] <TB2> INFO: Test took 3845ms.
[15:36:43.933] <TB2> INFO: scanning low vcal = 40
[15:36:48.314] <TB2> INFO: Test took 4381ms.
[15:36:48.381] <TB2> INFO: scanning low vcal = 50
[15:36:52.859] <TB2> INFO: Test took 4478ms.
[15:36:52.917] <TB2> INFO: scanning low vcal = 60
[15:36:57.348] <TB2> INFO: Test took 4431ms.
[15:36:57.406] <TB2> INFO: scanning low vcal = 70
[15:37:01.863] <TB2> INFO: Test took 4457ms.
[15:37:01.938] <TB2> INFO: scanning low vcal = 80
[15:37:06.367] <TB2> INFO: Test took 4429ms.
[15:37:06.435] <TB2> INFO: scanning low vcal = 90
[15:37:10.873] <TB2> INFO: Test took 4438ms.
[15:37:10.944] <TB2> INFO: scanning low vcal = 100
[15:37:15.352] <TB2> INFO: Test took 4408ms.
[15:37:15.410] <TB2> INFO: scanning low vcal = 110
[15:37:19.921] <TB2> INFO: Test took 4511ms.
[15:37:19.988] <TB2> INFO: scanning low vcal = 120
[15:37:24.447] <TB2> INFO: Test took 4458ms.
[15:37:24.507] <TB2> INFO: scanning low vcal = 130
[15:37:28.941] <TB2> INFO: Test took 4434ms.
[15:37:29.009] <TB2> INFO: scanning low vcal = 140
[15:37:33.492] <TB2> INFO: Test took 4483ms.
[15:37:33.553] <TB2> INFO: scanning low vcal = 150
[15:37:37.964] <TB2> INFO: Test took 4411ms.
[15:37:38.024] <TB2> INFO: scanning low vcal = 160
[15:37:42.472] <TB2> INFO: Test took 4448ms.
[15:37:42.529] <TB2> INFO: scanning low vcal = 170
[15:37:46.936] <TB2> INFO: Test took 4407ms.
[15:37:46.999] <TB2> INFO: scanning low vcal = 180
[15:37:51.450] <TB2> INFO: Test took 4451ms.
[15:37:51.525] <TB2> INFO: scanning low vcal = 190
[15:37:56.025] <TB2> INFO: Test took 4500ms.
[15:37:56.083] <TB2> INFO: scanning low vcal = 200
[15:38:00.548] <TB2> INFO: Test took 4464ms.
[15:38:00.620] <TB2> INFO: scanning low vcal = 210
[15:38:05.096] <TB2> INFO: Test took 4476ms.
[15:38:05.175] <TB2> INFO: scanning low vcal = 220
[15:38:09.636] <TB2> INFO: Test took 4461ms.
[15:38:09.701] <TB2> INFO: scanning low vcal = 230
[15:38:14.186] <TB2> INFO: Test took 4485ms.
[15:38:14.247] <TB2> INFO: scanning low vcal = 240
[15:38:18.656] <TB2> INFO: Test took 4409ms.
[15:38:18.717] <TB2> INFO: scanning low vcal = 250
[15:38:23.167] <TB2> INFO: Test took 4450ms.
[15:38:23.225] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[15:38:27.643] <TB2> INFO: Test took 4418ms.
[15:38:27.711] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[15:38:32.136] <TB2> INFO: Test took 4425ms.
[15:38:32.204] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[15:38:36.614] <TB2> INFO: Test took 4410ms.
[15:38:36.684] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[15:38:41.175] <TB2> INFO: Test took 4491ms.
[15:38:41.246] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:38:45.717] <TB2> INFO: Test took 4471ms.
[15:38:46.267] <TB2> INFO: PixTestGainPedestal::measure() done
[15:39:19.153] <TB2> INFO: PixTestGainPedestal::fit() done
[15:39:19.153] <TB2> INFO: non-linearity mean: 0.962 0.950 0.958 0.951 0.953 0.958 0.950 0.967 0.956 0.967 0.953 0.961 0.961 0.958 0.957 0.957
[15:39:19.153] <TB2> INFO: non-linearity RMS: 0.005 0.006 0.005 0.006 0.006 0.006 0.007 0.004 0.007 0.005 0.006 0.005 0.006 0.005 0.005 0.007
[15:39:19.154] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[15:39:19.173] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[15:39:19.191] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[15:39:19.210] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[15:39:19.229] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[15:39:19.248] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[15:39:19.267] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[15:39:19.286] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[15:39:19.305] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[15:39:19.324] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[15:39:19.343] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[15:39:19.362] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[15:39:19.381] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[15:39:19.400] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[15:39:19.418] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[15:39:19.437] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[15:39:19.455] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[15:39:19.461] <TB2> INFO: enter test to run
[15:39:19.461] <TB2> INFO: test: exit no parameter change
[15:39:19.853] <TB2> QUIET: Connection to board 156 closed.
[15:39:19.854] <TB2> INFO: pXar: this is the end, my friend