[11:10:43.851] <TB2> INFO: *** Welcome to pxar ***
[11:10:43.851] <TB2> INFO: *** Today: 2015/08/04
[11:10:43.851] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C15.dat
[11:10:43.853] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//tbmParameters_C0b.dat
[11:10:43.853] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//defaultMaskFile.dat
[11:10:43.853] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters_C15.dat
[11:10:43.927] <TB2> INFO: clk: 4
[11:10:43.927] <TB2> INFO: ctr: 4
[11:10:43.927] <TB2> INFO: sda: 19
[11:10:43.927] <TB2> INFO: tin: 9
[11:10:43.927] <TB2> INFO: level: 15
[11:10:43.927] <TB2> INFO: triggerdelay: 0
[11:10:43.927] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[11:10:43.927] <TB2> INFO: Log level: INFO
[11:10:43.948] <TB2> INFO: Found DTB DTB_WXC55Z
[11:10:43.963] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[11:10:43.966] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[11:10:43.969] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[11:10:45.536] <TB2> INFO: DUT info:
[11:10:45.536] <TB2> INFO: The DUT currently contains the following objects:
[11:10:45.536] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:10:45.536] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:10:45.537] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:10:45.537] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:10:45.537] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.537] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:45.938] <TB2> INFO: enter 'restricted' command line mode
[11:10:45.938] <TB2> INFO: enter test to run
[11:10:45.938] <TB2> INFO: test: pretest no parameter change
[11:10:45.938] <TB2> INFO: running: pretest
[11:10:45.944] <TB2> INFO: ######################################################################
[11:10:45.944] <TB2> INFO: PixTestPretest::doTest()
[11:10:45.944] <TB2> INFO: ######################################################################
[11:10:45.946] <TB2> INFO: ----------------------------------------------------------------------
[11:10:45.946] <TB2> INFO: PixTestPretest::programROC()
[11:10:45.946] <TB2> INFO: ----------------------------------------------------------------------
[11:11:03.961] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:11:03.961] <TB2> INFO: IA differences per ROC: 18.5 18.5 18.5 18.5 17.7 20.9 20.1 20.9 22.5 19.3 16.9 16.9 19.3 20.1 20.9 19.3
[11:11:04.022] <TB2> INFO: ----------------------------------------------------------------------
[11:11:04.022] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:11:04.022] <TB2> INFO: ----------------------------------------------------------------------
[11:11:08.580] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[11:11:08.583] <TB2> INFO: ----------------------------------------------------------------------
[11:11:08.583] <TB2> INFO: PixTestPretest::findWorkingPixel()
[11:11:08.583] <TB2> INFO: ----------------------------------------------------------------------
[11:11:17.173] <TB2> INFO: Test took 8585ms.
[11:11:17.477] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:11:17.497] <TB2> INFO: ----------------------------------------------------------------------
[11:11:17.497] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[11:11:17.497] <TB2> INFO: ----------------------------------------------------------------------
[11:11:26.028] <TB2> INFO: Test took 8527ms.
[11:11:26.322] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[11:11:26.322] <TB2> INFO: CalDel: 145 131 140 145 136 131 145 162 155 157 123 134 148 146 138 143
[11:11:26.322] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:11:26.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C0.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C1.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C2.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C3.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C4.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C5.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C6.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C7.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C8.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C9.dat
[11:11:26.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C10.dat
[11:11:26.327] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C11.dat
[11:11:26.327] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C12.dat
[11:11:26.327] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C13.dat
[11:11:26.327] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C14.dat
[11:11:26.327] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C15.dat
[11:11:26.327] <TB2> INFO: PixTestPretest::doTest() done, duration: 40 seconds
[11:11:26.434] <TB2> INFO: enter test to run
[11:11:26.434] <TB2> INFO: test: fulltest no parameter change
[11:11:26.434] <TB2> INFO: running: fulltest
[11:11:26.434] <TB2> INFO: ######################################################################
[11:11:26.434] <TB2> INFO: PixTestFullTest::doTest()
[11:11:26.434] <TB2> INFO: ######################################################################
[11:11:26.436] <TB2> INFO: ######################################################################
[11:11:26.436] <TB2> INFO: PixTestAlive::doTest()
[11:11:26.436] <TB2> INFO: ######################################################################
[11:11:26.437] <TB2> INFO: ----------------------------------------------------------------------
[11:11:26.437] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:11:26.437] <TB2> INFO: ----------------------------------------------------------------------
[11:11:30.004] <TB2> INFO: Test took 3566ms.
[11:11:30.027] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:30.237] <TB2> INFO: PixTestAlive::aliveTest() done
[11:11:30.237] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 3 0 0 0 0 0 0 0 0 0
[11:11:30.239] <TB2> INFO: ----------------------------------------------------------------------
[11:11:30.239] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:11:30.239] <TB2> INFO: ----------------------------------------------------------------------
[11:11:33.039] <TB2> INFO: Test took 2799ms.
[11:11:33.043] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:33.043] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:11:33.255] <TB2> INFO: PixTestAlive::maskTest() done
[11:11:33.255] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:11:33.257] <TB2> INFO: ----------------------------------------------------------------------
[11:11:33.257] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:11:33.257] <TB2> INFO: ----------------------------------------------------------------------
[11:11:36.763] <TB2> INFO: Test took 3505ms.
[11:11:36.787] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:36.998] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[11:11:36.998] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:11:36.998] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[11:11:37.005] <TB2> INFO: ######################################################################
[11:11:37.005] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:11:37.005] <TB2> INFO: ######################################################################
[11:11:37.006] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[11:11:37.019] <TB2> INFO: dacScan step from 0 .. 29
[11:11:59.308] <TB2> INFO: Test took 22289ms.
[11:11:59.342] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:59.342] <TB2> INFO: dacScan step from 30 .. 59
[11:12:23.877] <TB2> INFO: Test took 24535ms.
[11:12:24.001] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:24.021] <TB2> INFO: dacScan step from 60 .. 89
[11:12:55.118] <TB2> INFO: Test took 31097ms.
[11:12:55.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:55.493] <TB2> INFO: dacScan step from 90 .. 119
[11:13:26.177] <TB2> INFO: Test took 30684ms.
[11:13:26.441] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:26.513] <TB2> INFO: dacScan step from 120 .. 149
[11:13:53.598] <TB2> INFO: Test took 27085ms.
[11:13:53.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:16.900] <TB2> INFO: PixTestBBMap::doTest() done, duration: 159 seconds
[11:14:16.900] <TB2> INFO: number of dead bumps (per ROC): 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4
[11:14:16.900] <TB2> INFO: separation cut (per ROC): 70 71 83 79 80 91 88 81 82 82 88 90 76 77 87 76
[11:14:16.970] <TB2> INFO: ######################################################################
[11:14:16.970] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[11:14:16.970] <TB2> INFO: ######################################################################
[11:14:16.971] <TB2> INFO: ----------------------------------------------------------------------
[11:14:16.971] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[11:14:16.971] <TB2> INFO: ----------------------------------------------------------------------
[11:14:16.971] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[11:14:16.979] <TB2> INFO: dacScan step from 0 .. 3
[11:14:36.618] <TB2> INFO: Test took 19639ms.
[11:14:36.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:36.647] <TB2> INFO: dacScan step from 4 .. 7
[11:14:56.537] <TB2> INFO: Test took 19890ms.
[11:14:56.566] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:56.566] <TB2> INFO: dacScan step from 8 .. 11
[11:15:15.893] <TB2> INFO: Test took 19327ms.
[11:15:15.919] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:15.919] <TB2> INFO: dacScan step from 12 .. 15
[11:15:34.286] <TB2> INFO: Test took 18366ms.
[11:15:34.311] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:34.311] <TB2> INFO: dacScan step from 16 .. 19
[11:15:54.300] <TB2> INFO: Test took 19989ms.
[11:15:54.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:54.327] <TB2> INFO: dacScan step from 20 .. 23
[11:16:14.453] <TB2> INFO: Test took 20126ms.
[11:16:14.481] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:14.481] <TB2> INFO: dacScan step from 24 .. 27
[11:16:34.467] <TB2> INFO: Test took 19986ms.
[11:16:34.493] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:34.493] <TB2> INFO: dacScan step from 28 .. 31
[11:16:54.226] <TB2> INFO: Test took 19733ms.
[11:16:54.254] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:54.254] <TB2> INFO: dacScan step from 32 .. 35
[11:17:14.035] <TB2> INFO: Test took 19781ms.
[11:17:14.064] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:14.064] <TB2> INFO: dacScan step from 36 .. 39
[11:17:34.116] <TB2> INFO: Test took 20051ms.
[11:17:34.144] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:34.144] <TB2> INFO: dacScan step from 40 .. 43
[11:17:52.745] <TB2> INFO: Test took 18601ms.
[11:17:52.773] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:52.773] <TB2> INFO: dacScan step from 44 .. 47
[11:18:12.727] <TB2> INFO: Test took 19953ms.
[11:18:12.756] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:12.756] <TB2> INFO: dacScan step from 48 .. 51
[11:18:32.491] <TB2> INFO: Test took 19735ms.
[11:18:32.521] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:32.521] <TB2> INFO: dacScan step from 52 .. 55
[11:18:52.542] <TB2> INFO: Test took 20020ms.
[11:18:52.573] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:52.573] <TB2> INFO: dacScan step from 56 .. 59
[11:19:12.558] <TB2> INFO: Test took 19984ms.
[11:19:12.586] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:12.586] <TB2> INFO: dacScan step from 60 .. 63
[11:19:32.449] <TB2> INFO: Test took 19863ms.
[11:19:32.480] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:32.480] <TB2> INFO: dacScan step from 64 .. 67
[11:19:52.691] <TB2> INFO: Test took 20211ms.
[11:19:52.720] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:52.721] <TB2> INFO: dacScan step from 68 .. 71
[11:20:12.893] <TB2> INFO: Test took 20172ms.
[11:20:12.933] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:12.934] <TB2> INFO: dacScan step from 72 .. 75
[11:20:33.489] <TB2> INFO: Test took 20555ms.
[11:20:33.538] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:33.539] <TB2> INFO: dacScan step from 76 .. 79
[11:20:55.186] <TB2> INFO: Test took 21646ms.
[11:20:55.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:55.260] <TB2> INFO: dacScan step from 80 .. 83
[11:21:19.360] <TB2> INFO: Test took 24100ms.
[11:21:19.494] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:19.502] <TB2> INFO: dacScan step from 84 .. 87
[11:21:46.203] <TB2> INFO: Test took 26701ms.
[11:21:46.396] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:46.410] <TB2> INFO: dacScan step from 88 .. 91
[11:22:15.216] <TB2> INFO: Test took 28805ms.
[11:22:15.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:15.463] <TB2> INFO: dacScan step from 92 .. 95


[11:22:43.489] <TB2> INFO: Test took 28026ms.
[11:22:43.739] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:43.753] <TB2> INFO: dacScan step from 96 .. 99
[11:23:12.529] <TB2> INFO: Test took 28776ms.
[11:23:12.765] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:12.778] <TB2> INFO: dacScan step from 100 .. 103



[11:23:41.670] <TB2> INFO: Test took 28892ms.
[11:23:41.903] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:41.916] <TB2> INFO: dacScan step from 104 .. 107


[11:24:13.595] <TB2> INFO: Test took 31679ms.
[11:24:13.855] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:13.867] <TB2> INFO: dacScan step from 108 .. 111


[11:24:45.737] <TB2> INFO: Test took 31870ms.
[11:24:45.976] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:45.988] <TB2> INFO: dacScan step from 112 .. 115
[11:25:17.606] <TB2> INFO: Test took 31618ms.
[11:25:17.860] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:17.872] <TB2> INFO: dacScan step from 116 .. 119
[11:25:49.417] <TB2> INFO: Test took 31545ms.
[11:25:49.684] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:49.696] <TB2> INFO: dacScan step from 120 .. 123
[11:26:22.336] <TB2> INFO: Test took 32640ms.
[11:26:22.548] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:22.559] <TB2> INFO: dacScan step from 124 .. 127
[11:26:53.864] <TB2> INFO: Test took 31305ms.
[11:26:54.104] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:54.117] <TB2> INFO: dacScan step from 128 .. 131
[11:27:25.277] <TB2> INFO: Test took 31160ms.
[11:27:25.504] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:25.515] <TB2> INFO: dacScan step from 132 .. 135
[11:27:56.548] <TB2> INFO: Test took 31033ms.
[11:27:56.784] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:56.795] <TB2> INFO: dacScan step from 136 .. 139
[11:28:27.946] <TB2> INFO: Test took 31151ms.
[11:28:28.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:28.189] <TB2> INFO: dacScan step from 140 .. 143
[11:28:59.439] <TB2> INFO: Test took 31250ms.
[11:28:59.687] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:59.701] <TB2> INFO: dacScan step from 144 .. 147
[11:29:30.710] <TB2> INFO: Test took 31009ms.
[11:29:30.935] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:30.945] <TB2> INFO: dacScan step from 148 .. 149
[11:29:47.798] <TB2> INFO: Test took 16853ms.
[11:29:47.920] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:47.927] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:29:49.496] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:29:51.077] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:29:52.579] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:29:54.167] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:29:55.754] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:29:57.291] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:29:58.802] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:00.340] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:01.797] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:03.225] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:04.667] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:06.093] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:07.550] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:08.953] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:10.323] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:30:11.786] <TB2> INFO: PixTestScurves::scurves() done
[11:30:11.786] <TB2> INFO: Vcal mean: 89.98 75.66 88.35 82.23 80.69 86.74 90.00 93.93 86.70 92.76 83.81 91.65 81.87 85.64 90.18 84.91
[11:30:11.786] <TB2> INFO: Vcal RMS: 6.71 4.06 5.18 5.24 4.31 4.90 7.25 5.68 4.96 5.84 5.51 5.16 4.27 5.39 5.08 4.72
[11:30:11.786] <TB2> INFO: PixTestScurves::fullTest() done, duration: 954 seconds
[11:30:11.864] <TB2> INFO: ######################################################################
[11:30:11.864] <TB2> INFO: PixTestTrim::doTest()
[11:30:11.864] <TB2> INFO: ######################################################################
[11:30:11.865] <TB2> INFO: ----------------------------------------------------------------------
[11:30:11.865] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[11:30:11.866] <TB2> INFO: ----------------------------------------------------------------------
[11:30:11.948] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:30:11.948] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:30:11.957] <TB2> INFO: dacScan step from 0 .. 19
[11:30:27.502] <TB2> INFO: Test took 15545ms.
[11:30:27.524] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:27.524] <TB2> INFO: dacScan step from 20 .. 39
[11:30:43.168] <TB2> INFO: Test took 15644ms.
[11:30:43.193] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:43.193] <TB2> INFO: dacScan step from 40 .. 59
[11:30:58.747] <TB2> INFO: Test took 15554ms.
[11:30:58.773] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:58.773] <TB2> INFO: dacScan step from 60 .. 79
[11:31:14.311] <TB2> INFO: Test took 15538ms.
[11:31:14.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:14.333] <TB2> INFO: dacScan step from 80 .. 99
[11:31:30.819] <TB2> INFO: Test took 16486ms.
[11:31:30.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:30.885] <TB2> INFO: dacScan step from 100 .. 119
[11:31:51.068] <TB2> INFO: Test took 20183ms.
[11:31:51.260] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:51.300] <TB2> INFO: dacScan step from 120 .. 139
[11:32:10.980] <TB2> INFO: Test took 19680ms.
[11:32:11.140] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:11.178] <TB2> INFO: dacScan step from 140 .. 159
[11:32:27.434] <TB2> INFO: Test took 16255ms.
[11:32:27.486] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:49.911] <TB2> INFO: ROC 0 VthrComp = 88
[11:32:49.911] <TB2> INFO: ROC 1 VthrComp = 81
[11:32:49.911] <TB2> INFO: ROC 2 VthrComp = 90
[11:32:49.911] <TB2> INFO: ROC 3 VthrComp = 87
[11:32:49.911] <TB2> INFO: ROC 4 VthrComp = 88
[11:32:49.911] <TB2> INFO: ROC 5 VthrComp = 96
[11:32:49.911] <TB2> INFO: ROC 6 VthrComp = 91
[11:32:49.911] <TB2> INFO: ROC 7 VthrComp = 98
[11:32:49.911] <TB2> INFO: ROC 8 VthrComp = 93
[11:32:49.911] <TB2> INFO: ROC 9 VthrComp = 94
[11:32:49.911] <TB2> INFO: ROC 10 VthrComp = 89
[11:32:49.911] <TB2> INFO: ROC 11 VthrComp = 95
[11:32:49.911] <TB2> INFO: ROC 12 VthrComp = 89
[11:32:49.911] <TB2> INFO: ROC 13 VthrComp = 88
[11:32:49.911] <TB2> INFO: ROC 14 VthrComp = 95
[11:32:49.911] <TB2> INFO: ROC 15 VthrComp = 88
[11:32:49.911] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:32:49.911] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:32:49.921] <TB2> INFO: dacScan step from 0 .. 19
[11:33:04.733] <TB2> INFO: Test took 14812ms.
[11:33:04.754] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:04.754] <TB2> INFO: dacScan step from 20 .. 39
[11:33:20.256] <TB2> INFO: Test took 15502ms.
[11:33:20.288] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:20.291] <TB2> INFO: dacScan step from 40 .. 59
[11:33:39.849] <TB2> INFO: Test took 19558ms.
[11:33:40.023] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:40.056] <TB2> INFO: dacScan step from 60 .. 79
[11:34:01.331] <TB2> INFO: Test took 21275ms.
[11:34:01.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:01.570] <TB2> INFO: dacScan step from 80 .. 99
[11:34:21.339] <TB2> INFO: Test took 19769ms.
[11:34:21.522] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:21.589] <TB2> INFO: dacScan step from 100 .. 119
[11:34:42.659] <TB2> INFO: Test took 21070ms.
[11:34:42.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:42.902] <TB2> INFO: dacScan step from 120 .. 139
[11:35:04.223] <TB2> INFO: Test took 21321ms.
[11:35:04.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:04.461] <TB2> INFO: dacScan step from 140 .. 159
[11:35:25.447] <TB2> INFO: Test took 20986ms.
[11:35:25.614] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:49.905] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 63.5306 for pixel 1/49 mean/min/max = 47.827/31.8134/63.8407
[11:35:49.906] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 56.1004 for pixel 15/2 mean/min/max = 44.3653/32.616/56.1147
[11:35:49.907] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.0649 for pixel 0/31 mean/min/max = 45.9651/32.7136/59.2167
[11:35:49.907] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.6747 for pixel 12/0 mean/min/max = 45.7716/31.8001/59.743
[11:35:49.908] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.5584 for pixel 0/70 mean/min/max = 45.1863/32.8138/57.5587
[11:35:49.909] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.5672 for pixel 22/79 mean/min/max = 44.1075/31.6379/56.577
[11:35:49.909] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 61.4503 for pixel 9/26 mean/min/max = 46.4026/31.3442/61.4611
[11:35:49.909] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.6097 for pixel 0/8 mean/min/max = 44.9423/31.2688/58.6158
[11:35:49.910] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 58.2347 for pixel 3/3 mean/min/max = 45.2524/32.2375/58.2673
[11:35:49.911] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 60.6966 for pixel 18/0 mean/min/max = 46.7376/32.6108/60.8645
[11:35:49.911] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 59.9745 for pixel 0/7 mean/min/max = 46.1199/32.169/60.0707
[11:35:49.912] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.3535 for pixel 34/53 mean/min/max = 45.6983/32.9928/58.4039
[11:35:49.912] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 57.1991 for pixel 29/79 mean/min/max = 45.0393/32.8753/57.2034
[11:35:49.913] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.7123 for pixel 6/39 mean/min/max = 46.5653/33.1767/59.9538
[11:35:49.913] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.0632 for pixel 36/0 mean/min/max = 44.808/32.4831/57.1329
[11:35:49.914] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.019 for pixel 21/72 mean/min/max = 45.6165/33.1307/58.1023
[11:35:49.914] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:37:28.749] <TB2> INFO: Test took 98835ms.
[11:37:30.272] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:37:30.282] <TB2> INFO: dacScan step from 0 .. 19
[11:37:54.302] <TB2> INFO: Test took 24020ms.
[11:37:54.358] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:54.361] <TB2> INFO: dacScan step from 20 .. 39
[11:38:24.724] <TB2> INFO: Test took 30363ms.
[11:38:25.020] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:25.098] <TB2> INFO: dacScan step from 40 .. 59


[11:38:59.176] <TB2> INFO: Test took 34077ms.
[11:38:59.495] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:59.547] <TB2> INFO: dacScan step from 60 .. 79



[11:39:34.866] <TB2> INFO: Test took 35319ms.
[11:39:35.166] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:35.220] <TB2> INFO: dacScan step from 80 .. 99

[11:40:10.804] <TB2> INFO: Test took 35584ms.
[11:40:11.099] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:11.157] <TB2> INFO: dacScan step from 100 .. 119





[11:40:45.535] <TB2> INFO: Test took 34378ms.
[11:40:45.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:46.009] <TB2> INFO: dacScan step from 120 .. 139



[11:41:20.614] <TB2> INFO: Test took 34605ms.
[11:41:20.913] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:20.965] <TB2> INFO: dacScan step from 140 .. 159





[11:41:56.357] <TB2> INFO: Test took 35392ms.
[11:41:56.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:56.709] <TB2> INFO: dacScan step from 160 .. 179


[11:42:32.072] <TB2> INFO: Test took 35363ms.
[11:42:32.386] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:32.441] <TB2> INFO: dacScan step from 180 .. 199



[11:43:08.284] <TB2> INFO: Test took 35843ms.
[11:43:08.576] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:34.258] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.003046 .. 255.000000
[11:43:34.344] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[11:43:34.354] <TB2> INFO: dacScan step from 0 .. 19
[11:43:47.728] <TB2> INFO: Test took 13374ms.
[11:43:47.746] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:47.746] <TB2> INFO: dacScan step from 20 .. 39
[11:44:03.013] <TB2> INFO: Test took 15266ms.
[11:44:03.105] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:03.124] <TB2> INFO: dacScan step from 40 .. 59
[11:44:21.635] <TB2> INFO: Test took 18511ms.
[11:44:21.783] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:21.839] <TB2> INFO: dacScan step from 60 .. 79
[11:44:40.237] <TB2> INFO: Test took 18398ms.
[11:44:40.384] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:40.449] <TB2> INFO: dacScan step from 80 .. 99
[11:44:58.938] <TB2> INFO: Test took 18489ms.
[11:44:59.080] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:59.132] <TB2> INFO: dacScan step from 100 .. 119
[11:45:17.719] <TB2> INFO: Test took 18587ms.
[11:45:17.876] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:17.949] <TB2> INFO: dacScan step from 120 .. 139
[11:45:36.637] <TB2> INFO: Test took 18688ms.
[11:45:36.799] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:36.858] <TB2> INFO: dacScan step from 140 .. 159
[11:45:55.454] <TB2> INFO: Test took 18596ms.
[11:45:55.621] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:55.677] <TB2> INFO: dacScan step from 160 .. 179
[11:46:14.181] <TB2> INFO: Test took 18504ms.
[11:46:14.332] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:14.393] <TB2> INFO: dacScan step from 180 .. 199
[11:46:32.735] <TB2> INFO: Test took 18342ms.
[11:46:32.897] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:32.960] <TB2> INFO: dacScan step from 200 .. 219
[11:46:50.348] <TB2> INFO: Test took 17388ms.
[11:46:50.492] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:50.546] <TB2> INFO: dacScan step from 220 .. 239
[11:47:07.960] <TB2> INFO: Test took 17414ms.
[11:47:08.095] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:08.149] <TB2> INFO: dacScan step from 240 .. 255
[11:47:22.845] <TB2> INFO: Test took 14696ms.
[11:47:22.974] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:55.636] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.890981 .. 51.939663
[11:47:55.711] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 61 (20) hits flags = 16 (plus default)
[11:47:55.719] <TB2> INFO: dacScan step from 5 .. 24
[11:48:09.877] <TB2> INFO: Test took 14158ms.
[11:48:09.902] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:09.902] <TB2> INFO: dacScan step from 25 .. 44
[11:48:26.641] <TB2> INFO: Test took 16739ms.
[11:48:26.766] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:26.802] <TB2> INFO: dacScan step from 45 .. 61
[11:48:42.946] <TB2> INFO: Test took 16144ms.
[11:48:43.074] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:59.825] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 19.178778 .. 48.254375
[11:48:59.901] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 9 .. 58 (20) hits flags = 16 (plus default)
[11:48:59.910] <TB2> INFO: dacScan step from 9 .. 28
[11:49:13.889] <TB2> INFO: Test took 13979ms.
[11:49:13.911] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:13.912] <TB2> INFO: dacScan step from 29 .. 48
[11:49:31.230] <TB2> INFO: Test took 17318ms.
[11:49:31.378] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:31.412] <TB2> INFO: dacScan step from 49 .. 58
[11:49:42.193] <TB2> INFO: Test took 10781ms.
[11:49:42.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:58.732] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 2.891168 .. 45.656904
[11:49:58.810] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 55 (20) hits flags = 16 (plus default)
[11:49:58.819] <TB2> INFO: dacScan step from 2 .. 21
[11:50:12.444] <TB2> INFO: Test took 13625ms.
[11:50:12.469] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:12.469] <TB2> INFO: dacScan step from 22 .. 41
[11:50:27.437] <TB2> INFO: Test took 14967ms.
[11:50:27.533] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:27.557] <TB2> INFO: dacScan step from 42 .. 55
[11:50:41.586] <TB2> INFO: Test took 14029ms.
[11:50:41.705] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:59.597] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:50:59.597] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:50:59.606] <TB2> INFO: dacScan step from 15 .. 34
[11:51:22.919] <TB2> INFO: Test took 23313ms.
[11:51:22.986] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:22.995] <TB2> INFO: dacScan step from 35 .. 54


[11:51:55.161] <TB2> INFO: Test took 32166ms.
[11:51:55.462] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:55.504] <TB2> INFO: dacScan step from 55 .. 55
[11:51:59.824] <TB2> INFO: Test took 4320ms.
[11:51:59.838] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:13.017] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C0.dat
[11:52:13.018] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C1.dat
[11:52:13.018] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C2.dat
[11:52:13.018] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C3.dat
[11:52:13.018] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C4.dat
[11:52:13.019] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C5.dat
[11:52:13.019] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C6.dat
[11:52:13.019] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C7.dat
[11:52:13.019] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C8.dat
[11:52:13.019] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C9.dat
[11:52:13.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C10.dat
[11:52:13.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C11.dat
[11:52:13.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C12.dat
[11:52:13.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C13.dat
[11:52:13.020] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C14.dat
[11:52:13.021] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C15.dat
[11:52:13.021] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C0.dat
[11:52:13.029] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C1.dat
[11:52:13.035] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C2.dat
[11:52:13.041] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C3.dat
[11:52:13.048] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C4.dat
[11:52:13.054] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C5.dat
[11:52:13.060] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C6.dat
[11:52:13.066] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C7.dat
[11:52:13.072] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C8.dat
[11:52:13.078] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C9.dat
[11:52:13.084] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C10.dat
[11:52:13.090] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C11.dat
[11:52:13.096] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C12.dat
[11:52:13.102] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C13.dat
[11:52:13.108] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C14.dat
[11:52:13.114] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C15.dat
[11:52:13.120] <TB2> INFO: PixTestTrim::trimTest() done
[11:52:13.120] <TB2> INFO: vtrim: 115 103 101 123 104 111 115 101 109 114 101 115 104 113 99 165
[11:52:13.120] <TB2> INFO: vthrcomp: 88 81 90 87 88 96 91 98 93 94 89 95 89 88 95 88
[11:52:13.120] <TB2> INFO: vcal mean: 35.04 35.02 35.03 35.04 35.02 35.00 35.03 35.07 35.06 35.07 35.06 35.07 35.03 35.04 35.03 34.93
[11:52:13.120] <TB2> INFO: vcal RMS: 1.22 0.97 1.03 1.12 0.97 1.01 1.46 1.08 1.05 1.16 1.00 1.00 0.97 1.01 1.03 1.86
[11:52:13.120] <TB2> INFO: bits mean: 9.43 10.38 9.29 9.88 9.88 10.01 10.01 10.04 9.93 9.55 9.52 9.89 9.73 9.77 10.00 11.77
[11:52:13.120] <TB2> INFO: bits RMS: 2.59 2.24 2.70 2.53 2.45 2.55 2.48 2.56 2.45 2.56 2.61 2.37 2.50 2.34 2.44 1.51
[11:52:13.126] <TB2> INFO: ----------------------------------------------------------------------
[11:52:13.127] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[11:52:13.127] <TB2> INFO: ----------------------------------------------------------------------
[11:52:13.128] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:52:13.138] <TB2> INFO: dacScan step from 0 .. 19
[11:52:35.474] <TB2> INFO: Test took 22336ms.
[11:52:35.515] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:35.515] <TB2> INFO: dacScan step from 20 .. 39
[11:52:57.805] <TB2> INFO: Test took 22290ms.
[11:52:57.843] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:57.843] <TB2> INFO: dacScan step from 40 .. 59
[11:53:20.362] <TB2> INFO: Test took 22519ms.
[11:53:20.402] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:20.402] <TB2> INFO: dacScan step from 60 .. 79
[11:53:47.832] <TB2> INFO: Test took 27430ms.
[11:53:47.868] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:47.868] <TB2> INFO: dacScan step from 80 .. 99
[11:54:12.057] <TB2> INFO: Test took 24189ms.
[11:54:12.123] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:12.125] <TB2> INFO: dacScan step from 100 .. 119
[11:54:42.102] <TB2> INFO: Test took 29977ms.
[11:54:42.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:42.353] <TB2> INFO: dacScan step from 120 .. 139


[11:55:14.604] <TB2> INFO: Test took 32251ms.
[11:55:15.025] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:15.083] <TB2> INFO: dacScan step from 140 .. 159
[11:55:48.520] <TB2> INFO: Test took 33437ms.
[11:55:48.780] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:48.821] <TB2> INFO: dacScan step from 160 .. 179
[11:56:23.597] <TB2> INFO: Test took 34776ms.
[11:56:23.884] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:23.931] <TB2> INFO: dacScan step from 180 .. 199
[11:56:59.857] <TB2> INFO: Test took 35926ms.
[11:57:00.133] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:26.918] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 166 (20) hits flags = 16 (plus default)
[11:57:26.927] <TB2> INFO: dacScan step from 0 .. 19
[11:57:55.594] <TB2> INFO: Test took 28667ms.
[11:57:55.628] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:55.628] <TB2> INFO: dacScan step from 20 .. 39
[11:58:19.380] <TB2> INFO: Test took 23752ms.
[11:58:19.430] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:19.430] <TB2> INFO: dacScan step from 40 .. 59
[11:58:42.891] <TB2> INFO: Test took 23461ms.
[11:58:42.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:42.928] <TB2> INFO: dacScan step from 60 .. 79
[11:59:06.674] <TB2> INFO: Test took 23746ms.
[11:59:06.714] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:06.714] <TB2> INFO: dacScan step from 80 .. 99
[11:59:32.019] <TB2> INFO: Test took 25305ms.
[11:59:32.120] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:32.129] <TB2> INFO: dacScan step from 100 .. 119
[12:00:03.254] <TB2> INFO: Test took 31125ms.
[12:00:03.515] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:03.549] <TB2> INFO: dacScan step from 120 .. 139


[12:00:37.916] <TB2> INFO: Test took 34367ms.
[12:00:38.176] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:38.214] <TB2> INFO: dacScan step from 140 .. 159
[12:01:13.496] <TB2> INFO: Test took 35282ms.
[12:01:13.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:13.808] <TB2> INFO: dacScan step from 160 .. 166
[12:01:28.074] <TB2> INFO: Test took 14266ms.
[12:01:28.170] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:50.340] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[12:01:50.349] <TB2> INFO: dacScan step from 0 .. 19
[12:02:14.018] <TB2> INFO: Test took 23668ms.
[12:02:14.053] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:14.053] <TB2> INFO: dacScan step from 20 .. 39
[12:02:37.565] <TB2> INFO: Test took 23512ms.
[12:02:37.602] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:37.602] <TB2> INFO: dacScan step from 40 .. 59
[12:03:01.473] <TB2> INFO: Test took 23871ms.
[12:03:01.515] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:01.515] <TB2> INFO: dacScan step from 60 .. 79
[12:03:30.323] <TB2> INFO: Test took 28807ms.
[12:03:30.365] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:30.365] <TB2> INFO: dacScan step from 80 .. 99
[12:03:55.903] <TB2> INFO: Test took 25538ms.
[12:03:56.001] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:56.010] <TB2> INFO: dacScan step from 100 .. 119
[12:04:27.907] <TB2> INFO: Test took 31897ms.
[12:04:28.181] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:28.216] <TB2> INFO: dacScan step from 120 .. 139





[12:05:00.565] <TB2> INFO: Test took 32349ms.
[12:05:00.848] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:00.899] <TB2> INFO: dacScan step from 140 .. 153
[12:05:26.063] <TB2> INFO: Test took 25164ms.
[12:05:26.254] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:48.230] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[12:05:48.240] <TB2> INFO: dacScan step from 0 .. 19
[12:06:10.338] <TB2> INFO: Test took 22098ms.
[12:06:10.372] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:10.372] <TB2> INFO: dacScan step from 20 .. 39
[12:06:33.417] <TB2> INFO: Test took 23044ms.
[12:06:33.451] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:33.451] <TB2> INFO: dacScan step from 40 .. 59
[12:06:57.281] <TB2> INFO: Test took 23830ms.
[12:06:57.319] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:57.319] <TB2> INFO: dacScan step from 60 .. 79
[12:07:21.179] <TB2> INFO: Test took 23860ms.
[12:07:21.218] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:21.218] <TB2> INFO: dacScan step from 80 .. 99
[12:07:46.762] <TB2> INFO: Test took 25544ms.
[12:07:46.863] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:46.873] <TB2> INFO: dacScan step from 100 .. 119
[12:08:20.226] <TB2> INFO: Test took 33353ms.
[12:08:20.502] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:20.554] <TB2> INFO: dacScan step from 120 .. 139


[12:08:55.233] <TB2> INFO: Test took 34679ms.
[12:08:55.526] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:55.602] <TB2> INFO: dacScan step from 140 .. 153
[12:09:20.864] <TB2> INFO: Test took 25262ms.
[12:09:21.063] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:43.090] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[12:09:43.099] <TB2> INFO: dacScan step from 0 .. 19
[12:10:06.334] <TB2> INFO: Test took 23235ms.
[12:10:06.370] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:06.370] <TB2> INFO: dacScan step from 20 .. 39
[12:10:29.641] <TB2> INFO: Test took 23271ms.
[12:10:29.679] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:29.679] <TB2> INFO: dacScan step from 40 .. 59
[12:10:51.917] <TB2> INFO: Test took 22238ms.
[12:10:51.955] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:51.955] <TB2> INFO: dacScan step from 60 .. 79
[12:11:15.524] <TB2> INFO: Test took 23569ms.
[12:11:15.562] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:15.562] <TB2> INFO: dacScan step from 80 .. 99
[12:11:40.510] <TB2> INFO: Test took 24948ms.
[12:11:40.610] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:40.619] <TB2> INFO: dacScan step from 100 .. 119
[12:12:12.386] <TB2> INFO: Test took 31767ms.
[12:12:12.657] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:12.698] <TB2> INFO: dacScan step from 120 .. 139

[12:12:47.469] <TB2> INFO: Test took 34771ms.
[12:12:47.749] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:47.806] <TB2> INFO: dacScan step from 140 .. 152
[12:13:11.227] <TB2> INFO: Test took 23421ms.
[12:13:11.413] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:33.754] <TB2> INFO: PixTestTrim::trimBitTest() done
[12:13:33.756] <TB2> INFO: PixTestTrim::doTest() done, duration: 2601 seconds
[12:13:34.450] <TB2> INFO: ######################################################################
[12:13:34.450] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:13:34.450] <TB2> INFO: ######################################################################
[12:13:38.012] <TB2> INFO: Test took 3561ms.
[12:13:38.037] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:41.812] <TB2> INFO: Test took 3579ms.
[12:13:41.889] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:45.472] <TB2> INFO: Test took 3575ms.
[12:13:45.549] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:45.555] <TB2> INFO: The DUT currently contains the following objects:
[12:13:45.555] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:45.555] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:45.555] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:45.555] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:45.555] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.555] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.556] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.556] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.556] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:45.556] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.668] <TB2> INFO: Test took 1112ms.
[12:13:46.669] <TB2> INFO: The DUT currently contains the following objects:
[12:13:46.669] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:46.669] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:46.669] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:46.669] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:46.669] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:46.669] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.780] <TB2> INFO: Test took 1111ms.
[12:13:47.781] <TB2> INFO: The DUT currently contains the following objects:
[12:13:47.782] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:47.782] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:47.782] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:47.782] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:47.782] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:47.782] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.891] <TB2> INFO: Test took 1109ms.
[12:13:48.892] <TB2> INFO: The DUT currently contains the following objects:
[12:13:48.893] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:48.893] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:48.893] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:48.893] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:48.893] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:48.893] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.003] <TB2> INFO: Test took 1110ms.
[12:13:50.005] <TB2> INFO: The DUT currently contains the following objects:
[12:13:50.005] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:50.005] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:50.005] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:50.005] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:50.005] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.005] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.006] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.006] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.006] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.006] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:50.006] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.118] <TB2> INFO: Test took 1112ms.
[12:13:51.119] <TB2> INFO: The DUT currently contains the following objects:
[12:13:51.119] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:51.119] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:51.119] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:51.119] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:51.119] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:51.119] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.230] <TB2> INFO: Test took 1110ms.
[12:13:52.231] <TB2> INFO: The DUT currently contains the following objects:
[12:13:52.231] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:52.231] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:52.231] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:52.231] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:52.231] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:52.231] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.342] <TB2> INFO: Test took 1111ms.
[12:13:53.343] <TB2> INFO: The DUT currently contains the following objects:
[12:13:53.343] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:53.343] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:53.343] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:53.343] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:53.343] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:53.343] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.452] <TB2> INFO: Test took 1109ms.
[12:13:54.452] <TB2> INFO: The DUT currently contains the following objects:
[12:13:54.452] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:54.452] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:54.452] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:54.452] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:54.452] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.452] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.452] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.452] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:54.453] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.566] <TB2> INFO: Test took 1113ms.
[12:13:55.567] <TB2> INFO: The DUT currently contains the following objects:
[12:13:55.567] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:55.567] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:55.567] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:55.567] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:55.567] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:55.567] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.677] <TB2> INFO: Test took 1110ms.
[12:13:56.678] <TB2> INFO: The DUT currently contains the following objects:
[12:13:56.678] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:56.678] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:56.678] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:56.678] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:56.678] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:56.678] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.786] <TB2> INFO: Test took 1108ms.
[12:13:57.787] <TB2> INFO: The DUT currently contains the following objects:
[12:13:57.787] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:57.787] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:57.787] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:57.787] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:57.787] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:57.787] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.901] <TB2> INFO: Test took 1114ms.
[12:13:58.902] <TB2> INFO: The DUT currently contains the following objects:
[12:13:58.902] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:13:58.902] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:13:58.902] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:13:58.902] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:13:58.902] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:13:58.902] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.012] <TB2> INFO: Test took 1110ms.
[12:14:00.013] <TB2> INFO: The DUT currently contains the following objects:
[12:14:00.013] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:14:00.013] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:14:00.013] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:14:00.013] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:14:00.013] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:00.013] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.120] <TB2> INFO: Test took 1107ms.
[12:14:01.120] <TB2> INFO: The DUT currently contains the following objects:
[12:14:01.120] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:14:01.120] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:14:01.120] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:14:01.121] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:14:01.121] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:01.121] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.228] <TB2> INFO: Test took 1107ms.
[12:14:02.229] <TB2> INFO: The DUT currently contains the following objects:
[12:14:02.229] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:14:02.229] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:14:02.229] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:14:02.229] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:14:02.229] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:02.229] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:14:03.334] <TB2> INFO: Test took 1105ms.
[12:14:03.336] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:18:00.322] <TB2> INFO: Test took 236986ms.
[12:18:02.034] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:21:55.712] <TB2> INFO: Test took 233678ms.
[12:21:57.354] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.361] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[12:21:57.368] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[12:21:57.376] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.383] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.390] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.397] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.404] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.411] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.418] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.425] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.432] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.439] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.447] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.455] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.462] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.468] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.475] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:21:57.499] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C0.dat
[12:21:57.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C1.dat
[12:21:57.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C2.dat
[12:21:57.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C3.dat
[12:21:57.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C4.dat
[12:21:57.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C5.dat
[12:21:57.500] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C6.dat
[12:21:57.501] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C7.dat
[12:21:57.501] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C8.dat
[12:21:57.501] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C9.dat
[12:21:57.501] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C10.dat
[12:21:57.502] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C11.dat
[12:21:57.502] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C12.dat
[12:21:57.502] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C13.dat
[12:21:57.502] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C14.dat
[12:21:57.503] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C15.dat
[12:22:01.083] <TB2> INFO: Test took 3579ms.
[12:22:04.936] <TB2> INFO: Test took 3584ms.
[12:22:08.702] <TB2> INFO: Test took 3491ms.
[12:22:08.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:09.894] <TB2> INFO: Test took 923ms.
[12:22:09.896] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:11.008] <TB2> INFO: Test took 1112ms.
[12:22:11.011] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:12.123] <TB2> INFO: Test took 1113ms.
[12:22:12.126] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:13.235] <TB2> INFO: Test took 1109ms.
[12:22:13.238] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:14.347] <TB2> INFO: Test took 1109ms.
[12:22:14.349] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:15.460] <TB2> INFO: Test took 1111ms.
[12:22:15.462] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:16.575] <TB2> INFO: Test took 1113ms.
[12:22:16.577] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:17.691] <TB2> INFO: Test took 1114ms.
[12:22:17.694] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:18.809] <TB2> INFO: Test took 1115ms.
[12:22:18.813] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:19.927] <TB2> INFO: Test took 1114ms.
[12:22:19.929] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:21.039] <TB2> INFO: Test took 1110ms.
[12:22:21.041] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:22.149] <TB2> INFO: Test took 1108ms.
[12:22:22.150] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:23.261] <TB2> INFO: Test took 1111ms.
[12:22:23.264] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:24.374] <TB2> INFO: Test took 1110ms.
[12:22:24.376] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:25.480] <TB2> INFO: Test took 1104ms.
[12:22:25.482] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:26.587] <TB2> INFO: Test took 1105ms.
[12:22:26.589] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:27.694] <TB2> INFO: Test took 1106ms.
[12:22:27.696] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:28.804] <TB2> INFO: Test took 1108ms.
[12:22:28.806] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:29.912] <TB2> INFO: Test took 1106ms.
[12:22:29.914] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:31.020] <TB2> INFO: Test took 1106ms.
[12:22:31.022] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:32.127] <TB2> INFO: Test took 1105ms.
[12:22:32.128] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:33.233] <TB2> INFO: Test took 1105ms.
[12:22:33.235] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:34.339] <TB2> INFO: Test took 1105ms.
[12:22:34.341] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:35.446] <TB2> INFO: Test took 1105ms.
[12:22:35.447] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:36.553] <TB2> INFO: Test took 1106ms.
[12:22:36.554] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:37.660] <TB2> INFO: Test took 1106ms.
[12:22:37.661] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:38.767] <TB2> INFO: Test took 1106ms.
[12:22:38.769] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:39.874] <TB2> INFO: Test took 1105ms.
[12:22:39.876] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:40.981] <TB2> INFO: Test took 1106ms.
[12:22:40.983] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:42.089] <TB2> INFO: Test took 1106ms.
[12:22:42.091] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:43.197] <TB2> INFO: Test took 1106ms.
[12:22:43.199] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:44.306] <TB2> INFO: Test took 1107ms.
[12:22:44.820] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 550 seconds
[12:22:44.820] <TB2> INFO: PH scale (per ROC): 80 93 80 85 93 86 78 80 78 78 80 87 84 77 87 85
[12:22:44.820] <TB2> INFO: PH offset (per ROC): 171 145 161 161 154 157 173 157 155 156 162 151 155 150 163 159
[12:22:45.004] <TB2> INFO: ######################################################################
[12:22:45.004] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:22:45.004] <TB2> INFO: ######################################################################
[12:22:45.014] <TB2> INFO: scanning low vcal = 10
[12:22:48.920] <TB2> INFO: Test took 3906ms.
[12:22:48.923] <TB2> INFO: scanning low vcal = 20
[12:22:52.828] <TB2> INFO: Test took 3905ms.
[12:22:52.831] <TB2> INFO: scanning low vcal = 30
[12:22:56.743] <TB2> INFO: Test took 3912ms.
[12:22:56.753] <TB2> INFO: scanning low vcal = 40
[12:23:01.265] <TB2> INFO: Test took 4512ms.
[12:23:01.337] <TB2> INFO: scanning low vcal = 50
[12:23:05.684] <TB2> INFO: Test took 4347ms.
[12:23:05.747] <TB2> INFO: scanning low vcal = 60
[12:23:10.073] <TB2> INFO: Test took 4326ms.
[12:23:10.132] <TB2> INFO: scanning low vcal = 70
[12:23:14.445] <TB2> INFO: Test took 4313ms.
[12:23:14.510] <TB2> INFO: scanning low vcal = 80
[12:23:18.842] <TB2> INFO: Test took 4332ms.
[12:23:18.903] <TB2> INFO: scanning low vcal = 90
[12:23:23.262] <TB2> INFO: Test took 4359ms.
[12:23:23.327] <TB2> INFO: scanning low vcal = 100
[12:23:27.689] <TB2> INFO: Test took 4362ms.
[12:23:27.749] <TB2> INFO: scanning low vcal = 110
[12:23:32.108] <TB2> INFO: Test took 4359ms.
[12:23:32.168] <TB2> INFO: scanning low vcal = 120
[12:23:36.514] <TB2> INFO: Test took 4346ms.
[12:23:36.580] <TB2> INFO: scanning low vcal = 130
[12:23:40.940] <TB2> INFO: Test took 4360ms.
[12:23:41.027] <TB2> INFO: scanning low vcal = 140
[12:23:45.412] <TB2> INFO: Test took 4385ms.
[12:23:45.470] <TB2> INFO: scanning low vcal = 150
[12:23:49.784] <TB2> INFO: Test took 4314ms.
[12:23:49.846] <TB2> INFO: scanning low vcal = 160
[12:23:54.149] <TB2> INFO: Test took 4303ms.
[12:23:54.209] <TB2> INFO: scanning low vcal = 170
[12:23:58.644] <TB2> INFO: Test took 4435ms.
[12:23:58.709] <TB2> INFO: scanning low vcal = 180
[12:24:03.018] <TB2> INFO: Test took 4309ms.
[12:24:03.081] <TB2> INFO: scanning low vcal = 190
[12:24:07.631] <TB2> INFO: Test took 4550ms.
[12:24:07.699] <TB2> INFO: scanning low vcal = 200
[12:24:12.142] <TB2> INFO: Test took 4443ms.
[12:24:12.204] <TB2> INFO: scanning low vcal = 210
[12:24:16.693] <TB2> INFO: Test took 4489ms.
[12:24:16.756] <TB2> INFO: scanning low vcal = 220
[12:24:21.189] <TB2> INFO: Test took 4433ms.
[12:24:21.260] <TB2> INFO: scanning low vcal = 230
[12:24:25.793] <TB2> INFO: Test took 4533ms.
[12:24:25.858] <TB2> INFO: scanning low vcal = 240
[12:24:30.331] <TB2> INFO: Test took 4473ms.
[12:24:30.392] <TB2> INFO: scanning low vcal = 250
[12:24:34.853] <TB2> INFO: Test took 4461ms.
[12:24:34.909] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[12:24:39.263] <TB2> INFO: Test took 4353ms.
[12:24:39.324] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[12:24:43.639] <TB2> INFO: Test took 4315ms.
[12:24:43.706] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[12:24:48.037] <TB2> INFO: Test took 4331ms.
[12:24:48.112] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[12:24:52.459] <TB2> INFO: Test took 4347ms.
[12:24:52.520] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:24:56.866] <TB2> INFO: Test took 4346ms.
[12:24:57.389] <TB2> INFO: PixTestGainPedestal::measure() done
[12:25:30.270] <TB2> INFO: PixTestGainPedestal::fit() done
[12:25:30.270] <TB2> INFO: non-linearity mean: 0.962 0.950 0.958 0.949 0.953 0.957 0.951 0.967 0.953 0.966 0.955 0.960 0.961 0.959 0.958 0.957
[12:25:30.270] <TB2> INFO: non-linearity RMS: 0.004 0.006 0.005 0.006 0.006 0.006 0.006 0.004 0.007 0.005 0.006 0.005 0.006 0.005 0.006 0.007
[12:25:30.271] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[12:25:30.292] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[12:25:30.311] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[12:25:30.331] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[12:25:30.350] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[12:25:30.368] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[12:25:30.386] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[12:25:30.405] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[12:25:30.423] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[12:25:30.442] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[12:25:30.464] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[12:25:30.487] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[12:25:30.510] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[12:25:30.539] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[12:25:30.559] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[12:25:30.578] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2058_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[12:25:30.596] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 165 seconds
[12:25:30.602] <TB2> INFO: enter test to run
[12:25:30.603] <TB2> INFO: test: exit no parameter change
[12:25:31.025] <TB2> QUIET: Connection to board 156 closed.
[12:25:31.041] <TB2> INFO: pXar: this is the end, my friend