[12:24:09.914] <TB0> INFO: *** Welcome to pxar ***
[12:24:09.915] <TB0> INFO: *** Today: 2015/08/05
[12:24:09.915] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C15.dat
[12:24:09.915] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:24:09.916] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//defaultMaskFile.dat
[12:24:09.916] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters_C15.dat
[12:24:09.977] <TB0> INFO: clk: 4
[12:24:09.977] <TB0> INFO: ctr: 4
[12:24:09.977] <TB0> INFO: sda: 19
[12:24:09.977] <TB0> INFO: tin: 9
[12:24:09.977] <TB0> INFO: level: 15
[12:24:09.977] <TB0> INFO: triggerdelay: 0
[12:24:09.977] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[12:24:09.977] <TB0> INFO: Log level: INFO
[12:24:09.995] <TB0> INFO: Found DTB DTB_WWVASW
[12:24:10.004] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[12:24:10.007] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[12:24:10.009] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[12:24:11.519] <TB0> INFO: DUT info:
[12:24:11.519] <TB0> INFO: The DUT currently contains the following objects:
[12:24:11.519] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:24:11.519] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:24:11.519] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:24:11.519] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:24:11.519] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.519] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:24:11.920] <TB0> INFO: enter 'restricted' command line mode
[12:24:11.920] <TB0> INFO: enter test to run
[12:24:11.920] <TB0> INFO: test: pretest no parameter change
[12:24:11.920] <TB0> INFO: running: pretest
[12:24:11.924] <TB0> INFO: ######################################################################
[12:24:11.924] <TB0> INFO: PixTestPretest::doTest()
[12:24:11.924] <TB0> INFO: ######################################################################
[12:24:11.926] <TB0> INFO: ----------------------------------------------------------------------
[12:24:11.926] <TB0> INFO: PixTestPretest::programROC()
[12:24:11.926] <TB0> INFO: ----------------------------------------------------------------------
[12:24:29.942] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:24:29.942] <TB0> INFO: IA differences per ROC: 17.7 17.7 18.5 19.3 17.7 20.1 19.3 19.3 20.1 18.5 17.7 20.1 18.5 19.3 19.3 19.3
[12:24:30.040] <TB0> INFO: ----------------------------------------------------------------------
[12:24:30.040] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:24:30.040] <TB0> INFO: ----------------------------------------------------------------------
[12:24:34.196] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[12:24:34.199] <TB0> INFO: ----------------------------------------------------------------------
[12:24:34.199] <TB0> INFO: PixTestPretest::findWorkingPixel()
[12:24:34.199] <TB0> INFO: ----------------------------------------------------------------------
[12:24:44.641] <TB0> INFO: Test took 10435ms.
[12:24:44.937] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:24:44.956] <TB0> INFO: ----------------------------------------------------------------------
[12:24:44.956] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[12:24:44.956] <TB0> INFO: ----------------------------------------------------------------------
[12:24:55.398] <TB0> INFO: Test took 10437ms.
[12:24:55.690] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[12:24:55.690] <TB0> INFO: CalDel: 127 141 152 162 141 123 160 159 149 128 135 144 131 134 142 157
[12:24:55.690] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:24:55.694] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C0.dat
[12:24:55.694] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C1.dat
[12:24:55.694] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C2.dat
[12:24:55.695] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C3.dat
[12:24:55.695] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C4.dat
[12:24:55.695] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C5.dat
[12:24:55.695] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C6.dat
[12:24:55.696] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C7.dat
[12:24:55.696] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C8.dat
[12:24:55.696] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C9.dat
[12:24:55.696] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C10.dat
[12:24:55.696] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C11.dat
[12:24:55.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C12.dat
[12:24:55.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C13.dat
[12:24:55.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C14.dat
[12:24:55.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters_C15.dat
[12:24:55.698] <TB0> INFO: PixTestPretest::doTest() done, duration: 43 seconds
[12:24:55.792] <TB0> INFO: enter test to run
[12:24:55.792] <TB0> INFO: test: fulltest no parameter change
[12:24:55.792] <TB0> INFO: running: fulltest
[12:24:55.793] <TB0> INFO: ######################################################################
[12:24:55.793] <TB0> INFO: PixTestFullTest::doTest()
[12:24:55.793] <TB0> INFO: ######################################################################
[12:24:55.794] <TB0> INFO: ######################################################################
[12:24:55.794] <TB0> INFO: PixTestAlive::doTest()
[12:24:55.794] <TB0> INFO: ######################################################################
[12:24:55.796] <TB0> INFO: ----------------------------------------------------------------------
[12:24:55.796] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:24:55.796] <TB0> INFO: ----------------------------------------------------------------------
[12:24:59.917] <TB0> INFO: Test took 4121ms.
[12:24:59.939] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:00.148] <TB0> INFO: PixTestAlive::aliveTest() done
[12:25:00.148] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0
[12:25:00.150] <TB0> INFO: ----------------------------------------------------------------------
[12:25:00.150] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:00.150] <TB0> INFO: ----------------------------------------------------------------------
[12:25:03.221] <TB0> INFO: Test took 3070ms.
[12:25:03.224] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:03.225] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:25:03.434] <TB0> INFO: PixTestAlive::maskTest() done
[12:25:03.434] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:03.436] <TB0> INFO: ----------------------------------------------------------------------
[12:25:03.436] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:25:03.436] <TB0> INFO: ----------------------------------------------------------------------
[12:25:07.355] <TB0> INFO: Test took 3919ms.
[12:25:07.378] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:07.589] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[12:25:07.589] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:07.589] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:25:07.599] <TB0> INFO: ######################################################################
[12:25:07.599] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:25:07.599] <TB0> INFO: ######################################################################
[12:25:07.601] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:25:07.612] <TB0> INFO: dacScan step from 0 .. 29
[12:25:33.258] <TB0> INFO: Test took 25646ms.
[12:25:33.290] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:33.290] <TB0> INFO: dacScan step from 30 .. 59
[12:26:04.077] <TB0> INFO: Test took 30787ms.
[12:26:04.234] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:04.258] <TB0> INFO: dacScan step from 60 .. 89
[12:26:43.054] <TB0> INFO: Test took 38796ms.
[12:26:43.313] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:43.385] <TB0> INFO: dacScan step from 90 .. 119
[12:27:22.255] <TB0> INFO: Test took 38870ms.
[12:27:22.533] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:22.604] <TB0> INFO: dacScan step from 120 .. 149
[12:27:54.846] <TB0> INFO: Test took 32242ms.
[12:27:55.027] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:18.697] <TB0> INFO: PixTestBBMap::doTest() done, duration: 191 seconds
[12:28:18.697] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2
[12:28:18.697] <TB0> INFO: separation cut (per ROC): 79 71 94 93 72 92 79 93 79 95 82 75 77 79 72 86
[12:28:18.785] <TB0> INFO: ######################################################################
[12:28:18.785] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[12:28:18.785] <TB0> INFO: ######################################################################
[12:28:18.785] <TB0> INFO: ----------------------------------------------------------------------
[12:28:18.785] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:28:18.785] <TB0> INFO: ----------------------------------------------------------------------
[12:28:18.785] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:28:18.795] <TB0> INFO: dacScan step from 0 .. 3
[12:28:43.452] <TB0> INFO: Test took 24657ms.
[12:28:43.477] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:43.477] <TB0> INFO: dacScan step from 4 .. 7
[12:29:07.817] <TB0> INFO: Test took 24340ms.
[12:29:07.846] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:07.846] <TB0> INFO: dacScan step from 8 .. 11
[12:29:33.292] <TB0> INFO: Test took 25445ms.
[12:29:33.320] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:33.320] <TB0> INFO: dacScan step from 12 .. 15
[12:29:59.003] <TB0> INFO: Test took 25683ms.
[12:29:59.034] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:59.034] <TB0> INFO: dacScan step from 16 .. 19
[12:30:24.975] <TB0> INFO: Test took 25941ms.
[12:30:25.000] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:25.000] <TB0> INFO: dacScan step from 20 .. 23
[12:30:50.464] <TB0> INFO: Test took 25464ms.
[12:30:50.490] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:50.490] <TB0> INFO: dacScan step from 24 .. 27
[12:31:15.932] <TB0> INFO: Test took 25442ms.
[12:31:15.965] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:15.965] <TB0> INFO: dacScan step from 28 .. 31
[12:31:41.234] <TB0> INFO: Test took 25269ms.
[12:31:41.261] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:41.261] <TB0> INFO: dacScan step from 32 .. 35
[12:32:06.480] <TB0> INFO: Test took 25219ms.
[12:32:06.507] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:06.507] <TB0> INFO: dacScan step from 36 .. 39
[12:32:31.443] <TB0> INFO: Test took 24936ms.
[12:32:31.469] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:31.469] <TB0> INFO: dacScan step from 40 .. 43
[12:32:57.161] <TB0> INFO: Test took 25692ms.
[12:32:57.189] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:57.189] <TB0> INFO: dacScan step from 44 .. 47
[12:33:22.505] <TB0> INFO: Test took 25316ms.
[12:33:22.530] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:22.530] <TB0> INFO: dacScan step from 48 .. 51
[12:33:48.086] <TB0> INFO: Test took 25556ms.
[12:33:48.111] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:48.138] <TB0> INFO: dacScan step from 52 .. 55
[12:34:14.126] <TB0> INFO: Test took 25988ms.
[12:34:14.151] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:14.151] <TB0> INFO: dacScan step from 56 .. 59
[12:34:39.625] <TB0> INFO: Test took 25474ms.
[12:34:39.652] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:39.652] <TB0> INFO: dacScan step from 60 .. 63
[12:35:05.251] <TB0> INFO: Test took 25599ms.
[12:35:05.293] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:05.293] <TB0> INFO: dacScan step from 64 .. 67
[12:35:31.130] <TB0> INFO: Test took 25837ms.
[12:35:31.178] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:31.178] <TB0> INFO: dacScan step from 68 .. 71
[12:35:58.266] <TB0> INFO: Test took 27088ms.
[12:35:58.322] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:58.323] <TB0> INFO: dacScan step from 72 .. 75
[12:36:25.906] <TB0> INFO: Test took 27583ms.
[12:36:25.971] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:25.973] <TB0> INFO: dacScan step from 76 .. 79
[12:36:54.931] <TB0> INFO: Test took 28958ms.
[12:36:55.020] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:55.024] <TB0> INFO: dacScan step from 80 .. 83
[12:37:28.340] <TB0> INFO: Test took 33315ms.
[12:37:28.495] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:28.504] <TB0> INFO: dacScan step from 84 .. 87
[12:38:03.822] <TB0> INFO: Test took 35318ms.
[12:38:04.009] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:04.021] <TB0> INFO: dacScan step from 88 .. 91
[12:38:42.073] <TB0> INFO: Test took 38052ms.
[12:38:42.286] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:42.296] <TB0> INFO: dacScan step from 92 .. 95


[12:39:21.397] <TB0> INFO: Test took 39100ms.
[12:39:21.633] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:21.644] <TB0> INFO: dacScan step from 96 .. 99



[12:40:02.053] <TB0> INFO: Test took 40409ms.
[12:40:02.301] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:02.312] <TB0> INFO: dacScan step from 100 .. 103





[12:40:43.180] <TB0> INFO: Test took 40868ms.
[12:40:43.423] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:43.434] <TB0> INFO: dacScan step from 104 .. 107

[12:41:25.159] <TB0> INFO: Test took 41725ms.
[12:41:25.432] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:25.447] <TB0> INFO: dacScan step from 108 .. 111


[12:42:06.435] <TB0> INFO: Test took 40987ms.
[12:42:06.649] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:06.659] <TB0> INFO: dacScan step from 112 .. 115


[12:42:48.893] <TB0> INFO: Test took 42234ms.
[12:42:49.108] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:49.118] <TB0> INFO: dacScan step from 116 .. 119
[12:43:30.752] <TB0> INFO: Test took 41634ms.
[12:43:30.973] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:30.982] <TB0> INFO: dacScan step from 120 .. 123
[12:44:13.441] <TB0> INFO: Test took 42459ms.
[12:44:13.689] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:13.698] <TB0> INFO: dacScan step from 124 .. 127
[12:44:50.554] <TB0> INFO: Test took 36856ms.
[12:44:50.824] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:50.835] <TB0> INFO: dacScan step from 128 .. 131
[12:45:29.036] <TB0> INFO: Test took 38201ms.
[12:45:29.278] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:29.291] <TB0> INFO: dacScan step from 132 .. 135
[12:46:10.976] <TB0> INFO: Test took 41685ms.
[12:46:11.192] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:11.203] <TB0> INFO: dacScan step from 136 .. 139
[12:46:53.812] <TB0> INFO: Test took 42609ms.
[12:46:54.049] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:54.059] <TB0> INFO: dacScan step from 140 .. 143
[12:47:30.370] <TB0> INFO: Test took 36311ms.
[12:47:30.597] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:30.608] <TB0> INFO: dacScan step from 144 .. 147
[12:48:09.369] <TB0> INFO: Test took 38761ms.
[12:48:09.588] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:09.600] <TB0> INFO: dacScan step from 148 .. 149
[12:48:31.244] <TB0> INFO: Test took 21644ms.
[12:48:31.356] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:31.362] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:32.748] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:34.283] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:35.775] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:37.271] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:38.822] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:40.311] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:41.810] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:43.353] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:44.763] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:46.140] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:47.587] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:48.975] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:50.404] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:51.781] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:53.217] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[12:48:54.721] <TB0> INFO: PixTestScurves::scurves() done
[12:48:54.722] <TB0> INFO: Vcal mean: 87.48 82.45 88.26 93.31 81.06 89.04 88.35 90.69 81.27 93.48 80.03 84.80 80.29 85.27 67.31 89.30
[12:48:54.722] <TB0> INFO: Vcal RMS: 5.63 4.97 5.96 6.08 4.95 5.59 5.06 5.30 4.39 6.16 4.89 5.73 4.27 4.89 4.70 5.39
[12:48:54.722] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1235 seconds
[12:48:54.805] <TB0> INFO: ######################################################################
[12:48:54.805] <TB0> INFO: PixTestTrim::doTest()
[12:48:54.805] <TB0> INFO: ######################################################################
[12:48:54.806] <TB0> INFO: ----------------------------------------------------------------------
[12:48:54.806] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:48:54.806] <TB0> INFO: ----------------------------------------------------------------------
[12:48:54.888] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:48:54.888] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:48:54.897] <TB0> INFO: dacScan step from 0 .. 19
[12:49:13.288] <TB0> INFO: Test took 18391ms.
[12:49:13.310] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:13.310] <TB0> INFO: dacScan step from 20 .. 39
[12:49:32.030] <TB0> INFO: Test took 18719ms.
[12:49:32.052] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:32.052] <TB0> INFO: dacScan step from 40 .. 59
[12:49:50.277] <TB0> INFO: Test took 18224ms.
[12:49:50.303] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:50.303] <TB0> INFO: dacScan step from 60 .. 79
[12:50:08.919] <TB0> INFO: Test took 18616ms.
[12:50:08.944] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:08.944] <TB0> INFO: dacScan step from 80 .. 99
[12:50:27.243] <TB0> INFO: Test took 18299ms.
[12:50:27.320] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:27.332] <TB0> INFO: dacScan step from 100 .. 119
[12:50:52.292] <TB0> INFO: Test took 24959ms.
[12:50:52.451] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:52.483] <TB0> INFO: dacScan step from 120 .. 139
[12:51:13.840] <TB0> INFO: Test took 21356ms.
[12:51:13.984] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:14.010] <TB0> INFO: dacScan step from 140 .. 159
[12:51:33.683] <TB0> INFO: Test took 19673ms.
[12:51:33.748] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:53.845] <TB0> INFO: ROC 0 VthrComp = 89
[12:51:53.845] <TB0> INFO: ROC 1 VthrComp = 84
[12:51:53.845] <TB0> INFO: ROC 2 VthrComp = 92
[12:51:53.845] <TB0> INFO: ROC 3 VthrComp = 98
[12:51:53.845] <TB0> INFO: ROC 4 VthrComp = 82
[12:51:53.845] <TB0> INFO: ROC 5 VthrComp = 93
[12:51:53.845] <TB0> INFO: ROC 6 VthrComp = 93
[12:51:53.846] <TB0> INFO: ROC 7 VthrComp = 96
[12:51:53.846] <TB0> INFO: ROC 8 VthrComp = 87
[12:51:53.846] <TB0> INFO: ROC 9 VthrComp = 95
[12:51:53.846] <TB0> INFO: ROC 10 VthrComp = 84
[12:51:53.846] <TB0> INFO: ROC 11 VthrComp = 86
[12:51:53.846] <TB0> INFO: ROC 12 VthrComp = 84
[12:51:53.846] <TB0> INFO: ROC 13 VthrComp = 90
[12:51:53.846] <TB0> INFO: ROC 14 VthrComp = 74
[12:51:53.846] <TB0> INFO: ROC 15 VthrComp = 94
[12:51:53.846] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:51:53.846] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:51:53.856] <TB0> INFO: dacScan step from 0 .. 19
[12:52:11.087] <TB0> INFO: Test took 17231ms.
[12:52:11.108] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:11.108] <TB0> INFO: dacScan step from 20 .. 39
[12:52:28.480] <TB0> INFO: Test took 17372ms.
[12:52:28.512] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:28.515] <TB0> INFO: dacScan step from 40 .. 59
[12:52:50.116] <TB0> INFO: Test took 21601ms.
[12:52:50.274] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:50.314] <TB0> INFO: dacScan step from 60 .. 79
[12:53:14.408] <TB0> INFO: Test took 24094ms.
[12:53:14.585] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:14.640] <TB0> INFO: dacScan step from 80 .. 99
[12:53:38.763] <TB0> INFO: Test took 24122ms.
[12:53:38.925] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:38.982] <TB0> INFO: dacScan step from 100 .. 119
[12:54:05.220] <TB0> INFO: Test took 26238ms.
[12:54:05.394] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:05.445] <TB0> INFO: dacScan step from 120 .. 139
[12:54:32.323] <TB0> INFO: Test took 26878ms.
[12:54:32.481] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:32.530] <TB0> INFO: dacScan step from 140 .. 159
[12:54:59.632] <TB0> INFO: Test took 27102ms.
[12:54:59.809] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:24.004] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 61.2143 for pixel 3/79 mean/min/max = 46.4753/31.7057/61.2448
[12:55:24.005] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 60.4803 for pixel 0/75 mean/min/max = 46.1368/31.7406/60.533
[12:55:24.005] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 61.2516 for pixel 5/79 mean/min/max = 46.7789/32.1375/61.4203
[12:55:24.006] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 59.9503 for pixel 21/4 mean/min/max = 45.6144/31.0658/60.163
[12:55:24.007] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.3052 for pixel 0/13 mean/min/max = 46.3697/32.4026/60.3368
[12:55:24.007] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 58.9382 for pixel 13/26 mean/min/max = 45.5401/31.7895/59.2908
[12:55:24.008] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.1677 for pixel 24/75 mean/min/max = 45.5012/32.794/58.2084
[12:55:24.008] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 58.4583 for pixel 34/2 mean/min/max = 45.5046/32.4794/58.5298
[12:55:24.009] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 57.4778 for pixel 2/21 mean/min/max = 45.0996/32.6593/57.5399
[12:55:24.009] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 62.3609 for pixel 10/69 mean/min/max = 46.5387/30.6909/62.3865
[12:55:24.010] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 58.1059 for pixel 12/79 mean/min/max = 45.0811/31.8062/58.3559
[12:55:24.011] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 60.2001 for pixel 9/1 mean/min/max = 46.3968/32.3855/60.408
[12:55:24.011] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 57.4078 for pixel 0/7 mean/min/max = 45.0889/32.5372/57.6406
[12:55:24.012] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 58.0181 for pixel 51/6 mean/min/max = 45.1762/32.3068/58.0455
[12:55:24.013] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 56.3454 for pixel 10/1 mean/min/max = 45.6156/34.7716/56.4595
[12:55:24.013] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 59.1997 for pixel 24/0 mean/min/max = 45.5206/31.8275/59.2137
[12:55:24.014] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:57:32.426] <TB0> INFO: Test took 128412ms.
[12:57:33.799] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:57:33.810] <TB0> INFO: dacScan step from 0 .. 19
[12:58:00.078] <TB0> INFO: Test took 26268ms.
[12:58:00.139] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:00.142] <TB0> INFO: dacScan step from 20 .. 39
[12:58:38.757] <TB0> INFO: Test took 38615ms.
[12:58:38.974] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:39.005] <TB0> INFO: dacScan step from 40 .. 59

[12:59:19.343] <TB0> INFO: Test took 40338ms.
[12:59:19.610] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:19.652] <TB0> INFO: dacScan step from 60 .. 79


[13:00:05.025] <TB0> INFO: Test took 45373ms.
[13:00:05.319] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:05.366] <TB0> INFO: dacScan step from 80 .. 99





[13:00:46.505] <TB0> INFO: Test took 41139ms.
[13:00:46.783] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:46.826] <TB0> INFO: dacScan step from 100 .. 119





[13:01:32.488] <TB0> INFO: Test took 45662ms.
[13:01:32.766] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:32.811] <TB0> INFO: dacScan step from 120 .. 139


[13:02:16.130] <TB0> INFO: Test took 43319ms.
[13:02:16.582] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:16.632] <TB0> INFO: dacScan step from 140 .. 159


[13:03:00.422] <TB0> INFO: Test took 43790ms.
[13:03:00.703] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:00.751] <TB0> INFO: dacScan step from 160 .. 179


[13:03:40.445] <TB0> INFO: Test took 39694ms.
[13:03:40.713] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:40.763] <TB0> INFO: dacScan step from 180 .. 199





[13:04:23.316] <TB0> INFO: Test took 42553ms.
[13:04:23.612] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:47.752] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.067746 .. 255.000000
[13:04:47.837] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:04:47.845] <TB0> INFO: dacScan step from 0 .. 19
[13:05:03.753] <TB0> INFO: Test took 15908ms.
[13:05:03.773] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:03.773] <TB0> INFO: dacScan step from 20 .. 39
[13:05:21.103] <TB0> INFO: Test took 17329ms.
[13:05:21.187] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:21.202] <TB0> INFO: dacScan step from 40 .. 59
[13:05:44.400] <TB0> INFO: Test took 23197ms.
[13:05:44.543] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:44.589] <TB0> INFO: dacScan step from 60 .. 79
[13:06:03.958] <TB0> INFO: Test took 19369ms.
[13:06:04.107] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:04.158] <TB0> INFO: dacScan step from 80 .. 99
[13:06:27.002] <TB0> INFO: Test took 22844ms.
[13:06:27.152] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:27.198] <TB0> INFO: dacScan step from 100 .. 119
[13:06:50.020] <TB0> INFO: Test took 22822ms.
[13:06:50.170] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:50.216] <TB0> INFO: dacScan step from 120 .. 139
[13:07:12.998] <TB0> INFO: Test took 22782ms.
[13:07:13.181] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:13.229] <TB0> INFO: dacScan step from 140 .. 159
[13:07:33.241] <TB0> INFO: Test took 20012ms.
[13:07:33.378] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:33.423] <TB0> INFO: dacScan step from 160 .. 179
[13:07:56.187] <TB0> INFO: Test took 22764ms.
[13:07:56.327] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:56.370] <TB0> INFO: dacScan step from 180 .. 199
[13:08:19.996] <TB0> INFO: Test took 23626ms.
[13:08:20.131] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:20.174] <TB0> INFO: dacScan step from 200 .. 219
[13:08:43.086] <TB0> INFO: Test took 22912ms.
[13:08:43.222] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:43.267] <TB0> INFO: dacScan step from 220 .. 239
[13:09:06.043] <TB0> INFO: Test took 22776ms.
[13:09:06.179] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:06.223] <TB0> INFO: dacScan step from 240 .. 255
[13:09:25.301] <TB0> INFO: Test took 19078ms.
[13:09:25.418] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:56.693] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 15.839278 .. 46.093830
[13:09:56.771] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 56 (20) hits flags = 16 (plus default)
[13:09:56.780] <TB0> INFO: dacScan step from 5 .. 24
[13:10:13.033] <TB0> INFO: Test took 16253ms.
[13:10:13.052] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:13.052] <TB0> INFO: dacScan step from 25 .. 44
[13:10:32.877] <TB0> INFO: Test took 19824ms.
[13:10:32.994] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:33.020] <TB0> INFO: dacScan step from 45 .. 56
[13:10:48.029] <TB0> INFO: Test took 15009ms.
[13:10:48.118] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:04.695] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 19.360994 .. 44.499941
[13:11:04.776] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 9 .. 54 (20) hits flags = 16 (plus default)
[13:11:04.784] <TB0> INFO: dacScan step from 9 .. 28
[13:11:20.985] <TB0> INFO: Test took 16201ms.
[13:11:21.012] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:21.012] <TB0> INFO: dacScan step from 29 .. 48
[13:11:42.582] <TB0> INFO: Test took 21570ms.
[13:11:42.738] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:42.819] <TB0> INFO: dacScan step from 49 .. 54
[13:11:51.557] <TB0> INFO: Test took 8737ms.
[13:11:51.601] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:07.851] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 2.895872 .. 42.179147
[13:12:07.934] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 52 (20) hits flags = 16 (plus default)
[13:12:07.942] <TB0> INFO: dacScan step from 2 .. 21
[13:12:23.352] <TB0> INFO: Test took 15410ms.
[13:12:23.376] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:23.376] <TB0> INFO: dacScan step from 22 .. 41
[13:12:40.986] <TB0> INFO: Test took 17610ms.
[13:12:41.078] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:41.098] <TB0> INFO: dacScan step from 42 .. 52
[13:12:54.872] <TB0> INFO: Test took 13774ms.
[13:12:54.948] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:10.410] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:13:10.410] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:13:10.418] <TB0> INFO: dacScan step from 15 .. 34
[13:13:40.985] <TB0> INFO: Test took 30567ms.
[13:13:41.054] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:41.062] <TB0> INFO: dacScan step from 35 .. 54


[13:14:26.024] <TB0> INFO: Test took 44962ms.
[13:14:26.303] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:26.345] <TB0> INFO: dacScan step from 55 .. 55
[13:14:31.306] <TB0> INFO: Test took 4961ms.
[13:14:31.329] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:45.576] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:14:45.576] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:14:45.577] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:14:45.577] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:14:45.577] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:14:45.577] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:14:45.578] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:14:45.578] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:14:45.578] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:14:45.578] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:14:45.578] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:14:45.579] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:14:45.579] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:14:45.579] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:14:45.579] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:14:45.580] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:14:45.580] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:14:45.590] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:14:45.597] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:14:45.604] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:14:45.611] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:14:45.618] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:14:45.624] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:14:45.630] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:14:45.636] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:14:45.642] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:14:45.648] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:14:45.655] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:14:45.661] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:14:45.667] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:14:45.676] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:14:45.685] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:14:45.694] <TB0> INFO: PixTestTrim::trimTest() done
[13:14:45.694] <TB0> INFO: vtrim: 127 109 112 116 104 107 94 104 110 134 97 112 90 111 91 114
[13:14:45.694] <TB0> INFO: vthrcomp: 89 84 92 98 82 93 93 96 87 95 84 86 84 90 74 94
[13:14:45.694] <TB0> INFO: vcal mean: 35.08 35.02 35.04 35.01 34.97 35.14 35.09 35.03 35.02 35.04 35.03 35.03 35.08 35.02 35.03 35.00
[13:14:45.694] <TB0> INFO: vcal RMS: 1.08 1.09 1.00 1.04 1.06 1.04 1.03 1.06 0.96 1.09 1.10 1.28 1.00 1.00 0.93 1.09
[13:14:45.694] <TB0> INFO: bits mean: 9.83 9.71 9.29 9.88 9.32 10.07 9.64 9.76 9.51 10.15 9.96 9.59 9.64 9.95 9.40 10.18
[13:14:45.694] <TB0> INFO: bits RMS: 2.52 2.59 2.70 2.64 2.70 2.48 2.53 2.53 2.64 2.46 2.55 2.53 2.58 2.45 2.38 2.37
[13:14:45.701] <TB0> INFO: ----------------------------------------------------------------------
[13:14:45.701] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:14:45.701] <TB0> INFO: ----------------------------------------------------------------------
[13:14:45.703] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:14:45.711] <TB0> INFO: dacScan step from 0 .. 19
[13:15:14.977] <TB0> INFO: Test took 29266ms.
[13:15:15.012] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:15.012] <TB0> INFO: dacScan step from 20 .. 39
[13:15:44.142] <TB0> INFO: Test took 29130ms.
[13:15:44.177] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:44.178] <TB0> INFO: dacScan step from 40 .. 59
[13:16:12.756] <TB0> INFO: Test took 28578ms.
[13:16:12.798] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:12.798] <TB0> INFO: dacScan step from 60 .. 79
[13:16:41.986] <TB0> INFO: Test took 29188ms.
[13:16:42.028] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:42.029] <TB0> INFO: dacScan step from 80 .. 99
[13:17:10.230] <TB0> INFO: Test took 28201ms.
[13:17:10.298] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:10.301] <TB0> INFO: dacScan step from 100 .. 119
[13:17:44.422] <TB0> INFO: Test took 34121ms.
[13:17:44.643] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:44.668] <TB0> INFO: dacScan step from 120 .. 139


[13:18:24.953] <TB0> INFO: Test took 40285ms.
[13:18:25.220] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:25.273] <TB0> INFO: dacScan step from 140 .. 159
[13:19:09.038] <TB0> INFO: Test took 43764ms.
[13:19:09.301] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:09.352] <TB0> INFO: dacScan step from 160 .. 179
[13:19:53.867] <TB0> INFO: Test took 44515ms.
[13:19:54.140] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:54.195] <TB0> INFO: dacScan step from 180 .. 199
[13:20:40.343] <TB0> INFO: Test took 46148ms.
[13:20:40.614] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:07.755] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[13:21:07.764] <TB0> INFO: dacScan step from 0 .. 19
[13:21:36.405] <TB0> INFO: Test took 28641ms.
[13:21:36.440] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:36.440] <TB0> INFO: dacScan step from 20 .. 39
[13:22:02.786] <TB0> INFO: Test took 26345ms.
[13:22:02.823] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:02.823] <TB0> INFO: dacScan step from 40 .. 59
[13:22:29.893] <TB0> INFO: Test took 27070ms.
[13:22:29.929] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:29.929] <TB0> INFO: dacScan step from 60 .. 79
[13:22:56.385] <TB0> INFO: Test took 26456ms.
[13:22:56.429] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:56.429] <TB0> INFO: dacScan step from 80 .. 99
[13:23:26.204] <TB0> INFO: Test took 29775ms.
[13:23:26.364] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:26.377] <TB0> INFO: dacScan step from 100 .. 119


[13:24:06.844] <TB0> INFO: Test took 40466ms.
[13:24:07.119] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:07.159] <TB0> INFO: dacScan step from 120 .. 139
[13:24:52.974] <TB0> INFO: Test took 45815ms.
[13:24:53.269] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:53.318] <TB0> INFO: dacScan step from 140 .. 158
[13:25:32.752] <TB0> INFO: Test took 39433ms.
[13:25:33.026] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:55.064] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 148 (20) hits flags = 16 (plus default)
[13:25:55.072] <TB0> INFO: dacScan step from 0 .. 19
[13:26:22.256] <TB0> INFO: Test took 27184ms.
[13:26:22.293] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:22.293] <TB0> INFO: dacScan step from 20 .. 39
[13:26:51.496] <TB0> INFO: Test took 29203ms.
[13:26:51.536] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:51.536] <TB0> INFO: dacScan step from 40 .. 59
[13:27:21.493] <TB0> INFO: Test took 29957ms.
[13:27:21.528] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:21.528] <TB0> INFO: dacScan step from 60 .. 79
[13:27:50.995] <TB0> INFO: Test took 29467ms.
[13:27:51.040] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:51.040] <TB0> INFO: dacScan step from 80 .. 99
[13:28:23.281] <TB0> INFO: Test took 32241ms.
[13:28:23.406] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:23.416] <TB0> INFO: dacScan step from 100 .. 119





[13:29:04.500] <TB0> INFO: Test took 41084ms.
[13:29:04.782] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:04.825] <TB0> INFO: dacScan step from 120 .. 139
[13:29:48.398] <TB0> INFO: Test took 43573ms.
[13:29:48.676] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:48.721] <TB0> INFO: dacScan step from 140 .. 148
[13:30:10.419] <TB0> INFO: Test took 21698ms.
[13:30:10.536] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:32.141] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 148 (20) hits flags = 16 (plus default)
[13:30:32.149] <TB0> INFO: dacScan step from 0 .. 19
[13:31:01.367] <TB0> INFO: Test took 29218ms.
[13:31:01.403] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:01.403] <TB0> INFO: dacScan step from 20 .. 39
[13:31:30.854] <TB0> INFO: Test took 29451ms.
[13:31:30.888] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:30.888] <TB0> INFO: dacScan step from 40 .. 59
[13:32:00.241] <TB0> INFO: Test took 29352ms.
[13:32:00.277] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:00.277] <TB0> INFO: dacScan step from 60 .. 79
[13:32:29.934] <TB0> INFO: Test took 29657ms.
[13:32:29.975] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:29.976] <TB0> INFO: dacScan step from 80 .. 99
[13:33:00.652] <TB0> INFO: Test took 30676ms.
[13:33:00.818] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:00.839] <TB0> INFO: dacScan step from 100 .. 119





[13:33:43.694] <TB0> INFO: Test took 42855ms.
[13:33:43.979] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:44.019] <TB0> INFO: dacScan step from 120 .. 139


[13:34:28.101] <TB0> INFO: Test took 44082ms.
[13:34:28.359] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:28.402] <TB0> INFO: dacScan step from 140 .. 148
[13:34:50.449] <TB0> INFO: Test took 22047ms.
[13:34:50.573] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:11.246] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 147 (20) hits flags = 16 (plus default)
[13:35:11.253] <TB0> INFO: dacScan step from 0 .. 19
[13:35:40.774] <TB0> INFO: Test took 29520ms.
[13:35:40.807] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:40.807] <TB0> INFO: dacScan step from 20 .. 39
[13:36:10.038] <TB0> INFO: Test took 29231ms.
[13:36:10.075] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:10.075] <TB0> INFO: dacScan step from 40 .. 59
[13:36:39.413] <TB0> INFO: Test took 29338ms.
[13:36:39.449] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:39.449] <TB0> INFO: dacScan step from 60 .. 79
[13:37:09.185] <TB0> INFO: Test took 29736ms.
[13:37:09.232] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:09.232] <TB0> INFO: dacScan step from 80 .. 99
[13:37:41.638] <TB0> INFO: Test took 32406ms.
[13:37:41.763] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:41.774] <TB0> INFO: dacScan step from 100 .. 119



[13:38:23.566] <TB0> INFO: Test took 41792ms.
[13:38:23.841] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:23.879] <TB0> INFO: dacScan step from 120 .. 139


[13:39:04.585] <TB0> INFO: Test took 40706ms.
[13:39:04.863] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:04.914] <TB0> INFO: dacScan step from 140 .. 147
[13:39:24.564] <TB0> INFO: Test took 19650ms.
[13:39:24.671] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:45.173] <TB0> INFO: PixTestTrim::trimBitTest() done
[13:39:45.175] <TB0> INFO: PixTestTrim::doTest() done, duration: 3050 seconds
[13:39:45.850] <TB0> INFO: ######################################################################
[13:39:45.850] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:39:45.850] <TB0> INFO: ######################################################################
[13:39:49.837] <TB0> INFO: Test took 3985ms.
[13:39:49.855] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:54.205] <TB0> INFO: Test took 4154ms.
[13:39:54.281] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:58.252] <TB0> INFO: Test took 3961ms.
[13:39:58.323] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:58.329] <TB0> INFO: The DUT currently contains the following objects:
[13:39:58.329] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:39:58.329] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:39:58.329] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:39:58.329] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:39:58.329] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:58.329] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.454] <TB0> INFO: Test took 1125ms.
[13:39:59.455] <TB0> INFO: The DUT currently contains the following objects:
[13:39:59.455] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:39:59.455] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:39:59.455] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:39:59.455] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:39:59.455] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:39:59.455] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.614] <TB0> INFO: Test took 1159ms.
[13:40:00.616] <TB0> INFO: The DUT currently contains the following objects:
[13:40:00.616] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:00.616] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:00.616] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:00.616] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:00.616] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.616] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.617] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:00.617] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.745] <TB0> INFO: Test took 1128ms.
[13:40:01.746] <TB0> INFO: The DUT currently contains the following objects:
[13:40:01.746] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:01.746] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:01.746] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:01.746] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:01.746] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:01.747] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.876] <TB0> INFO: Test took 1129ms.
[13:40:02.877] <TB0> INFO: The DUT currently contains the following objects:
[13:40:02.877] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:02.877] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:02.877] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:02.877] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:02.877] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:02.877] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.006] <TB0> INFO: Test took 1129ms.
[13:40:04.007] <TB0> INFO: The DUT currently contains the following objects:
[13:40:04.007] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:04.007] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:04.007] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:04.007] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:04.007] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.007] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.008] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.008] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:04.008] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.167] <TB0> INFO: Test took 1159ms.
[13:40:05.168] <TB0> INFO: The DUT currently contains the following objects:
[13:40:05.168] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:05.168] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:05.168] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:05.168] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:05.168] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:05.168] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.280] <TB0> INFO: Test took 1111ms.
[13:40:06.281] <TB0> INFO: The DUT currently contains the following objects:
[13:40:06.281] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:06.281] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:06.281] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:06.282] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:06.282] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:06.282] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.420] <TB0> INFO: Test took 1138ms.
[13:40:07.421] <TB0> INFO: The DUT currently contains the following objects:
[13:40:07.421] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:07.421] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:07.421] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:07.421] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:07.421] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:07.421] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.564] <TB0> INFO: Test took 1143ms.
[13:40:08.565] <TB0> INFO: The DUT currently contains the following objects:
[13:40:08.565] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:08.565] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:08.565] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:08.565] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:08.565] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.565] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.566] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.566] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.566] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:08.566] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.739] <TB0> INFO: Test took 1173ms.
[13:40:09.740] <TB0> INFO: The DUT currently contains the following objects:
[13:40:09.740] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:09.740] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:09.740] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:09.740] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:09.741] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:09.741] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.885] <TB0> INFO: Test took 1144ms.
[13:40:10.886] <TB0> INFO: The DUT currently contains the following objects:
[13:40:10.886] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:10.886] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:10.886] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:10.886] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:10.886] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.886] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.887] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.887] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.887] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:10.887] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.029] <TB0> INFO: Test took 1142ms.
[13:40:12.030] <TB0> INFO: The DUT currently contains the following objects:
[13:40:12.030] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:12.030] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:12.030] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:12.030] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:12.030] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.030] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.030] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.030] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.030] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:12.031] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.174] <TB0> INFO: Test took 1143ms.
[13:40:13.175] <TB0> INFO: The DUT currently contains the following objects:
[13:40:13.175] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:13.175] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:13.175] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:13.175] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:13.175] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:13.175] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.304] <TB0> INFO: Test took 1129ms.
[13:40:14.305] <TB0> INFO: The DUT currently contains the following objects:
[13:40:14.305] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:14.305] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:14.305] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:14.305] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:14.305] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:14.305] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.433] <TB0> INFO: Test took 1128ms.
[13:40:15.435] <TB0> INFO: The DUT currently contains the following objects:
[13:40:15.435] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:40:15.435] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:40:15.435] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:40:15.435] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:40:15.435] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:15.435] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:40:16.562] <TB0> INFO: Test took 1127ms.
[13:40:16.565] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:45:17.701] <TB0> INFO: Test took 301137ms.
[13:45:19.395] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:32.016] <TB0> INFO: Test took 312621ms.
[13:50:33.589] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.596] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.603] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.609] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.616] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.623] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.629] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.636] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[13:50:33.642] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[13:50:33.649] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[13:50:33.659] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.669] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.679] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.689] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.697] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.704] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.713] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.720] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.731] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[13:50:33.753] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:50:33.753] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:50:33.753] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:50:33.753] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:50:33.754] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:50:33.755] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:50:33.755] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:50:37.627] <TB0> INFO: Test took 3871ms.
[13:50:42.231] <TB0> INFO: Test took 4343ms.
[13:50:46.520] <TB0> INFO: Test took 3982ms.
[13:50:46.791] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:47.749] <TB0> INFO: Test took 958ms.
[13:50:47.751] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:48.881] <TB0> INFO: Test took 1130ms.
[13:50:48.883] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:50.012] <TB0> INFO: Test took 1129ms.
[13:50:50.015] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:51.141] <TB0> INFO: Test took 1126ms.
[13:50:51.142] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:52.256] <TB0> INFO: Test took 1114ms.
[13:50:52.258] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:53.371] <TB0> INFO: Test took 1113ms.
[13:50:53.373] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:54.502] <TB0> INFO: Test took 1129ms.
[13:50:54.504] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:55.633] <TB0> INFO: Test took 1129ms.
[13:50:55.635] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:56.764] <TB0> INFO: Test took 1129ms.
[13:50:56.767] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:57.911] <TB0> INFO: Test took 1144ms.
[13:50:57.913] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:50:59.028] <TB0> INFO: Test took 1115ms.
[13:50:59.030] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:00.159] <TB0> INFO: Test took 1129ms.
[13:51:00.162] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:01.275] <TB0> INFO: Test took 1113ms.
[13:51:01.278] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:02.406] <TB0> INFO: Test took 1129ms.
[13:51:02.409] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:03.519] <TB0> INFO: Test took 1111ms.
[13:51:03.521] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:04.667] <TB0> INFO: Test took 1146ms.
[13:51:04.669] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:05.800] <TB0> INFO: Test took 1131ms.
[13:51:05.802] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:06.979] <TB0> INFO: Test took 1177ms.
[13:51:06.981] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:08.125] <TB0> INFO: Test took 1144ms.
[13:51:08.128] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:09.271] <TB0> INFO: Test took 1144ms.
[13:51:09.274] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:10.447] <TB0> INFO: Test took 1173ms.
[13:51:10.449] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:11.562] <TB0> INFO: Test took 1113ms.
[13:51:11.565] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:12.693] <TB0> INFO: Test took 1129ms.
[13:51:12.696] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:13.808] <TB0> INFO: Test took 1112ms.
[13:51:13.811] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:14.939] <TB0> INFO: Test took 1128ms.
[13:51:14.942] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:16.132] <TB0> INFO: Test took 1190ms.
[13:51:16.135] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:17.264] <TB0> INFO: Test took 1129ms.
[13:51:17.266] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:18.411] <TB0> INFO: Test took 1145ms.
[13:51:18.414] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:19.558] <TB0> INFO: Test took 1144ms.
[13:51:19.560] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:20.672] <TB0> INFO: Test took 1112ms.
[13:51:20.674] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:21.788] <TB0> INFO: Test took 1114ms.
[13:51:21.790] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:22.904] <TB0> INFO: Test took 1114ms.
[13:51:23.433] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 697 seconds
[13:51:23.433] <TB0> INFO: PH scale (per ROC): 89 76 80 78 80 76 80 85 89 80 87 79 91 81 94 95
[13:51:23.433] <TB0> INFO: PH offset (per ROC): 158 161 160 161 151 159 159 162 156 170 165 160 147 157 143 147
[13:51:23.601] <TB0> INFO: ######################################################################
[13:51:23.601] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:51:23.601] <TB0> INFO: ######################################################################
[13:51:23.609] <TB0> INFO: scanning low vcal = 10
[13:51:27.723] <TB0> INFO: Test took 4114ms.
[13:51:27.727] <TB0> INFO: scanning low vcal = 20
[13:51:31.896] <TB0> INFO: Test took 4169ms.
[13:51:31.900] <TB0> INFO: scanning low vcal = 30
[13:51:36.017] <TB0> INFO: Test took 4117ms.
[13:51:36.028] <TB0> INFO: scanning low vcal = 40
[13:51:41.036] <TB0> INFO: Test took 5008ms.
[13:51:41.097] <TB0> INFO: scanning low vcal = 50
[13:51:45.995] <TB0> INFO: Test took 4898ms.
[13:51:46.056] <TB0> INFO: scanning low vcal = 60
[13:51:50.850] <TB0> INFO: Test took 4794ms.
[13:51:50.906] <TB0> INFO: scanning low vcal = 70
[13:51:55.789] <TB0> INFO: Test took 4883ms.
[13:51:55.848] <TB0> INFO: scanning low vcal = 80
[13:52:00.777] <TB0> INFO: Test took 4929ms.
[13:52:00.837] <TB0> INFO: scanning low vcal = 90
[13:52:05.707] <TB0> INFO: Test took 4870ms.
[13:52:05.767] <TB0> INFO: scanning low vcal = 100
[13:52:10.904] <TB0> INFO: Test took 5137ms.
[13:52:10.994] <TB0> INFO: scanning low vcal = 110
[13:52:15.970] <TB0> INFO: Test took 4976ms.
[13:52:16.029] <TB0> INFO: scanning low vcal = 120
[13:52:21.259] <TB0> INFO: Test took 5230ms.
[13:52:21.338] <TB0> INFO: scanning low vcal = 130
[13:52:25.867] <TB0> INFO: Test took 4529ms.
[13:52:25.920] <TB0> INFO: scanning low vcal = 140
[13:52:30.526] <TB0> INFO: Test took 4606ms.
[13:52:30.584] <TB0> INFO: scanning low vcal = 150
[13:52:35.143] <TB0> INFO: Test took 4559ms.
[13:52:35.199] <TB0> INFO: scanning low vcal = 160
[13:52:39.900] <TB0> INFO: Test took 4701ms.
[13:52:39.998] <TB0> INFO: scanning low vcal = 170
[13:52:44.801] <TB0> INFO: Test took 4803ms.
[13:52:44.857] <TB0> INFO: scanning low vcal = 180
[13:52:49.500] <TB0> INFO: Test took 4643ms.
[13:52:49.559] <TB0> INFO: scanning low vcal = 190
[13:52:54.379] <TB0> INFO: Test took 4820ms.
[13:52:54.435] <TB0> INFO: scanning low vcal = 200
[13:52:59.150] <TB0> INFO: Test took 4715ms.
[13:52:59.205] <TB0> INFO: scanning low vcal = 210
[13:53:03.725] <TB0> INFO: Test took 4520ms.
[13:53:03.780] <TB0> INFO: scanning low vcal = 220
[13:53:08.421] <TB0> INFO: Test took 4641ms.
[13:53:08.489] <TB0> INFO: scanning low vcal = 230
[13:53:13.205] <TB0> INFO: Test took 4716ms.
[13:53:13.265] <TB0> INFO: scanning low vcal = 240
[13:53:18.087] <TB0> INFO: Test took 4822ms.
[13:53:18.163] <TB0> INFO: scanning low vcal = 250
[13:53:22.724] <TB0> INFO: Test took 4561ms.
[13:53:22.796] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[13:53:27.517] <TB0> INFO: Test took 4721ms.
[13:53:27.580] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[13:53:32.186] <TB0> INFO: Test took 4606ms.
[13:53:32.241] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[13:53:36.894] <TB0> INFO: Test took 4653ms.
[13:53:36.976] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[13:53:41.498] <TB0> INFO: Test took 4522ms.
[13:53:41.581] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:53:46.141] <TB0> INFO: Test took 4560ms.
[13:53:46.779] <TB0> INFO: PixTestGainPedestal::measure() done
[13:54:17.888] <TB0> INFO: PixTestGainPedestal::fit() done
[13:54:17.888] <TB0> INFO: non-linearity mean: 0.959 0.958 0.954 0.957 0.956 0.951 0.964 0.956 0.946 0.960 0.954 0.962 0.952 0.956 0.962 0.959
[13:54:17.888] <TB0> INFO: non-linearity RMS: 0.006 0.005 0.006 0.006 0.006 0.007 0.005 0.006 0.007 0.006 0.005 0.005 0.007 0.006 0.006 0.005
[13:54:17.888] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:54:17.907] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:54:17.927] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:54:17.946] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:54:17.965] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:54:17.984] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:54:18.003] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:54:18.022] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:54:18.041] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:54:18.060] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:54:18.079] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:54:18.098] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:54:18.116] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:54:18.136] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:54:18.155] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:54:18.174] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2056_FullQualification_2015-08-05_10h47m_1438764466//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:54:18.196] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 174 seconds
[13:54:18.202] <TB0> INFO: enter test to run
[13:54:18.203] <TB0> INFO: test: exit no parameter change
[13:54:18.759] <TB0> QUIET: Connection to board 126 closed.
[13:54:18.775] <TB0> INFO: pXar: this is the end, my friend