[12:20:36.223] <TB1> INFO: *** Welcome to pxar ***
[12:20:36.223] <TB1> INFO: *** Today: 2015/08/17
[12:20:36.223] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C15.dat
[12:20:36.224] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//tbmParameters_C0b.dat
[12:20:36.224] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//defaultMaskFile.dat
[12:20:36.224] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters_C15.dat
[12:20:36.307] <TB1> INFO: clk: 4
[12:20:36.307] <TB1> INFO: ctr: 4
[12:20:36.307] <TB1> INFO: sda: 19
[12:20:36.307] <TB1> INFO: tin: 9
[12:20:36.307] <TB1> INFO: level: 15
[12:20:36.307] <TB1> INFO: triggerdelay: 0
[12:20:36.307] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[12:20:36.307] <TB1> INFO: Log level: INFO
[12:20:36.314] <TB1> INFO: Found DTB DTB_WXBYFL
[12:20:36.328] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[12:20:36.331] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[12:20:36.334] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[12:20:37.856] <TB1> INFO: DUT info:
[12:20:37.857] <TB1> INFO: The DUT currently contains the following objects:
[12:20:37.857] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:20:37.857] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:20:37.857] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:20:37.857] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:20:37.857] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:37.857] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:38.258] <TB1> INFO: enter 'restricted' command line mode
[12:20:38.258] <TB1> INFO: enter test to run
[12:20:38.258] <TB1> INFO: test: pretest no parameter change
[12:20:38.258] <TB1> INFO: running: pretest
[12:20:38.264] <TB1> INFO: ######################################################################
[12:20:38.264] <TB1> INFO: PixTestPretest::doTest()
[12:20:38.264] <TB1> INFO: ######################################################################
[12:20:38.265] <TB1> INFO: ----------------------------------------------------------------------
[12:20:38.265] <TB1> INFO: PixTestPretest::programROC()
[12:20:38.265] <TB1> INFO: ----------------------------------------------------------------------
[12:20:56.286] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:20:56.286] <TB1> INFO: IA differences per ROC: 16.9 16.9 16.9 18.5 20.1 16.1 17.7 17.7 16.9 19.3 20.1 16.1 19.3 16.9 16.9 20.9
[12:20:56.371] <TB1> INFO: ----------------------------------------------------------------------
[12:20:56.371] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:20:56.371] <TB1> INFO: ----------------------------------------------------------------------
[12:21:15.961] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[12:21:15.965] <TB1> INFO: ----------------------------------------------------------------------
[12:21:15.965] <TB1> INFO: PixTestPretest::findWorkingPixel()
[12:21:15.965] <TB1> INFO: ----------------------------------------------------------------------



















































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































[12:22:44.896] <TB1> INFO: Test took 88928ms.
[12:22:45.156] <TB1> INFO: fwp_c12_r22_C8 does not pass: vthrComp = -51 Delta(CalDel) = 0, trying another
[12:22:53.523] <TB1> INFO: Test took 8360ms.
[12:22:53.831] <TB1> INFO: Found working pixel in all ROCs: col/row = 5/5
[12:22:53.882] <TB1> INFO: ----------------------------------------------------------------------
[12:22:53.882] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[12:22:53.882] <TB1> INFO: ----------------------------------------------------------------------
[12:23:02.336] <TB1> INFO: Test took 8447ms.
[12:23:02.668] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[12:23:02.668] <TB1> INFO: CalDel: 140 143 142 138 139 158 123 132 142 143 142 145 143 148 158 145
[12:23:02.668] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:23:02.672] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C0.dat
[12:23:02.672] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C1.dat
[12:23:02.672] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C2.dat
[12:23:02.672] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C3.dat
[12:23:02.673] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C4.dat
[12:23:02.673] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C5.dat
[12:23:02.673] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C6.dat
[12:23:02.674] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C7.dat
[12:23:02.674] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C8.dat
[12:23:02.674] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C9.dat
[12:23:02.674] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C10.dat
[12:23:02.675] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C11.dat
[12:23:02.675] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C12.dat
[12:23:02.675] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C13.dat
[12:23:02.676] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C14.dat
[12:23:02.676] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C15.dat
[12:23:02.676] <TB1> INFO: PixTestPretest::doTest() done, duration: 144 seconds
[12:23:02.781] <TB1> INFO: enter test to run
[12:23:02.782] <TB1> INFO: test: fulltest no parameter change
[12:23:02.782] <TB1> INFO: running: fulltest
[12:23:02.782] <TB1> INFO: ######################################################################
[12:23:02.782] <TB1> INFO: PixTestFullTest::doTest()
[12:23:02.782] <TB1> INFO: ######################################################################
[12:23:02.783] <TB1> INFO: ######################################################################
[12:23:02.783] <TB1> INFO: PixTestAlive::doTest()
[12:23:02.783] <TB1> INFO: ######################################################################
[12:23:02.785] <TB1> INFO: ----------------------------------------------------------------------
[12:23:02.785] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:23:02.785] <TB1> INFO: ----------------------------------------------------------------------
[12:23:06.242] <TB1> INFO: Test took 3455ms.
[12:23:06.267] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:06.510] <TB1> INFO: PixTestAlive::aliveTest() done
[12:23:06.510] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0
[12:23:06.512] <TB1> INFO: ----------------------------------------------------------------------
[12:23:06.512] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:23:06.512] <TB1> INFO: ----------------------------------------------------------------------
[12:23:09.255] <TB1> INFO: Test took 2741ms.
[12:23:09.259] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:09.260] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:23:09.503] <TB1> INFO: PixTestAlive::maskTest() done
[12:23:09.503] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:23:09.505] <TB1> INFO: ----------------------------------------------------------------------
[12:23:09.505] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:23:09.505] <TB1> INFO: ----------------------------------------------------------------------
[12:23:12.931] <TB1> INFO: Test took 3424ms.
[12:23:12.959] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:13.201] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[12:23:13.201] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:23:13.201] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[12:23:13.211] <TB1> INFO: ######################################################################
[12:23:13.211] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:23:13.211] <TB1> INFO: ######################################################################
[12:23:13.215] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:23:13.231] <TB1> INFO: dacScan step from 0 .. 29
[12:23:34.712] <TB1> INFO: Test took 21481ms.
[12:23:34.746] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:34.746] <TB1> INFO: dacScan step from 30 .. 59
[12:23:55.941] <TB1> INFO: Test took 21195ms.
[12:23:56.014] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:56.022] <TB1> INFO: dacScan step from 60 .. 89
[12:24:22.838] <TB1> INFO: Test took 26816ms.
[12:24:23.102] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:23.174] <TB1> INFO: dacScan step from 90 .. 119
[12:24:52.305] <TB1> INFO: Test took 29131ms.
[12:24:52.551] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:52.618] <TB1> INFO: dacScan step from 120 .. 149
[12:25:18.491] <TB1> INFO: Test took 25873ms.
[12:25:18.679] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:42.336] <TB1> INFO: PixTestBBMap::doTest() done, duration: 149 seconds
[12:25:42.336] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:25:42.336] <TB1> INFO: separation cut (per ROC): 86 98 86 96 88 83 96 99 82 92 90 95 87 98 88 89
[12:25:42.412] <TB1> INFO: ######################################################################
[12:25:42.412] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[12:25:42.412] <TB1> INFO: ######################################################################
[12:25:42.412] <TB1> INFO: ----------------------------------------------------------------------
[12:25:42.412] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:25:42.412] <TB1> INFO: ----------------------------------------------------------------------
[12:25:42.412] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:25:42.421] <TB1> INFO: dacScan step from 0 .. 3
[12:26:01.390] <TB1> INFO: Test took 18969ms.
[12:26:01.425] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:01.425] <TB1> INFO: dacScan step from 4 .. 7
[12:26:20.417] <TB1> INFO: Test took 18992ms.
[12:26:20.447] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:20.447] <TB1> INFO: dacScan step from 8 .. 11
[12:26:39.580] <TB1> INFO: Test took 19132ms.
[12:26:39.609] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:39.609] <TB1> INFO: dacScan step from 12 .. 15
[12:26:58.671] <TB1> INFO: Test took 19062ms.
[12:26:58.703] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:58.704] <TB1> INFO: dacScan step from 16 .. 19
[12:27:17.738] <TB1> INFO: Test took 19034ms.
[12:27:17.768] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:17.768] <TB1> INFO: dacScan step from 20 .. 23
[12:27:36.820] <TB1> INFO: Test took 19052ms.
[12:27:36.848] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:36.848] <TB1> INFO: dacScan step from 24 .. 27
[12:27:55.882] <TB1> INFO: Test took 19034ms.
[12:27:55.914] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:55.915] <TB1> INFO: dacScan step from 28 .. 31
[12:28:14.891] <TB1> INFO: Test took 18976ms.
[12:28:14.919] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:14.919] <TB1> INFO: dacScan step from 32 .. 35
[12:28:33.914] <TB1> INFO: Test took 18995ms.
[12:28:33.943] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:33.943] <TB1> INFO: dacScan step from 36 .. 39
[12:28:52.959] <TB1> INFO: Test took 19015ms.
[12:28:52.987] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:52.987] <TB1> INFO: dacScan step from 40 .. 43
[12:29:11.960] <TB1> INFO: Test took 18973ms.
[12:29:11.992] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:11.992] <TB1> INFO: dacScan step from 44 .. 47
[12:29:30.905] <TB1> INFO: Test took 18913ms.
[12:29:30.939] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:30.939] <TB1> INFO: dacScan step from 48 .. 51
[12:29:50.005] <TB1> INFO: Test took 19066ms.
[12:29:50.034] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:50.034] <TB1> INFO: dacScan step from 52 .. 55
[12:30:09.100] <TB1> INFO: Test took 19066ms.
[12:30:09.131] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:09.131] <TB1> INFO: dacScan step from 56 .. 59
[12:30:28.195] <TB1> INFO: Test took 19063ms.
[12:30:28.229] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:28.229] <TB1> INFO: dacScan step from 60 .. 63
[12:30:47.304] <TB1> INFO: Test took 19075ms.
[12:30:47.330] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:47.330] <TB1> INFO: dacScan step from 64 .. 67
[12:31:06.371] <TB1> INFO: Test took 19041ms.
[12:31:06.399] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:06.399] <TB1> INFO: dacScan step from 68 .. 71
[12:31:25.551] <TB1> INFO: Test took 19152ms.
[12:31:25.582] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:25.582] <TB1> INFO: dacScan step from 72 .. 75
[12:31:44.874] <TB1> INFO: Test took 19292ms.
[12:31:44.911] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:44.911] <TB1> INFO: dacScan step from 76 .. 79
[12:32:04.556] <TB1> INFO: Test took 19645ms.
[12:32:04.603] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:04.605] <TB1> INFO: dacScan step from 80 .. 83
[12:32:25.588] <TB1> INFO: Test took 20983ms.
[12:32:25.668] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:25.671] <TB1> INFO: dacScan step from 84 .. 87
[12:32:48.057] <TB1> INFO: Test took 22386ms.
[12:32:48.168] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:48.173] <TB1> INFO: dacScan step from 88 .. 91
[12:33:12.057] <TB1> INFO: Test took 23884ms.
[12:33:12.191] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:12.200] <TB1> INFO: dacScan step from 92 .. 95
[12:33:38.202] <TB1> INFO: Test took 26002ms.
[12:33:38.384] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:38.394] <TB1> INFO: dacScan step from 96 .. 99
[12:34:06.086] <TB1> INFO: Test took 27692ms.
[12:34:06.299] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:06.310] <TB1> INFO: dacScan step from 100 .. 103


[12:34:35.135] <TB1> INFO: Test took 28825ms.
[12:34:35.372] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:35.383] <TB1> INFO: dacScan step from 104 .. 107


[12:35:04.696] <TB1> INFO: Test took 29311ms.
[12:35:04.936] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:04.947] <TB1> INFO: dacScan step from 108 .. 111


[12:35:34.455] <TB1> INFO: Test took 29508ms.
[12:35:34.687] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:34.698] <TB1> INFO: dacScan step from 112 .. 115





[12:36:04.530] <TB1> INFO: Test took 29832ms.
[12:36:04.761] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:04.772] <TB1> INFO: dacScan step from 116 .. 119





[12:36:34.363] <TB1> INFO: Test took 29591ms.
[12:36:34.605] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:34.616] <TB1> INFO: dacScan step from 120 .. 123



[12:37:04.254] <TB1> INFO: Test took 29638ms.
[12:37:04.489] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:04.500] <TB1> INFO: dacScan step from 124 .. 127


[12:37:34.209] <TB1> INFO: Test took 29709ms.
[12:37:34.488] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:34.501] <TB1> INFO: dacScan step from 128 .. 131
[12:38:04.150] <TB1> INFO: Test took 29649ms.
[12:38:04.386] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:04.397] <TB1> INFO: dacScan step from 132 .. 135
[12:38:34.135] <TB1> INFO: Test took 29738ms.
[12:38:34.379] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:34.391] <TB1> INFO: dacScan step from 136 .. 139
[12:39:02.265] <TB1> INFO: Test took 27874ms.
[12:39:02.578] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:02.590] <TB1> INFO: dacScan step from 140 .. 143
[12:39:30.576] <TB1> INFO: Test took 27986ms.
[12:39:30.956] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:30.974] <TB1> INFO: dacScan step from 144 .. 147
[12:39:58.663] <TB1> INFO: Test took 27689ms.
[12:39:58.897] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:58.910] <TB1> INFO: dacScan step from 148 .. 149
[12:40:13.427] <TB1> INFO: Test took 14517ms.
[12:40:13.537] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:13.544] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:15.094] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:16.645] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:18.169] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:19.517] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:21.228] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:22.914] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:24.542] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:26.045] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:27.580] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:29.160] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:30.777] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:32.229] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:33.724] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:35.254] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:36.688] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:40:38.172] <TB1> INFO: PixTestScurves::scurves() done
[12:40:38.172] <TB1> INFO: Vcal mean: 90.47 101.16 85.43 99.59 86.74 85.95 98.91 104.42 94.04 95.68 94.11 100.49 82.56 95.98 85.57 91.81
[12:40:38.173] <TB1> INFO: Vcal RMS: 4.98 5.62 4.90 5.64 5.54 5.58 6.20 6.78 5.11 5.11 5.67 6.15 4.94 6.05 5.09 4.88
[12:40:38.173] <TB1> INFO: PixTestScurves::fullTest() done, duration: 895 seconds
[12:40:38.251] <TB1> INFO: ######################################################################
[12:40:38.251] <TB1> INFO: PixTestTrim::doTest()
[12:40:38.251] <TB1> INFO: ######################################################################
[12:40:38.253] <TB1> INFO: ----------------------------------------------------------------------
[12:40:38.253] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:40:38.253] <TB1> INFO: ----------------------------------------------------------------------
[12:40:38.340] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:40:38.340] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:40:38.348] <TB1> INFO: dacScan step from 0 .. 19
[12:40:53.432] <TB1> INFO: Test took 15084ms.
[12:40:53.459] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:53.459] <TB1> INFO: dacScan step from 20 .. 39
[12:41:08.467] <TB1> INFO: Test took 15008ms.
[12:41:08.495] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:08.495] <TB1> INFO: dacScan step from 40 .. 59
[12:41:23.646] <TB1> INFO: Test took 15151ms.
[12:41:23.668] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:23.668] <TB1> INFO: dacScan step from 60 .. 79
[12:41:38.056] <TB1> INFO: Test took 14388ms.
[12:41:38.076] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:38.077] <TB1> INFO: dacScan step from 80 .. 99
[12:41:53.799] <TB1> INFO: Test took 15722ms.
[12:41:53.851] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:53.856] <TB1> INFO: dacScan step from 100 .. 119
[12:42:11.487] <TB1> INFO: Test took 17630ms.
[12:42:11.644] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:11.678] <TB1> INFO: dacScan step from 120 .. 139
[12:42:29.393] <TB1> INFO: Test took 17714ms.
[12:42:29.559] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:29.592] <TB1> INFO: dacScan step from 140 .. 159
[12:42:44.721] <TB1> INFO: Test took 15128ms.
[12:42:44.788] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:07.394] <TB1> INFO: ROC 0 VthrComp = 95
[12:43:07.394] <TB1> INFO: ROC 1 VthrComp = 102
[12:43:07.395] <TB1> INFO: ROC 2 VthrComp = 87
[12:43:07.395] <TB1> INFO: ROC 3 VthrComp = 100
[12:43:07.395] <TB1> INFO: ROC 4 VthrComp = 90
[12:43:07.395] <TB1> INFO: ROC 5 VthrComp = 86
[12:43:07.395] <TB1> INFO: ROC 6 VthrComp = 97
[12:43:07.395] <TB1> INFO: ROC 7 VthrComp = 99
[12:43:07.395] <TB1> INFO: ROC 8 VthrComp = 92
[12:43:07.396] <TB1> INFO: ROC 9 VthrComp = 99
[12:43:07.396] <TB1> INFO: ROC 10 VthrComp = 93
[12:43:07.396] <TB1> INFO: ROC 11 VthrComp = 95
[12:43:07.396] <TB1> INFO: ROC 12 VthrComp = 85
[12:43:07.396] <TB1> INFO: ROC 13 VthrComp = 95
[12:43:07.396] <TB1> INFO: ROC 14 VthrComp = 84
[12:43:07.396] <TB1> INFO: ROC 15 VthrComp = 96
[12:43:07.397] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:43:07.397] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:43:07.406] <TB1> INFO: dacScan step from 0 .. 19
[12:43:22.604] <TB1> INFO: Test took 15198ms.
[12:43:22.632] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:22.632] <TB1> INFO: dacScan step from 20 .. 39
[12:43:37.911] <TB1> INFO: Test took 15279ms.
[12:43:37.944] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:37.947] <TB1> INFO: dacScan step from 40 .. 59
[12:43:56.862] <TB1> INFO: Test took 18915ms.
[12:43:57.017] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:57.051] <TB1> INFO: dacScan step from 60 .. 79
[12:44:17.172] <TB1> INFO: Test took 20121ms.
[12:44:17.434] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:17.501] <TB1> INFO: dacScan step from 80 .. 99
[12:44:36.314] <TB1> INFO: Test took 18813ms.
[12:44:36.495] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:36.553] <TB1> INFO: dacScan step from 100 .. 119
[12:44:56.945] <TB1> INFO: Test took 20392ms.
[12:44:57.108] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:57.155] <TB1> INFO: dacScan step from 120 .. 139
[12:45:16.020] <TB1> INFO: Test took 18865ms.
[12:45:16.200] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:16.253] <TB1> INFO: dacScan step from 140 .. 159
[12:45:35.141] <TB1> INFO: Test took 18888ms.
[12:45:35.317] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:00.880] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 56.5728 for pixel 11/3 mean/min/max = 44.7396/32.738/56.7411
[12:46:00.880] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.1745 for pixel 17/65 mean/min/max = 45.698/32.2023/59.1936
[12:46:00.880] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.4223 for pixel 0/0 mean/min/max = 44.9197/32.1877/57.6517
[12:46:00.881] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 60.0541 for pixel 3/79 mean/min/max = 46.166/31.9616/60.3705
[12:46:00.881] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 60.138 for pixel 3/78 mean/min/max = 46.4029/32.6359/60.1699
[12:46:00.881] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 59.3873 for pixel 12/0 mean/min/max = 45.6629/31.7305/59.5953
[12:46:00.881] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 62.381 for pixel 10/69 mean/min/max = 47.1379/31.7706/62.5053
[12:46:00.882] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 64.5405 for pixel 5/2 mean/min/max = 48.3008/31.9344/64.6671
[12:46:00.882] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 58.5214 for pixel 10/63 mean/min/max = 45.695/32.8372/58.5527
[12:46:00.882] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 57.4281 for pixel 51/27 mean/min/max = 44.8964/32.3279/57.4648
[12:46:00.882] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 62.0652 for pixel 7/74 mean/min/max = 47.2216/32.2799/62.1633
[12:46:00.883] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 63.7794 for pixel 0/56 mean/min/max = 48.5499/33.1076/63.9922
[12:46:00.883] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 57.5832 for pixel 23/78 mean/min/max = 44.7265/31.6366/57.8164
[12:46:00.883] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 60.0799 for pixel 20/79 mean/min/max = 46.6054/33.0993/60.1115
[12:46:00.883] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.6298 for pixel 17/79 mean/min/max = 45.4285/32.1825/58.6745
[12:46:00.884] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 56.3632 for pixel 0/3 mean/min/max = 44.3386/32.1568/56.5204
[12:46:00.884] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:47:37.055] <TB1> INFO: Test took 96171ms.
[12:47:38.389] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:47:38.398] <TB1> INFO: dacScan step from 0 .. 19
[12:48:01.463] <TB1> INFO: Test took 23064ms.
[12:48:01.521] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:01.524] <TB1> INFO: dacScan step from 20 .. 39
[12:48:28.377] <TB1> INFO: Test took 26853ms.
[12:48:28.626] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:28.674] <TB1> INFO: dacScan step from 40 .. 59


[12:48:59.508] <TB1> INFO: Test took 30833ms.
[12:48:59.801] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:59.860] <TB1> INFO: dacScan step from 60 .. 79





[12:49:30.544] <TB1> INFO: Test took 30684ms.
[12:49:30.970] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:31.024] <TB1> INFO: dacScan step from 80 .. 99

[12:50:04.361] <TB1> INFO: Test took 33337ms.
[12:50:04.645] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:04.695] <TB1> INFO: dacScan step from 100 .. 119


[12:50:37.891] <TB1> INFO: Test took 33196ms.
[12:50:38.176] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:38.223] <TB1> INFO: dacScan step from 120 .. 139


[12:51:11.611] <TB1> INFO: Test took 33388ms.
[12:51:11.886] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:11.938] <TB1> INFO: dacScan step from 140 .. 159


[12:51:43.935] <TB1> INFO: Test took 31996ms.
[12:51:44.236] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:44.288] <TB1> INFO: dacScan step from 160 .. 179





[12:52:16.847] <TB1> INFO: Test took 32559ms.
[12:52:17.143] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:17.184] <TB1> INFO: dacScan step from 180 .. 199


[12:52:51.016] <TB1> INFO: Test took 33831ms.
[12:52:51.294] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:16.842] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.016401 .. 255.000000
[12:53:16.920] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:53:16.929] <TB1> INFO: dacScan step from 0 .. 19
[12:53:29.927] <TB1> INFO: Test took 12998ms.
[12:53:29.947] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:29.947] <TB1> INFO: dacScan step from 20 .. 39
[12:53:44.848] <TB1> INFO: Test took 14900ms.
[12:53:44.945] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:44.960] <TB1> INFO: dacScan step from 40 .. 59
[12:54:02.561] <TB1> INFO: Test took 17600ms.
[12:54:02.745] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:02.792] <TB1> INFO: dacScan step from 60 .. 79
[12:54:20.479] <TB1> INFO: Test took 17687ms.
[12:54:20.622] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:20.664] <TB1> INFO: dacScan step from 80 .. 99
[12:54:38.400] <TB1> INFO: Test took 17736ms.
[12:54:38.553] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:38.596] <TB1> INFO: dacScan step from 100 .. 119
[12:54:56.266] <TB1> INFO: Test took 17670ms.
[12:54:56.416] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:56.455] <TB1> INFO: dacScan step from 120 .. 139
[12:55:14.047] <TB1> INFO: Test took 17591ms.
[12:55:14.221] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:14.261] <TB1> INFO: dacScan step from 140 .. 159
[12:55:31.965] <TB1> INFO: Test took 17704ms.
[12:55:32.115] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:32.160] <TB1> INFO: dacScan step from 160 .. 179
[12:55:49.985] <TB1> INFO: Test took 17825ms.
[12:55:50.141] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:50.181] <TB1> INFO: dacScan step from 180 .. 199
[12:56:07.588] <TB1> INFO: Test took 17407ms.
[12:56:07.728] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:07.774] <TB1> INFO: dacScan step from 200 .. 219
[12:56:24.274] <TB1> INFO: Test took 16500ms.
[12:56:24.416] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:24.465] <TB1> INFO: dacScan step from 220 .. 239
[12:56:42.205] <TB1> INFO: Test took 17739ms.
[12:56:42.354] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:42.393] <TB1> INFO: dacScan step from 240 .. 255
[12:56:57.160] <TB1> INFO: Test took 14767ms.
[12:56:57.300] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:30.558] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 11.525254 .. 47.100178
[12:57:30.649] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 1 .. 57 (20) hits flags = 16 (plus default)
[12:57:30.658] <TB1> INFO: dacScan step from 1 .. 20
[12:57:43.720] <TB1> INFO: Test took 13062ms.
[12:57:43.739] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:43.739] <TB1> INFO: dacScan step from 21 .. 40
[12:57:58.035] <TB1> INFO: Test took 14296ms.
[12:57:58.124] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:58.143] <TB1> INFO: dacScan step from 41 .. 57
[12:58:12.882] <TB1> INFO: Test took 14739ms.
[12:58:13.006] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:29.334] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 9.439979 .. 47.100178
[12:58:29.409] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 9 .. 57 (20) hits flags = 16 (plus default)
[12:58:29.417] <TB1> INFO: dacScan step from 9 .. 28
[12:58:42.411] <TB1> INFO: Test took 12994ms.
[12:58:42.434] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:42.434] <TB1> INFO: dacScan step from 29 .. 48
[12:58:58.471] <TB1> INFO: Test took 16037ms.
[12:58:58.601] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:58.636] <TB1> INFO: dacScan step from 49 .. 57
[12:59:07.690] <TB1> INFO: Test took 9054ms.
[12:59:07.752] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:23.997] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 2.790106 .. 47.100178
[12:59:24.079] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 57 (20) hits flags = 16 (plus default)
[12:59:24.088] <TB1> INFO: dacScan step from 2 .. 21
[12:59:37.092] <TB1> INFO: Test took 13004ms.
[12:59:37.112] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:37.112] <TB1> INFO: dacScan step from 22 .. 41
[12:59:52.264] <TB1> INFO: Test took 15151ms.
[12:59:52.351] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:52.371] <TB1> INFO: dacScan step from 42 .. 57
[13:00:06.370] <TB1> INFO: Test took 13998ms.
[13:00:06.488] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:22.167] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:00:22.167] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:00:22.175] <TB1> INFO: dacScan step from 15 .. 34
[13:00:45.051] <TB1> INFO: Test took 22875ms.
[13:00:45.120] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:45.129] <TB1> INFO: dacScan step from 35 .. 54


[13:01:17.778] <TB1> INFO: Test took 32649ms.
[13:01:18.226] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:18.276] <TB1> INFO: dacScan step from 55 .. 55
[13:01:22.498] <TB1> INFO: Test took 4222ms.
[13:01:22.514] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:35.820] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C0.dat
[13:01:35.820] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C1.dat
[13:01:35.821] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C2.dat
[13:01:35.821] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C3.dat
[13:01:35.821] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C4.dat
[13:01:35.821] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C5.dat
[13:01:35.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C6.dat
[13:01:35.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C7.dat
[13:01:35.822] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C8.dat
[13:01:35.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C9.dat
[13:01:35.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C10.dat
[13:01:35.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C11.dat
[13:01:35.823] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C12.dat
[13:01:35.824] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C13.dat
[13:01:35.824] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C14.dat
[13:01:35.824] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C15.dat
[13:01:35.825] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C0.dat
[13:01:35.833] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C1.dat
[13:01:35.842] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C2.dat
[13:01:35.851] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C3.dat
[13:01:35.859] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C4.dat
[13:01:35.868] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C5.dat
[13:01:35.876] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C6.dat
[13:01:35.885] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C7.dat
[13:01:35.894] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C8.dat
[13:01:35.903] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C9.dat
[13:01:35.911] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C10.dat
[13:01:35.920] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C11.dat
[13:01:35.928] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C12.dat
[13:01:35.937] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C13.dat
[13:01:35.946] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C14.dat
[13:01:35.954] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C15.dat
[13:01:35.963] <TB1> INFO: PixTestTrim::trimTest() done
[13:01:35.963] <TB1> INFO: vtrim: 100 121 102 113 190 105 128 146 98 91 123 118 100 104 102 111
[13:01:35.963] <TB1> INFO: vthrcomp: 95 102 87 100 90 86 97 99 92 99 93 95 85 95 84 96
[13:01:35.963] <TB1> INFO: vcal mean: 35.05 35.09 35.05 35.11 34.93 35.01 35.08 35.07 35.05 35.05 35.08 35.13 35.04 35.07 35.10 35.05
[13:01:35.963] <TB1> INFO: vcal RMS: 0.97 1.08 1.05 1.14 2.49 1.06 1.09 1.47 1.17 1.14 1.14 1.39 0.97 1.17 1.07 0.98
[13:01:35.963] <TB1> INFO: bits mean: 9.60 10.20 9.98 9.77 11.68 10.12 9.76 9.79 9.96 9.49 9.61 9.31 10.21 9.34 10.05 10.30
[13:01:35.963] <TB1> INFO: bits RMS: 2.65 2.35 2.56 2.59 1.59 2.47 2.50 2.40 2.37 2.77 2.51 2.49 2.50 2.57 2.46 2.41
[13:01:35.973] <TB1> INFO: ----------------------------------------------------------------------
[13:01:35.973] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:01:35.973] <TB1> INFO: ----------------------------------------------------------------------
[13:01:35.977] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:01:35.996] <TB1> INFO: dacScan step from 0 .. 19
[13:01:58.188] <TB1> INFO: Test took 22192ms.
[13:01:58.231] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:58.232] <TB1> INFO: dacScan step from 20 .. 39
[13:02:20.910] <TB1> INFO: Test took 22678ms.
[13:02:20.950] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:20.950] <TB1> INFO: dacScan step from 40 .. 59
[13:02:43.684] <TB1> INFO: Test took 22734ms.
[13:02:43.724] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:43.724] <TB1> INFO: dacScan step from 60 .. 79
[13:03:06.531] <TB1> INFO: Test took 22807ms.
[13:03:06.569] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:06.569] <TB1> INFO: dacScan step from 80 .. 99
[13:03:29.544] <TB1> INFO: Test took 22974ms.
[13:03:29.587] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:29.587] <TB1> INFO: dacScan step from 100 .. 119
[13:03:54.924] <TB1> INFO: Test took 25337ms.
[13:03:55.063] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:55.078] <TB1> INFO: dacScan step from 120 .. 139



[13:04:27.199] <TB1> INFO: Test took 32121ms.
[13:04:27.466] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:27.506] <TB1> INFO: dacScan step from 140 .. 159


[13:05:00.503] <TB1> INFO: Test took 32997ms.
[13:05:00.934] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:01.008] <TB1> INFO: dacScan step from 160 .. 179
[13:05:33.047] <TB1> INFO: Test took 32039ms.
[13:05:33.321] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:33.368] <TB1> INFO: dacScan step from 180 .. 199


[13:06:07.453] <TB1> INFO: Test took 34085ms.
[13:06:07.733] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:35.595] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 179 (20) hits flags = 16 (plus default)
[13:06:35.604] <TB1> INFO: dacScan step from 0 .. 19
[13:06:56.967] <TB1> INFO: Test took 21363ms.
[13:06:57.001] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:57.001] <TB1> INFO: dacScan step from 20 .. 39
[13:07:19.476] <TB1> INFO: Test took 22475ms.
[13:07:19.515] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:19.515] <TB1> INFO: dacScan step from 40 .. 59
[13:07:42.233] <TB1> INFO: Test took 22718ms.
[13:07:42.273] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:42.273] <TB1> INFO: dacScan step from 60 .. 79
[13:08:05.062] <TB1> INFO: Test took 22789ms.
[13:08:05.098] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:05.098] <TB1> INFO: dacScan step from 80 .. 99
[13:08:28.340] <TB1> INFO: Test took 23242ms.
[13:08:28.399] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:28.402] <TB1> INFO: dacScan step from 100 .. 119
[13:08:57.259] <TB1> INFO: Test took 28857ms.
[13:08:57.472] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:57.496] <TB1> INFO: dacScan step from 120 .. 139
[13:09:28.803] <TB1> INFO: Test took 31307ms.
[13:09:29.080] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:29.127] <TB1> INFO: dacScan step from 140 .. 159





[13:10:02.477] <TB1> INFO: Test took 33350ms.
[13:10:02.775] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:02.821] <TB1> INFO: dacScan step from 160 .. 179
[13:10:36.058] <TB1> INFO: Test took 33237ms.
[13:10:36.344] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:00.920] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[13:11:00.929] <TB1> INFO: dacScan step from 0 .. 19
[13:11:22.156] <TB1> INFO: Test took 21227ms.
[13:11:22.190] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:22.190] <TB1> INFO: dacScan step from 20 .. 39
[13:11:44.787] <TB1> INFO: Test took 22597ms.
[13:11:44.828] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:44.828] <TB1> INFO: dacScan step from 40 .. 59
[13:12:07.507] <TB1> INFO: Test took 22679ms.
[13:12:07.545] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:07.545] <TB1> INFO: dacScan step from 60 .. 79
[13:12:30.349] <TB1> INFO: Test took 22804ms.
[13:12:30.388] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:30.388] <TB1> INFO: dacScan step from 80 .. 99
[13:12:53.716] <TB1> INFO: Test took 23328ms.
[13:12:53.780] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:53.784] <TB1> INFO: dacScan step from 100 .. 119
[13:13:21.997] <TB1> INFO: Test took 28213ms.
[13:13:22.220] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:22.248] <TB1> INFO: dacScan step from 120 .. 139
[13:13:54.182] <TB1> INFO: Test took 31934ms.
[13:13:54.486] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:54.533] <TB1> INFO: dacScan step from 140 .. 159

[13:14:27.852] <TB1> INFO: Test took 33319ms.
[13:14:28.131] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:28.179] <TB1> INFO: dacScan step from 160 .. 165
[13:14:40.220] <TB1> INFO: Test took 12041ms.
[13:14:40.303] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:04.770] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 166 (20) hits flags = 16 (plus default)
[13:15:04.779] <TB1> INFO: dacScan step from 0 .. 19
[13:15:26.068] <TB1> INFO: Test took 21289ms.
[13:15:26.104] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:26.104] <TB1> INFO: dacScan step from 20 .. 39
[13:15:47.670] <TB1> INFO: Test took 21566ms.
[13:15:47.709] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:47.709] <TB1> INFO: dacScan step from 40 .. 59
[13:16:10.008] <TB1> INFO: Test took 22299ms.
[13:16:10.049] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:10.049] <TB1> INFO: dacScan step from 60 .. 79
[13:16:32.766] <TB1> INFO: Test took 22717ms.
[13:16:32.806] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:32.806] <TB1> INFO: dacScan step from 80 .. 99
[13:16:55.960] <TB1> INFO: Test took 23154ms.
[13:16:56.020] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:56.023] <TB1> INFO: dacScan step from 100 .. 119
[13:17:23.272] <TB1> INFO: Test took 27249ms.
[13:17:23.491] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:23.516] <TB1> INFO: dacScan step from 120 .. 139


[13:17:56.303] <TB1> INFO: Test took 32786ms.
[13:17:56.590] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:56.634] <TB1> INFO: dacScan step from 140 .. 159


[13:18:26.997] <TB1> INFO: Test took 30362ms.
[13:18:27.278] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:27.333] <TB1> INFO: dacScan step from 160 .. 166
[13:18:39.766] <TB1> INFO: Test took 12432ms.
[13:18:39.889] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:03.813] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 167 (20) hits flags = 16 (plus default)
[13:19:03.822] <TB1> INFO: dacScan step from 0 .. 19
[13:19:25.404] <TB1> INFO: Test took 21582ms.
[13:19:25.456] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:25.456] <TB1> INFO: dacScan step from 20 .. 39
[13:19:47.887] <TB1> INFO: Test took 22431ms.
[13:19:47.926] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:47.926] <TB1> INFO: dacScan step from 40 .. 59
[13:20:09.532] <TB1> INFO: Test took 21606ms.
[13:20:09.581] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:09.581] <TB1> INFO: dacScan step from 60 .. 79
[13:20:32.327] <TB1> INFO: Test took 22746ms.
[13:20:32.369] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:32.370] <TB1> INFO: dacScan step from 80 .. 99
[13:20:55.556] <TB1> INFO: Test took 23186ms.
[13:20:55.618] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:55.621] <TB1> INFO: dacScan step from 100 .. 119
[13:21:22.438] <TB1> INFO: Test took 26817ms.
[13:21:22.666] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:22.693] <TB1> INFO: dacScan step from 120 .. 139









[13:21:55.736] <TB1> INFO: Test took 33043ms.
[13:21:56.020] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:56.060] <TB1> INFO: dacScan step from 140 .. 159


[13:22:29.426] <TB1> INFO: Test took 33366ms.
[13:22:29.701] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:29.748] <TB1> INFO: dacScan step from 160 .. 167
[13:22:44.706] <TB1> INFO: Test took 14958ms.
[13:22:44.883] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:08.226] <TB1> INFO: PixTestTrim::trimBitTest() done
[13:23:08.228] <TB1> INFO: PixTestTrim::doTest() done, duration: 2549 seconds
[13:23:08.898] <TB1> INFO: ######################################################################
[13:23:08.898] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:23:08.898] <TB1> INFO: ######################################################################
[13:23:12.323] <TB1> INFO: Test took 3423ms.
[13:23:12.343] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:15.988] <TB1> INFO: Test took 3445ms.
[13:23:16.060] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:19.531] <TB1> INFO: Test took 3458ms.
[13:23:19.603] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:19.611] <TB1> INFO: The DUT currently contains the following objects:
[13:23:19.611] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:19.611] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:19.611] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:19.611] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:19.611] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.611] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.722] <TB1> INFO: Test took 1111ms.
[13:23:20.723] <TB1> INFO: The DUT currently contains the following objects:
[13:23:20.723] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:20.723] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:20.723] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:20.723] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:20.723] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.723] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.723] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.723] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.723] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.724] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.833] <TB1> INFO: Test took 1109ms.
[13:23:21.834] <TB1> INFO: The DUT currently contains the following objects:
[13:23:21.834] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:21.834] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:21.834] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:21.834] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:21.834] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.834] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.834] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.834] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.835] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.946] <TB1> INFO: Test took 1111ms.
[13:23:22.948] <TB1> INFO: The DUT currently contains the following objects:
[13:23:22.948] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:22.948] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:22.948] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:22.948] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:22.948] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.948] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.949] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.058] <TB1> INFO: Test took 1109ms.
[13:23:24.061] <TB1> INFO: The DUT currently contains the following objects:
[13:23:24.061] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:24.061] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:24.061] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:24.061] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:24.061] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.061] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.062] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.062] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.062] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.171] <TB1> INFO: Test took 1109ms.
[13:23:25.172] <TB1> INFO: The DUT currently contains the following objects:
[13:23:25.172] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:25.172] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:25.172] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:25.172] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:25.172] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.172] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.172] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.172] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.172] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.172] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.172] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:25.173] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.284] <TB1> INFO: Test took 1111ms.
[13:23:26.285] <TB1> INFO: The DUT currently contains the following objects:
[13:23:26.285] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:26.285] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:26.285] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:26.285] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:26.285] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.286] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.286] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.286] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.286] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.286] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.287] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.395] <TB1> INFO: Test took 1108ms.
[13:23:27.396] <TB1> INFO: The DUT currently contains the following objects:
[13:23:27.396] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:27.398] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:27.398] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:27.398] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:27.398] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.398] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.399] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.399] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.399] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.399] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.506] <TB1> INFO: Test took 1107ms.
[13:23:28.508] <TB1> INFO: The DUT currently contains the following objects:
[13:23:28.508] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:28.508] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:28.508] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:28.508] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:28.508] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.508] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.620] <TB1> INFO: Test took 1112ms.
[13:23:29.622] <TB1> INFO: The DUT currently contains the following objects:
[13:23:29.622] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:29.622] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:29.622] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:29.622] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:29.622] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.622] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.622] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.622] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.622] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.622] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.622] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.622] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.623] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.623] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.623] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.623] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.623] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.623] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.623] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.623] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.734] <TB1> INFO: Test took 1111ms.
[13:23:30.735] <TB1> INFO: The DUT currently contains the following objects:
[13:23:30.735] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:30.735] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:30.735] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:30.735] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:30.735] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.735] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.735] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.736] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.847] <TB1> INFO: Test took 1111ms.
[13:23:31.849] <TB1> INFO: The DUT currently contains the following objects:
[13:23:31.849] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:31.849] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:31.849] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:31.849] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:31.849] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.849] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.850] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.850] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.850] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.960] <TB1> INFO: Test took 1110ms.
[13:23:32.962] <TB1> INFO: The DUT currently contains the following objects:
[13:23:32.962] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:32.962] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:32.962] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:32.962] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:32.962] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.962] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.073] <TB1> INFO: Test took 1111ms.
[13:23:34.075] <TB1> INFO: The DUT currently contains the following objects:
[13:23:34.075] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:34.075] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:34.075] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:34.075] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:34.075] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.075] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.188] <TB1> INFO: Test took 1113ms.
[13:23:35.190] <TB1> INFO: The DUT currently contains the following objects:
[13:23:35.190] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:35.190] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:35.190] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:35.190] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:35.190] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:35.190] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.301] <TB1> INFO: Test took 1111ms.
[13:23:36.302] <TB1> INFO: The DUT currently contains the following objects:
[13:23:36.302] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:36.302] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:23:36.302] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:23:36.302] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:36.302] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.302] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.302] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.303] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:37.414] <TB1> INFO: Test took 1111ms.
[13:23:37.422] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:27:23.609] <TB1> INFO: Test took 226187ms.
[13:27:25.170] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:13.036] <TB1> INFO: Test took 227866ms.
[13:31:14.805] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.812] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.819] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.825] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:14.832] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:14.839] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:31:14.846] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.853] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.860] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:14.867] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:14.874] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:31:14.880] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[13:31:14.887] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[13:31:14.894] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[13:31:14.901] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.908] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:14.915] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:14.921] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[13:31:14.928] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[13:31:14.935] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[13:31:14.942] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[13:31:14.949] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[13:31:14.955] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[13:31:14.962] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[13:31:14.969] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.976] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.983] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.989] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:14.996] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:15.003] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:15.010] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:15.017] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:15.024] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:15.031] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:15.038] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:15.045] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:15.100] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C0.dat
[13:31:15.101] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C1.dat
[13:31:15.101] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C2.dat
[13:31:15.101] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C3.dat
[13:31:15.101] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C4.dat
[13:31:15.101] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C5.dat
[13:31:15.101] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C6.dat
[13:31:15.102] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C7.dat
[13:31:15.102] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C8.dat
[13:31:15.102] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C9.dat
[13:31:15.102] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C10.dat
[13:31:15.103] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C11.dat
[13:31:15.103] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C12.dat
[13:31:15.103] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C13.dat
[13:31:15.103] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C14.dat
[13:31:15.103] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C15.dat
[13:31:18.566] <TB1> INFO: Test took 3458ms.
[13:31:22.306] <TB1> INFO: Test took 3455ms.
[13:31:26.118] <TB1> INFO: Test took 3514ms.
[13:31:26.429] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:27.352] <TB1> INFO: Test took 923ms.
[13:31:27.356] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:28.462] <TB1> INFO: Test took 1106ms.
[13:31:28.467] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:29.576] <TB1> INFO: Test took 1110ms.
[13:31:29.580] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:30.691] <TB1> INFO: Test took 1111ms.
[13:31:30.694] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:31.804] <TB1> INFO: Test took 1110ms.
[13:31:31.808] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:32.913] <TB1> INFO: Test took 1105ms.
[13:31:32.917] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:34.028] <TB1> INFO: Test took 1111ms.
[13:31:34.032] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:35.142] <TB1> INFO: Test took 1110ms.
[13:31:35.147] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:36.258] <TB1> INFO: Test took 1112ms.
[13:31:36.262] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:37.367] <TB1> INFO: Test took 1105ms.
[13:31:37.371] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:38.480] <TB1> INFO: Test took 1109ms.
[13:31:38.484] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:39.595] <TB1> INFO: Test took 1111ms.
[13:31:39.599] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:40.709] <TB1> INFO: Test took 1110ms.
[13:31:40.713] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:41.824] <TB1> INFO: Test took 1112ms.
[13:31:41.829] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:42.938] <TB1> INFO: Test took 1110ms.
[13:31:42.942] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:44.053] <TB1> INFO: Test took 1111ms.
[13:31:44.057] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:45.169] <TB1> INFO: Test took 1112ms.
[13:31:45.174] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:46.285] <TB1> INFO: Test took 1112ms.
[13:31:46.290] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:47.400] <TB1> INFO: Test took 1111ms.
[13:31:47.405] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:48.514] <TB1> INFO: Test took 1109ms.
[13:31:48.517] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:49.630] <TB1> INFO: Test took 1113ms.
[13:31:49.634] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:50.740] <TB1> INFO: Test took 1106ms.
[13:31:50.744] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:51.847] <TB1> INFO: Test took 1104ms.
[13:31:51.850] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:52.961] <TB1> INFO: Test took 1111ms.
[13:31:52.965] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:54.078] <TB1> INFO: Test took 1113ms.
[13:31:54.083] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:55.191] <TB1> INFO: Test took 1109ms.
[13:31:55.195] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:56.305] <TB1> INFO: Test took 1110ms.
[13:31:56.309] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:57.421] <TB1> INFO: Test took 1112ms.
[13:31:57.425] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:58.535] <TB1> INFO: Test took 1110ms.
[13:31:58.539] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:59.647] <TB1> INFO: Test took 1108ms.
[13:31:59.650] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:00.762] <TB1> INFO: Test took 1112ms.
[13:32:00.767] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:01.876] <TB1> INFO: Test took 1110ms.
[13:32:02.464] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 533 seconds
[13:32:02.464] <TB1> INFO: PH scale (per ROC): 77 66 80 72 72 74 69 69 79 75 66 59 70 67 79 66
[13:32:02.464] <TB1> INFO: PH offset (per ROC): 173 192 159 183 176 176 192 176 186 165 170 206 173 176 175 163
[13:32:02.659] <TB1> INFO: ######################################################################
[13:32:02.659] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:32:02.659] <TB1> INFO: ######################################################################
[13:32:02.671] <TB1> INFO: scanning low vcal = 10
[13:32:06.556] <TB1> INFO: Test took 3885ms.
[13:32:06.563] <TB1> INFO: scanning low vcal = 20
[13:32:10.418] <TB1> INFO: Test took 3855ms.
[13:32:10.424] <TB1> INFO: scanning low vcal = 30
[13:32:14.337] <TB1> INFO: Test took 3912ms.
[13:32:14.349] <TB1> INFO: scanning low vcal = 40
[13:32:18.732] <TB1> INFO: Test took 4382ms.
[13:32:18.802] <TB1> INFO: scanning low vcal = 50
[13:32:23.163] <TB1> INFO: Test took 4361ms.
[13:32:23.229] <TB1> INFO: scanning low vcal = 60
[13:32:27.616] <TB1> INFO: Test took 4387ms.
[13:32:27.698] <TB1> INFO: scanning low vcal = 70
[13:32:31.932] <TB1> INFO: Test took 4234ms.
[13:32:31.997] <TB1> INFO: scanning low vcal = 80
[13:32:36.236] <TB1> INFO: Test took 4239ms.
[13:32:36.312] <TB1> INFO: scanning low vcal = 90
[13:32:40.547] <TB1> INFO: Test took 4235ms.
[13:32:40.608] <TB1> INFO: scanning low vcal = 100
[13:32:44.828] <TB1> INFO: Test took 4220ms.
[13:32:44.888] <TB1> INFO: scanning low vcal = 110
[13:32:49.118] <TB1> INFO: Test took 4230ms.
[13:32:49.179] <TB1> INFO: scanning low vcal = 120
[13:32:53.417] <TB1> INFO: Test took 4238ms.
[13:32:53.475] <TB1> INFO: scanning low vcal = 130
[13:32:57.698] <TB1> INFO: Test took 4223ms.
[13:32:57.765] <TB1> INFO: scanning low vcal = 140
[13:33:01.985] <TB1> INFO: Test took 4220ms.
[13:33:02.044] <TB1> INFO: scanning low vcal = 150
[13:33:06.330] <TB1> INFO: Test took 4286ms.
[13:33:06.408] <TB1> INFO: scanning low vcal = 160
[13:33:10.758] <TB1> INFO: Test took 4350ms.
[13:33:10.843] <TB1> INFO: scanning low vcal = 170
[13:33:15.235] <TB1> INFO: Test took 4392ms.
[13:33:15.322] <TB1> INFO: scanning low vcal = 180
[13:33:19.763] <TB1> INFO: Test took 4441ms.
[13:33:19.848] <TB1> INFO: scanning low vcal = 190
[13:33:24.330] <TB1> INFO: Test took 4482ms.
[13:33:24.391] <TB1> INFO: scanning low vcal = 200
[13:33:28.821] <TB1> INFO: Test took 4430ms.
[13:33:28.880] <TB1> INFO: scanning low vcal = 210
[13:33:33.259] <TB1> INFO: Test took 4379ms.
[13:33:33.319] <TB1> INFO: scanning low vcal = 220
[13:33:37.705] <TB1> INFO: Test took 4386ms.
[13:33:37.795] <TB1> INFO: scanning low vcal = 230
[13:33:42.142] <TB1> INFO: Test took 4347ms.
[13:33:42.215] <TB1> INFO: scanning low vcal = 240
[13:33:46.584] <TB1> INFO: Test took 4369ms.
[13:33:46.644] <TB1> INFO: scanning low vcal = 250
[13:33:51.014] <TB1> INFO: Test took 4370ms.
[13:33:51.082] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[13:33:55.456] <TB1> INFO: Test took 4374ms.
[13:33:55.532] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[13:33:59.931] <TB1> INFO: Test took 4399ms.
[13:33:59.993] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[13:34:04.364] <TB1> INFO: Test took 4371ms.
[13:34:04.452] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[13:34:08.844] <TB1> INFO: Test took 4392ms.
[13:34:08.936] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:34:13.291] <TB1> INFO: Test took 4355ms.
[13:34:13.821] <TB1> INFO: PixTestGainPedestal::measure() done
[13:34:47.311] <TB1> INFO: PixTestGainPedestal::fit() done
[13:34:47.312] <TB1> INFO: non-linearity mean: 0.961 0.951 0.960 0.954 0.956 0.964 0.956 0.963 0.964 0.958 0.957 0.961 0.958 0.956 0.962 0.953
[13:34:47.312] <TB1> INFO: non-linearity RMS: 0.006 0.007 0.006 0.009 0.006 0.004 0.007 0.006 0.006 0.008 0.007 0.006 0.007 0.006 0.006 0.008
[13:34:47.312] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[13:34:47.332] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[13:34:47.353] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[13:34:47.374] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[13:34:47.395] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[13:34:47.415] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[13:34:47.435] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[13:34:47.455] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[13:34:47.475] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[13:34:47.495] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[13:34:47.515] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[13:34:47.535] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[13:34:47.554] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[13:34:47.574] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[13:34:47.594] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[13:34:47.614] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2055_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[13:34:47.634] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 164 seconds
[13:34:47.640] <TB1> INFO: enter test to run
[13:34:47.640] <TB1> INFO: test: exit no parameter change
[13:34:48.063] <TB1> QUIET: Connection to board 153 closed.
[13:34:48.142] <TB1> INFO: pXar: this is the end, my friend