[14:24:06.681] <TB0> INFO: *** Welcome to pxar ***
[14:24:06.681] <TB0> INFO: *** Today: 2015/08/04
[14:24:06.681] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C15.dat
[14:24:06.682] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//tbmParameters_C0b.dat
[14:24:06.682] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//defaultMaskFile.dat
[14:24:06.682] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters_C15.dat
[14:24:06.740] <TB0> INFO: clk: 4
[14:24:06.740] <TB0> INFO: ctr: 4
[14:24:06.740] <TB0> INFO: sda: 19
[14:24:06.740] <TB0> INFO: tin: 9
[14:24:06.740] <TB0> INFO: level: 15
[14:24:06.740] <TB0> INFO: triggerdelay: 0
[14:24:06.740] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[14:24:06.740] <TB0> INFO: Log level: INFO
[14:24:06.755] <TB0> INFO: Found DTB DTB_WWVASW
[14:24:06.764] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[14:24:06.768] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[14:24:06.770] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[14:24:08.280] <TB0> INFO: DUT info:
[14:24:08.280] <TB0> INFO: The DUT currently contains the following objects:
[14:24:08.281] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:24:08.281] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:24:08.281] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:24:08.281] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:24:08.281] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.281] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:24:08.682] <TB0> INFO: enter 'restricted' command line mode
[14:24:08.682] <TB0> INFO: enter test to run
[14:24:08.682] <TB0> INFO: test: pretest no parameter change
[14:24:08.682] <TB0> INFO: running: pretest
[14:24:08.686] <TB0> INFO: ######################################################################
[14:24:08.686] <TB0> INFO: PixTestPretest::doTest()
[14:24:08.686] <TB0> INFO: ######################################################################
[14:24:08.687] <TB0> INFO: ----------------------------------------------------------------------
[14:24:08.687] <TB0> INFO: PixTestPretest::programROC()
[14:24:08.687] <TB0> INFO: ----------------------------------------------------------------------
[14:24:26.702] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:24:26.703] <TB0> INFO: IA differences per ROC: 17.7 17.7 17.7 18.5 16.9 18.5 20.1 17.7 17.7 20.1 19.3 20.9 18.5 17.7 19.3 17.7
[14:24:26.750] <TB0> INFO: ----------------------------------------------------------------------
[14:24:26.750] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:24:26.750] <TB0> INFO: ----------------------------------------------------------------------
[14:24:32.315] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 374.6 mA = 23.4125 mA/ROC
[14:24:32.318] <TB0> INFO: ----------------------------------------------------------------------
[14:24:32.318] <TB0> INFO: PixTestPretest::findWorkingPixel()
[14:24:32.318] <TB0> INFO: ----------------------------------------------------------------------
[14:24:42.950] <TB0> INFO: Test took 10627ms.
[14:24:43.245] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:24:43.264] <TB0> INFO: ----------------------------------------------------------------------
[14:24:43.264] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[14:24:43.264] <TB0> INFO: ----------------------------------------------------------------------
[14:24:53.998] <TB0> INFO: Test took 10731ms.
[14:24:54.287] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[14:24:54.287] <TB0> INFO: CalDel: 114 165 133 132 148 153 128 163 131 144 143 162 171 146 150 156
[14:24:54.287] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:24:54.291] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C0.dat
[14:24:54.292] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C1.dat
[14:24:54.293] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C2.dat
[14:24:54.293] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C3.dat
[14:24:54.293] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C4.dat
[14:24:54.293] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C5.dat
[14:24:54.294] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C6.dat
[14:24:54.294] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C7.dat
[14:24:54.294] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C8.dat
[14:24:54.295] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C9.dat
[14:24:54.295] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C10.dat
[14:24:54.295] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C11.dat
[14:24:54.295] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C12.dat
[14:24:54.296] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C13.dat
[14:24:54.296] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C14.dat
[14:24:54.296] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters_C15.dat
[14:24:54.296] <TB0> INFO: PixTestPretest::doTest() done, duration: 45 seconds
[14:24:54.389] <TB0> INFO: enter test to run
[14:24:54.390] <TB0> INFO: test: fulltest no parameter change
[14:24:54.390] <TB0> INFO: running: fulltest
[14:24:54.390] <TB0> INFO: ######################################################################
[14:24:54.390] <TB0> INFO: PixTestFullTest::doTest()
[14:24:54.390] <TB0> INFO: ######################################################################
[14:24:54.391] <TB0> INFO: ######################################################################
[14:24:54.391] <TB0> INFO: PixTestAlive::doTest()
[14:24:54.391] <TB0> INFO: ######################################################################
[14:24:54.393] <TB0> INFO: ----------------------------------------------------------------------
[14:24:54.393] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:24:54.393] <TB0> INFO: ----------------------------------------------------------------------
[14:24:58.394] <TB0> INFO: Test took 4001ms.
[14:24:58.418] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:58.627] <TB0> INFO: PixTestAlive::aliveTest() done
[14:24:58.627] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:24:58.629] <TB0> INFO: ----------------------------------------------------------------------
[14:24:58.629] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:24:58.629] <TB0> INFO: ----------------------------------------------------------------------
[14:25:01.715] <TB0> INFO: Test took 3085ms.
[14:25:01.719] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:01.720] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:25:01.932] <TB0> INFO: PixTestAlive::maskTest() done
[14:25:01.932] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:25:01.934] <TB0> INFO: ----------------------------------------------------------------------
[14:25:01.934] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:25:01.934] <TB0> INFO: ----------------------------------------------------------------------
[14:25:05.987] <TB0> INFO: Test took 4052ms.
[14:25:06.009] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:06.220] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[14:25:06.220] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:25:06.220] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[14:25:06.230] <TB0> INFO: ######################################################################
[14:25:06.230] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:25:06.230] <TB0> INFO: ######################################################################
[14:25:06.231] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:25:06.242] <TB0> INFO: dacScan step from 0 .. 29
[14:25:32.057] <TB0> INFO: Test took 25815ms.
[14:25:32.087] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:32.087] <TB0> INFO: dacScan step from 30 .. 59
[14:26:01.044] <TB0> INFO: Test took 28956ms.
[14:26:01.169] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:01.193] <TB0> INFO: dacScan step from 60 .. 89
[14:26:39.209] <TB0> INFO: Test took 38016ms.
[14:26:39.457] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:39.532] <TB0> INFO: dacScan step from 90 .. 119
[14:27:18.496] <TB0> INFO: Test took 38964ms.
[14:27:18.752] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:18.857] <TB0> INFO: dacScan step from 120 .. 149
[14:27:46.350] <TB0> INFO: Test took 27493ms.
[14:27:46.495] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:08.791] <TB0> INFO: PixTestBBMap::doTest() done, duration: 182 seconds
[14:28:08.791] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0
[14:28:08.791] <TB0> INFO: separation cut (per ROC): 87 73 89 89 74 95 82 66 78 79 83 82 83 71 84 72
[14:28:08.861] <TB0> INFO: ######################################################################
[14:28:08.861] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[14:28:08.861] <TB0> INFO: ######################################################################
[14:28:08.861] <TB0> INFO: ----------------------------------------------------------------------
[14:28:08.861] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:28:08.861] <TB0> INFO: ----------------------------------------------------------------------
[14:28:08.861] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:28:08.870] <TB0> INFO: dacScan step from 0 .. 3
[14:28:33.344] <TB0> INFO: Test took 24474ms.
[14:28:33.371] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:33.371] <TB0> INFO: dacScan step from 4 .. 7
[14:28:56.111] <TB0> INFO: Test took 22740ms.
[14:28:56.138] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:56.138] <TB0> INFO: dacScan step from 8 .. 11
[14:29:21.482] <TB0> INFO: Test took 25344ms.
[14:29:21.507] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:21.507] <TB0> INFO: dacScan step from 12 .. 15
[14:29:46.726] <TB0> INFO: Test took 25219ms.
[14:29:46.751] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:46.751] <TB0> INFO: dacScan step from 16 .. 19
[14:30:11.870] <TB0> INFO: Test took 25119ms.
[14:30:11.898] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:11.898] <TB0> INFO: dacScan step from 20 .. 23
[14:30:37.025] <TB0> INFO: Test took 25127ms.
[14:30:37.050] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:37.050] <TB0> INFO: dacScan step from 24 .. 27
[14:31:02.216] <TB0> INFO: Test took 25166ms.
[14:31:02.240] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:02.240] <TB0> INFO: dacScan step from 28 .. 31
[14:31:26.719] <TB0> INFO: Test took 24479ms.
[14:31:26.749] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:26.749] <TB0> INFO: dacScan step from 32 .. 35
[14:31:51.505] <TB0> INFO: Test took 24756ms.
[14:31:51.533] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:51.533] <TB0> INFO: dacScan step from 36 .. 39
[14:32:17.002] <TB0> INFO: Test took 25469ms.
[14:32:17.030] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:17.030] <TB0> INFO: dacScan step from 40 .. 43
[14:32:42.124] <TB0> INFO: Test took 25094ms.
[14:32:42.150] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:42.150] <TB0> INFO: dacScan step from 44 .. 47
[14:33:07.488] <TB0> INFO: Test took 25338ms.
[14:33:07.517] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:07.517] <TB0> INFO: dacScan step from 48 .. 51
[14:33:32.754] <TB0> INFO: Test took 25237ms.
[14:33:32.779] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:32.779] <TB0> INFO: dacScan step from 52 .. 55
[14:33:58.253] <TB0> INFO: Test took 25474ms.
[14:33:58.280] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:58.280] <TB0> INFO: dacScan step from 56 .. 59
[14:34:23.418] <TB0> INFO: Test took 25138ms.
[14:34:23.446] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:23.446] <TB0> INFO: dacScan step from 60 .. 63
[14:34:49.097] <TB0> INFO: Test took 25651ms.
[14:34:49.130] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:49.130] <TB0> INFO: dacScan step from 64 .. 67
[14:35:15.272] <TB0> INFO: Test took 26142ms.
[14:35:15.314] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:15.315] <TB0> INFO: dacScan step from 68 .. 71
[14:35:41.554] <TB0> INFO: Test took 26233ms.
[14:35:41.618] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:41.620] <TB0> INFO: dacScan step from 72 .. 75
[14:36:09.681] <TB0> INFO: Test took 28061ms.
[14:36:09.773] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:09.776] <TB0> INFO: dacScan step from 76 .. 79
[14:36:40.873] <TB0> INFO: Test took 31097ms.
[14:36:40.984] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:40.990] <TB0> INFO: dacScan step from 80 .. 83
[14:37:17.117] <TB0> INFO: Test took 36127ms.
[14:37:17.300] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:17.309] <TB0> INFO: dacScan step from 84 .. 87
[14:37:54.997] <TB0> INFO: Test took 37688ms.
[14:37:55.211] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:55.222] <TB0> INFO: dacScan step from 88 .. 91


[14:38:33.947] <TB0> INFO: Test took 38724ms.
[14:38:34.189] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:34.200] <TB0> INFO: dacScan step from 92 .. 95


[14:39:13.219] <TB0> INFO: Test took 39018ms.
[14:39:13.453] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:13.465] <TB0> INFO: dacScan step from 96 .. 99


[14:39:52.848] <TB0> INFO: Test took 39382ms.
[14:39:53.090] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:53.101] <TB0> INFO: dacScan step from 100 .. 103


[14:40:35.157] <TB0> INFO: Test took 42055ms.
[14:40:35.381] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:35.397] <TB0> INFO: dacScan step from 104 .. 107





[14:41:15.866] <TB0> INFO: Test took 40469ms.
[14:41:16.092] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:16.104] <TB0> INFO: dacScan step from 108 .. 111
[14:41:57.489] <TB0> INFO: Test took 41385ms.
[14:41:57.744] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:57.757] <TB0> INFO: dacScan step from 112 .. 115
[14:42:38.950] <TB0> INFO: Test took 41193ms.
[14:42:39.187] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:39.200] <TB0> INFO: dacScan step from 116 .. 119
[14:43:19.531] <TB0> INFO: Test took 40331ms.
[14:43:19.765] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:19.778] <TB0> INFO: dacScan step from 120 .. 123
[14:43:59.195] <TB0> INFO: Test took 39417ms.
[14:43:59.466] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:59.477] <TB0> INFO: dacScan step from 124 .. 127
[14:44:39.857] <TB0> INFO: Test took 40380ms.
[14:44:40.096] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:40.110] <TB0> INFO: dacScan step from 128 .. 131
[14:45:21.251] <TB0> INFO: Test took 41141ms.
[14:45:21.464] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:21.475] <TB0> INFO: dacScan step from 132 .. 135
[14:46:00.241] <TB0> INFO: Test took 38766ms.
[14:46:00.474] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:00.486] <TB0> INFO: dacScan step from 136 .. 139
[14:46:38.071] <TB0> INFO: Test took 37585ms.
[14:46:38.307] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:38.318] <TB0> INFO: dacScan step from 140 .. 143
[14:47:19.058] <TB0> INFO: Test took 40740ms.
[14:47:19.273] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:19.283] <TB0> INFO: dacScan step from 144 .. 147
[14:48:00.859] <TB0> INFO: Test took 41576ms.
[14:48:01.090] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:01.100] <TB0> INFO: dacScan step from 148 .. 149
[14:48:22.776] <TB0> INFO: Test took 21676ms.
[14:48:22.886] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:22.893] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:24.251] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:25.682] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:27.181] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:28.599] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:30.093] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:31.528] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:33.059] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:34.619] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:36.143] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:37.697] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:39.220] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:40.781] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:42.337] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:44.041] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:45.608] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:47.193] <TB0> INFO: PixTestScurves::scurves() done
[14:48:47.193] <TB0> INFO: Vcal mean: 88.98 83.32 92.85 91.48 78.92 94.47 81.87 70.21 85.32 78.11 84.56 76.29 81.77 76.30 83.59 81.61
[14:48:47.193] <TB0> INFO: Vcal RMS: 5.67 5.08 5.95 5.56 3.84 6.48 5.28 4.48 5.61 4.77 5.16 4.52 5.01 4.25 5.85 5.00
[14:48:47.194] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1238 seconds
[14:48:47.271] <TB0> INFO: ######################################################################
[14:48:47.271] <TB0> INFO: PixTestTrim::doTest()
[14:48:47.271] <TB0> INFO: ######################################################################
[14:48:47.273] <TB0> INFO: ----------------------------------------------------------------------
[14:48:47.273] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[14:48:47.273] <TB0> INFO: ----------------------------------------------------------------------
[14:48:47.358] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:48:47.358] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:48:47.367] <TB0> INFO: dacScan step from 0 .. 19
[14:49:05.375] <TB0> INFO: Test took 18007ms.
[14:49:05.398] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:05.398] <TB0> INFO: dacScan step from 20 .. 39
[14:49:23.428] <TB0> INFO: Test took 18030ms.
[14:49:23.451] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:23.451] <TB0> INFO: dacScan step from 40 .. 59
[14:49:40.671] <TB0> INFO: Test took 17220ms.
[14:49:40.698] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:40.699] <TB0> INFO: dacScan step from 60 .. 79
[14:49:58.832] <TB0> INFO: Test took 18133ms.
[14:49:58.863] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:58.863] <TB0> INFO: dacScan step from 80 .. 99
[14:50:18.982] <TB0> INFO: Test took 20119ms.
[14:50:19.080] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:19.096] <TB0> INFO: dacScan step from 100 .. 119
[14:50:44.551] <TB0> INFO: Test took 25455ms.
[14:50:44.725] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:44.768] <TB0> INFO: dacScan step from 120 .. 139
[14:51:07.404] <TB0> INFO: Test took 22636ms.
[14:51:07.543] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:07.563] <TB0> INFO: dacScan step from 140 .. 159
[14:51:26.303] <TB0> INFO: Test took 18740ms.
[14:51:26.350] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:47.732] <TB0> INFO: ROC 0 VthrComp = 94
[14:51:47.732] <TB0> INFO: ROC 1 VthrComp = 81
[14:51:47.732] <TB0> INFO: ROC 2 VthrComp = 93
[14:51:47.732] <TB0> INFO: ROC 3 VthrComp = 95
[14:51:47.732] <TB0> INFO: ROC 4 VthrComp = 85
[14:51:47.732] <TB0> INFO: ROC 5 VthrComp = 95
[14:51:47.732] <TB0> INFO: ROC 6 VthrComp = 85
[14:51:47.732] <TB0> INFO: ROC 7 VthrComp = 75
[14:51:47.732] <TB0> INFO: ROC 8 VthrComp = 86
[14:51:47.732] <TB0> INFO: ROC 9 VthrComp = 82
[14:51:47.732] <TB0> INFO: ROC 10 VthrComp = 87
[14:51:47.733] <TB0> INFO: ROC 11 VthrComp = 81
[14:51:47.733] <TB0> INFO: ROC 12 VthrComp = 85
[14:51:47.733] <TB0> INFO: ROC 13 VthrComp = 79
[14:51:47.733] <TB0> INFO: ROC 14 VthrComp = 85
[14:51:47.733] <TB0> INFO: ROC 15 VthrComp = 83
[14:51:47.733] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:51:47.733] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:51:47.741] <TB0> INFO: dacScan step from 0 .. 19
[14:52:06.268] <TB0> INFO: Test took 18526ms.
[14:52:06.291] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:06.291] <TB0> INFO: dacScan step from 20 .. 39
[14:52:24.817] <TB0> INFO: Test took 18526ms.
[14:52:24.848] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:24.851] <TB0> INFO: dacScan step from 40 .. 59
[14:52:47.417] <TB0> INFO: Test took 22566ms.
[14:52:47.564] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:47.607] <TB0> INFO: dacScan step from 60 .. 79
[14:53:11.134] <TB0> INFO: Test took 23527ms.
[14:53:11.304] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:11.367] <TB0> INFO: dacScan step from 80 .. 99
[14:53:35.126] <TB0> INFO: Test took 23759ms.
[14:53:35.312] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:35.377] <TB0> INFO: dacScan step from 100 .. 119
[14:54:01.019] <TB0> INFO: Test took 25642ms.
[14:54:01.176] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:01.237] <TB0> INFO: dacScan step from 120 .. 139
[14:54:28.146] <TB0> INFO: Test took 26909ms.
[14:54:28.316] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:28.372] <TB0> INFO: dacScan step from 140 .. 159
[14:54:51.563] <TB0> INFO: Test took 23191ms.
[14:54:51.789] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:20.051] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 60.1387 for pixel 12/2 mean/min/max = 45.3549/30.4121/60.2976
[14:55:20.052] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 60.4988 for pixel 2/77 mean/min/max = 46.7122/32.758/60.6663
[14:55:20.052] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 63.3485 for pixel 0/75 mean/min/max = 47.6291/31.6438/63.6143
[14:55:20.052] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 58.9504 for pixel 5/0 mean/min/max = 45.3104/31.5042/59.1165
[14:55:20.053] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 55.4382 for pixel 3/79 mean/min/max = 43.8955/32.3131/55.4779
[14:55:20.053] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 62.8116 for pixel 12/12 mean/min/max = 47.008/31.0986/62.9173
[14:55:20.053] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 60.6744 for pixel 6/51 mean/min/max = 46.1397/31.1693/61.1102
[14:55:20.054] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.3973 for pixel 22/27 mean/min/max = 46.0263/34.5946/57.458
[14:55:20.054] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 61.5441 for pixel 0/67 mean/min/max = 46.777/31.7581/61.796
[14:55:20.054] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 59.0386 for pixel 10/69 mean/min/max = 45.5572/32.0034/59.1111
[14:55:20.054] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 59.1075 for pixel 0/79 mean/min/max = 45.4247/31.6491/59.2003
[14:55:20.055] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.3111 for pixel 12/70 mean/min/max = 45.1627/31.8658/58.4597
[14:55:20.055] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 59.8308 for pixel 16/79 mean/min/max = 45.8921/31.9021/59.8821
[14:55:20.055] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 59.1133 for pixel 24/37 mean/min/max = 47.0088/34.8827/59.1348
[14:55:20.055] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 62.9862 for pixel 10/58 mean/min/max = 47.2701/31.5027/63.0376
[14:55:20.056] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 61.0418 for pixel 0/51 mean/min/max = 46.7907/32.4099/61.1715
[14:55:20.056] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:57:23.996] <TB0> INFO: Test took 123940ms.
[14:57:25.401] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:57:25.409] <TB0> INFO: dacScan step from 0 .. 19
[14:57:54.144] <TB0> INFO: Test took 28735ms.
[14:57:54.190] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:54.192] <TB0> INFO: dacScan step from 20 .. 39
[14:58:29.407] <TB0> INFO: Test took 35215ms.
[14:58:29.651] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:29.696] <TB0> INFO: dacScan step from 40 .. 59

[14:59:14.088] <TB0> INFO: Test took 44392ms.
[14:59:14.435] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:14.502] <TB0> INFO: dacScan step from 60 .. 79

[14:59:53.972] <TB0> INFO: Test took 39470ms.
[14:59:54.257] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:54.305] <TB0> INFO: dacScan step from 80 .. 99





[15:00:39.164] <TB0> INFO: Test took 44859ms.
[15:00:39.437] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:39.483] <TB0> INFO: dacScan step from 100 .. 119


[15:01:23.703] <TB0> INFO: Test took 44220ms.
[15:01:23.975] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:24.028] <TB0> INFO: dacScan step from 120 .. 139


[15:02:05.955] <TB0> INFO: Test took 41927ms.
[15:02:06.225] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:06.280] <TB0> INFO: dacScan step from 140 .. 159


[15:02:47.556] <TB0> INFO: Test took 41276ms.
[15:02:48.012] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:48.111] <TB0> INFO: dacScan step from 160 .. 179
[15:03:32.585] <TB0> INFO: Test took 44474ms.
[15:03:32.896] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:32.958] <TB0> INFO: dacScan step from 180 .. 199



[15:04:12.816] <TB0> INFO: Test took 39858ms.
[15:04:13.102] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:37.627] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.060184 .. 255.000000
[15:04:37.717] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[15:04:37.726] <TB0> INFO: dacScan step from 0 .. 19
[15:04:53.733] <TB0> INFO: Test took 16007ms.
[15:04:53.758] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:53.758] <TB0> INFO: dacScan step from 20 .. 39
[15:05:11.718] <TB0> INFO: Test took 17959ms.
[15:05:11.793] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:11.808] <TB0> INFO: dacScan step from 40 .. 59
[15:05:34.647] <TB0> INFO: Test took 22839ms.
[15:05:34.805] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:34.854] <TB0> INFO: dacScan step from 60 .. 79
[15:05:55.278] <TB0> INFO: Test took 20424ms.
[15:05:55.414] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:55.467] <TB0> INFO: dacScan step from 80 .. 99
[15:06:18.364] <TB0> INFO: Test took 22897ms.
[15:06:18.502] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:18.551] <TB0> INFO: dacScan step from 100 .. 119
[15:06:41.174] <TB0> INFO: Test took 22623ms.
[15:06:41.328] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:41.383] <TB0> INFO: dacScan step from 120 .. 139
[15:07:03.910] <TB0> INFO: Test took 22527ms.
[15:07:04.049] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:04.107] <TB0> INFO: dacScan step from 140 .. 159
[15:07:26.741] <TB0> INFO: Test took 22634ms.
[15:07:26.892] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:26.954] <TB0> INFO: dacScan step from 160 .. 179
[15:07:49.236] <TB0> INFO: Test took 22282ms.
[15:07:49.387] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:49.448] <TB0> INFO: dacScan step from 180 .. 199
[15:08:12.370] <TB0> INFO: Test took 22922ms.
[15:08:12.508] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:12.552] <TB0> INFO: dacScan step from 200 .. 219
[15:08:32.935] <TB0> INFO: Test took 20383ms.
[15:08:33.079] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:33.132] <TB0> INFO: dacScan step from 220 .. 239
[15:08:52.522] <TB0> INFO: Test took 19390ms.
[15:08:52.658] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:52.709] <TB0> INFO: dacScan step from 240 .. 255
[15:09:10.922] <TB0> INFO: Test took 18213ms.
[15:09:11.047] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:41.400] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 12.201320 .. 45.096601
[15:09:41.482] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 55 (20) hits flags = 16 (plus default)
[15:09:41.491] <TB0> INFO: dacScan step from 2 .. 21
[15:09:57.320] <TB0> INFO: Test took 15829ms.
[15:09:57.343] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:57.343] <TB0> INFO: dacScan step from 22 .. 41
[15:10:16.147] <TB0> INFO: Test took 18804ms.
[15:10:16.257] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:16.280] <TB0> INFO: dacScan step from 42 .. 55
[15:10:33.378] <TB0> INFO: Test took 17098ms.
[15:10:33.479] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:49.954] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 17.893202 .. 43.647483
[15:10:50.028] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 53 (20) hits flags = 16 (plus default)
[15:10:50.037] <TB0> INFO: dacScan step from 7 .. 26
[15:11:05.283] <TB0> INFO: Test took 15246ms.
[15:11:05.301] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:05.301] <TB0> INFO: dacScan step from 27 .. 46
[15:11:25.072] <TB0> INFO: Test took 19771ms.
[15:11:25.186] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:25.222] <TB0> INFO: dacScan step from 47 .. 53
[15:11:35.003] <TB0> INFO: Test took 9781ms.
[15:11:35.054] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:50.061] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 1.904543 .. 41.510360
[15:11:50.149] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 51 (20) hits flags = 16 (plus default)
[15:11:50.158] <TB0> INFO: dacScan step from 1 .. 20
[15:12:06.391] <TB0> INFO: Test took 16233ms.
[15:12:06.410] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:06.411] <TB0> INFO: dacScan step from 21 .. 40
[15:12:24.348] <TB0> INFO: Test took 17937ms.
[15:12:24.426] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:24.444] <TB0> INFO: dacScan step from 41 .. 51
[15:12:38.010] <TB0> INFO: Test took 13566ms.
[15:12:38.102] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:53.799] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:12:53.799] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[15:12:53.809] <TB0> INFO: dacScan step from 15 .. 34
[15:13:19.326] <TB0> INFO: Test took 25517ms.
[15:13:19.397] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:19.407] <TB0> INFO: dacScan step from 35 .. 54


[15:14:02.830] <TB0> INFO: Test took 43423ms.
[15:14:03.107] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:03.151] <TB0> INFO: dacScan step from 55 .. 55
[15:14:08.260] <TB0> INFO: Test took 5109ms.
[15:14:08.276] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:22.105] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C0.dat
[15:14:22.105] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C1.dat
[15:14:22.105] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C2.dat
[15:14:22.105] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C3.dat
[15:14:22.105] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C4.dat
[15:14:22.106] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C5.dat
[15:14:22.106] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C6.dat
[15:14:22.106] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C7.dat
[15:14:22.106] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C8.dat
[15:14:22.107] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C9.dat
[15:14:22.107] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C10.dat
[15:14:22.107] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C11.dat
[15:14:22.107] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C12.dat
[15:14:22.108] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C13.dat
[15:14:22.108] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C14.dat
[15:14:22.108] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C15.dat
[15:14:22.109] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C0.dat
[15:14:22.121] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C1.dat
[15:14:22.129] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C2.dat
[15:14:22.137] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C3.dat
[15:14:22.145] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C4.dat
[15:14:22.154] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C5.dat
[15:14:22.162] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C6.dat
[15:14:22.170] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C7.dat
[15:14:22.176] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C8.dat
[15:14:22.182] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C9.dat
[15:14:22.188] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C10.dat
[15:14:22.194] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C11.dat
[15:14:22.200] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C12.dat
[15:14:22.206] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C13.dat
[15:14:22.212] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C14.dat
[15:14:22.218] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//trimParameters35_C15.dat
[15:14:22.224] <TB0> INFO: PixTestTrim::trimTest() done
[15:14:22.224] <TB0> INFO: vtrim: 103 95 119 113 96 108 109 101 99 101 91 102 104 94 126 104
[15:14:22.224] <TB0> INFO: vthrcomp: 94 81 93 95 85 95 85 75 86 82 87 81 85 79 85 83
[15:14:22.224] <TB0> INFO: vcal mean: 35.02 35.04 35.08 35.00 35.01 35.07 34.98 35.05 35.00 34.97 35.05 34.96 35.07 35.10 35.04 35.00
[15:14:22.224] <TB0> INFO: vcal RMS: 1.23 1.07 1.11 1.04 0.99 1.18 1.13 1.02 1.04 0.98 1.01 0.97 0.95 0.96 1.11 1.12
[15:14:22.224] <TB0> INFO: bits mean: 10.11 9.48 9.38 9.95 10.19 9.49 10.01 9.73 9.42 10.10 9.26 9.76 9.28 8.96 9.81 9.30
[15:14:22.224] <TB0> INFO: bits RMS: 2.64 2.51 2.66 2.59 2.37 2.73 2.53 2.19 2.65 2.40 2.88 2.60 2.77 2.41 2.51 2.68
[15:14:22.230] <TB0> INFO: ----------------------------------------------------------------------
[15:14:22.230] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[15:14:22.230] <TB0> INFO: ----------------------------------------------------------------------
[15:14:22.232] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:14:22.242] <TB0> INFO: dacScan step from 0 .. 19
[15:14:51.104] <TB0> INFO: Test took 28862ms.
[15:14:51.143] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:51.143] <TB0> INFO: dacScan step from 20 .. 39
[15:15:18.465] <TB0> INFO: Test took 27322ms.
[15:15:18.499] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:18.499] <TB0> INFO: dacScan step from 40 .. 59
[15:15:45.184] <TB0> INFO: Test took 26685ms.
[15:15:45.220] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:45.220] <TB0> INFO: dacScan step from 60 .. 79
[15:16:10.830] <TB0> INFO: Test took 25610ms.
[15:16:10.865] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:10.865] <TB0> INFO: dacScan step from 80 .. 99
[15:16:40.961] <TB0> INFO: Test took 30096ms.
[15:16:41.039] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:41.043] <TB0> INFO: dacScan step from 100 .. 119
[15:17:21.126] <TB0> INFO: Test took 40083ms.
[15:17:21.373] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:21.407] <TB0> INFO: dacScan step from 120 .. 139


[15:17:58.917] <TB0> INFO: Test took 37510ms.
[15:17:59.215] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:59.262] <TB0> INFO: dacScan step from 140 .. 159
[15:18:43.978] <TB0> INFO: Test took 44715ms.
[15:18:44.243] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:44.300] <TB0> INFO: dacScan step from 160 .. 179
[15:19:24.877] <TB0> INFO: Test took 40577ms.
[15:19:25.143] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:25.206] <TB0> INFO: dacScan step from 180 .. 199
[15:20:10.742] <TB0> INFO: Test took 45536ms.
[15:20:11.005] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:37.520] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 167 (20) hits flags = 16 (plus default)
[15:20:37.529] <TB0> INFO: dacScan step from 0 .. 19
[15:21:05.752] <TB0> INFO: Test took 28223ms.
[15:21:05.790] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:05.790] <TB0> INFO: dacScan step from 20 .. 39
[15:21:34.448] <TB0> INFO: Test took 28658ms.
[15:21:34.486] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:34.486] <TB0> INFO: dacScan step from 40 .. 59
[15:22:00.562] <TB0> INFO: Test took 26076ms.
[15:22:00.597] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:00.597] <TB0> INFO: dacScan step from 60 .. 79
[15:22:26.554] <TB0> INFO: Test took 25957ms.
[15:22:26.607] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:26.607] <TB0> INFO: dacScan step from 80 .. 99
[15:22:57.555] <TB0> INFO: Test took 30948ms.
[15:22:57.724] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:57.744] <TB0> INFO: dacScan step from 100 .. 119


[15:23:36.576] <TB0> INFO: Test took 38831ms.
[15:23:36.856] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:36.915] <TB0> INFO: dacScan step from 120 .. 139


[15:24:16.589] <TB0> INFO: Test took 39673ms.
[15:24:16.867] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:16.916] <TB0> INFO: dacScan step from 140 .. 159
[15:24:53.842] <TB0> INFO: Test took 36926ms.
[15:24:54.116] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:54.167] <TB0> INFO: dacScan step from 160 .. 167
[15:25:11.105] <TB0> INFO: Test took 16938ms.
[15:25:11.209] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:33.881] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[15:25:33.891] <TB0> INFO: dacScan step from 0 .. 19
[15:26:02.978] <TB0> INFO: Test took 29087ms.
[15:26:03.017] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:03.017] <TB0> INFO: dacScan step from 20 .. 39
[15:26:29.089] <TB0> INFO: Test took 26071ms.
[15:26:29.125] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:29.125] <TB0> INFO: dacScan step from 40 .. 59
[15:26:56.345] <TB0> INFO: Test took 27220ms.
[15:26:56.379] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:56.379] <TB0> INFO: dacScan step from 60 .. 79
[15:27:23.694] <TB0> INFO: Test took 27315ms.
[15:27:23.740] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:23.741] <TB0> INFO: dacScan step from 80 .. 99
[15:27:57.454] <TB0> INFO: Test took 33713ms.
[15:27:57.605] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:57.623] <TB0> INFO: dacScan step from 100 .. 119
[15:28:36.643] <TB0> INFO: Test took 39020ms.
[15:28:36.927] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:36.971] <TB0> INFO: dacScan step from 120 .. 139

[15:29:21.490] <TB0> INFO: Test took 44519ms.
[15:29:21.762] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:21.829] <TB0> INFO: dacScan step from 140 .. 151
[15:29:50.078] <TB0> INFO: Test took 28249ms.
[15:29:50.247] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:14.398] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 149 (20) hits flags = 16 (plus default)
[15:30:14.407] <TB0> INFO: dacScan step from 0 .. 19
[15:30:42.990] <TB0> INFO: Test took 28583ms.
[15:30:43.025] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:43.025] <TB0> INFO: dacScan step from 20 .. 39
[15:31:11.320] <TB0> INFO: Test took 28295ms.
[15:31:11.357] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:11.357] <TB0> INFO: dacScan step from 40 .. 59
[15:31:40.436] <TB0> INFO: Test took 29079ms.
[15:31:40.469] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:40.469] <TB0> INFO: dacScan step from 60 .. 79
[15:32:07.176] <TB0> INFO: Test took 26706ms.
[15:32:07.213] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:07.213] <TB0> INFO: dacScan step from 80 .. 99
[15:32:36.996] <TB0> INFO: Test took 29783ms.
[15:32:37.149] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:37.165] <TB0> INFO: dacScan step from 100 .. 119





[15:33:20.069] <TB0> INFO: Test took 42904ms.
[15:33:20.353] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:20.394] <TB0> INFO: dacScan step from 120 .. 139

[15:34:05.041] <TB0> INFO: Test took 44647ms.
[15:34:05.330] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:05.388] <TB0> INFO: dacScan step from 140 .. 149
[15:34:29.257] <TB0> INFO: Test took 23868ms.
[15:34:29.390] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:51.126] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 150 (20) hits flags = 16 (plus default)
[15:34:51.136] <TB0> INFO: dacScan step from 0 .. 19
[15:35:19.973] <TB0> INFO: Test took 28837ms.
[15:35:20.006] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:20.006] <TB0> INFO: dacScan step from 20 .. 39
[15:35:48.074] <TB0> INFO: Test took 28067ms.
[15:35:48.113] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:48.114] <TB0> INFO: dacScan step from 40 .. 59
[15:36:17.272] <TB0> INFO: Test took 29158ms.
[15:36:17.310] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:17.310] <TB0> INFO: dacScan step from 60 .. 79
[15:36:42.372] <TB0> INFO: Test took 25062ms.
[15:36:42.407] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:42.407] <TB0> INFO: dacScan step from 80 .. 99
[15:37:15.954] <TB0> INFO: Test took 33547ms.
[15:37:16.105] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:16.122] <TB0> INFO: dacScan step from 100 .. 119


[15:37:58.940] <TB0> INFO: Test took 42818ms.
[15:37:59.202] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:59.236] <TB0> INFO: dacScan step from 120 .. 139





[15:38:41.261] <TB0> INFO: Test took 42025ms.
[15:38:41.523] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:41.572] <TB0> INFO: dacScan step from 140 .. 150
[15:39:05.705] <TB0> INFO: Test took 24133ms.
[15:39:05.846] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:27.579] <TB0> INFO: PixTestTrim::trimBitTest() done
[15:39:27.581] <TB0> INFO: PixTestTrim::doTest() done, duration: 3040 seconds
[15:39:28.289] <TB0> INFO: ######################################################################
[15:39:28.289] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:39:28.289] <TB0> INFO: ######################################################################
[15:39:32.191] <TB0> INFO: Test took 3900ms.
[15:39:32.213] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:36.375] <TB0> INFO: Test took 3966ms.
[15:39:36.435] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:40.443] <TB0> INFO: Test took 4001ms.
[15:39:40.510] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:40.518] <TB0> INFO: The DUT currently contains the following objects:
[15:39:40.518] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:40.518] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:40.518] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:40.518] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:40.518] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:40.518] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.631] <TB0> INFO: Test took 1113ms.
[15:39:41.632] <TB0> INFO: The DUT currently contains the following objects:
[15:39:41.632] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:41.632] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:41.632] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:41.632] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:41.632] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.632] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.633] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.633] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.633] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:41.633] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.742] <TB0> INFO: Test took 1109ms.
[15:39:42.742] <TB0> INFO: The DUT currently contains the following objects:
[15:39:42.742] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:42.742] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:42.742] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:42.742] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:42.742] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.742] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.742] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.742] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.742] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:42.743] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: Test took 1121ms.
[15:39:43.864] <TB0> INFO: The DUT currently contains the following objects:
[15:39:43.864] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:43.864] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:43.864] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:43.864] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:43.864] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:43.864] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.984] <TB0> INFO: Test took 1120ms.
[15:39:44.985] <TB0> INFO: The DUT currently contains the following objects:
[15:39:44.985] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:44.985] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:44.985] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:44.985] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:44.985] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:44.985] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.106] <TB0> INFO: Test took 1121ms.
[15:39:46.107] <TB0> INFO: The DUT currently contains the following objects:
[15:39:46.107] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:46.107] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:46.107] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:46.107] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:46.107] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:46.107] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.212] <TB0> INFO: Test took 1105ms.
[15:39:47.213] <TB0> INFO: The DUT currently contains the following objects:
[15:39:47.213] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:47.213] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:47.213] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:47.213] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:47.213] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:47.213] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.318] <TB0> INFO: Test took 1105ms.
[15:39:48.318] <TB0> INFO: The DUT currently contains the following objects:
[15:39:48.318] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:48.318] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:48.318] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:48.318] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:48.318] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.318] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.318] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:48.319] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: Test took 1105ms.
[15:39:49.424] <TB0> INFO: The DUT currently contains the following objects:
[15:39:49.424] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:49.424] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:49.424] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:49.424] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:49.424] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.424] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.425] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.425] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.425] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.425] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.425] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:49.425] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.546] <TB0> INFO: Test took 1121ms.
[15:39:50.546] <TB0> INFO: The DUT currently contains the following objects:
[15:39:50.551] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:50.551] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:50.551] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:50.551] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:50.551] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.551] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.551] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.551] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.551] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:50.552] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: Test took 1100ms.
[15:39:51.652] <TB0> INFO: The DUT currently contains the following objects:
[15:39:51.652] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:51.652] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:51.652] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:51.652] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:51.652] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.652] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.653] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.653] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.653] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:51.653] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: Test took 1105ms.
[15:39:52.758] <TB0> INFO: The DUT currently contains the following objects:
[15:39:52.758] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:52.758] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:52.758] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:52.758] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:52.758] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:52.758] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.894] <TB0> INFO: Test took 1136ms.
[15:39:53.895] <TB0> INFO: The DUT currently contains the following objects:
[15:39:53.895] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:53.895] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:53.895] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:53.895] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:53.895] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:53.895] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: Test took 1106ms.
[15:39:55.001] <TB0> INFO: The DUT currently contains the following objects:
[15:39:55.001] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:55.001] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:55.001] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:55.001] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:55.001] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:55.001] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: Test took 1152ms.
[15:39:56.153] <TB0> INFO: The DUT currently contains the following objects:
[15:39:56.153] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:56.153] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:56.153] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:56.153] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:56.153] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:56.153] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.258] <TB0> INFO: Test took 1105ms.
[15:39:57.259] <TB0> INFO: The DUT currently contains the following objects:
[15:39:57.259] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:57.259] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:57.259] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:57.259] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:57.259] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:57.259] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:58.364] <TB0> INFO: Test took 1105ms.
[15:39:58.366] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:45:06.830] <TB0> INFO: Test took 308464ms.
[15:45:08.356] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:10.732] <TB0> INFO: Test took 302376ms.
[15:50:12.558] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.565] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.572] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.579] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.585] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.592] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.599] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.606] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.614] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.624] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.633] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.642] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.650] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.659] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.666] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.672] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:12.696] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C0.dat
[15:50:12.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C1.dat
[15:50:12.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C2.dat
[15:50:12.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C3.dat
[15:50:12.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C4.dat
[15:50:12.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C5.dat
[15:50:12.697] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C6.dat
[15:50:12.698] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C7.dat
[15:50:12.698] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C8.dat
[15:50:12.698] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C9.dat
[15:50:12.698] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C10.dat
[15:50:12.698] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C11.dat
[15:50:12.698] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C12.dat
[15:50:12.699] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C13.dat
[15:50:12.699] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C14.dat
[15:50:12.699] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//dacParameters35_C15.dat
[15:50:16.575] <TB0> INFO: Test took 3874ms.
[15:50:20.950] <TB0> INFO: Test took 4097ms.
[15:50:25.083] <TB0> INFO: Test took 3866ms.
[15:50:25.364] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:26.304] <TB0> INFO: Test took 940ms.
[15:50:26.306] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:27.420] <TB0> INFO: Test took 1114ms.
[15:50:27.422] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:28.536] <TB0> INFO: Test took 1114ms.
[15:50:28.539] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:29.651] <TB0> INFO: Test took 1113ms.
[15:50:29.653] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:30.763] <TB0> INFO: Test took 1110ms.
[15:50:30.764] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:31.921] <TB0> INFO: Test took 1157ms.
[15:50:31.923] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:33.051] <TB0> INFO: Test took 1128ms.
[15:50:33.054] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:34.184] <TB0> INFO: Test took 1130ms.
[15:50:34.186] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:35.315] <TB0> INFO: Test took 1129ms.
[15:50:35.317] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:36.431] <TB0> INFO: Test took 1114ms.
[15:50:36.432] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:37.546] <TB0> INFO: Test took 1114ms.
[15:50:37.550] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:38.689] <TB0> INFO: Test took 1140ms.
[15:50:38.690] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:39.850] <TB0> INFO: Test took 1160ms.
[15:50:39.853] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:40.982] <TB0> INFO: Test took 1130ms.
[15:50:40.984] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:42.098] <TB0> INFO: Test took 1114ms.
[15:50:42.100] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:43.214] <TB0> INFO: Test took 1114ms.
[15:50:43.217] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:44.346] <TB0> INFO: Test took 1129ms.
[15:50:44.348] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:45.492] <TB0> INFO: Test took 1144ms.
[15:50:45.495] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:46.609] <TB0> INFO: Test took 1114ms.
[15:50:46.611] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:47.772] <TB0> INFO: Test took 1161ms.
[15:50:47.774] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:48.903] <TB0> INFO: Test took 1129ms.
[15:50:48.905] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:50.032] <TB0> INFO: Test took 1127ms.
[15:50:50.033] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:51.191] <TB0> INFO: Test took 1158ms.
[15:50:51.193] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:52.302] <TB0> INFO: Test took 1109ms.
[15:50:52.304] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:53.419] <TB0> INFO: Test took 1115ms.
[15:50:53.421] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:54.564] <TB0> INFO: Test took 1143ms.
[15:50:54.565] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:55.712] <TB0> INFO: Test took 1147ms.
[15:50:55.714] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:56.823] <TB0> INFO: Test took 1109ms.
[15:50:56.825] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:57.970] <TB0> INFO: Test took 1145ms.
[15:50:57.973] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:59.103] <TB0> INFO: Test took 1130ms.
[15:50:59.106] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:00.253] <TB0> INFO: Test took 1147ms.
[15:51:00.256] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:01.399] <TB0> INFO: Test took 1143ms.
[15:51:01.926] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 693 seconds
[15:51:01.926] <TB0> INFO: PH scale (per ROC): 82 78 74 84 80 80 78 90 83 78 77 89 90 87 79 80
[15:51:01.926] <TB0> INFO: PH offset (per ROC): 160 159 171 157 154 150 162 144 163 146 154 150 157 160 158 144
[15:51:02.098] <TB0> INFO: ######################################################################
[15:51:02.098] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:51:02.098] <TB0> INFO: ######################################################################
[15:51:02.108] <TB0> INFO: scanning low vcal = 10
[15:51:06.244] <TB0> INFO: Test took 4136ms.
[15:51:06.247] <TB0> INFO: scanning low vcal = 20
[15:51:10.476] <TB0> INFO: Test took 4229ms.
[15:51:10.480] <TB0> INFO: scanning low vcal = 30
[15:51:14.771] <TB0> INFO: Test took 4291ms.
[15:51:14.784] <TB0> INFO: scanning low vcal = 40
[15:51:19.758] <TB0> INFO: Test took 4974ms.
[15:51:19.818] <TB0> INFO: scanning low vcal = 50
[15:51:24.854] <TB0> INFO: Test took 5036ms.
[15:51:24.930] <TB0> INFO: scanning low vcal = 60
[15:51:29.784] <TB0> INFO: Test took 4854ms.
[15:51:29.875] <TB0> INFO: scanning low vcal = 70
[15:51:35.035] <TB0> INFO: Test took 5160ms.
[15:51:35.114] <TB0> INFO: scanning low vcal = 80
[15:51:40.070] <TB0> INFO: Test took 4956ms.
[15:51:40.130] <TB0> INFO: scanning low vcal = 90
[15:51:44.980] <TB0> INFO: Test took 4850ms.
[15:51:45.041] <TB0> INFO: scanning low vcal = 100
[15:51:49.920] <TB0> INFO: Test took 4879ms.
[15:51:49.983] <TB0> INFO: scanning low vcal = 110
[15:51:54.953] <TB0> INFO: Test took 4970ms.
[15:51:55.024] <TB0> INFO: scanning low vcal = 120
[15:51:59.901] <TB0> INFO: Test took 4877ms.
[15:51:59.966] <TB0> INFO: scanning low vcal = 130
[15:52:04.940] <TB0> INFO: Test took 4974ms.
[15:52:05.004] <TB0> INFO: scanning low vcal = 140
[15:52:10.010] <TB0> INFO: Test took 5006ms.
[15:52:10.068] <TB0> INFO: scanning low vcal = 150
[15:52:15.026] <TB0> INFO: Test took 4958ms.
[15:52:15.087] <TB0> INFO: scanning low vcal = 160
[15:52:20.080] <TB0> INFO: Test took 4993ms.
[15:52:20.158] <TB0> INFO: scanning low vcal = 170
[15:52:24.964] <TB0> INFO: Test took 4806ms.
[15:52:25.023] <TB0> INFO: scanning low vcal = 180
[15:52:29.828] <TB0> INFO: Test took 4805ms.
[15:52:29.891] <TB0> INFO: scanning low vcal = 190
[15:52:34.906] <TB0> INFO: Test took 5015ms.
[15:52:34.968] <TB0> INFO: scanning low vcal = 200
[15:52:39.712] <TB0> INFO: Test took 4744ms.
[15:52:39.790] <TB0> INFO: scanning low vcal = 210
[15:52:44.431] <TB0> INFO: Test took 4641ms.
[15:52:44.506] <TB0> INFO: scanning low vcal = 220
[15:52:49.105] <TB0> INFO: Test took 4599ms.
[15:52:49.160] <TB0> INFO: scanning low vcal = 230
[15:52:53.905] <TB0> INFO: Test took 4746ms.
[15:52:53.977] <TB0> INFO: scanning low vcal = 240
[15:52:58.698] <TB0> INFO: Test took 4721ms.
[15:52:58.776] <TB0> INFO: scanning low vcal = 250
[15:53:03.584] <TB0> INFO: Test took 4807ms.
[15:53:03.653] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[15:53:08.384] <TB0> INFO: Test took 4731ms.
[15:53:08.446] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[15:53:13.191] <TB0> INFO: Test took 4745ms.
[15:53:13.251] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[15:53:17.973] <TB0> INFO: Test took 4722ms.
[15:53:18.030] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[15:53:22.680] <TB0> INFO: Test took 4650ms.
[15:53:22.772] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:53:27.507] <TB0> INFO: Test took 4735ms.
[15:53:28.093] <TB0> INFO: PixTestGainPedestal::measure() done
[15:54:02.869] <TB0> INFO: PixTestGainPedestal::fit() done
[15:54:02.869] <TB0> INFO: non-linearity mean: 0.957 0.955 0.956 0.959 0.957 0.961 0.957 0.953 0.963 0.954 0.960 0.957 0.960 0.953 0.959 0.964
[15:54:02.869] <TB0> INFO: non-linearity RMS: 0.006 0.008 0.007 0.006 0.006 0.005 0.005 0.006 0.005 0.006 0.006 0.006 0.005 0.006 0.007 0.005
[15:54:02.869] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[15:54:02.891] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[15:54:02.910] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[15:54:02.934] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[15:54:02.963] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[15:54:02.982] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[15:54:03.002] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[15:54:03.032] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[15:54:03.052] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[15:54:03.071] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[15:54:03.090] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[15:54:03.109] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[15:54:03.128] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[15:54:03.147] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[15:54:03.166] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[15:54:03.185] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[15:54:03.204] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 181 seconds
[15:54:03.211] <TB0> INFO: enter test to run
[15:54:03.212] <TB0> INFO: test: exit no parameter change
[15:54:03.645] <TB0> QUIET: Connection to board 126 closed.
[15:54:03.645] <TB0> INFO: pXar: this is the end, my friend