[11:10:24.296] <TB0> INFO: *** Welcome to pxar ***
[11:10:24.296] <TB0> INFO: *** Today: 2015/08/04
[11:10:24.296] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C15.dat
[11:10:24.297] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//tbmParameters_C0b.dat
[11:10:24.297] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//defaultMaskFile.dat
[11:10:24.297] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters_C15.dat
[11:10:24.356] <TB0> INFO: clk: 4
[11:10:24.356] <TB0> INFO: ctr: 4
[11:10:24.356] <TB0> INFO: sda: 19
[11:10:24.356] <TB0> INFO: tin: 9
[11:10:24.356] <TB0> INFO: level: 15
[11:10:24.356] <TB0> INFO: triggerdelay: 0
[11:10:24.356] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[11:10:24.356] <TB0> INFO: Log level: INFO
[11:10:24.370] <TB0> INFO: Found DTB DTB_WWVASW
[11:10:24.379] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[11:10:24.382] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[11:10:24.385] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[11:10:25.895] <TB0> INFO: DUT info:
[11:10:25.895] <TB0> INFO: The DUT currently contains the following objects:
[11:10:25.895] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:10:25.895] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:10:25.895] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:10:25.895] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:10:25.895] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.895] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.895] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.895] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.895] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.895] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:25.896] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:10:26.296] <TB0> INFO: enter 'restricted' command line mode
[11:10:26.297] <TB0> INFO: enter test to run
[11:10:26.297] <TB0> INFO: test: pretest no parameter change
[11:10:26.297] <TB0> INFO: running: pretest
[11:10:26.301] <TB0> INFO: ######################################################################
[11:10:26.301] <TB0> INFO: PixTestPretest::doTest()
[11:10:26.301] <TB0> INFO: ######################################################################
[11:10:26.302] <TB0> INFO: ----------------------------------------------------------------------
[11:10:26.302] <TB0> INFO: PixTestPretest::programROC()
[11:10:26.302] <TB0> INFO: ----------------------------------------------------------------------
[11:10:44.317] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:10:44.318] <TB0> INFO: IA differences per ROC: 18.5 18.5 18.5 19.3 17.7 18.5 20.9 18.5 18.5 20.1 20.1 21.7 19.3 17.7 19.3 18.5
[11:10:44.369] <TB0> INFO: ----------------------------------------------------------------------
[11:10:44.369] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:10:44.369] <TB0> INFO: ----------------------------------------------------------------------
[11:10:48.827] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 391.5 mA = 24.4688 mA/ROC
[11:10:48.830] <TB0> INFO: ----------------------------------------------------------------------
[11:10:48.830] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:10:48.830] <TB0> INFO: ----------------------------------------------------------------------
[11:10:59.194] <TB0> INFO: Test took 10358ms.
[11:10:59.492] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:10:59.512] <TB0> INFO: ----------------------------------------------------------------------
[11:10:59.512] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:10:59.512] <TB0> INFO: ----------------------------------------------------------------------
[11:11:10.308] <TB0> INFO: Test took 10790ms.
[11:11:10.595] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:11:10.595] <TB0> INFO: CalDel: 114 165 132 132 148 153 127 163 131 144 143 162 170 146 150 156
[11:11:10.595] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:11:10.600] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C0.dat
[11:11:10.600] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C1.dat
[11:11:10.600] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C2.dat
[11:11:10.601] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C3.dat
[11:11:10.601] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C4.dat
[11:11:10.601] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C5.dat
[11:11:10.601] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C6.dat
[11:11:10.602] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C7.dat
[11:11:10.602] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C8.dat
[11:11:10.602] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C9.dat
[11:11:10.602] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C10.dat
[11:11:10.602] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C11.dat
[11:11:10.603] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C12.dat
[11:11:10.603] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C13.dat
[11:11:10.603] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C14.dat
[11:11:10.603] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters_C15.dat
[11:11:10.603] <TB0> INFO: PixTestPretest::doTest() done, duration: 44 seconds
[11:11:10.696] <TB0> INFO: enter test to run
[11:11:10.697] <TB0> INFO: test: fulltest no parameter change
[11:11:10.697] <TB0> INFO: running: fulltest
[11:11:10.697] <TB0> INFO: ######################################################################
[11:11:10.697] <TB0> INFO: PixTestFullTest::doTest()
[11:11:10.697] <TB0> INFO: ######################################################################
[11:11:10.698] <TB0> INFO: ######################################################################
[11:11:10.698] <TB0> INFO: PixTestAlive::doTest()
[11:11:10.698] <TB0> INFO: ######################################################################
[11:11:10.700] <TB0> INFO: ----------------------------------------------------------------------
[11:11:10.700] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:11:10.700] <TB0> INFO: ----------------------------------------------------------------------
[11:11:14.718] <TB0> INFO: Test took 4018ms.
[11:11:14.740] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:14.949] <TB0> INFO: PixTestAlive::aliveTest() done
[11:11:14.949] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:11:14.951] <TB0> INFO: ----------------------------------------------------------------------
[11:11:14.951] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:11:14.951] <TB0> INFO: ----------------------------------------------------------------------
[11:11:18.046] <TB0> INFO: Test took 3095ms.
[11:11:18.049] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:18.050] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:11:18.261] <TB0> INFO: PixTestAlive::maskTest() done
[11:11:18.261] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:11:18.263] <TB0> INFO: ----------------------------------------------------------------------
[11:11:18.263] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:11:18.263] <TB0> INFO: ----------------------------------------------------------------------
[11:11:22.478] <TB0> INFO: Test took 4214ms.
[11:11:22.505] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:22.717] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:11:22.717] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:11:22.717] <TB0> INFO: PixTestAlive::doTest() done, duration: 12 seconds
[11:11:22.728] <TB0> INFO: ######################################################################
[11:11:22.728] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:11:22.728] <TB0> INFO: ######################################################################
[11:11:22.730] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[11:11:22.741] <TB0> INFO: dacScan step from 0 .. 29
[11:11:48.599] <TB0> INFO: Test took 25858ms.
[11:11:48.636] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:48.640] <TB0> INFO: dacScan step from 30 .. 59
[11:12:16.733] <TB0> INFO: Test took 28093ms.
[11:12:16.833] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:16.846] <TB0> INFO: dacScan step from 60 .. 89
[11:12:55.160] <TB0> INFO: Test took 38314ms.
[11:12:55.435] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:55.530] <TB0> INFO: dacScan step from 90 .. 119
[11:13:35.201] <TB0> INFO: Test took 39671ms.
[11:13:35.445] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:35.523] <TB0> INFO: dacScan step from 120 .. 149
[11:14:05.791] <TB0> INFO: Test took 30268ms.
[11:14:06.008] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:28.791] <TB0> INFO: PixTestBBMap::doTest() done, duration: 186 seconds
[11:14:28.791] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0
[11:14:28.791] <TB0> INFO: separation cut (per ROC): 94 86 96 95 80 103 88 68 86 87 88 91 88 78 92 78
[11:14:28.869] <TB0> INFO: ######################################################################
[11:14:28.869] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[11:14:28.869] <TB0> INFO: ######################################################################
[11:14:28.869] <TB0> INFO: ----------------------------------------------------------------------
[11:14:28.869] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[11:14:28.869] <TB0> INFO: ----------------------------------------------------------------------
[11:14:28.869] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[11:14:28.879] <TB0> INFO: dacScan step from 0 .. 3
[11:14:53.113] <TB0> INFO: Test took 24234ms.
[11:14:53.139] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:53.139] <TB0> INFO: dacScan step from 4 .. 7
[11:15:16.777] <TB0> INFO: Test took 23638ms.
[11:15:16.801] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:16.801] <TB0> INFO: dacScan step from 8 .. 11
[11:15:39.278] <TB0> INFO: Test took 22477ms.
[11:15:39.306] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:39.306] <TB0> INFO: dacScan step from 12 .. 15
[11:16:04.296] <TB0> INFO: Test took 24990ms.
[11:16:04.322] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:04.323] <TB0> INFO: dacScan step from 16 .. 19
[11:16:29.239] <TB0> INFO: Test took 24916ms.
[11:16:29.268] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:29.268] <TB0> INFO: dacScan step from 20 .. 23
[11:16:54.404] <TB0> INFO: Test took 25136ms.
[11:16:54.437] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:54.437] <TB0> INFO: dacScan step from 24 .. 27
[11:17:19.565] <TB0> INFO: Test took 25128ms.
[11:17:19.591] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:19.591] <TB0> INFO: dacScan step from 28 .. 31
[11:17:42.690] <TB0> INFO: Test took 23099ms.
[11:17:42.716] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:42.716] <TB0> INFO: dacScan step from 32 .. 35
[11:18:05.956] <TB0> INFO: Test took 23240ms.
[11:18:05.989] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:05.989] <TB0> INFO: dacScan step from 36 .. 39
[11:18:30.844] <TB0> INFO: Test took 24855ms.
[11:18:30.872] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:30.872] <TB0> INFO: dacScan step from 40 .. 43
[11:18:55.484] <TB0> INFO: Test took 24612ms.
[11:18:55.516] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:55.516] <TB0> INFO: dacScan step from 44 .. 47
[11:19:20.548] <TB0> INFO: Test took 25032ms.
[11:19:20.577] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:20.577] <TB0> INFO: dacScan step from 48 .. 51
[11:19:45.578] <TB0> INFO: Test took 25001ms.
[11:19:45.606] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:45.606] <TB0> INFO: dacScan step from 52 .. 55
[11:20:10.400] <TB0> INFO: Test took 24794ms.
[11:20:10.427] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:10.427] <TB0> INFO: dacScan step from 56 .. 59
[11:20:35.867] <TB0> INFO: Test took 25440ms.
[11:20:35.891] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:35.892] <TB0> INFO: dacScan step from 60 .. 63
[11:21:01.540] <TB0> INFO: Test took 25648ms.
[11:21:01.572] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:01.572] <TB0> INFO: dacScan step from 64 .. 67
[11:21:26.462] <TB0> INFO: Test took 24890ms.
[11:21:26.492] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:26.492] <TB0> INFO: dacScan step from 68 .. 71
[11:21:52.330] <TB0> INFO: Test took 25838ms.
[11:21:52.376] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:52.377] <TB0> INFO: dacScan step from 72 .. 75
[11:22:18.188] <TB0> INFO: Test took 25811ms.
[11:22:18.252] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:18.255] <TB0> INFO: dacScan step from 76 .. 79
[11:22:43.241] <TB0> INFO: Test took 24986ms.
[11:22:43.325] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:43.329] <TB0> INFO: dacScan step from 80 .. 83
[11:23:12.048] <TB0> INFO: Test took 28719ms.
[11:23:12.173] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:12.180] <TB0> INFO: dacScan step from 84 .. 87
[11:23:43.938] <TB0> INFO: Test took 31758ms.
[11:23:44.114] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:44.123] <TB0> INFO: dacScan step from 88 .. 91
[11:24:20.478] <TB0> INFO: Test took 36355ms.
[11:24:20.666] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:20.679] <TB0> INFO: dacScan step from 92 .. 95
[11:24:57.865] <TB0> INFO: Test took 37185ms.
[11:24:58.095] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:58.106] <TB0> INFO: dacScan step from 96 .. 99





[11:25:36.853] <TB0> INFO: Test took 38747ms.
[11:25:37.086] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:37.099] <TB0> INFO: dacScan step from 100 .. 103

[11:26:17.363] <TB0> INFO: Test took 40264ms.
[11:26:17.621] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:17.636] <TB0> INFO: dacScan step from 104 .. 107


[11:26:57.676] <TB0> INFO: Test took 40040ms.
[11:26:57.900] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:57.912] <TB0> INFO: dacScan step from 108 .. 111


[11:27:37.736] <TB0> INFO: Test took 39824ms.
[11:27:37.967] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:37.979] <TB0> INFO: dacScan step from 112 .. 115


[11:28:17.336] <TB0> INFO: Test took 39357ms.
[11:28:17.550] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:17.562] <TB0> INFO: dacScan step from 116 .. 119
[11:28:58.771] <TB0> INFO: Test took 41209ms.
[11:28:59.026] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:59.037] <TB0> INFO: dacScan step from 120 .. 123
[11:29:39.737] <TB0> INFO: Test took 40700ms.
[11:29:39.965] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:39.977] <TB0> INFO: dacScan step from 124 .. 127
[11:30:16.276] <TB0> INFO: Test took 36299ms.
[11:30:16.524] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:16.537] <TB0> INFO: dacScan step from 128 .. 131
[11:30:56.759] <TB0> INFO: Test took 40222ms.
[11:30:56.999] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:57.010] <TB0> INFO: dacScan step from 132 .. 135
[11:31:43.219] <TB0> INFO: Test took 46209ms.
[11:31:43.454] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:43.465] <TB0> INFO: dacScan step from 136 .. 139
[11:32:24.110] <TB0> INFO: Test took 40645ms.
[11:32:24.340] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:24.352] <TB0> INFO: dacScan step from 140 .. 143
[11:32:59.086] <TB0> INFO: Test took 34734ms.
[11:32:59.316] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:59.329] <TB0> INFO: dacScan step from 144 .. 147
[11:33:38.976] <TB0> INFO: Test took 39647ms.
[11:33:39.203] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:39.213] <TB0> INFO: dacScan step from 148 .. 149
[11:34:01.233] <TB0> INFO: Test took 22020ms.
[11:34:01.344] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:01.355] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:02.713] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:04.088] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:05.422] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:06.763] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:08.143] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:09.500] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:10.866] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:12.283] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:13.653] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:15.027] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:16.387] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:17.772] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:19.145] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:20.542] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:21.920] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:34:23.321] <TB0> INFO: PixTestScurves::scurves() done
[11:34:23.321] <TB0> INFO: Vcal mean: 94.30 93.29 98.72 95.40 82.18 101.02 85.70 74.21 91.23 83.02 87.92 80.62 85.01 80.29 87.32 85.19
[11:34:23.321] <TB0> INFO: Vcal RMS: 5.81 5.38 6.02 5.60 4.10 6.51 5.58 4.22 5.95 5.10 5.47 4.52 5.32 4.20 6.27 5.38
[11:34:23.322] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1194 seconds
[11:34:23.391] <TB0> INFO: ######################################################################
[11:34:23.391] <TB0> INFO: PixTestTrim::doTest()
[11:34:23.391] <TB0> INFO: ######################################################################
[11:34:23.392] <TB0> INFO: ----------------------------------------------------------------------
[11:34:23.392] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[11:34:23.392] <TB0> INFO: ----------------------------------------------------------------------
[11:34:23.482] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:34:23.482] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:34:23.493] <TB0> INFO: dacScan step from 0 .. 19
[11:34:41.473] <TB0> INFO: Test took 17980ms.
[11:34:41.494] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:41.494] <TB0> INFO: dacScan step from 20 .. 39
[11:34:59.869] <TB0> INFO: Test took 18376ms.
[11:34:59.891] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:59.891] <TB0> INFO: dacScan step from 40 .. 59
[11:35:17.892] <TB0> INFO: Test took 18001ms.
[11:35:17.914] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:17.914] <TB0> INFO: dacScan step from 60 .. 79
[11:35:35.232] <TB0> INFO: Test took 17318ms.
[11:35:35.260] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:35.260] <TB0> INFO: dacScan step from 80 .. 99
[11:35:53.588] <TB0> INFO: Test took 18328ms.
[11:35:53.648] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:53.656] <TB0> INFO: dacScan step from 100 .. 119
[11:36:17.876] <TB0> INFO: Test took 24220ms.
[11:36:18.040] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:18.069] <TB0> INFO: dacScan step from 120 .. 139
[11:36:42.671] <TB0> INFO: Test took 24602ms.
[11:36:42.819] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:42.846] <TB0> INFO: dacScan step from 140 .. 159
[11:37:02.954] <TB0> INFO: Test took 20107ms.
[11:37:03.016] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:24.767] <TB0> INFO: ROC 0 VthrComp = 99
[11:37:24.767] <TB0> INFO: ROC 1 VthrComp = 94
[11:37:24.767] <TB0> INFO: ROC 2 VthrComp = 99
[11:37:24.768] <TB0> INFO: ROC 3 VthrComp = 100
[11:37:24.768] <TB0> INFO: ROC 4 VthrComp = 89
[11:37:24.768] <TB0> INFO: ROC 5 VthrComp = 101
[11:37:24.768] <TB0> INFO: ROC 6 VthrComp = 90
[11:37:24.768] <TB0> INFO: ROC 7 VthrComp = 79
[11:37:24.768] <TB0> INFO: ROC 8 VthrComp = 94
[11:37:24.768] <TB0> INFO: ROC 9 VthrComp = 89
[11:37:24.768] <TB0> INFO: ROC 10 VthrComp = 91
[11:37:24.768] <TB0> INFO: ROC 11 VthrComp = 87
[11:37:24.768] <TB0> INFO: ROC 12 VthrComp = 89
[11:37:24.768] <TB0> INFO: ROC 13 VthrComp = 84
[11:37:24.768] <TB0> INFO: ROC 14 VthrComp = 90
[11:37:24.768] <TB0> INFO: ROC 15 VthrComp = 88
[11:37:24.768] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:37:24.768] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:37:24.778] <TB0> INFO: dacScan step from 0 .. 19
[11:37:42.922] <TB0> INFO: Test took 18144ms.
[11:37:42.943] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:42.943] <TB0> INFO: dacScan step from 20 .. 39
[11:38:01.518] <TB0> INFO: Test took 18575ms.
[11:38:01.547] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:01.550] <TB0> INFO: dacScan step from 40 .. 59
[11:38:24.851] <TB0> INFO: Test took 23301ms.
[11:38:25.073] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:25.135] <TB0> INFO: dacScan step from 60 .. 79
[11:38:50.690] <TB0> INFO: Test took 25555ms.
[11:38:50.867] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:50.912] <TB0> INFO: dacScan step from 80 .. 99
[11:39:17.291] <TB0> INFO: Test took 26379ms.
[11:39:17.448] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:17.496] <TB0> INFO: dacScan step from 100 .. 119
[11:39:44.225] <TB0> INFO: Test took 26729ms.
[11:39:44.387] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:44.431] <TB0> INFO: dacScan step from 120 .. 139
[11:40:11.242] <TB0> INFO: Test took 26811ms.
[11:40:11.414] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:11.458] <TB0> INFO: dacScan step from 140 .. 159
[11:40:37.118] <TB0> INFO: Test took 25659ms.
[11:40:37.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:02.019] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 61.76 for pixel 15/77 mean/min/max = 46.7691/31.6956/61.8427
[11:41:02.019] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 59.5832 for pixel 23/8 mean/min/max = 45.8172/31.9417/59.6927
[11:41:02.020] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 63.445 for pixel 48/11 mean/min/max = 47.6623/31.5545/63.7702
[11:41:02.020] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 58.8748 for pixel 20/41 mean/min/max = 45.2989/31.34/59.2579
[11:41:02.020] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 55.7962 for pixel 14/0 mean/min/max = 44.745/33.437/56.0529
[11:41:02.021] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 63.6565 for pixel 24/6 mean/min/max = 47.9183/31.6605/64.1762
[11:41:02.021] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 61.4611 for pixel 0/15 mean/min/max = 46.437/31.2758/61.5981
[11:41:02.021] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.6843 for pixel 2/1 mean/min/max = 46.439/35.0844/57.7936
[11:41:02.022] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 61.2154 for pixel 3/21 mean/min/max = 46.0416/30.7994/61.2838
[11:41:02.022] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 59.5534 for pixel 17/78 mean/min/max = 45.9823/32.4039/59.5606
[11:41:02.022] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 59.5834 for pixel 24/69 mean/min/max = 45.7212/31.8591/59.5834
[11:41:02.023] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.3963 for pixel 8/75 mean/min/max = 45.0557/31.645/58.4663
[11:41:02.023] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 60.3856 for pixel 1/78 mean/min/max = 46.4727/32.4684/60.4771
[11:41:02.023] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 57.4447 for pixel 3/67 mean/min/max = 45.2001/32.8461/57.5542
[11:41:02.024] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 62.5817 for pixel 0/79 mean/min/max = 46.8379/30.9917/62.6841
[11:41:02.024] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 61.2694 for pixel 9/2 mean/min/max = 46.9168/32.4821/61.3515
[11:41:02.024] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:10.060] <TB0> INFO: Test took 128036ms.
[11:43:11.532] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:43:11.541] <TB0> INFO: dacScan step from 0 .. 19
[11:43:38.506] <TB0> INFO: Test took 26966ms.
[11:43:38.550] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:38.552] <TB0> INFO: dacScan step from 20 .. 39
[11:44:15.903] <TB0> INFO: Test took 37351ms.
[11:44:16.143] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:16.188] <TB0> INFO: dacScan step from 40 .. 59
[11:45:00.963] <TB0> INFO: Test took 44775ms.
[11:45:01.274] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:01.339] <TB0> INFO: dacScan step from 60 .. 79





[11:45:45.137] <TB0> INFO: Test took 43798ms.
[11:45:45.408] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:45.466] <TB0> INFO: dacScan step from 80 .. 99



[11:46:28.887] <TB0> INFO: Test took 43421ms.
[11:46:29.182] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:29.238] <TB0> INFO: dacScan step from 100 .. 119
[11:47:11.455] <TB0> INFO: Test took 42217ms.
[11:47:11.767] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:11.818] <TB0> INFO: dacScan step from 120 .. 139





[11:47:48.423] <TB0> INFO: Test took 36606ms.
[11:47:48.721] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:48.786] <TB0> INFO: dacScan step from 140 .. 159

[11:48:34.758] <TB0> INFO: Test took 45971ms.
[11:48:35.020] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:35.065] <TB0> INFO: dacScan step from 160 .. 179


[11:49:18.052] <TB0> INFO: Test took 42987ms.
[11:49:18.314] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:18.359] <TB0> INFO: dacScan step from 180 .. 199


[11:50:02.053] <TB0> INFO: Test took 43694ms.
[11:50:02.315] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:27.049] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.051943 .. 255.000000
[11:50:27.136] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[11:50:27.148] <TB0> INFO: dacScan step from 0 .. 19
[11:50:43.041] <TB0> INFO: Test took 15893ms.
[11:50:43.060] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:43.060] <TB0> INFO: dacScan step from 20 .. 39
[11:51:00.124] <TB0> INFO: Test took 17064ms.
[11:51:00.201] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:00.220] <TB0> INFO: dacScan step from 40 .. 59
[11:51:21.523] <TB0> INFO: Test took 21303ms.
[11:51:21.700] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:21.753] <TB0> INFO: dacScan step from 60 .. 79
[11:51:43.054] <TB0> INFO: Test took 21301ms.
[11:51:43.206] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:43.271] <TB0> INFO: dacScan step from 80 .. 99
[11:52:04.208] <TB0> INFO: Test took 20937ms.
[11:52:04.369] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:04.427] <TB0> INFO: dacScan step from 100 .. 119
[11:52:26.479] <TB0> INFO: Test took 22052ms.
[11:52:26.623] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:26.679] <TB0> INFO: dacScan step from 120 .. 139
[11:52:47.011] <TB0> INFO: Test took 20332ms.
[11:52:47.154] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:47.204] <TB0> INFO: dacScan step from 140 .. 159
[11:53:07.082] <TB0> INFO: Test took 19877ms.
[11:53:07.217] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:07.269] <TB0> INFO: dacScan step from 160 .. 179
[11:53:27.729] <TB0> INFO: Test took 20460ms.
[11:53:27.868] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:27.927] <TB0> INFO: dacScan step from 180 .. 199
[11:53:49.157] <TB0> INFO: Test took 21229ms.
[11:53:49.292] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:49.348] <TB0> INFO: dacScan step from 200 .. 219
[11:54:11.938] <TB0> INFO: Test took 22590ms.
[11:54:12.096] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:12.172] <TB0> INFO: dacScan step from 220 .. 239
[11:54:34.883] <TB0> INFO: Test took 22710ms.
[11:54:35.028] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:35.093] <TB0> INFO: dacScan step from 240 .. 255
[11:54:53.503] <TB0> INFO: Test took 18410ms.
[11:54:53.637] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:26.408] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 12.971809 .. 45.116095
[11:55:26.506] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 55 (20) hits flags = 16 (plus default)
[11:55:26.515] <TB0> INFO: dacScan step from 2 .. 21
[11:55:42.217] <TB0> INFO: Test took 15702ms.
[11:55:42.242] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:42.242] <TB0> INFO: dacScan step from 22 .. 41
[11:56:00.912] <TB0> INFO: Test took 18670ms.
[11:56:01.009] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:01.036] <TB0> INFO: dacScan step from 42 .. 55
[11:56:17.737] <TB0> INFO: Test took 16701ms.
[11:56:17.838] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:33.531] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 17.864664 .. 41.017071
[11:56:33.610] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 51 (20) hits flags = 16 (plus default)
[11:56:33.619] <TB0> INFO: dacScan step from 7 .. 26
[11:56:49.605] <TB0> INFO: Test took 15985ms.
[11:56:49.628] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:49.628] <TB0> INFO: dacScan step from 27 .. 46
[11:57:08.531] <TB0> INFO: Test took 18903ms.
[11:57:08.673] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:08.716] <TB0> INFO: dacScan step from 47 .. 51
[11:57:16.204] <TB0> INFO: Test took 7488ms.
[11:57:16.259] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:30.841] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 2.089584 .. 41.017071
[11:57:30.919] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 51 (20) hits flags = 16 (plus default)
[11:57:30.929] <TB0> INFO: dacScan step from 2 .. 21
[11:57:47.197] <TB0> INFO: Test took 16268ms.
[11:57:47.222] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:47.222] <TB0> INFO: dacScan step from 22 .. 41
[11:58:06.064] <TB0> INFO: Test took 18842ms.
[11:58:06.152] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:06.181] <TB0> INFO: dacScan step from 42 .. 51
[11:58:19.356] <TB0> INFO: Test took 13175ms.
[11:58:19.457] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:33.948] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:58:33.949] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:58:33.958] <TB0> INFO: dacScan step from 15 .. 34
[11:59:04.312] <TB0> INFO: Test took 30354ms.
[11:59:04.382] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:04.390] <TB0> INFO: dacScan step from 35 .. 54


[11:59:47.517] <TB0> INFO: Test took 43127ms.
[11:59:47.819] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:47.874] <TB0> INFO: dacScan step from 55 .. 55
[11:59:52.743] <TB0> INFO: Test took 4869ms.
[11:59:52.758] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:06.402] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C0.dat
[12:00:06.444] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C1.dat
[12:00:06.444] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C2.dat
[12:00:06.444] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C3.dat
[12:00:06.444] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C4.dat
[12:00:06.444] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C5.dat
[12:00:06.444] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C6.dat
[12:00:06.445] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C7.dat
[12:00:06.445] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C8.dat
[12:00:06.445] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C9.dat
[12:00:06.445] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C10.dat
[12:00:06.445] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C11.dat
[12:00:06.445] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C12.dat
[12:00:06.445] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C13.dat
[12:00:06.445] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C14.dat
[12:00:06.446] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C15.dat
[12:00:06.446] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C0.dat
[12:00:06.454] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C1.dat
[12:00:06.463] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C2.dat
[12:00:06.471] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C3.dat
[12:00:06.479] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C4.dat
[12:00:06.484] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C5.dat
[12:00:06.490] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C6.dat
[12:00:06.496] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C7.dat
[12:00:06.502] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C8.dat
[12:00:06.508] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C9.dat
[12:00:06.514] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C10.dat
[12:00:06.520] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C11.dat
[12:00:06.525] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C12.dat
[12:00:06.531] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C13.dat
[12:00:06.537] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C14.dat
[12:00:06.543] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//trimParameters35_C15.dat
[12:00:06.549] <TB0> INFO: PixTestTrim::trimTest() done
[12:00:06.549] <TB0> INFO: vtrim: 121 106 133 123 100 127 106 97 116 103 115 112 118 100 112 108
[12:00:06.549] <TB0> INFO: vthrcomp: 99 94 99 100 89 101 90 79 94 89 91 87 89 84 90 88
[12:00:06.549] <TB0> INFO: vcal mean: 35.01 35.05 35.06 35.05 35.00 35.04 35.02 35.08 35.04 34.97 35.03 34.98 35.04 35.07 35.05 35.08
[12:00:06.549] <TB0> INFO: vcal RMS: 1.17 1.18 1.24 1.04 0.95 1.24 1.00 0.95 1.08 1.05 1.04 0.99 0.96 0.97 1.06 1.02
[12:00:06.549] <TB0> INFO: bits mean: 9.98 9.88 9.63 10.17 9.76 9.74 9.50 9.05 10.31 9.67 10.20 10.04 9.60 10.01 9.14 9.26
[12:00:06.549] <TB0> INFO: bits RMS: 2.40 2.51 2.55 2.51 2.39 2.46 2.73 2.37 2.37 2.53 2.37 2.51 2.53 2.36 2.88 2.67
[12:00:06.555] <TB0> INFO: ----------------------------------------------------------------------
[12:00:06.555] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:00:06.555] <TB0> INFO: ----------------------------------------------------------------------
[12:00:06.557] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:00:06.565] <TB0> INFO: dacScan step from 0 .. 19
[12:00:35.678] <TB0> INFO: Test took 29113ms.
[12:00:35.720] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:35.720] <TB0> INFO: dacScan step from 20 .. 39
[12:01:05.034] <TB0> INFO: Test took 29314ms.
[12:01:05.070] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:05.070] <TB0> INFO: dacScan step from 40 .. 59
[12:01:32.690] <TB0> INFO: Test took 27620ms.
[12:01:32.724] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:32.724] <TB0> INFO: dacScan step from 60 .. 79
[12:02:01.115] <TB0> INFO: Test took 28391ms.
[12:02:01.148] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:01.148] <TB0> INFO: dacScan step from 80 .. 99
[12:02:30.588] <TB0> INFO: Test took 29440ms.
[12:02:30.641] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:30.644] <TB0> INFO: dacScan step from 100 .. 119
[12:03:08.648] <TB0> INFO: Test took 38004ms.
[12:03:08.847] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:08.869] <TB0> INFO: dacScan step from 120 .. 139



[12:03:53.652] <TB0> INFO: Test took 44783ms.
[12:03:53.934] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:53.974] <TB0> INFO: dacScan step from 140 .. 159

[12:04:35.474] <TB0> INFO: Test took 41500ms.
[12:04:35.747] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:35.804] <TB0> INFO: dacScan step from 160 .. 179
[12:05:17.368] <TB0> INFO: Test took 41564ms.
[12:05:17.639] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:17.683] <TB0> INFO: dacScan step from 180 .. 199
[12:05:58.331] <TB0> INFO: Test took 40648ms.
[12:05:58.643] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:26.983] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 174 (20) hits flags = 16 (plus default)
[12:06:26.992] <TB0> INFO: dacScan step from 0 .. 19
[12:06:55.652] <TB0> INFO: Test took 28660ms.
[12:06:55.694] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:55.694] <TB0> INFO: dacScan step from 20 .. 39
[12:07:24.596] <TB0> INFO: Test took 28902ms.
[12:07:24.633] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:24.633] <TB0> INFO: dacScan step from 40 .. 59
[12:07:53.569] <TB0> INFO: Test took 28936ms.
[12:07:53.607] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:53.607] <TB0> INFO: dacScan step from 60 .. 79
[12:08:22.338] <TB0> INFO: Test took 28731ms.
[12:08:22.376] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:22.376] <TB0> INFO: dacScan step from 80 .. 99
[12:08:54.316] <TB0> INFO: Test took 31939ms.
[12:08:54.440] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:54.453] <TB0> INFO: dacScan step from 100 .. 119
[12:09:35.142] <TB0> INFO: Test took 40689ms.
[12:09:35.459] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:35.499] <TB0> INFO: dacScan step from 120 .. 139



[12:10:18.255] <TB0> INFO: Test took 42756ms.
[12:10:18.523] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:18.565] <TB0> INFO: dacScan step from 140 .. 159
[12:10:57.657] <TB0> INFO: Test took 39091ms.
[12:10:57.916] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:57.960] <TB0> INFO: dacScan step from 160 .. 174
[12:11:32.230] <TB0> INFO: Test took 34270ms.
[12:11:32.438] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:57.012] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 157 (20) hits flags = 16 (plus default)
[12:11:57.021] <TB0> INFO: dacScan step from 0 .. 19
[12:12:22.890] <TB0> INFO: Test took 25869ms.
[12:12:22.925] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:22.925] <TB0> INFO: dacScan step from 20 .. 39
[12:12:51.397] <TB0> INFO: Test took 28472ms.
[12:12:51.433] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:51.433] <TB0> INFO: dacScan step from 40 .. 59
[12:13:18.831] <TB0> INFO: Test took 27398ms.
[12:13:18.876] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:18.876] <TB0> INFO: dacScan step from 60 .. 79
[12:13:47.993] <TB0> INFO: Test took 29117ms.
[12:13:48.036] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:48.036] <TB0> INFO: dacScan step from 80 .. 99
[12:14:19.694] <TB0> INFO: Test took 31658ms.
[12:14:19.818] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:19.836] <TB0> INFO: dacScan step from 100 .. 119
[12:15:01.322] <TB0> INFO: Test took 41486ms.
[12:15:01.597] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:01.648] <TB0> INFO: dacScan step from 120 .. 139



[12:15:45.790] <TB0> INFO: Test took 44142ms.
[12:15:46.082] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:46.138] <TB0> INFO: dacScan step from 140 .. 157
[12:16:25.531] <TB0> INFO: Test took 39393ms.
[12:16:25.792] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:47.837] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 156 (20) hits flags = 16 (plus default)
[12:16:47.846] <TB0> INFO: dacScan step from 0 .. 19
[12:17:16.069] <TB0> INFO: Test took 28223ms.
[12:17:16.109] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:16.109] <TB0> INFO: dacScan step from 20 .. 39
[12:17:44.607] <TB0> INFO: Test took 28498ms.
[12:17:44.643] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:44.643] <TB0> INFO: dacScan step from 40 .. 59
[12:18:13.129] <TB0> INFO: Test took 28486ms.
[12:18:13.171] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:13.171] <TB0> INFO: dacScan step from 60 .. 79
[12:18:41.950] <TB0> INFO: Test took 28779ms.
[12:18:41.987] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:41.987] <TB0> INFO: dacScan step from 80 .. 99
[12:19:13.552] <TB0> INFO: Test took 31564ms.
[12:19:13.659] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:13.671] <TB0> INFO: dacScan step from 100 .. 119


[12:19:52.933] <TB0> INFO: Test took 39262ms.
[12:19:53.196] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:53.231] <TB0> INFO: dacScan step from 120 .. 139
[12:20:38.569] <TB0> INFO: Test took 45338ms.
[12:20:38.849] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:38.892] <TB0> INFO: dacScan step from 140 .. 156
[12:21:17.768] <TB0> INFO: Test took 38876ms.
[12:21:18.023] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:39.582] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 156 (20) hits flags = 16 (plus default)
[12:21:39.592] <TB0> INFO: dacScan step from 0 .. 19
[12:22:08.302] <TB0> INFO: Test took 28710ms.
[12:22:08.338] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:08.338] <TB0> INFO: dacScan step from 20 .. 39
[12:22:35.006] <TB0> INFO: Test took 26668ms.
[12:22:35.039] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:35.039] <TB0> INFO: dacScan step from 40 .. 59
[12:23:01.689] <TB0> INFO: Test took 26650ms.
[12:23:01.735] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:01.735] <TB0> INFO: dacScan step from 60 .. 79
[12:23:28.525] <TB0> INFO: Test took 26790ms.
[12:23:28.560] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:28.560] <TB0> INFO: dacScan step from 80 .. 99
[12:23:57.956] <TB0> INFO: Test took 29395ms.
[12:23:58.078] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:58.092] <TB0> INFO: dacScan step from 100 .. 119





[12:24:39.518] <TB0> INFO: Test took 41426ms.
[12:24:39.790] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:39.832] <TB0> INFO: dacScan step from 120 .. 139



[12:25:20.795] <TB0> INFO: Test took 40963ms.
[12:25:21.094] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:21.146] <TB0> INFO: dacScan step from 140 .. 156
[12:25:59.910] <TB0> INFO: Test took 38763ms.
[12:26:00.228] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:22.987] <TB0> INFO: PixTestTrim::trimBitTest() done
[12:26:22.989] <TB0> INFO: PixTestTrim::doTest() done, duration: 3119 seconds
[12:26:23.673] <TB0> INFO: ######################################################################
[12:26:23.673] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:26:23.673] <TB0> INFO: ######################################################################
[12:26:27.607] <TB0> INFO: Test took 3932ms.
[12:26:27.626] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:31.852] <TB0> INFO: Test took 4030ms.
[12:26:31.919] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:35.970] <TB0> INFO: Test took 4043ms.
[12:26:36.043] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:36.050] <TB0> INFO: The DUT currently contains the following objects:
[12:26:36.050] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:36.050] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:36.050] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:36.050] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:36.050] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:36.050] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: Test took 1144ms.
[12:26:37.194] <TB0> INFO: The DUT currently contains the following objects:
[12:26:37.194] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:37.194] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:37.194] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:37.194] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:37.194] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.194] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.195] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:37.195] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.337] <TB0> INFO: Test took 1142ms.
[12:26:38.338] <TB0> INFO: The DUT currently contains the following objects:
[12:26:38.338] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:38.338] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:38.338] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:38.338] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:38.338] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:38.338] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.449] <TB0> INFO: Test took 1111ms.
[12:26:39.450] <TB0> INFO: The DUT currently contains the following objects:
[12:26:39.450] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:39.450] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:39.450] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:39.450] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:39.450] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.450] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.450] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.450] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.450] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.450] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.450] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.450] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.450] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.451] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.451] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.451] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.451] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.451] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.451] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:39.451] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.577] <TB0> INFO: Test took 1126ms.
[12:26:40.578] <TB0> INFO: The DUT currently contains the following objects:
[12:26:40.578] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:40.578] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:40.579] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:40.579] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:40.579] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:40.579] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.733] <TB0> INFO: Test took 1154ms.
[12:26:41.734] <TB0> INFO: The DUT currently contains the following objects:
[12:26:41.734] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:41.734] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:41.734] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:41.734] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:41.734] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.734] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.734] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.734] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.734] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.734] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.734] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.734] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.734] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.735] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.735] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.735] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.735] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.735] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.735] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:41.735] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.909] <TB0> INFO: Test took 1174ms.
[12:26:42.911] <TB0> INFO: The DUT currently contains the following objects:
[12:26:42.911] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:42.911] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:42.911] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:42.911] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:42.911] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.911] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.912] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:42.912] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.051] <TB0> INFO: Test took 1139ms.
[12:26:44.053] <TB0> INFO: The DUT currently contains the following objects:
[12:26:44.053] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:44.053] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:44.053] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:44.053] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:44.053] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.053] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.054] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.054] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:44.054] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.184] <TB0> INFO: Test took 1130ms.
[12:26:45.185] <TB0> INFO: The DUT currently contains the following objects:
[12:26:45.185] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:45.185] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:45.185] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:45.185] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:45.185] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.185] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.185] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.185] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.185] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.185] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.185] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:45.186] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.327] <TB0> INFO: Test took 1141ms.
[12:26:46.328] <TB0> INFO: The DUT currently contains the following objects:
[12:26:46.328] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:46.328] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:46.328] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:46.328] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:46.328] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.328] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.329] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.329] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.329] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.329] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:46.329] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: Test took 1121ms.
[12:26:47.450] <TB0> INFO: The DUT currently contains the following objects:
[12:26:47.450] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:47.450] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:47.450] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:47.450] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:47.450] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:47.450] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.555] <TB0> INFO: Test took 1105ms.
[12:26:48.556] <TB0> INFO: The DUT currently contains the following objects:
[12:26:48.556] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:48.556] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:48.556] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:48.556] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:48.556] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:48.556] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: Test took 1121ms.
[12:26:49.677] <TB0> INFO: The DUT currently contains the following objects:
[12:26:49.677] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:49.677] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:49.677] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:49.677] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:49.677] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.677] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.678] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.678] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.678] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.678] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:49.678] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: Test took 1105ms.
[12:26:50.783] <TB0> INFO: The DUT currently contains the following objects:
[12:26:50.783] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:50.783] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:50.783] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:50.783] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:50.783] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:50.783] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.904] <TB0> INFO: Test took 1121ms.
[12:26:51.905] <TB0> INFO: The DUT currently contains the following objects:
[12:26:51.905] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:51.905] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:51.905] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:51.905] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:51.905] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:51.905] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.026] <TB0> INFO: Test took 1121ms.
[12:26:53.027] <TB0> INFO: The DUT currently contains the following objects:
[12:26:53.027] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:26:53.027] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:26:53.027] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:26:53.027] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:26:53.027] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:53.027] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:26:54.148] <TB0> INFO: Test took 1121ms.
[12:26:54.150] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:59.105] <TB0> INFO: Test took 304955ms.
[12:32:00.880] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:02.256] <TB0> INFO: Test took 301376ms.
[12:37:03.916] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.926] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.935] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.944] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.953] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.960] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.968] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.976] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.985] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.992] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:03.999] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:04.006] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:04.013] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:04.020] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:04.027] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:04.033] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:37:04.056] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C0.dat
[12:37:04.056] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C1.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C2.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C3.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C4.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C5.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C6.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C7.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C8.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C9.dat
[12:37:04.057] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C10.dat
[12:37:04.058] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C11.dat
[12:37:04.058] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C12.dat
[12:37:04.058] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C13.dat
[12:37:04.058] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C14.dat
[12:37:04.058] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//dacParameters35_C15.dat
[12:37:07.870] <TB0> INFO: Test took 3811ms.
[12:37:11.945] <TB0> INFO: Test took 3812ms.
[12:37:16.125] <TB0> INFO: Test took 3917ms.
[12:37:16.401] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:17.375] <TB0> INFO: Test took 974ms.
[12:37:17.377] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:18.536] <TB0> INFO: Test took 1159ms.
[12:37:18.538] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:19.683] <TB0> INFO: Test took 1145ms.
[12:37:19.687] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:20.830] <TB0> INFO: Test took 1143ms.
[12:37:20.832] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:21.973] <TB0> INFO: Test took 1141ms.
[12:37:21.976] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:23.099] <TB0> INFO: Test took 1123ms.
[12:37:23.101] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:24.264] <TB0> INFO: Test took 1163ms.
[12:37:24.266] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:25.395] <TB0> INFO: Test took 1129ms.
[12:37:25.397] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:26.540] <TB0> INFO: Test took 1143ms.
[12:37:26.543] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:27.670] <TB0> INFO: Test took 1127ms.
[12:37:27.673] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:28.800] <TB0> INFO: Test took 1128ms.
[12:37:28.803] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:29.929] <TB0> INFO: Test took 1126ms.
[12:37:29.931] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:31.061] <TB0> INFO: Test took 1130ms.
[12:37:31.063] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:32.191] <TB0> INFO: Test took 1128ms.
[12:37:32.194] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:33.339] <TB0> INFO: Test took 1145ms.
[12:37:33.342] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:34.484] <TB0> INFO: Test took 1142ms.
[12:37:34.485] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:35.629] <TB0> INFO: Test took 1144ms.
[12:37:35.632] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:36.760] <TB0> INFO: Test took 1128ms.
[12:37:36.763] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:37.893] <TB0> INFO: Test took 1130ms.
[12:37:37.895] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:39.024] <TB0> INFO: Test took 1129ms.
[12:37:39.027] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:40.156] <TB0> INFO: Test took 1129ms.
[12:37:40.158] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:41.302] <TB0> INFO: Test took 1144ms.
[12:37:41.305] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:42.419] <TB0> INFO: Test took 1114ms.
[12:37:42.421] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:43.566] <TB0> INFO: Test took 1145ms.
[12:37:43.568] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:44.744] <TB0> INFO: Test took 1176ms.
[12:37:44.746] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:45.891] <TB0> INFO: Test took 1145ms.
[12:37:45.894] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:47.023] <TB0> INFO: Test took 1130ms.
[12:37:47.026] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:48.154] <TB0> INFO: Test took 1129ms.
[12:37:48.157] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:49.285] <TB0> INFO: Test took 1129ms.
[12:37:49.288] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:50.430] <TB0> INFO: Test took 1143ms.
[12:37:50.432] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:51.546] <TB0> INFO: Test took 1114ms.
[12:37:51.549] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:52.692] <TB0> INFO: Test took 1143ms.
[12:37:53.216] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 689 seconds
[12:37:53.216] <TB0> INFO: PH scale (per ROC): 81 78 76 83 81 80 78 90 83 80 77 89 90 89 79 80
[12:37:53.216] <TB0> INFO: PH offset (per ROC): 160 159 171 158 154 150 162 144 163 144 154 150 156 161 159 144
[12:37:53.390] <TB0> INFO: ######################################################################
[12:37:53.390] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:37:53.390] <TB0> INFO: ######################################################################
[12:37:53.401] <TB0> INFO: scanning low vcal = 10
[12:37:57.609] <TB0> INFO: Test took 4208ms.
[12:37:57.615] <TB0> INFO: scanning low vcal = 20
[12:38:01.799] <TB0> INFO: Test took 4184ms.
[12:38:01.802] <TB0> INFO: scanning low vcal = 30
[12:38:05.958] <TB0> INFO: Test took 4156ms.
[12:38:05.967] <TB0> INFO: scanning low vcal = 40
[12:38:11.010] <TB0> INFO: Test took 5043ms.
[12:38:11.096] <TB0> INFO: scanning low vcal = 50
[12:38:16.172] <TB0> INFO: Test took 5076ms.
[12:38:16.229] <TB0> INFO: scanning low vcal = 60
[12:38:21.148] <TB0> INFO: Test took 4919ms.
[12:38:21.205] <TB0> INFO: scanning low vcal = 70
[12:38:26.214] <TB0> INFO: Test took 5009ms.
[12:38:26.277] <TB0> INFO: scanning low vcal = 80
[12:38:31.174] <TB0> INFO: Test took 4897ms.
[12:38:31.237] <TB0> INFO: scanning low vcal = 90
[12:38:36.126] <TB0> INFO: Test took 4889ms.
[12:38:36.185] <TB0> INFO: scanning low vcal = 100
[12:38:41.012] <TB0> INFO: Test took 4827ms.
[12:38:41.086] <TB0> INFO: scanning low vcal = 110
[12:38:45.995] <TB0> INFO: Test took 4909ms.
[12:38:46.061] <TB0> INFO: scanning low vcal = 120
[12:38:50.934] <TB0> INFO: Test took 4872ms.
[12:38:51.011] <TB0> INFO: scanning low vcal = 130
[12:38:55.855] <TB0> INFO: Test took 4844ms.
[12:38:55.916] <TB0> INFO: scanning low vcal = 140
[12:39:00.997] <TB0> INFO: Test took 5081ms.
[12:39:01.056] <TB0> INFO: scanning low vcal = 150
[12:39:06.139] <TB0> INFO: Test took 5083ms.
[12:39:06.198] <TB0> INFO: scanning low vcal = 160
[12:39:11.084] <TB0> INFO: Test took 4886ms.
[12:39:11.141] <TB0> INFO: scanning low vcal = 170
[12:39:16.079] <TB0> INFO: Test took 4938ms.
[12:39:16.140] <TB0> INFO: scanning low vcal = 180
[12:39:21.063] <TB0> INFO: Test took 4923ms.
[12:39:21.126] <TB0> INFO: scanning low vcal = 190
[12:39:26.266] <TB0> INFO: Test took 5140ms.
[12:39:26.348] <TB0> INFO: scanning low vcal = 200
[12:39:31.476] <TB0> INFO: Test took 5128ms.
[12:39:31.537] <TB0> INFO: scanning low vcal = 210
[12:39:36.259] <TB0> INFO: Test took 4722ms.
[12:39:36.338] <TB0> INFO: scanning low vcal = 220
[12:39:41.560] <TB0> INFO: Test took 5222ms.
[12:39:41.653] <TB0> INFO: scanning low vcal = 230
[12:39:46.677] <TB0> INFO: Test took 5024ms.
[12:39:46.741] <TB0> INFO: scanning low vcal = 240
[12:39:51.572] <TB0> INFO: Test took 4831ms.
[12:39:51.629] <TB0> INFO: scanning low vcal = 250
[12:39:56.345] <TB0> INFO: Test took 4716ms.
[12:39:56.409] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[12:40:01.377] <TB0> INFO: Test took 4968ms.
[12:40:01.436] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[12:40:06.266] <TB0> INFO: Test took 4830ms.
[12:40:06.335] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[12:40:11.248] <TB0> INFO: Test took 4913ms.
[12:40:11.310] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[12:40:16.195] <TB0> INFO: Test took 4885ms.
[12:40:16.289] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:40:21.217] <TB0> INFO: Test took 4928ms.
[12:40:21.718] <TB0> INFO: PixTestGainPedestal::measure() done
[12:40:55.363] <TB0> INFO: PixTestGainPedestal::fit() done
[12:40:55.363] <TB0> INFO: non-linearity mean: 0.955 0.955 0.959 0.959 0.959 0.960 0.955 0.953 0.963 0.958 0.959 0.957 0.959 0.957 0.960 0.964
[12:40:55.363] <TB0> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.006 0.005 0.005 0.006 0.006 0.005 0.006 0.006 0.006 0.006 0.006 0.005
[12:40:55.363] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[12:40:55.382] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[12:40:55.400] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[12:40:55.418] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[12:40:55.437] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[12:40:55.455] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[12:40:55.473] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[12:40:55.491] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[12:40:55.525] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[12:40:55.558] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[12:40:55.581] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[12:40:55.615] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[12:40:55.635] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[12:40:55.658] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[12:40:55.692] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[12:40:55.726] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2054_FullQualification_2015-08-04_13h03m_1438686194//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[12:40:55.760] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 182 seconds
[12:40:55.769] <TB0> INFO: enter test to run
[12:40:55.769] <TB0> INFO: test: exit no parameter change
[12:40:56.218] <TB0> QUIET: Connection to board 126 closed.
[12:40:56.234] <TB0> INFO: pXar: this is the end, my friend