[14:42:42.778] <TB1> INFO: *** Welcome to pxar ***
[14:42:42.778] <TB1> INFO: *** Today: 2015/09/03
[14:42:42.778] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C15.dat
[14:42:42.779] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:42:42.779] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//defaultMaskFile.dat
[14:42:42.779] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters_C15.dat
[14:42:42.846] <TB1> INFO: clk: 4
[14:42:42.846] <TB1> INFO: ctr: 4
[14:42:42.846] <TB1> INFO: sda: 19
[14:42:42.846] <TB1> INFO: tin: 9
[14:42:42.846] <TB1> INFO: level: 15
[14:42:42.846] <TB1> INFO: triggerdelay: 0
[14:42:42.846] <TB1> QUIET: Instanciating API for pxar prod-10
[14:42:42.846] <TB1> INFO: Log level: INFO
[14:42:42.854] <TB1> INFO: Found DTB DTB_WXBYFL
[14:42:42.863] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[14:42:42.867] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[14:42:42.870] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[14:42:44.394] <TB1> INFO: DUT info:
[14:42:44.394] <TB1> INFO: The DUT currently contains the following objects:
[14:42:44.394] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:42:44.394] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:42:44.394] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:42:44.394] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:42:44.394] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.394] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.395] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:42:44.796] <TB1> INFO: enter 'restricted' command line mode
[14:42:44.796] <TB1> INFO: enter test to run
[14:42:44.796] <TB1> INFO: test: pretest no parameter change
[14:42:44.796] <TB1> INFO: running: pretest
[14:42:44.806] <TB1> INFO: ######################################################################
[14:42:44.806] <TB1> INFO: PixTestPretest::doTest()
[14:42:44.806] <TB1> INFO: ######################################################################
[14:42:44.808] <TB1> INFO: ----------------------------------------------------------------------
[14:42:44.808] <TB1> INFO: PixTestPretest::programROC()
[14:42:44.808] <TB1> INFO: ----------------------------------------------------------------------
[14:43:02.833] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:43:02.833] <TB1> INFO: IA differences per ROC: 19.3 19.3 20.9 19.3 17.7 20.1 20.1 20.1 17.7 18.5 19.3 16.1 19.3 19.3 19.3 19.3
[14:43:02.918] <TB1> INFO: ----------------------------------------------------------------------
[14:43:02.918] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:43:02.918] <TB1> INFO: ----------------------------------------------------------------------
[14:43:22.523] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 373.8 mA = 23.3625 mA/ROC
[14:43:22.543] <TB1> INFO: ----------------------------------------------------------------------
[14:43:22.543] <TB1> INFO: PixTestPretest::findWorkingPixel()
[14:43:22.543] <TB1> INFO: ----------------------------------------------------------------------
[14:43:22.681] <TB1> INFO: Expecting 231680 events.
[14:43:31.930] <TB1> INFO: 231680 events read in total (8529ms).
[14:43:32.002] <TB1> INFO: Test took 9455ms.
[14:43:32.275] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:43:32.324] <TB1> INFO: ----------------------------------------------------------------------
[14:43:32.324] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[14:43:32.324] <TB1> INFO: ----------------------------------------------------------------------
[14:43:32.463] <TB1> INFO: Expecting 231680 events.
[14:43:41.733] <TB1> INFO: 231680 events read in total (8553ms).
[14:43:41.737] <TB1> INFO: Test took 9407ms.
[14:43:42.082] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[14:43:42.082] <TB1> INFO: CalDel: 141 152 149 151 139 131 150 143 149 130 138 149 136 160 148 124
[14:43:42.082] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:43:42.084] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C0.dat
[14:43:42.084] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C1.dat
[14:43:42.084] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C2.dat
[14:43:42.085] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C3.dat
[14:43:42.085] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C4.dat
[14:43:42.085] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C5.dat
[14:43:42.085] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C6.dat
[14:43:42.085] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C7.dat
[14:43:42.085] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C8.dat
[14:43:42.085] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C9.dat
[14:43:42.086] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C10.dat
[14:43:42.086] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C11.dat
[14:43:42.086] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C12.dat
[14:43:42.086] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C13.dat
[14:43:42.086] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C14.dat
[14:43:42.086] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters_C15.dat
[14:43:42.086] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//tbmParameters_C0a.dat
[14:43:42.086] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:43:42.087] <TB1> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[14:43:42.181] <TB1> INFO: enter test to run
[14:43:42.181] <TB1> INFO: test: fulltest no parameter change
[14:43:42.181] <TB1> INFO: running: fulltest
[14:43:42.181] <TB1> INFO: ######################################################################
[14:43:42.181] <TB1> INFO: PixTestFullTest::doTest()
[14:43:42.181] <TB1> INFO: ######################################################################
[14:43:42.183] <TB1> INFO: ######################################################################
[14:43:42.183] <TB1> INFO: PixTestAlive::doTest()
[14:43:42.183] <TB1> INFO: ######################################################################
[14:43:42.184] <TB1> INFO: ----------------------------------------------------------------------
[14:43:42.184] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:43:42.184] <TB1> INFO: ----------------------------------------------------------------------
[14:43:42.505] <TB1> INFO: Expecting 41600 events.
[14:43:46.983] <TB1> INFO: 41600 events read in total (3761ms).
[14:43:46.984] <TB1> INFO: Test took 4798ms.
[14:43:46.991] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:47.290] <TB1> INFO: PixTestAlive::aliveTest() done
[14:43:47.290] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
[14:43:47.292] <TB1> INFO: ----------------------------------------------------------------------
[14:43:47.292] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:43:47.292] <TB1> INFO: ----------------------------------------------------------------------
[14:43:47.620] <TB1> INFO: Expecting 41600 events.
[14:43:50.787] <TB1> INFO: 41600 events read in total (2450ms).
[14:43:50.787] <TB1> INFO: Test took 3493ms.
[14:43:50.787] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:50.788] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:43:51.115] <TB1> INFO: PixTestAlive::maskTest() done
[14:43:51.115] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:43:51.117] <TB1> INFO: ----------------------------------------------------------------------
[14:43:51.117] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:43:51.117] <TB1> INFO: ----------------------------------------------------------------------
[14:43:51.440] <TB1> INFO: Expecting 41600 events.
[14:43:55.898] <TB1> INFO: 41600 events read in total (3741ms).
[14:43:55.899] <TB1> INFO: Test took 4779ms.
[14:43:55.905] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:56.200] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[14:43:56.200] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:43:56.201] <TB1> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[14:43:56.210] <TB1> INFO: ######################################################################
[14:43:56.210] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:43:56.210] <TB1> INFO: ######################################################################
[14:43:56.214] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[14:43:56.225] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[14:43:56.225] <TB1> INFO: run 1 of 1
[14:43:56.529] <TB1> INFO: Expecting 3120000 events.
[14:44:32.958] <TB1> INFO: 884085 events read in total (35711ms).
[14:45:08.563] <TB1> INFO: 1756405 events read in total (71316ms).
[14:45:44.387] <TB1> INFO: 2641425 events read in total (107141ms).
[14:46:03.721] <TB1> INFO: 3120000 events read in total (126474ms).
[14:46:03.774] <TB1> INFO: Test took 127549ms.
[14:46:03.870] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:27.355] <TB1> INFO: PixTestBBMap::doTest() done, duration: 151 seconds
[14:46:27.355] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
[14:46:27.355] <TB1> INFO: separation cut (per ROC): 87 84 93 80 82 88 84 87 71 70 87 83 71 86 79 87
[14:46:27.439] <TB1> INFO: ######################################################################
[14:46:27.439] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:46:27.439] <TB1> INFO: ######################################################################
[14:46:27.439] <TB1> INFO: ----------------------------------------------------------------------
[14:46:27.439] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:46:27.439] <TB1> INFO: ----------------------------------------------------------------------
[14:46:27.439] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[14:46:27.448] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[14:46:27.448] <TB1> INFO: run 1 of 1
[14:46:27.777] <TB1> INFO: Expecting 31200000 events.
[14:46:50.602] <TB1> INFO: 954400 events read in total (22108ms).
[14:47:13.763] <TB1> INFO: 1895500 events read in total (45269ms).
[14:47:37.980] <TB1> INFO: 2832450 events read in total (69486ms).
[14:48:02.314] <TB1> INFO: 3771200 events read in total (93820ms).
[14:48:26.595] <TB1> INFO: 4707900 events read in total (118101ms).
[14:48:50.842] <TB1> INFO: 5644950 events read in total (142348ms).
[14:49:15.092] <TB1> INFO: 6581350 events read in total (166598ms).
[14:49:39.410] <TB1> INFO: 7517150 events read in total (190916ms).
[14:50:03.727] <TB1> INFO: 8451350 events read in total (215233ms).
[14:50:27.914] <TB1> INFO: 9383400 events read in total (239420ms).
[14:50:52.214] <TB1> INFO: 10317700 events read in total (263720ms).
[14:51:16.625] <TB1> INFO: 11249200 events read in total (288131ms).
[14:51:40.965] <TB1> INFO: 12181350 events read in total (312471ms).
[14:52:05.487] <TB1> INFO: 13111650 events read in total (336993ms).
[14:52:29.904] <TB1> INFO: 14042350 events read in total (361410ms).
[14:52:54.301] <TB1> INFO: 14970400 events read in total (385807ms).
[14:53:18.820] <TB1> INFO: 15893750 events read in total (410326ms).
[14:53:43.287] <TB1> INFO: 16814600 events read in total (434793ms).
[14:54:07.729] <TB1> INFO: 17731750 events read in total (459235ms).
[14:54:32.278] <TB1> INFO: 18651200 events read in total (483784ms).
[14:54:56.564] <TB1> INFO: 19565550 events read in total (508070ms).
[14:55:20.854] <TB1> INFO: 20482250 events read in total (532360ms).
[14:55:45.275] <TB1> INFO: 21396900 events read in total (556781ms).
[14:56:09.630] <TB1> INFO: 22314550 events read in total (581136ms).
[14:56:33.975] <TB1> INFO: 23225800 events read in total (605481ms).
[14:56:58.511] <TB1> INFO: 24141550 events read in total (630017ms).
[14:57:22.947] <TB1> INFO: 25054200 events read in total (654453ms).
[14:57:47.115] <TB1> INFO: 25967550 events read in total (678621ms).
[14:58:11.524] <TB1> INFO: 26877850 events read in total (703030ms).
[14:58:35.842] <TB1> INFO: 27793350 events read in total (727348ms).
[14:59:00.230] <TB1> INFO: 28708200 events read in total (751736ms).
[14:59:24.588] <TB1> INFO: 29623500 events read in total (776094ms).
[14:59:49.228] <TB1> INFO: 30541000 events read in total (800734ms).
[15:00:06.519] <TB1> INFO: 31200000 events read in total (818025ms).
[15:00:06.547] <TB1> INFO: Test took 819099ms.
[15:00:06.632] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:06.735] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:08.179] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:09.656] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:11.155] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:12.641] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:14.146] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:15.623] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:17.068] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:18.548] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:20.269] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:21.994] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:23.737] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:25.389] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:26.959] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:28.415] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:29.897] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[15:00:31.355] <TB1> INFO: PixTestScurves::scurves() done
[15:00:31.355] <TB1> INFO: Vcal mean: 93.37 86.55 88.94 92.52 84.96 90.61 82.96 87.57 78.13 82.09 91.35 91.59 77.58 91.35 86.94 89.18
[15:00:31.355] <TB1> INFO: Vcal RMS: 6.03 6.04 5.49 5.34 4.85 5.29 4.87 5.74 4.30 4.88 5.24 5.54 5.14 5.48 5.04 5.15
[15:00:31.355] <TB1> INFO: PixTestScurves::fullTest() done, duration: 843 seconds
[15:00:31.430] <TB1> INFO: ######################################################################
[15:00:31.430] <TB1> INFO: PixTestTrim::doTest()
[15:00:31.430] <TB1> INFO: ######################################################################
[15:00:31.432] <TB1> INFO: ----------------------------------------------------------------------
[15:00:31.432] <TB1> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[15:00:31.432] <TB1> INFO: ----------------------------------------------------------------------
[15:00:31.513] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:00:31.513] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:00:31.522] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:00:31.522] <TB1> INFO: run 1 of 1
[15:00:31.845] <TB1> INFO: Expecting 13312000 events.
[15:01:01.025] <TB1> INFO: 1108280 events read in total (28462ms).
[15:01:26.709] <TB1> INFO: 2213180 events read in total (54146ms).
[15:01:52.765] <TB1> INFO: 3315820 events read in total (80202ms).
[15:02:20.267] <TB1> INFO: 4414400 events read in total (107704ms).
[15:02:48.360] <TB1> INFO: 5509460 events read in total (135797ms).
[15:03:16.290] <TB1> INFO: 6601840 events read in total (163727ms).
[15:03:44.324] <TB1> INFO: 7699680 events read in total (191761ms).
[15:04:12.424] <TB1> INFO: 8800300 events read in total (219861ms).
[15:04:40.553] <TB1> INFO: 9903420 events read in total (247990ms).
[15:05:08.211] <TB1> INFO: 11006320 events read in total (275648ms).
[15:05:34.945] <TB1> INFO: 12110380 events read in total (302382ms).
[15:06:03.001] <TB1> INFO: 13220600 events read in total (330438ms).
[15:06:05.741] <TB1> INFO: 13312000 events read in total (333178ms).
[15:06:05.768] <TB1> INFO: Test took 334246ms.
[15:06:05.816] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:24.474] <TB1> INFO: ROC 0 VthrComp = 94
[15:06:24.474] <TB1> INFO: ROC 1 VthrComp = 85
[15:06:24.474] <TB1> INFO: ROC 2 VthrComp = 94
[15:06:24.474] <TB1> INFO: ROC 3 VthrComp = 89
[15:06:24.474] <TB1> INFO: ROC 4 VthrComp = 85
[15:06:24.474] <TB1> INFO: ROC 5 VthrComp = 94
[15:06:24.474] <TB1> INFO: ROC 6 VthrComp = 85
[15:06:24.475] <TB1> INFO: ROC 7 VthrComp = 89
[15:06:24.475] <TB1> INFO: ROC 8 VthrComp = 77
[15:06:24.475] <TB1> INFO: ROC 9 VthrComp = 81
[15:06:24.475] <TB1> INFO: ROC 10 VthrComp = 95
[15:06:24.475] <TB1> INFO: ROC 11 VthrComp = 88
[15:06:24.475] <TB1> INFO: ROC 12 VthrComp = 80
[15:06:24.476] <TB1> INFO: ROC 13 VthrComp = 91
[15:06:24.476] <TB1> INFO: ROC 14 VthrComp = 84
[15:06:24.476] <TB1> INFO: ROC 15 VthrComp = 93
[15:06:24.476] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:06:24.476] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[15:06:24.486] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:06:24.486] <TB1> INFO: run 1 of 1
[15:06:24.802] <TB1> INFO: Expecting 13312000 events.
[15:06:48.155] <TB1> INFO: 783540 events read in total (22636ms).
[15:07:11.070] <TB1> INFO: 1563740 events read in total (45551ms).
[15:07:33.919] <TB1> INFO: 2343440 events read in total (68400ms).
[15:07:58.497] <TB1> INFO: 3122740 events read in total (92978ms).
[15:08:20.769] <TB1> INFO: 3901020 events read in total (115250ms).
[15:08:45.906] <TB1> INFO: 4680200 events read in total (140387ms).
[15:09:10.922] <TB1> INFO: 5458780 events read in total (165403ms).
[15:09:36.182] <TB1> INFO: 6237980 events read in total (190663ms).
[15:10:01.266] <TB1> INFO: 7013160 events read in total (215747ms).
[15:10:26.551] <TB1> INFO: 7784680 events read in total (241032ms).
[15:10:51.608] <TB1> INFO: 8554600 events read in total (266089ms).
[15:11:16.531] <TB1> INFO: 9323060 events read in total (291012ms).
[15:11:41.679] <TB1> INFO: 10090700 events read in total (316160ms).
[15:12:06.698] <TB1> INFO: 10857480 events read in total (341179ms).
[15:12:31.778] <TB1> INFO: 11623720 events read in total (366259ms).
[15:12:56.911] <TB1> INFO: 12389440 events read in total (391392ms).
[15:13:22.194] <TB1> INFO: 13157580 events read in total (416675ms).
[15:13:27.579] <TB1> INFO: 13312000 events read in total (422060ms).
[15:13:27.619] <TB1> INFO: Test took 423133ms.
[15:13:27.769] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:50.850] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 61.0268 for pixel 5/74 mean/min/max = 46.2949/31.5382/61.0515
[15:13:50.850] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 62.1738 for pixel 10/0 mean/min/max = 47.0382/31.6193/62.4572
[15:13:50.850] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.7327 for pixel 12/69 mean/min/max = 45.0904/32.4166/57.7642
[15:13:50.851] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 60.3849 for pixel 8/11 mean/min/max = 47.6302/34.6323/60.628
[15:13:50.851] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.4003 for pixel 17/75 mean/min/max = 45.7136/32.9522/58.475
[15:13:50.851] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 57.2776 for pixel 17/78 mean/min/max = 44.9928/32.6095/57.3762
[15:13:50.852] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.8148 for pixel 1/11 mean/min/max = 45.7046/32.5367/58.8724
[15:13:50.852] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.8293 for pixel 14/6 mean/min/max = 46.3656/32.5986/60.1327
[15:13:50.853] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 58.5281 for pixel 51/23 mean/min/max = 47.2433/35.8733/58.6133
[15:13:50.853] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.9768 for pixel 5/3 mean/min/max = 46.4804/32.8354/60.1255
[15:13:50.853] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 57.3869 for pixel 51/0 mean/min/max = 45.0926/32.7927/57.3924
[15:13:50.854] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 61.3371 for pixel 4/20 mean/min/max = 47.7043/33.9605/61.4481
[15:13:50.854] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 59.0229 for pixel 13/77 mean/min/max = 45.459/31.8808/59.0373
[15:13:50.854] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 60.1472 for pixel 15/76 mean/min/max = 46.9918/33.7801/60.2036
[15:13:50.855] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 59.4652 for pixel 5/2 mean/min/max = 46.5404/33.4387/59.642
[15:13:50.855] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 56.9392 for pixel 11/7 mean/min/max = 44.8559/32.6296/57.0823
[15:13:50.856] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:50.988] <TB1> INFO: Expecting 1029120 events.
[15:14:15.035] <TB1> INFO: 1029120 events read in total (23330ms).
[15:14:15.041] <TB1> INFO: Expecting 1029120 events.
[15:14:39.057] <TB1> INFO: 1029120 events read in total (23478ms).
[15:14:39.065] <TB1> INFO: Expecting 1029120 events.
[15:15:03.240] <TB1> INFO: 1029120 events read in total (23642ms).
[15:15:03.248] <TB1> INFO: Expecting 1029120 events.
[15:15:26.472] <TB1> INFO: 1029120 events read in total (22687ms).
[15:15:26.484] <TB1> INFO: Expecting 1029120 events.
[15:15:48.150] <TB1> INFO: 1029120 events read in total (21132ms).
[15:15:48.163] <TB1> INFO: Expecting 1029120 events.
[15:16:11.265] <TB1> INFO: 1029120 events read in total (22564ms).
[15:16:11.279] <TB1> INFO: Expecting 1029120 events.
[15:16:33.659] <TB1> INFO: 1029120 events read in total (21842ms).
[15:16:33.677] <TB1> INFO: Expecting 1029120 events.
[15:16:57.716] <TB1> INFO: 1029120 events read in total (23511ms).
[15:16:57.737] <TB1> INFO: Expecting 1029120 events.
[15:17:21.606] <TB1> INFO: 1029120 events read in total (23341ms).
[15:17:21.625] <TB1> INFO: Expecting 1029120 events.
[15:17:45.727] <TB1> INFO: 1029120 events read in total (23568ms).
[15:17:45.748] <TB1> INFO: Expecting 1029120 events.
[15:18:09.696] <TB1> INFO: 1029120 events read in total (23414ms).
[15:18:09.723] <TB1> INFO: Expecting 1029120 events.
[15:18:33.625] <TB1> INFO: 1029120 events read in total (23372ms).
[15:18:33.655] <TB1> INFO: Expecting 1029120 events.
[15:18:57.555] <TB1> INFO: 1029120 events read in total (23372ms).
[15:18:57.581] <TB1> INFO: Expecting 1029120 events.
[15:19:21.420] <TB1> INFO: 1029120 events read in total (23308ms).
[15:19:21.449] <TB1> INFO: Expecting 1029120 events.
[15:19:45.250] <TB1> INFO: 1029120 events read in total (23272ms).
[15:19:45.286] <TB1> INFO: Expecting 1029120 events.
[15:20:09.325] <TB1> INFO: 1029120 events read in total (23511ms).
[15:20:09.359] <TB1> INFO: Test took 378503ms.
[15:20:10.314] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[15:20:10.323] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:20:10.323] <TB1> INFO: run 1 of 1
[15:20:10.627] <TB1> INFO: Expecting 16640000 events.
[15:20:36.100] <TB1> INFO: 726420 events read in total (24755ms).
[15:21:00.761] <TB1> INFO: 1449880 events read in total (49416ms).
[15:21:25.461] <TB1> INFO: 2172580 events read in total (74116ms).
[15:21:50.312] <TB1> INFO: 2895760 events read in total (98967ms).
[15:22:14.927] <TB1> INFO: 3618800 events read in total (123582ms).
[15:22:39.491] <TB1> INFO: 4341280 events read in total (148146ms).
[15:23:03.875] <TB1> INFO: 5062880 events read in total (172530ms).
[15:23:28.465] <TB1> INFO: 5786120 events read in total (197120ms).
[15:23:52.861] <TB1> INFO: 6508860 events read in total (221516ms).
[15:24:17.425] <TB1> INFO: 7230980 events read in total (246080ms).
[15:24:42.003] <TB1> INFO: 7953740 events read in total (270658ms).
[15:25:06.625] <TB1> INFO: 8673520 events read in total (295280ms).
[15:25:31.202] <TB1> INFO: 9390460 events read in total (319857ms).
[15:25:55.680] <TB1> INFO: 10106520 events read in total (344335ms).
[15:26:20.185] <TB1> INFO: 10821440 events read in total (368840ms).
[15:26:44.508] <TB1> INFO: 11535800 events read in total (393163ms).
[15:27:09.046] <TB1> INFO: 12250260 events read in total (417701ms).
[15:27:33.508] <TB1> INFO: 12963460 events read in total (442163ms).
[15:27:58.251] <TB1> INFO: 13676280 events read in total (466906ms).
[15:28:22.825] <TB1> INFO: 14388760 events read in total (491480ms).
[15:28:47.189] <TB1> INFO: 15101720 events read in total (515844ms).
[15:29:11.573] <TB1> INFO: 15814240 events read in total (540228ms).
[15:29:35.888] <TB1> INFO: 16528300 events read in total (564543ms).
[15:29:40.092] <TB1> INFO: 16640000 events read in total (568747ms).
[15:29:40.170] <TB1> INFO: Test took 569848ms.
[15:29:40.398] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:06.034] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 1.029284 .. 255.000000
[15:30:06.110] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 1 .. 255 (-1/-1) hits flags = 16 (plus default)
[15:30:06.119] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:30:06.119] <TB1> INFO: run 1 of 1
[15:30:06.424] <TB1> INFO: Expecting 21216000 events.
[15:30:31.412] <TB1> INFO: 710600 events read in total (24269ms).
[15:30:55.705] <TB1> INFO: 1421660 events read in total (48562ms).
[15:31:20.112] <TB1> INFO: 2133060 events read in total (72969ms).
[15:31:44.551] <TB1> INFO: 2844360 events read in total (97408ms).
[15:32:08.936] <TB1> INFO: 3556160 events read in total (121793ms).
[15:32:33.330] <TB1> INFO: 4267540 events read in total (146187ms).
[15:32:57.518] <TB1> INFO: 4979140 events read in total (170375ms).
[15:33:21.844] <TB1> INFO: 5690840 events read in total (194701ms).
[15:33:46.102] <TB1> INFO: 6402780 events read in total (218959ms).
[15:34:08.128] <TB1> INFO: 7114060 events read in total (240985ms).
[15:34:32.612] <TB1> INFO: 7825360 events read in total (265469ms).
[15:34:54.919] <TB1> INFO: 8536820 events read in total (287776ms).
[15:35:17.489] <TB1> INFO: 9248520 events read in total (310346ms).
[15:35:41.068] <TB1> INFO: 9959920 events read in total (333925ms).
[15:36:05.357] <TB1> INFO: 10672000 events read in total (358214ms).
[15:36:29.824] <TB1> INFO: 11383340 events read in total (382681ms).
[15:36:53.371] <TB1> INFO: 12095000 events read in total (406228ms).
[15:37:15.570] <TB1> INFO: 12806040 events read in total (428427ms).
[15:37:37.782] <TB1> INFO: 13517100 events read in total (450639ms).
[15:37:59.889] <TB1> INFO: 14227480 events read in total (472746ms).
[15:38:23.458] <TB1> INFO: 14938440 events read in total (496315ms).
[15:38:47.793] <TB1> INFO: 15648920 events read in total (520650ms).
[15:39:12.272] <TB1> INFO: 16358900 events read in total (545129ms).
[15:39:36.719] <TB1> INFO: 17068620 events read in total (569576ms).
[15:40:01.267] <TB1> INFO: 17778580 events read in total (594124ms).
[15:40:25.820] <TB1> INFO: 18488680 events read in total (618677ms).
[15:40:50.341] <TB1> INFO: 19197900 events read in total (643198ms).
[15:41:14.813] <TB1> INFO: 19907480 events read in total (667670ms).
[15:41:39.187] <TB1> INFO: 20617480 events read in total (692044ms).
[15:41:59.924] <TB1> INFO: 21216000 events read in total (712781ms).
[15:42:00.015] <TB1> INFO: Test took 713897ms.
[15:42:00.289] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:28.547] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 17.443577 .. 45.250856
[15:42:28.624] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 7 .. 55 (-1/-1) hits flags = 16 (plus default)
[15:42:28.633] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:42:28.633] <TB1> INFO: run 1 of 1
[15:42:28.940] <TB1> INFO: Expecting 4076800 events.
[15:42:56.290] <TB1> INFO: 927280 events read in total (26627ms).
[15:43:22.817] <TB1> INFO: 1855000 events read in total (53154ms).
[15:43:49.516] <TB1> INFO: 2782020 events read in total (79853ms).
[15:44:16.167] <TB1> INFO: 3706580 events read in total (106504ms).
[15:44:27.149] <TB1> INFO: 4076800 events read in total (117486ms).
[15:44:27.160] <TB1> INFO: Test took 118527ms.
[15:44:27.195] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:41.744] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 23.482996 .. 41.637418
[15:44:41.821] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 13 .. 51 (-1/-1) hits flags = 16 (plus default)
[15:44:41.830] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:44:41.830] <TB1> INFO: run 1 of 1
[15:44:42.137] <TB1> INFO: Expecting 3244800 events.
[15:45:09.805] <TB1> INFO: 924740 events read in total (26951ms).
[15:45:36.560] <TB1> INFO: 1849420 events read in total (53706ms).
[15:46:03.382] <TB1> INFO: 2772900 events read in total (80528ms).
[15:46:17.409] <TB1> INFO: 3244800 events read in total (94555ms).
[15:46:17.420] <TB1> INFO: Test took 95590ms.
[15:46:17.447] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:46:30.416] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 24.865766 .. 41.225718
[15:46:30.513] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 14 .. 51 (-1/-1) hits flags = 16 (plus default)
[15:46:30.522] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:46:30.522] <TB1> INFO: run 1 of 1
[15:46:30.858] <TB1> INFO: Expecting 3161600 events.
[15:46:56.142] <TB1> INFO: 917600 events read in total (24567ms).
[15:47:22.925] <TB1> INFO: 1835200 events read in total (51350ms).
[15:47:49.201] <TB1> INFO: 2752620 events read in total (77626ms).
[15:48:00.254] <TB1> INFO: 3161600 events read in total (88679ms).
[15:48:00.267] <TB1> INFO: Test took 89745ms.
[15:48:00.294] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:48:13.015] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:48:13.015] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[15:48:13.024] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[15:48:13.024] <TB1> INFO: run 1 of 1
[15:48:13.332] <TB1> INFO: Expecting 3411200 events.
[15:48:39.329] <TB1> INFO: 878440 events read in total (25280ms).
[15:49:03.282] <TB1> INFO: 1757120 events read in total (49233ms).
[15:49:29.701] <TB1> INFO: 2635480 events read in total (75652ms).
[15:49:53.088] <TB1> INFO: 3411200 events read in total (99039ms).
[15:49:53.103] <TB1> INFO: Test took 100079ms.
[15:49:53.138] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:08.173] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:50:08.174] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:50:08.174] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:50:08.174] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:50:08.174] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:50:08.174] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:50:08.175] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:50:08.175] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:50:08.175] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:50:08.175] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:50:08.175] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:50:08.176] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:50:08.176] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:50:08.176] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:50:08.176] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:50:08.176] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:50:08.177] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C0.dat
[15:50:08.187] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C1.dat
[15:50:08.194] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C2.dat
[15:50:08.200] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C3.dat
[15:50:08.206] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C4.dat
[15:50:08.214] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C5.dat
[15:50:08.220] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C6.dat
[15:50:08.226] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C7.dat
[15:50:08.232] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C8.dat
[15:50:08.239] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C9.dat
[15:50:08.245] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C10.dat
[15:50:08.252] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C11.dat
[15:50:08.259] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C12.dat
[15:50:08.266] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C13.dat
[15:50:08.273] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C14.dat
[15:50:08.281] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//trimParameters35_C15.dat
[15:50:08.287] <TB1> INFO: PixTestTrim::trimTest() done
[15:50:08.287] <TB1> INFO: vtrim: 97 102 99 98 86 91 95 98 83 97 87 98 93 99 87 93
[15:50:08.287] <TB1> INFO: vthrcomp: 94 85 94 89 85 94 85 89 77 81 95 88 80 91 84 93
[15:50:08.287] <TB1> INFO: vcal mean: 35.05 34.97 34.98 35.01 34.97 34.97 34.97 34.97 35.00 34.94 34.98 34.97 34.94 34.99 34.96 34.96
[15:50:08.287] <TB1> INFO: vcal RMS: 0.74 0.76 0.70 0.79 0.70 0.66 0.66 0.72 0.86 0.90 0.67 0.73 0.70 0.73 0.72 0.69
[15:50:08.287] <TB1> INFO: bits mean: 9.16 9.11 9.48 8.77 9.28 9.25 9.06 9.27 7.99 9.13 8.91 8.80 9.18 8.84 9.11 9.48
[15:50:08.288] <TB1> INFO: bits RMS: 2.83 2.83 2.67 2.54 2.69 2.75 2.85 2.65 2.62 2.69 2.91 2.56 2.85 2.68 2.65 2.71
[15:50:08.297] <TB1> INFO: ----------------------------------------------------------------------
[15:50:08.297] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[15:50:08.297] <TB1> INFO: ----------------------------------------------------------------------
[15:50:08.301] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[15:50:08.316] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[15:50:08.316] <TB1> INFO: run 1 of 1
[15:50:08.641] <TB1> INFO: Expecting 8320000 events.
[15:50:39.149] <TB1> INFO: 936370 events read in total (29791ms).
[15:51:06.208] <TB1> INFO: 1866270 events read in total (56850ms).
[15:51:35.925] <TB1> INFO: 2793070 events read in total (86567ms).
[15:52:05.601] <TB1> INFO: 3717110 events read in total (116243ms).
[15:52:35.405] <TB1> INFO: 4633690 events read in total (146047ms).
[15:53:04.853] <TB1> INFO: 5546250 events read in total (175495ms).
[15:53:32.058] <TB1> INFO: 6457980 events read in total (202700ms).
[15:53:59.710] <TB1> INFO: 7369380 events read in total (230352ms).
[15:54:29.332] <TB1> INFO: 8286490 events read in total (259974ms).
[15:54:30.868] <TB1> INFO: 8320000 events read in total (261510ms).
[15:54:30.904] <TB1> INFO: Test took 262588ms.
[15:54:31.021] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:54:58.873] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 162 (-1/-1) hits flags = 16 (plus default)
[15:54:58.883] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[15:54:58.883] <TB1> INFO: run 1 of 1
[15:54:59.207] <TB1> INFO: Expecting 6780800 events.
[15:55:30.244] <TB1> INFO: 983060 events read in total (30320ms).
[15:55:58.446] <TB1> INFO: 1959160 events read in total (58522ms).
[15:56:28.753] <TB1> INFO: 2930300 events read in total (88829ms).
[15:56:58.265] <TB1> INFO: 3891580 events read in total (118341ms).
[15:57:28.278] <TB1> INFO: 4846440 events read in total (148355ms).
[15:57:56.073] <TB1> INFO: 5798200 events read in total (176149ms).
[15:58:26.381] <TB1> INFO: 6757600 events read in total (206457ms).
[15:58:27.558] <TB1> INFO: 6780800 events read in total (207634ms).
[15:58:27.590] <TB1> INFO: Test took 208707ms.
[15:58:27.665] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:49.985] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 151 (-1/-1) hits flags = 16 (plus default)
[15:58:49.994] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[15:58:49.994] <TB1> INFO: run 1 of 1
[15:58:50.300] <TB1> INFO: Expecting 6323200 events.
[15:59:20.914] <TB1> INFO: 1018070 events read in total (29897ms).
[15:59:51.499] <TB1> INFO: 2027360 events read in total (60482ms).
[16:00:22.229] <TB1> INFO: 3030030 events read in total (91213ms).
[16:00:52.654] <TB1> INFO: 4018370 events read in total (121637ms).
[16:01:22.402] <TB1> INFO: 5002940 events read in total (151385ms).
[16:01:51.558] <TB1> INFO: 5987120 events read in total (180541ms).
[16:02:02.188] <TB1> INFO: 6323200 events read in total (191171ms).
[16:02:02.214] <TB1> INFO: Test took 192220ms.
[16:02:02.277] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:25.581] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 151 (-1/-1) hits flags = 16 (plus default)
[16:02:25.590] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[16:02:25.590] <TB1> INFO: run 1 of 1
[16:02:25.906] <TB1> INFO: Expecting 6323200 events.
[16:02:54.779] <TB1> INFO: 1017370 events read in total (28149ms).
[16:03:25.531] <TB1> INFO: 2026010 events read in total (58901ms).
[16:03:53.445] <TB1> INFO: 3028100 events read in total (86815ms).
[16:04:23.897] <TB1> INFO: 4015810 events read in total (117267ms).
[16:04:54.455] <TB1> INFO: 4999930 events read in total (147825ms).
[16:05:22.723] <TB1> INFO: 5983630 events read in total (176093ms).
[16:05:33.196] <TB1> INFO: 6323200 events read in total (186566ms).
[16:05:33.223] <TB1> INFO: Test took 187633ms.
[16:05:33.291] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:05:54.714] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[16:05:54.723] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[16:05:54.723] <TB1> INFO: run 1 of 1
[16:05:55.050] <TB1> INFO: Expecting 6240000 events.
[16:06:26.709] <TB1> INFO: 1023490 events read in total (30942ms).
[16:06:57.451] <TB1> INFO: 2038210 events read in total (61684ms).
[16:07:26.212] <TB1> INFO: 3045610 events read in total (90445ms).
[16:07:55.048] <TB1> INFO: 4037940 events read in total (119281ms).
[16:08:23.242] <TB1> INFO: 5027590 events read in total (147475ms).
[16:08:51.909] <TB1> INFO: 6018170 events read in total (176142ms).
[16:08:58.434] <TB1> INFO: 6240000 events read in total (182667ms).
[16:08:58.458] <TB1> INFO: Test took 183735ms.
[16:08:58.519] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:21.587] <TB1> INFO: PixTestTrim::trimBitTest() done
[16:09:21.588] <TB1> INFO: PixTestTrim::doTest() done, duration: 4130 seconds
[16:09:22.290] <TB1> INFO: ######################################################################
[16:09:22.290] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:09:22.290] <TB1> INFO: ######################################################################
[16:09:22.626] <TB1> INFO: Expecting 41600 events.
[16:09:27.097] <TB1> INFO: 41600 events read in total (3754ms).
[16:09:27.097] <TB1> INFO: Test took 4806ms.
[16:09:27.104] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:27.709] <TB1> INFO: Expecting 41600 events.
[16:09:32.169] <TB1> INFO: 41600 events read in total (3743ms).
[16:09:32.170] <TB1> INFO: Test took 4806ms.
[16:09:32.176] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:32.528] <TB1> INFO: Expecting 41600 events.
[16:09:37.045] <TB1> INFO: 41600 events read in total (3800ms).
[16:09:37.046] <TB1> INFO: Test took 4843ms.
[16:09:37.052] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:37.061] <TB1> INFO: The DUT currently contains the following objects:
[16:09:37.061] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:37.061] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:37.061] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:37.061] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:37.061] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.061] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:37.395] <TB1> INFO: Expecting 2560 events.
[16:09:38.467] <TB1> INFO: 2560 events read in total (355ms).
[16:09:38.467] <TB1> INFO: Test took 1406ms.
[16:09:38.468] <TB1> INFO: The DUT currently contains the following objects:
[16:09:38.468] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:38.468] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:38.468] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:38.468] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:38.468] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.468] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.469] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:38.883] <TB1> INFO: Expecting 2560 events.
[16:09:39.954] <TB1> INFO: 2560 events read in total (354ms).
[16:09:39.955] <TB1> INFO: Test took 1486ms.
[16:09:39.955] <TB1> INFO: The DUT currently contains the following objects:
[16:09:39.955] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:39.955] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:39.955] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:39.955] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:39.955] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.955] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.955] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.955] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:39.956] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:40.371] <TB1> INFO: Expecting 2560 events.
[16:09:41.446] <TB1> INFO: 2560 events read in total (358ms).
[16:09:41.446] <TB1> INFO: Test took 1490ms.
[16:09:41.447] <TB1> INFO: The DUT currently contains the following objects:
[16:09:41.447] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:41.447] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:41.447] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:41.447] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:41.447] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.447] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:41.862] <TB1> INFO: Expecting 2560 events.
[16:09:42.933] <TB1> INFO: 2560 events read in total (354ms).
[16:09:42.933] <TB1> INFO: Test took 1486ms.
[16:09:42.934] <TB1> INFO: The DUT currently contains the following objects:
[16:09:42.934] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:42.934] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:42.934] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:42.934] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:42.934] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.934] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.935] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.935] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.935] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:42.935] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:43.349] <TB1> INFO: Expecting 2560 events.
[16:09:44.419] <TB1> INFO: 2560 events read in total (353ms).
[16:09:44.419] <TB1> INFO: Test took 1484ms.
[16:09:44.421] <TB1> INFO: The DUT currently contains the following objects:
[16:09:44.421] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:44.421] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:44.421] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:44.421] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:44.422] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.422] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.422] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.422] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.422] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.422] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.423] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:44.836] <TB1> INFO: Expecting 2560 events.
[16:09:45.902] <TB1> INFO: 2560 events read in total (349ms).
[16:09:45.903] <TB1> INFO: Test took 1480ms.
[16:09:45.903] <TB1> INFO: The DUT currently contains the following objects:
[16:09:45.903] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:45.903] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:45.903] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:45.903] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:45.904] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:45.904] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:46.319] <TB1> INFO: Expecting 2560 events.
[16:09:47.391] <TB1> INFO: 2560 events read in total (355ms).
[16:09:47.391] <TB1> INFO: Test took 1487ms.
[16:09:47.392] <TB1> INFO: The DUT currently contains the following objects:
[16:09:47.392] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:47.392] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:47.392] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:47.392] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:47.392] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.392] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.392] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.392] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.392] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.392] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.394] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:47.807] <TB1> INFO: Expecting 2560 events.
[16:09:48.879] <TB1> INFO: 2560 events read in total (355ms).
[16:09:48.879] <TB1> INFO: Test took 1485ms.
[16:09:48.880] <TB1> INFO: The DUT currently contains the following objects:
[16:09:48.880] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:48.880] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:48.880] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:48.880] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:48.880] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:48.880] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:49.295] <TB1> INFO: Expecting 2560 events.
[16:09:50.367] <TB1> INFO: 2560 events read in total (355ms).
[16:09:50.368] <TB1> INFO: Test took 1488ms.
[16:09:50.368] <TB1> INFO: The DUT currently contains the following objects:
[16:09:50.368] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:50.368] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:50.368] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:50.368] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:50.368] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.368] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.369] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:50.783] <TB1> INFO: Expecting 2560 events.
[16:09:51.855] <TB1> INFO: 2560 events read in total (355ms).
[16:09:51.856] <TB1> INFO: Test took 1487ms.
[16:09:51.856] <TB1> INFO: The DUT currently contains the following objects:
[16:09:51.856] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:51.856] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:51.856] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:51.856] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:51.856] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.856] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.856] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:51.857] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:52.272] <TB1> INFO: Expecting 2560 events.
[16:09:53.343] <TB1> INFO: 2560 events read in total (354ms).
[16:09:53.343] <TB1> INFO: Test took 1486ms.
[16:09:53.344] <TB1> INFO: The DUT currently contains the following objects:
[16:09:53.344] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:53.344] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:53.344] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:53.344] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:53.344] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.344] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.345] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.345] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.345] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.345] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.345] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.345] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:53.759] <TB1> INFO: Expecting 2560 events.
[16:09:54.829] <TB1> INFO: 2560 events read in total (353ms).
[16:09:54.830] <TB1> INFO: Test took 1485ms.
[16:09:54.830] <TB1> INFO: The DUT currently contains the following objects:
[16:09:54.830] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:54.830] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:54.830] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:54.830] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:54.830] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:54.831] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:55.246] <TB1> INFO: Expecting 2560 events.
[16:09:56.317] <TB1> INFO: 2560 events read in total (354ms).
[16:09:56.317] <TB1> INFO: Test took 1486ms.
[16:09:56.318] <TB1> INFO: The DUT currently contains the following objects:
[16:09:56.318] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:56.318] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:56.318] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:56.318] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:56.318] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.318] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:56.733] <TB1> INFO: Expecting 2560 events.
[16:09:57.804] <TB1> INFO: 2560 events read in total (354ms).
[16:09:57.804] <TB1> INFO: Test took 1486ms.
[16:09:57.805] <TB1> INFO: The DUT currently contains the following objects:
[16:09:57.805] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:57.805] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:57.805] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:57.805] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:57.805] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:57.805] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:58.220] <TB1> INFO: Expecting 2560 events.
[16:09:59.291] <TB1> INFO: 2560 events read in total (354ms).
[16:09:59.291] <TB1> INFO: Test took 1486ms.
[16:09:59.292] <TB1> INFO: The DUT currently contains the following objects:
[16:09:59.292] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[16:09:59.293] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:09:59.293] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:09:59.293] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:09:59.293] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.293] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.294] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:09:59.707] <TB1> INFO: Expecting 2560 events.
[16:10:00.779] <TB1> INFO: 2560 events read in total (355ms).
[16:10:00.779] <TB1> INFO: Test took 1485ms.
[16:10:00.786] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:10:01.197] <TB1> INFO: Expecting 655360 events.
[16:10:18.028] <TB1> INFO: 655360 events read in total (16114ms).
[16:10:18.038] <TB1> INFO: Expecting 655360 events.
[16:10:34.679] <TB1> INFO: 655360 events read in total (16113ms).
[16:10:34.692] <TB1> INFO: Expecting 655360 events.
[16:10:51.441] <TB1> INFO: 655360 events read in total (16220ms).
[16:10:51.458] <TB1> INFO: Expecting 655360 events.
[16:11:08.200] <TB1> INFO: 655360 events read in total (16213ms).
[16:11:08.221] <TB1> INFO: Expecting 655360 events.
[16:11:23.419] <TB1> INFO: 655360 events read in total (14669ms).
[16:11:23.442] <TB1> INFO: Expecting 655360 events.
[16:11:39.539] <TB1> INFO: 655360 events read in total (15569ms).
[16:11:39.567] <TB1> INFO: Expecting 655360 events.
[16:11:56.361] <TB1> INFO: 655360 events read in total (16265ms).
[16:11:56.392] <TB1> INFO: Expecting 655360 events.
[16:12:13.065] <TB1> INFO: 655360 events read in total (16145ms).
[16:12:13.098] <TB1> INFO: Expecting 655360 events.
[16:12:29.071] <TB1> INFO: 655360 events read in total (15444ms).
[16:12:29.110] <TB1> INFO: Expecting 655360 events.
[16:12:44.427] <TB1> INFO: 655360 events read in total (14789ms).
[16:12:44.483] <TB1> INFO: Expecting 655360 events.
[16:13:01.102] <TB1> INFO: 655360 events read in total (16091ms).
[16:13:01.148] <TB1> INFO: Expecting 655360 events.
[16:13:17.791] <TB1> INFO: 655360 events read in total (16114ms).
[16:13:17.838] <TB1> INFO: Expecting 655360 events.
[16:13:34.560] <TB1> INFO: 655360 events read in total (16193ms).
[16:13:34.617] <TB1> INFO: Expecting 655360 events.
[16:13:51.340] <TB1> INFO: 655360 events read in total (16194ms).
[16:13:51.400] <TB1> INFO: Expecting 655360 events.
[16:14:08.108] <TB1> INFO: 655360 events read in total (16179ms).
[16:14:08.176] <TB1> INFO: Expecting 655360 events.
[16:14:24.774] <TB1> INFO: 655360 events read in total (16070ms).
[16:14:24.835] <TB1> INFO: Test took 264049ms.
[16:14:24.919] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:14:25.226] <TB1> INFO: Expecting 655360 events.
[16:14:42.046] <TB1> INFO: 655360 events read in total (16103ms).
[16:14:42.055] <TB1> INFO: Expecting 655360 events.
[16:14:58.792] <TB1> INFO: 655360 events read in total (16208ms).
[16:14:58.805] <TB1> INFO: Expecting 655360 events.
[16:15:15.037] <TB1> INFO: 655360 events read in total (15703ms).
[16:15:15.054] <TB1> INFO: Expecting 655360 events.
[16:15:30.083] <TB1> INFO: 655360 events read in total (14501ms).
[16:15:30.104] <TB1> INFO: Expecting 655360 events.
[16:15:46.761] <TB1> INFO: 655360 events read in total (16129ms).
[16:15:46.795] <TB1> INFO: Expecting 655360 events.
[16:16:03.357] <TB1> INFO: 655360 events read in total (16034ms).
[16:16:03.387] <TB1> INFO: Expecting 655360 events.
[16:16:20.089] <TB1> INFO: 655360 events read in total (16175ms).
[16:16:20.124] <TB1> INFO: Expecting 655360 events.
[16:16:36.888] <TB1> INFO: 655360 events read in total (16236ms).
[16:16:36.927] <TB1> INFO: Expecting 655360 events.
[16:16:51.974] <TB1> INFO: 655360 events read in total (14519ms).
[16:16:52.011] <TB1> INFO: Expecting 655360 events.
[16:17:08.123] <TB1> INFO: 655360 events read in total (15584ms).
[16:17:08.162] <TB1> INFO: Expecting 655360 events.
[16:17:24.738] <TB1> INFO: 655360 events read in total (16047ms).
[16:17:24.782] <TB1> INFO: Expecting 655360 events.
[16:17:41.441] <TB1> INFO: 655360 events read in total (16130ms).
[16:17:41.487] <TB1> INFO: Expecting 655360 events.
[16:17:58.109] <TB1> INFO: 655360 events read in total (16093ms).
[16:17:58.162] <TB1> INFO: Expecting 655360 events.
[16:18:14.782] <TB1> INFO: 655360 events read in total (16091ms).
[16:18:14.841] <TB1> INFO: Expecting 655360 events.
[16:18:31.499] <TB1> INFO: 655360 events read in total (16130ms).
[16:18:31.564] <TB1> INFO: Expecting 655360 events.
[16:18:48.063] <TB1> INFO: 655360 events read in total (15971ms).
[16:18:48.136] <TB1> INFO: Test took 263217ms.
[16:18:48.379] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.388] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.397] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:18:48.406] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[16:18:48.414] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[16:18:48.423] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[16:18:48.432] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[16:18:48.440] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[16:18:48.449] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[16:18:48.458] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[16:18:48.466] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.474] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.483] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.491] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.500] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.509] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.518] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.524] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.531] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.538] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:18:48.545] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[16:18:48.551] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[16:18:48.558] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.566] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.574] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.583] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.592] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[16:18:48.600] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[16:18:48.609] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[16:18:48.618] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[16:18:48.626] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[16:18:48.635] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[16:18:48.644] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[16:18:48.701] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:18:48.702] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:18:48.702] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:18:48.702] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:18:48.702] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:18:48.703] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:18:48.703] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:18:48.703] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:18:48.703] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:18:48.703] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:18:48.704] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:18:48.704] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:18:48.704] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:18:48.705] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:18:48.705] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:18:48.705] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:18:49.057] <TB1> INFO: Expecting 41600 events.
[16:18:53.546] <TB1> INFO: 41600 events read in total (3771ms).
[16:18:53.547] <TB1> INFO: Test took 4837ms.
[16:18:54.100] <TB1> INFO: Expecting 41600 events.
[16:18:58.617] <TB1> INFO: 41600 events read in total (3800ms).
[16:18:58.617] <TB1> INFO: Test took 4829ms.
[16:18:59.180] <TB1> INFO: Expecting 41600 events.
[16:19:03.686] <TB1> INFO: 41600 events read in total (3789ms).
[16:19:03.686] <TB1> INFO: Test took 4830ms.
[16:19:03.929] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:04.062] <TB1> INFO: Expecting 2560 events.
[16:19:05.150] <TB1> INFO: 2560 events read in total (371ms).
[16:19:05.151] <TB1> INFO: Test took 1222ms.
[16:19:05.154] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:05.567] <TB1> INFO: Expecting 2560 events.
[16:19:06.638] <TB1> INFO: 2560 events read in total (354ms).
[16:19:06.639] <TB1> INFO: Test took 1485ms.
[16:19:06.642] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:07.056] <TB1> INFO: Expecting 2560 events.
[16:19:08.132] <TB1> INFO: 2560 events read in total (359ms).
[16:19:08.132] <TB1> INFO: Test took 1490ms.
[16:19:08.135] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:08.549] <TB1> INFO: Expecting 2560 events.
[16:19:09.622] <TB1> INFO: 2560 events read in total (356ms).
[16:19:09.623] <TB1> INFO: Test took 1488ms.
[16:19:09.626] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:10.039] <TB1> INFO: Expecting 2560 events.
[16:19:11.112] <TB1> INFO: 2560 events read in total (356ms).
[16:19:11.113] <TB1> INFO: Test took 1487ms.
[16:19:11.116] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:11.529] <TB1> INFO: Expecting 2560 events.
[16:19:12.603] <TB1> INFO: 2560 events read in total (357ms).
[16:19:12.603] <TB1> INFO: Test took 1487ms.
[16:19:12.607] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:13.020] <TB1> INFO: Expecting 2560 events.
[16:19:14.092] <TB1> INFO: 2560 events read in total (355ms).
[16:19:14.093] <TB1> INFO: Test took 1486ms.
[16:19:14.096] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:14.510] <TB1> INFO: Expecting 2560 events.
[16:19:15.583] <TB1> INFO: 2560 events read in total (356ms).
[16:19:15.584] <TB1> INFO: Test took 1488ms.
[16:19:15.587] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:16.000] <TB1> INFO: Expecting 2560 events.
[16:19:17.072] <TB1> INFO: 2560 events read in total (355ms).
[16:19:17.073] <TB1> INFO: Test took 1486ms.
[16:19:17.076] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:17.490] <TB1> INFO: Expecting 2560 events.
[16:19:18.575] <TB1> INFO: 2560 events read in total (369ms).
[16:19:18.576] <TB1> INFO: Test took 1500ms.
[16:19:18.579] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:18.993] <TB1> INFO: Expecting 2560 events.
[16:19:20.058] <TB1> INFO: 2560 events read in total (348ms).
[16:19:20.059] <TB1> INFO: Test took 1480ms.
[16:19:20.074] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:20.475] <TB1> INFO: Expecting 2560 events.
[16:19:21.539] <TB1> INFO: 2560 events read in total (348ms).
[16:19:21.539] <TB1> INFO: Test took 1465ms.
[16:19:21.542] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:21.956] <TB1> INFO: Expecting 2560 events.
[16:19:23.022] <TB1> INFO: 2560 events read in total (349ms).
[16:19:23.022] <TB1> INFO: Test took 1480ms.
[16:19:23.024] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:23.439] <TB1> INFO: Expecting 2560 events.
[16:19:24.505] <TB1> INFO: 2560 events read in total (350ms).
[16:19:24.505] <TB1> INFO: Test took 1481ms.
[16:19:24.509] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:24.921] <TB1> INFO: Expecting 2560 events.
[16:19:25.986] <TB1> INFO: 2560 events read in total (348ms).
[16:19:25.986] <TB1> INFO: Test took 1478ms.
[16:19:25.989] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:26.403] <TB1> INFO: Expecting 2560 events.
[16:19:27.466] <TB1> INFO: 2560 events read in total (346ms).
[16:19:27.467] <TB1> INFO: Test took 1479ms.
[16:19:27.469] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:27.883] <TB1> INFO: Expecting 2560 events.
[16:19:28.949] <TB1> INFO: 2560 events read in total (349ms).
[16:19:28.949] <TB1> INFO: Test took 1480ms.
[16:19:28.952] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:29.366] <TB1> INFO: Expecting 2560 events.
[16:19:30.431] <TB1> INFO: 2560 events read in total (348ms).
[16:19:30.431] <TB1> INFO: Test took 1479ms.
[16:19:30.433] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:30.848] <TB1> INFO: Expecting 2560 events.
[16:19:31.912] <TB1> INFO: 2560 events read in total (348ms).
[16:19:31.912] <TB1> INFO: Test took 1479ms.
[16:19:31.914] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:32.329] <TB1> INFO: Expecting 2560 events.
[16:19:33.394] <TB1> INFO: 2560 events read in total (349ms).
[16:19:33.395] <TB1> INFO: Test took 1481ms.
[16:19:33.397] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:33.811] <TB1> INFO: Expecting 2560 events.
[16:19:34.876] <TB1> INFO: 2560 events read in total (348ms).
[16:19:34.876] <TB1> INFO: Test took 1479ms.
[16:19:34.878] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:35.293] <TB1> INFO: Expecting 2560 events.
[16:19:36.358] <TB1> INFO: 2560 events read in total (349ms).
[16:19:36.358] <TB1> INFO: Test took 1480ms.
[16:19:36.360] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:36.775] <TB1> INFO: Expecting 2560 events.
[16:19:37.840] <TB1> INFO: 2560 events read in total (349ms).
[16:19:37.841] <TB1> INFO: Test took 1481ms.
[16:19:37.844] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:38.257] <TB1> INFO: Expecting 2560 events.
[16:19:39.321] <TB1> INFO: 2560 events read in total (348ms).
[16:19:39.321] <TB1> INFO: Test took 1477ms.
[16:19:39.324] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:39.738] <TB1> INFO: Expecting 2560 events.
[16:19:40.818] <TB1> INFO: 2560 events read in total (364ms).
[16:19:40.818] <TB1> INFO: Test took 1494ms.
[16:19:40.822] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:41.235] <TB1> INFO: Expecting 2560 events.
[16:19:42.299] <TB1> INFO: 2560 events read in total (347ms).
[16:19:42.300] <TB1> INFO: Test took 1478ms.
[16:19:42.302] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:42.716] <TB1> INFO: Expecting 2560 events.
[16:19:43.781] <TB1> INFO: 2560 events read in total (348ms).
[16:19:43.782] <TB1> INFO: Test took 1480ms.
[16:19:43.784] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:44.199] <TB1> INFO: Expecting 2560 events.
[16:19:45.271] <TB1> INFO: 2560 events read in total (355ms).
[16:19:45.271] <TB1> INFO: Test took 1487ms.
[16:19:45.275] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:45.688] <TB1> INFO: Expecting 2560 events.
[16:19:46.761] <TB1> INFO: 2560 events read in total (356ms).
[16:19:46.762] <TB1> INFO: Test took 1488ms.
[16:19:46.765] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:47.179] <TB1> INFO: Expecting 2560 events.
[16:19:48.252] <TB1> INFO: 2560 events read in total (356ms).
[16:19:48.252] <TB1> INFO: Test took 1487ms.
[16:19:48.256] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:48.669] <TB1> INFO: Expecting 2560 events.
[16:19:49.741] <TB1> INFO: 2560 events read in total (355ms).
[16:19:49.742] <TB1> INFO: Test took 1486ms.
[16:19:49.745] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:19:50.159] <TB1> INFO: Expecting 2560 events.
[16:19:51.230] <TB1> INFO: 2560 events read in total (354ms).
[16:19:51.230] <TB1> INFO: Test took 1485ms.
[16:19:51.924] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 629 seconds
[16:19:51.924] <TB1> INFO: PH scale (per ROC): 74 68 80 69 68 77 67 73 75 72 77 66 81 63 68 71
[16:19:51.924] <TB1> INFO: PH offset (per ROC): 196 176 178 192 186 187 188 173 161 177 176 171 171 178 176 171
[16:19:52.136] <TB1> INFO: ######################################################################
[16:19:52.136] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:19:52.136] <TB1> INFO: ######################################################################
[16:19:52.148] <TB1> INFO: scanning low vcal = 10
[16:19:52.489] <TB1> INFO: Expecting 41600 events.
[16:19:56.111] <TB1> INFO: 41600 events read in total (2905ms).
[16:19:56.111] <TB1> INFO: Test took 3963ms.
[16:19:56.114] <TB1> INFO: scanning low vcal = 20
[16:19:56.527] <TB1> INFO: Expecting 41600 events.
[16:20:00.187] <TB1> INFO: 41600 events read in total (2943ms).
[16:20:00.187] <TB1> INFO: Test took 4073ms.
[16:20:00.190] <TB1> INFO: scanning low vcal = 30
[16:20:00.603] <TB1> INFO: Expecting 41600 events.
[16:20:04.268] <TB1> INFO: 41600 events read in total (2948ms).
[16:20:04.269] <TB1> INFO: Test took 4079ms.
[16:20:04.271] <TB1> INFO: scanning low vcal = 40
[16:20:04.676] <TB1> INFO: Expecting 41600 events.
[16:20:08.889] <TB1> INFO: 41600 events read in total (3495ms).
[16:20:08.890] <TB1> INFO: Test took 4619ms.
[16:20:08.894] <TB1> INFO: scanning low vcal = 50
[16:20:09.241] <TB1> INFO: Expecting 41600 events.
[16:20:13.493] <TB1> INFO: 41600 events read in total (3535ms).
[16:20:13.493] <TB1> INFO: Test took 4599ms.
[16:20:13.497] <TB1> INFO: scanning low vcal = 60
[16:20:13.849] <TB1> INFO: Expecting 41600 events.
[16:20:18.083] <TB1> INFO: 41600 events read in total (3517ms).
[16:20:18.084] <TB1> INFO: Test took 4587ms.
[16:20:18.093] <TB1> INFO: scanning low vcal = 70
[16:20:18.435] <TB1> INFO: Expecting 41600 events.
[16:20:22.680] <TB1> INFO: 41600 events read in total (3528ms).
[16:20:22.681] <TB1> INFO: Test took 4588ms.
[16:20:22.685] <TB1> INFO: scanning low vcal = 80
[16:20:23.031] <TB1> INFO: Expecting 41600 events.
[16:20:27.253] <TB1> INFO: 41600 events read in total (3505ms).
[16:20:27.254] <TB1> INFO: Test took 4569ms.
[16:20:27.257] <TB1> INFO: scanning low vcal = 90
[16:20:27.611] <TB1> INFO: Expecting 41600 events.
[16:20:31.976] <TB1> INFO: 41600 events read in total (3648ms).
[16:20:31.977] <TB1> INFO: Test took 4720ms.
[16:20:31.981] <TB1> INFO: scanning low vcal = 100
[16:20:32.329] <TB1> INFO: Expecting 41600 events.
[16:20:36.564] <TB1> INFO: 41600 events read in total (3518ms).
[16:20:36.565] <TB1> INFO: Test took 4584ms.
[16:20:36.569] <TB1> INFO: scanning low vcal = 110
[16:20:36.916] <TB1> INFO: Expecting 41600 events.
[16:20:41.189] <TB1> INFO: 41600 events read in total (3556ms).
[16:20:41.190] <TB1> INFO: Test took 4621ms.
[16:20:41.194] <TB1> INFO: scanning low vcal = 120
[16:20:41.532] <TB1> INFO: Expecting 41600 events.
[16:20:45.776] <TB1> INFO: 41600 events read in total (3527ms).
[16:20:45.777] <TB1> INFO: Test took 4583ms.
[16:20:45.781] <TB1> INFO: scanning low vcal = 130
[16:20:46.116] <TB1> INFO: Expecting 41600 events.
[16:20:50.166] <TB1> INFO: 41600 events read in total (3333ms).
[16:20:50.167] <TB1> INFO: Test took 4386ms.
[16:20:50.170] <TB1> INFO: scanning low vcal = 140
[16:20:50.526] <TB1> INFO: Expecting 41600 events.
[16:20:54.582] <TB1> INFO: 41600 events read in total (3339ms).
[16:20:54.582] <TB1> INFO: Test took 4412ms.
[16:20:54.587] <TB1> INFO: scanning low vcal = 150
[16:20:54.936] <TB1> INFO: Expecting 41600 events.
[16:20:58.978] <TB1> INFO: 41600 events read in total (3325ms).
[16:20:58.979] <TB1> INFO: Test took 4392ms.
[16:20:58.982] <TB1> INFO: scanning low vcal = 160
[16:20:59.335] <TB1> INFO: Expecting 41600 events.
[16:21:03.384] <TB1> INFO: 41600 events read in total (3333ms).
[16:21:03.384] <TB1> INFO: Test took 4402ms.
[16:21:03.388] <TB1> INFO: scanning low vcal = 170
[16:21:03.745] <TB1> INFO: Expecting 41600 events.
[16:21:07.785] <TB1> INFO: 41600 events read in total (3323ms).
[16:21:07.786] <TB1> INFO: Test took 4398ms.
[16:21:07.791] <TB1> INFO: scanning low vcal = 180
[16:21:08.140] <TB1> INFO: Expecting 41600 events.
[16:21:12.182] <TB1> INFO: 41600 events read in total (3325ms).
[16:21:12.183] <TB1> INFO: Test took 4392ms.
[16:21:12.186] <TB1> INFO: scanning low vcal = 190
[16:21:12.541] <TB1> INFO: Expecting 41600 events.
[16:21:16.776] <TB1> INFO: 41600 events read in total (3518ms).
[16:21:16.776] <TB1> INFO: Test took 4590ms.
[16:21:16.780] <TB1> INFO: scanning low vcal = 200
[16:21:17.133] <TB1> INFO: Expecting 41600 events.
[16:21:21.385] <TB1> INFO: 41600 events read in total (3535ms).
[16:21:21.386] <TB1> INFO: Test took 4606ms.
[16:21:21.389] <TB1> INFO: scanning low vcal = 210
[16:21:21.730] <TB1> INFO: Expecting 41600 events.
[16:21:25.970] <TB1> INFO: 41600 events read in total (3523ms).
[16:21:25.970] <TB1> INFO: Test took 4581ms.
[16:21:25.975] <TB1> INFO: scanning low vcal = 220
[16:21:26.321] <TB1> INFO: Expecting 41600 events.
[16:21:30.575] <TB1> INFO: 41600 events read in total (3537ms).
[16:21:30.576] <TB1> INFO: Test took 4601ms.
[16:21:30.580] <TB1> INFO: scanning low vcal = 230
[16:21:30.924] <TB1> INFO: Expecting 41600 events.
[16:21:35.153] <TB1> INFO: 41600 events read in total (3512ms).
[16:21:35.153] <TB1> INFO: Test took 4573ms.
[16:21:35.157] <TB1> INFO: scanning low vcal = 240
[16:21:35.502] <TB1> INFO: Expecting 41600 events.
[16:21:39.739] <TB1> INFO: 41600 events read in total (3519ms).
[16:21:39.739] <TB1> INFO: Test took 4582ms.
[16:21:39.743] <TB1> INFO: scanning low vcal = 250
[16:21:40.092] <TB1> INFO: Expecting 41600 events.
[16:21:44.368] <TB1> INFO: 41600 events read in total (3559ms).
[16:21:44.369] <TB1> INFO: Test took 4626ms.
[16:21:44.375] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[16:21:44.719] <TB1> INFO: Expecting 41600 events.
[16:21:48.943] <TB1> INFO: 41600 events read in total (3507ms).
[16:21:48.944] <TB1> INFO: Test took 4569ms.
[16:21:48.948] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[16:21:49.284] <TB1> INFO: Expecting 41600 events.
[16:21:53.518] <TB1> INFO: 41600 events read in total (3517ms).
[16:21:53.519] <TB1> INFO: Test took 4571ms.
[16:21:53.522] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[16:21:53.861] <TB1> INFO: Expecting 41600 events.
[16:21:58.134] <TB1> INFO: 41600 events read in total (3555ms).
[16:21:58.135] <TB1> INFO: Test took 4613ms.
[16:21:58.138] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[16:21:58.482] <TB1> INFO: Expecting 41600 events.
[16:22:02.808] <TB1> INFO: 41600 events read in total (3609ms).
[16:22:02.809] <TB1> INFO: Test took 4671ms.
[16:22:02.812] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:22:03.162] <TB1> INFO: Expecting 41600 events.
[16:22:07.232] <TB1> INFO: 41600 events read in total (3353ms).
[16:22:07.232] <TB1> INFO: Test took 4420ms.
[16:22:07.754] <TB1> INFO: PixTestGainPedestal::measure() done
[16:22:44.476] <TB1> INFO: PixTestGainPedestal::fit() done
[16:22:44.476] <TB1> INFO: non-linearity mean: 0.960 0.967 0.959 0.958 0.962 0.959 0.952 0.966 0.955 0.957 0.960 0.961 0.960 0.950 0.962 0.960
[16:22:44.476] <TB1> INFO: non-linearity RMS: 0.006 0.004 0.005 0.008 0.007 0.006 0.008 0.006 0.006 0.007 0.005 0.007 0.005 0.008 0.005 0.005
[16:22:44.476] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:22:44.503] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:22:44.528] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:22:44.546] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:22:44.573] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:22:44.599] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:22:44.625] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:22:44.651] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:22:44.679] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:22:44.700] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:22:44.719] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:22:44.738] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:22:44.756] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:22:44.774] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:22:44.793] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:22:44.818] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:22:44.836] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 172 seconds
[16:22:44.842] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C15.dat
[16:22:44.843] <TB1> INFO: PixTestReadback::doTest() start.
[16:22:44.845] <TB1> INFO: PixTestReadback::RES sent once
[16:23:06.733] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C0.dat
[16:23:06.733] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C1.dat
[16:23:06.733] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C2.dat
[16:23:06.733] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C3.dat
[16:23:06.733] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C4.dat
[16:23:06.733] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C5.dat
[16:23:06.733] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C6.dat
[16:23:06.733] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C7.dat
[16:23:06.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C8.dat
[16:23:06.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C9.dat
[16:23:06.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C10.dat
[16:23:06.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C11.dat
[16:23:06.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C12.dat
[16:23:06.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C13.dat
[16:23:06.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C14.dat
[16:23:06.734] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C15.dat
[16:23:06.784] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:23:06.784] <TB1> INFO: PixTestReadback::RES sent once
[16:23:28.607] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C0.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C1.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C2.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C3.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C4.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C5.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C6.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C7.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C8.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C9.dat
[16:23:28.608] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C10.dat
[16:23:28.609] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C11.dat
[16:23:28.609] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C12.dat
[16:23:28.609] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C13.dat
[16:23:28.609] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C14.dat
[16:23:28.609] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C15.dat
[16:23:28.657] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:23:28.657] <TB1> INFO: PixTestReadback::RES sent once
[16:23:45.588] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:23:45.588] <TB1> INFO: Vbg will be calibrated using Vd calibration
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 162.9calibrated Vbg = 1.21104 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.5calibrated Vbg = 1.20668 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.1calibrated Vbg = 1.21734 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 148.9calibrated Vbg = 1.22232 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.8calibrated Vbg = 1.2277 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 149.7calibrated Vbg = 1.22683 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 147.2calibrated Vbg = 1.22921 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.3calibrated Vbg = 1.22324 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 152.6calibrated Vbg = 1.22395 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.2calibrated Vbg = 1.21063 :::*/*/*/*/
[16:23:45.588] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151calibrated Vbg = 1.21511 :::*/*/*/*/
[16:23:45.589] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 152calibrated Vbg = 1.21789 :::*/*/*/*/
[16:23:45.589] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[16:23:45.592] <TB1> INFO: PixTestReadback::RES sent once
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C0.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C1.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C2.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C3.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C4.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C5.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C6.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C7.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C8.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C9.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C10.dat
[16:28:26.930] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C11.dat
[16:28:26.931] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C12.dat
[16:28:26.931] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C13.dat
[16:28:26.931] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C14.dat
[16:28:26.931] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//004_FulltestPxar_p17//readbackCal_C15.dat
[16:28:26.977] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:28:26.979] <TB1> INFO: PixTestReadback::doTest() done
[16:28:26.994] <TB1> INFO: enter test to run
[16:28:26.994] <TB1> INFO: test: exit no parameter change
[16:28:27.512] <TB1> QUIET: Connection to board 153 closed.
[16:28:27.592] <TB1> INFO: pXar: this is the end, my friend