[12:04:07.591] <TB1> INFO: *** Welcome to pxar ***
[12:04:07.591] <TB1> INFO: *** Today: 2015/09/03
[12:04:07.592] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C15.dat
[12:04:07.594] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:04:07.594] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//defaultMaskFile.dat
[12:04:07.594] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters_C15.dat
[12:04:07.674] <TB1> INFO: clk: 4
[12:04:07.674] <TB1> INFO: ctr: 4
[12:04:07.674] <TB1> INFO: sda: 19
[12:04:07.674] <TB1> INFO: tin: 9
[12:04:07.674] <TB1> INFO: level: 15
[12:04:07.674] <TB1> INFO: triggerdelay: 0
[12:04:07.674] <TB1> QUIET: Instanciating API for pxar prod-10
[12:04:07.674] <TB1> INFO: Log level: INFO
[12:04:07.681] <TB1> INFO: Found DTB DTB_WXBYFL
[12:04:07.690] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[12:04:07.693] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[12:04:07.696] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[12:04:09.230] <TB1> INFO: DUT info:
[12:04:09.230] <TB1> INFO: The DUT currently contains the following objects:
[12:04:09.230] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:04:09.230] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:04:09.230] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:04:09.230] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:04:09.230] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.230] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.231] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.231] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.231] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.231] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.231] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:04:09.632] <TB1> INFO: enter 'restricted' command line mode
[12:04:09.632] <TB1> INFO: enter test to run
[12:04:09.632] <TB1> INFO: test: pretest no parameter change
[12:04:09.632] <TB1> INFO: running: pretest
[12:04:09.640] <TB1> INFO: ######################################################################
[12:04:09.640] <TB1> INFO: PixTestPretest::doTest()
[12:04:09.640] <TB1> INFO: ######################################################################
[12:04:09.641] <TB1> INFO: ----------------------------------------------------------------------
[12:04:09.641] <TB1> INFO: PixTestPretest::programROC()
[12:04:09.641] <TB1> INFO: ----------------------------------------------------------------------
[12:04:27.663] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:04:27.663] <TB1> INFO: IA differences per ROC: 19.3 19.3 20.9 20.1 17.7 20.1 20.1 20.1 17.7 18.5 20.1 16.1 20.1 20.1 19.3 20.1
[12:04:27.749] <TB1> INFO: ----------------------------------------------------------------------
[12:04:27.749] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:04:27.749] <TB1> INFO: ----------------------------------------------------------------------
[12:04:47.352] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[12:04:47.356] <TB1> INFO: ----------------------------------------------------------------------
[12:04:47.356] <TB1> INFO: PixTestPretest::findWorkingPixel()
[12:04:47.356] <TB1> INFO: ----------------------------------------------------------------------
[12:04:47.496] <TB1> INFO: Expecting 231680 events.
[12:04:56.803] <TB1> INFO: 231680 events read in total (8587ms).
[12:04:56.872] <TB1> INFO: Test took 9510ms.
[12:04:57.135] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:04:57.187] <TB1> INFO: ----------------------------------------------------------------------
[12:04:57.187] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[12:04:57.187] <TB1> INFO: ----------------------------------------------------------------------
[12:04:57.329] <TB1> INFO: Expecting 231680 events.
[12:05:06.449] <TB1> INFO: 231680 events read in total (8403ms).
[12:05:06.453] <TB1> INFO: Test took 9257ms.
[12:05:06.803] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[12:05:06.804] <TB1> INFO: CalDel: 146 162 159 159 144 137 159 149 157 137 143 157 142 171 156 130
[12:05:06.804] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:05:06.807] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C0.dat
[12:05:06.807] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C1.dat
[12:05:06.807] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C2.dat
[12:05:06.807] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C3.dat
[12:05:06.807] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C4.dat
[12:05:06.807] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C5.dat
[12:05:06.807] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C6.dat
[12:05:06.807] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C7.dat
[12:05:06.808] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C8.dat
[12:05:06.808] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C9.dat
[12:05:06.808] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C10.dat
[12:05:06.808] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C11.dat
[12:05:06.808] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C12.dat
[12:05:06.808] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C13.dat
[12:05:06.808] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C14.dat
[12:05:06.808] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters_C15.dat
[12:05:06.808] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//tbmParameters_C0a.dat
[12:05:06.809] <TB1> INFO: write tbm parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:05:06.809] <TB1> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[12:05:06.899] <TB1> INFO: enter test to run
[12:05:06.899] <TB1> INFO: test: fulltest no parameter change
[12:05:06.899] <TB1> INFO: running: fulltest
[12:05:06.899] <TB1> INFO: ######################################################################
[12:05:06.899] <TB1> INFO: PixTestFullTest::doTest()
[12:05:06.899] <TB1> INFO: ######################################################################
[12:05:06.902] <TB1> INFO: ######################################################################
[12:05:06.902] <TB1> INFO: PixTestAlive::doTest()
[12:05:06.902] <TB1> INFO: ######################################################################
[12:05:06.905] <TB1> INFO: ----------------------------------------------------------------------
[12:05:06.905] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:05:06.905] <TB1> INFO: ----------------------------------------------------------------------
[12:05:07.225] <TB1> INFO: Expecting 41600 events.
[12:05:11.524] <TB1> INFO: 41600 events read in total (3582ms).
[12:05:11.525] <TB1> INFO: Test took 4617ms.
[12:05:11.531] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:11.842] <TB1> INFO: PixTestAlive::aliveTest() done
[12:05:11.842] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
[12:05:11.844] <TB1> INFO: ----------------------------------------------------------------------
[12:05:11.844] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:05:11.844] <TB1> INFO: ----------------------------------------------------------------------
[12:05:12.176] <TB1> INFO: Expecting 41600 events.
[12:05:15.287] <TB1> INFO: 41600 events read in total (2394ms).
[12:05:15.287] <TB1> INFO: Test took 3440ms.
[12:05:15.287] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:15.288] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:05:15.616] <TB1> INFO: PixTestAlive::maskTest() done
[12:05:15.616] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:05:15.618] <TB1> INFO: ----------------------------------------------------------------------
[12:05:15.618] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:05:15.618] <TB1> INFO: ----------------------------------------------------------------------
[12:05:15.950] <TB1> INFO: Expecting 41600 events.
[12:05:20.225] <TB1> INFO: 41600 events read in total (3558ms).
[12:05:20.226] <TB1> INFO: Test took 4606ms.
[12:05:20.232] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:20.540] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[12:05:20.540] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:05:20.540] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:05:20.548] <TB1> INFO: ######################################################################
[12:05:20.548] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:05:20.548] <TB1> INFO: ######################################################################
[12:05:20.552] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 2 (plus default)
[12:05:20.564] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[12:05:20.564] <TB1> INFO: run 1 of 1
[12:05:20.871] <TB1> INFO: Expecting 3120000 events.
[12:05:54.537] <TB1> INFO: 853385 events read in total (32949ms).
[12:06:27.037] <TB1> INFO: 1698225 events read in total (65449ms).
[12:07:02.096] <TB1> INFO: 2553275 events read in total (100508ms).
[12:07:24.657] <TB1> INFO: 3120000 events read in total (123069ms).
[12:07:24.707] <TB1> INFO: Test took 124143ms.
[12:07:24.811] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:49.018] <TB1> INFO: PixTestBBMap::doTest() done, duration: 148 seconds
[12:07:49.018] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
[12:07:49.018] <TB1> INFO: separation cut (per ROC): 90 79 95 78 78 85 73 72 68 70 82 80 70 75 77 82
[12:07:49.092] <TB1> INFO: ######################################################################
[12:07:49.092] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:07:49.092] <TB1> INFO: ######################################################################
[12:07:49.092] <TB1> INFO: ----------------------------------------------------------------------
[12:07:49.092] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:07:49.092] <TB1> INFO: ----------------------------------------------------------------------
[12:07:49.092] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (-1/-1) hits flags = 16 (plus default)
[12:07:49.101] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[12:07:49.101] <TB1> INFO: run 1 of 1
[12:07:49.408] <TB1> INFO: Expecting 31200000 events.
[12:08:13.120] <TB1> INFO: 920300 events read in total (22995ms).
[12:08:37.109] <TB1> INFO: 1826800 events read in total (46984ms).
[12:09:01.282] <TB1> INFO: 2729050 events read in total (71157ms).
[12:09:25.592] <TB1> INFO: 3633900 events read in total (95467ms).
[12:09:49.846] <TB1> INFO: 4535050 events read in total (119721ms).
[12:10:13.908] <TB1> INFO: 5437800 events read in total (143783ms).
[12:10:38.035] <TB1> INFO: 6339150 events read in total (167910ms).
[12:11:02.162] <TB1> INFO: 7242650 events read in total (192037ms).
[12:11:26.205] <TB1> INFO: 8142000 events read in total (216080ms).
[12:11:50.307] <TB1> INFO: 9042400 events read in total (240182ms).
[12:12:14.527] <TB1> INFO: 9941750 events read in total (264402ms).
[12:12:38.665] <TB1> INFO: 10842850 events read in total (288540ms).
[12:13:02.814] <TB1> INFO: 11740700 events read in total (312689ms).
[12:13:26.818] <TB1> INFO: 12639950 events read in total (336693ms).
[12:13:50.828] <TB1> INFO: 13536700 events read in total (360704ms).
[12:14:14.815] <TB1> INFO: 14435550 events read in total (384690ms).
[12:14:38.777] <TB1> INFO: 15329300 events read in total (408652ms).
[12:15:02.914] <TB1> INFO: 16220900 events read in total (432789ms).
[12:15:27.091] <TB1> INFO: 17109900 events read in total (456966ms).
[12:15:51.201] <TB1> INFO: 17998100 events read in total (481076ms).
[12:16:15.151] <TB1> INFO: 18885100 events read in total (505026ms).
[12:16:39.223] <TB1> INFO: 19771200 events read in total (529098ms).
[12:17:03.069] <TB1> INFO: 20659100 events read in total (552944ms).
[12:17:27.094] <TB1> INFO: 21544950 events read in total (576969ms).
[12:17:51.025] <TB1> INFO: 22431600 events read in total (600900ms).
[12:18:14.968] <TB1> INFO: 23314950 events read in total (624843ms).
[12:18:39.076] <TB1> INFO: 24201200 events read in total (648951ms).
[12:19:03.166] <TB1> INFO: 25084800 events read in total (673041ms).
[12:19:27.167] <TB1> INFO: 25970500 events read in total (697042ms).
[12:19:51.058] <TB1> INFO: 26852350 events read in total (720933ms).
[12:20:14.954] <TB1> INFO: 27739300 events read in total (744829ms).
[12:20:39.024] <TB1> INFO: 28624350 events read in total (768899ms).
[12:21:03.073] <TB1> INFO: 29510100 events read in total (792948ms).
[12:21:27.037] <TB1> INFO: 30397200 events read in total (816912ms).
[12:21:48.473] <TB1> INFO: 31200000 events read in total (838348ms).
[12:21:48.505] <TB1> INFO: Test took 839404ms.
[12:21:48.597] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:48.718] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:21:50.212] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:21:51.734] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:21:53.135] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:21:54.598] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:21:56.152] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:21:57.637] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:21:59.185] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:00.701] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:02.206] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:03.718] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:05.251] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:06.686] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:08.179] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:09.611] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:11.108] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:22:12.665] <TB1> INFO: PixTestScurves::scurves() done
[12:22:12.665] <TB1> INFO: Vcal mean: 90.75 80.31 85.86 88.79 79.27 81.82 74.82 79.71 69.65 79.08 79.81 84.51 67.03 83.33 83.39 80.42
[12:22:12.665] <TB1> INFO: Vcal RMS: 6.12 5.39 5.36 5.28 4.25 4.52 4.68 4.88 4.67 4.75 4.25 5.01 5.36 4.89 4.77 4.28
[12:22:12.665] <TB1> INFO: PixTestScurves::fullTest() done, duration: 863 seconds
[12:22:12.737] <TB1> INFO: ######################################################################
[12:22:12.737] <TB1> INFO: PixTestTrim::doTest()
[12:22:12.737] <TB1> INFO: ######################################################################
[12:22:12.738] <TB1> INFO: ----------------------------------------------------------------------
[12:22:12.738] <TB1> INFO: PixTestTrim::trimTest() ntrig = 20, vcal = 35
[12:22:12.738] <TB1> INFO: ----------------------------------------------------------------------
[12:22:12.829] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:22:12.829] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[12:22:12.838] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:22:12.838] <TB1> INFO: run 1 of 1
[12:22:13.144] <TB1> INFO: Expecting 13312000 events.
[12:22:41.177] <TB1> INFO: 1071320 events read in total (27316ms).
[12:23:07.511] <TB1> INFO: 2138380 events read in total (53650ms).
[12:23:32.794] <TB1> INFO: 3203140 events read in total (78933ms).
[12:24:00.386] <TB1> INFO: 4267840 events read in total (106525ms).
[12:24:28.083] <TB1> INFO: 5327520 events read in total (134222ms).
[12:24:55.586] <TB1> INFO: 6382940 events read in total (161725ms).
[12:25:23.231] <TB1> INFO: 7442200 events read in total (189370ms).
[12:25:50.791] <TB1> INFO: 8505480 events read in total (216930ms).
[12:26:18.400] <TB1> INFO: 9571340 events read in total (244539ms).
[12:26:45.975] <TB1> INFO: 10639580 events read in total (272114ms).
[12:27:13.728] <TB1> INFO: 11708000 events read in total (299867ms).
[12:27:41.406] <TB1> INFO: 12777320 events read in total (327545ms).
[12:27:55.455] <TB1> INFO: 13312000 events read in total (341594ms).
[12:27:55.487] <TB1> INFO: Test took 342649ms.
[12:27:55.539] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:14.239] <TB1> INFO: ROC 0 VthrComp = 95
[12:28:14.239] <TB1> INFO: ROC 1 VthrComp = 82
[12:28:14.240] <TB1> INFO: ROC 2 VthrComp = 95
[12:28:14.240] <TB1> INFO: ROC 3 VthrComp = 93
[12:28:14.240] <TB1> INFO: ROC 4 VthrComp = 83
[12:28:14.240] <TB1> INFO: ROC 5 VthrComp = 89
[12:28:14.240] <TB1> INFO: ROC 6 VthrComp = 80
[12:28:14.240] <TB1> INFO: ROC 7 VthrComp = 84
[12:28:14.240] <TB1> INFO: ROC 8 VthrComp = 74
[12:28:14.240] <TB1> INFO: ROC 9 VthrComp = 81
[12:28:14.241] <TB1> INFO: ROC 10 VthrComp = 87
[12:28:14.241] <TB1> INFO: ROC 11 VthrComp = 87
[12:28:14.241] <TB1> INFO: ROC 12 VthrComp = 73
[12:28:14.241] <TB1> INFO: ROC 13 VthrComp = 88
[12:28:14.241] <TB1> INFO: ROC 14 VthrComp = 86
[12:28:14.241] <TB1> INFO: ROC 15 VthrComp = 87
[12:28:14.241] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:28:14.241] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 20 dacrange: 0 .. 159 (-1/-1) hits flags = 16 (plus default)
[12:28:14.250] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:28:14.251] <TB1> INFO: run 1 of 1
[12:28:14.560] <TB1> INFO: Expecting 13312000 events.
[12:28:38.996] <TB1> INFO: 781420 events read in total (23718ms).
[12:29:03.940] <TB1> INFO: 1559200 events read in total (48662ms).
[12:29:27.989] <TB1> INFO: 2336620 events read in total (72711ms).
[12:29:50.459] <TB1> INFO: 3113940 events read in total (95181ms).
[12:30:15.377] <TB1> INFO: 3890260 events read in total (120099ms).
[12:30:40.214] <TB1> INFO: 4667240 events read in total (144936ms).
[12:31:05.202] <TB1> INFO: 5444120 events read in total (169924ms).
[12:31:30.125] <TB1> INFO: 6220560 events read in total (194847ms).
[12:31:55.052] <TB1> INFO: 6994340 events read in total (219774ms).
[12:32:19.992] <TB1> INFO: 7764780 events read in total (244714ms).
[12:32:44.968] <TB1> INFO: 8533340 events read in total (269690ms).
[12:33:09.788] <TB1> INFO: 9300980 events read in total (294510ms).
[12:33:34.569] <TB1> INFO: 10068000 events read in total (319291ms).
[12:33:59.522] <TB1> INFO: 10834320 events read in total (344244ms).
[12:34:24.482] <TB1> INFO: 11599940 events read in total (369204ms).
[12:34:49.437] <TB1> INFO: 12365840 events read in total (394159ms).
[12:35:13.722] <TB1> INFO: 13133660 events read in total (418444ms).
[12:35:19.217] <TB1> INFO: 13312000 events read in total (423939ms).
[12:35:19.266] <TB1> INFO: Test took 425015ms.
[12:35:19.413] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:43.437] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 61.4449 for pixel 0/5 mean/min/max = 46.3707/31.2602/61.4812
[12:35:43.438] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 61.9354 for pixel 0/8 mean/min/max = 47.0106/31.8347/62.1865
[12:35:43.438] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.976 for pixel 2/12 mean/min/max = 45.1458/32.1118/58.1797
[12:35:43.438] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 58.0126 for pixel 8/0 mean/min/max = 45.0297/31.9676/58.0918
[12:35:43.438] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 57.9076 for pixel 1/29 mean/min/max = 45.2954/32.676/57.9148
[12:35:43.439] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 56.996 for pixel 51/66 mean/min/max = 45.0297/32.9323/57.1272
[12:35:43.439] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.0129 for pixel 23/0 mean/min/max = 45.2788/32.4637/58.094
[12:35:43.439] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.2266 for pixel 21/4 mean/min/max = 45.685/32.1201/59.2499
[12:35:43.439] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 56.3061 for pixel 51/33 mean/min/max = 45.3547/34.3354/56.374
[12:35:43.440] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 60.1576 for pixel 5/2 mean/min/max = 46.3237/32.3862/60.2613
[12:35:43.440] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 56.6475 for pixel 1/70 mean/min/max = 44.4472/32.2049/56.6896
[12:35:43.440] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 59.2566 for pixel 51/1 mean/min/max = 45.7806/32.1827/59.3785
[12:35:43.441] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 59.5053 for pixel 23/44 mean/min/max = 46.5714/33.5963/59.5464
[12:35:43.441] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 59.1897 for pixel 0/0 mean/min/max = 46.2269/33.0706/59.3832
[12:35:43.441] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.8758 for pixel 20/72 mean/min/max = 45.6337/32.3915/58.8759
[12:35:43.441] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 56.6816 for pixel 16/2 mean/min/max = 44.4246/31.99/56.8592
[12:35:43.441] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:35:43.574] <TB1> INFO: Expecting 1029120 events.
[12:36:05.817] <TB1> INFO: 1029120 events read in total (21523ms).
[12:36:05.823] <TB1> INFO: Expecting 1029120 events.
[12:36:27.657] <TB1> INFO: 1029120 events read in total (21284ms).
[12:36:27.666] <TB1> INFO: Expecting 1029120 events.
[12:36:50.272] <TB1> INFO: 1029120 events read in total (22063ms).
[12:36:50.283] <TB1> INFO: Expecting 1029120 events.
[12:37:13.688] <TB1> INFO: 1029120 events read in total (22877ms).
[12:37:13.700] <TB1> INFO: Expecting 1029120 events.
[12:37:35.327] <TB1> INFO: 1029120 events read in total (21085ms).
[12:37:35.342] <TB1> INFO: Expecting 1029120 events.
[12:37:57.115] <TB1> INFO: 1029120 events read in total (21242ms).
[12:37:57.137] <TB1> INFO: Expecting 1029120 events.
[12:38:21.193] <TB1> INFO: 1029120 events read in total (23528ms).
[12:38:21.211] <TB1> INFO: Expecting 1029120 events.
[12:38:45.102] <TB1> INFO: 1029120 events read in total (23362ms).
[12:38:45.122] <TB1> INFO: Expecting 1029120 events.
[12:39:08.834] <TB1> INFO: 1029120 events read in total (23183ms).
[12:39:08.856] <TB1> INFO: Expecting 1029120 events.
[12:39:32.735] <TB1> INFO: 1029120 events read in total (23350ms).
[12:39:32.758] <TB1> INFO: Expecting 1029120 events.
[12:39:56.725] <TB1> INFO: 1029120 events read in total (23438ms).
[12:39:56.753] <TB1> INFO: Expecting 1029120 events.
[12:40:20.333] <TB1> INFO: 1029120 events read in total (23051ms).
[12:40:20.361] <TB1> INFO: Expecting 1029120 events.
[12:40:44.421] <TB1> INFO: 1029120 events read in total (23531ms).
[12:40:44.454] <TB1> INFO: Expecting 1029120 events.
[12:41:08.104] <TB1> INFO: 1029120 events read in total (23121ms).
[12:41:08.138] <TB1> INFO: Expecting 1029120 events.
[12:41:31.835] <TB1> INFO: 1029120 events read in total (23168ms).
[12:41:31.871] <TB1> INFO: Expecting 1029120 events.
[12:41:55.715] <TB1> INFO: 1029120 events read in total (23315ms).
[12:41:55.750] <TB1> INFO: Test took 372309ms.
[12:41:56.801] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 20 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[12:41:56.810] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:41:56.810] <TB1> INFO: run 1 of 1
[12:41:57.116] <TB1> INFO: Expecting 16640000 events.
[12:42:22.086] <TB1> INFO: 726580 events read in total (24253ms).
[12:42:46.466] <TB1> INFO: 1449980 events read in total (48633ms).
[12:43:10.991] <TB1> INFO: 2172600 events read in total (73158ms).
[12:43:35.377] <TB1> INFO: 2895680 events read in total (97544ms).
[12:43:59.880] <TB1> INFO: 3618620 events read in total (122047ms).
[12:44:24.231] <TB1> INFO: 4340920 events read in total (146398ms).
[12:44:48.457] <TB1> INFO: 5062380 events read in total (170624ms).
[12:45:12.778] <TB1> INFO: 5785440 events read in total (194945ms).
[12:45:37.138] <TB1> INFO: 6507740 events read in total (219305ms).
[12:46:01.456] <TB1> INFO: 7230120 events read in total (243623ms).
[12:46:25.900] <TB1> INFO: 7952780 events read in total (268067ms).
[12:46:50.247] <TB1> INFO: 8672760 events read in total (292414ms).
[12:47:14.503] <TB1> INFO: 9389960 events read in total (316670ms).
[12:47:38.748] <TB1> INFO: 10106500 events read in total (340915ms).
[12:48:02.954] <TB1> INFO: 10822040 events read in total (365121ms).
[12:48:27.158] <TB1> INFO: 11537480 events read in total (389325ms).
[12:48:51.654] <TB1> INFO: 12252660 events read in total (413821ms).
[12:49:15.961] <TB1> INFO: 12966640 events read in total (438128ms).
[12:49:40.174] <TB1> INFO: 13680580 events read in total (462341ms).
[12:50:04.430] <TB1> INFO: 14393980 events read in total (486597ms).
[12:50:28.812] <TB1> INFO: 15107920 events read in total (510979ms).
[12:50:53.198] <TB1> INFO: 15821800 events read in total (535365ms).
[12:51:17.429] <TB1> INFO: 16537300 events read in total (559596ms).
[12:51:21.288] <TB1> INFO: 16640000 events read in total (563455ms).
[12:51:21.350] <TB1> INFO: Test took 564540ms.
[12:51:21.550] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:46.887] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.164655 .. 51.199536
[12:51:46.967] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 20 dacrange: 0 .. 61 (-1/-1) hits flags = 16 (plus default)
[12:51:46.976] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:51:46.976] <TB1> INFO: run 1 of 1
[12:51:47.293] <TB1> INFO: Expecting 5158400 events.
[12:52:12.834] <TB1> INFO: 922200 events read in total (24824ms).
[12:52:39.281] <TB1> INFO: 1845760 events read in total (51272ms).
[12:53:05.763] <TB1> INFO: 2769960 events read in total (77754ms).
[12:53:32.146] <TB1> INFO: 3689900 events read in total (104136ms).
[12:53:58.594] <TB1> INFO: 4603960 events read in total (130584ms).
[12:54:14.738] <TB1> INFO: 5158400 events read in total (146728ms).
[12:54:14.756] <TB1> INFO: Test took 147780ms.
[12:54:14.796] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:28.632] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 15.750114 .. 45.743857
[12:54:28.723] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 20 dacrange: 5 .. 55 (-1/-1) hits flags = 16 (plus default)
[12:54:28.731] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:54:28.731] <TB1> INFO: run 1 of 1
[12:54:29.049] <TB1> INFO: Expecting 4243200 events.
[12:54:54.137] <TB1> INFO: 938800 events read in total (24371ms).
[12:55:18.228] <TB1> INFO: 1877540 events read in total (48462ms).
[12:55:45.110] <TB1> INFO: 2815660 events read in total (75345ms).
[12:56:11.695] <TB1> INFO: 3751720 events read in total (101929ms).
[12:56:25.986] <TB1> INFO: 4243200 events read in total (116220ms).
[12:56:26.003] <TB1> INFO: Test took 117273ms.
[12:56:26.039] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:39.534] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 20.722179 .. 42.562028
[12:56:39.628] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 20 dacrange: 10 .. 52 (-1/-1) hits flags = 16 (plus default)
[12:56:39.636] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:56:39.636] <TB1> INFO: run 1 of 1
[12:56:39.945] <TB1> INFO: Expecting 3577600 events.
[12:57:07.383] <TB1> INFO: 937140 events read in total (26721ms).
[12:57:34.005] <TB1> INFO: 1874200 events read in total (53344ms).
[12:58:00.538] <TB1> INFO: 2809600 events read in total (79877ms).
[12:58:20.915] <TB1> INFO: 3577600 events read in total (100253ms).
[12:58:20.934] <TB1> INFO: Test took 101298ms.
[12:58:20.968] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:33.564] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 23.076673 .. 42.535342
[12:58:33.657] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 20 dacrange: 13 .. 52 (-1/-1) hits flags = 16 (plus default)
[12:58:33.666] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[12:58:33.667] <TB1> INFO: run 1 of 1
[12:58:34.003] <TB1> INFO: Expecting 3328000 events.
[12:59:01.399] <TB1> INFO: 915980 events read in total (26679ms).
[12:59:27.893] <TB1> INFO: 1832760 events read in total (53173ms).
[12:59:54.281] <TB1> INFO: 2748900 events read in total (79561ms).
[13:00:11.344] <TB1> INFO: 3328000 events read in total (96624ms).
[13:00:11.359] <TB1> INFO: Test took 97692ms.
[13:00:11.391] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:24.673] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:00:24.673] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 20 dacrange: 15 .. 55 (-1/-1) hits flags = 16 (plus default)
[13:00:24.681] <TB1> INFO: dacScan split into 1 runs with ntrig = 20
[13:00:24.681] <TB1> INFO: run 1 of 1
[13:00:25.012] <TB1> INFO: Expecting 3411200 events.
[13:00:49.609] <TB1> INFO: 879560 events read in total (23880ms).
[13:01:15.685] <TB1> INFO: 1759280 events read in total (49956ms).
[13:01:41.836] <TB1> INFO: 2638620 events read in total (76108ms).
[13:02:04.858] <TB1> INFO: 3411200 events read in total (99129ms).
[13:02:04.873] <TB1> INFO: Test took 100192ms.
[13:02:04.909] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:18.436] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:02:18.436] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:02:18.437] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:02:18.438] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:02:18.438] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:02:18.438] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:02:18.438] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:02:18.439] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:02:18.439] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:02:18.439] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:02:18.440] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:02:18.440] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:02:18.440] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:02:18.440] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:02:18.441] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:02:18.441] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:02:18.441] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:02:18.451] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:02:18.458] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:02:18.465] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:02:18.472] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:02:18.479] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:02:18.485] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:02:18.492] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:02:18.498] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:02:18.505] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:02:18.512] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:02:18.518] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:02:18.524] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:02:18.532] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:02:18.538] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:02:18.544] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:02:18.550] <TB1> INFO: PixTestTrim::trimTest() done
[13:02:18.550] <TB1> INFO: vtrim: 95 100 106 97 85 84 96 91 82 99 97 90 96 87 92 88
[13:02:18.550] <TB1> INFO: vthrcomp: 95 82 95 93 83 89 80 84 74 81 87 87 73 88 86 87
[13:02:18.550] <TB1> INFO: vcal mean: 35.02 35.00 34.97 34.92 34.99 35.02 34.99 34.99 35.05 34.94 34.99 34.94 35.02 35.01 35.01 34.96
[13:02:18.550] <TB1> INFO: vcal RMS: 0.72 0.74 0.67 0.77 0.66 0.63 0.64 0.68 0.82 0.69 0.69 0.70 0.69 0.71 0.70 0.67
[13:02:18.550] <TB1> INFO: bits mean: 8.78 8.73 9.41 9.67 9.21 8.66 9.17 9.06 8.60 8.94 9.70 8.86 8.56 8.25 9.23 9.27
[13:02:18.550] <TB1> INFO: bits RMS: 3.08 2.98 2.71 2.68 2.75 2.95 2.82 2.83 2.71 2.83 2.65 2.90 2.75 3.08 2.76 2.90
[13:02:18.559] <TB1> INFO: ----------------------------------------------------------------------
[13:02:18.559] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:02:18.559] <TB1> INFO: ----------------------------------------------------------------------
[13:02:18.563] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 16 (plus default)
[13:02:18.576] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:02:18.576] <TB1> INFO: run 1 of 1
[13:02:18.892] <TB1> INFO: Expecting 8320000 events.
[13:02:48.160] <TB1> INFO: 901110 events read in total (28551ms).
[13:03:17.379] <TB1> INFO: 1796810 events read in total (57770ms).
[13:03:46.570] <TB1> INFO: 2689550 events read in total (86961ms).
[13:04:15.755] <TB1> INFO: 3580850 events read in total (116146ms).
[13:04:44.928] <TB1> INFO: 4467240 events read in total (145319ms).
[13:05:11.947] <TB1> INFO: 5348670 events read in total (172338ms).
[13:05:38.732] <TB1> INFO: 6229130 events read in total (199123ms).
[13:06:05.798] <TB1> INFO: 7109090 events read in total (226189ms).
[13:06:32.439] <TB1> INFO: 7990670 events read in total (252830ms).
[13:06:43.176] <TB1> INFO: 8320000 events read in total (263567ms).
[13:06:43.219] <TB1> INFO: Test took 264643ms.
[13:06:43.337] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:10.485] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 16 (plus default)
[13:07:10.494] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:07:10.494] <TB1> INFO: run 1 of 1
[13:07:10.798] <TB1> INFO: Expecting 6572800 events.
[13:07:41.472] <TB1> INFO: 950980 events read in total (29957ms).
[13:08:10.679] <TB1> INFO: 1894950 events read in total (59164ms).
[13:08:37.965] <TB1> INFO: 2835220 events read in total (86450ms).
[13:09:07.766] <TB1> INFO: 3766940 events read in total (116251ms).
[13:09:37.591] <TB1> INFO: 4693940 events read in total (146076ms).
[13:10:07.158] <TB1> INFO: 5618460 events read in total (175643ms).
[13:10:36.745] <TB1> INFO: 6549660 events read in total (205230ms).
[13:10:37.956] <TB1> INFO: 6572800 events read in total (206441ms).
[13:10:37.986] <TB1> INFO: Test took 207492ms.
[13:10:38.068] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:01.797] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 146 (-1/-1) hits flags = 16 (plus default)
[13:11:01.806] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:11:01.806] <TB1> INFO: run 1 of 1
[13:11:02.124] <TB1> INFO: Expecting 6115200 events.
[13:11:32.316] <TB1> INFO: 981860 events read in total (29474ms).
[13:12:01.471] <TB1> INFO: 1955270 events read in total (58629ms).
[13:12:29.143] <TB1> INFO: 2924070 events read in total (86302ms).
[13:12:59.242] <TB1> INFO: 3880780 events read in total (116400ms).
[13:13:29.004] <TB1> INFO: 4834580 events read in total (146162ms).
[13:13:59.057] <TB1> INFO: 5788360 events read in total (176215ms).
[13:14:09.603] <TB1> INFO: 6115200 events read in total (186761ms).
[13:14:09.635] <TB1> INFO: Test took 187829ms.
[13:14:09.703] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:32.651] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 146 (-1/-1) hits flags = 16 (plus default)
[13:14:32.659] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:14:32.660] <TB1> INFO: run 1 of 1
[13:14:32.976] <TB1> INFO: Expecting 6115200 events.
[13:15:04.183] <TB1> INFO: 981270 events read in total (30489ms).
[13:15:34.559] <TB1> INFO: 1953780 events read in total (60865ms).
[13:16:02.675] <TB1> INFO: 2921990 events read in total (88981ms).
[13:16:30.044] <TB1> INFO: 3877970 events read in total (116350ms).
[13:17:00.110] <TB1> INFO: 4831250 events read in total (146416ms).
[13:17:30.170] <TB1> INFO: 5784130 events read in total (176476ms).
[13:17:40.767] <TB1> INFO: 6115200 events read in total (187073ms).
[13:17:40.793] <TB1> INFO: Test took 188133ms.
[13:17:40.869] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:02.791] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 145 (-1/-1) hits flags = 16 (plus default)
[13:18:02.800] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[13:18:02.800] <TB1> INFO: run 1 of 1
[13:18:03.109] <TB1> INFO: Expecting 6073600 events.
[13:18:34.187] <TB1> INFO: 983600 events read in total (30361ms).
[13:19:04.544] <TB1> INFO: 1958390 events read in total (60719ms).
[13:19:34.907] <TB1> INFO: 2928650 events read in total (91081ms).
[13:20:05.008] <TB1> INFO: 3886380 events read in total (121182ms).
[13:20:32.921] <TB1> INFO: 4841230 events read in total (149096ms).
[13:21:01.814] <TB1> INFO: 5796800 events read in total (177988ms).
[13:21:09.989] <TB1> INFO: 6073600 events read in total (186163ms).
[13:21:10.018] <TB1> INFO: Test took 187218ms.
[13:21:10.088] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:31.927] <TB1> INFO: PixTestTrim::trimBitTest() done
[13:21:31.928] <TB1> INFO: PixTestTrim::doTest() done, duration: 3559 seconds
[13:21:32.637] <TB1> INFO: ######################################################################
[13:21:32.637] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:21:32.637] <TB1> INFO: ######################################################################
[13:21:32.955] <TB1> INFO: Expecting 41600 events.
[13:21:37.346] <TB1> INFO: 41600 events read in total (3674ms).
[13:21:37.347] <TB1> INFO: Test took 4708ms.
[13:21:37.353] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:37.963] <TB1> INFO: Expecting 41600 events.
[13:21:42.463] <TB1> INFO: 41600 events read in total (3783ms).
[13:21:42.463] <TB1> INFO: Test took 4848ms.
[13:21:42.469] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:42.831] <TB1> INFO: Expecting 41600 events.
[13:21:47.312] <TB1> INFO: 41600 events read in total (3764ms).
[13:21:47.313] <TB1> INFO: Test took 4820ms.
[13:21:47.319] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:47.326] <TB1> INFO: The DUT currently contains the following objects:
[13:21:47.327] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:47.327] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:47.327] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:47.327] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:47.327] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.327] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:47.671] <TB1> INFO: Expecting 2560 events.
[13:21:48.743] <TB1> INFO: 2560 events read in total (355ms).
[13:21:48.744] <TB1> INFO: Test took 1417ms.
[13:21:48.744] <TB1> INFO: The DUT currently contains the following objects:
[13:21:48.745] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:48.745] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:48.745] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:48.745] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:48.745] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:48.745] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:49.159] <TB1> INFO: Expecting 2560 events.
[13:21:50.231] <TB1> INFO: 2560 events read in total (354ms).
[13:21:50.231] <TB1> INFO: Test took 1486ms.
[13:21:50.232] <TB1> INFO: The DUT currently contains the following objects:
[13:21:50.232] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:50.232] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:50.232] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:50.232] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:50.232] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.232] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.233] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.233] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.233] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.233] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.233] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:50.647] <TB1> INFO: Expecting 2560 events.
[13:21:51.723] <TB1> INFO: 2560 events read in total (358ms).
[13:21:51.723] <TB1> INFO: Test took 1490ms.
[13:21:51.724] <TB1> INFO: The DUT currently contains the following objects:
[13:21:51.724] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:51.724] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:51.724] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:51.724] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:51.724] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.724] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.724] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.724] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.724] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.724] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.724] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.724] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.725] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.725] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.725] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.725] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.725] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.725] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.725] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:51.725] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:52.139] <TB1> INFO: Expecting 2560 events.
[13:21:53.210] <TB1> INFO: 2560 events read in total (354ms).
[13:21:53.211] <TB1> INFO: Test took 1486ms.
[13:21:53.211] <TB1> INFO: The DUT currently contains the following objects:
[13:21:53.211] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:53.211] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:53.211] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:53.211] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:53.212] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.212] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:53.627] <TB1> INFO: Expecting 2560 events.
[13:21:54.698] <TB1> INFO: 2560 events read in total (354ms).
[13:21:54.699] <TB1> INFO: Test took 1487ms.
[13:21:54.699] <TB1> INFO: The DUT currently contains the following objects:
[13:21:54.699] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:54.699] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:54.699] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:54.699] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:54.699] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.699] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.699] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.699] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:54.700] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:55.114] <TB1> INFO: Expecting 2560 events.
[13:21:56.186] <TB1> INFO: 2560 events read in total (355ms).
[13:21:56.187] <TB1> INFO: Test took 1487ms.
[13:21:56.187] <TB1> INFO: The DUT currently contains the following objects:
[13:21:56.187] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:56.187] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:56.187] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:56.187] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:56.187] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.187] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.187] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.188] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:56.604] <TB1> INFO: Expecting 2560 events.
[13:21:57.674] <TB1> INFO: 2560 events read in total (353ms).
[13:21:57.675] <TB1> INFO: Test took 1487ms.
[13:21:57.675] <TB1> INFO: The DUT currently contains the following objects:
[13:21:57.675] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:57.675] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:57.675] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:57.675] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:57.675] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.675] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.676] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:57.676] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:58.090] <TB1> INFO: Expecting 2560 events.
[13:21:59.161] <TB1> INFO: 2560 events read in total (354ms).
[13:21:59.161] <TB1> INFO: Test took 1485ms.
[13:21:59.162] <TB1> INFO: The DUT currently contains the following objects:
[13:21:59.162] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:21:59.162] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:21:59.162] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:21:59.162] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:21:59.162] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.162] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.163] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.163] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.163] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:21:59.577] <TB1> INFO: Expecting 2560 events.
[13:22:00.650] <TB1> INFO: 2560 events read in total (356ms).
[13:22:00.651] <TB1> INFO: Test took 1488ms.
[13:22:00.651] <TB1> INFO: The DUT currently contains the following objects:
[13:22:00.651] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:22:00.651] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:22:00.651] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:22:00.651] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:22:00.651] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.651] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.651] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.651] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.651] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:00.652] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:01.066] <TB1> INFO: Expecting 2560 events.
[13:22:02.136] <TB1> INFO: 2560 events read in total (353ms).
[13:22:02.137] <TB1> INFO: Test took 1485ms.
[13:22:02.137] <TB1> INFO: The DUT currently contains the following objects:
[13:22:02.137] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:22:02.137] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:22:02.137] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:22:02.137] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:22:02.137] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.137] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.137] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.137] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.138] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:02.552] <TB1> INFO: Expecting 2560 events.
[13:22:03.624] <TB1> INFO: 2560 events read in total (355ms).
[13:22:03.624] <TB1> INFO: Test took 1486ms.
[13:22:03.625] <TB1> INFO: The DUT currently contains the following objects:
[13:22:03.625] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:22:03.625] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:22:03.625] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:22:03.625] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:22:03.625] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:03.625] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:04.040] <TB1> INFO: Expecting 2560 events.
[13:22:05.113] <TB1> INFO: 2560 events read in total (356ms).
[13:22:05.113] <TB1> INFO: Test took 1488ms.
[13:22:05.113] <TB1> INFO: The DUT currently contains the following objects:
[13:22:05.114] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:22:05.114] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:22:05.114] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:22:05.114] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:22:05.114] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.114] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:05.529] <TB1> INFO: Expecting 2560 events.
[13:22:06.600] <TB1> INFO: 2560 events read in total (354ms).
[13:22:06.601] <TB1> INFO: Test took 1487ms.
[13:22:06.601] <TB1> INFO: The DUT currently contains the following objects:
[13:22:06.601] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:22:06.601] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:22:06.601] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:22:06.601] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:22:06.601] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.601] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.601] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.601] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:06.602] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:07.017] <TB1> INFO: Expecting 2560 events.
[13:22:08.088] <TB1> INFO: 2560 events read in total (354ms).
[13:22:08.088] <TB1> INFO: Test took 1486ms.
[13:22:08.089] <TB1> INFO: The DUT currently contains the following objects:
[13:22:08.089] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:22:08.089] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:22:08.089] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:22:08.089] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:22:08.089] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.089] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:08.504] <TB1> INFO: Expecting 2560 events.
[13:22:09.575] <TB1> INFO: 2560 events read in total (354ms).
[13:22:09.575] <TB1> INFO: Test took 1486ms.
[13:22:09.578] <TB1> INFO: The DUT currently contains the following objects:
[13:22:09.578] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[13:22:09.578] <TB1> INFO: TBM Core alpha (0): 7 registers set
[13:22:09.578] <TB1> INFO: TBM Core beta (1): 7 registers set
[13:22:09.578] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:22:09.578] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.578] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.578] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.578] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.578] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.579] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.580] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.580] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:22:09.991] <TB1> INFO: Expecting 2560 events.
[13:22:11.063] <TB1> INFO: 2560 events read in total (355ms).
[13:22:11.063] <TB1> INFO: Test took 1484ms.
[13:22:11.068] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:22:11.482] <TB1> INFO: Expecting 655360 events.
[13:22:28.185] <TB1> INFO: 655360 events read in total (15986ms).
[13:22:28.194] <TB1> INFO: Expecting 655360 events.
[13:22:44.241] <TB1> INFO: 655360 events read in total (15518ms).
[13:22:44.254] <TB1> INFO: Expecting 655360 events.
[13:22:59.353] <TB1> INFO: 655360 events read in total (14571ms).
[13:22:59.369] <TB1> INFO: Expecting 655360 events.
[13:23:15.794] <TB1> INFO: 655360 events read in total (15897ms).
[13:23:15.814] <TB1> INFO: Expecting 655360 events.
[13:23:32.672] <TB1> INFO: 655360 events read in total (16329ms).
[13:23:32.699] <TB1> INFO: Expecting 655360 events.
[13:23:49.329] <TB1> INFO: 655360 events read in total (16102ms).
[13:23:49.357] <TB1> INFO: Expecting 655360 events.
[13:24:06.211] <TB1> INFO: 655360 events read in total (16325ms).
[13:24:06.244] <TB1> INFO: Expecting 655360 events.
[13:24:21.378] <TB1> INFO: 655360 events read in total (14606ms).
[13:24:21.412] <TB1> INFO: Expecting 655360 events.
[13:24:37.365] <TB1> INFO: 655360 events read in total (15425ms).
[13:24:37.404] <TB1> INFO: Expecting 655360 events.
[13:24:53.091] <TB1> INFO: 655360 events read in total (15159ms).
[13:24:53.130] <TB1> INFO: Expecting 655360 events.
[13:25:08.153] <TB1> INFO: 655360 events read in total (14495ms).
[13:25:08.197] <TB1> INFO: Expecting 655360 events.
[13:25:24.616] <TB1> INFO: 655360 events read in total (15891ms).
[13:25:24.665] <TB1> INFO: Expecting 655360 events.
[13:25:41.221] <TB1> INFO: 655360 events read in total (16028ms).
[13:25:41.273] <TB1> INFO: Expecting 655360 events.
[13:25:57.925] <TB1> INFO: 655360 events read in total (16123ms).
[13:25:57.981] <TB1> INFO: Expecting 655360 events.
[13:26:14.446] <TB1> INFO: 655360 events read in total (15937ms).
[13:26:14.507] <TB1> INFO: Expecting 655360 events.
[13:26:31.017] <TB1> INFO: 655360 events read in total (15981ms).
[13:26:31.078] <TB1> INFO: Test took 260010ms.
[13:26:31.162] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:26:31.471] <TB1> INFO: Expecting 655360 events.
[13:26:48.057] <TB1> INFO: 655360 events read in total (15869ms).
[13:26:48.068] <TB1> INFO: Expecting 655360 events.
[13:27:04.719] <TB1> INFO: 655360 events read in total (16123ms).
[13:27:04.731] <TB1> INFO: Expecting 655360 events.
[13:27:21.157] <TB1> INFO: 655360 events read in total (15897ms).
[13:27:21.175] <TB1> INFO: Expecting 655360 events.
[13:27:37.744] <TB1> INFO: 655360 events read in total (16041ms).
[13:27:37.766] <TB1> INFO: Expecting 655360 events.
[13:27:52.930] <TB1> INFO: 655360 events read in total (14636ms).
[13:27:52.954] <TB1> INFO: Expecting 655360 events.
[13:28:08.406] <TB1> INFO: 655360 events read in total (14924ms).
[13:28:08.434] <TB1> INFO: Expecting 655360 events.
[13:28:23.832] <TB1> INFO: 655360 events read in total (14870ms).
[13:28:23.875] <TB1> INFO: Expecting 655360 events.
[13:28:39.028] <TB1> INFO: 655360 events read in total (14625ms).
[13:28:39.062] <TB1> INFO: Expecting 655360 events.
[13:28:55.581] <TB1> INFO: 655360 events read in total (15991ms).
[13:28:55.617] <TB1> INFO: Expecting 655360 events.
[13:29:12.185] <TB1> INFO: 655360 events read in total (16040ms).
[13:29:12.224] <TB1> INFO: Expecting 655360 events.
[13:29:28.816] <TB1> INFO: 655360 events read in total (16063ms).
[13:29:28.893] <TB1> INFO: Expecting 655360 events.
[13:29:45.336] <TB1> INFO: 655360 events read in total (15915ms).
[13:29:45.380] <TB1> INFO: Expecting 655360 events.
[13:30:01.876] <TB1> INFO: 655360 events read in total (15967ms).
[13:30:01.927] <TB1> INFO: Expecting 655360 events.
[13:30:18.501] <TB1> INFO: 655360 events read in total (16046ms).
[13:30:18.559] <TB1> INFO: Expecting 655360 events.
[13:30:35.121] <TB1> INFO: 655360 events read in total (16033ms).
[13:30:35.183] <TB1> INFO: Expecting 655360 events.
[13:30:51.731] <TB1> INFO: 655360 events read in total (16020ms).
[13:30:51.790] <TB1> INFO: Test took 260628ms.
[13:30:52.004] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.013] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.020] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.027] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.034] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.041] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.047] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.054] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.061] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.069] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.078] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.086] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.095] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.103] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.112] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.121] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[13:30:52.178] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:30:52.178] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:30:52.178] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:30:52.178] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:30:52.179] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:30:52.179] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:30:52.179] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:30:52.179] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:30:52.180] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:30:52.180] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:30:52.180] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:30:52.180] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:30:52.180] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:30:52.181] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:30:52.181] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:30:52.181] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:30:52.500] <TB1> INFO: Expecting 41600 events.
[13:30:56.984] <TB1> INFO: 41600 events read in total (3768ms).
[13:30:56.985] <TB1> INFO: Test took 4799ms.
[13:30:57.543] <TB1> INFO: Expecting 41600 events.
[13:31:02.071] <TB1> INFO: 41600 events read in total (3811ms).
[13:31:02.071] <TB1> INFO: Test took 4846ms.
[13:31:02.633] <TB1> INFO: Expecting 41600 events.
[13:31:07.174] <TB1> INFO: 41600 events read in total (3823ms).
[13:31:07.175] <TB1> INFO: Test took 4868ms.
[13:31:07.414] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:07.548] <TB1> INFO: Expecting 2560 events.
[13:31:08.621] <TB1> INFO: 2560 events read in total (356ms).
[13:31:08.621] <TB1> INFO: Test took 1207ms.
[13:31:08.626] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:09.038] <TB1> INFO: Expecting 2560 events.
[13:31:10.110] <TB1> INFO: 2560 events read in total (355ms).
[13:31:10.110] <TB1> INFO: Test took 1484ms.
[13:31:10.116] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:10.527] <TB1> INFO: Expecting 2560 events.
[13:31:11.599] <TB1> INFO: 2560 events read in total (355ms).
[13:31:11.599] <TB1> INFO: Test took 1484ms.
[13:31:11.602] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:12.015] <TB1> INFO: Expecting 2560 events.
[13:31:13.081] <TB1> INFO: 2560 events read in total (349ms).
[13:31:13.082] <TB1> INFO: Test took 1480ms.
[13:31:13.085] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:13.499] <TB1> INFO: Expecting 2560 events.
[13:31:14.569] <TB1> INFO: 2560 events read in total (354ms).
[13:31:14.570] <TB1> INFO: Test took 1485ms.
[13:31:14.575] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:14.986] <TB1> INFO: Expecting 2560 events.
[13:31:16.058] <TB1> INFO: 2560 events read in total (355ms).
[13:31:16.058] <TB1> INFO: Test took 1484ms.
[13:31:16.063] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:16.475] <TB1> INFO: Expecting 2560 events.
[13:31:17.547] <TB1> INFO: 2560 events read in total (355ms).
[13:31:17.547] <TB1> INFO: Test took 1484ms.
[13:31:17.552] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:17.964] <TB1> INFO: Expecting 2560 events.
[13:31:19.035] <TB1> INFO: 2560 events read in total (354ms).
[13:31:19.036] <TB1> INFO: Test took 1484ms.
[13:31:19.039] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:19.453] <TB1> INFO: Expecting 2560 events.
[13:31:20.523] <TB1> INFO: 2560 events read in total (353ms).
[13:31:20.524] <TB1> INFO: Test took 1485ms.
[13:31:20.527] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:20.941] <TB1> INFO: Expecting 2560 events.
[13:31:22.011] <TB1> INFO: 2560 events read in total (353ms).
[13:31:22.012] <TB1> INFO: Test took 1485ms.
[13:31:22.015] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:22.429] <TB1> INFO: Expecting 2560 events.
[13:31:23.501] <TB1> INFO: 2560 events read in total (355ms).
[13:31:23.501] <TB1> INFO: Test took 1486ms.
[13:31:23.504] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:23.918] <TB1> INFO: Expecting 2560 events.
[13:31:24.989] <TB1> INFO: 2560 events read in total (354ms).
[13:31:24.989] <TB1> INFO: Test took 1485ms.
[13:31:24.992] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:25.406] <TB1> INFO: Expecting 2560 events.
[13:31:26.477] <TB1> INFO: 2560 events read in total (354ms).
[13:31:26.478] <TB1> INFO: Test took 1486ms.
[13:31:26.481] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:26.895] <TB1> INFO: Expecting 2560 events.
[13:31:27.966] <TB1> INFO: 2560 events read in total (354ms).
[13:31:27.966] <TB1> INFO: Test took 1485ms.
[13:31:27.969] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:28.384] <TB1> INFO: Expecting 2560 events.
[13:31:29.455] <TB1> INFO: 2560 events read in total (354ms).
[13:31:29.455] <TB1> INFO: Test took 1486ms.
[13:31:29.461] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:29.872] <TB1> INFO: Expecting 2560 events.
[13:31:30.944] <TB1> INFO: 2560 events read in total (355ms).
[13:31:30.944] <TB1> INFO: Test took 1483ms.
[13:31:30.947] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:31.361] <TB1> INFO: Expecting 2560 events.
[13:31:32.432] <TB1> INFO: 2560 events read in total (354ms).
[13:31:32.432] <TB1> INFO: Test took 1485ms.
[13:31:32.435] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:32.850] <TB1> INFO: Expecting 2560 events.
[13:31:33.921] <TB1> INFO: 2560 events read in total (354ms).
[13:31:33.921] <TB1> INFO: Test took 1486ms.
[13:31:33.926] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:34.338] <TB1> INFO: Expecting 2560 events.
[13:31:35.408] <TB1> INFO: 2560 events read in total (353ms).
[13:31:35.409] <TB1> INFO: Test took 1483ms.
[13:31:35.412] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:35.826] <TB1> INFO: Expecting 2560 events.
[13:31:36.898] <TB1> INFO: 2560 events read in total (355ms).
[13:31:36.899] <TB1> INFO: Test took 1487ms.
[13:31:36.902] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:37.316] <TB1> INFO: Expecting 2560 events.
[13:31:38.388] <TB1> INFO: 2560 events read in total (355ms).
[13:31:38.388] <TB1> INFO: Test took 1486ms.
[13:31:38.392] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:38.804] <TB1> INFO: Expecting 2560 events.
[13:31:39.877] <TB1> INFO: 2560 events read in total (356ms).
[13:31:39.877] <TB1> INFO: Test took 1485ms.
[13:31:39.880] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:40.294] <TB1> INFO: Expecting 2560 events.
[13:31:41.365] <TB1> INFO: 2560 events read in total (354ms).
[13:31:41.365] <TB1> INFO: Test took 1485ms.
[13:31:41.368] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:41.783] <TB1> INFO: Expecting 2560 events.
[13:31:42.855] <TB1> INFO: 2560 events read in total (355ms).
[13:31:42.855] <TB1> INFO: Test took 1487ms.
[13:31:42.859] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:43.272] <TB1> INFO: Expecting 2560 events.
[13:31:44.345] <TB1> INFO: 2560 events read in total (356ms).
[13:31:44.345] <TB1> INFO: Test took 1486ms.
[13:31:44.348] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:44.762] <TB1> INFO: Expecting 2560 events.
[13:31:45.834] <TB1> INFO: 2560 events read in total (355ms).
[13:31:45.834] <TB1> INFO: Test took 1486ms.
[13:31:45.837] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:46.251] <TB1> INFO: Expecting 2560 events.
[13:31:47.323] <TB1> INFO: 2560 events read in total (355ms).
[13:31:47.324] <TB1> INFO: Test took 1487ms.
[13:31:47.327] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:47.740] <TB1> INFO: Expecting 2560 events.
[13:31:48.814] <TB1> INFO: 2560 events read in total (356ms).
[13:31:48.814] <TB1> INFO: Test took 1487ms.
[13:31:48.817] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:49.231] <TB1> INFO: Expecting 2560 events.
[13:31:50.302] <TB1> INFO: 2560 events read in total (354ms).
[13:31:50.302] <TB1> INFO: Test took 1485ms.
[13:31:50.305] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:50.719] <TB1> INFO: Expecting 2560 events.
[13:31:51.791] <TB1> INFO: 2560 events read in total (355ms).
[13:31:51.791] <TB1> INFO: Test took 1486ms.
[13:31:51.794] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:52.209] <TB1> INFO: Expecting 2560 events.
[13:31:53.280] <TB1> INFO: 2560 events read in total (354ms).
[13:31:53.280] <TB1> INFO: Test took 1486ms.
[13:31:53.283] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:53.697] <TB1> INFO: Expecting 2560 events.
[13:31:54.769] <TB1> INFO: 2560 events read in total (355ms).
[13:31:54.769] <TB1> INFO: Test took 1486ms.
[13:31:55.447] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 622 seconds
[13:31:55.447] <TB1> INFO: PH scale (per ROC): 81 79 93 81 79 86 76 82 86 81 84 74 95 76 79 81
[13:31:55.447] <TB1> INFO: PH offset (per ROC): 177 155 159 171 165 167 171 150 140 161 156 150 148 161 156 149
[13:31:55.625] <TB1> INFO: ######################################################################
[13:31:55.625] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:31:55.625] <TB1> INFO: ######################################################################
[13:31:55.636] <TB1> INFO: scanning low vcal = 10
[13:31:55.955] <TB1> INFO: Expecting 41600 events.
[13:31:59.536] <TB1> INFO: 41600 events read in total (2864ms).
[13:31:59.536] <TB1> INFO: Test took 3899ms.
[13:31:59.540] <TB1> INFO: scanning low vcal = 20
[13:31:59.953] <TB1> INFO: Expecting 41600 events.
[13:32:03.526] <TB1> INFO: 41600 events read in total (2856ms).
[13:32:03.527] <TB1> INFO: Test took 3987ms.
[13:32:03.530] <TB1> INFO: scanning low vcal = 30
[13:32:03.943] <TB1> INFO: Expecting 41600 events.
[13:32:07.513] <TB1> INFO: 41600 events read in total (2853ms).
[13:32:07.513] <TB1> INFO: Test took 3983ms.
[13:32:07.516] <TB1> INFO: scanning low vcal = 40
[13:32:07.926] <TB1> INFO: Expecting 41600 events.
[13:32:11.947] <TB1> INFO: 41600 events read in total (3305ms).
[13:32:11.948] <TB1> INFO: Test took 4432ms.
[13:32:11.952] <TB1> INFO: scanning low vcal = 50
[13:32:12.306] <TB1> INFO: Expecting 41600 events.
[13:32:16.372] <TB1> INFO: 41600 events read in total (3349ms).
[13:32:16.374] <TB1> INFO: Test took 4422ms.
[13:32:16.378] <TB1> INFO: scanning low vcal = 60
[13:32:16.732] <TB1> INFO: Expecting 41600 events.
[13:32:20.813] <TB1> INFO: 41600 events read in total (3364ms).
[13:32:20.813] <TB1> INFO: Test took 4435ms.
[13:32:20.817] <TB1> INFO: scanning low vcal = 70
[13:32:21.202] <TB1> INFO: Expecting 41600 events.
[13:32:25.317] <TB1> INFO: 41600 events read in total (3398ms).
[13:32:25.318] <TB1> INFO: Test took 4501ms.
[13:32:25.322] <TB1> INFO: scanning low vcal = 80
[13:32:25.649] <TB1> INFO: Expecting 41600 events.
[13:32:29.759] <TB1> INFO: 41600 events read in total (3393ms).
[13:32:29.760] <TB1> INFO: Test took 4438ms.
[13:32:29.764] <TB1> INFO: scanning low vcal = 90
[13:32:30.116] <TB1> INFO: Expecting 41600 events.
[13:32:34.284] <TB1> INFO: 41600 events read in total (3451ms).
[13:32:34.285] <TB1> INFO: Test took 4521ms.
[13:32:34.288] <TB1> INFO: scanning low vcal = 100
[13:32:34.643] <TB1> INFO: Expecting 41600 events.
[13:32:38.879] <TB1> INFO: 41600 events read in total (3519ms).
[13:32:38.879] <TB1> INFO: Test took 4590ms.
[13:32:38.884] <TB1> INFO: scanning low vcal = 110
[13:32:39.226] <TB1> INFO: Expecting 41600 events.
[13:32:43.425] <TB1> INFO: 41600 events read in total (3483ms).
[13:32:43.425] <TB1> INFO: Test took 4541ms.
[13:32:43.429] <TB1> INFO: scanning low vcal = 120
[13:32:43.777] <TB1> INFO: Expecting 41600 events.
[13:32:48.007] <TB1> INFO: 41600 events read in total (3513ms).
[13:32:48.007] <TB1> INFO: Test took 4578ms.
[13:32:48.011] <TB1> INFO: scanning low vcal = 130
[13:32:48.361] <TB1> INFO: Expecting 41600 events.
[13:32:52.547] <TB1> INFO: 41600 events read in total (3469ms).
[13:32:52.549] <TB1> INFO: Test took 4538ms.
[13:32:52.553] <TB1> INFO: scanning low vcal = 140
[13:32:52.900] <TB1> INFO: Expecting 41600 events.
[13:32:57.101] <TB1> INFO: 41600 events read in total (3484ms).
[13:32:57.102] <TB1> INFO: Test took 4549ms.
[13:32:57.106] <TB1> INFO: scanning low vcal = 150
[13:32:57.454] <TB1> INFO: Expecting 41600 events.
[13:33:01.737] <TB1> INFO: 41600 events read in total (3566ms).
[13:33:01.737] <TB1> INFO: Test took 4631ms.
[13:33:01.741] <TB1> INFO: scanning low vcal = 160
[13:33:02.082] <TB1> INFO: Expecting 41600 events.
[13:33:06.333] <TB1> INFO: 41600 events read in total (3534ms).
[13:33:06.334] <TB1> INFO: Test took 4593ms.
[13:33:06.338] <TB1> INFO: scanning low vcal = 170
[13:33:06.685] <TB1> INFO: Expecting 41600 events.
[13:33:10.837] <TB1> INFO: 41600 events read in total (3435ms).
[13:33:10.837] <TB1> INFO: Test took 4499ms.
[13:33:10.842] <TB1> INFO: scanning low vcal = 180
[13:33:11.185] <TB1> INFO: Expecting 41600 events.
[13:33:15.446] <TB1> INFO: 41600 events read in total (3544ms).
[13:33:15.447] <TB1> INFO: Test took 4605ms.
[13:33:15.450] <TB1> INFO: scanning low vcal = 190
[13:33:15.787] <TB1> INFO: Expecting 41600 events.
[13:33:20.002] <TB1> INFO: 41600 events read in total (3497ms).
[13:33:20.002] <TB1> INFO: Test took 4551ms.
[13:33:20.006] <TB1> INFO: scanning low vcal = 200
[13:33:20.349] <TB1> INFO: Expecting 41600 events.
[13:33:24.555] <TB1> INFO: 41600 events read in total (3488ms).
[13:33:24.555] <TB1> INFO: Test took 4549ms.
[13:33:24.559] <TB1> INFO: scanning low vcal = 210
[13:33:24.911] <TB1> INFO: Expecting 41600 events.
[13:33:29.136] <TB1> INFO: 41600 events read in total (3508ms).
[13:33:29.137] <TB1> INFO: Test took 4578ms.
[13:33:29.140] <TB1> INFO: scanning low vcal = 220
[13:33:29.495] <TB1> INFO: Expecting 41600 events.
[13:33:33.723] <TB1> INFO: 41600 events read in total (3511ms).
[13:33:33.723] <TB1> INFO: Test took 4583ms.
[13:33:33.727] <TB1> INFO: scanning low vcal = 230
[13:33:34.067] <TB1> INFO: Expecting 41600 events.
[13:33:38.325] <TB1> INFO: 41600 events read in total (3541ms).
[13:33:38.326] <TB1> INFO: Test took 4599ms.
[13:33:38.330] <TB1> INFO: scanning low vcal = 240
[13:33:38.677] <TB1> INFO: Expecting 41600 events.
[13:33:42.901] <TB1> INFO: 41600 events read in total (3507ms).
[13:33:42.902] <TB1> INFO: Test took 4572ms.
[13:33:42.906] <TB1> INFO: scanning low vcal = 250
[13:33:43.249] <TB1> INFO: Expecting 41600 events.
[13:33:47.473] <TB1> INFO: 41600 events read in total (3507ms).
[13:33:47.475] <TB1> INFO: Test took 4569ms.
[13:33:47.482] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[13:33:47.825] <TB1> INFO: Expecting 41600 events.
[13:33:52.010] <TB1> INFO: 41600 events read in total (3468ms).
[13:33:52.011] <TB1> INFO: Test took 4529ms.
[13:33:52.014] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[13:33:52.365] <TB1> INFO: Expecting 41600 events.
[13:33:56.591] <TB1> INFO: 41600 events read in total (3508ms).
[13:33:56.592] <TB1> INFO: Test took 4578ms.
[13:33:56.595] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[13:33:56.935] <TB1> INFO: Expecting 41600 events.
[13:34:01.148] <TB1> INFO: 41600 events read in total (3496ms).
[13:34:01.148] <TB1> INFO: Test took 4552ms.
[13:34:01.152] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[13:34:01.502] <TB1> INFO: Expecting 41600 events.
[13:34:05.828] <TB1> INFO: 41600 events read in total (3609ms).
[13:34:05.828] <TB1> INFO: Test took 4677ms.
[13:34:05.832] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:34:06.180] <TB1> INFO: Expecting 41600 events.
[13:34:10.401] <TB1> INFO: 41600 events read in total (3504ms).
[13:34:10.401] <TB1> INFO: Test took 4569ms.
[13:34:10.909] <TB1> INFO: PixTestGainPedestal::measure() done
[13:34:45.442] <TB1> INFO: PixTestGainPedestal::fit() done
[13:34:45.442] <TB1> INFO: non-linearity mean: 0.956 0.961 0.956 0.958 0.958 0.956 0.948 0.966 0.956 0.960 0.952 0.958 0.959 0.953 0.957 0.958
[13:34:45.442] <TB1> INFO: non-linearity RMS: 0.006 0.005 0.005 0.007 0.006 0.006 0.007 0.005 0.006 0.005 0.005 0.007 0.004 0.006 0.005 0.006
[13:34:45.442] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:34:45.461] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:34:45.480] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:34:45.498] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:34:45.517] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:34:45.536] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:34:45.556] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:34:45.575] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:34:45.595] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:34:45.614] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:34:45.634] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:34:45.660] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:34:45.687] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:34:45.713] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:34:45.737] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:34:45.763] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:34:45.785] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 170 seconds
[13:34:45.792] <TB1> INFO: readReadbackCal: /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C15.dat
[13:34:45.793] <TB1> INFO: PixTestReadback::doTest() start.
[13:34:45.794] <TB1> INFO: PixTestReadback::RES sent once
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C0.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C1.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C2.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C3.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C4.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C5.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C6.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C7.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C8.dat
[13:35:07.667] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C9.dat
[13:35:07.668] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C10.dat
[13:35:07.668] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C11.dat
[13:35:07.668] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C12.dat
[13:35:07.668] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C13.dat
[13:35:07.668] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C14.dat
[13:35:07.668] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C15.dat
[13:35:07.716] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:35:07.717] <TB1> INFO: PixTestReadback::RES sent once
[13:35:29.504] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C0.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C1.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C2.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C3.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C4.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C5.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C6.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C7.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C8.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C9.dat
[13:35:29.505] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C10.dat
[13:35:29.506] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C11.dat
[13:35:29.506] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C12.dat
[13:35:29.506] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C13.dat
[13:35:29.506] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C14.dat
[13:35:29.506] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C15.dat
[13:35:29.554] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:35:29.555] <TB1> INFO: PixTestReadback::RES sent once
[13:35:46.472] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:35:46.473] <TB1> INFO: Vbg will be calibrated using Vd calibration
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 163.1calibrated Vbg = 1.18726 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 150.8calibrated Vbg = 1.18467 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 153.1calibrated Vbg = 1.19697 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 147calibrated Vbg = 1.19793 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.9calibrated Vbg = 1.20771 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 148.4calibrated Vbg = 1.20026 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 146.2calibrated Vbg = 1.20703 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.1calibrated Vbg = 1.20455 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 151.3calibrated Vbg = 1.19824 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149.3calibrated Vbg = 1.1909 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150.3calibrated Vbg = 1.19481 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.1calibrated Vbg = 1.1926 :::*/*/*/*/
[13:35:46.473] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 255calibrated Vbg = 1.1775 :::*/*/*/*/
[13:35:46.477] <TB1> INFO: PixTestReadback::RES sent once
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C0.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C1.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C2.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C3.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C4.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C5.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C6.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C7.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C8.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C9.dat
[13:40:27.750] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C10.dat
[13:40:27.751] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C11.dat
[13:40:27.751] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C12.dat
[13:40:27.751] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C13.dat
[13:40:27.751] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C14.dat
[13:40:27.751] <TB1> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M2052_FullQualification_2015-09-03_10h31m_1441269084//002_FulltestPxar_m20//readbackCal_C15.dat
[13:40:27.800] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:40:27.801] <TB1> INFO: PixTestReadback::doTest() done
[13:40:27.816] <TB1> INFO: enter test to run
[13:40:27.816] <TB1> INFO: test: exit no parameter change
[13:40:28.334] <TB1> QUIET: Connection to board 153 closed.
[13:40:28.413] <TB1> INFO: pXar: this is the end, my friend