[08:19:06.629] <TB2> INFO: *** Welcome to pxar ***
[08:19:06.629] <TB2> INFO: *** Today: 2015/07/28
[08:19:06.629] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C15.dat
[08:19:06.631] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:19:06.631] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//defaultMaskFile.dat
[08:19:06.631] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters_C15.dat
[08:19:06.732] <TB2> INFO: clk: 4
[08:19:06.732] <TB2> INFO: ctr: 4
[08:19:06.732] <TB2> INFO: sda: 19
[08:19:06.732] <TB2> INFO: tin: 9
[08:19:06.732] <TB2> INFO: level: 15
[08:19:06.732] <TB2> INFO: triggerdelay: 0
[08:19:06.732] <TB2> QUIET: Instanciating API for pxar v2.2.5+46~gdbe75a1
[08:19:06.732] <TB2> INFO: Log level: INFO
[08:19:06.742] <TB2> INFO: Found DTB DTB_WXC55Z
[08:19:06.754] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[08:19:06.758] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[08:19:06.760] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[08:19:08.330] <TB2> INFO: DUT info:
[08:19:08.331] <TB2> INFO: The DUT currently contains the following objects:
[08:19:08.331] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:19:08.331] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:19:08.331] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:19:08.331] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:19:08.331] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.331] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:19:08.732] <TB2> INFO: enter 'restricted' command line mode
[08:19:08.732] <TB2> INFO: enter test to run
[08:19:08.732] <TB2> INFO: test: pretest no parameter change
[08:19:08.732] <TB2> INFO: running: pretest
[08:19:08.739] <TB2> INFO: ######################################################################
[08:19:08.739] <TB2> INFO: PixTestPretest::doTest()
[08:19:08.739] <TB2> INFO: ######################################################################
[08:19:08.741] <TB2> INFO: ----------------------------------------------------------------------
[08:19:08.741] <TB2> INFO: PixTestPretest::programROC()
[08:19:08.741] <TB2> INFO: ----------------------------------------------------------------------
[08:19:26.759] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:19:26.759] <TB2> INFO: IA differences per ROC: 19.3 20.1 19.3 20.1 19.3 18.5 20.1 18.5 20.9 19.3 19.3 16.9 20.9 18.5 20.9 19.3
[08:19:26.829] <TB2> INFO: ----------------------------------------------------------------------
[08:19:26.829] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:19:26.829] <TB2> INFO: ----------------------------------------------------------------------
[08:19:30.093] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 393.1 mA = 24.5688 mA/ROC
[08:19:30.096] <TB2> INFO: ----------------------------------------------------------------------
[08:19:30.096] <TB2> INFO: PixTestPretest::findWorkingPixel()
[08:19:30.096] <TB2> INFO: ----------------------------------------------------------------------
[08:19:39.368] <TB2> INFO: Test took 9267ms.
[08:19:39.654] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:19:39.683] <TB2> INFO: ----------------------------------------------------------------------
[08:19:39.685] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[08:19:39.685] <TB2> INFO: ----------------------------------------------------------------------
[08:19:48.949] <TB2> INFO: Test took 9260ms.
[08:19:49.259] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[08:19:49.259] <TB2> INFO: CalDel: 134 157 144 146 136 143 151 147 157 143 143 136 116 163 131 141
[08:19:49.260] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:19:49.264] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C0.dat
[08:19:49.264] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C1.dat
[08:19:49.264] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C2.dat
[08:19:49.264] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C3.dat
[08:19:49.264] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C4.dat
[08:19:49.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C5.dat
[08:19:49.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C6.dat
[08:19:49.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C7.dat
[08:19:49.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C8.dat
[08:19:49.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C9.dat
[08:19:49.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C10.dat
[08:19:49.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C11.dat
[08:19:49.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C12.dat
[08:19:49.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C13.dat
[08:19:49.267] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C14.dat
[08:19:49.267] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters_C15.dat
[08:19:49.267] <TB2> INFO: PixTestPretest::doTest() done, duration: 40 seconds
[08:19:49.373] <TB2> INFO: enter test to run
[08:19:49.373] <TB2> INFO: test: fulltest no parameter change
[08:19:49.373] <TB2> INFO: running: fulltest
[08:19:49.373] <TB2> INFO: ######################################################################
[08:19:49.373] <TB2> INFO: PixTestFullTest::doTest()
[08:19:49.373] <TB2> INFO: ######################################################################
[08:19:49.375] <TB2> INFO: ######################################################################
[08:19:49.375] <TB2> INFO: PixTestAlive::doTest()
[08:19:49.375] <TB2> INFO: ######################################################################
[08:19:49.376] <TB2> INFO: ----------------------------------------------------------------------
[08:19:49.376] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:19:49.376] <TB2> INFO: ----------------------------------------------------------------------
[08:19:53.003] <TB2> INFO: Test took 3625ms.
[08:19:53.026] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:53.252] <TB2> INFO: PixTestAlive::aliveTest() done
[08:19:53.252] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
[08:19:53.254] <TB2> INFO: ----------------------------------------------------------------------
[08:19:53.254] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:19:53.254] <TB2> INFO: ----------------------------------------------------------------------
[08:19:56.055] <TB2> INFO: Test took 2799ms.
[08:19:56.057] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:56.057] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:19:56.277] <TB2> INFO: PixTestAlive::maskTest() done
[08:19:56.277] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:19:56.279] <TB2> INFO: ----------------------------------------------------------------------
[08:19:56.279] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:19:56.279] <TB2> INFO: ----------------------------------------------------------------------
[08:19:59.782] <TB2> INFO: Test took 3502ms.
[08:19:59.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:00.024] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[08:20:00.024] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:20:00.025] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[08:20:00.031] <TB2> INFO: ######################################################################
[08:20:00.031] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:20:00.031] <TB2> INFO: ######################################################################
[08:20:00.034] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[08:20:00.045] <TB2> INFO: dacScan step from 0 .. 29
[08:20:22.515] <TB2> INFO: Test took 22470ms.
[08:20:22.545] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:22.545] <TB2> INFO: dacScan step from 30 .. 59
[08:20:48.688] <TB2> INFO: Test took 26143ms.
[08:20:48.823] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:48.848] <TB2> INFO: dacScan step from 60 .. 89
[08:21:21.137] <TB2> INFO: Test took 32289ms.
[08:21:21.410] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:21.494] <TB2> INFO: dacScan step from 90 .. 119
[08:21:53.348] <TB2> INFO: Test took 31854ms.
[08:21:53.614] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:53.699] <TB2> INFO: dacScan step from 120 .. 149
[08:22:21.896] <TB2> INFO: Test took 28197ms.
[08:22:22.093] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:45.477] <TB2> INFO: PixTestBBMap::doTest() done, duration: 165 seconds
[08:22:45.477] <TB2> INFO: number of dead bumps (per ROC): 2 0 0 0 0 0 0 4 0 0 0 1 0 0 0 0
[08:22:45.477] <TB2> INFO: separation cut (per ROC): 90 76 78 88 80 69 79 86 71 89 82 78 83 78 96 78
[08:22:45.556] <TB2> INFO: ######################################################################
[08:22:45.556] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[08:22:45.556] <TB2> INFO: ######################################################################
[08:22:45.556] <TB2> INFO: ----------------------------------------------------------------------
[08:22:45.556] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[08:22:45.556] <TB2> INFO: ----------------------------------------------------------------------
[08:22:45.556] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[08:22:45.564] <TB2> INFO: dacScan step from 0 .. 3
[08:23:06.329] <TB2> INFO: Test took 20764ms.
[08:23:06.355] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:06.355] <TB2> INFO: dacScan step from 4 .. 7
[08:23:27.088] <TB2> INFO: Test took 20733ms.
[08:23:27.116] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:27.116] <TB2> INFO: dacScan step from 8 .. 11
[08:23:47.790] <TB2> INFO: Test took 20674ms.
[08:23:47.817] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:47.817] <TB2> INFO: dacScan step from 12 .. 15
[08:24:08.979] <TB2> INFO: Test took 21162ms.
[08:24:09.005] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:09.006] <TB2> INFO: dacScan step from 16 .. 19
[08:24:30.401] <TB2> INFO: Test took 21395ms.
[08:24:30.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:30.431] <TB2> INFO: dacScan step from 20 .. 23
[08:24:51.558] <TB2> INFO: Test took 21127ms.
[08:24:51.584] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:51.584] <TB2> INFO: dacScan step from 24 .. 27
[08:25:12.213] <TB2> INFO: Test took 20629ms.
[08:25:12.243] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:12.243] <TB2> INFO: dacScan step from 28 .. 31
[08:25:32.967] <TB2> INFO: Test took 20724ms.
[08:25:32.994] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:32.994] <TB2> INFO: dacScan step from 32 .. 35
[08:25:54.425] <TB2> INFO: Test took 21431ms.
[08:25:54.454] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:54.454] <TB2> INFO: dacScan step from 36 .. 39
[08:26:15.618] <TB2> INFO: Test took 21164ms.
[08:26:15.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:15.647] <TB2> INFO: dacScan step from 40 .. 43
[08:26:37.174] <TB2> INFO: Test took 21527ms.
[08:26:37.202] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:37.202] <TB2> INFO: dacScan step from 44 .. 47
[08:26:58.114] <TB2> INFO: Test took 20912ms.
[08:26:58.142] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:58.142] <TB2> INFO: dacScan step from 48 .. 51
[08:27:18.978] <TB2> INFO: Test took 20836ms.
[08:27:19.004] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:19.004] <TB2> INFO: dacScan step from 52 .. 55
[08:27:39.385] <TB2> INFO: Test took 20381ms.
[08:27:39.412] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:39.412] <TB2> INFO: dacScan step from 56 .. 59
[08:28:00.089] <TB2> INFO: Test took 20677ms.
[08:28:00.118] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:00.118] <TB2> INFO: dacScan step from 60 .. 63
[08:28:20.696] <TB2> INFO: Test took 20578ms.
[08:28:20.724] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:20.724] <TB2> INFO: dacScan step from 64 .. 67
[08:28:41.842] <TB2> INFO: Test took 21118ms.
[08:28:41.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:41.877] <TB2> INFO: dacScan step from 68 .. 71
[08:29:03.659] <TB2> INFO: Test took 21782ms.
[08:29:03.700] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:03.701] <TB2> INFO: dacScan step from 72 .. 75
[08:29:26.440] <TB2> INFO: Test took 22739ms.
[08:29:26.501] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:26.503] <TB2> INFO: dacScan step from 76 .. 79
[08:29:51.138] <TB2> INFO: Test took 24635ms.
[08:29:51.230] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:51.238] <TB2> INFO: dacScan step from 80 .. 83
[08:30:18.752] <TB2> INFO: Test took 27513ms.
[08:30:18.898] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:18.907] <TB2> INFO: dacScan step from 84 .. 87
[08:30:48.889] <TB2> INFO: Test took 29982ms.
[08:30:49.120] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:49.130] <TB2> INFO: dacScan step from 88 .. 91
[08:31:21.028] <TB2> INFO: Test took 31898ms.
[08:31:21.277] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:21.289] <TB2> INFO: dacScan step from 92 .. 95
[08:31:54.683] <TB2> INFO: Test took 33394ms.
[08:31:54.904] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:54.915] <TB2> INFO: dacScan step from 96 .. 99


[08:32:27.475] <TB2> INFO: Test took 32560ms.
[08:32:27.703] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:27.715] <TB2> INFO: dacScan step from 100 .. 103
[08:33:00.025] <TB2> INFO: Test took 32310ms.
[08:33:00.336] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:00.351] <TB2> INFO: dacScan step from 104 .. 107


[08:33:32.933] <TB2> INFO: Test took 32582ms.
[08:33:33.178] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:33.190] <TB2> INFO: dacScan step from 108 .. 111


[08:34:06.691] <TB2> INFO: Test took 33501ms.
[08:34:06.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:06.948] <TB2> INFO: dacScan step from 112 .. 115





[08:34:39.037] <TB2> INFO: Test took 32089ms.
[08:34:39.265] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:39.276] <TB2> INFO: dacScan step from 116 .. 119





[08:35:11.318] <TB2> INFO: Test took 32041ms.
[08:35:11.556] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:11.568] <TB2> INFO: dacScan step from 120 .. 123
[08:35:44.485] <TB2> INFO: Test took 32917ms.
[08:35:44.718] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:44.731] <TB2> INFO: dacScan step from 124 .. 127
[08:36:18.107] <TB2> INFO: Test took 33376ms.
[08:36:18.332] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:18.344] <TB2> INFO: dacScan step from 128 .. 131
[08:36:51.005] <TB2> INFO: Test took 32661ms.
[08:36:51.271] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:51.284] <TB2> INFO: dacScan step from 132 .. 135
[08:37:23.148] <TB2> INFO: Test took 31864ms.
[08:37:23.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:23.550] <TB2> INFO: dacScan step from 136 .. 139
[08:37:55.633] <TB2> INFO: Test took 32082ms.
[08:37:55.911] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:55.926] <TB2> INFO: dacScan step from 140 .. 143
[08:38:28.959] <TB2> INFO: Test took 33032ms.
[08:38:29.188] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:29.200] <TB2> INFO: dacScan step from 144 .. 147
[08:39:01.725] <TB2> INFO: Test took 32525ms.
[08:39:01.952] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:01.964] <TB2> INFO: dacScan step from 148 .. 149
[08:39:19.387] <TB2> INFO: Test took 17423ms.
[08:39:19.530] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:19.537] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:21.050] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:22.586] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:24.100] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:25.597] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:27.136] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:28.641] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:30.201] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:31.948] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:33.658] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:35.314] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:36.941] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:38.442] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:39.918] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:41.443] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:42.854] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:39:44.389] <TB2> INFO: PixTestScurves::scurves() done
[08:39:44.389] <TB2> INFO: Vcal mean: 91.20 82.89 83.46 98.81 84.90 78.75 75.14 84.52 78.14 91.39 92.26 82.95 82.77 82.62 98.99 87.72
[08:39:44.389] <TB2> INFO: Vcal RMS: 5.57 4.75 4.43 6.41 4.90 3.95 5.07 5.23 4.05 5.60 5.29 5.45 4.88 4.93 5.30 5.00
[08:39:44.390] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1018 seconds
[08:39:44.469] <TB2> INFO: ######################################################################
[08:39:44.469] <TB2> INFO: PixTestTrim::doTest()
[08:39:44.469] <TB2> INFO: ######################################################################
[08:39:44.471] <TB2> INFO: ----------------------------------------------------------------------
[08:39:44.471] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:39:44.471] <TB2> INFO: ----------------------------------------------------------------------
[08:39:44.548] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:39:44.548] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:39:44.556] <TB2> INFO: dacScan step from 0 .. 19
[08:40:00.421] <TB2> INFO: Test took 15865ms.
[08:40:00.441] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:00.442] <TB2> INFO: dacScan step from 20 .. 39
[08:40:16.484] <TB2> INFO: Test took 16042ms.
[08:40:16.508] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:16.508] <TB2> INFO: dacScan step from 40 .. 59
[08:40:32.669] <TB2> INFO: Test took 16161ms.
[08:40:32.696] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:32.696] <TB2> INFO: dacScan step from 60 .. 79
[08:40:49.008] <TB2> INFO: Test took 16312ms.
[08:40:49.037] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:49.037] <TB2> INFO: dacScan step from 80 .. 99
[08:41:06.052] <TB2> INFO: Test took 17015ms.
[08:41:06.114] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:06.123] <TB2> INFO: dacScan step from 100 .. 119
[08:41:28.106] <TB2> INFO: Test took 21983ms.
[08:41:28.284] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:28.318] <TB2> INFO: dacScan step from 120 .. 139
[08:41:49.793] <TB2> INFO: Test took 21475ms.
[08:41:49.967] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:50.006] <TB2> INFO: dacScan step from 140 .. 159
[08:42:08.277] <TB2> INFO: Test took 18271ms.
[08:42:08.354] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:30.592] <TB2> INFO: ROC 0 VthrComp = 97
[08:42:30.593] <TB2> INFO: ROC 1 VthrComp = 90
[08:42:30.593] <TB2> INFO: ROC 2 VthrComp = 90
[08:42:30.593] <TB2> INFO: ROC 3 VthrComp = 101
[08:42:30.593] <TB2> INFO: ROC 4 VthrComp = 91
[08:42:30.593] <TB2> INFO: ROC 5 VthrComp = 84
[08:42:30.593] <TB2> INFO: ROC 6 VthrComp = 83
[08:42:30.593] <TB2> INFO: ROC 7 VthrComp = 91
[08:42:30.593] <TB2> INFO: ROC 8 VthrComp = 83
[08:42:30.593] <TB2> INFO: ROC 9 VthrComp = 96
[08:42:30.593] <TB2> INFO: ROC 10 VthrComp = 94
[08:42:30.593] <TB2> INFO: ROC 11 VthrComp = 86
[08:42:30.594] <TB2> INFO: ROC 12 VthrComp = 89
[08:42:30.594] <TB2> INFO: ROC 13 VthrComp = 87
[08:42:30.594] <TB2> INFO: ROC 14 VthrComp = 104
[08:42:30.594] <TB2> INFO: ROC 15 VthrComp = 93
[08:42:30.594] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:42:30.594] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:42:30.603] <TB2> INFO: dacScan step from 0 .. 19
[08:42:46.687] <TB2> INFO: Test took 16084ms.
[08:42:46.715] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:46.715] <TB2> INFO: dacScan step from 20 .. 39
[08:43:03.128] <TB2> INFO: Test took 16413ms.
[08:43:03.168] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:03.172] <TB2> INFO: dacScan step from 40 .. 59
[08:43:24.688] <TB2> INFO: Test took 21516ms.
[08:43:24.839] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:24.876] <TB2> INFO: dacScan step from 60 .. 79
[08:43:47.079] <TB2> INFO: Test took 22203ms.
[08:43:47.252] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:47.310] <TB2> INFO: dacScan step from 80 .. 99
[08:44:09.970] <TB2> INFO: Test took 22660ms.
[08:44:10.155] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:10.216] <TB2> INFO: dacScan step from 100 .. 119
[08:44:32.732] <TB2> INFO: Test took 22516ms.
[08:44:32.902] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:32.965] <TB2> INFO: dacScan step from 120 .. 139
[08:44:55.047] <TB2> INFO: Test took 22082ms.
[08:44:55.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:55.286] <TB2> INFO: dacScan step from 140 .. 159
[08:45:17.509] <TB2> INFO: Test took 22223ms.
[08:45:17.674] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:42.149] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.7063 for pixel 4/78 mean/min/max = 45.1195/31.2699/58.9691
[08:45:42.149] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 57.0621 for pixel 7/73 mean/min/max = 44.9597/32.24/57.6793
[08:45:42.149] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 56.442 for pixel 0/9 mean/min/max = 44.5909/32.6564/56.5255
[08:45:42.149] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.153 for pixel 17/62 mean/min/max = 45.3089/31.3701/59.2478
[08:45:42.150] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.5005 for pixel 9/2 mean/min/max = 45.0297/32.4471/57.6123
[08:45:42.150] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.1251 for pixel 21/2 mean/min/max = 44.1358/31.9948/56.2768
[08:45:42.150] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.0294 for pixel 1/3 mean/min/max = 44.4641/31.4524/57.4758
[08:45:42.151] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.6626 for pixel 27/6 mean/min/max = 45.8576/32.0253/59.6898
[08:45:42.151] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 56.6762 for pixel 23/15 mean/min/max = 44.702/32.6132/56.7908
[08:45:42.151] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.102 for pixel 0/63 mean/min/max = 45.3755/31.6018/59.1491
[08:45:42.151] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.5951 for pixel 0/11 mean/min/max = 46.6251/32.6133/60.6368
[08:45:42.152] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.3101 for pixel 23/14 mean/min/max = 46.1933/30.8163/61.5703
[08:45:42.152] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.679 for pixel 0/16 mean/min/max = 45.5788/32.3844/58.7733
[08:45:42.152] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.9195 for pixel 19/0 mean/min/max = 46.1457/32.1598/60.1316
[08:45:42.152] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 59.1656 for pixel 0/47 mean/min/max = 46.2029/33.1525/59.2533
[08:45:42.153] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.2744 for pixel 11/58 mean/min/max = 44.7646/32.1555/57.3736
[08:45:42.153] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:47:27.114] <TB2> INFO: Test took 104961ms.
[08:47:28.667] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:47:28.676] <TB2> INFO: dacScan step from 0 .. 19
[08:47:53.219] <TB2> INFO: Test took 24543ms.
[08:47:53.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:53.267] <TB2> INFO: dacScan step from 20 .. 39
[08:48:25.613] <TB2> INFO: Test took 32346ms.
[08:48:25.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:25.903] <TB2> INFO: dacScan step from 40 .. 59



[08:49:03.049] <TB2> INFO: Test took 37146ms.
[08:49:03.329] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:03.379] <TB2> INFO: dacScan step from 60 .. 79
[08:49:39.147] <TB2> INFO: Test took 35768ms.
[08:49:39.605] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:39.697] <TB2> INFO: dacScan step from 80 .. 99


[08:50:14.361] <TB2> INFO: Test took 34664ms.
[08:50:14.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:14.690] <TB2> INFO: dacScan step from 100 .. 119
[08:50:49.993] <TB2> INFO: Test took 35303ms.
[08:50:50.379] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:50.449] <TB2> INFO: dacScan step from 120 .. 139


[08:51:27.242] <TB2> INFO: Test took 36793ms.
[08:51:27.520] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:27.577] <TB2> INFO: dacScan step from 140 .. 159





[08:52:02.895] <TB2> INFO: Test took 35318ms.
[08:52:03.188] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:03.240] <TB2> INFO: dacScan step from 160 .. 179


[08:52:38.707] <TB2> INFO: Test took 35467ms.
[08:52:39.016] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:39.071] <TB2> INFO: dacScan step from 180 .. 199



[08:53:16.687] <TB2> INFO: Test took 37616ms.
[08:53:17.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:43.114] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.031116 .. 255.000000
[08:53:43.190] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[08:53:43.199] <TB2> INFO: dacScan step from 0 .. 19
[08:53:57.709] <TB2> INFO: Test took 14510ms.
[08:53:57.728] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:57.728] <TB2> INFO: dacScan step from 20 .. 39
[08:54:13.538] <TB2> INFO: Test took 15810ms.
[08:54:13.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:13.676] <TB2> INFO: dacScan step from 40 .. 59
[08:54:32.926] <TB2> INFO: Test took 19250ms.
[08:54:33.157] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:33.252] <TB2> INFO: dacScan step from 60 .. 79
[08:54:52.491] <TB2> INFO: Test took 19239ms.
[08:54:52.637] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:52.692] <TB2> INFO: dacScan step from 80 .. 99
[08:55:11.607] <TB2> INFO: Test took 18915ms.
[08:55:11.748] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:11.806] <TB2> INFO: dacScan step from 100 .. 119
[08:55:30.701] <TB2> INFO: Test took 18894ms.
[08:55:30.849] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:30.903] <TB2> INFO: dacScan step from 120 .. 139
[08:55:50.669] <TB2> INFO: Test took 19766ms.
[08:55:50.828] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:50.891] <TB2> INFO: dacScan step from 140 .. 159
[08:56:09.715] <TB2> INFO: Test took 18824ms.
[08:56:09.888] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:09.947] <TB2> INFO: dacScan step from 160 .. 179
[08:56:29.425] <TB2> INFO: Test took 19478ms.
[08:56:29.572] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:29.629] <TB2> INFO: dacScan step from 180 .. 199
[08:56:49.912] <TB2> INFO: Test took 20282ms.
[08:56:50.073] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:50.127] <TB2> INFO: dacScan step from 200 .. 219
[08:57:09.823] <TB2> INFO: Test took 19696ms.
[08:57:09.969] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:10.025] <TB2> INFO: dacScan step from 220 .. 239
[08:57:28.756] <TB2> INFO: Test took 18731ms.
[08:57:28.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:28.972] <TB2> INFO: dacScan step from 240 .. 255
[08:57:45.055] <TB2> INFO: Test took 16083ms.
[08:57:45.186] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:19.977] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 14.541847 .. 57.029829
[08:58:20.059] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 67 (20) hits flags = 16 (plus default)
[08:58:20.067] <TB2> INFO: dacScan step from 4 .. 23
[08:58:33.916] <TB2> INFO: Test took 13849ms.
[08:58:33.935] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:33.935] <TB2> INFO: dacScan step from 24 .. 43
[08:58:50.614] <TB2> INFO: Test took 16679ms.
[08:58:50.719] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:50.746] <TB2> INFO: dacScan step from 44 .. 63
[08:59:09.799] <TB2> INFO: Test took 19053ms.
[08:59:09.945] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:10.001] <TB2> INFO: dacScan step from 64 .. 67
[08:59:15.910] <TB2> INFO: Test took 5909ms.
[08:59:15.938] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:33.924] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.187020 .. 44.604508
[08:59:33.998] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 54 (20) hits flags = 16 (plus default)
[08:59:34.006] <TB2> INFO: dacScan step from 10 .. 29
[08:59:48.867] <TB2> INFO: Test took 14860ms.
[08:59:48.892] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:48.892] <TB2> INFO: dacScan step from 30 .. 49
[09:00:07.929] <TB2> INFO: Test took 19036ms.
[09:00:08.079] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:08.126] <TB2> INFO: dacScan step from 50 .. 54
[09:00:15.262] <TB2> INFO: Test took 7136ms.
[09:00:15.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:31.511] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 21.706313 .. 43.045604
[09:00:31.587] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 11 .. 53 (20) hits flags = 16 (plus default)
[09:00:31.595] <TB2> INFO: dacScan step from 11 .. 30
[09:00:46.310] <TB2> INFO: Test took 14715ms.
[09:00:46.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:46.335] <TB2> INFO: dacScan step from 31 .. 50
[09:01:05.606] <TB2> INFO: Test took 19271ms.
[09:01:05.750] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:05.816] <TB2> INFO: dacScan step from 51 .. 53
[09:01:11.192] <TB2> INFO: Test took 5376ms.
[09:01:11.220] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:27.346] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:01:27.346] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:01:27.354] <TB2> INFO: dacScan step from 15 .. 34
[09:01:53.752] <TB2> INFO: Test took 26398ms.
[09:01:53.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:53.838] <TB2> INFO: dacScan step from 35 .. 54

[09:02:31.492] <TB2> INFO: Test took 37654ms.
[09:02:31.783] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:31.837] <TB2> INFO: dacScan step from 55 .. 55
[09:02:36.607] <TB2> INFO: Test took 4770ms.
[09:02:36.632] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:02:51.265] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:02:51.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:02:51.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:02:51.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:02:51.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:02:51.266] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:02:51.266] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:02:51.273] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:02:51.280] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:02:51.286] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:02:51.293] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:02:51.299] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:02:51.305] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:02:51.312] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:02:51.318] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:02:51.324] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:02:51.331] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:02:51.337] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:02:51.344] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:02:51.350] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:02:51.356] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:02:51.363] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:02:51.369] <TB2> INFO: PixTestTrim::trimTest() done
[09:02:51.369] <TB2> INFO: vtrim: 107 112 103 103 102 106 104 112 103 105 117 111 104 106 99 101
[09:02:51.369] <TB2> INFO: vthrcomp: 97 90 90 101 91 84 83 91 83 96 94 86 89 87 104 93
[09:02:51.369] <TB2> INFO: vcal mean: 35.12 35.06 35.00 35.00 35.05 35.08 35.01 35.03 35.00 34.99 35.13 35.00 35.01 35.01 35.06 35.05
[09:02:51.369] <TB2> INFO: vcal RMS: 1.03 1.04 0.98 1.10 1.03 1.02 0.99 1.05 0.95 1.08 3.55 1.34 0.96 1.01 1.02 1.00
[09:02:51.369] <TB2> INFO: bits mean: 9.94 9.94 9.77 9.88 9.84 10.24 10.23 9.93 9.66 9.29 9.33 10.02 9.57 9.79 8.84 9.87
[09:02:51.369] <TB2> INFO: bits RMS: 2.59 2.53 2.51 2.56 2.53 2.42 2.41 2.49 2.55 2.87 2.64 2.47 2.61 2.51 2.83 2.58
[09:02:51.376] <TB2> INFO: ----------------------------------------------------------------------
[09:02:51.376] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:02:51.376] <TB2> INFO: ----------------------------------------------------------------------
[09:02:51.379] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:02:51.387] <TB2> INFO: dacScan step from 0 .. 19
[09:03:14.957] <TB2> INFO: Test took 23570ms.
[09:03:14.994] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:14.994] <TB2> INFO: dacScan step from 20 .. 39
[09:03:38.749] <TB2> INFO: Test took 23755ms.
[09:03:38.783] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:38.783] <TB2> INFO: dacScan step from 40 .. 59
[09:04:03.830] <TB2> INFO: Test took 25047ms.
[09:04:03.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:03.878] <TB2> INFO: dacScan step from 60 .. 79
[09:04:28.587] <TB2> INFO: Test took 24709ms.
[09:04:28.624] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:28.624] <TB2> INFO: dacScan step from 80 .. 99
[09:04:54.803] <TB2> INFO: Test took 26179ms.
[09:04:54.867] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:54.871] <TB2> INFO: dacScan step from 100 .. 119
[09:05:29.614] <TB2> INFO: Test took 34743ms.
[09:05:29.847] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:29.872] <TB2> INFO: dacScan step from 120 .. 139


[09:06:07.579] <TB2> INFO: Test took 37707ms.
[09:06:07.857] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:07.909] <TB2> INFO: dacScan step from 140 .. 159

[09:06:42.837] <TB2> INFO: Test took 34928ms.
[09:06:43.103] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:43.159] <TB2> INFO: dacScan step from 160 .. 179
[09:07:18.468] <TB2> INFO: Test took 35309ms.
[09:07:18.773] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:18.835] <TB2> INFO: dacScan step from 180 .. 199
[09:07:56.599] <TB2> INFO: Test took 37764ms.
[09:07:56.924] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:25.702] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[09:08:25.710] <TB2> INFO: dacScan step from 0 .. 19
[09:08:50.181] <TB2> INFO: Test took 24471ms.
[09:08:50.218] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:50.219] <TB2> INFO: dacScan step from 20 .. 39
[09:09:15.562] <TB2> INFO: Test took 25343ms.
[09:09:15.601] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:15.601] <TB2> INFO: dacScan step from 40 .. 59
[09:09:40.919] <TB2> INFO: Test took 25318ms.
[09:09:40.960] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:40.960] <TB2> INFO: dacScan step from 60 .. 79
[09:10:04.444] <TB2> INFO: Test took 23484ms.
[09:10:04.493] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:04.493] <TB2> INFO: dacScan step from 80 .. 99
[09:10:33.079] <TB2> INFO: Test took 28586ms.
[09:10:33.211] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:33.224] <TB2> INFO: dacScan step from 100 .. 119
[09:11:08.837] <TB2> INFO: Test took 35613ms.
[09:11:09.241] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:09.317] <TB2> INFO: dacScan step from 120 .. 139

[09:11:46.950] <TB2> INFO: Test took 37633ms.
[09:11:47.234] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:47.289] <TB2> INFO: dacScan step from 140 .. 159
[09:12:24.853] <TB2> INFO: Test took 37564ms.
[09:12:25.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:25.177] <TB2> INFO: dacScan step from 160 .. 165
[09:12:38.703] <TB2> INFO: Test took 13526ms.
[09:12:38.796] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:03.167] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[09:13:03.176] <TB2> INFO: dacScan step from 0 .. 19
[09:13:26.973] <TB2> INFO: Test took 23797ms.
[09:13:27.020] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:27.020] <TB2> INFO: dacScan step from 20 .. 39
[09:13:51.597] <TB2> INFO: Test took 24576ms.
[09:13:51.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:51.647] <TB2> INFO: dacScan step from 40 .. 59
[09:14:16.635] <TB2> INFO: Test took 24987ms.
[09:14:16.673] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:16.673] <TB2> INFO: dacScan step from 60 .. 79
[09:14:40.986] <TB2> INFO: Test took 24313ms.
[09:14:41.035] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:41.035] <TB2> INFO: dacScan step from 80 .. 99
[09:15:09.378] <TB2> INFO: Test took 28343ms.
[09:15:09.504] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:09.518] <TB2> INFO: dacScan step from 100 .. 119
[09:15:47.099] <TB2> INFO: Test took 37581ms.
[09:15:47.373] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:47.412] <TB2> INFO: dacScan step from 120 .. 139


[09:16:24.795] <TB2> INFO: Test took 37383ms.
[09:16:25.072] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:25.125] <TB2> INFO: dacScan step from 140 .. 153
[09:16:52.807] <TB2> INFO: Test took 27682ms.
[09:16:53.010] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:16.362] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[09:17:16.371] <TB2> INFO: dacScan step from 0 .. 19
[09:17:40.919] <TB2> INFO: Test took 24548ms.
[09:17:40.955] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:40.955] <TB2> INFO: dacScan step from 20 .. 39
[09:18:05.481] <TB2> INFO: Test took 24526ms.
[09:18:05.518] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:05.518] <TB2> INFO: dacScan step from 40 .. 59
[09:18:29.261] <TB2> INFO: Test took 23743ms.
[09:18:29.296] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:29.296] <TB2> INFO: dacScan step from 60 .. 79
[09:18:54.381] <TB2> INFO: Test took 25085ms.
[09:18:54.425] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:54.425] <TB2> INFO: dacScan step from 80 .. 99
[09:19:22.357] <TB2> INFO: Test took 27932ms.
[09:19:22.473] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:22.485] <TB2> INFO: dacScan step from 100 .. 119
[09:19:59.027] <TB2> INFO: Test took 36542ms.
[09:19:59.303] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:59.342] <TB2> INFO: dacScan step from 120 .. 139


[09:20:36.291] <TB2> INFO: Test took 36949ms.
[09:20:36.573] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:36.627] <TB2> INFO: dacScan step from 140 .. 153
[09:21:02.109] <TB2> INFO: Test took 25482ms.
[09:21:02.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:24.667] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[09:21:24.675] <TB2> INFO: dacScan step from 0 .. 19
[09:21:49.749] <TB2> INFO: Test took 25074ms.
[09:21:49.784] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:49.784] <TB2> INFO: dacScan step from 20 .. 39
[09:22:15.428] <TB2> INFO: Test took 25644ms.
[09:22:15.464] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:15.465] <TB2> INFO: dacScan step from 40 .. 59
[09:22:40.799] <TB2> INFO: Test took 25334ms.
[09:22:40.833] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:40.833] <TB2> INFO: dacScan step from 60 .. 79
[09:23:05.752] <TB2> INFO: Test took 24919ms.
[09:23:05.794] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:05.794] <TB2> INFO: dacScan step from 80 .. 99
[09:23:33.960] <TB2> INFO: Test took 28166ms.
[09:23:34.091] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:34.103] <TB2> INFO: dacScan step from 100 .. 119
[09:24:11.099] <TB2> INFO: Test took 36997ms.
[09:24:11.408] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:11.449] <TB2> INFO: dacScan step from 120 .. 139
[09:24:46.388] <TB2> INFO: Test took 34939ms.
[09:24:46.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:46.703] <TB2> INFO: dacScan step from 140 .. 153
[09:25:13.390] <TB2> INFO: Test took 26687ms.
[09:25:13.640] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:39.499] <TB2> INFO: PixTestTrim::trimBitTest() done
[09:25:39.501] <TB2> INFO: PixTestTrim::doTest() done, duration: 2755 seconds
[09:25:40.387] <TB2> INFO: ######################################################################
[09:25:40.387] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[09:25:40.387] <TB2> INFO: ######################################################################
[09:25:44.208] <TB2> INFO: Test took 3819ms.
[09:25:44.227] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:48.129] <TB2> INFO: Test took 3705ms.
[09:25:48.231] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:51.835] <TB2> INFO: Test took 3590ms.
[09:25:51.894] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:51.901] <TB2> INFO: The DUT currently contains the following objects:
[09:25:51.901] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:25:51.901] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:25:51.901] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:25:51.901] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:25:51.901] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:51.901] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.010] <TB2> INFO: Test took 1109ms.
[09:25:53.010] <TB2> INFO: The DUT currently contains the following objects:
[09:25:53.010] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:25:53.010] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:25:53.010] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:25:53.010] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:25:53.010] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.010] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:53.011] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.132] <TB2> INFO: Test took 1121ms.
[09:25:54.134] <TB2> INFO: The DUT currently contains the following objects:
[09:25:54.134] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:25:54.134] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:25:54.134] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:25:54.134] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:25:54.134] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:54.134] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.265] <TB2> INFO: Test took 1131ms.
[09:25:55.266] <TB2> INFO: The DUT currently contains the following objects:
[09:25:55.266] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:25:55.266] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:25:55.266] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:25:55.266] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:25:55.266] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.266] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:55.267] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.390] <TB2> INFO: Test took 1123ms.
[09:25:56.391] <TB2> INFO: The DUT currently contains the following objects:
[09:25:56.391] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:25:56.391] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:25:56.391] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:25:56.391] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:25:56.391] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:56.391] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.513] <TB2> INFO: Test took 1122ms.
[09:25:57.514] <TB2> INFO: The DUT currently contains the following objects:
[09:25:57.514] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:25:57.514] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:25:57.514] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:25:57.514] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:25:57.514] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.514] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.515] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.515] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:57.515] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.621] <TB2> INFO: Test took 1106ms.
[09:25:58.623] <TB2> INFO: The DUT currently contains the following objects:
[09:25:58.623] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:25:58.623] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:25:58.623] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:25:58.623] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:25:58.623] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:58.623] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.758] <TB2> INFO: Test took 1135ms.
[09:25:59.760] <TB2> INFO: The DUT currently contains the following objects:
[09:25:59.760] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:25:59.760] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:25:59.760] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:25:59.760] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:25:59.760] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:25:59.760] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.905] <TB2> INFO: Test took 1145ms.
[09:26:00.906] <TB2> INFO: The DUT currently contains the following objects:
[09:26:00.906] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:26:00.906] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:26:00.906] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:26:00.906] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:26:00.906] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.906] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:00.907] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.024] <TB2> INFO: Test took 1117ms.
[09:26:02.025] <TB2> INFO: The DUT currently contains the following objects:
[09:26:02.025] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:26:02.025] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:26:02.025] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:26:02.025] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:26:02.025] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:02.025] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: Test took 1120ms.
[09:26:03.145] <TB2> INFO: The DUT currently contains the following objects:
[09:26:03.145] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:26:03.145] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:26:03.145] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:26:03.145] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:26:03.145] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.145] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.146] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:03.146] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.263] <TB2> INFO: Test took 1117ms.
[09:26:04.263] <TB2> INFO: The DUT currently contains the following objects:
[09:26:04.263] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:26:04.264] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:26:04.264] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:26:04.264] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:26:04.264] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:04.264] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.382] <TB2> INFO: Test took 1118ms.
[09:26:05.383] <TB2> INFO: The DUT currently contains the following objects:
[09:26:05.383] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:26:05.383] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:26:05.383] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:26:05.383] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:26:05.383] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:05.383] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.486] <TB2> INFO: Test took 1103ms.
[09:26:06.487] <TB2> INFO: The DUT currently contains the following objects:
[09:26:06.487] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:26:06.487] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:26:06.487] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:26:06.487] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:26:06.487] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:06.487] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.604] <TB2> INFO: Test took 1117ms.
[09:26:07.605] <TB2> INFO: The DUT currently contains the following objects:
[09:26:07.605] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:26:07.605] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:26:07.605] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:26:07.605] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:26:07.605] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.605] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.606] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.606] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.606] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.606] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:07.606] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.740] <TB2> INFO: Test took 1134ms.
[09:26:08.741] <TB2> INFO: The DUT currently contains the following objects:
[09:26:08.741] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:26:08.741] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:26:08.741] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:26:08.741] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:26:08.741] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:08.741] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:26:09.861] <TB2> INFO: Test took 1120ms.
[09:26:09.865] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:30:32.978] <TB2> INFO: Test took 263113ms.
[09:30:34.591] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:34:57.234] <TB2> INFO: Test took 262643ms.
[09:34:58.474] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.481] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.488] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.498] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.508] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.519] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.525] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.532] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.538] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.545] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.551] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:58.558] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.564] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.570] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[09:34:58.577] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.583] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.590] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.596] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:34:58.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:34:58.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:34:58.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:34:58.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:34:58.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:34:58.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:34:58.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:35:02.390] <TB2> INFO: Test took 3754ms.
[09:35:06.337] <TB2> INFO: Test took 3681ms.
[09:35:10.224] <TB2> INFO: Test took 3620ms.
[09:35:10.496] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:11.439] <TB2> INFO: Test took 943ms.
[09:35:11.442] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:12.561] <TB2> INFO: Test took 1119ms.
[09:35:12.562] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:13.679] <TB2> INFO: Test took 1117ms.
[09:35:13.681] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:14.790] <TB2> INFO: Test took 1109ms.
[09:35:14.793] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:15.897] <TB2> INFO: Test took 1104ms.
[09:35:15.900] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:17.017] <TB2> INFO: Test took 1117ms.
[09:35:17.020] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:18.125] <TB2> INFO: Test took 1106ms.
[09:35:18.127] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:19.237] <TB2> INFO: Test took 1110ms.
[09:35:19.241] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:20.360] <TB2> INFO: Test took 1119ms.
[09:35:20.362] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:21.466] <TB2> INFO: Test took 1104ms.
[09:35:21.468] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:22.568] <TB2> INFO: Test took 1100ms.
[09:35:22.570] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:23.699] <TB2> INFO: Test took 1129ms.
[09:35:23.701] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:24.815] <TB2> INFO: Test took 1114ms.
[09:35:24.817] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:25.946] <TB2> INFO: Test took 1129ms.
[09:35:25.948] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:27.048] <TB2> INFO: Test took 1100ms.
[09:35:27.050] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:28.151] <TB2> INFO: Test took 1101ms.
[09:35:28.153] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:29.282] <TB2> INFO: Test took 1130ms.
[09:35:29.284] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:30.413] <TB2> INFO: Test took 1129ms.
[09:35:30.414] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:31.514] <TB2> INFO: Test took 1100ms.
[09:35:31.516] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:32.616] <TB2> INFO: Test took 1100ms.
[09:35:32.618] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:33.732] <TB2> INFO: Test took 1114ms.
[09:35:33.733] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:34.877] <TB2> INFO: Test took 1144ms.
[09:35:34.879] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:35.979] <TB2> INFO: Test took 1100ms.
[09:35:35.981] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:37.081] <TB2> INFO: Test took 1100ms.
[09:35:37.084] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:38.198] <TB2> INFO: Test took 1114ms.
[09:35:38.200] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:39.313] <TB2> INFO: Test took 1113ms.
[09:35:39.315] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:40.444] <TB2> INFO: Test took 1129ms.
[09:35:40.446] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:41.575] <TB2> INFO: Test took 1129ms.
[09:35:41.577] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:42.677] <TB2> INFO: Test took 1100ms.
[09:35:42.678] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:43.793] <TB2> INFO: Test took 1115ms.
[09:35:43.795] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:44.895] <TB2> INFO: Test took 1100ms.
[09:35:44.897] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:46.026] <TB2> INFO: Test took 1129ms.
[09:35:46.528] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 606 seconds
[09:35:46.528] <TB2> INFO: PH scale (per ROC): 77 91 84 80 79 87 84 80 82 80 85 83 89 86 78 80
[09:35:46.528] <TB2> INFO: PH offset (per ROC): 162 148 149 156 150 140 160 160 156 172 156 144 166 175 160 146
[09:35:46.719] <TB2> INFO: ######################################################################
[09:35:46.719] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:35:46.719] <TB2> INFO: ######################################################################
[09:35:46.728] <TB2> INFO: scanning low vcal = 10
[09:35:50.704] <TB2> INFO: Test took 3976ms.
[09:35:50.709] <TB2> INFO: scanning low vcal = 20
[09:35:54.664] <TB2> INFO: Test took 3955ms.
[09:35:54.669] <TB2> INFO: scanning low vcal = 30
[09:35:58.655] <TB2> INFO: Test took 3986ms.
[09:35:58.664] <TB2> INFO: scanning low vcal = 40
[09:36:03.400] <TB2> INFO: Test took 4736ms.
[09:36:03.493] <TB2> INFO: scanning low vcal = 50
[09:36:08.169] <TB2> INFO: Test took 4676ms.
[09:36:08.230] <TB2> INFO: scanning low vcal = 60
[09:36:12.740] <TB2> INFO: Test took 4510ms.
[09:36:12.801] <TB2> INFO: scanning low vcal = 70
[09:36:17.371] <TB2> INFO: Test took 4570ms.
[09:36:17.430] <TB2> INFO: scanning low vcal = 80
[09:36:22.174] <TB2> INFO: Test took 4744ms.
[09:36:22.235] <TB2> INFO: scanning low vcal = 90
[09:36:26.859] <TB2> INFO: Test took 4624ms.
[09:36:26.921] <TB2> INFO: scanning low vcal = 100
[09:36:31.475] <TB2> INFO: Test took 4554ms.
[09:36:31.547] <TB2> INFO: scanning low vcal = 110
[09:36:36.156] <TB2> INFO: Test took 4609ms.
[09:36:36.215] <TB2> INFO: scanning low vcal = 120
[09:36:40.878] <TB2> INFO: Test took 4663ms.
[09:36:40.949] <TB2> INFO: scanning low vcal = 130
[09:36:45.633] <TB2> INFO: Test took 4684ms.
[09:36:45.692] <TB2> INFO: scanning low vcal = 140
[09:36:50.367] <TB2> INFO: Test took 4675ms.
[09:36:50.449] <TB2> INFO: scanning low vcal = 150
[09:36:55.118] <TB2> INFO: Test took 4669ms.
[09:36:55.180] <TB2> INFO: scanning low vcal = 160
[09:36:59.727] <TB2> INFO: Test took 4547ms.
[09:36:59.788] <TB2> INFO: scanning low vcal = 170
[09:37:04.360] <TB2> INFO: Test took 4571ms.
[09:37:04.421] <TB2> INFO: scanning low vcal = 180
[09:37:09.086] <TB2> INFO: Test took 4665ms.
[09:37:09.143] <TB2> INFO: scanning low vcal = 190
[09:37:13.869] <TB2> INFO: Test took 4726ms.
[09:37:13.930] <TB2> INFO: scanning low vcal = 200
[09:37:18.461] <TB2> INFO: Test took 4531ms.
[09:37:18.522] <TB2> INFO: scanning low vcal = 210
[09:37:23.116] <TB2> INFO: Test took 4594ms.
[09:37:23.171] <TB2> INFO: scanning low vcal = 220
[09:37:27.717] <TB2> INFO: Test took 4546ms.
[09:37:27.818] <TB2> INFO: scanning low vcal = 230
[09:37:32.356] <TB2> INFO: Test took 4538ms.
[09:37:32.411] <TB2> INFO: scanning low vcal = 240
[09:37:37.048] <TB2> INFO: Test took 4637ms.
[09:37:37.104] <TB2> INFO: scanning low vcal = 250
[09:37:41.708] <TB2> INFO: Test took 4604ms.
[09:37:41.765] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[09:37:46.395] <TB2> INFO: Test took 4630ms.
[09:37:46.452] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[09:37:51.031] <TB2> INFO: Test took 4579ms.
[09:37:51.094] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[09:37:55.711] <TB2> INFO: Test took 4617ms.
[09:37:55.771] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[09:38:00.419] <TB2> INFO: Test took 4648ms.
[09:38:00.481] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:38:05.132] <TB2> INFO: Test took 4651ms.
[09:38:05.911] <TB2> INFO: PixTestGainPedestal::measure() done
[09:38:37.736] <TB2> INFO: PixTestGainPedestal::fit() done
[09:38:37.736] <TB2> INFO: non-linearity mean: 0.949 0.952 0.953 0.959 0.947 0.956 0.956 0.951 0.957 0.955 0.962 0.959 0.952 0.957 0.953 0.962
[09:38:37.736] <TB2> INFO: non-linearity RMS: 0.006 0.007 0.006 0.006 0.007 0.006 0.007 0.007 0.007 0.006 0.005 0.007 0.007 0.006 0.007 0.005
[09:38:37.736] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[09:38:37.756] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[09:38:37.774] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[09:38:37.792] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[09:38:37.810] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[09:38:37.828] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[09:38:37.847] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[09:38:37.865] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[09:38:37.883] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[09:38:37.913] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[09:38:37.952] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[09:38:37.991] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[09:38:38.031] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[09:38:38.050] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[09:38:38.069] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[09:38:38.087] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[09:38:38.105] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 171 seconds
[09:38:38.111] <TB2> INFO: enter test to run
[09:38:38.111] <TB2> INFO: test: exit no parameter change
[09:38:38.474] <TB2> QUIET: Connection to board 156 closed.
[09:38:38.838] <TB2> INFO: pXar: this is the end, my friend