[11:31:13.871] <TB1> INFO: *** Welcome to pxar ***
[11:31:13.871] <TB1> INFO: *** Today: 2015/07/28
[11:31:13.871] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C15.dat
[11:31:13.872] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:31:13.872] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//defaultMaskFile.dat
[11:31:13.872] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters_C15.dat
[11:31:13.940] <TB1> INFO: clk: 4
[11:31:13.940] <TB1> INFO: ctr: 4
[11:31:13.940] <TB1> INFO: sda: 19
[11:31:13.940] <TB1> INFO: tin: 9
[11:31:13.940] <TB1> INFO: level: 15
[11:31:13.940] <TB1> INFO: triggerdelay: 0
[11:31:13.940] <TB1> QUIET: Instanciating API for pxar v2.2.5+46~gdbe75a1
[11:31:13.940] <TB1> INFO: Log level: INFO
[11:31:13.948] <TB1> INFO: Found DTB DTB_WXBYFL
[11:31:13.960] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[11:31:13.963] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[11:31:13.966] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[11:31:15.489] <TB1> INFO: DUT info:
[11:31:15.489] <TB1> INFO: The DUT currently contains the following objects:
[11:31:15.489] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:31:15.489] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:31:15.489] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:31:15.489] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:31:15.489] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.489] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:15.891] <TB1> INFO: enter 'restricted' command line mode
[11:31:15.891] <TB1> INFO: enter test to run
[11:31:15.891] <TB1> INFO: test: pretest no parameter change
[11:31:15.891] <TB1> INFO: running: pretest
[11:31:15.898] <TB1> INFO: ######################################################################
[11:31:15.898] <TB1> INFO: PixTestPretest::doTest()
[11:31:15.898] <TB1> INFO: ######################################################################
[11:31:15.899] <TB1> INFO: ----------------------------------------------------------------------
[11:31:15.899] <TB1> INFO: PixTestPretest::programROC()
[11:31:15.899] <TB1> INFO: ----------------------------------------------------------------------
[11:31:33.923] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:31:33.923] <TB1> INFO: IA differences per ROC: 19.3 17.7 19.3 18.5 17.7 19.3 19.3 18.5 20.1 21.7 19.3 20.1 19.3 19.3 17.7 17.7
[11:31:34.007] <TB1> INFO: ----------------------------------------------------------------------
[11:31:34.007] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:31:34.007] <TB1> INFO: ----------------------------------------------------------------------
[11:31:40.106] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[11:31:40.110] <TB1> INFO: ----------------------------------------------------------------------
[11:31:40.110] <TB1> INFO: PixTestPretest::findWorkingPixel()
[11:31:40.110] <TB1> INFO: ----------------------------------------------------------------------
[11:31:48.520] <TB1> INFO: Test took 8404ms.
[11:31:48.839] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:31:48.890] <TB1> INFO: ----------------------------------------------------------------------
[11:31:48.890] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[11:31:48.890] <TB1> INFO: ----------------------------------------------------------------------
[11:31:57.275] <TB1> INFO: Test took 8378ms.
[11:31:57.595] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[11:31:57.598] <TB1> INFO: CalDel: 133 147 152 147 163 157 143 133 138 136 139 153 143 149 149 126
[11:31:57.598] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:31:57.602] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C0.dat
[11:31:57.603] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C1.dat
[11:31:57.603] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C2.dat
[11:31:57.606] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C3.dat
[11:31:57.606] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C4.dat
[11:31:57.606] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C5.dat
[11:31:57.606] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C6.dat
[11:31:57.607] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C7.dat
[11:31:57.607] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C8.dat
[11:31:57.607] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C9.dat
[11:31:57.608] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C10.dat
[11:31:57.609] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C11.dat
[11:31:57.609] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C12.dat
[11:31:57.609] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C13.dat
[11:31:57.609] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C14.dat
[11:31:57.610] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C15.dat
[11:31:57.613] <TB1> INFO: PixTestPretest::doTest() done, duration: 41 seconds
[11:31:57.746] <TB1> INFO: enter test to run
[11:31:57.747] <TB1> INFO: test: fulltest no parameter change
[11:31:57.747] <TB1> INFO: running: fulltest
[11:31:57.747] <TB1> INFO: ######################################################################
[11:31:57.747] <TB1> INFO: PixTestFullTest::doTest()
[11:31:57.747] <TB1> INFO: ######################################################################
[11:31:57.749] <TB1> INFO: ######################################################################
[11:31:57.753] <TB1> INFO: PixTestAlive::doTest()
[11:31:57.753] <TB1> INFO: ######################################################################
[11:31:57.755] <TB1> INFO: ----------------------------------------------------------------------
[11:31:57.755] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:31:57.755] <TB1> INFO: ----------------------------------------------------------------------
[11:32:01.246] <TB1> INFO: Test took 3489ms.
[11:32:01.266] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:01.506] <TB1> INFO: PixTestAlive::aliveTest() done
[11:32:01.506] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:32:01.508] <TB1> INFO: ----------------------------------------------------------------------
[11:32:01.508] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:32:01.508] <TB1> INFO: ----------------------------------------------------------------------
[11:32:04.280] <TB1> INFO: Test took 2769ms.
[11:32:04.283] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:04.284] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:32:04.528] <TB1> INFO: PixTestAlive::maskTest() done
[11:32:04.528] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:32:04.530] <TB1> INFO: ----------------------------------------------------------------------
[11:32:04.530] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:32:04.530] <TB1> INFO: ----------------------------------------------------------------------
[11:32:07.961] <TB1> INFO: Test took 3428ms.
[11:32:07.984] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:08.226] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[11:32:08.226] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:32:08.227] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[11:32:08.235] <TB1> INFO: ######################################################################
[11:32:08.235] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:32:08.235] <TB1> INFO: ######################################################################
[11:32:08.240] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[11:32:08.253] <TB1> INFO: dacScan step from 0 .. 29
[11:32:29.772] <TB1> INFO: Test took 21518ms.
[11:32:29.812] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:29.812] <TB1> INFO: dacScan step from 30 .. 59
[11:32:53.390] <TB1> INFO: Test took 23578ms.
[11:32:53.494] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:53.507] <TB1> INFO: dacScan step from 60 .. 89
[11:33:22.276] <TB1> INFO: Test took 28769ms.
[11:33:22.545] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:22.621] <TB1> INFO: dacScan step from 90 .. 119
[11:33:51.411] <TB1> INFO: Test took 28790ms.
[11:33:51.691] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:51.782] <TB1> INFO: dacScan step from 120 .. 149
[11:34:17.231] <TB1> INFO: Test took 25448ms.
[11:34:17.432] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:40.649] <TB1> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[11:34:40.649] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0
[11:34:40.649] <TB1> INFO: separation cut (per ROC): 98 89 92 83 69 73 79 83 74 101 90 91 99 85 86 93
[11:34:40.722] <TB1> INFO: ######################################################################
[11:34:40.722] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[11:34:40.722] <TB1> INFO: ######################################################################
[11:34:40.722] <TB1> INFO: ----------------------------------------------------------------------
[11:34:40.722] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[11:34:40.722] <TB1> INFO: ----------------------------------------------------------------------
[11:34:40.722] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[11:34:40.731] <TB1> INFO: dacScan step from 0 .. 3
[11:34:58.470] <TB1> INFO: Test took 17739ms.
[11:34:58.498] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:58.500] <TB1> INFO: dacScan step from 4 .. 7
[11:35:17.528] <TB1> INFO: Test took 19027ms.
[11:35:17.555] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:17.555] <TB1> INFO: dacScan step from 8 .. 11
[11:35:36.500] <TB1> INFO: Test took 18944ms.
[11:35:36.528] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:36.528] <TB1> INFO: dacScan step from 12 .. 15
[11:35:55.276] <TB1> INFO: Test took 18747ms.
[11:35:55.305] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:55.305] <TB1> INFO: dacScan step from 16 .. 19
[11:36:14.162] <TB1> INFO: Test took 18857ms.
[11:36:14.193] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:14.194] <TB1> INFO: dacScan step from 20 .. 23
[11:36:32.761] <TB1> INFO: Test took 18567ms.
[11:36:32.789] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:32.789] <TB1> INFO: dacScan step from 24 .. 27
[11:36:51.275] <TB1> INFO: Test took 18486ms.
[11:36:51.299] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:51.301] <TB1> INFO: dacScan step from 28 .. 31
[11:37:09.921] <TB1> INFO: Test took 18620ms.
[11:37:09.948] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:09.948] <TB1> INFO: dacScan step from 32 .. 35
[11:37:28.744] <TB1> INFO: Test took 18796ms.
[11:37:28.774] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:28.774] <TB1> INFO: dacScan step from 36 .. 39
[11:37:47.379] <TB1> INFO: Test took 18605ms.
[11:37:47.407] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:47.407] <TB1> INFO: dacScan step from 40 .. 43
[11:38:05.969] <TB1> INFO: Test took 18561ms.
[11:38:05.998] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:05.998] <TB1> INFO: dacScan step from 44 .. 47
[11:38:24.398] <TB1> INFO: Test took 18400ms.
[11:38:24.426] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:24.427] <TB1> INFO: dacScan step from 48 .. 51
[11:38:42.782] <TB1> INFO: Test took 18355ms.
[11:38:42.811] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:42.811] <TB1> INFO: dacScan step from 52 .. 55
[11:39:01.293] <TB1> INFO: Test took 18482ms.
[11:39:01.321] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:01.321] <TB1> INFO: dacScan step from 56 .. 59
[11:39:19.700] <TB1> INFO: Test took 18379ms.
[11:39:19.729] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:19.729] <TB1> INFO: dacScan step from 60 .. 63
[11:39:38.204] <TB1> INFO: Test took 18475ms.
[11:39:38.235] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:38.235] <TB1> INFO: dacScan step from 64 .. 67
[11:39:57.016] <TB1> INFO: Test took 18781ms.
[11:39:57.049] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:57.049] <TB1> INFO: dacScan step from 68 .. 71
[11:40:15.987] <TB1> INFO: Test took 18938ms.
[11:40:16.024] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:16.024] <TB1> INFO: dacScan step from 72 .. 75
[11:40:35.579] <TB1> INFO: Test took 19555ms.
[11:40:35.624] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:35.625] <TB1> INFO: dacScan step from 76 .. 79
[11:40:55.500] <TB1> INFO: Test took 19875ms.
[11:40:55.557] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:55.559] <TB1> INFO: dacScan step from 80 .. 83
[11:41:16.767] <TB1> INFO: Test took 21208ms.
[11:41:16.896] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:16.901] <TB1> INFO: dacScan step from 84 .. 87
[11:41:40.021] <TB1> INFO: Test took 23120ms.
[11:41:40.172] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:40.179] <TB1> INFO: dacScan step from 88 .. 91
[11:42:06.138] <TB1> INFO: Test took 25959ms.
[11:42:06.325] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:06.337] <TB1> INFO: dacScan step from 92 .. 95
[11:42:33.566] <TB1> INFO: Test took 27229ms.
[11:42:33.781] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:33.793] <TB1> INFO: dacScan step from 96 .. 99

[11:43:02.612] <TB1> INFO: Test took 28819ms.
[11:43:02.844] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:02.858] <TB1> INFO: dacScan step from 100 .. 103



[11:43:32.509] <TB1> INFO: Test took 29651ms.
[11:43:32.761] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:32.773] <TB1> INFO: dacScan step from 104 .. 107

[11:44:02.238] <TB1> INFO: Test took 29465ms.
[11:44:02.466] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:02.478] <TB1> INFO: dacScan step from 108 .. 111


[11:44:31.767] <TB1> INFO: Test took 29289ms.
[11:44:32.070] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:32.085] <TB1> INFO: dacScan step from 112 .. 115





[11:45:01.549] <TB1> INFO: Test took 29464ms.
[11:45:01.769] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:01.780] <TB1> INFO: dacScan step from 116 .. 119





[11:45:31.310] <TB1> INFO: Test took 29530ms.
[11:45:31.585] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:31.601] <TB1> INFO: dacScan step from 120 .. 123
[11:46:01.204] <TB1> INFO: Test took 29603ms.
[11:46:01.415] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:01.426] <TB1> INFO: dacScan step from 124 .. 127


[11:46:31.343] <TB1> INFO: Test took 29917ms.
[11:46:31.565] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:31.576] <TB1> INFO: dacScan step from 128 .. 131
[11:47:00.876] <TB1> INFO: Test took 29300ms.
[11:47:01.114] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:01.127] <TB1> INFO: dacScan step from 132 .. 135
[11:47:30.525] <TB1> INFO: Test took 29398ms.
[11:47:30.765] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:30.777] <TB1> INFO: dacScan step from 136 .. 139
[11:48:00.395] <TB1> INFO: Test took 29618ms.
[11:48:00.621] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:00.632] <TB1> INFO: dacScan step from 140 .. 143
[11:48:29.903] <TB1> INFO: Test took 29271ms.
[11:48:30.170] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:30.191] <TB1> INFO: dacScan step from 144 .. 147
[11:48:59.285] <TB1> INFO: Test took 29093ms.
[11:48:59.511] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:59.523] <TB1> INFO: dacScan step from 148 .. 149
[11:49:15.623] <TB1> INFO: Test took 16100ms.
[11:49:15.735] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:15.741] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:17.186] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:18.672] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:20.068] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:21.540] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:23.103] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:24.532] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:25.970] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:27.483] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:28.930] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:30.312] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:31.912] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:33.360] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:34.727] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:36.101] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:37.480] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:49:38.892] <TB1> INFO: PixTestScurves::scurves() done
[11:49:38.892] <TB1> INFO: Vcal mean: 86.77 89.46 86.40 89.14 79.71 76.88 89.43 87.58 86.42 92.89 93.25 92.27 95.24 89.19 86.97 95.08
[11:49:38.892] <TB1> INFO: Vcal RMS: 5.61 5.56 5.53 5.10 4.96 5.18 5.13 5.64 5.10 5.73 6.31 6.36 5.55 5.21 5.31 5.34
[11:49:38.892] <TB1> INFO: PixTestScurves::fullTest() done, duration: 898 seconds
[11:49:38.966] <TB1> INFO: ######################################################################
[11:49:38.966] <TB1> INFO: PixTestTrim::doTest()
[11:49:38.966] <TB1> INFO: ######################################################################
[11:49:38.968] <TB1> INFO: ----------------------------------------------------------------------
[11:49:38.968] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[11:49:38.968] <TB1> INFO: ----------------------------------------------------------------------
[11:49:39.092] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:49:39.092] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:49:39.103] <TB1> INFO: dacScan step from 0 .. 19
[11:49:53.678] <TB1> INFO: Test took 14575ms.
[11:49:53.704] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:53.704] <TB1> INFO: dacScan step from 20 .. 39
[11:50:08.723] <TB1> INFO: Test took 15019ms.
[11:50:08.752] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:08.752] <TB1> INFO: dacScan step from 40 .. 59
[11:50:23.883] <TB1> INFO: Test took 15131ms.
[11:50:23.905] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:23.905] <TB1> INFO: dacScan step from 60 .. 79
[11:50:38.339] <TB1> INFO: Test took 14434ms.
[11:50:38.360] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:38.360] <TB1> INFO: dacScan step from 80 .. 99
[11:50:54.046] <TB1> INFO: Test took 15686ms.
[11:50:54.097] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:54.104] <TB1> INFO: dacScan step from 100 .. 119
[11:51:13.202] <TB1> INFO: Test took 19098ms.
[11:51:13.358] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:13.386] <TB1> INFO: dacScan step from 120 .. 139
[11:51:32.802] <TB1> INFO: Test took 19415ms.
[11:51:32.954] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:32.982] <TB1> INFO: dacScan step from 140 .. 159
[11:51:49.482] <TB1> INFO: Test took 16500ms.
[11:51:49.553] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:13.679] <TB1> INFO: ROC 0 VthrComp = 95
[11:52:13.679] <TB1> INFO: ROC 1 VthrComp = 96
[11:52:13.679] <TB1> INFO: ROC 2 VthrComp = 91
[11:52:13.680] <TB1> INFO: ROC 3 VthrComp = 95
[11:52:13.680] <TB1> INFO: ROC 4 VthrComp = 80
[11:52:13.680] <TB1> INFO: ROC 5 VthrComp = 81
[11:52:13.680] <TB1> INFO: ROC 6 VthrComp = 91
[11:52:13.680] <TB1> INFO: ROC 7 VthrComp = 91
[11:52:13.680] <TB1> INFO: ROC 8 VthrComp = 90
[11:52:13.680] <TB1> INFO: ROC 9 VthrComp = 98
[11:52:13.680] <TB1> INFO: ROC 10 VthrComp = 94
[11:52:13.681] <TB1> INFO: ROC 11 VthrComp = 94
[11:52:13.681] <TB1> INFO: ROC 12 VthrComp = 101
[11:52:13.681] <TB1> INFO: ROC 13 VthrComp = 94
[11:52:13.681] <TB1> INFO: ROC 14 VthrComp = 90
[11:52:13.681] <TB1> INFO: ROC 15 VthrComp = 99
[11:52:13.681] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:52:13.681] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:52:13.690] <TB1> INFO: dacScan step from 0 .. 19
[11:52:28.856] <TB1> INFO: Test took 15165ms.
[11:52:28.879] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:28.879] <TB1> INFO: dacScan step from 20 .. 39
[11:52:44.328] <TB1> INFO: Test took 15448ms.
[11:52:44.366] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:44.369] <TB1> INFO: dacScan step from 40 .. 59
[11:53:03.575] <TB1> INFO: Test took 19206ms.
[11:53:03.760] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:03.801] <TB1> INFO: dacScan step from 60 .. 79
[11:53:22.674] <TB1> INFO: Test took 18873ms.
[11:53:22.834] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:22.888] <TB1> INFO: dacScan step from 80 .. 99
[11:53:43.291] <TB1> INFO: Test took 20403ms.
[11:53:43.451] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:43.499] <TB1> INFO: dacScan step from 100 .. 119
[11:54:03.981] <TB1> INFO: Test took 20481ms.
[11:54:04.159] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:04.206] <TB1> INFO: dacScan step from 120 .. 139
[11:54:24.703] <TB1> INFO: Test took 20496ms.
[11:54:24.862] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:24.915] <TB1> INFO: dacScan step from 140 .. 159
[11:54:44.989] <TB1> INFO: Test took 20074ms.
[11:54:45.152] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:11.774] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.497 for pixel 50/79 mean/min/max = 44.7002/30.8709/58.5296
[11:55:11.774] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 58.3977 for pixel 0/59 mean/min/max = 45.0095/31.1895/58.8295
[11:55:11.774] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 59.8658 for pixel 9/78 mean/min/max = 46.3691/32.751/59.9873
[11:55:11.774] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 57.8063 for pixel 0/19 mean/min/max = 45.0412/32.2387/57.8437
[11:55:11.775] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 60.3722 for pixel 18/1 mean/min/max = 46.3722/32.2826/60.4619
[11:55:11.775] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 59.2952 for pixel 14/70 mean/min/max = 45.3505/31.3352/59.3658
[11:55:11.775] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.3266 for pixel 16/0 mean/min/max = 45.7581/32.9658/58.5503
[11:55:11.775] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.3619 for pixel 0/12 mean/min/max = 46.3234/32.169/60.4778
[11:55:11.776] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 59.3367 for pixel 0/69 mean/min/max = 46.2532/33.0611/59.4454
[11:55:11.776] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.9971 for pixel 18/75 mean/min/max = 45.9145/31.2935/60.5356
[11:55:11.776] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 62.1675 for pixel 22/18 mean/min/max = 46.7514/31.2962/62.2065
[11:55:11.776] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 61.7521 for pixel 18/79 mean/min/max = 46.8017/31.6548/61.9486
[11:55:11.777] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.1171 for pixel 0/4 mean/min/max = 46.1458/32.168/60.1235
[11:55:11.777] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 57.5775 for pixel 51/71 mean/min/max = 45.0723/32.4894/57.6552
[11:55:11.777] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 59.3108 for pixel 20/75 mean/min/max = 45.8827/32.348/59.4173
[11:55:11.777] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 59.5142 for pixel 2/5 mean/min/max = 45.8517/32.1447/59.5587
[11:55:11.777] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:56:46.761] <TB1> INFO: Test took 94984ms.
[11:56:48.610] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:56:48.618] <TB1> INFO: dacScan step from 0 .. 19
[11:57:11.962] <TB1> INFO: Test took 23344ms.
[11:57:12.015] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:12.016] <TB1> INFO: dacScan step from 20 .. 39
[11:57:41.011] <TB1> INFO: Test took 28995ms.
[11:57:41.239] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:41.270] <TB1> INFO: dacScan step from 40 .. 59





[11:58:11.872] <TB1> INFO: Test took 30602ms.
[11:58:12.177] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:12.232] <TB1> INFO: dacScan step from 60 .. 79


[11:58:46.395] <TB1> INFO: Test took 34163ms.
[11:58:46.663] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:46.711] <TB1> INFO: dacScan step from 80 .. 99

[11:59:20.675] <TB1> INFO: Test took 33964ms.
[11:59:20.949] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:21.000] <TB1> INFO: dacScan step from 100 .. 119


[11:59:54.967] <TB1> INFO: Test took 33966ms.
[11:59:55.252] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:55.303] <TB1> INFO: dacScan step from 120 .. 139



[12:00:28.893] <TB1> INFO: Test took 33590ms.
[12:00:29.173] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:29.237] <TB1> INFO: dacScan step from 140 .. 159





[12:01:02.879] <TB1> INFO: Test took 33642ms.
[12:01:03.162] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:03.210] <TB1> INFO: dacScan step from 160 .. 179
[12:01:36.980] <TB1> INFO: Test took 33770ms.
[12:01:37.321] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:37.374] <TB1> INFO: dacScan step from 180 .. 199
[12:02:12.262] <TB1> INFO: Test took 34888ms.
[12:02:12.558] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:38.445] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.045667 .. 255.000000
[12:02:38.525] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:02:38.534] <TB1> INFO: dacScan step from 0 .. 19
[12:02:52.148] <TB1> INFO: Test took 13614ms.
[12:02:52.177] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:52.177] <TB1> INFO: dacScan step from 20 .. 39
[12:03:07.091] <TB1> INFO: Test took 14914ms.
[12:03:07.173] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:07.189] <TB1> INFO: dacScan step from 40 .. 59
[12:03:24.937] <TB1> INFO: Test took 17748ms.
[12:03:25.108] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:25.161] <TB1> INFO: dacScan step from 60 .. 79
[12:03:41.835] <TB1> INFO: Test took 16674ms.
[12:03:41.977] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:42.028] <TB1> INFO: dacScan step from 80 .. 99
[12:03:59.936] <TB1> INFO: Test took 17908ms.
[12:04:00.078] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:00.125] <TB1> INFO: dacScan step from 100 .. 119
[12:04:17.807] <TB1> INFO: Test took 17681ms.
[12:04:17.966] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:18.015] <TB1> INFO: dacScan step from 120 .. 139
[12:04:36.014] <TB1> INFO: Test took 17999ms.
[12:04:36.178] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:36.244] <TB1> INFO: dacScan step from 140 .. 159
[12:04:54.208] <TB1> INFO: Test took 17964ms.
[12:04:54.347] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:54.396] <TB1> INFO: dacScan step from 160 .. 179
[12:05:12.372] <TB1> INFO: Test took 17976ms.
[12:05:12.523] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:12.575] <TB1> INFO: dacScan step from 180 .. 199
[12:05:31.330] <TB1> INFO: Test took 18754ms.
[12:05:31.484] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:31.537] <TB1> INFO: dacScan step from 200 .. 219
[12:05:49.345] <TB1> INFO: Test took 17807ms.
[12:05:49.483] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:49.533] <TB1> INFO: dacScan step from 220 .. 239
[12:06:07.449] <TB1> INFO: Test took 17916ms.
[12:06:07.592] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:07.640] <TB1> INFO: dacScan step from 240 .. 255
[12:06:21.525] <TB1> INFO: Test took 13885ms.
[12:06:21.664] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:55.226] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 15.428316 .. 45.519470
[12:06:55.302] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 55 (20) hits flags = 16 (plus default)
[12:06:55.310] <TB1> INFO: dacScan step from 5 .. 24
[12:07:08.908] <TB1> INFO: Test took 13598ms.
[12:07:08.938] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:08.938] <TB1> INFO: dacScan step from 25 .. 44
[12:07:24.630] <TB1> INFO: Test took 15692ms.
[12:07:24.741] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:24.770] <TB1> INFO: dacScan step from 45 .. 55
[12:07:35.369] <TB1> INFO: Test took 10599ms.
[12:07:35.447] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:52.383] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 20.648632 .. 44.114412
[12:07:52.479] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 54 (20) hits flags = 16 (plus default)
[12:07:52.488] <TB1> INFO: dacScan step from 10 .. 29
[12:08:05.448] <TB1> INFO: Test took 12960ms.
[12:08:05.470] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:05.470] <TB1> INFO: dacScan step from 30 .. 49
[12:08:22.107] <TB1> INFO: Test took 16637ms.
[12:08:22.252] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:22.299] <TB1> INFO: dacScan step from 50 .. 54
[12:08:28.619] <TB1> INFO: Test took 6320ms.
[12:08:28.667] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:44.830] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 24.110863 .. 43.326320
[12:08:44.908] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 14 .. 53 (20) hits flags = 16 (plus default)
[12:08:44.916] <TB1> INFO: dacScan step from 14 .. 33
[12:08:58.720] <TB1> INFO: Test took 13804ms.
[12:08:58.763] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:58.768] <TB1> INFO: dacScan step from 34 .. 53
[12:09:16.054] <TB1> INFO: Test took 17286ms.
[12:09:16.213] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:31.881] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:09:31.881] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[12:09:31.890] <TB1> INFO: dacScan step from 15 .. 34
[12:09:55.333] <TB1> INFO: Test took 23443ms.
[12:09:55.403] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:55.413] <TB1> INFO: dacScan step from 35 .. 54
[12:10:28.372] <TB1> INFO: Test took 32959ms.
[12:10:28.693] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:28.768] <TB1> INFO: dacScan step from 55 .. 55
[12:10:33.049] <TB1> INFO: Test took 4281ms.
[12:10:33.064] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:10:47.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:10:47.543] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:10:47.543] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:10:47.543] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:10:47.543] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:10:47.543] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:10:47.543] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:10:47.543] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:10:47.549] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:10:47.555] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:10:47.560] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:10:47.566] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:10:47.572] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:10:47.577] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:10:47.583] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:10:47.589] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:10:47.595] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:10:47.600] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:10:47.606] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:10:47.612] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:10:47.618] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:10:47.624] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:10:47.629] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:10:47.635] <TB1> INFO: PixTestTrim::trimTest() done
[12:10:47.635] <TB1> INFO: vtrim: 107 113 113 111 112 125 103 113 100 123 120 119 106 97 117 116
[12:10:47.635] <TB1> INFO: vthrcomp: 95 96 91 95 80 81 91 91 90 98 94 94 101 94 90 99
[12:10:47.635] <TB1> INFO: vcal mean: 35.02 35.02 35.01 35.02 35.12 35.01 35.04 35.06 35.05 35.00 35.03 35.03 35.02 35.02 35.02 35.06
[12:10:47.635] <TB1> INFO: vcal RMS: 1.00 1.24 1.00 1.02 1.10 1.00 1.02 1.16 0.97 1.01 1.08 1.29 1.00 1.03 1.00 1.02
[12:10:47.635] <TB1> INFO: bits mean: 9.83 10.14 9.18 9.93 9.87 10.02 9.42 9.33 8.92 9.63 9.71 9.56 9.32 9.76 9.98 10.09
[12:10:47.635] <TB1> INFO: bits RMS: 2.78 2.48 2.66 2.48 2.45 2.53 2.56 2.72 2.78 2.70 2.57 2.60 2.72 2.55 2.39 2.36
[12:10:47.644] <TB1> INFO: ----------------------------------------------------------------------
[12:10:47.644] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:10:47.644] <TB1> INFO: ----------------------------------------------------------------------
[12:10:47.649] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:10:47.656] <TB1> INFO: dacScan step from 0 .. 19
[12:11:09.085] <TB1> INFO: Test took 21428ms.
[12:11:09.126] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:09.126] <TB1> INFO: dacScan step from 20 .. 39
[12:11:31.905] <TB1> INFO: Test took 22779ms.
[12:11:31.942] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:31.942] <TB1> INFO: dacScan step from 40 .. 59
[12:11:54.845] <TB1> INFO: Test took 22903ms.
[12:11:54.882] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:54.882] <TB1> INFO: dacScan step from 60 .. 79
[12:12:16.476] <TB1> INFO: Test took 21594ms.
[12:12:16.522] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:16.522] <TB1> INFO: dacScan step from 80 .. 99
[12:12:38.751] <TB1> INFO: Test took 22229ms.
[12:12:38.799] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:38.800] <TB1> INFO: dacScan step from 100 .. 119
[12:13:06.234] <TB1> INFO: Test took 27433ms.
[12:13:06.447] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:06.471] <TB1> INFO: dacScan step from 120 .. 139
[12:13:37.948] <TB1> INFO: Test took 31477ms.
[12:13:38.217] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:38.263] <TB1> INFO: dacScan step from 140 .. 159


[12:14:12.064] <TB1> INFO: Test took 33801ms.
[12:14:12.351] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:12.403] <TB1> INFO: dacScan step from 160 .. 179
[12:14:44.172] <TB1> INFO: Test took 31768ms.
[12:14:44.453] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:44.508] <TB1> INFO: dacScan step from 180 .. 199
[12:15:18.418] <TB1> INFO: Test took 33910ms.
[12:15:18.705] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:45.676] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 162 (20) hits flags = 16 (plus default)
[12:15:45.684] <TB1> INFO: dacScan step from 0 .. 19
[12:16:08.428] <TB1> INFO: Test took 22744ms.
[12:16:08.462] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:08.462] <TB1> INFO: dacScan step from 20 .. 39
[12:16:30.524] <TB1> INFO: Test took 22062ms.
[12:16:30.563] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:30.563] <TB1> INFO: dacScan step from 40 .. 59
[12:16:52.034] <TB1> INFO: Test took 21470ms.
[12:16:52.068] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:52.068] <TB1> INFO: dacScan step from 60 .. 79
[12:17:14.942] <TB1> INFO: Test took 22874ms.
[12:17:14.987] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:14.987] <TB1> INFO: dacScan step from 80 .. 99
[12:17:39.048] <TB1> INFO: Test took 24061ms.
[12:17:39.141] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:39.148] <TB1> INFO: dacScan step from 100 .. 119
[12:18:10.187] <TB1> INFO: Test took 31039ms.
[12:18:10.429] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:10.463] <TB1> INFO: dacScan step from 120 .. 139
[12:18:43.970] <TB1> INFO: Test took 33507ms.
[12:18:44.243] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:44.293] <TB1> INFO: dacScan step from 140 .. 159



[12:19:16.408] <TB1> INFO: Test took 32115ms.
[12:19:16.678] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:16.733] <TB1> INFO: dacScan step from 160 .. 162
[12:19:23.686] <TB1> INFO: Test took 6953ms.
[12:19:23.726] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:49.562] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[12:19:49.572] <TB1> INFO: dacScan step from 0 .. 19
[12:20:12.337] <TB1> INFO: Test took 22765ms.
[12:20:12.371] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:12.371] <TB1> INFO: dacScan step from 20 .. 39
[12:20:35.125] <TB1> INFO: Test took 22754ms.
[12:20:35.161] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:35.162] <TB1> INFO: dacScan step from 40 .. 59
[12:20:57.391] <TB1> INFO: Test took 22229ms.
[12:20:57.432] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:57.432] <TB1> INFO: dacScan step from 60 .. 79
[12:21:19.148] <TB1> INFO: Test took 21716ms.
[12:21:19.182] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:19.183] <TB1> INFO: dacScan step from 80 .. 99
[12:21:43.326] <TB1> INFO: Test took 24143ms.
[12:21:43.412] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:43.422] <TB1> INFO: dacScan step from 100 .. 119
[12:22:15.074] <TB1> INFO: Test took 31652ms.
[12:22:15.351] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:15.391] <TB1> INFO: dacScan step from 120 .. 139
[12:22:47.115] <TB1> INFO: Test took 31724ms.
[12:22:47.386] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:47.432] <TB1> INFO: dacScan step from 140 .. 152
[12:23:10.138] <TB1> INFO: Test took 22705ms.
[12:23:10.319] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:32.491] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[12:23:32.499] <TB1> INFO: dacScan step from 0 .. 19
[12:23:55.463] <TB1> INFO: Test took 22964ms.
[12:23:55.506] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:55.506] <TB1> INFO: dacScan step from 20 .. 39
[12:24:18.294] <TB1> INFO: Test took 22788ms.
[12:24:18.332] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:18.332] <TB1> INFO: dacScan step from 40 .. 59
[12:24:41.328] <TB1> INFO: Test took 22996ms.
[12:24:41.364] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:41.364] <TB1> INFO: dacScan step from 60 .. 79
[12:25:04.422] <TB1> INFO: Test took 23058ms.
[12:25:04.459] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:04.459] <TB1> INFO: dacScan step from 80 .. 99
[12:25:28.294] <TB1> INFO: Test took 23835ms.
[12:25:28.380] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:28.387] <TB1> INFO: dacScan step from 100 .. 119
[12:25:57.653] <TB1> INFO: Test took 29266ms.
[12:25:57.894] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:57.931] <TB1> INFO: dacScan step from 120 .. 139



[12:26:29.898] <TB1> INFO: Test took 31967ms.
[12:26:30.172] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:30.221] <TB1> INFO: dacScan step from 140 .. 151
[12:26:51.248] <TB1> INFO: Test took 21027ms.
[12:26:51.409] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:13.217] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[12:27:13.233] <TB1> INFO: dacScan step from 0 .. 19
[12:27:36.066] <TB1> INFO: Test took 22833ms.
[12:27:36.099] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:36.099] <TB1> INFO: dacScan step from 20 .. 39
[12:27:57.529] <TB1> INFO: Test took 21430ms.
[12:27:57.563] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:57.563] <TB1> INFO: dacScan step from 40 .. 59
[12:28:20.220] <TB1> INFO: Test took 22657ms.
[12:28:20.262] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:20.262] <TB1> INFO: dacScan step from 60 .. 79
[12:28:43.445] <TB1> INFO: Test took 23183ms.
[12:28:43.483] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:43.483] <TB1> INFO: dacScan step from 80 .. 99
[12:29:07.683] <TB1> INFO: Test took 24200ms.
[12:29:07.769] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:07.775] <TB1> INFO: dacScan step from 100 .. 119
[12:29:36.926] <TB1> INFO: Test took 29151ms.
[12:29:37.174] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:37.213] <TB1> INFO: dacScan step from 120 .. 139


[12:30:09.617] <TB1> INFO: Test took 32403ms.
[12:30:09.889] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:09.942] <TB1> INFO: dacScan step from 140 .. 151
[12:30:30.496] <TB1> INFO: Test took 20554ms.
[12:30:30.664] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:53.109] <TB1> INFO: PixTestTrim::trimBitTest() done
[12:30:53.111] <TB1> INFO: PixTestTrim::doTest() done, duration: 2474 seconds
[12:30:53.894] <TB1> INFO: ######################################################################
[12:30:53.894] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:30:53.894] <TB1> INFO: ######################################################################
[12:30:57.390] <TB1> INFO: Test took 3495ms.
[12:30:57.415] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:01.002] <TB1> INFO: Test took 3387ms.
[12:31:01.065] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:04.485] <TB1> INFO: Test took 3406ms.
[12:31:04.550] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:04.557] <TB1> INFO: The DUT currently contains the following objects:
[12:31:04.557] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:04.557] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:04.557] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:04.557] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:04.557] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:04.557] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.669] <TB1> INFO: Test took 1112ms.
[12:31:05.670] <TB1> INFO: The DUT currently contains the following objects:
[12:31:05.670] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:05.670] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:05.670] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:05.670] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:05.670] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:05.670] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.775] <TB1> INFO: Test took 1104ms.
[12:31:06.776] <TB1> INFO: The DUT currently contains the following objects:
[12:31:06.776] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:06.776] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:06.776] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:06.776] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:06.776] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:06.776] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.882] <TB1> INFO: Test took 1106ms.
[12:31:07.884] <TB1> INFO: The DUT currently contains the following objects:
[12:31:07.884] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:07.884] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:07.884] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:07.884] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:07.884] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.884] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.885] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.885] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.885] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:07.885] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.997] <TB1> INFO: Test took 1112ms.
[12:31:08.999] <TB1> INFO: The DUT currently contains the following objects:
[12:31:08.999] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:08.999] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:08.999] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:08.999] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:08.999] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:08.999] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.110] <TB1> INFO: Test took 1111ms.
[12:31:10.112] <TB1> INFO: The DUT currently contains the following objects:
[12:31:10.112] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:10.112] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:10.112] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:10.112] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:10.112] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:10.112] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.221] <TB1> INFO: Test took 1108ms.
[12:31:11.222] <TB1> INFO: The DUT currently contains the following objects:
[12:31:11.222] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:11.222] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:11.222] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:11.222] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:11.222] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:11.223] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.332] <TB1> INFO: Test took 1109ms.
[12:31:12.333] <TB1> INFO: The DUT currently contains the following objects:
[12:31:12.333] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:12.333] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:12.333] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:12.333] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:12.333] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:12.333] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.444] <TB1> INFO: Test took 1111ms.
[12:31:13.445] <TB1> INFO: The DUT currently contains the following objects:
[12:31:13.445] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:13.445] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:13.445] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:13.445] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:13.446] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:13.446] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.571] <TB1> INFO: Test took 1125ms.
[12:31:14.572] <TB1> INFO: The DUT currently contains the following objects:
[12:31:14.572] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:14.572] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:14.572] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:14.572] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:14.572] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.572] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.572] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.572] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.572] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.572] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.572] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:14.573] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.698] <TB1> INFO: Test took 1125ms.
[12:31:15.699] <TB1> INFO: The DUT currently contains the following objects:
[12:31:15.699] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:15.699] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:15.699] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:15.699] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:15.699] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.699] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.699] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.699] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.699] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.699] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.699] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.699] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.700] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.700] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.700] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.700] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.700] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.700] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.700] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:15.700] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.812] <TB1> INFO: Test took 1112ms.
[12:31:16.813] <TB1> INFO: The DUT currently contains the following objects:
[12:31:16.813] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:16.813] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:16.813] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:16.813] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:16.813] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.813] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.813] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.813] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.813] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.813] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.813] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.813] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.814] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.814] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.814] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.814] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.814] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.814] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.814] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:16.814] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.924] <TB1> INFO: Test took 1110ms.
[12:31:17.925] <TB1> INFO: The DUT currently contains the following objects:
[12:31:17.925] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:17.925] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:17.925] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:17.926] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:17.926] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:17.926] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.037] <TB1> INFO: Test took 1111ms.
[12:31:19.038] <TB1> INFO: The DUT currently contains the following objects:
[12:31:19.038] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:19.038] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:19.038] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:19.038] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:19.038] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.038] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.038] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.038] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.038] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.038] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.038] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.038] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.039] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.039] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.039] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.039] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.039] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.039] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.039] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:19.039] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.149] <TB1> INFO: Test took 1110ms.
[12:31:20.150] <TB1> INFO: The DUT currently contains the following objects:
[12:31:20.150] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:20.150] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:20.150] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:20.150] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:20.150] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:20.150] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.261] <TB1> INFO: Test took 1111ms.
[12:31:21.261] <TB1> INFO: The DUT currently contains the following objects:
[12:31:21.261] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:31:21.261] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:31:21.261] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:31:21.261] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:31:21.262] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:21.262] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:31:22.369] <TB1> INFO: Test took 1107ms.
[12:31:22.374] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:35:08.874] <TB1> INFO: Test took 226500ms.
[12:35:10.454] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:38:56.436] <TB1> INFO: Test took 225982ms.
[12:38:58.279] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.285] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.292] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.298] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.305] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.312] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.318] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.325] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.331] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.338] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.344] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.351] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.358] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.364] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.371] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.377] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:38:58.432] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:38:58.432] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:38:58.433] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:38:58.433] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:38:58.433] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:38:58.433] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:38:58.433] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:38:58.434] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:38:58.434] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:38:58.434] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:38:58.434] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:38:58.434] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:38:58.435] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:38:58.435] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:38:58.435] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:38:58.435] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:39:01.876] <TB1> INFO: Test took 3436ms.
[12:39:05.590] <TB1> INFO: Test took 3423ms.
[12:39:09.357] <TB1> INFO: Test took 3475ms.
[12:39:09.654] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:10.571] <TB1> INFO: Test took 917ms.
[12:39:10.574] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:11.683] <TB1> INFO: Test took 1109ms.
[12:39:11.686] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:12.824] <TB1> INFO: Test took 1138ms.
[12:39:12.827] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:13.936] <TB1> INFO: Test took 1109ms.
[12:39:13.939] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:15.043] <TB1> INFO: Test took 1104ms.
[12:39:15.046] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:16.156] <TB1> INFO: Test took 1110ms.
[12:39:16.159] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:17.269] <TB1> INFO: Test took 1110ms.
[12:39:17.273] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:18.384] <TB1> INFO: Test took 1112ms.
[12:39:18.388] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:19.494] <TB1> INFO: Test took 1106ms.
[12:39:19.497] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:20.609] <TB1> INFO: Test took 1112ms.
[12:39:20.614] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:21.723] <TB1> INFO: Test took 1110ms.
[12:39:21.727] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:22.840] <TB1> INFO: Test took 1113ms.
[12:39:22.844] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:23.949] <TB1> INFO: Test took 1105ms.
[12:39:23.952] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:25.064] <TB1> INFO: Test took 1112ms.
[12:39:25.068] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:26.181] <TB1> INFO: Test took 1114ms.
[12:39:26.185] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:27.291] <TB1> INFO: Test took 1106ms.
[12:39:27.295] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:28.398] <TB1> INFO: Test took 1103ms.
[12:39:28.401] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:29.512] <TB1> INFO: Test took 1111ms.
[12:39:29.515] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:30.620] <TB1> INFO: Test took 1105ms.
[12:39:30.623] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:31.734] <TB1> INFO: Test took 1111ms.
[12:39:31.738] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:32.842] <TB1> INFO: Test took 1106ms.
[12:39:32.846] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:33.957] <TB1> INFO: Test took 1112ms.
[12:39:33.961] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:35.072] <TB1> INFO: Test took 1111ms.
[12:39:35.077] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:36.188] <TB1> INFO: Test took 1111ms.
[12:39:36.192] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:37.297] <TB1> INFO: Test took 1105ms.
[12:39:37.299] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:38.411] <TB1> INFO: Test took 1112ms.
[12:39:38.415] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:39.526] <TB1> INFO: Test took 1111ms.
[12:39:39.531] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:40.643] <TB1> INFO: Test took 1113ms.
[12:39:40.647] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:41.753] <TB1> INFO: Test took 1106ms.
[12:39:41.757] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:42.867] <TB1> INFO: Test took 1110ms.
[12:39:42.872] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:43.997] <TB1> INFO: Test took 1126ms.
[12:39:44.001] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:45.113] <TB1> INFO: Test took 1112ms.
[12:39:45.700] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 531 seconds
[12:39:45.700] <TB1> INFO: PH scale (per ROC): 80 74 77 79 81 87 76 81 88 84 80 79 80 79 79 80
[12:39:45.700] <TB1> INFO: PH offset (per ROC): 155 162 156 156 157 169 177 174 166 157 173 179 158 163 159 162
[12:39:45.880] <TB1> INFO: ######################################################################
[12:39:45.880] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:39:45.880] <TB1> INFO: ######################################################################
[12:39:45.890] <TB1> INFO: scanning low vcal = 10
[12:39:49.772] <TB1> INFO: Test took 3882ms.
[12:39:49.778] <TB1> INFO: scanning low vcal = 20
[12:39:53.640] <TB1> INFO: Test took 3862ms.
[12:39:53.645] <TB1> INFO: scanning low vcal = 30
[12:39:57.549] <TB1> INFO: Test took 3904ms.
[12:39:57.558] <TB1> INFO: scanning low vcal = 40
[12:40:01.941] <TB1> INFO: Test took 4383ms.
[12:40:02.018] <TB1> INFO: scanning low vcal = 50
[12:40:06.410] <TB1> INFO: Test took 4392ms.
[12:40:06.474] <TB1> INFO: scanning low vcal = 60
[12:40:10.871] <TB1> INFO: Test took 4397ms.
[12:40:10.933] <TB1> INFO: scanning low vcal = 70
[12:40:15.353] <TB1> INFO: Test took 4420ms.
[12:40:15.442] <TB1> INFO: scanning low vcal = 80
[12:40:19.834] <TB1> INFO: Test took 4392ms.
[12:40:19.894] <TB1> INFO: scanning low vcal = 90
[12:40:24.310] <TB1> INFO: Test took 4416ms.
[12:40:24.378] <TB1> INFO: scanning low vcal = 100
[12:40:28.731] <TB1> INFO: Test took 4353ms.
[12:40:28.797] <TB1> INFO: scanning low vcal = 110
[12:40:33.132] <TB1> INFO: Test took 4335ms.
[12:40:33.196] <TB1> INFO: scanning low vcal = 120
[12:40:37.576] <TB1> INFO: Test took 4380ms.
[12:40:37.649] <TB1> INFO: scanning low vcal = 130
[12:40:41.873] <TB1> INFO: Test took 4224ms.
[12:40:41.938] <TB1> INFO: scanning low vcal = 140
[12:40:46.215] <TB1> INFO: Test took 4277ms.
[12:40:46.285] <TB1> INFO: scanning low vcal = 150
[12:40:50.511] <TB1> INFO: Test took 4226ms.
[12:40:50.589] <TB1> INFO: scanning low vcal = 160
[12:40:54.845] <TB1> INFO: Test took 4256ms.
[12:40:54.908] <TB1> INFO: scanning low vcal = 170
[12:40:59.171] <TB1> INFO: Test took 4263ms.
[12:40:59.268] <TB1> INFO: scanning low vcal = 180
[12:41:03.591] <TB1> INFO: Test took 4323ms.
[12:41:03.655] <TB1> INFO: scanning low vcal = 190
[12:41:08.051] <TB1> INFO: Test took 4396ms.
[12:41:08.123] <TB1> INFO: scanning low vcal = 200
[12:41:12.383] <TB1> INFO: Test took 4260ms.
[12:41:12.482] <TB1> INFO: scanning low vcal = 210
[12:41:16.692] <TB1> INFO: Test took 4210ms.
[12:41:16.749] <TB1> INFO: scanning low vcal = 220
[12:41:21.031] <TB1> INFO: Test took 4282ms.
[12:41:21.087] <TB1> INFO: scanning low vcal = 230
[12:41:25.338] <TB1> INFO: Test took 4251ms.
[12:41:25.402] <TB1> INFO: scanning low vcal = 240
[12:41:29.809] <TB1> INFO: Test took 4390ms.
[12:41:29.868] <TB1> INFO: scanning low vcal = 250
[12:41:34.240] <TB1> INFO: Test took 4372ms.
[12:41:34.327] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[12:41:38.684] <TB1> INFO: Test took 4357ms.
[12:41:38.741] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[12:41:43.055] <TB1> INFO: Test took 4314ms.
[12:41:43.126] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[12:41:47.422] <TB1> INFO: Test took 4296ms.
[12:41:47.489] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[12:41:51.837] <TB1> INFO: Test took 4348ms.
[12:41:51.892] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:41:56.256] <TB1> INFO: Test took 4364ms.
[12:41:56.790] <TB1> INFO: PixTestGainPedestal::measure() done
[12:42:33.200] <TB1> INFO: PixTestGainPedestal::fit() done
[12:42:33.201] <TB1> INFO: non-linearity mean: 0.949 0.950 0.955 0.961 0.958 0.958 0.958 0.958 0.960 0.960 0.957 0.960 0.963 0.955 0.959 0.959
[12:42:33.201] <TB1> INFO: non-linearity RMS: 0.007 0.006 0.006 0.006 0.006 0.006 0.007 0.005 0.006 0.005 0.006 0.005 0.006 0.006 0.006 0.006
[12:42:33.201] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[12:42:33.219] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[12:42:33.238] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[12:42:33.257] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[12:42:33.276] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[12:42:33.294] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[12:42:33.313] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[12:42:33.332] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[12:42:33.350] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[12:42:33.369] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[12:42:33.387] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[12:42:33.406] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[12:42:33.424] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[12:42:33.442] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[12:42:33.461] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[12:42:33.479] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2050_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[12:42:33.498] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[12:42:33.504] <TB1> INFO: enter test to run
[12:42:33.504] <TB1> INFO: test: exit no parameter change
[12:42:33.995] <TB1> QUIET: Connection to board 153 closed.
[12:42:34.075] <TB1> INFO: pXar: this is the end, my friend