[13:35:33.912] <TB2> INFO: *** Welcome to pxar ***
[13:35:33.912] <TB2> INFO: *** Today: 2015/07/24
[13:35:33.912] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C15.dat
[13:35:33.913] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//tbmParameters_C0b.dat
[13:35:33.913] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//defaultMaskFile.dat
[13:35:33.913] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters_C15.dat
[13:35:33.987] <TB2> INFO: clk: 4
[13:35:33.987] <TB2> INFO: ctr: 4
[13:35:33.987] <TB2> INFO: sda: 19
[13:35:33.987] <TB2> INFO: tin: 9
[13:35:33.987] <TB2> INFO: level: 15
[13:35:33.987] <TB2> INFO: triggerdelay: 0
[13:35:33.987] <TB2> QUIET: Instanciating API for pxar v2.2.5+46~gdbe75a1
[13:35:33.987] <TB2> INFO: Log level: INFO
[13:35:33.995] <TB2> INFO: Found DTB DTB_WXC55Z
[13:35:34.007] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[13:35:34.010] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[13:35:34.013] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[13:35:35.541] <TB2> INFO: DUT info:
[13:35:35.542] <TB2> INFO: The DUT currently contains the following objects:
[13:35:35.542] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:35:35.542] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:35:35.542] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:35:35.542] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:35:35.542] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.542] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:35:35.944] <TB2> INFO: enter 'restricted' command line mode
[13:35:35.944] <TB2> INFO: enter test to run
[13:35:35.944] <TB2> INFO: test: pretest no parameter change
[13:35:35.944] <TB2> INFO: running: pretest
[13:35:35.950] <TB2> INFO: ######################################################################
[13:35:35.950] <TB2> INFO: PixTestPretest::doTest()
[13:35:35.950] <TB2> INFO: ######################################################################
[13:35:35.952] <TB2> INFO: ----------------------------------------------------------------------
[13:35:35.952] <TB2> INFO: PixTestPretest::programROC()
[13:35:35.952] <TB2> INFO: ----------------------------------------------------------------------
[13:35:53.969] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:35:53.969] <TB2> INFO: IA differences per ROC: 16.9 18.5 20.1 16.9 16.9 16.1 17.7 16.9 16.9 17.7 16.1 18.5 18.5 17.7 16.1 16.9
[13:35:54.051] <TB2> INFO: ----------------------------------------------------------------------
[13:35:54.051] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:35:54.051] <TB2> INFO: ----------------------------------------------------------------------
[13:36:13.601] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[13:36:13.604] <TB2> INFO: ----------------------------------------------------------------------
[13:36:13.604] <TB2> INFO: PixTestPretest::findWorkingPixel()
[13:36:13.604] <TB2> INFO: ----------------------------------------------------------------------
[13:36:23.028] <TB2> INFO: Test took 9421ms.
[13:36:23.333] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:36:23.366] <TB2> INFO: ----------------------------------------------------------------------
[13:36:23.366] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[13:36:23.366] <TB2> INFO: ----------------------------------------------------------------------
[13:36:32.328] <TB2> INFO: Test took 8957ms.
[13:36:32.630] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[13:36:32.630] <TB2> INFO: CalDel: 118 127 122 127 126 134 116 123 131 117 115 139 130 132 133 136
[13:36:32.630] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:36:32.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C0.dat
[13:36:32.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C1.dat
[13:36:32.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C2.dat
[13:36:32.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C3.dat
[13:36:32.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C4.dat
[13:36:32.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C5.dat
[13:36:32.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C6.dat
[13:36:32.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C7.dat
[13:36:32.637] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C8.dat
[13:36:32.637] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C9.dat
[13:36:32.637] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C10.dat
[13:36:32.637] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C11.dat
[13:36:32.638] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C12.dat
[13:36:32.638] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C13.dat
[13:36:32.638] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C14.dat
[13:36:32.639] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters_C15.dat
[13:36:32.639] <TB2> INFO: PixTestPretest::doTest() done, duration: 56 seconds
[13:36:32.731] <TB2> INFO: enter test to run
[13:36:32.731] <TB2> INFO: test: fulltest no parameter change
[13:36:32.731] <TB2> INFO: running: fulltest
[13:36:32.731] <TB2> INFO: ######################################################################
[13:36:32.731] <TB2> INFO: PixTestFullTest::doTest()
[13:36:32.731] <TB2> INFO: ######################################################################
[13:36:32.733] <TB2> INFO: ######################################################################
[13:36:32.733] <TB2> INFO: PixTestAlive::doTest()
[13:36:32.733] <TB2> INFO: ######################################################################
[13:36:32.734] <TB2> INFO: ----------------------------------------------------------------------
[13:36:32.734] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:36:32.734] <TB2> INFO: ----------------------------------------------------------------------
[13:36:36.425] <TB2> INFO: Test took 3690ms.
[13:36:36.446] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:36.673] <TB2> INFO: PixTestAlive::aliveTest() done
[13:36:36.673] <TB2> INFO: number of dead pixels (per ROC): 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0
[13:36:36.675] <TB2> INFO: ----------------------------------------------------------------------
[13:36:36.675] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:36:36.675] <TB2> INFO: ----------------------------------------------------------------------
[13:36:39.566] <TB2> INFO: Test took 2889ms.
[13:36:39.570] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:39.570] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:36:39.789] <TB2> INFO: PixTestAlive::maskTest() done
[13:36:39.789] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:36:39.790] <TB2> INFO: ----------------------------------------------------------------------
[13:36:39.790] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:36:39.790] <TB2> INFO: ----------------------------------------------------------------------
[13:36:43.387] <TB2> INFO: Test took 3595ms.
[13:36:43.414] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:43.632] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[13:36:43.632] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:36:43.632] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:36:43.644] <TB2> INFO: ######################################################################
[13:36:43.644] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:36:43.644] <TB2> INFO: ######################################################################
[13:36:43.646] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:36:43.657] <TB2> INFO: dacScan step from 0 .. 29
[13:37:06.986] <TB2> INFO: Test took 23330ms.
[13:37:07.018] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:07.020] <TB2> INFO: dacScan step from 30 .. 59
[13:37:33.129] <TB2> INFO: Test took 26109ms.
[13:37:33.220] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:33.231] <TB2> INFO: dacScan step from 60 .. 89
[13:38:06.601] <TB2> INFO: Test took 33370ms.
[13:38:06.869] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:06.939] <TB2> INFO: dacScan step from 90 .. 119
[13:38:37.831] <TB2> INFO: Test took 30892ms.
[13:38:38.074] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:38.150] <TB2> INFO: dacScan step from 120 .. 149
[13:39:07.384] <TB2> INFO: Test took 29234ms.
[13:39:07.600] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:32.616] <TB2> INFO: PixTestBBMap::doTest() done, duration: 168 seconds
[13:39:32.616] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0
[13:39:32.616] <TB2> INFO: separation cut (per ROC): 79 110 107 97 89 83 103 88 90 84 90 94 90 85 74 79
[13:39:32.714] <TB2> INFO: ######################################################################
[13:39:32.714] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[13:39:32.714] <TB2> INFO: ######################################################################
[13:39:32.714] <TB2> INFO: ----------------------------------------------------------------------
[13:39:32.714] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:39:32.714] <TB2> INFO: ----------------------------------------------------------------------
[13:39:32.714] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:39:32.724] <TB2> INFO: dacScan step from 0 .. 3
[13:39:54.112] <TB2> INFO: Test took 21388ms.
[13:39:54.142] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:54.142] <TB2> INFO: dacScan step from 4 .. 7
[13:40:15.606] <TB2> INFO: Test took 21464ms.
[13:40:15.638] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:15.638] <TB2> INFO: dacScan step from 8 .. 11
[13:40:36.874] <TB2> INFO: Test took 21236ms.
[13:40:36.903] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:36.903] <TB2> INFO: dacScan step from 12 .. 15
[13:40:58.425] <TB2> INFO: Test took 21522ms.
[13:40:58.455] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:58.455] <TB2> INFO: dacScan step from 16 .. 19
[13:41:19.834] <TB2> INFO: Test took 21379ms.
[13:41:19.863] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:19.863] <TB2> INFO: dacScan step from 20 .. 23
[13:41:41.542] <TB2> INFO: Test took 21679ms.
[13:41:41.566] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:41.567] <TB2> INFO: dacScan step from 24 .. 27
[13:42:02.676] <TB2> INFO: Test took 21109ms.
[13:42:02.704] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:02.704] <TB2> INFO: dacScan step from 28 .. 31
[13:42:24.245] <TB2> INFO: Test took 21541ms.
[13:42:24.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:24.278] <TB2> INFO: dacScan step from 32 .. 35
[13:42:45.615] <TB2> INFO: Test took 21337ms.
[13:42:45.645] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:45.645] <TB2> INFO: dacScan step from 36 .. 39
[13:43:07.249] <TB2> INFO: Test took 21604ms.
[13:43:07.275] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:07.275] <TB2> INFO: dacScan step from 40 .. 43
[13:43:28.768] <TB2> INFO: Test took 21493ms.
[13:43:28.796] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:28.796] <TB2> INFO: dacScan step from 44 .. 47
[13:43:50.486] <TB2> INFO: Test took 21690ms.
[13:43:50.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:50.517] <TB2> INFO: dacScan step from 48 .. 51
[13:44:12.242] <TB2> INFO: Test took 21725ms.
[13:44:12.267] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:12.267] <TB2> INFO: dacScan step from 52 .. 55
[13:44:34.371] <TB2> INFO: Test took 22104ms.
[13:44:34.396] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:34.396] <TB2> INFO: dacScan step from 56 .. 59
[13:44:55.921] <TB2> INFO: Test took 21525ms.
[13:44:55.957] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:55.957] <TB2> INFO: dacScan step from 60 .. 63
[13:45:17.406] <TB2> INFO: Test took 21449ms.
[13:45:17.433] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:17.433] <TB2> INFO: dacScan step from 64 .. 67
[13:45:38.865] <TB2> INFO: Test took 21432ms.
[13:45:38.896] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:38.897] <TB2> INFO: dacScan step from 68 .. 71
[13:46:00.086] <TB2> INFO: Test took 21189ms.
[13:46:00.114] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:00.115] <TB2> INFO: dacScan step from 72 .. 75
[13:46:21.763] <TB2> INFO: Test took 21648ms.
[13:46:21.798] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:21.799] <TB2> INFO: dacScan step from 76 .. 79
[13:46:44.420] <TB2> INFO: Test took 22621ms.
[13:46:44.464] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:44.465] <TB2> INFO: dacScan step from 80 .. 83
[13:47:10.079] <TB2> INFO: Test took 25614ms.
[13:47:10.163] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:10.167] <TB2> INFO: dacScan step from 84 .. 87
[13:47:38.203] <TB2> INFO: Test took 28036ms.
[13:47:38.322] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:38.327] <TB2> INFO: dacScan step from 88 .. 91
[13:48:08.329] <TB2> INFO: Test took 30002ms.
[13:48:08.461] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:08.466] <TB2> INFO: dacScan step from 92 .. 95
[13:48:39.984] <TB2> INFO: Test took 31518ms.
[13:48:40.178] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:40.185] <TB2> INFO: dacScan step from 96 .. 99
[13:49:14.087] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:49:14.087] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:49:14.936] <TB2> INFO: Test took 34750ms.
[13:49:15.153] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:15.163] <TB2> INFO: dacScan step from 100 .. 103
[13:49:50.443] <TB2> INFO: Test took 35279ms.
[13:49:50.708] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:50.718] <TB2> INFO: dacScan step from 104 .. 107
[13:50:23.610] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (62) != TBM ID (0)
[13:50:23.610] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[13:50:23.610] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (63)
[13:50:24.995] <TB2> INFO: Test took 34277ms.
[13:50:25.219] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:25.232] <TB2> INFO: dacScan step from 108 .. 111
[13:50:58.062] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:50:58.062] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:50:59.363] <TB2> INFO: Test took 34131ms.
[13:50:59.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:59.635] <TB2> INFO: dacScan step from 112 .. 115
[13:51:32.009] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:51:32.009] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:51:33.245] <TB2> INFO: Test took 33610ms.
[13:51:33.465] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:33.477] <TB2> INFO: dacScan step from 116 .. 119
[13:52:06.158] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:52:06.158] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:52:07.610] <TB2> INFO: Test took 34133ms.
[13:52:07.872] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:07.887] <TB2> INFO: dacScan step from 120 .. 123
[13:52:42.464] <TB2> INFO: Test took 34577ms.
[13:52:42.681] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:42.693] <TB2> INFO: dacScan step from 124 .. 127
[13:53:15.314] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[13:53:15.314] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (195) != TBM ID (196)
[13:53:15.314] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[13:53:15.314] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[13:53:15.314] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:53:16.705] <TB2> INFO: Test took 34012ms.
[13:53:17.004] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:17.017] <TB2> INFO: dacScan step from 128 .. 131
[13:53:48.863] <TB2> INFO: Test took 31846ms.
[13:53:49.077] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:49.089] <TB2> INFO: dacScan step from 132 .. 135
[13:54:21.266] <TB2> INFO: Test took 32176ms.
[13:54:21.505] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:21.517] <TB2> INFO: dacScan step from 136 .. 139
[13:54:55.488] <TB2> INFO: Test took 33971ms.
[13:54:55.738] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:55.751] <TB2> INFO: dacScan step from 140 .. 143
[13:55:30.244] <TB2> INFO: Test took 34493ms.
[13:55:30.479] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:30.494] <TB2> INFO: dacScan step from 144 .. 147
[13:56:04.321] <TB2> INFO: Test took 33827ms.
[13:56:04.559] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:04.572] <TB2> INFO: dacScan step from 148 .. 149
[13:56:22.031] <TB2> INFO: Test took 17459ms.
[13:56:22.223] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:22.234] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:24.416] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:26.489] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:28.584] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:30.607] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:32.190] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:33.690] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:35.044] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:36.426] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:37.779] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:39.194] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:40.553] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:42.054] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:43.588] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:45.256] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:46.784] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:56:48.294] <TB2> INFO: PixTestScurves::scurves() done
[13:56:48.294] <TB2> INFO: Vcal mean: 89.97 112.81 102.60 95.18 99.41 94.30 96.90 83.64 98.41 83.39 96.48 97.44 84.26 92.24 82.88 84.03
[13:56:48.294] <TB2> INFO: Vcal RMS: 5.07 6.61 5.46 6.42 5.47 5.43 6.10 4.54 4.84 5.27 5.91 5.26 4.99 5.65 4.14 4.55
[13:56:48.294] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1035 seconds
[13:56:48.370] <TB2> INFO: ######################################################################
[13:56:48.370] <TB2> INFO: PixTestTrim::doTest()
[13:56:48.370] <TB2> INFO: ######################################################################
[13:56:48.371] <TB2> INFO: ----------------------------------------------------------------------
[13:56:48.371] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:56:48.371] <TB2> INFO: ----------------------------------------------------------------------
[13:56:48.453] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:56:48.453] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:56:48.461] <TB2> INFO: dacScan step from 0 .. 19
[13:57:04.856] <TB2> INFO: Test took 16395ms.
[13:57:04.883] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:04.883] <TB2> INFO: dacScan step from 20 .. 39
[13:57:21.167] <TB2> INFO: Test took 16284ms.
[13:57:21.190] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:21.190] <TB2> INFO: dacScan step from 40 .. 59
[13:57:37.516] <TB2> INFO: Test took 16325ms.
[13:57:37.537] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:37.537] <TB2> INFO: dacScan step from 60 .. 79
[13:57:54.177] <TB2> INFO: Test took 16640ms.
[13:57:54.200] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:54.200] <TB2> INFO: dacScan step from 80 .. 99
[13:58:11.145] <TB2> INFO: Test took 16945ms.
[13:58:11.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:11.194] <TB2> INFO: dacScan step from 100 .. 119
[13:58:33.191] <TB2> INFO: Test took 21997ms.
[13:58:33.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:33.358] <TB2> INFO: dacScan step from 120 .. 139
[13:58:43.858] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 2 Number of ROCs (3) != Token Chain Length (4)
[13:58:44.828] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 2 Number of ROCs (2) != Token Chain Length (4)
[13:58:44.828] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[13:58:44.828] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[13:58:44.828] <TB2> WARNING: Channel 2 ROC 3: Readback start marker after 15 readouts!
[13:58:51.322] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 2 Number of ROCs (2) != Token Chain Length (4)
[13:58:51.322] <TB2> WARNING: Channel 2 ROC 3: Readback start marker after 15 readouts!
[13:58:55.784] <TB2> INFO: Test took 22425ms.
[13:58:55.952] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:55.983] <TB2> INFO: dacScan step from 140 .. 159
[13:59:13.929] <TB2> INFO: Test took 17945ms.
[13:59:14.052] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:36.978] <TB2> INFO: ROC 0 VthrComp = 92
[13:59:36.978] <TB2> INFO: ROC 1 VthrComp = 109
[13:59:36.978] <TB2> INFO: ROC 2 VthrComp = 106
[13:59:36.978] <TB2> INFO: ROC 3 VthrComp = 96
[13:59:36.978] <TB2> INFO: ROC 4 VthrComp = 99
[13:59:36.978] <TB2> INFO: ROC 5 VthrComp = 96
[13:59:36.978] <TB2> INFO: ROC 6 VthrComp = 101
[13:59:36.978] <TB2> INFO: ROC 7 VthrComp = 90
[13:59:36.979] <TB2> INFO: ROC 8 VthrComp = 103
[13:59:36.979] <TB2> INFO: ROC 9 VthrComp = 87
[13:59:36.979] <TB2> INFO: ROC 10 VthrComp = 96
[13:59:36.979] <TB2> INFO: ROC 11 VthrComp = 103
[13:59:36.979] <TB2> INFO: ROC 12 VthrComp = 92
[13:59:36.979] <TB2> INFO: ROC 13 VthrComp = 96
[13:59:36.979] <TB2> INFO: ROC 14 VthrComp = 86
[13:59:36.979] <TB2> INFO: ROC 15 VthrComp = 87
[13:59:36.979] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:59:36.979] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:59:36.987] <TB2> INFO: dacScan step from 0 .. 19
[13:59:52.569] <TB2> INFO: Test took 15581ms.
[13:59:52.590] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:52.590] <TB2> INFO: dacScan step from 20 .. 39
[14:00:09.057] <TB2> INFO: Test took 16467ms.
[14:00:09.089] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:09.092] <TB2> INFO: dacScan step from 40 .. 59
[14:00:30.922] <TB2> INFO: Test took 21830ms.
[14:00:31.080] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:31.126] <TB2> INFO: dacScan step from 60 .. 79
[14:00:54.148] <TB2> INFO: Test took 23022ms.
[14:00:54.313] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:54.365] <TB2> INFO: dacScan step from 80 .. 99
[14:01:17.136] <TB2> INFO: Test took 22772ms.
[14:01:17.318] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:17.369] <TB2> INFO: dacScan step from 100 .. 119
[14:01:39.904] <TB2> INFO: Test took 22535ms.
[14:01:40.079] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:40.133] <TB2> INFO: dacScan step from 120 .. 139
[14:02:02.782] <TB2> INFO: Test took 22649ms.
[14:02:02.944] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:03.001] <TB2> INFO: dacScan step from 140 .. 159
[14:02:25.841] <TB2> INFO: Test took 22840ms.
[14:02:26.016] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:52.990] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 57.5567 for pixel 51/0 mean/min/max = 45.5277/33.4582/57.5973
[14:02:52.990] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 68.9892 for pixel 3/19 mean/min/max = 52.249/35.3696/69.1284
[14:02:52.991] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 60.1983 for pixel 1/79 mean/min/max = 47.467/34.6787/60.2553
[14:02:52.991] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 60.2319 for pixel 0/70 mean/min/max = 45.7973/31.1764/60.4182
[14:02:52.991] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 58.657 for pixel 23/2 mean/min/max = 45.5367/32.3021/58.7712
[14:02:52.991] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.3856 for pixel 27/4 mean/min/max = 45.7811/31.7292/59.833
[14:02:52.992] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.6791 for pixel 7/77 mean/min/max = 46.0074/31.1841/60.8307
[14:02:52.992] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 56.9293 for pixel 0/12 mean/min/max = 45.2065/33.4111/57.0018
[14:02:52.992] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 56.5532 for pixel 6/2 mean/min/max = 44.8164/32.8468/56.786
[14:02:52.993] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 57.7848 for pixel 27/77 mean/min/max = 45.0011/32.1288/57.8734
[14:02:52.993] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.2784 for pixel 18/7 mean/min/max = 45.5788/32.5244/58.6332
[14:02:52.993] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 56.3705 for pixel 0/78 mean/min/max = 44.5359/32.4948/56.5769
[14:02:52.994] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 56.3415 for pixel 6/76 mean/min/max = 44.6434/32.7604/56.5265
[14:02:52.994] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 57.5868 for pixel 0/78 mean/min/max = 44.595/31.5448/57.6451
[14:02:52.995] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 55.6608 for pixel 25/67 mean/min/max = 44.3044/32.9282/55.6805
[14:02:52.995] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 55.9396 for pixel 51/64 mean/min/max = 44.4711/32.9945/55.9478
[14:02:52.995] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:04:43.991] <TB2> INFO: Test took 110996ms.
[14:04:45.582] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:04:45.591] <TB2> INFO: dacScan step from 0 .. 19
[14:05:11.235] <TB2> INFO: Test took 25644ms.
[14:05:11.285] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:11.287] <TB2> INFO: dacScan step from 20 .. 39
[14:05:44.460] <TB2> INFO: Test took 33173ms.
[14:05:44.740] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:44.772] <TB2> INFO: dacScan step from 40 .. 59
[14:06:21.207] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (198) != TBM ID (0)
[14:06:21.208] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[14:06:21.208] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (199)
[14:06:22.624] <TB2> INFO: Test took 37852ms.
[14:06:22.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:22.985] <TB2> INFO: dacScan step from 60 .. 79
[14:06:57.925] <TB2> INFO: Test took 34940ms.
[14:06:58.380] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:58.445] <TB2> INFO: dacScan step from 80 .. 99
[14:07:34.861] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[14:07:34.861] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:07:36.196] <TB2> INFO: Test took 37751ms.
[14:07:36.472] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:36.519] <TB2> INFO: dacScan step from 100 .. 119
[14:08:11.584] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (195) != TBM ID (0)
[14:08:11.584] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[14:08:11.584] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (196)
[14:08:13.042] <TB2> INFO: Test took 36523ms.
[14:08:13.311] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:13.356] <TB2> INFO: dacScan step from 120 .. 139
[14:08:49.354] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[14:08:49.354] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:08:50.604] <TB2> INFO: Test took 37247ms.
[14:08:50.868] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:50.925] <TB2> INFO: dacScan step from 140 .. 159
[14:09:27.521] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[14:09:27.521] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:09:28.883] <TB2> INFO: Test took 37958ms.
[14:09:29.180] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:29.238] <TB2> INFO: dacScan step from 160 .. 179
[14:10:04.260] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[14:10:04.261] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:10:05.734] <TB2> INFO: Test took 36496ms.
[14:10:06.048] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:06.106] <TB2> INFO: dacScan step from 180 .. 199
[14:10:41.673] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[14:10:41.673] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:10:43.108] <TB2> INFO: Test took 37002ms.
[14:10:43.557] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:09.128] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.031817 .. 255.000000
[14:11:09.203] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:11:09.211] <TB2> INFO: dacScan step from 0 .. 19
[14:11:23.846] <TB2> INFO: Test took 14635ms.
[14:11:23.870] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:23.870] <TB2> INFO: dacScan step from 20 .. 39
[14:11:40.327] <TB2> INFO: Test took 16457ms.
[14:11:40.410] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:40.432] <TB2> INFO: dacScan step from 40 .. 59
[14:11:59.492] <TB2> INFO: Test took 19060ms.
[14:11:59.644] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:59.697] <TB2> INFO: dacScan step from 60 .. 79
[14:12:18.901] <TB2> INFO: Test took 19204ms.
[14:12:19.054] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:19.110] <TB2> INFO: dacScan step from 80 .. 99
[14:12:39.013] <TB2> INFO: Test took 19903ms.
[14:12:39.172] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:39.230] <TB2> INFO: dacScan step from 100 .. 119
[14:12:57.659] <TB2> INFO: Test took 18429ms.
[14:12:57.830] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:57.891] <TB2> INFO: dacScan step from 120 .. 139
[14:13:17.733] <TB2> INFO: Test took 19842ms.
[14:13:17.907] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:17.958] <TB2> INFO: dacScan step from 140 .. 159
[14:13:37.671] <TB2> INFO: Test took 19713ms.
[14:13:37.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:37.877] <TB2> INFO: dacScan step from 160 .. 179
[14:13:56.661] <TB2> INFO: Test took 18784ms.
[14:13:56.806] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:56.856] <TB2> INFO: dacScan step from 180 .. 199
[14:14:17.742] <TB2> INFO: Test took 20886ms.
[14:14:17.896] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:17.951] <TB2> INFO: dacScan step from 200 .. 219
[14:14:37.623] <TB2> INFO: Test took 19672ms.
[14:14:37.851] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:37.926] <TB2> INFO: dacScan step from 220 .. 239
[14:14:56.941] <TB2> INFO: Test took 19015ms.
[14:14:57.089] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:57.147] <TB2> INFO: dacScan step from 240 .. 255
[14:15:12.719] <TB2> INFO: Test took 15572ms.
[14:15:12.837] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:44.341] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 16.688304 .. 80.802289
[14:15:44.419] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 6 .. 90 (20) hits flags = 16 (plus default)
[14:15:44.427] <TB2> INFO: dacScan step from 6 .. 25
[14:15:59.052] <TB2> INFO: Test took 14625ms.
[14:15:59.076] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:59.076] <TB2> INFO: dacScan step from 26 .. 45
[14:16:16.868] <TB2> INFO: Test took 17792ms.
[14:16:16.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:17.027] <TB2> INFO: dacScan step from 46 .. 65
[14:16:35.884] <TB2> INFO: Test took 18857ms.
[14:16:36.025] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:36.080] <TB2> INFO: dacScan step from 66 .. 85
[14:16:54.530] <TB2> INFO: Test took 18450ms.
[14:16:54.677] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:54.733] <TB2> INFO: dacScan step from 86 .. 90
[14:17:01.843] <TB2> INFO: Test took 7109ms.
[14:17:01.883] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:22.928] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 17.859479 .. 40.866863
[14:17:23.005] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 50 (20) hits flags = 16 (plus default)
[14:17:23.014] <TB2> INFO: dacScan step from 7 .. 26
[14:17:37.670] <TB2> INFO: Test took 14656ms.
[14:17:37.696] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:37.696] <TB2> INFO: dacScan step from 27 .. 46
[14:17:55.816] <TB2> INFO: Test took 18120ms.
[14:17:55.949] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:55.997] <TB2> INFO: dacScan step from 47 .. 50
[14:18:02.136] <TB2> INFO: Test took 6139ms.
[14:18:02.168] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:17.983] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.904544 .. 38.649204
[14:18:18.064] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 48 (20) hits flags = 16 (plus default)
[14:18:18.073] <TB2> INFO: dacScan step from 1 .. 20
[14:18:32.192] <TB2> INFO: Test took 14119ms.
[14:18:32.212] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:32.213] <TB2> INFO: dacScan step from 21 .. 40
[14:18:48.055] <TB2> INFO: Test took 15842ms.
[14:18:48.163] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:48.197] <TB2> INFO: dacScan step from 41 .. 48
[14:18:58.016] <TB2> INFO: Test took 9819ms.
[14:18:58.076] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:14.320] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:19:14.320] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:19:14.327] <TB2> INFO: dacScan step from 15 .. 34
[14:19:39.679] <TB2> INFO: Test took 25351ms.
[14:19:39.742] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:39.753] <TB2> INFO: dacScan step from 35 .. 54
[14:20:15.913] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[14:20:15.913] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (20) != TBM ID (21)
[14:20:15.913] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[14:20:15.913] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[14:20:15.913] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:20:16.910] <TB2> INFO: Test took 37157ms.
[14:20:17.275] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:17.327] <TB2> INFO: dacScan step from 55 .. 55
[14:20:21.898] <TB2> INFO: Test took 4571ms.
[14:20:21.914] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:35.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:20:35.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:20:35.366] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:20:35.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:20:35.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:20:35.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:20:35.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:20:35.367] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:20:35.367] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C0.dat
[14:20:35.375] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C1.dat
[14:20:35.380] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C2.dat
[14:20:35.386] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C3.dat
[14:20:35.392] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C4.dat
[14:20:35.398] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C5.dat
[14:20:35.404] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C6.dat
[14:20:35.410] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C7.dat
[14:20:35.416] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C8.dat
[14:20:35.422] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C9.dat
[14:20:35.428] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C10.dat
[14:20:35.434] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C11.dat
[14:20:35.440] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C12.dat
[14:20:35.446] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C13.dat
[14:20:35.452] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C14.dat
[14:20:35.458] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//trimParameters35_C15.dat
[14:20:35.464] <TB2> INFO: PixTestTrim::trimTest() done
[14:20:35.464] <TB2> INFO: vtrim: 151 151 132 111 114 113 122 108 114 110 114 100 110 107 107 104
[14:20:35.464] <TB2> INFO: vthrcomp: 92 109 106 96 99 96 101 90 103 87 96 103 92 96 86 87
[14:20:35.464] <TB2> INFO: vcal mean: 35.03 35.10 35.06 35.03 35.08 35.09 35.09 35.07 35.09 35.05 35.08 35.07 35.05 35.04 35.06 35.08
[14:20:35.464] <TB2> INFO: vcal RMS: 1.59 1.28 0.98 1.09 1.11 1.11 1.04 0.95 1.06 1.03 1.13 1.01 0.97 1.10 0.97 1.05
[14:20:35.464] <TB2> INFO: bits mean: 11.59 8.50 9.03 9.39 10.00 9.83 9.63 9.48 10.20 10.02 10.02 9.87 10.08 10.01 10.28 10.22
[14:20:35.464] <TB2> INFO: bits RMS: 1.61 2.26 2.44 2.91 2.42 2.64 2.76 2.57 2.34 2.53 2.41 2.58 2.41 2.59 2.28 2.34
[14:20:35.471] <TB2> INFO: ----------------------------------------------------------------------
[14:20:35.471] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[14:20:35.471] <TB2> INFO: ----------------------------------------------------------------------
[14:20:35.473] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:20:35.483] <TB2> INFO: dacScan step from 0 .. 19
[14:21:00.614] <TB2> INFO: Test took 25131ms.
[14:21:00.651] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:00.651] <TB2> INFO: dacScan step from 20 .. 39
[14:21:24.648] <TB2> INFO: Test took 23997ms.
[14:21:24.683] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:24.683] <TB2> INFO: dacScan step from 40 .. 59
[14:21:49.022] <TB2> INFO: Test took 24339ms.
[14:21:49.056] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:49.056] <TB2> INFO: dacScan step from 60 .. 79
[14:22:14.367] <TB2> INFO: Test took 25310ms.
[14:22:14.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:14.409] <TB2> INFO: dacScan step from 80 .. 99
[14:22:39.765] <TB2> INFO: Test took 25355ms.
[14:22:39.806] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:39.807] <TB2> INFO: dacScan step from 100 .. 119
[14:23:10.896] <TB2> INFO: Test took 31089ms.
[14:23:11.051] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:11.067] <TB2> INFO: dacScan step from 120 .. 139
[14:23:47.717] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[14:23:47.717] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:23:48.576] <TB2> INFO: Test took 37509ms.
[14:23:48.849] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:48.888] <TB2> INFO: dacScan step from 140 .. 159
[14:24:24.306] <TB2> INFO: Test took 35418ms.
[14:24:24.592] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:24.641] <TB2> INFO: dacScan step from 160 .. 179
[14:25:02.503] <TB2> INFO: Test took 37862ms.
[14:25:02.782] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:02.836] <TB2> INFO: dacScan step from 180 .. 199
[14:25:41.573] <TB2> INFO: Test took 38736ms.
[14:25:41.851] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:07.841] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 187 (20) hits flags = 16 (plus default)
[14:26:07.849] <TB2> INFO: dacScan step from 0 .. 19
[14:26:33.590] <TB2> INFO: Test took 25741ms.
[14:26:33.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:33.631] <TB2> INFO: dacScan step from 20 .. 39
[14:26:58.946] <TB2> INFO: Test took 25315ms.
[14:26:58.981] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:58.981] <TB2> INFO: dacScan step from 40 .. 59
[14:27:24.569] <TB2> INFO: Test took 25588ms.
[14:27:24.607] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:24.607] <TB2> INFO: dacScan step from 60 .. 79
[14:27:49.689] <TB2> INFO: Test took 25082ms.
[14:27:49.728] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:49.728] <TB2> INFO: dacScan step from 80 .. 99
[14:28:14.921] <TB2> INFO: Test took 25193ms.
[14:28:14.992] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:14.996] <TB2> INFO: dacScan step from 100 .. 119
[14:28:49.335] <TB2> INFO: Test took 34339ms.
[14:28:49.579] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:49.605] <TB2> INFO: dacScan step from 120 .. 139
[14:29:26.881] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[14:29:26.881] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:29:28.182] <TB2> INFO: Test took 38576ms.
[14:29:28.456] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:28.507] <TB2> INFO: dacScan step from 140 .. 159
[14:30:05.336] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[14:30:06.798] <TB2> INFO: Test took 38291ms.
[14:30:07.093] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:07.148] <TB2> INFO: dacScan step from 160 .. 179
[14:30:42.124] <TB2> INFO: Test took 34976ms.
[14:30:42.451] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:42.504] <TB2> INFO: dacScan step from 180 .. 187
[14:30:58.593] <TB2> INFO: Test took 16089ms.
[14:30:58.773] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:26.908] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 175 (20) hits flags = 16 (plus default)
[14:31:26.917] <TB2> INFO: dacScan step from 0 .. 19
[14:31:51.315] <TB2> INFO: Test took 24398ms.
[14:31:51.348] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:51.348] <TB2> INFO: dacScan step from 20 .. 39
[14:32:15.496] <TB2> INFO: Test took 24148ms.
[14:32:15.532] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:15.532] <TB2> INFO: dacScan step from 40 .. 59
[14:32:41.012] <TB2> INFO: Test took 25480ms.
[14:32:41.047] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:41.047] <TB2> INFO: dacScan step from 60 .. 79
[14:33:06.705] <TB2> INFO: Test took 25658ms.
[14:33:06.740] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:06.740] <TB2> INFO: dacScan step from 80 .. 99
[14:33:33.045] <TB2> INFO: Test took 26305ms.
[14:33:33.117] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:33.121] <TB2> INFO: dacScan step from 100 .. 119
[14:34:06.862] <TB2> INFO: Test took 33741ms.
[14:34:07.080] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:07.104] <TB2> INFO: dacScan step from 120 .. 139
[14:34:42.558] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[14:34:42.562] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (247) != TBM ID (248)
[14:34:42.563] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[14:34:42.563] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[14:34:42.563] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:34:43.783] <TB2> INFO: Test took 36679ms.
[14:34:44.069] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:44.125] <TB2> INFO: dacScan step from 140 .. 159
[14:35:17.797] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[14:35:19.083] <TB2> INFO: Test took 34957ms.
[14:35:19.363] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:19.409] <TB2> INFO: dacScan step from 160 .. 175
[14:35:48.312] <TB2> INFO: Test took 28903ms.
[14:35:48.582] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:13.539] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 176 (20) hits flags = 16 (plus default)
[14:36:13.546] <TB2> INFO: dacScan step from 0 .. 19
[14:36:38.754] <TB2> INFO: Test took 25207ms.
[14:36:38.790] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:38.790] <TB2> INFO: dacScan step from 20 .. 39
[14:37:04.149] <TB2> INFO: Test took 25359ms.
[14:37:04.185] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:04.185] <TB2> INFO: dacScan step from 40 .. 59
[14:37:29.249] <TB2> INFO: Test took 25064ms.
[14:37:29.282] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:29.282] <TB2> INFO: dacScan step from 60 .. 79
[14:37:54.299] <TB2> INFO: Test took 25017ms.
[14:37:54.332] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:54.332] <TB2> INFO: dacScan step from 80 .. 99
[14:38:19.510] <TB2> INFO: Test took 25178ms.
[14:38:19.572] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:19.576] <TB2> INFO: dacScan step from 100 .. 119
[14:38:54.578] <TB2> INFO: Test took 35002ms.
[14:38:54.832] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:54.860] <TB2> INFO: dacScan step from 120 .. 139
[14:39:31.480] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (246) != TBM ID (0)
[14:39:31.480] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[14:39:31.480] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (247)
[14:39:32.805] <TB2> INFO: Test took 37945ms.
[14:39:33.109] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:33.159] <TB2> INFO: dacScan step from 140 .. 159
[14:40:09.713] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[14:40:11.074] <TB2> INFO: Test took 37915ms.
[14:40:11.377] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:11.441] <TB2> INFO: dacScan step from 160 .. 176
[14:40:44.533] <TB2> INFO: Test took 33092ms.
[14:40:44.818] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:11.477] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 175 (20) hits flags = 16 (plus default)
[14:41:11.485] <TB2> INFO: dacScan step from 0 .. 19
[14:41:36.900] <TB2> INFO: Test took 25415ms.
[14:41:36.933] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:36.933] <TB2> INFO: dacScan step from 20 .. 39
[14:42:00.899] <TB2> INFO: Test took 23966ms.
[14:42:00.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:00.931] <TB2> INFO: dacScan step from 40 .. 59
[14:42:25.758] <TB2> INFO: Test took 24827ms.
[14:42:25.793] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:25.793] <TB2> INFO: dacScan step from 60 .. 79
[14:42:50.812] <TB2> INFO: Test took 25019ms.
[14:42:50.849] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:50.849] <TB2> INFO: dacScan step from 80 .. 99
[14:43:17.169] <TB2> INFO: Test took 26320ms.
[14:43:17.239] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:17.244] <TB2> INFO: dacScan step from 100 .. 119
[14:43:52.179] <TB2> INFO: Test took 34935ms.
[14:43:52.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:52.434] <TB2> INFO: dacScan step from 120 .. 139
[14:44:29.455] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[14:44:29.456] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[14:44:30.861] <TB2> INFO: Test took 38427ms.
[14:44:31.247] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:31.303] <TB2> INFO: dacScan step from 140 .. 159
[14:45:07.700] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[14:45:09.152] <TB2> INFO: Test took 37849ms.
[14:45:09.468] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:09.520] <TB2> INFO: dacScan step from 160 .. 175
[14:45:40.729] <TB2> INFO: Test took 31209ms.
[14:45:40.960] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:07.485] <TB2> INFO: PixTestTrim::trimBitTest() done
[14:46:07.486] <TB2> INFO: PixTestTrim::doTest() done, duration: 2959 seconds
[14:46:08.150] <TB2> INFO: ######################################################################
[14:46:08.150] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:46:08.150] <TB2> INFO: ######################################################################
[14:46:11.837] <TB2> INFO: Test took 3686ms.
[14:46:11.862] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:15.730] <TB2> INFO: Test took 3670ms.
[14:46:15.798] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:19.331] <TB2> INFO: Test took 3523ms.
[14:46:19.401] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:19.410] <TB2> INFO: The DUT currently contains the following objects:
[14:46:19.410] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:19.410] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:19.410] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:19.410] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:19.410] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.410] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.410] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.410] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.410] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.410] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.410] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:19.411] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.512] <TB2> INFO: Test took 1101ms.
[14:46:20.513] <TB2> INFO: The DUT currently contains the following objects:
[14:46:20.513] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:20.513] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:20.513] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:20.513] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:20.513] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:20.513] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.628] <TB2> INFO: Test took 1115ms.
[14:46:21.628] <TB2> INFO: The DUT currently contains the following objects:
[14:46:21.629] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:21.629] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:21.629] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:21.629] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:21.629] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:21.629] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.744] <TB2> INFO: Test took 1115ms.
[14:46:22.745] <TB2> INFO: The DUT currently contains the following objects:
[14:46:22.798] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:22.798] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:22.798] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:22.798] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:22.798] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:22.798] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.860] <TB2> INFO: Test took 1062ms.
[14:46:23.860] <TB2> INFO: The DUT currently contains the following objects:
[14:46:23.860] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:23.860] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:23.860] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:23.860] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:23.860] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.860] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.860] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.860] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.860] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.860] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.860] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:23.861] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.976] <TB2> INFO: Test took 1115ms.
[14:46:24.977] <TB2> INFO: The DUT currently contains the following objects:
[14:46:24.977] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:24.977] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:24.977] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:24.977] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:24.977] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:24.977] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.093] <TB2> INFO: Test took 1116ms.
[14:46:26.094] <TB2> INFO: The DUT currently contains the following objects:
[14:46:26.094] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:26.094] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:26.094] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:26.094] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:26.094] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.094] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.095] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.095] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.095] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:26.095] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: Test took 1101ms.
[14:46:27.196] <TB2> INFO: The DUT currently contains the following objects:
[14:46:27.196] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:27.196] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:27.196] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:27.196] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:27.196] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:27.196] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.297] <TB2> INFO: Test took 1101ms.
[14:46:28.298] <TB2> INFO: The DUT currently contains the following objects:
[14:46:28.298] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:28.298] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:28.298] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:28.298] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:28.298] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:28.298] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.399] <TB2> INFO: Test took 1101ms.
[14:46:29.400] <TB2> INFO: The DUT currently contains the following objects:
[14:46:29.400] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:29.400] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:29.400] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:29.400] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:29.400] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:29.400] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.501] <TB2> INFO: Test took 1101ms.
[14:46:30.502] <TB2> INFO: The DUT currently contains the following objects:
[14:46:30.502] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:30.502] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:30.502] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:30.502] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:30.502] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:30.502] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.602] <TB2> INFO: Test took 1100ms.
[14:46:31.603] <TB2> INFO: The DUT currently contains the following objects:
[14:46:31.603] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:31.603] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:31.603] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:31.603] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:31.603] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.603] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.604] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.604] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.604] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.604] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.604] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:31.604] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: Test took 1115ms.
[14:46:32.719] <TB2> INFO: The DUT currently contains the following objects:
[14:46:32.719] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:32.719] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:32.719] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:32.719] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:32.719] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:32.719] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: Test took 1115ms.
[14:46:33.834] <TB2> INFO: The DUT currently contains the following objects:
[14:46:33.834] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:33.834] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:33.834] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:33.834] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:33.834] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:33.834] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.965] <TB2> INFO: Test took 1131ms.
[14:46:34.966] <TB2> INFO: The DUT currently contains the following objects:
[14:46:34.966] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:34.966] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:34.966] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:34.966] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:34.966] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.966] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.967] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.967] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.967] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:34.967] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.095] <TB2> INFO: Test took 1128ms.
[14:46:36.096] <TB2> INFO: The DUT currently contains the following objects:
[14:46:36.096] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:46:36.096] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:46:36.096] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:46:36.096] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:46:36.096] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:36.096] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:46:37.225] <TB2> INFO: Test took 1129ms.
[14:46:37.227] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:51:05.019] <TB2> INFO: Test took 267792ms.
[14:51:06.784] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:20.442] <TB2> INFO: Test took 253658ms.
[14:55:21.930] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:21.937] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:21.943] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:55:21.951] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:55:21.957] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:55:21.963] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:21.970] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:21.976] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:21.982] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:21.989] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:55:21.995] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:55:22.002] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.008] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.015] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.022] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.028] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.035] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.041] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.047] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.054] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:55:22.060] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:55:22.066] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:55:22.073] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.079] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:55:22.112] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:55:22.113] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:55:22.113] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:55:22.113] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:55:22.113] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:55:22.113] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:55:22.113] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:55:22.113] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:55:22.113] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:55:22.114] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:55:22.114] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:55:22.114] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:55:22.114] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:55:22.114] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:55:22.114] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:55:22.115] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:55:25.657] <TB2> INFO: Test took 3540ms.
[14:55:29.454] <TB2> INFO: Test took 3533ms.
[14:55:33.261] <TB2> INFO: Test took 3541ms.
[14:55:33.531] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:34.457] <TB2> INFO: Test took 926ms.
[14:55:34.459] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:35.561] <TB2> INFO: Test took 1102ms.
[14:55:35.563] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:36.679] <TB2> INFO: Test took 1116ms.
[14:55:36.681] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:37.797] <TB2> INFO: Test took 1116ms.
[14:55:37.799] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:38.916] <TB2> INFO: Test took 1117ms.
[14:55:38.918] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:40.033] <TB2> INFO: Test took 1115ms.
[14:55:40.035] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:41.136] <TB2> INFO: Test took 1101ms.
[14:55:41.138] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:42.269] <TB2> INFO: Test took 1131ms.
[14:55:42.271] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:43.386] <TB2> INFO: Test took 1115ms.
[14:55:43.388] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:44.504] <TB2> INFO: Test took 1116ms.
[14:55:44.506] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:45.621] <TB2> INFO: Test took 1115ms.
[14:55:45.623] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:46.755] <TB2> INFO: Test took 1132ms.
[14:55:46.757] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:47.858] <TB2> INFO: Test took 1102ms.
[14:55:47.860] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:48.991] <TB2> INFO: Test took 1131ms.
[14:55:48.993] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:50.094] <TB2> INFO: Test took 1101ms.
[14:55:50.096] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:51.197] <TB2> INFO: Test took 1101ms.
[14:55:51.199] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:52.343] <TB2> INFO: Test took 1144ms.
[14:55:52.345] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:53.461] <TB2> INFO: Test took 1116ms.
[14:55:53.463] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:54.579] <TB2> INFO: Test took 1116ms.
[14:55:54.581] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:55.683] <TB2> INFO: Test took 1102ms.
[14:55:55.685] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:56.801] <TB2> INFO: Test took 1116ms.
[14:55:56.803] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:57.905] <TB2> INFO: Test took 1102ms.
[14:55:57.907] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:59.023] <TB2> INFO: Test took 1116ms.
[14:55:59.025] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:00.127] <TB2> INFO: Test took 1102ms.
[14:56:00.129] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:01.259] <TB2> INFO: Test took 1130ms.
[14:56:01.261] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:02.377] <TB2> INFO: Test took 1116ms.
[14:56:02.379] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:03.495] <TB2> INFO: Test took 1116ms.
[14:56:03.497] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:04.600] <TB2> INFO: Test took 1103ms.
[14:56:04.602] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:05.746] <TB2> INFO: Test took 1145ms.
[14:56:05.748] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:06.879] <TB2> INFO: Test took 1131ms.
[14:56:06.881] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:07.998] <TB2> INFO: Test took 1117ms.
[14:56:08.000] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:09.116] <TB2> INFO: Test took 1116ms.
[14:56:09.624] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 601 seconds
[14:56:09.624] <TB2> INFO: PH scale (per ROC): 78 80 82 78 67 80 80 80 76 84 75 79 85 64 82 79
[14:56:09.624] <TB2> INFO: PH offset (per ROC): 182 176 179 172 188 182 176 166 176 147 171 187 150 176 157 158
[14:56:09.788] <TB2> INFO: ######################################################################
[14:56:09.788] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:56:09.788] <TB2> INFO: ######################################################################
[14:56:09.797] <TB2> INFO: scanning low vcal = 10
[14:56:13.655] <TB2> INFO: Test took 3858ms.
[14:56:13.658] <TB2> INFO: scanning low vcal = 20
[14:56:17.555] <TB2> INFO: Test took 3897ms.
[14:56:17.558] <TB2> INFO: scanning low vcal = 30
[14:56:21.514] <TB2> INFO: Test took 3956ms.
[14:56:21.521] <TB2> INFO: scanning low vcal = 40
[14:56:26.103] <TB2> INFO: Test took 4582ms.
[14:56:26.158] <TB2> INFO: scanning low vcal = 50
[14:56:30.748] <TB2> INFO: Test took 4590ms.
[14:56:30.802] <TB2> INFO: scanning low vcal = 60
[14:56:35.295] <TB2> INFO: Test took 4493ms.
[14:56:35.347] <TB2> INFO: scanning low vcal = 70
[14:56:39.825] <TB2> INFO: Test took 4477ms.
[14:56:39.879] <TB2> INFO: scanning low vcal = 80
[14:56:44.325] <TB2> INFO: Test took 4446ms.
[14:56:44.380] <TB2> INFO: scanning low vcal = 90
[14:56:48.787] <TB2> INFO: Test took 4407ms.
[14:56:48.842] <TB2> INFO: scanning low vcal = 100
[14:56:53.406] <TB2> INFO: Test took 4563ms.
[14:56:53.461] <TB2> INFO: scanning low vcal = 110
[14:56:57.928] <TB2> INFO: Test took 4467ms.
[14:56:57.983] <TB2> INFO: scanning low vcal = 120
[14:57:02.602] <TB2> INFO: Test took 4619ms.
[14:57:02.657] <TB2> INFO: scanning low vcal = 130
[14:57:07.235] <TB2> INFO: Test took 4578ms.
[14:57:07.290] <TB2> INFO: scanning low vcal = 140
[14:57:11.764] <TB2> INFO: Test took 4474ms.
[14:57:11.818] <TB2> INFO: scanning low vcal = 150
[14:57:16.222] <TB2> INFO: Test took 4404ms.
[14:57:16.278] <TB2> INFO: scanning low vcal = 160
[14:57:20.771] <TB2> INFO: Test took 4493ms.
[14:57:20.827] <TB2> INFO: scanning low vcal = 170
[14:57:25.355] <TB2> INFO: Test took 4528ms.
[14:57:25.412] <TB2> INFO: scanning low vcal = 180
[14:57:29.916] <TB2> INFO: Test took 4504ms.
[14:57:29.972] <TB2> INFO: scanning low vcal = 190
[14:57:34.535] <TB2> INFO: Test took 4563ms.
[14:57:34.589] <TB2> INFO: scanning low vcal = 200
[14:57:38.977] <TB2> INFO: Test took 4388ms.
[14:57:39.031] <TB2> INFO: scanning low vcal = 210
[14:57:43.565] <TB2> INFO: Test took 4534ms.
[14:57:43.618] <TB2> INFO: scanning low vcal = 220
[14:57:48.155] <TB2> INFO: Test took 4537ms.
[14:57:48.211] <TB2> INFO: scanning low vcal = 230
[14:57:52.598] <TB2> INFO: Test took 4387ms.
[14:57:52.652] <TB2> INFO: scanning low vcal = 240
[14:57:57.040] <TB2> INFO: Test took 4388ms.
[14:57:57.098] <TB2> INFO: scanning low vcal = 250
[14:58:01.608] <TB2> INFO: Test took 4510ms.
[14:58:01.664] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:58:06.128] <TB2> INFO: Test took 4464ms.
[14:58:06.182] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:58:10.789] <TB2> INFO: Test took 4607ms.
[14:58:10.846] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:58:15.296] <TB2> INFO: Test took 4450ms.
[14:58:15.351] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:58:19.930] <TB2> INFO: Test took 4579ms.
[14:58:19.991] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:58:24.524] <TB2> INFO: Test took 4533ms.
[14:58:25.005] <TB2> INFO: PixTestGainPedestal::measure() done
[14:58:55.571] <TB2> INFO: PixTestGainPedestal::fit() done
[14:58:55.571] <TB2> INFO: non-linearity mean: 0.945 0.958 0.954 0.950 0.957 0.961 0.955 0.962 0.962 0.958 0.953 0.955 0.957 0.960 0.959 0.956
[14:58:55.571] <TB2> INFO: non-linearity RMS: 0.008 0.005 0.007 0.008 0.007 0.005 0.006 0.006 0.005 0.005 0.008 0.007 0.006 0.005 0.006 0.006
[14:58:55.571] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[14:58:55.591] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[14:58:55.610] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[14:58:55.629] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[14:58:55.649] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[14:58:55.668] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[14:58:55.688] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[14:58:55.707] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[14:58:55.726] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[14:58:55.746] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[14:58:55.765] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[14:58:55.785] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[14:58:55.804] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[14:58:55.823] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[14:58:55.843] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[14:58:55.862] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2048_FullQualification_2015-07-24_10h42m_1437727338//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[14:58:55.881] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 166 seconds
[14:58:55.887] <TB2> INFO: enter test to run
[14:58:55.887] <TB2> INFO: test: exit no parameter change
[14:58:56.330] <TB2> QUIET: Connection to board 156 closed.
[14:58:56.409] <TB2> INFO: pXar: this is the end, my friend