[10:21:17.601] <TB0> INFO: *** Welcome to pxar ***
[10:21:17.601] <TB0> INFO: *** Today: 2015/08/17
[10:21:17.601] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C15.dat
[10:21:17.601] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//tbmParameters_C0b.dat
[10:21:17.601] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//defaultMaskFile.dat
[10:21:17.601] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters_C15.dat
[10:21:17.665] <TB0> INFO: clk: 4
[10:21:17.665] <TB0> INFO: ctr: 4
[10:21:17.665] <TB0> INFO: sda: 19
[10:21:17.665] <TB0> INFO: tin: 9
[10:21:17.665] <TB0> INFO: level: 15
[10:21:17.665] <TB0> INFO: triggerdelay: 0
[10:21:17.665] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[10:21:17.665] <TB0> INFO: Log level: INFO
[10:21:17.673] <TB0> INFO: Found DTB DTB_WWVASW
[10:21:17.692] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[10:21:17.695] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[10:21:17.698] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[10:21:19.211] <TB0> INFO: DUT info:
[10:21:19.211] <TB0> INFO: The DUT currently contains the following objects:
[10:21:19.211] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:21:19.211] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:21:19.212] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:21:19.212] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:21:19.212] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.212] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:19.613] <TB0> INFO: enter 'restricted' command line mode
[10:21:19.613] <TB0> INFO: enter test to run
[10:21:19.613] <TB0> INFO: test: pretest no parameter change
[10:21:19.613] <TB0> INFO: running: pretest
[10:21:19.617] <TB0> INFO: ######################################################################
[10:21:19.617] <TB0> INFO: PixTestPretest::doTest()
[10:21:19.617] <TB0> INFO: ######################################################################
[10:21:19.618] <TB0> INFO: ----------------------------------------------------------------------
[10:21:19.618] <TB0> INFO: PixTestPretest::programROC()
[10:21:19.618] <TB0> INFO: ----------------------------------------------------------------------
[10:21:37.636] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:21:37.636] <TB0> INFO: IA differences per ROC: 18.5 18.5 16.9 17.7 19.3 19.3 20.1 19.3 23.3 16.1 18.5 20.1 20.9 18.5 20.1 20.9
[10:21:37.837] <TB0> INFO: ----------------------------------------------------------------------
[10:21:37.837] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:21:37.837] <TB0> INFO: ----------------------------------------------------------------------
[10:21:42.113] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 376.2 mA = 23.5125 mA/ROC
[10:21:42.116] <TB0> INFO: ----------------------------------------------------------------------
[10:21:42.116] <TB0> INFO: PixTestPretest::findWorkingPixel()
[10:21:42.116] <TB0> INFO: ----------------------------------------------------------------------
[10:21:50.519] <TB0> INFO: Test took 8398ms.
[10:21:50.817] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:21:50.855] <TB0> INFO: ----------------------------------------------------------------------
[10:21:50.855] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[10:21:50.855] <TB0> INFO: ----------------------------------------------------------------------
[10:21:59.209] <TB0> INFO: Test took 8347ms.
[10:21:59.527] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[10:21:59.527] <TB0> INFO: CalDel: 154 145 116 127 135 159 141 139 141 126 126 111 131 125 130 119
[10:21:59.527] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:21:59.531] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C0.dat
[10:21:59.531] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C1.dat
[10:21:59.532] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C2.dat
[10:21:59.532] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C3.dat
[10:21:59.532] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C4.dat
[10:21:59.532] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C5.dat
[10:21:59.532] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C6.dat
[10:21:59.533] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C7.dat
[10:21:59.533] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C8.dat
[10:21:59.533] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C9.dat
[10:21:59.533] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C10.dat
[10:21:59.533] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C11.dat
[10:21:59.534] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C12.dat
[10:21:59.534] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C13.dat
[10:21:59.534] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C14.dat
[10:21:59.534] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C15.dat
[10:21:59.534] <TB0> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[10:21:59.627] <TB0> INFO: enter test to run
[10:21:59.627] <TB0> INFO: test: fulltest no parameter change
[10:21:59.627] <TB0> INFO: running: fulltest
[10:21:59.627] <TB0> INFO: ######################################################################
[10:21:59.627] <TB0> INFO: PixTestFullTest::doTest()
[10:21:59.627] <TB0> INFO: ######################################################################
[10:21:59.628] <TB0> INFO: ######################################################################
[10:21:59.628] <TB0> INFO: PixTestAlive::doTest()
[10:21:59.628] <TB0> INFO: ######################################################################
[10:21:59.630] <TB0> INFO: ----------------------------------------------------------------------
[10:21:59.630] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:21:59.630] <TB0> INFO: ----------------------------------------------------------------------
[10:22:03.094] <TB0> INFO: Test took 3463ms.
[10:22:03.121] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:03.354] <TB0> INFO: PixTestAlive::aliveTest() done
[10:22:03.354] <TB0> INFO: number of dead pixels (per ROC): 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[10:22:03.358] <TB0> INFO: ----------------------------------------------------------------------
[10:22:03.358] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:22:03.358] <TB0> INFO: ----------------------------------------------------------------------
[10:22:06.107] <TB0> INFO: Test took 2748ms.
[10:22:06.109] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:06.109] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:22:06.338] <TB0> INFO: PixTestAlive::maskTest() done
[10:22:06.338] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:22:06.340] <TB0> INFO: ----------------------------------------------------------------------
[10:22:06.340] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:22:06.340] <TB0> INFO: ----------------------------------------------------------------------
[10:22:09.807] <TB0> INFO: Test took 3465ms.
[10:22:09.831] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:10.064] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[10:22:10.064] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:22:10.064] <TB0> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[10:22:10.077] <TB0> INFO: ######################################################################
[10:22:10.077] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:22:10.077] <TB0> INFO: ######################################################################
[10:22:10.081] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[10:22:10.095] <TB0> INFO: dacScan step from 0 .. 29
[10:22:31.891] <TB0> INFO: Test took 21796ms.
[10:22:31.925] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:31.928] <TB0> INFO: dacScan step from 30 .. 59
[10:22:56.478] <TB0> INFO: Test took 24550ms.
[10:22:56.621] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:56.649] <TB0> INFO: dacScan step from 60 .. 89
[10:23:27.460] <TB0> INFO: Test took 30811ms.
[10:23:27.774] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:27.859] <TB0> INFO: dacScan step from 90 .. 119
[10:23:59.414] <TB0> INFO: Test took 31554ms.
[10:23:59.673] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:59.751] <TB0> INFO: dacScan step from 120 .. 149
[10:24:27.418] <TB0> INFO: Test took 27666ms.
[10:24:27.611] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:50.717] <TB0> INFO: PixTestBBMap::doTest() done, duration: 160 seconds
[10:24:50.717] <TB0> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:24:50.717] <TB0> INFO: separation cut (per ROC): 68 70 78 95 96 71 83 91 91 69 72 67 72 77 76 83
[10:24:50.806] <TB0> INFO: ######################################################################
[10:24:50.806] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[10:24:50.806] <TB0> INFO: ######################################################################
[10:24:50.806] <TB0> INFO: ----------------------------------------------------------------------
[10:24:50.806] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[10:24:50.806] <TB0> INFO: ----------------------------------------------------------------------
[10:24:50.806] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[10:24:50.815] <TB0> INFO: dacScan step from 0 .. 3
[10:25:08.949] <TB0> INFO: Test took 18134ms.
[10:25:08.983] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:08.983] <TB0> INFO: dacScan step from 4 .. 7
[10:25:27.213] <TB0> INFO: Test took 18230ms.
[10:25:27.240] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:27.240] <TB0> INFO: dacScan step from 8 .. 11
[10:25:47.473] <TB0> INFO: Test took 20233ms.
[10:25:47.499] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:47.499] <TB0> INFO: dacScan step from 12 .. 15
[10:26:08.045] <TB0> INFO: Test took 20546ms.
[10:26:08.072] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:08.072] <TB0> INFO: dacScan step from 16 .. 19
[10:26:28.074] <TB0> INFO: Test took 20002ms.
[10:26:28.100] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:28.100] <TB0> INFO: dacScan step from 20 .. 23
[10:26:48.241] <TB0> INFO: Test took 20140ms.
[10:26:48.268] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:48.268] <TB0> INFO: dacScan step from 24 .. 27
[10:27:08.480] <TB0> INFO: Test took 20212ms.
[10:27:08.510] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:08.510] <TB0> INFO: dacScan step from 28 .. 31
[10:27:28.443] <TB0> INFO: Test took 19933ms.
[10:27:28.470] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:28.470] <TB0> INFO: dacScan step from 32 .. 35
[10:27:48.506] <TB0> INFO: Test took 20036ms.
[10:27:48.533] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:48.533] <TB0> INFO: dacScan step from 36 .. 39
[10:28:08.858] <TB0> INFO: Test took 20325ms.
[10:28:08.888] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:08.888] <TB0> INFO: dacScan step from 40 .. 43
[10:28:28.826] <TB0> INFO: Test took 19938ms.
[10:28:28.851] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:28.851] <TB0> INFO: dacScan step from 44 .. 47
[10:28:48.713] <TB0> INFO: Test took 19862ms.
[10:28:48.747] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:48.747] <TB0> INFO: dacScan step from 48 .. 51
[10:29:08.551] <TB0> INFO: Test took 19804ms.
[10:29:08.580] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:08.580] <TB0> INFO: dacScan step from 52 .. 55
[10:29:28.576] <TB0> INFO: Test took 19996ms.
[10:29:28.602] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:28.602] <TB0> INFO: dacScan step from 56 .. 59
[10:29:48.361] <TB0> INFO: Test took 19759ms.
[10:29:48.389] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:48.389] <TB0> INFO: dacScan step from 60 .. 63
[10:30:08.284] <TB0> INFO: Test took 19894ms.
[10:30:08.314] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:08.314] <TB0> INFO: dacScan step from 64 .. 67
[10:30:28.502] <TB0> INFO: Test took 20187ms.
[10:30:28.538] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:28.539] <TB0> INFO: dacScan step from 68 .. 71
[10:30:49.271] <TB0> INFO: Test took 20732ms.
[10:30:49.324] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:49.325] <TB0> INFO: dacScan step from 72 .. 75
[10:31:10.687] <TB0> INFO: Test took 21362ms.
[10:31:10.759] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:10.762] <TB0> INFO: dacScan step from 76 .. 79
[10:31:34.125] <TB0> INFO: Test took 23363ms.
[10:31:34.241] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:34.247] <TB0> INFO: dacScan step from 80 .. 83
[10:32:01.022] <TB0> INFO: Test took 26775ms.
[10:32:01.185] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:01.192] <TB0> INFO: dacScan step from 84 .. 87
[10:32:30.344] <TB0> INFO: Test took 29151ms.
[10:32:30.549] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:30.559] <TB0> INFO: dacScan step from 88 .. 91
[10:33:01.419] <TB0> INFO: Test took 30860ms.
[10:33:01.627] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:01.639] <TB0> INFO: dacScan step from 92 .. 95
[10:33:33.523] <TB0> INFO: Test took 31884ms.
[10:33:33.741] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:33.752] <TB0> INFO: dacScan step from 96 .. 99


[10:34:06.159] <TB0> INFO: Test took 32407ms.
[10:34:06.389] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:06.402] <TB0> INFO: dacScan step from 100 .. 103

[10:34:38.195] <TB0> INFO: Test took 31793ms.
[10:34:38.462] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:38.475] <TB0> INFO: dacScan step from 104 .. 107



[10:35:10.989] <TB0> INFO: Test took 32514ms.
[10:35:11.236] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:11.249] <TB0> INFO: dacScan step from 108 .. 111


[10:35:43.284] <TB0> INFO: Test took 32035ms.
[10:35:43.529] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:43.542] <TB0> INFO: dacScan step from 112 .. 115


[10:36:15.174] <TB0> INFO: Test took 31632ms.
[10:36:15.410] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:15.423] <TB0> INFO: dacScan step from 116 .. 119


[10:36:47.624] <TB0> INFO: Test took 32201ms.
[10:36:47.874] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:47.887] <TB0> INFO: dacScan step from 120 .. 123
[10:37:19.925] <TB0> INFO: Test took 32038ms.
[10:37:20.179] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:20.191] <TB0> INFO: dacScan step from 124 .. 127
[10:37:52.472] <TB0> INFO: Test took 32280ms.
[10:37:52.716] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:52.730] <TB0> INFO: dacScan step from 128 .. 131
[10:38:25.777] <TB0> INFO: Test took 33047ms.
[10:38:26.027] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:26.040] <TB0> INFO: dacScan step from 132 .. 135
[10:38:58.773] <TB0> INFO: Test took 32733ms.
[10:38:59.016] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:59.029] <TB0> INFO: dacScan step from 136 .. 139
[10:39:31.276] <TB0> INFO: Test took 32247ms.
[10:39:31.538] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:31.551] <TB0> INFO: dacScan step from 140 .. 143
[10:40:03.897] <TB0> INFO: Test took 32345ms.
[10:40:04.156] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:04.172] <TB0> INFO: dacScan step from 144 .. 147
[10:40:35.844] <TB0> INFO: Test took 31672ms.
[10:40:36.126] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:36.139] <TB0> INFO: dacScan step from 148 .. 149
[10:40:52.977] <TB0> INFO: Test took 16838ms.
[10:40:53.103] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:53.110] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:40:54.784] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:40:56.411] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:40:58.048] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:40:59.575] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:00.985] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:02.384] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:03.800] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:05.194] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:06.552] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:07.960] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:09.415] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:10.867] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:12.283] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:13.710] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:15.100] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:41:16.528] <TB0> INFO: PixTestScurves::scurves() done
[10:41:16.528] <TB0> INFO: Vcal mean: 72.74 79.93 77.48 89.73 94.82 89.56 89.38 90.25 99.00 82.88 80.23 75.75 80.09 79.77 87.15 85.82
[10:41:16.528] <TB0> INFO: Vcal RMS: 4.99 4.59 5.05 6.15 6.23 5.50 5.70 5.37 5.48 4.48 4.31 4.72 4.27 4.38 5.81 5.59
[10:41:16.528] <TB0> INFO: PixTestScurves::fullTest() done, duration: 985 seconds
[10:41:16.603] <TB0> INFO: ######################################################################
[10:41:16.603] <TB0> INFO: PixTestTrim::doTest()
[10:41:16.603] <TB0> INFO: ######################################################################
[10:41:16.604] <TB0> INFO: ----------------------------------------------------------------------
[10:41:16.604] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[10:41:16.604] <TB0> INFO: ----------------------------------------------------------------------
[10:41:16.688] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:41:16.688] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:41:16.697] <TB0> INFO: dacScan step from 0 .. 19
[10:41:31.046] <TB0> INFO: Test took 14349ms.
[10:41:31.072] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:31.072] <TB0> INFO: dacScan step from 20 .. 39
[10:41:45.614] <TB0> INFO: Test took 14542ms.
[10:41:45.640] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:45.640] <TB0> INFO: dacScan step from 40 .. 59
[10:42:00.838] <TB0> INFO: Test took 15198ms.
[10:42:00.862] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:00.862] <TB0> INFO: dacScan step from 60 .. 79
[10:42:16.047] <TB0> INFO: Test took 15185ms.
[10:42:16.076] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:16.076] <TB0> INFO: dacScan step from 80 .. 99
[10:42:32.578] <TB0> INFO: Test took 16502ms.
[10:42:32.664] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:32.677] <TB0> INFO: dacScan step from 100 .. 119
[10:42:51.835] <TB0> INFO: Test took 19158ms.
[10:42:52.075] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:52.133] <TB0> INFO: dacScan step from 120 .. 139
[10:43:11.297] <TB0> INFO: Test took 19164ms.
[10:43:11.434] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:11.458] <TB0> INFO: dacScan step from 140 .. 159
[10:43:28.842] <TB0> INFO: Test took 17384ms.
[10:43:28.909] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:52.585] <TB0> INFO: ROC 0 VthrComp = 78
[10:43:52.585] <TB0> INFO: ROC 1 VthrComp = 82
[10:43:52.585] <TB0> INFO: ROC 2 VthrComp = 81
[10:43:52.585] <TB0> INFO: ROC 3 VthrComp = 93
[10:43:52.585] <TB0> INFO: ROC 4 VthrComp = 98
[10:43:52.585] <TB0> INFO: ROC 5 VthrComp = 89
[10:43:52.585] <TB0> INFO: ROC 6 VthrComp = 94
[10:43:52.586] <TB0> INFO: ROC 7 VthrComp = 96
[10:43:52.586] <TB0> INFO: ROC 8 VthrComp = 104
[10:43:52.586] <TB0> INFO: ROC 9 VthrComp = 88
[10:43:52.586] <TB0> INFO: ROC 10 VthrComp = 86
[10:43:52.586] <TB0> INFO: ROC 11 VthrComp = 81
[10:43:52.586] <TB0> INFO: ROC 12 VthrComp = 88
[10:43:52.586] <TB0> INFO: ROC 13 VthrComp = 86
[10:43:52.586] <TB0> INFO: ROC 14 VthrComp = 90
[10:43:52.586] <TB0> INFO: ROC 15 VthrComp = 92
[10:43:52.586] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:43:52.586] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:43:52.596] <TB0> INFO: dacScan step from 0 .. 19
[10:44:07.755] <TB0> INFO: Test took 15159ms.
[10:44:07.776] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:07.776] <TB0> INFO: dacScan step from 20 .. 39
[10:44:22.218] <TB0> INFO: Test took 14442ms.
[10:44:22.248] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:22.251] <TB0> INFO: dacScan step from 40 .. 59
[10:44:42.445] <TB0> INFO: Test took 20194ms.
[10:44:42.609] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:42.645] <TB0> INFO: dacScan step from 60 .. 79
[10:45:04.427] <TB0> INFO: Test took 21782ms.
[10:45:04.607] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:04.661] <TB0> INFO: dacScan step from 80 .. 99
[10:45:26.184] <TB0> INFO: Test took 21523ms.
[10:45:26.358] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:26.409] <TB0> INFO: dacScan step from 100 .. 119
[10:45:46.725] <TB0> INFO: Test took 20316ms.
[10:45:46.881] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:46.933] <TB0> INFO: dacScan step from 120 .. 139
[10:46:07.816] <TB0> INFO: Test took 20883ms.
[10:46:08.002] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:08.056] <TB0> INFO: dacScan step from 140 .. 159
[10:46:29.645] <TB0> INFO: Test took 21589ms.
[10:46:29.811] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:56.195] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 58.5121 for pixel 17/13 mean/min/max = 46.4369/34.2283/58.6455
[10:46:56.196] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 58.7287 for pixel 18/2 mean/min/max = 45.6072/32.3623/58.8522
[10:46:56.196] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 59.9503 for pixel 9/0 mean/min/max = 45.9013/31.8382/59.9643
[10:46:56.196] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 61.5179 for pixel 0/66 mean/min/max = 46.4366/31.1795/61.6937
[10:46:56.197] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.138 for pixel 1/1 mean/min/max = 45.6814/30.9135/60.4493
[10:46:56.197] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 59.245 for pixel 0/34 mean/min/max = 46.2637/33.1176/59.4097
[10:46:56.197] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.6726 for pixel 7/79 mean/min/max = 45.3347/31.8365/58.833
[10:46:56.198] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.356 for pixel 14/7 mean/min/max = 44.4531/31.4337/57.4726
[10:46:56.198] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.2476 for pixel 0/22 mean/min/max = 46.7686/33.2601/60.2771
[10:46:56.199] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 57.3475 for pixel 12/72 mean/min/max = 45.3601/33.3277/57.3925
[10:46:56.199] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 56.6733 for pixel 0/62 mean/min/max = 44.6617/32.1386/57.1847
[10:46:56.199] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 57.9713 for pixel 9/79 mean/min/max = 45.1112/32.0334/58.1889
[10:46:56.200] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 56.066 for pixel 0/78 mean/min/max = 44.7034/32.5393/56.8675
[10:46:56.200] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 57.3611 for pixel 51/2 mean/min/max = 44.8744/32.0867/57.662
[10:46:56.201] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 61.4668 for pixel 6/0 mean/min/max = 46.9496/32.1876/61.7117
[10:46:56.201] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 59.603 for pixel 0/1 mean/min/max = 45.8312/32.0178/59.6445
[10:46:56.201] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:48:34.047] <TB0> INFO: Test took 97846ms.
[10:48:35.410] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:48:35.419] <TB0> INFO: dacScan step from 0 .. 19
[10:48:57.855] <TB0> INFO: Test took 22436ms.
[10:48:57.901] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:57.902] <TB0> INFO: dacScan step from 20 .. 39
[10:49:24.678] <TB0> INFO: Test took 26775ms.
[10:49:24.909] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:24.949] <TB0> INFO: dacScan step from 40 .. 59





[10:50:00.211] <TB0> INFO: Test took 35262ms.
[10:50:00.497] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:00.550] <TB0> INFO: dacScan step from 60 .. 79
[10:50:38.242] <TB0> INFO: Test took 37692ms.
[10:50:38.534] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:38.592] <TB0> INFO: dacScan step from 80 .. 99



[10:51:16.397] <TB0> INFO: Test took 37805ms.
[10:51:16.693] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:16.748] <TB0> INFO: dacScan step from 100 .. 119



[10:51:54.392] <TB0> INFO: Test took 37644ms.
[10:51:54.694] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:54.756] <TB0> INFO: dacScan step from 120 .. 139


[10:52:32.826] <TB0> INFO: Test took 38070ms.
[10:52:33.138] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:33.208] <TB0> INFO: dacScan step from 140 .. 159

[10:53:08.667] <TB0> INFO: Test took 35459ms.
[10:53:08.940] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:08.994] <TB0> INFO: dacScan step from 160 .. 179


[10:53:46.569] <TB0> INFO: Test took 37575ms.
[10:53:46.868] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:46.937] <TB0> INFO: dacScan step from 180 .. 199


[10:54:24.891] <TB0> INFO: Test took 37954ms.
[10:54:25.181] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:51.013] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.016395 .. 255.000000
[10:54:51.103] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[10:54:51.113] <TB0> INFO: dacScan step from 0 .. 19
[10:55:04.269] <TB0> INFO: Test took 13156ms.
[10:55:04.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:04.289] <TB0> INFO: dacScan step from 20 .. 39
[10:55:18.434] <TB0> INFO: Test took 14144ms.
[10:55:18.522] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:18.544] <TB0> INFO: dacScan step from 40 .. 59
[10:55:37.272] <TB0> INFO: Test took 18728ms.
[10:55:37.427] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:37.487] <TB0> INFO: dacScan step from 60 .. 79
[10:55:56.585] <TB0> INFO: Test took 19098ms.
[10:55:56.728] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:56.787] <TB0> INFO: dacScan step from 80 .. 99
[10:56:16.000] <TB0> INFO: Test took 19213ms.
[10:56:16.150] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:16.204] <TB0> INFO: dacScan step from 100 .. 119
[10:56:34.944] <TB0> INFO: Test took 18740ms.
[10:56:35.095] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:35.151] <TB0> INFO: dacScan step from 120 .. 139
[10:56:53.470] <TB0> INFO: Test took 18318ms.
[10:56:53.701] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:53.762] <TB0> INFO: dacScan step from 140 .. 159
[10:57:11.943] <TB0> INFO: Test took 18181ms.
[10:57:12.165] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:12.219] <TB0> INFO: dacScan step from 160 .. 179
[10:57:31.118] <TB0> INFO: Test took 18899ms.
[10:57:31.277] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:31.333] <TB0> INFO: dacScan step from 180 .. 199
[10:57:50.716] <TB0> INFO: Test took 19383ms.
[10:57:50.867] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:50.923] <TB0> INFO: dacScan step from 200 .. 219
[10:58:08.854] <TB0> INFO: Test took 17930ms.
[10:58:08.995] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:09.052] <TB0> INFO: dacScan step from 220 .. 239
[10:58:28.148] <TB0> INFO: Test took 19096ms.
[10:58:28.290] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:28.350] <TB0> INFO: dacScan step from 240 .. 255
[10:58:43.645] <TB0> INFO: Test took 15295ms.
[10:58:43.763] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:15.259] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 13.522044 .. 45.714343
[10:59:15.340] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 3 .. 55 (20) hits flags = 16 (plus default)
[10:59:15.349] <TB0> INFO: dacScan step from 3 .. 22
[10:59:28.551] <TB0> INFO: Test took 13202ms.
[10:59:28.571] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:28.571] <TB0> INFO: dacScan step from 23 .. 42
[10:59:43.363] <TB0> INFO: Test took 14792ms.
[10:59:43.506] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:43.549] <TB0> INFO: dacScan step from 43 .. 55
[10:59:55.567] <TB0> INFO: Test took 12018ms.
[10:59:55.663] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:11.171] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 19.480504 .. 43.402313
[11:00:11.246] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 9 .. 53 (20) hits flags = 16 (plus default)
[11:00:11.255] <TB0> INFO: dacScan step from 9 .. 28
[11:00:25.230] <TB0> INFO: Test took 13975ms.
[11:00:25.258] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:25.258] <TB0> INFO: dacScan step from 29 .. 48
[11:00:41.030] <TB0> INFO: Test took 15772ms.
[11:00:41.163] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:41.208] <TB0> INFO: dacScan step from 49 .. 53
[11:00:47.571] <TB0> INFO: Test took 6363ms.
[11:00:47.611] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:03.947] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 8.500000 .. 42.651692
[11:01:04.024] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 8 .. 52 (20) hits flags = 16 (plus default)
[11:01:04.033] <TB0> INFO: dacScan step from 8 .. 27
[11:01:17.161] <TB0> INFO: Test took 13128ms.
[11:01:17.181] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:17.181] <TB0> INFO: dacScan step from 28 .. 47
[11:01:32.440] <TB0> INFO: Test took 15259ms.
[11:01:32.567] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:32.609] <TB0> INFO: dacScan step from 48 .. 52
[11:01:39.176] <TB0> INFO: Test took 6567ms.
[11:01:39.218] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:54.360] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:01:54.360] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:01:54.369] <TB0> INFO: dacScan step from 15 .. 34
[11:02:19.251] <TB0> INFO: Test took 24882ms.
[11:02:19.347] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:19.365] <TB0> INFO: dacScan step from 35 .. 54



[11:02:51.691] <TB0> INFO: Test took 32326ms.
[11:02:52.021] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:52.072] <TB0> INFO: dacScan step from 55 .. 55
[11:02:56.662] <TB0> INFO: Test took 4590ms.
[11:02:56.688] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:12.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:03:12.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:03:12.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:03:12.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:03:12.017] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:03:12.017] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:03:12.017] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:03:12.018] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:03:12.018] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:03:12.018] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:03:12.019] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:03:12.019] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:03:12.019] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:03:12.020] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:03:12.020] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:03:12.020] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:03:12.021] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C0.dat
[11:03:12.032] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C1.dat
[11:03:12.039] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C2.dat
[11:03:12.045] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C3.dat
[11:03:12.052] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C4.dat
[11:03:12.058] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C5.dat
[11:03:12.065] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C6.dat
[11:03:12.071] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C7.dat
[11:03:12.077] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C8.dat
[11:03:12.083] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C9.dat
[11:03:12.089] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C10.dat
[11:03:12.095] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C11.dat
[11:03:12.101] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C12.dat
[11:03:12.107] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C13.dat
[11:03:12.113] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C14.dat
[11:03:12.119] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C15.dat
[11:03:12.125] <TB0> INFO: PixTestTrim::trimTest() done
[11:03:12.125] <TB0> INFO: vtrim: 104 94 108 113 114 105 97 103 122 94 107 99 96 100 120 111
[11:03:12.125] <TB0> INFO: vthrcomp: 78 82 81 93 98 89 94 96 104 88 86 81 88 86 90 92
[11:03:12.125] <TB0> INFO: vcal mean: 35.05 35.03 34.99 35.02 35.00 35.08 35.06 34.99 35.08 35.04 35.03 35.05 35.02 35.04 35.11 35.03
[11:03:12.125] <TB0> INFO: vcal RMS: 1.32 1.08 1.01 1.09 1.22 1.06 1.07 1.08 1.04 1.03 0.99 1.01 0.98 0.97 1.10 1.03
[11:03:12.125] <TB0> INFO: bits mean: 9.51 9.62 9.74 9.69 10.22 9.36 9.58 10.30 9.28 9.82 9.84 9.71 9.73 9.67 9.58 9.57
[11:03:12.125] <TB0> INFO: bits RMS: 2.30 2.58 2.62 2.68 2.46 2.58 2.67 2.44 2.52 2.37 2.59 2.68 2.55 2.61 2.59 2.67
[11:03:12.132] <TB0> INFO: ----------------------------------------------------------------------
[11:03:12.132] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[11:03:12.132] <TB0> INFO: ----------------------------------------------------------------------
[11:03:12.135] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:03:12.144] <TB0> INFO: dacScan step from 0 .. 19
[11:03:36.092] <TB0> INFO: Test took 23948ms.
[11:03:36.132] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:36.132] <TB0> INFO: dacScan step from 20 .. 39
[11:03:58.073] <TB0> INFO: Test took 21941ms.
[11:03:58.111] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:58.111] <TB0> INFO: dacScan step from 40 .. 59
[11:04:22.106] <TB0> INFO: Test took 23995ms.
[11:04:22.146] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:22.146] <TB0> INFO: dacScan step from 60 .. 79
[11:04:46.397] <TB0> INFO: Test took 24251ms.
[11:04:46.434] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:46.434] <TB0> INFO: dacScan step from 80 .. 99
[11:05:11.701] <TB0> INFO: Test took 25267ms.
[11:05:11.780] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:11.786] <TB0> INFO: dacScan step from 100 .. 119
[11:05:43.247] <TB0> INFO: Test took 31461ms.
[11:05:43.481] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:43.509] <TB0> INFO: dacScan step from 120 .. 139


[11:06:14.319] <TB0> INFO: Test took 30810ms.
[11:06:14.616] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:14.670] <TB0> INFO: dacScan step from 140 .. 159


[11:06:47.855] <TB0> INFO: Test took 33185ms.
[11:06:48.138] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:48.191] <TB0> INFO: dacScan step from 160 .. 179
[11:07:23.513] <TB0> INFO: Test took 35321ms.
[11:07:23.818] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:23.878] <TB0> INFO: dacScan step from 180 .. 199
[11:08:00.305] <TB0> INFO: Test took 36427ms.
[11:08:00.603] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:27.318] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 167 (20) hits flags = 16 (plus default)
[11:08:27.327] <TB0> INFO: dacScan step from 0 .. 19
[11:08:49.914] <TB0> INFO: Test took 22587ms.
[11:08:49.954] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:49.954] <TB0> INFO: dacScan step from 20 .. 39
[11:09:11.280] <TB0> INFO: Test took 21326ms.
[11:09:11.322] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:11.322] <TB0> INFO: dacScan step from 40 .. 59
[11:09:36.215] <TB0> INFO: Test took 24893ms.
[11:09:36.251] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:36.251] <TB0> INFO: dacScan step from 60 .. 79
[11:10:01.435] <TB0> INFO: Test took 25183ms.
[11:10:01.475] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:01.475] <TB0> INFO: dacScan step from 80 .. 99
[11:10:28.452] <TB0> INFO: Test took 26977ms.
[11:10:28.589] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:28.602] <TB0> INFO: dacScan step from 100 .. 119





[11:11:00.495] <TB0> INFO: Test took 31893ms.
[11:11:00.769] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:00.810] <TB0> INFO: dacScan step from 120 .. 139


[11:11:36.230] <TB0> INFO: Test took 35420ms.
[11:11:36.524] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:36.578] <TB0> INFO: dacScan step from 140 .. 159
[11:12:11.958] <TB0> INFO: Test took 35380ms.
[11:12:12.307] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:12.372] <TB0> INFO: dacScan step from 160 .. 167
[11:12:27.859] <TB0> INFO: Test took 15487ms.
[11:12:27.970] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:51.903] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 154 (20) hits flags = 16 (plus default)
[11:12:51.912] <TB0> INFO: dacScan step from 0 .. 19
[11:13:13.213] <TB0> INFO: Test took 21301ms.
[11:13:13.250] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:13.250] <TB0> INFO: dacScan step from 20 .. 39
[11:13:36.929] <TB0> INFO: Test took 23679ms.
[11:13:36.970] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:36.970] <TB0> INFO: dacScan step from 40 .. 59
[11:13:59.154] <TB0> INFO: Test took 22184ms.
[11:13:59.191] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:59.191] <TB0> INFO: dacScan step from 60 .. 79
[11:14:22.579] <TB0> INFO: Test took 23388ms.
[11:14:22.623] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:22.624] <TB0> INFO: dacScan step from 80 .. 99
[11:14:48.926] <TB0> INFO: Test took 26302ms.
[11:14:49.068] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:49.084] <TB0> INFO: dacScan step from 100 .. 119

[11:15:24.408] <TB0> INFO: Test took 35324ms.
[11:15:24.682] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:24.720] <TB0> INFO: dacScan step from 120 .. 139



[11:16:01.145] <TB0> INFO: Test took 36425ms.
[11:16:01.422] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:01.475] <TB0> INFO: dacScan step from 140 .. 154
[11:16:29.936] <TB0> INFO: Test took 28461ms.
[11:16:30.154] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:52.372] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 154 (20) hits flags = 16 (plus default)
[11:16:52.381] <TB0> INFO: dacScan step from 0 .. 19
[11:17:13.805] <TB0> INFO: Test took 21424ms.
[11:17:13.846] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:13.846] <TB0> INFO: dacScan step from 20 .. 39
[11:17:38.385] <TB0> INFO: Test took 24539ms.
[11:17:38.423] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:38.423] <TB0> INFO: dacScan step from 40 .. 59
[11:18:02.272] <TB0> INFO: Test took 23848ms.
[11:18:02.309] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:02.310] <TB0> INFO: dacScan step from 60 .. 79
[11:18:26.074] <TB0> INFO: Test took 23764ms.
[11:18:26.117] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:26.118] <TB0> INFO: dacScan step from 80 .. 99
[11:18:52.771] <TB0> INFO: Test took 26653ms.
[11:18:52.918] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:52.937] <TB0> INFO: dacScan step from 100 .. 119





[11:19:25.927] <TB0> INFO: Test took 32990ms.
[11:19:26.210] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:26.277] <TB0> INFO: dacScan step from 120 .. 139



[11:20:02.221] <TB0> INFO: Test took 35943ms.
[11:20:02.563] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:02.622] <TB0> INFO: dacScan step from 140 .. 154
[11:20:30.183] <TB0> INFO: Test took 27561ms.
[11:20:30.397] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:52.801] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[11:20:52.810] <TB0> INFO: dacScan step from 0 .. 19
[11:21:15.090] <TB0> INFO: Test took 22280ms.
[11:21:15.131] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:15.131] <TB0> INFO: dacScan step from 20 .. 39
[11:21:37.263] <TB0> INFO: Test took 22132ms.
[11:21:37.302] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:37.302] <TB0> INFO: dacScan step from 40 .. 59
[11:22:00.876] <TB0> INFO: Test took 23574ms.
[11:22:00.917] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:00.917] <TB0> INFO: dacScan step from 60 .. 79
[11:22:23.411] <TB0> INFO: Test took 22494ms.
[11:22:23.453] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:23.454] <TB0> INFO: dacScan step from 80 .. 99
[11:22:50.216] <TB0> INFO: Test took 26762ms.
[11:22:50.362] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:50.380] <TB0> INFO: dacScan step from 100 .. 119
[11:23:24.379] <TB0> INFO: Test took 33999ms.
[11:23:24.713] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:24.764] <TB0> INFO: dacScan step from 120 .. 139


[11:23:59.727] <TB0> INFO: Test took 34963ms.
[11:24:00.003] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:00.055] <TB0> INFO: dacScan step from 140 .. 153
[11:24:25.047] <TB0> INFO: Test took 24992ms.
[11:24:25.262] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:47.536] <TB0> INFO: PixTestTrim::trimBitTest() done
[11:24:47.538] <TB0> INFO: PixTestTrim::doTest() done, duration: 2610 seconds
[11:24:48.232] <TB0> INFO: ######################################################################
[11:24:48.232] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:24:48.232] <TB0> INFO: ######################################################################
[11:24:51.555] <TB0> INFO: Test took 3322ms.
[11:24:51.573] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:55.086] <TB0> INFO: Test took 3317ms.
[11:24:55.146] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:58.442] <TB0> INFO: Test took 3286ms.
[11:24:58.505] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:58.511] <TB0> INFO: The DUT currently contains the following objects:
[11:24:58.511] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:24:58.511] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:24:58.511] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:24:58.511] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:24:58.511] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.511] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.511] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.511] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.511] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.511] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.511] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.511] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.512] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.512] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.512] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.512] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.512] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.512] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.512] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:58.512] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: Test took 1101ms.
[11:24:59.613] <TB0> INFO: The DUT currently contains the following objects:
[11:24:59.613] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:24:59.613] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:24:59.613] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:24:59.613] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:24:59.613] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:24:59.613] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.715] <TB0> INFO: Test took 1101ms.
[11:25:00.716] <TB0> INFO: The DUT currently contains the following objects:
[11:25:00.716] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:00.716] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:00.716] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:00.716] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:00.716] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:00.716] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.830] <TB0> INFO: Test took 1114ms.
[11:25:01.831] <TB0> INFO: The DUT currently contains the following objects:
[11:25:01.831] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:01.831] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:01.831] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:01.831] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:01.831] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:01.831] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.937] <TB0> INFO: Test took 1106ms.
[11:25:02.939] <TB0> INFO: The DUT currently contains the following objects:
[11:25:02.939] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:02.939] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:02.939] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:02.939] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:02.939] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:02.939] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.046] <TB0> INFO: Test took 1107ms.
[11:25:04.047] <TB0> INFO: The DUT currently contains the following objects:
[11:25:04.047] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:04.047] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:04.047] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:04.047] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:04.047] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:04.047] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.155] <TB0> INFO: Test took 1108ms.
[11:25:05.157] <TB0> INFO: The DUT currently contains the following objects:
[11:25:05.157] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:05.157] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:05.157] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:05.157] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:05.157] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.157] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:05.158] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.265] <TB0> INFO: Test took 1107ms.
[11:25:06.267] <TB0> INFO: The DUT currently contains the following objects:
[11:25:06.267] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:06.267] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:06.267] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:06.267] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:06.267] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.267] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.268] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.268] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.268] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:06.268] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.375] <TB0> INFO: Test took 1107ms.
[11:25:07.376] <TB0> INFO: The DUT currently contains the following objects:
[11:25:07.376] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:07.376] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:07.376] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:07.376] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:07.376] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.376] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.377] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:07.377] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.513] <TB0> INFO: Test took 1136ms.
[11:25:08.514] <TB0> INFO: The DUT currently contains the following objects:
[11:25:08.514] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:08.514] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:08.514] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:08.514] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:08.514] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:08.514] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.621] <TB0> INFO: Test took 1107ms.
[11:25:09.623] <TB0> INFO: The DUT currently contains the following objects:
[11:25:09.623] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:09.623] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:09.623] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:09.623] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:09.623] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:09.623] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.731] <TB0> INFO: Test took 1108ms.
[11:25:10.732] <TB0> INFO: The DUT currently contains the following objects:
[11:25:10.734] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:10.734] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:10.734] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:10.734] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:10.734] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.734] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.735] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.735] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.735] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.735] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:10.735] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.841] <TB0> INFO: Test took 1106ms.
[11:25:11.842] <TB0> INFO: The DUT currently contains the following objects:
[11:25:11.842] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:11.842] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:11.842] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:11.842] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:11.842] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.842] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.842] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.842] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.842] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.842] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:11.843] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.949] <TB0> INFO: Test took 1106ms.
[11:25:12.950] <TB0> INFO: The DUT currently contains the following objects:
[11:25:12.950] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:12.950] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:12.950] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:12.950] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:12.950] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.950] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.951] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.951] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.951] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.951] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.951] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.059] <TB0> INFO: Test took 1108ms.
[11:25:14.060] <TB0> INFO: The DUT currently contains the following objects:
[11:25:14.060] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:14.060] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:14.060] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:14.060] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:14.060] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.060] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.168] <TB0> INFO: Test took 1108ms.
[11:25:15.170] <TB0> INFO: The DUT currently contains the following objects:
[11:25:15.170] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:15.170] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:25:15.170] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:25:15.170] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:15.170] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.170] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.171] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.171] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.171] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.171] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.171] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.171] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:16.279] <TB0> INFO: Test took 1108ms.
[11:25:16.283] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:29:35.862] <TB0> INFO: Test took 259579ms.
[11:29:37.398] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:46.213] <TB0> INFO: Test took 248815ms.
[11:33:47.867] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.874] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.880] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.887] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.894] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.901] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.908] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.914] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.923] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.932] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.941] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.950] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.958] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.965] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.971] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:47.978] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:33:48.014] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:33:48.015] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:33:48.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:33:48.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:33:48.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:33:48.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:33:48.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:33:51.295] <TB0> INFO: Test took 3276ms.
[11:33:55.192] <TB0> INFO: Test took 3632ms.
[11:33:59.016] <TB0> INFO: Test took 3558ms.
[11:33:59.288] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:00.213] <TB0> INFO: Test took 925ms.
[11:34:00.215] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:01.315] <TB0> INFO: Test took 1100ms.
[11:34:01.317] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:02.419] <TB0> INFO: Test took 1102ms.
[11:34:02.422] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:03.524] <TB0> INFO: Test took 1102ms.
[11:34:03.527] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:04.627] <TB0> INFO: Test took 1101ms.
[11:34:04.629] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:05.729] <TB0> INFO: Test took 1100ms.
[11:34:05.731] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:06.833] <TB0> INFO: Test took 1102ms.
[11:34:06.835] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:07.936] <TB0> INFO: Test took 1101ms.
[11:34:07.938] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:09.039] <TB0> INFO: Test took 1101ms.
[11:34:09.041] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:10.143] <TB0> INFO: Test took 1102ms.
[11:34:10.145] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:11.256] <TB0> INFO: Test took 1111ms.
[11:34:11.260] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:12.372] <TB0> INFO: Test took 1112ms.
[11:34:12.376] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:13.479] <TB0> INFO: Test took 1103ms.
[11:34:13.481] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:14.594] <TB0> INFO: Test took 1113ms.
[11:34:14.598] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:15.705] <TB0> INFO: Test took 1107ms.
[11:34:15.708] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:16.819] <TB0> INFO: Test took 1111ms.
[11:34:16.823] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:17.934] <TB0> INFO: Test took 1111ms.
[11:34:17.939] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:19.050] <TB0> INFO: Test took 1112ms.
[11:34:19.054] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:20.163] <TB0> INFO: Test took 1109ms.
[11:34:20.166] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:21.275] <TB0> INFO: Test took 1109ms.
[11:34:21.279] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:22.386] <TB0> INFO: Test took 1108ms.
[11:34:22.389] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:23.514] <TB0> INFO: Test took 1125ms.
[11:34:23.517] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:24.625] <TB0> INFO: Test took 1108ms.
[11:34:24.629] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:25.742] <TB0> INFO: Test took 1113ms.
[11:34:25.745] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:26.856] <TB0> INFO: Test took 1111ms.
[11:34:26.861] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:27.969] <TB0> INFO: Test took 1108ms.
[11:34:27.973] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:29.109] <TB0> INFO: Test took 1136ms.
[11:34:29.113] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:30.224] <TB0> INFO: Test took 1111ms.
[11:34:30.229] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:31.331] <TB0> INFO: Test took 1103ms.
[11:34:31.334] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:32.442] <TB0> INFO: Test took 1108ms.
[11:34:32.445] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:33.552] <TB0> INFO: Test took 1107ms.
[11:34:33.556] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:34.677] <TB0> INFO: Test took 1122ms.
[11:34:35.209] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 586 seconds
[11:34:35.209] <TB0> INFO: PH scale (per ROC): 85 80 86 86 91 79 78 79 83 92 86 83 89 85 77 89
[11:34:35.209] <TB0> INFO: PH offset (per ROC): 144 163 143 163 150 160 144 164 158 154 170 150 139 157 165 162
[11:34:35.443] <TB0> INFO: ######################################################################
[11:34:35.443] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:34:35.443] <TB0> INFO: ######################################################################
[11:34:35.456] <TB0> INFO: scanning low vcal = 10
[11:34:39.360] <TB0> INFO: Test took 3904ms.
[11:34:39.365] <TB0> INFO: scanning low vcal = 20
[11:34:43.254] <TB0> INFO: Test took 3888ms.
[11:34:43.258] <TB0> INFO: scanning low vcal = 30
[11:34:47.148] <TB0> INFO: Test took 3890ms.
[11:34:47.162] <TB0> INFO: scanning low vcal = 40
[11:34:51.571] <TB0> INFO: Test took 4410ms.
[11:34:51.667] <TB0> INFO: scanning low vcal = 50
[11:34:56.126] <TB0> INFO: Test took 4459ms.
[11:34:56.225] <TB0> INFO: scanning low vcal = 60
[11:35:00.624] <TB0> INFO: Test took 4398ms.
[11:35:00.700] <TB0> INFO: scanning low vcal = 70
[11:35:05.238] <TB0> INFO: Test took 4538ms.
[11:35:05.340] <TB0> INFO: scanning low vcal = 80
[11:35:09.703] <TB0> INFO: Test took 4363ms.
[11:35:09.765] <TB0> INFO: scanning low vcal = 90
[11:35:14.323] <TB0> INFO: Test took 4558ms.
[11:35:14.422] <TB0> INFO: scanning low vcal = 100
[11:35:19.089] <TB0> INFO: Test took 4667ms.
[11:35:19.158] <TB0> INFO: scanning low vcal = 110
[11:35:23.906] <TB0> INFO: Test took 4748ms.
[11:35:23.989] <TB0> INFO: scanning low vcal = 120
[11:35:28.756] <TB0> INFO: Test took 4767ms.
[11:35:28.848] <TB0> INFO: scanning low vcal = 130
[11:35:33.554] <TB0> INFO: Test took 4706ms.
[11:35:33.650] <TB0> INFO: scanning low vcal = 140
[11:35:38.339] <TB0> INFO: Test took 4689ms.
[11:35:38.432] <TB0> INFO: scanning low vcal = 150
[11:35:43.084] <TB0> INFO: Test took 4652ms.
[11:35:43.166] <TB0> INFO: scanning low vcal = 160
[11:35:47.718] <TB0> INFO: Test took 4552ms.
[11:35:47.777] <TB0> INFO: scanning low vcal = 170
[11:35:52.246] <TB0> INFO: Test took 4469ms.
[11:35:52.337] <TB0> INFO: scanning low vcal = 180
[11:35:56.828] <TB0> INFO: Test took 4491ms.
[11:35:56.921] <TB0> INFO: scanning low vcal = 190
[11:36:01.481] <TB0> INFO: Test took 4560ms.
[11:36:01.561] <TB0> INFO: scanning low vcal = 200
[11:36:06.007] <TB0> INFO: Test took 4446ms.
[11:36:06.092] <TB0> INFO: scanning low vcal = 210
[11:36:10.515] <TB0> INFO: Test took 4423ms.
[11:36:10.590] <TB0> INFO: scanning low vcal = 220
[11:36:14.908] <TB0> INFO: Test took 4318ms.
[11:36:14.971] <TB0> INFO: scanning low vcal = 230
[11:36:19.428] <TB0> INFO: Test took 4457ms.
[11:36:19.528] <TB0> INFO: scanning low vcal = 240
[11:36:23.909] <TB0> INFO: Test took 4381ms.
[11:36:23.971] <TB0> INFO: scanning low vcal = 250
[11:36:28.345] <TB0> INFO: Test took 4374ms.
[11:36:28.406] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[11:36:32.733] <TB0> INFO: Test took 4327ms.
[11:36:32.795] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[11:36:37.141] <TB0> INFO: Test took 4346ms.
[11:36:37.237] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[11:36:41.603] <TB0> INFO: Test took 4365ms.
[11:36:41.664] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[11:36:46.090] <TB0> INFO: Test took 4426ms.
[11:36:46.186] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:36:50.596] <TB0> INFO: Test took 4409ms.
[11:36:51.184] <TB0> INFO: PixTestGainPedestal::measure() done
[11:37:22.276] <TB0> INFO: PixTestGainPedestal::fit() done
[11:37:22.276] <TB0> INFO: non-linearity mean: 0.956 0.956 0.951 0.958 0.953 0.962 0.958 0.949 0.955 0.962 0.949 0.950 0.954 0.958 0.955 0.960
[11:37:22.276] <TB0> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.007 0.007 0.005 0.006 0.006 0.005 0.008 0.005 0.006 0.007 0.006 0.005
[11:37:22.276] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[11:37:22.295] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[11:37:22.315] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[11:37:22.334] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[11:37:22.354] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[11:37:22.373] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[11:37:22.393] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[11:37:22.412] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[11:37:22.431] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[11:37:22.450] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[11:37:22.469] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[11:37:22.488] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[11:37:22.508] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[11:37:22.527] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[11:37:22.546] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[11:37:22.565] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[11:37:22.585] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[11:37:22.591] <TB0> INFO: enter test to run
[11:37:22.591] <TB0> INFO: test: exit no parameter change
[11:37:23.024] <TB0> QUIET: Connection to board 126 closed.
[11:37:23.104] <TB0> INFO: pXar: this is the end, my friend