[07:40:56.285] <TB0> INFO: *** Welcome to pxar ***
[07:40:56.285] <TB0> INFO: *** Today: 2015/08/17
[07:40:56.285] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C15.dat
[07:40:56.286] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//tbmParameters_C0b.dat
[07:40:56.286] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//defaultMaskFile.dat
[07:40:56.286] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters_C15.dat
[07:40:56.349] <TB0> INFO: clk: 4
[07:40:56.349] <TB0> INFO: ctr: 4
[07:40:56.349] <TB0> INFO: sda: 19
[07:40:56.349] <TB0> INFO: tin: 9
[07:40:56.349] <TB0> INFO: level: 15
[07:40:56.349] <TB0> INFO: triggerdelay: 0
[07:40:56.349] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[07:40:56.349] <TB0> INFO: Log level: INFO
[07:40:56.357] <TB0> INFO: Found DTB DTB_WWVASW
[07:40:56.367] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[07:40:56.370] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[07:40:56.373] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[07:40:57.886] <TB0> INFO: DUT info:
[07:40:57.886] <TB0> INFO: The DUT currently contains the following objects:
[07:40:57.886] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[07:40:57.886] <TB0> INFO: TBM Core alpha (0): 7 registers set
[07:40:57.886] <TB0> INFO: TBM Core beta (1): 7 registers set
[07:40:57.886] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[07:40:57.886] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:57.886] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[07:40:58.287] <TB0> INFO: enter 'restricted' command line mode
[07:40:58.287] <TB0> INFO: enter test to run
[07:40:58.287] <TB0> INFO: test: pretest no parameter change
[07:40:58.287] <TB0> INFO: running: pretest
[07:40:58.291] <TB0> INFO: ######################################################################
[07:40:58.291] <TB0> INFO: PixTestPretest::doTest()
[07:40:58.291] <TB0> INFO: ######################################################################
[07:40:58.293] <TB0> INFO: ----------------------------------------------------------------------
[07:40:58.293] <TB0> INFO: PixTestPretest::programROC()
[07:40:58.293] <TB0> INFO: ----------------------------------------------------------------------
[07:41:16.310] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[07:41:16.310] <TB0> INFO: IA differences per ROC: 18.5 18.5 16.9 17.7 19.3 19.3 19.3 19.3 23.3 16.1 18.5 20.1 20.1 18.5 19.3 20.9
[07:41:16.388] <TB0> INFO: ----------------------------------------------------------------------
[07:41:16.389] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[07:41:16.389] <TB0> INFO: ----------------------------------------------------------------------
[07:41:21.564] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[07:41:21.567] <TB0> INFO: ----------------------------------------------------------------------
[07:41:21.567] <TB0> INFO: PixTestPretest::findWorkingPixel()
[07:41:21.567] <TB0> INFO: ----------------------------------------------------------------------
[07:41:29.863] <TB0> INFO: Test took 8291ms.
[07:41:30.167] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[07:41:30.205] <TB0> INFO: ----------------------------------------------------------------------
[07:41:30.205] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[07:41:30.205] <TB0> INFO: ----------------------------------------------------------------------
[07:41:38.548] <TB0> INFO: Test took 8336ms.
[07:41:38.859] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[07:41:38.859] <TB0> INFO: CalDel: 154 145 116 126 135 158 140 139 141 127 126 110 131 125 130 118
[07:41:38.859] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[07:41:38.863] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C0.dat
[07:41:38.863] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C1.dat
[07:41:38.863] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C2.dat
[07:41:38.864] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C3.dat
[07:41:38.864] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C4.dat
[07:41:38.864] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C5.dat
[07:41:38.864] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C6.dat
[07:41:38.864] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C7.dat
[07:41:38.865] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C8.dat
[07:41:38.865] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C9.dat
[07:41:38.865] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C10.dat
[07:41:38.865] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C11.dat
[07:41:38.866] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C12.dat
[07:41:38.866] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C13.dat
[07:41:38.866] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C14.dat
[07:41:38.866] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C15.dat
[07:41:38.866] <TB0> INFO: PixTestPretest::doTest() done, duration: 40 seconds
[07:41:38.958] <TB0> INFO: enter test to run
[07:41:38.958] <TB0> INFO: test: fulltest no parameter change
[07:41:38.958] <TB0> INFO: running: fulltest
[07:41:38.958] <TB0> INFO: ######################################################################
[07:41:38.958] <TB0> INFO: PixTestFullTest::doTest()
[07:41:38.958] <TB0> INFO: ######################################################################
[07:41:38.960] <TB0> INFO: ######################################################################
[07:41:38.960] <TB0> INFO: PixTestAlive::doTest()
[07:41:38.960] <TB0> INFO: ######################################################################
[07:41:38.961] <TB0> INFO: ----------------------------------------------------------------------
[07:41:38.961] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:41:38.961] <TB0> INFO: ----------------------------------------------------------------------
[07:41:42.406] <TB0> INFO: Test took 3444ms.
[07:41:42.429] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:41:42.658] <TB0> INFO: PixTestAlive::aliveTest() done
[07:41:42.658] <TB0> INFO: number of dead pixels (per ROC): 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[07:41:42.659] <TB0> INFO: ----------------------------------------------------------------------
[07:41:42.659] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:41:42.659] <TB0> INFO: ----------------------------------------------------------------------
[07:41:45.433] <TB0> INFO: Test took 2772ms.
[07:41:45.436] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:41:45.437] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[07:41:45.669] <TB0> INFO: PixTestAlive::maskTest() done
[07:41:45.669] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:41:45.671] <TB0> INFO: ----------------------------------------------------------------------
[07:41:45.671] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:41:45.671] <TB0> INFO: ----------------------------------------------------------------------
[07:41:49.153] <TB0> INFO: Test took 3480ms.
[07:41:49.178] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:41:49.410] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[07:41:49.410] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:41:49.410] <TB0> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[07:41:49.424] <TB0> INFO: ######################################################################
[07:41:49.424] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[07:41:49.424] <TB0> INFO: ######################################################################
[07:41:49.428] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[07:41:49.443] <TB0> INFO: dacScan step from 0 .. 29
[07:42:11.174] <TB0> INFO: Test took 21731ms.
[07:42:11.204] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:42:11.206] <TB0> INFO: dacScan step from 30 .. 59
[07:42:35.091] <TB0> INFO: Test took 23885ms.
[07:42:35.221] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:42:35.265] <TB0> INFO: dacScan step from 60 .. 89
[07:43:05.815] <TB0> INFO: Test took 30550ms.
[07:43:06.054] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:43:06.127] <TB0> INFO: dacScan step from 90 .. 119
[07:43:37.782] <TB0> INFO: Test took 31655ms.
[07:43:38.049] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:43:38.138] <TB0> INFO: dacScan step from 120 .. 149
[07:44:06.961] <TB0> INFO: Test took 28823ms.
[07:44:07.177] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:44:30.127] <TB0> INFO: PixTestBBMap::doTest() done, duration: 160 seconds
[07:44:30.127] <TB0> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:44:30.127] <TB0> INFO: separation cut (per ROC): 70 73 83 99 100 75 89 97 93 75 80 68 77 84 76 91
[07:44:30.198] <TB0> INFO: ######################################################################
[07:44:30.198] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[07:44:30.198] <TB0> INFO: ######################################################################
[07:44:30.198] <TB0> INFO: ----------------------------------------------------------------------
[07:44:30.198] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[07:44:30.198] <TB0> INFO: ----------------------------------------------------------------------
[07:44:30.198] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[07:44:30.207] <TB0> INFO: dacScan step from 0 .. 3
[07:44:48.025] <TB0> INFO: Test took 17818ms.
[07:44:48.051] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:44:48.051] <TB0> INFO: dacScan step from 4 .. 7
[07:45:06.086] <TB0> INFO: Test took 18035ms.
[07:45:06.115] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:45:06.115] <TB0> INFO: dacScan step from 8 .. 11
[07:45:26.536] <TB0> INFO: Test took 20421ms.
[07:45:26.570] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:45:26.570] <TB0> INFO: dacScan step from 12 .. 15
[07:45:47.058] <TB0> INFO: Test took 20488ms.
[07:45:47.084] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:45:47.084] <TB0> INFO: dacScan step from 16 .. 19
[07:46:07.691] <TB0> INFO: Test took 20607ms.
[07:46:07.719] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:46:07.719] <TB0> INFO: dacScan step from 20 .. 23
[07:46:28.172] <TB0> INFO: Test took 20453ms.
[07:46:28.199] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:46:28.199] <TB0> INFO: dacScan step from 24 .. 27
[07:46:49.077] <TB0> INFO: Test took 20878ms.
[07:46:49.106] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:46:49.106] <TB0> INFO: dacScan step from 28 .. 31
[07:47:09.742] <TB0> INFO: Test took 20636ms.
[07:47:09.770] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:47:09.771] <TB0> INFO: dacScan step from 32 .. 35
[07:47:30.446] <TB0> INFO: Test took 20675ms.
[07:47:30.478] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:47:30.478] <TB0> INFO: dacScan step from 36 .. 39
[07:47:50.948] <TB0> INFO: Test took 20470ms.
[07:47:50.980] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:47:50.980] <TB0> INFO: dacScan step from 40 .. 43
[07:48:10.858] <TB0> INFO: Test took 19878ms.
[07:48:10.886] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:48:10.886] <TB0> INFO: dacScan step from 44 .. 47
[07:48:30.267] <TB0> INFO: Test took 19381ms.
[07:48:30.292] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:48:30.292] <TB0> INFO: dacScan step from 48 .. 51
[07:48:49.964] <TB0> INFO: Test took 19672ms.
[07:48:49.991] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:48:49.991] <TB0> INFO: dacScan step from 52 .. 55
[07:49:09.807] <TB0> INFO: Test took 19816ms.
[07:49:09.836] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:09.836] <TB0> INFO: dacScan step from 56 .. 59
[07:49:29.201] <TB0> INFO: Test took 19365ms.
[07:49:29.235] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:29.235] <TB0> INFO: dacScan step from 60 .. 63
[07:49:50.603] <TB0> INFO: Test took 21368ms.
[07:49:50.631] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:50.631] <TB0> INFO: dacScan step from 64 .. 67
[07:50:11.572] <TB0> INFO: Test took 20941ms.
[07:50:11.601] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:50:11.601] <TB0> INFO: dacScan step from 68 .. 71
[07:50:32.507] <TB0> INFO: Test took 20906ms.
[07:50:32.549] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:50:32.549] <TB0> INFO: dacScan step from 72 .. 75
[07:50:53.959] <TB0> INFO: Test took 21409ms.
[07:50:54.013] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:50:54.015] <TB0> INFO: dacScan step from 76 .. 79
[07:51:16.058] <TB0> INFO: Test took 22043ms.
[07:51:16.130] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:51:16.132] <TB0> INFO: dacScan step from 80 .. 83
[07:51:41.114] <TB0> INFO: Test took 24982ms.
[07:51:41.233] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:51:41.239] <TB0> INFO: dacScan step from 84 .. 87
[07:52:08.111] <TB0> INFO: Test took 26872ms.
[07:52:08.286] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:52:08.300] <TB0> INFO: dacScan step from 88 .. 91
[07:52:37.051] <TB0> INFO: Test took 28751ms.
[07:52:37.251] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:52:37.261] <TB0> INFO: dacScan step from 92 .. 95
[07:53:06.815] <TB0> INFO: Test took 29554ms.
[07:53:07.017] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:53:07.027] <TB0> INFO: dacScan step from 96 .. 99
[07:53:38.291] <TB0> INFO: Test took 31264ms.
[07:53:38.512] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:53:38.523] <TB0> INFO: dacScan step from 100 .. 103


[07:54:10.303] <TB0> INFO: Test took 31779ms.
[07:54:10.533] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:54:10.545] <TB0> INFO: dacScan step from 104 .. 107





[07:54:42.386] <TB0> INFO: Test took 31841ms.
[07:54:42.628] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:54:42.644] <TB0> INFO: dacScan step from 108 .. 111





[07:55:15.003] <TB0> INFO: Test took 32359ms.
[07:55:15.237] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:55:15.249] <TB0> INFO: dacScan step from 112 .. 115

[07:55:47.716] <TB0> INFO: Test took 32467ms.
[07:55:47.957] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:55:47.970] <TB0> INFO: dacScan step from 116 .. 119


[07:56:20.555] <TB0> INFO: Test took 32585ms.
[07:56:20.778] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:56:20.790] <TB0> INFO: dacScan step from 120 .. 123



[07:56:52.530] <TB0> INFO: Test took 31740ms.
[07:56:52.771] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:56:52.783] <TB0> INFO: dacScan step from 124 .. 127
[07:57:24.972] <TB0> INFO: Test took 32189ms.
[07:57:25.197] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:57:25.210] <TB0> INFO: dacScan step from 128 .. 131
[07:57:57.424] <TB0> INFO: Test took 32214ms.
[07:57:57.672] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:57:57.685] <TB0> INFO: dacScan step from 132 .. 135
[07:58:29.788] <TB0> INFO: Test took 32103ms.
[07:58:30.028] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:58:30.041] <TB0> INFO: dacScan step from 136 .. 139
[07:59:02.728] <TB0> INFO: Test took 32686ms.
[07:59:03.025] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:59:03.040] <TB0> INFO: dacScan step from 140 .. 143
[07:59:35.926] <TB0> INFO: Test took 32885ms.
[07:59:36.197] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:59:36.213] <TB0> INFO: dacScan step from 144 .. 147
[08:00:06.138] <TB0> INFO: Test took 29925ms.
[08:00:06.386] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:00:06.397] <TB0> INFO: dacScan step from 148 .. 149
[08:00:23.040] <TB0> INFO: Test took 16642ms.
[08:00:23.155] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:00:23.165] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:24.893] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:26.562] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:28.009] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:29.432] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:30.847] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:32.235] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:33.650] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:35.044] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:36.416] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:37.834] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:39.242] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:40.672] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:42.093] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:43.509] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:44.998] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[08:00:46.497] <TB0> INFO: PixTestScurves::scurves() done
[08:00:46.497] <TB0> INFO: Vcal mean: 78.01 85.96 81.39 93.56 98.04 93.68 93.27 94.51 101.74 87.37 83.69 78.07 83.58 84.12 87.24 89.93
[08:00:46.497] <TB0> INFO: Vcal RMS: 4.76 5.26 5.21 6.20 6.26 5.68 5.78 5.48 5.52 4.99 4.71 4.57 4.58 4.79 5.84 5.93
[08:00:46.497] <TB0> INFO: PixTestScurves::fullTest() done, duration: 976 seconds
[08:00:46.575] <TB0> INFO: ######################################################################
[08:00:46.575] <TB0> INFO: PixTestTrim::doTest()
[08:00:46.575] <TB0> INFO: ######################################################################
[08:00:46.576] <TB0> INFO: ----------------------------------------------------------------------
[08:00:46.576] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:00:46.576] <TB0> INFO: ----------------------------------------------------------------------
[08:00:46.666] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:00:46.666] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:00:46.674] <TB0> INFO: dacScan step from 0 .. 19
[08:01:02.309] <TB0> INFO: Test took 15635ms.
[08:01:02.329] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:02.329] <TB0> INFO: dacScan step from 20 .. 39
[08:01:16.692] <TB0> INFO: Test took 14363ms.
[08:01:16.711] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:16.711] <TB0> INFO: dacScan step from 40 .. 59
[08:01:31.889] <TB0> INFO: Test took 15178ms.
[08:01:31.914] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:31.914] <TB0> INFO: dacScan step from 60 .. 79
[08:01:47.202] <TB0> INFO: Test took 15288ms.
[08:01:47.225] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:47.225] <TB0> INFO: dacScan step from 80 .. 99
[08:02:02.839] <TB0> INFO: Test took 15614ms.
[08:02:02.888] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:02:02.895] <TB0> INFO: dacScan step from 100 .. 119
[08:02:20.833] <TB0> INFO: Test took 17938ms.
[08:02:21.001] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:02:21.032] <TB0> INFO: dacScan step from 120 .. 139
[08:02:40.187] <TB0> INFO: Test took 19155ms.
[08:02:40.339] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:02:40.370] <TB0> INFO: dacScan step from 140 .. 159
[08:02:58.210] <TB0> INFO: Test took 17840ms.
[08:02:58.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:03:20.993] <TB0> INFO: ROC 0 VthrComp = 84
[08:03:20.993] <TB0> INFO: ROC 1 VthrComp = 89
[08:03:20.993] <TB0> INFO: ROC 2 VthrComp = 86
[08:03:20.993] <TB0> INFO: ROC 3 VthrComp = 97
[08:03:20.994] <TB0> INFO: ROC 4 VthrComp = 101
[08:03:20.994] <TB0> INFO: ROC 5 VthrComp = 93
[08:03:20.994] <TB0> INFO: ROC 6 VthrComp = 99
[08:03:20.994] <TB0> INFO: ROC 7 VthrComp = 100
[08:03:20.994] <TB0> INFO: ROC 8 VthrComp = 107
[08:03:20.994] <TB0> INFO: ROC 9 VthrComp = 93
[08:03:20.994] <TB0> INFO: ROC 10 VthrComp = 91
[08:03:20.994] <TB0> INFO: ROC 11 VthrComp = 84
[08:03:20.994] <TB0> INFO: ROC 12 VthrComp = 93
[08:03:20.994] <TB0> INFO: ROC 13 VthrComp = 92
[08:03:20.994] <TB0> INFO: ROC 14 VthrComp = 90
[08:03:20.995] <TB0> INFO: ROC 15 VthrComp = 97
[08:03:20.995] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:03:20.995] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:03:21.004] <TB0> INFO: dacScan step from 0 .. 19
[08:03:37.111] <TB0> INFO: Test took 16106ms.
[08:03:37.140] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:03:37.140] <TB0> INFO: dacScan step from 20 .. 39
[08:03:51.590] <TB0> INFO: Test took 14450ms.
[08:03:51.622] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:03:51.626] <TB0> INFO: dacScan step from 40 .. 59
[08:04:10.487] <TB0> INFO: Test took 18861ms.
[08:04:10.641] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:10.675] <TB0> INFO: dacScan step from 60 .. 79
[08:04:32.305] <TB0> INFO: Test took 21630ms.
[08:04:32.464] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:32.513] <TB0> INFO: dacScan step from 80 .. 99
[08:04:54.683] <TB0> INFO: Test took 22170ms.
[08:04:54.853] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:54.920] <TB0> INFO: dacScan step from 100 .. 119
[08:05:16.846] <TB0> INFO: Test took 21926ms.
[08:05:17.102] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:05:17.153] <TB0> INFO: dacScan step from 120 .. 139
[08:05:38.537] <TB0> INFO: Test took 21384ms.
[08:05:38.700] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:05:38.752] <TB0> INFO: dacScan step from 140 .. 159
[08:06:01.665] <TB0> INFO: Test took 22913ms.
[08:06:01.832] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:06:27.337] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 57.7409 for pixel 51/6 mean/min/max = 45.286/32.7378/57.8341
[08:06:27.337] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 59.5263 for pixel 4/10 mean/min/max = 46.2431/32.9259/59.5602
[08:06:27.337] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 59.815 for pixel 0/0 mean/min/max = 45.7763/31.6097/59.9429
[08:06:27.338] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 61.9321 for pixel 0/28 mean/min/max = 46.5979/31.1697/62.0262
[08:06:27.338] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 61.5635 for pixel 4/2 mean/min/max = 46.8062/32.0402/61.5723
[08:06:27.338] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 59.5105 for pixel 27/0 mean/min/max = 46.2605/32.9722/59.5489
[08:06:27.339] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.4792 for pixel 51/17 mean/min/max = 45.0078/31.4359/58.5796
[08:06:27.339] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 58.0021 for pixel 20/54 mean/min/max = 45.1278/32.2531/58.0024
[08:06:27.339] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.3883 for pixel 0/31 mean/min/max = 46.9441/33.4124/60.4758
[08:06:27.340] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 57.4088 for pixel 50/0 mean/min/max = 45.466/33.4701/57.4619
[08:06:27.340] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 57.2005 for pixel 6/58 mean/min/max = 44.7138/32.1188/57.3088
[08:06:27.340] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.2318 for pixel 7/1 mean/min/max = 45.2656/32.2367/58.2946
[08:06:27.341] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 55.9034 for pixel 22/66 mean/min/max = 44.5245/32.3287/56.7203
[08:06:27.341] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 57.7579 for pixel 19/17 mean/min/max = 45.0853/32.3064/57.8642
[08:06:27.341] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 61.4344 for pixel 10/79 mean/min/max = 47.0071/32.2549/61.7593
[08:06:27.341] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 59.5519 for pixel 5/72 mean/min/max = 45.6165/31.6525/59.5805
[08:06:27.342] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:08:08.938] <TB0> INFO: Test took 101596ms.
[08:08:10.479] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:08:10.487] <TB0> INFO: dacScan step from 0 .. 19
[08:08:34.842] <TB0> INFO: Test took 24355ms.
[08:08:34.894] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:08:34.896] <TB0> INFO: dacScan step from 20 .. 39
[08:09:04.393] <TB0> INFO: Test took 29497ms.
[08:09:04.622] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:09:04.653] <TB0> INFO: dacScan step from 40 .. 59


[08:09:38.936] <TB0> INFO: Test took 34283ms.
[08:09:39.213] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:09:39.264] <TB0> INFO: dacScan step from 60 .. 79


[08:10:14.864] <TB0> INFO: Test took 35600ms.
[08:10:15.134] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:10:15.194] <TB0> INFO: dacScan step from 80 .. 99
[08:10:51.193] <TB0> INFO: Test took 35999ms.
[08:10:51.523] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:10:51.580] <TB0> INFO: dacScan step from 100 .. 119


[08:11:26.478] <TB0> INFO: Test took 34898ms.
[08:11:26.755] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:11:26.804] <TB0> INFO: dacScan step from 120 .. 139


[08:12:02.030] <TB0> INFO: Test took 35225ms.
[08:12:02.307] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:12:02.359] <TB0> INFO: dacScan step from 140 .. 159


[08:12:36.347] <TB0> INFO: Test took 33988ms.
[08:12:36.798] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:12:36.886] <TB0> INFO: dacScan step from 160 .. 179


[08:13:10.454] <TB0> INFO: Test took 33568ms.
[08:13:10.719] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:13:10.770] <TB0> INFO: dacScan step from 180 .. 199
[08:13:47.174] <TB0> INFO: Test took 36404ms.
[08:13:47.513] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:14:17.561] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.029956 .. 255.000000
[08:14:17.657] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[08:14:17.665] <TB0> INFO: dacScan step from 0 .. 19
[08:14:31.563] <TB0> INFO: Test took 13898ms.
[08:14:31.584] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:14:31.584] <TB0> INFO: dacScan step from 20 .. 39
[08:14:45.745] <TB0> INFO: Test took 14161ms.
[08:14:45.829] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:14:45.846] <TB0> INFO: dacScan step from 40 .. 59
[08:15:03.657] <TB0> INFO: Test took 17811ms.
[08:15:03.814] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:15:03.867] <TB0> INFO: dacScan step from 60 .. 79
[08:15:22.838] <TB0> INFO: Test took 18971ms.
[08:15:22.989] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:15:23.045] <TB0> INFO: dacScan step from 80 .. 99
[08:15:42.583] <TB0> INFO: Test took 19537ms.
[08:15:42.739] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:15:42.795] <TB0> INFO: dacScan step from 100 .. 119
[08:16:01.928] <TB0> INFO: Test took 19133ms.
[08:16:02.068] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:02.122] <TB0> INFO: dacScan step from 120 .. 139
[08:16:21.562] <TB0> INFO: Test took 19440ms.
[08:16:21.703] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:21.756] <TB0> INFO: dacScan step from 140 .. 159
[08:16:41.022] <TB0> INFO: Test took 19266ms.
[08:16:41.169] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:41.220] <TB0> INFO: dacScan step from 160 .. 179
[08:16:59.144] <TB0> INFO: Test took 17924ms.
[08:16:59.374] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:59.462] <TB0> INFO: dacScan step from 180 .. 199
[08:17:19.779] <TB0> INFO: Test took 20317ms.
[08:17:19.927] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:19.980] <TB0> INFO: dacScan step from 200 .. 219
[08:17:39.449] <TB0> INFO: Test took 19469ms.
[08:17:39.592] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:39.641] <TB0> INFO: dacScan step from 220 .. 239
[08:17:59.001] <TB0> INFO: Test took 19360ms.
[08:17:59.157] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:59.239] <TB0> INFO: dacScan step from 240 .. 255
[08:18:14.645] <TB0> INFO: Test took 15406ms.
[08:18:14.829] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:18:48.943] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 15.332519 .. 48.570205
[08:18:49.037] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 58 (20) hits flags = 16 (plus default)
[08:18:49.047] <TB0> INFO: dacScan step from 5 .. 24
[08:19:02.118] <TB0> INFO: Test took 13071ms.
[08:19:02.137] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:02.137] <TB0> INFO: dacScan step from 25 .. 44
[08:19:17.117] <TB0> INFO: Test took 14980ms.
[08:19:17.233] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:17.277] <TB0> INFO: dacScan step from 45 .. 58
[08:19:30.318] <TB0> INFO: Test took 13041ms.
[08:19:30.478] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:47.768] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 20.024690 .. 44.149295
[08:19:47.843] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 54 (20) hits flags = 16 (plus default)
[08:19:47.851] <TB0> INFO: dacScan step from 10 .. 29
[08:20:01.670] <TB0> INFO: Test took 13819ms.
[08:20:01.690] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:01.690] <TB0> INFO: dacScan step from 30 .. 49
[08:20:17.663] <TB0> INFO: Test took 15972ms.
[08:20:17.803] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:17.843] <TB0> INFO: dacScan step from 50 .. 54
[08:20:24.417] <TB0> INFO: Test took 6574ms.
[08:20:24.455] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:39.759] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 2.790106 .. 43.190276
[08:20:39.837] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 53 (20) hits flags = 16 (plus default)
[08:20:39.846] <TB0> INFO: dacScan step from 2 .. 21
[08:20:53.063] <TB0> INFO: Test took 13217ms.
[08:20:53.089] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:53.089] <TB0> INFO: dacScan step from 22 .. 41
[08:21:07.891] <TB0> INFO: Test took 14802ms.
[08:21:07.998] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:08.021] <TB0> INFO: dacScan step from 42 .. 53
[08:21:20.637] <TB0> INFO: Test took 12616ms.
[08:21:20.726] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:36.291] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[08:21:36.291] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[08:21:36.300] <TB0> INFO: dacScan step from 15 .. 34
[08:21:58.396] <TB0> INFO: Test took 22095ms.
[08:21:58.459] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:58.470] <TB0> INFO: dacScan step from 35 .. 54


[08:22:32.228] <TB0> INFO: Test took 33758ms.
[08:22:32.555] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:32.608] <TB0> INFO: dacScan step from 55 .. 55
[08:22:37.247] <TB0> INFO: Test took 4639ms.
[08:22:37.266] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:51.378] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C0.dat
[08:22:51.378] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C1.dat
[08:22:51.378] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C2.dat
[08:22:51.378] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C3.dat
[08:22:51.378] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C4.dat
[08:22:51.379] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C5.dat
[08:22:51.379] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C6.dat
[08:22:51.379] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C7.dat
[08:22:51.379] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C8.dat
[08:22:51.379] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C9.dat
[08:22:51.379] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C10.dat
[08:22:51.380] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C11.dat
[08:22:51.380] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C12.dat
[08:22:51.380] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C13.dat
[08:22:51.380] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C14.dat
[08:22:51.381] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C15.dat
[08:22:51.381] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C0.dat
[08:22:51.389] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C1.dat
[08:22:51.396] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C2.dat
[08:22:51.403] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C3.dat
[08:22:51.410] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C4.dat
[08:22:51.417] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C5.dat
[08:22:51.423] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C6.dat
[08:22:51.430] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C7.dat
[08:22:51.437] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C8.dat
[08:22:51.444] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C9.dat
[08:22:51.451] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C10.dat
[08:22:51.457] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C11.dat
[08:22:51.464] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C12.dat
[08:22:51.471] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C13.dat
[08:22:51.477] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C14.dat
[08:22:51.484] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C15.dat
[08:22:51.491] <TB0> INFO: PixTestTrim::trimTest() done
[08:22:51.491] <TB0> INFO: vtrim: 92 104 117 111 121 115 101 109 180 102 114 108 109 119 111 128
[08:22:51.491] <TB0> INFO: vthrcomp: 84 89 86 97 101 93 99 100 107 93 91 84 93 92 90 97
[08:22:51.491] <TB0> INFO: vcal mean: 35.02 35.03 35.06 35.03 35.04 35.12 35.01 35.04 35.00 35.05 34.98 35.00 35.04 35.02 35.02 35.03
[08:22:51.491] <TB0> INFO: vcal RMS: 1.34 1.06 1.03 1.04 1.18 1.12 1.09 1.05 1.47 1.04 1.00 1.05 0.99 0.98 1.05 1.04
[08:22:51.491] <TB0> INFO: bits mean: 9.19 9.46 10.07 9.21 9.78 9.78 9.76 10.05 10.93 9.96 10.05 9.80 10.20 10.24 9.07 10.22
[08:22:51.491] <TB0> INFO: bits RMS: 2.71 2.52 2.49 2.86 2.45 2.42 2.67 2.44 1.77 2.30 2.49 2.57 2.35 2.29 2.80 2.42
[08:22:51.498] <TB0> INFO: ----------------------------------------------------------------------
[08:22:51.498] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[08:22:51.498] <TB0> INFO: ----------------------------------------------------------------------
[08:22:51.501] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:22:51.511] <TB0> INFO: dacScan step from 0 .. 19
[08:23:12.855] <TB0> INFO: Test took 21344ms.
[08:23:12.888] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:12.888] <TB0> INFO: dacScan step from 20 .. 39
[08:23:37.783] <TB0> INFO: Test took 24895ms.
[08:23:37.820] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:37.820] <TB0> INFO: dacScan step from 40 .. 59
[08:24:03.243] <TB0> INFO: Test took 25423ms.
[08:24:03.278] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:03.278] <TB0> INFO: dacScan step from 60 .. 79
[08:24:28.164] <TB0> INFO: Test took 24886ms.
[08:24:28.205] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:28.205] <TB0> INFO: dacScan step from 80 .. 99
[08:24:53.836] <TB0> INFO: Test took 25631ms.
[08:24:53.893] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:53.895] <TB0> INFO: dacScan step from 100 .. 119
[08:25:24.882] <TB0> INFO: Test took 30987ms.
[08:25:25.074] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:25.096] <TB0> INFO: dacScan step from 120 .. 139


[08:26:01.063] <TB0> INFO: Test took 35967ms.
[08:26:01.350] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:01.398] <TB0> INFO: dacScan step from 140 .. 159





[08:26:36.774] <TB0> INFO: Test took 35376ms.
[08:26:37.050] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:37.104] <TB0> INFO: dacScan step from 160 .. 179
[08:27:10.336] <TB0> INFO: Test took 33232ms.
[08:27:10.624] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:10.676] <TB0> INFO: dacScan step from 180 .. 199
[08:27:47.009] <TB0> INFO: Test took 36333ms.
[08:27:47.284] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:14.169] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 172 (20) hits flags = 16 (plus default)
[08:28:14.177] <TB0> INFO: dacScan step from 0 .. 19
[08:28:35.453] <TB0> INFO: Test took 21275ms.
[08:28:35.486] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:35.486] <TB0> INFO: dacScan step from 20 .. 39
[08:29:00.574] <TB0> INFO: Test took 25088ms.
[08:29:00.611] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:00.611] <TB0> INFO: dacScan step from 40 .. 59
[08:29:25.505] <TB0> INFO: Test took 24894ms.
[08:29:25.540] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:25.540] <TB0> INFO: dacScan step from 60 .. 79
[08:29:50.545] <TB0> INFO: Test took 25005ms.
[08:29:50.583] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:50.583] <TB0> INFO: dacScan step from 80 .. 99
[08:30:17.572] <TB0> INFO: Test took 26989ms.
[08:30:17.686] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:17.695] <TB0> INFO: dacScan step from 100 .. 119
[08:30:52.029] <TB0> INFO: Test took 34334ms.
[08:30:52.293] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:52.329] <TB0> INFO: dacScan step from 120 .. 139
[08:31:26.447] <TB0> INFO: Test took 34118ms.
[08:31:26.724] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:26.776] <TB0> INFO: dacScan step from 140 .. 159
[08:32:02.886] <TB0> INFO: Test took 36110ms.
[08:32:03.171] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:03.225] <TB0> INFO: dacScan step from 160 .. 172
[08:32:28.179] <TB0> INFO: Test took 24954ms.
[08:32:28.358] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:52.671] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[08:32:52.680] <TB0> INFO: dacScan step from 0 .. 19
[08:33:15.400] <TB0> INFO: Test took 22720ms.
[08:33:15.437] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:15.437] <TB0> INFO: dacScan step from 20 .. 39
[08:33:38.227] <TB0> INFO: Test took 22790ms.
[08:33:38.264] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:38.264] <TB0> INFO: dacScan step from 40 .. 59
[08:34:01.134] <TB0> INFO: Test took 22870ms.
[08:34:01.168] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:01.169] <TB0> INFO: dacScan step from 60 .. 79
[08:34:23.918] <TB0> INFO: Test took 22749ms.
[08:34:23.957] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:23.957] <TB0> INFO: dacScan step from 80 .. 99
[08:34:48.226] <TB0> INFO: Test took 24269ms.
[08:34:48.362] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:48.373] <TB0> INFO: dacScan step from 100 .. 119
[08:35:19.035] <TB0> INFO: Test took 30662ms.
[08:35:19.305] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:19.338] <TB0> INFO: dacScan step from 120 .. 139



[08:35:53.825] <TB0> INFO: Test took 34487ms.
[08:35:54.094] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:54.145] <TB0> INFO: dacScan step from 140 .. 158





[08:36:27.323] <TB0> INFO: Test took 33178ms.
[08:36:27.588] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:50.471] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[08:36:50.479] <TB0> INFO: dacScan step from 0 .. 19
[08:37:14.109] <TB0> INFO: Test took 23629ms.
[08:37:14.146] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:14.146] <TB0> INFO: dacScan step from 20 .. 39
[08:37:38.256] <TB0> INFO: Test took 24110ms.
[08:37:38.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:38.289] <TB0> INFO: dacScan step from 40 .. 59
[08:38:02.206] <TB0> INFO: Test took 23917ms.
[08:38:02.244] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:02.244] <TB0> INFO: dacScan step from 60 .. 79
[08:38:25.903] <TB0> INFO: Test took 23659ms.
[08:38:25.945] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:25.945] <TB0> INFO: dacScan step from 80 .. 99
[08:38:50.711] <TB0> INFO: Test took 24766ms.
[08:38:50.811] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:50.820] <TB0> INFO: dacScan step from 100 .. 119
[08:39:24.799] <TB0> INFO: Test took 33979ms.
[08:39:25.077] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:25.111] <TB0> INFO: dacScan step from 120 .. 139





[08:40:01.786] <TB0> INFO: Test took 36675ms.
[08:40:02.069] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:02.113] <TB0> INFO: dacScan step from 140 .. 158
[08:40:36.341] <TB0> INFO: Test took 34228ms.
[08:40:36.642] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:58.728] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 157 (20) hits flags = 16 (plus default)
[08:40:58.737] <TB0> INFO: dacScan step from 0 .. 19
[08:41:23.793] <TB0> INFO: Test took 25056ms.
[08:41:23.828] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:23.828] <TB0> INFO: dacScan step from 20 .. 39
[08:41:48.874] <TB0> INFO: Test took 25046ms.
[08:41:48.911] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:48.911] <TB0> INFO: dacScan step from 40 .. 59
[08:42:12.948] <TB0> INFO: Test took 24037ms.
[08:42:12.985] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:12.985] <TB0> INFO: dacScan step from 60 .. 79
[08:42:37.131] <TB0> INFO: Test took 24146ms.
[08:42:37.167] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:37.167] <TB0> INFO: dacScan step from 80 .. 99
[08:43:03.713] <TB0> INFO: Test took 26546ms.
[08:43:03.821] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:03.830] <TB0> INFO: dacScan step from 100 .. 119
[08:43:39.096] <TB0> INFO: Test took 35266ms.
[08:43:39.351] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:39.383] <TB0> INFO: dacScan step from 120 .. 139

[08:44:15.949] <TB0> INFO: Test took 36566ms.
[08:44:16.249] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:16.299] <TB0> INFO: dacScan step from 140 .. 157
[08:44:49.355] <TB0> INFO: Test took 33056ms.
[08:44:49.695] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:13.094] <TB0> INFO: PixTestTrim::trimBitTest() done
[08:45:13.097] <TB0> INFO: PixTestTrim::doTest() done, duration: 2666 seconds
[08:45:13.787] <TB0> INFO: ######################################################################
[08:45:13.787] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[08:45:13.787] <TB0> INFO: ######################################################################
[08:45:17.207] <TB0> INFO: Test took 3418ms.
[08:45:17.229] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:20.909] <TB0> INFO: Test took 3483ms.
[08:45:20.973] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:24.447] <TB0> INFO: Test took 3464ms.
[08:45:24.509] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:24.515] <TB0> INFO: The DUT currently contains the following objects:
[08:45:24.515] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:24.515] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:24.515] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:24.515] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:24.515] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.516] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.623] <TB0> INFO: Test took 1107ms.
[08:45:25.624] <TB0> INFO: The DUT currently contains the following objects:
[08:45:25.624] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:25.624] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:25.624] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:25.624] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:25.624] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.624] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.625] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.733] <TB0> INFO: Test took 1108ms.
[08:45:26.734] <TB0> INFO: The DUT currently contains the following objects:
[08:45:26.734] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:26.734] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:26.734] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:26.734] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:26.734] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.734] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.734] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.734] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.734] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.734] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.734] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.734] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.735] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.735] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.735] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.735] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.735] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.735] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.735] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.735] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.842] <TB0> INFO: Test took 1107ms.
[08:45:27.843] <TB0> INFO: The DUT currently contains the following objects:
[08:45:27.843] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:27.843] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:27.843] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:27.843] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:27.843] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.843] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.844] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.844] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.844] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.844] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.844] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.952] <TB0> INFO: Test took 1108ms.
[08:45:28.953] <TB0> INFO: The DUT currently contains the following objects:
[08:45:28.953] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:28.953] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:28.953] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:28.953] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:28.953] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.953] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.954] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.954] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.954] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.954] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.954] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.061] <TB0> INFO: Test took 1107ms.
[08:45:30.062] <TB0> INFO: The DUT currently contains the following objects:
[08:45:30.062] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:30.062] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:30.062] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:30.062] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:30.062] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.062] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.062] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.063] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.169] <TB0> INFO: Test took 1106ms.
[08:45:31.171] <TB0> INFO: The DUT currently contains the following objects:
[08:45:31.171] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:31.171] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:31.171] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:31.171] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:31.171] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.171] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.277] <TB0> INFO: Test took 1106ms.
[08:45:32.278] <TB0> INFO: The DUT currently contains the following objects:
[08:45:32.278] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:32.278] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:32.278] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:32.278] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:32.278] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.278] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.278] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.278] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:32.279] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.386] <TB0> INFO: Test took 1107ms.
[08:45:33.387] <TB0> INFO: The DUT currently contains the following objects:
[08:45:33.387] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:33.387] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:33.387] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:33.387] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:33.387] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.387] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.388] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.388] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.388] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.388] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.388] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.388] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.490] <TB0> INFO: Test took 1102ms.
[08:45:34.491] <TB0> INFO: The DUT currently contains the following objects:
[08:45:34.491] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:34.491] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:34.491] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:34.491] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:34.491] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.491] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.597] <TB0> INFO: Test took 1107ms.
[08:45:35.599] <TB0> INFO: The DUT currently contains the following objects:
[08:45:35.599] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:35.599] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:35.599] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:35.599] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:35.599] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.599] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.600] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.600] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.600] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.600] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.600] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.600] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.705] <TB0> INFO: Test took 1105ms.
[08:45:36.706] <TB0> INFO: The DUT currently contains the following objects:
[08:45:36.706] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:36.706] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:36.706] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:36.706] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:36.706] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.706] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.706] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.706] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.706] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.706] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.706] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.706] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.707] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.707] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.707] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.707] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.707] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.707] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.707] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.707] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.827] <TB0> INFO: Test took 1120ms.
[08:45:37.828] <TB0> INFO: The DUT currently contains the following objects:
[08:45:37.828] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:37.828] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:37.828] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:37.828] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:37.828] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:37.828] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.935] <TB0> INFO: Test took 1107ms.
[08:45:38.936] <TB0> INFO: The DUT currently contains the following objects:
[08:45:38.936] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:38.936] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:38.936] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:38.936] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:38.936] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.936] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.936] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.936] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:38.937] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.042] <TB0> INFO: Test took 1105ms.
[08:45:40.043] <TB0> INFO: The DUT currently contains the following objects:
[08:45:40.044] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:40.044] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:40.044] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:40.044] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:40.044] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:40.044] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.152] <TB0> INFO: Test took 1108ms.
[08:45:41.153] <TB0> INFO: The DUT currently contains the following objects:
[08:45:41.153] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:41.153] <TB0> INFO: TBM Core alpha (0): 7 registers set
[08:45:41.153] <TB0> INFO: TBM Core beta (1): 7 registers set
[08:45:41.153] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:41.153] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.153] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:41.154] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:42.275] <TB0> INFO: Test took 1121ms.
[08:45:42.279] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:49:39.163] <TB0> INFO: Test took 236884ms.
[08:49:41.026] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:37.985] <TB0> INFO: Test took 236959ms.
[08:53:39.776] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.784] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.793] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.801] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.809] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.818] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.826] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[08:53:39.835] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[08:53:39.843] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[08:53:39.851] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[08:53:39.860] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[08:53:39.867] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.876] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.884] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.892] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.901] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.909] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.918] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.926] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.934] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:39.942] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:40.000] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C0.dat
[08:53:40.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C1.dat
[08:53:40.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C2.dat
[08:53:40.016] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C3.dat
[08:53:40.019] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C4.dat
[08:53:40.019] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C5.dat
[08:53:40.019] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C6.dat
[08:53:40.019] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C7.dat
[08:53:40.019] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C8.dat
[08:53:40.024] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C9.dat
[08:53:40.024] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C10.dat
[08:53:40.024] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C11.dat
[08:53:40.024] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C12.dat
[08:53:40.025] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C13.dat
[08:53:40.025] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C14.dat
[08:53:40.025] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C15.dat
[08:53:43.329] <TB0> INFO: Test took 3301ms.
[08:53:46.899] <TB0> INFO: Test took 3290ms.
[08:53:50.521] <TB0> INFO: Test took 3358ms.
[08:53:50.791] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:51.702] <TB0> INFO: Test took 911ms.
[08:53:51.704] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:52.805] <TB0> INFO: Test took 1101ms.
[08:53:52.807] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:53.909] <TB0> INFO: Test took 1102ms.
[08:53:53.912] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:55.014] <TB0> INFO: Test took 1103ms.
[08:53:55.017] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:56.119] <TB0> INFO: Test took 1102ms.
[08:53:56.122] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:57.225] <TB0> INFO: Test took 1103ms.
[08:53:57.227] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:58.342] <TB0> INFO: Test took 1115ms.
[08:53:58.345] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:59.475] <TB0> INFO: Test took 1130ms.
[08:53:59.477] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:00.578] <TB0> INFO: Test took 1101ms.
[08:54:00.585] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:01.681] <TB0> INFO: Test took 1096ms.
[08:54:01.684] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:02.786] <TB0> INFO: Test took 1102ms.
[08:54:02.788] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:03.891] <TB0> INFO: Test took 1103ms.
[08:54:03.894] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:04.995] <TB0> INFO: Test took 1101ms.
[08:54:04.998] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:06.100] <TB0> INFO: Test took 1102ms.
[08:54:06.103] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:07.205] <TB0> INFO: Test took 1102ms.
[08:54:07.208] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:08.323] <TB0> INFO: Test took 1115ms.
[08:54:08.326] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:09.427] <TB0> INFO: Test took 1102ms.
[08:54:09.430] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:10.530] <TB0> INFO: Test took 1100ms.
[08:54:10.532] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:11.634] <TB0> INFO: Test took 1102ms.
[08:54:11.636] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:12.737] <TB0> INFO: Test took 1101ms.
[08:54:12.740] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:13.840] <TB0> INFO: Test took 1100ms.
[08:54:13.842] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:14.943] <TB0> INFO: Test took 1101ms.
[08:54:14.945] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:16.047] <TB0> INFO: Test took 1102ms.
[08:54:16.049] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:17.149] <TB0> INFO: Test took 1100ms.
[08:54:17.151] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:18.265] <TB0> INFO: Test took 1114ms.
[08:54:18.267] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:19.370] <TB0> INFO: Test took 1103ms.
[08:54:19.372] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:20.475] <TB0> INFO: Test took 1103ms.
[08:54:20.477] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:21.578] <TB0> INFO: Test took 1101ms.
[08:54:21.581] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:22.680] <TB0> INFO: Test took 1099ms.
[08:54:22.682] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:23.788] <TB0> INFO: Test took 1106ms.
[08:54:23.792] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:24.898] <TB0> INFO: Test took 1107ms.
[08:54:24.901] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:26.007] <TB0> INFO: Test took 1106ms.
[08:54:26.540] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 552 seconds
[08:54:26.540] <TB0> INFO: PH scale (per ROC): 84 84 86 82 91 80 77 78 82 92 85 82 87 85 78 89
[08:54:26.540] <TB0> INFO: PH offset (per ROC): 145 163 142 165 150 161 144 165 159 154 170 150 140 157 165 162
[08:54:26.731] <TB0> INFO: ######################################################################
[08:54:26.731] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[08:54:26.731] <TB0> INFO: ######################################################################
[08:54:26.742] <TB0> INFO: scanning low vcal = 10
[08:54:30.564] <TB0> INFO: Test took 3822ms.
[08:54:30.569] <TB0> INFO: scanning low vcal = 20
[08:54:34.442] <TB0> INFO: Test took 3873ms.
[08:54:34.447] <TB0> INFO: scanning low vcal = 30
[08:54:38.299] <TB0> INFO: Test took 3845ms.
[08:54:38.312] <TB0> INFO: scanning low vcal = 40
[08:54:42.779] <TB0> INFO: Test took 4467ms.
[08:54:42.837] <TB0> INFO: scanning low vcal = 50
[08:54:47.354] <TB0> INFO: Test took 4517ms.
[08:54:47.413] <TB0> INFO: scanning low vcal = 60
[08:54:51.847] <TB0> INFO: Test took 4433ms.
[08:54:51.934] <TB0> INFO: scanning low vcal = 70
[08:54:56.507] <TB0> INFO: Test took 4573ms.
[08:54:56.607] <TB0> INFO: scanning low vcal = 80
[08:55:01.231] <TB0> INFO: Test took 4624ms.
[08:55:01.291] <TB0> INFO: scanning low vcal = 90
[08:55:05.742] <TB0> INFO: Test took 4451ms.
[08:55:05.804] <TB0> INFO: scanning low vcal = 100
[08:55:10.263] <TB0> INFO: Test took 4459ms.
[08:55:10.353] <TB0> INFO: scanning low vcal = 110
[08:55:14.906] <TB0> INFO: Test took 4553ms.
[08:55:14.960] <TB0> INFO: scanning low vcal = 120
[08:55:19.551] <TB0> INFO: Test took 4591ms.
[08:55:19.605] <TB0> INFO: scanning low vcal = 130
[08:55:24.187] <TB0> INFO: Test took 4582ms.
[08:55:24.248] <TB0> INFO: scanning low vcal = 140
[08:55:28.984] <TB0> INFO: Test took 4736ms.
[08:55:29.052] <TB0> INFO: scanning low vcal = 150
[08:55:33.703] <TB0> INFO: Test took 4651ms.
[08:55:33.775] <TB0> INFO: scanning low vcal = 160
[08:55:38.494] <TB0> INFO: Test took 4719ms.
[08:55:38.573] <TB0> INFO: scanning low vcal = 170
[08:55:43.279] <TB0> INFO: Test took 4706ms.
[08:55:43.342] <TB0> INFO: scanning low vcal = 180
[08:55:47.964] <TB0> INFO: Test took 4622ms.
[08:55:48.025] <TB0> INFO: scanning low vcal = 190
[08:55:52.737] <TB0> INFO: Test took 4712ms.
[08:55:52.817] <TB0> INFO: scanning low vcal = 200
[08:55:57.297] <TB0> INFO: Test took 4480ms.
[08:55:57.351] <TB0> INFO: scanning low vcal = 210
[08:56:02.000] <TB0> INFO: Test took 4649ms.
[08:56:02.086] <TB0> INFO: scanning low vcal = 220
[08:56:06.739] <TB0> INFO: Test took 4653ms.
[08:56:06.794] <TB0> INFO: scanning low vcal = 230
[08:56:11.401] <TB0> INFO: Test took 4607ms.
[08:56:11.462] <TB0> INFO: scanning low vcal = 240
[08:56:16.215] <TB0> INFO: Test took 4753ms.
[08:56:16.285] <TB0> INFO: scanning low vcal = 250
[08:56:20.808] <TB0> INFO: Test took 4523ms.
[08:56:20.867] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[08:56:25.399] <TB0> INFO: Test took 4532ms.
[08:56:25.479] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[08:56:30.019] <TB0> INFO: Test took 4540ms.
[08:56:30.085] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[08:56:34.551] <TB0> INFO: Test took 4466ms.
[08:56:34.617] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[08:56:39.130] <TB0> INFO: Test took 4513ms.
[08:56:39.188] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[08:56:43.430] <TB0> INFO: Test took 4242ms.
[08:56:44.019] <TB0> INFO: PixTestGainPedestal::measure() done
[08:57:14.628] <TB0> INFO: PixTestGainPedestal::fit() done
[08:57:14.628] <TB0> INFO: non-linearity mean: 0.955 0.963 0.950 0.955 0.953 0.967 0.956 0.949 0.955 0.961 0.946 0.948 0.954 0.958 0.957 0.959
[08:57:14.628] <TB0> INFO: non-linearity RMS: 0.006 0.004 0.007 0.007 0.007 0.005 0.006 0.006 0.007 0.005 0.008 0.006 0.006 0.007 0.005 0.005
[08:57:14.629] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[08:57:14.646] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[08:57:14.664] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[08:57:14.681] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[08:57:14.699] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[08:57:14.716] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[08:57:14.734] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[08:57:14.751] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[08:57:14.769] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[08:57:14.786] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[08:57:14.803] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[08:57:14.821] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[08:57:14.838] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[08:57:14.856] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[08:57:14.873] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[08:57:14.890] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2046_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[08:57:14.908] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[08:57:14.913] <TB0> INFO: enter test to run
[08:57:14.913] <TB0> INFO: test: exit no parameter change
[08:57:15.419] <TB0> QUIET: Connection to board 126 closed.
[08:57:15.498] <TB0> INFO: pXar: this is the end, my friend